mirror of
https://github.com/Dev-KATECH/ADM.git
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629 lines
22 KiB
C
629 lines
22 KiB
C
/*==================================================================================================
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* Project : RTD AUTOSAR 4.4
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* Platform : CORTEXM
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* Peripheral : FLEXCAN
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* Dependencies :
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*
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* Autosar Version : 4.4.0
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* Autosar Revision : ASR_REL_4_4_REV_0000
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* Autosar Conf.Variant :
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* SW Version : 0.9.0
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* Build Version : S32K3_RTD_0_9_0__ASR_REL_4_4_REV_0000_20210326
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*
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* (c) Copyright 2020 - 2021 NXP Semiconductors
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* All Rights Reserved.
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*
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* NXP Confidential. This software is owned or controlled by NXP and may only be
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* used strictly in accordance with the applicable license terms. By expressly
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* accepting such terms or by downloading, installing, activating and/or otherwise
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* using the software, you are agreeing that you have read, and that you agree to
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* comply with and are bound by, such license terms. If you do not agree to be
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* bound by the applicable license terms, then you may not retain, install,
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* activate or otherwise use the software.
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==================================================================================================*/
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/***********************************************************************************************************************
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* This file was generated by the S32 Configuration Tools. Any manual edits made to this file
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* will be overwritten if the respective S32 Configuration Tools is used to update this file.
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**********************************************************************************************************************/
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#ifdef __cplusplus
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extern "C"{
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#endif
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/*==================================================================================================
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* INCLUDE FILES
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* 1) system and project includes
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* 2) needed interfaces from external units
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* 3) internal and external interfaces from this unit
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==================================================================================================*/
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#include "FlexCAN_Ip_Sa_BOARD_InitPeripherals_PBcfg.h"
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#include "FlexCAN_Ip_Types.h"
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#if (FEATURE_CAN_HAS_DMA_ENABLE == STD_ON)
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#include "Dma_Ip.h"
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#endif
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/*==================================================================================================
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* SOURCE FILE VERSION INFORMATION
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==================================================================================================*/
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#define FLEXCAN_IP_VENDOR_ID_BOARD_InitPeripherals_PBCFG_C 43
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#define FLEXCAN_IP_AR_RELEASE_MAJOR_VERSION_BOARD_InitPeripherals_PBCFG_C 4
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#define FLEXCAN_IP_AR_RELEASE_MINOR_VERSION_BOARD_InitPeripherals_PBCFG_C 4
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#define FLEXCAN_IP_AR_RELEASE_REVISION_VERSION_BOARD_InitPeripherals_PBCFG_C 0
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#define FLEXCAN_IP_SW_MAJOR_VERSION_BOARD_InitPeripherals_PBCFG_C 0
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#define FLEXCAN_IP_SW_MINOR_VERSION_BOARD_InitPeripherals_PBCFG_C 9
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#define FLEXCAN_IP_SW_PATCH_VERSION_BOARD_InitPeripherals_PBCFG_C 0
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/*==================================================================================================
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* FILE VERSION CHECKS
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==================================================================================================*/
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/* TODO: */
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/*==================================================================================================
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* GLOBAL FUNCTION PROTOTYPES
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==================================================================================================*/
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#define CAN_START_SEC_CODE
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#include "Can_MemMap.h"
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extern void CAN0_Callback(uint8 instance, Flexcan_Ip_EventType eventType,
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uint32 buffIdx, const Flexcan_Ip_StateType * flexcanState);
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extern void CAN0_ErrCallback(uint8 instance, Flexcan_Ip_EventType eventType,
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uint32 u32ErrStatus,
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const Flexcan_Ip_StateType * flexcanState);
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extern void CAN1_Callback(uint8 instance, Flexcan_Ip_EventType eventType,
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uint32 buffIdx, const Flexcan_Ip_StateType * flexcanState);
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extern void CAN1_ErrCallback(uint8 instance, Flexcan_Ip_EventType eventType,
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uint32 u32ErrStatus,
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const Flexcan_Ip_StateType * flexcanState);
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extern void CAN2_Callback(uint8 instance, Flexcan_Ip_EventType eventType,
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uint32 buffIdx, const Flexcan_Ip_StateType * flexcanState);
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extern void CAN2_ErrCallback(uint8 instance, Flexcan_Ip_EventType eventType,
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uint32 u32ErrStatus,
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const Flexcan_Ip_StateType * flexcanState);
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extern void CAN3_Callback(uint8 instance, Flexcan_Ip_EventType eventType,
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uint32 buffIdx, const Flexcan_Ip_StateType * flexcanState);
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extern void CAN3_ErrCallback(uint8 instance, Flexcan_Ip_EventType eventType,
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uint32 u32ErrStatus,
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const Flexcan_Ip_StateType * flexcanState);
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extern void CAN4_Callback(uint8 instance, Flexcan_Ip_EventType eventType,
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uint32 buffIdx, const Flexcan_Ip_StateType * flexcanState);
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extern void CAN4_ErrCallback(uint8 instance, Flexcan_Ip_EventType eventType,
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uint32 u32ErrStatus,
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const Flexcan_Ip_StateType * flexcanState);
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extern void CAN5_Callback(uint8 instance, Flexcan_Ip_EventType eventType,
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uint32 buffIdx, const Flexcan_Ip_StateType * flexcanState);
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extern void CAN5_ErrCallback(uint8 instance, Flexcan_Ip_EventType eventType,
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uint32 u32ErrStatus,
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const Flexcan_Ip_StateType * flexcanState);
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#define CAN_STOP_SEC_CODE
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#include "Can_MemMap.h"
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/*==================================================================================================
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* GLOBAL VARIABLE DECLARATIONS
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==================================================================================================*/
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#define CAN_START_SEC_VAR_INIT_UNSPECIFIED
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#include "Can_MemMap.h"
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/* FlexCAN State Structure used By driver
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User should not modify this structure */
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Flexcan_Ip_StateType FlexCAN_State0;
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/* FlexCAN State Structure used By driver
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User should not modify this structure */
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Flexcan_Ip_StateType FlexCAN_State1;
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/* FlexCAN State Structure used By driver
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User should not modify this structure */
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Flexcan_Ip_StateType FlexCAN_State2;
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/* FlexCAN State Structure used By driver
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User should not modify this structure */
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Flexcan_Ip_StateType FlexCAN_State3;
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/* FlexCAN State Structure used By driver
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User should not modify this structure */
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Flexcan_Ip_StateType FlexCAN_State4;
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/* FlexCAN State Structure used By driver
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User should not modify this structure */
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Flexcan_Ip_StateType FlexCAN_State5;
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#define CAN_STOP_SEC_VAR_INIT_UNSPECIFIED
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#include "Can_MemMap.h"
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/*==================================================================================================
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* GLOBAL CONSTANTS
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==================================================================================================*/
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#define CAN_START_SEC_CONFIG_DATA_UNSPECIFIED
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#include "Can_MemMap.h"
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const Flexcan_Ip_ConfigType FlexCAN_Config0 = {
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/* Number Of Message Buffer used .max_num_mb */
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(uint8)24,
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/*Can Hw filter count* .num_id_filters*- aici exista variatna sa generez toate filtrele si sa referentiezi tu in cod */
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FLEXCAN_RX_FIFO_ID_FILTERS_8,
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/* Legacy FIFO ENABLED .is_rx_fifo_needed*/
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(boolean)FALSE,
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#if (FEATURE_CAN_HAS_ENHANCED_RX_FIFO == STD_ON)
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/* The number of standard ID filter elements */
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2U,
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/* The number of extended ID filter elements */
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1U,
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/* The number of enhanced Rx FIFO watermark */
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0U,
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/* The Enhanced Rx FIFO feature is enabled or not. */
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(boolean)TRUE,
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#endif
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#if (FEATURE_CAN_HAS_HR_TIMER == STD_ON)
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/* TimeStamp Structure Configuration */
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{
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/* timeStampSurce Timer Source */
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FLEXCAN_CAN_CLK_TIMESTAMP_SRC,
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/* msgBuffTimeStampType Timestamp MB Type */
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FLEXCAN_MSGBUFFTIMESTAMP_TIMER,
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/* hrConfigType Timestamp HR capture configuration */
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FLEXCAN_TIMESTAMPCAPTURE_DISABLE,
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/* hrSrc HT Timer Source */
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FLEXCAN_HRTIMERSRC_MAC,
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},
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#endif
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FLEXCAN_NORMAL_MODE,
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/*ctrlOptions*/
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(uint32)(CAN_FD_ISO_U32 | \
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CAN_BUSOFF_RECOVERY_U32 | \
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0U),
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/* Can FD RamBlock specified *//*.payload*/
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{
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FLEXCAN_PAYLOAD_SIZE_32,
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FLEXCAN_PAYLOAD_SIZE_32,
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FLEXCAN_PAYLOAD_SIZE_32
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},
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/*Can FD enabled .fd_enable*/
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(boolean)TRUE,
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/*Enhance CBT support . extCbtEnable*/
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(boolean)TRUE,
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/*BRS for FD .bitRateSwitch*/
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(boolean)TRUE,
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/*values for normal baudrate .bitrate*/
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{ /* Prop Seg */
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(20U),
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/* Phase Seg 1 */
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(41U),
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/* Phase Seg 2*/
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(15U),
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/* Pre Divider */
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(1U),
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/* Resync jump width */
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(14U)
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},
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/*values for FD baudrate .bitrate*/
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{ /* Prop Seg */
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(10U),
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/* Phase Seg 1 */
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(3U),
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/* Phase Seg 2*/
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(4U),
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/* Pre Divider */
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(1U),
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/* Resync jump width */
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(4U)
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},
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/*transfer_type*/
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FLEXCAN_RXFIFO_USING_INTERRUPTS,
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#if (FEATURE_CAN_HAS_DMA_ENABLE == STD_ON)
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/* DMA channel number used for transfers. */
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0,
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#endif
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/* Controller Callback */
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CAN0_Callback,
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/* Error Callback */
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CAN0_ErrCallback
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};
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const Flexcan_Ip_ConfigType FlexCAN_Config1 = {
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/* Number Of Message Buffer used .max_num_mb */
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(uint8)24,
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/*Can Hw filter count* .num_id_filters*- aici exista variatna sa generez toate filtrele si sa referentiezi tu in cod */
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FLEXCAN_RX_FIFO_ID_FILTERS_8,
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/* Legacy FIFO ENABLED .is_rx_fifo_needed*/
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(boolean)FALSE,
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#if (FEATURE_CAN_HAS_ENHANCED_RX_FIFO == STD_ON)
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/* The number of standard ID filter elements */
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0U,
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/* The number of extended ID filter elements */
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0U,
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/* The number of enhanced Rx FIFO watermark */
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0U,
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/* The Enhanced Rx FIFO feature is enabled or not. */
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(boolean)FALSE,
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#endif
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#if (FEATURE_CAN_HAS_HR_TIMER == STD_ON)
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/* TimeStamp Structure Configuration */
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{
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/* timeStampSurce Timer Source */
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FLEXCAN_CAN_CLK_TIMESTAMP_SRC,
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/* msgBuffTimeStampType Timestamp MB Type */
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FLEXCAN_MSGBUFFTIMESTAMP_TIMER,
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/* hrConfigType Timestamp HR capture configuration */
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FLEXCAN_TIMESTAMPCAPTURE_DISABLE,
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/* hrSrc HT Timer Source */
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FLEXCAN_HRTIMERSRC_MAC,
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},
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#endif
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FLEXCAN_NORMAL_MODE,
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/*ctrlOptions*/
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(uint32)(CAN_FD_ISO_U32 | \
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CAN_BUSOFF_RECOVERY_U32 | \
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0U),
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/* Can FD RamBlock specified *//*.payload*/
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{
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FLEXCAN_PAYLOAD_SIZE_32,
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FLEXCAN_PAYLOAD_SIZE_32,
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FLEXCAN_PAYLOAD_SIZE_32
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},
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/*Can FD enabled .fd_enable*/
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(boolean)TRUE,
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/*Enhance CBT support . extCbtEnable*/
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(boolean)TRUE,
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/*BRS for FD .bitRateSwitch*/
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(boolean)TRUE,
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/*values for normal baudrate .bitrate*/
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{ /* Prop Seg */
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(20U),
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/* Phase Seg 1 */
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(41U),
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/* Phase Seg 2*/
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(15U),
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/* Pre Divider */
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(1U),
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/* Resync jump width */
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(14U)
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},
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/*values for FD baudrate .bitrate*/
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{ /* Prop Seg */
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(10U),
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/* Phase Seg 1 */
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(3U),
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/* Phase Seg 2*/
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(4U),
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/* Pre Divider */
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(1U),
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/* Resync jump width */
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(4U)
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},
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/*transfer_type*/
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FLEXCAN_RXFIFO_USING_INTERRUPTS,
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#if (FEATURE_CAN_HAS_DMA_ENABLE == STD_ON)
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/* DMA channel number used for transfers. */
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0,
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#endif
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/* Controller Callback */
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CAN1_Callback,
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/* Error Callback */
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CAN1_ErrCallback
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};
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const Flexcan_Ip_ConfigType FlexCAN_Config2 = {
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/* Number Of Message Buffer used .max_num_mb */
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(uint8)24,
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/*Can Hw filter count* .num_id_filters*- aici exista variatna sa generez toate filtrele si sa referentiezi tu in cod */
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FLEXCAN_RX_FIFO_ID_FILTERS_8,
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/* Legacy FIFO ENABLED .is_rx_fifo_needed*/
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(boolean)FALSE,
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#if (FEATURE_CAN_HAS_ENHANCED_RX_FIFO == STD_ON)
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/* The number of standard ID filter elements */
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0U,
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/* The number of extended ID filter elements */
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0U,
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/* The number of enhanced Rx FIFO watermark */
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0U,
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/* The Enhanced Rx FIFO feature is enabled or not. */
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(boolean)FALSE,
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#endif
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#if (FEATURE_CAN_HAS_HR_TIMER == STD_ON)
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/* TimeStamp Structure Configuration */
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{
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/* timeStampSurce Timer Source */
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FLEXCAN_CAN_CLK_TIMESTAMP_SRC,
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/* msgBuffTimeStampType Timestamp MB Type */
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FLEXCAN_MSGBUFFTIMESTAMP_TIMER,
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/* hrConfigType Timestamp HR capture configuration */
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FLEXCAN_TIMESTAMPCAPTURE_DISABLE,
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/* hrSrc HT Timer Source */
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FLEXCAN_HRTIMERSRC_MAC,
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},
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#endif
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FLEXCAN_NORMAL_MODE,
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/*ctrlOptions*/
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(uint32)(CAN_FD_ISO_U32 | \
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CAN_BUSOFF_RECOVERY_U32 | \
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0U),
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/* Can FD RamBlock specified *//*.payload*/
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{
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FLEXCAN_PAYLOAD_SIZE_8,
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FLEXCAN_PAYLOAD_SIZE_8,
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FLEXCAN_PAYLOAD_SIZE_8
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},
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/*Can FD enabled .fd_enable*/
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(boolean)TRUE,
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/*Enhance CBT support . extCbtEnable*/
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(boolean)TRUE,
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/*BRS for FD .bitRateSwitch*/
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(boolean)TRUE,
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/*values for normal baudrate .bitrate*/
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{ /* Prop Seg */
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(20U),
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/* Phase Seg 1 */
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(41U),
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/* Phase Seg 2*/
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(15U),
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/* Pre Divider */
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(0U),
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/* Resync jump width */
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(14U)
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},
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/*values for FD baudrate .bitrate*/
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{ /* Prop Seg */
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(10U),
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/* Phase Seg 1 */
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(3U),
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/* Phase Seg 2*/
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(4U),
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/* Pre Divider */
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(1U),
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/* Resync jump width */
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(4U)
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},
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/*transfer_type*/
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FLEXCAN_RXFIFO_USING_INTERRUPTS,
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#if (FEATURE_CAN_HAS_DMA_ENABLE == STD_ON)
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/* DMA channel number used for transfers. */
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0,
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#endif
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/* Controller Callback */
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CAN2_Callback,
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/* Error Callback */
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CAN2_ErrCallback
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};
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const Flexcan_Ip_ConfigType FlexCAN_Config3 = {
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/* Number Of Message Buffer used .max_num_mb */
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(uint8)24,
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/*Can Hw filter count* .num_id_filters*- aici exista variatna sa generez toate filtrele si sa referentiezi tu in cod */
|
|
FLEXCAN_RX_FIFO_ID_FILTERS_8,
|
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/* Legacy FIFO ENABLED .is_rx_fifo_needed*/
|
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(boolean)FALSE,
|
|
#if (FEATURE_CAN_HAS_ENHANCED_RX_FIFO == STD_ON)
|
|
/* The number of standard ID filter elements */
|
|
0U,
|
|
/* The number of extended ID filter elements */
|
|
0U,
|
|
/* The number of enhanced Rx FIFO watermark */
|
|
0U,
|
|
/* The Enhanced Rx FIFO feature is enabled or not. */
|
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(boolean)FALSE,
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#endif
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#if (FEATURE_CAN_HAS_HR_TIMER == STD_ON)
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/* TimeStamp Structure Configuration */
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{
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/* timeStampSurce Timer Source */
|
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FLEXCAN_CAN_CLK_TIMESTAMP_SRC,
|
|
/* msgBuffTimeStampType Timestamp MB Type */
|
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FLEXCAN_MSGBUFFTIMESTAMP_TIMER,
|
|
/* hrConfigType Timestamp HR capture configuration */
|
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FLEXCAN_TIMESTAMPCAPTURE_DISABLE,
|
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/* hrSrc HT Timer Source */
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FLEXCAN_HRTIMERSRC_MAC,
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},
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#endif
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FLEXCAN_NORMAL_MODE,
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/*ctrlOptions*/
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|
(uint32)(CAN_FD_ISO_U32 | \
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CAN_BUSOFF_RECOVERY_U32 | \
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|
0U),
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|
/* Can FD RamBlock specified *//*.payload*/
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|
{
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FLEXCAN_PAYLOAD_SIZE_8,
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FLEXCAN_PAYLOAD_SIZE_8,
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FLEXCAN_PAYLOAD_SIZE_8
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},
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/*Can FD enabled .fd_enable*/
|
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(boolean)TRUE,
|
|
/*Enhance CBT support . extCbtEnable*/
|
|
(boolean)TRUE,
|
|
/*BRS for FD .bitRateSwitch*/
|
|
(boolean)TRUE,
|
|
/*values for normal baudrate .bitrate*/
|
|
{ /* Prop Seg */
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|
(20U),
|
|
/* Phase Seg 1 */
|
|
(41U),
|
|
/* Phase Seg 2*/
|
|
(15U),
|
|
/* Pre Divider */
|
|
(0U),
|
|
/* Resync jump width */
|
|
(14U)
|
|
},
|
|
/*values for FD baudrate .bitrate*/
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|
{ /* Prop Seg */
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|
(10U),
|
|
/* Phase Seg 1 */
|
|
(3U),
|
|
/* Phase Seg 2*/
|
|
(4U),
|
|
/* Pre Divider */
|
|
(1U),
|
|
/* Resync jump width */
|
|
(4U)
|
|
},
|
|
/*transfer_type*/
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|
FLEXCAN_RXFIFO_USING_INTERRUPTS,
|
|
#if (FEATURE_CAN_HAS_DMA_ENABLE == STD_ON)
|
|
/* DMA channel number used for transfers. */
|
|
0,
|
|
#endif
|
|
/* Controller Callback */
|
|
CAN3_Callback,
|
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/* Error Callback */
|
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CAN3_ErrCallback
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|
};
|
|
const Flexcan_Ip_ConfigType FlexCAN_Config4 = {
|
|
/* Number Of Message Buffer used .max_num_mb */
|
|
(uint8)24,
|
|
/*Can Hw filter count* .num_id_filters*- aici exista variatna sa generez toate filtrele si sa referentiezi tu in cod */
|
|
FLEXCAN_RX_FIFO_ID_FILTERS_8,
|
|
/* Legacy FIFO ENABLED .is_rx_fifo_needed*/
|
|
(boolean)FALSE,
|
|
#if (FEATURE_CAN_HAS_ENHANCED_RX_FIFO == STD_ON)
|
|
/* The number of standard ID filter elements */
|
|
0U,
|
|
/* The number of extended ID filter elements */
|
|
0U,
|
|
/* The number of enhanced Rx FIFO watermark */
|
|
0U,
|
|
/* The Enhanced Rx FIFO feature is enabled or not. */
|
|
(boolean)FALSE,
|
|
#endif
|
|
#if (FEATURE_CAN_HAS_HR_TIMER == STD_ON)
|
|
/* TimeStamp Structure Configuration */
|
|
{
|
|
/* timeStampSurce Timer Source */
|
|
FLEXCAN_CAN_CLK_TIMESTAMP_SRC,
|
|
/* msgBuffTimeStampType Timestamp MB Type */
|
|
FLEXCAN_MSGBUFFTIMESTAMP_TIMER,
|
|
/* hrConfigType Timestamp HR capture configuration */
|
|
FLEXCAN_TIMESTAMPCAPTURE_DISABLE,
|
|
/* hrSrc HT Timer Source */
|
|
FLEXCAN_HRTIMERSRC_MAC,
|
|
},
|
|
#endif
|
|
FLEXCAN_NORMAL_MODE,
|
|
/*ctrlOptions*/
|
|
(uint32)(CAN_FD_ISO_U32 | \
|
|
CAN_BUSOFF_RECOVERY_U32 | \
|
|
0U),
|
|
/* Can FD RamBlock specified *//*.payload*/
|
|
{
|
|
FLEXCAN_PAYLOAD_SIZE_8,
|
|
FLEXCAN_PAYLOAD_SIZE_8,
|
|
FLEXCAN_PAYLOAD_SIZE_8
|
|
},
|
|
/*Can FD enabled .fd_enable*/
|
|
(boolean)TRUE,
|
|
/*Enhance CBT support . extCbtEnable*/
|
|
(boolean)TRUE,
|
|
/*BRS for FD .bitRateSwitch*/
|
|
(boolean)TRUE,
|
|
/*values for normal baudrate .bitrate*/
|
|
{ /* Prop Seg */
|
|
(20U),
|
|
/* Phase Seg 1 */
|
|
(41U),
|
|
/* Phase Seg 2*/
|
|
(15U),
|
|
/* Pre Divider */
|
|
(0U),
|
|
/* Resync jump width */
|
|
(14U)
|
|
},
|
|
/*values for FD baudrate .bitrate*/
|
|
{ /* Prop Seg */
|
|
(10U),
|
|
/* Phase Seg 1 */
|
|
(3U),
|
|
/* Phase Seg 2*/
|
|
(4U),
|
|
/* Pre Divider */
|
|
(1U),
|
|
/* Resync jump width */
|
|
(4U)
|
|
},
|
|
/*transfer_type*/
|
|
FLEXCAN_RXFIFO_USING_INTERRUPTS,
|
|
#if (FEATURE_CAN_HAS_DMA_ENABLE == STD_ON)
|
|
/* DMA channel number used for transfers. */
|
|
0,
|
|
#endif
|
|
/* Controller Callback */
|
|
CAN4_Callback,
|
|
/* Error Callback */
|
|
CAN4_ErrCallback
|
|
};
|
|
const Flexcan_Ip_ConfigType FlexCAN_Config5 = {
|
|
/* Number Of Message Buffer used .max_num_mb */
|
|
(uint8)24,
|
|
/*Can Hw filter count* .num_id_filters*- aici exista variatna sa generez toate filtrele si sa referentiezi tu in cod */
|
|
FLEXCAN_RX_FIFO_ID_FILTERS_8,
|
|
/* Legacy FIFO ENABLED .is_rx_fifo_needed*/
|
|
(boolean)FALSE,
|
|
#if (FEATURE_CAN_HAS_ENHANCED_RX_FIFO == STD_ON)
|
|
/* The number of standard ID filter elements */
|
|
0U,
|
|
/* The number of extended ID filter elements */
|
|
0U,
|
|
/* The number of enhanced Rx FIFO watermark */
|
|
0U,
|
|
/* The Enhanced Rx FIFO feature is enabled or not. */
|
|
(boolean)FALSE,
|
|
#endif
|
|
#if (FEATURE_CAN_HAS_HR_TIMER == STD_ON)
|
|
/* TimeStamp Structure Configuration */
|
|
{
|
|
/* timeStampSurce Timer Source */
|
|
FLEXCAN_CAN_CLK_TIMESTAMP_SRC,
|
|
/* msgBuffTimeStampType Timestamp MB Type */
|
|
FLEXCAN_MSGBUFFTIMESTAMP_TIMER,
|
|
/* hrConfigType Timestamp HR capture configuration */
|
|
FLEXCAN_TIMESTAMPCAPTURE_DISABLE,
|
|
/* hrSrc HT Timer Source */
|
|
FLEXCAN_HRTIMERSRC_MAC,
|
|
},
|
|
#endif
|
|
FLEXCAN_NORMAL_MODE,
|
|
/*ctrlOptions*/
|
|
(uint32)(CAN_FD_ISO_U32 | \
|
|
CAN_BUSOFF_RECOVERY_U32 | \
|
|
0U),
|
|
/* Can FD RamBlock specified *//*.payload*/
|
|
{
|
|
FLEXCAN_PAYLOAD_SIZE_8,
|
|
FLEXCAN_PAYLOAD_SIZE_8,
|
|
FLEXCAN_PAYLOAD_SIZE_8
|
|
},
|
|
/*Can FD enabled .fd_enable*/
|
|
(boolean)TRUE,
|
|
/*Enhance CBT support . extCbtEnable*/
|
|
(boolean)TRUE,
|
|
/*BRS for FD .bitRateSwitch*/
|
|
(boolean)TRUE,
|
|
/*values for normal baudrate .bitrate*/
|
|
{ /* Prop Seg */
|
|
(20U),
|
|
/* Phase Seg 1 */
|
|
(41U),
|
|
/* Phase Seg 2*/
|
|
(15U),
|
|
/* Pre Divider */
|
|
(0U),
|
|
/* Resync jump width */
|
|
(14U)
|
|
},
|
|
/*values for FD baudrate .bitrate*/
|
|
{ /* Prop Seg */
|
|
(10U),
|
|
/* Phase Seg 1 */
|
|
(3U),
|
|
/* Phase Seg 2*/
|
|
(4U),
|
|
/* Pre Divider */
|
|
(1U),
|
|
/* Resync jump width */
|
|
(4U)
|
|
},
|
|
/*transfer_type*/
|
|
FLEXCAN_RXFIFO_USING_INTERRUPTS,
|
|
#if (FEATURE_CAN_HAS_DMA_ENABLE == STD_ON)
|
|
/* DMA channel number used for transfers. */
|
|
0,
|
|
#endif
|
|
/* Controller Callback */
|
|
CAN5_Callback,
|
|
/* Error Callback */
|
|
CAN5_ErrCallback
|
|
};
|
|
|
|
#define CAN_STOP_SEC_CONFIG_DATA_UNSPECIFIED
|
|
#include "Can_MemMap.h"
|
|
|
|
#ifdef __cplusplus
|
|
}
|
|
#endif
|
|
/** @} */
|
|
|