/*==================================================================================================
*   Project              : RTD AUTOSAR 4.4
*   Platform             : CORTEXM
*   Peripheral           : FLEXCAN
*   Dependencies         : 
*
*   Autosar Version      : 4.4.0
*   Autosar Revision     : ASR_REL_4_4_REV_0000
*   Autosar Conf.Variant :
*   SW Version           : 0.9.0
*   Build Version        : S32K3_RTD_0_9_0__ASR_REL_4_4_REV_0000_20210326
*
*   (c) Copyright 2020 - 2021 NXP Semiconductors
*   All Rights Reserved.
*
*   NXP Confidential. This software is owned or controlled by NXP and may only be
*   used strictly in accordance with the applicable license terms. By expressly
*   accepting such terms or by downloading, installing, activating and/or otherwise
*   using the software, you are agreeing that you have read, and that you agree to
*   comply with and are bound by, such license terms. If you do not agree to be
*   bound by the applicable license terms, then you may not retain, install,
*   activate or otherwise use the software.
==================================================================================================*/
/***********************************************************************************************************************
 * This file was generated by the S32 Configuration Tools. Any manual edits made to this file
 * will be overwritten if the respective S32 Configuration Tools is used to update this file.
 **********************************************************************************************************************/

#ifdef __cplusplus
extern "C"{
#endif

/*==================================================================================================
*                                        INCLUDE FILES
* 1) system and project includes
* 2) needed interfaces from external units
* 3) internal and external interfaces from this unit
==================================================================================================*/
#include "FlexCAN_Ip_Sa_BOARD_InitPeripherals_PBcfg.h"
#include "FlexCAN_Ip_Types.h"
#if (FEATURE_CAN_HAS_DMA_ENABLE == STD_ON)
    #include "Dma_Ip.h"
#endif
/*==================================================================================================
*                              SOURCE FILE VERSION INFORMATION
==================================================================================================*/
#define FLEXCAN_IP_VENDOR_ID_BOARD_InitPeripherals_PBCFG_C 43
#define FLEXCAN_IP_AR_RELEASE_MAJOR_VERSION_BOARD_InitPeripherals_PBCFG_C 4
#define FLEXCAN_IP_AR_RELEASE_MINOR_VERSION_BOARD_InitPeripherals_PBCFG_C 4
#define FLEXCAN_IP_AR_RELEASE_REVISION_VERSION_BOARD_InitPeripherals_PBCFG_C 0
#define FLEXCAN_IP_SW_MAJOR_VERSION_BOARD_InitPeripherals_PBCFG_C 0
#define FLEXCAN_IP_SW_MINOR_VERSION_BOARD_InitPeripherals_PBCFG_C 9
#define FLEXCAN_IP_SW_PATCH_VERSION_BOARD_InitPeripherals_PBCFG_C 0
/*==================================================================================================
*                                     FILE VERSION CHECKS
==================================================================================================*/
/* TODO: */

/*==================================================================================================
*                                   GLOBAL FUNCTION PROTOTYPES
==================================================================================================*/
#define CAN_START_SEC_CODE
#include "Can_MemMap.h"

extern void CAN0_Callback(uint8 instance, Flexcan_Ip_EventType eventType,
                  uint32 buffIdx, const Flexcan_Ip_StateType * flexcanState);
extern void CAN0_ErrCallback(uint8 instance, Flexcan_Ip_EventType eventType,
                                              uint32 u32ErrStatus,
                                              const Flexcan_Ip_StateType * flexcanState);
extern void CAN1_Callback(uint8 instance, Flexcan_Ip_EventType eventType,
                  uint32 buffIdx, const Flexcan_Ip_StateType * flexcanState);
extern void CAN1_ErrCallback(uint8 instance, Flexcan_Ip_EventType eventType,
                                              uint32 u32ErrStatus,
                                              const Flexcan_Ip_StateType * flexcanState);
extern void CAN2_Callback(uint8 instance, Flexcan_Ip_EventType eventType,
                  uint32 buffIdx, const Flexcan_Ip_StateType * flexcanState);
extern void CAN2_ErrCallback(uint8 instance, Flexcan_Ip_EventType eventType,
                                              uint32 u32ErrStatus,
                                              const Flexcan_Ip_StateType * flexcanState);
extern void CAN3_Callback(uint8 instance, Flexcan_Ip_EventType eventType,
                  uint32 buffIdx, const Flexcan_Ip_StateType * flexcanState);
extern void CAN3_ErrCallback(uint8 instance, Flexcan_Ip_EventType eventType,
                                              uint32 u32ErrStatus,
                                              const Flexcan_Ip_StateType * flexcanState);
extern void CAN4_Callback(uint8 instance, Flexcan_Ip_EventType eventType,
                  uint32 buffIdx, const Flexcan_Ip_StateType * flexcanState);
extern void CAN4_ErrCallback(uint8 instance, Flexcan_Ip_EventType eventType,
                                              uint32 u32ErrStatus,
                                              const Flexcan_Ip_StateType * flexcanState);
extern void CAN5_Callback(uint8 instance, Flexcan_Ip_EventType eventType,
                  uint32 buffIdx, const Flexcan_Ip_StateType * flexcanState);
extern void CAN5_ErrCallback(uint8 instance, Flexcan_Ip_EventType eventType,
                                              uint32 u32ErrStatus,
                                              const Flexcan_Ip_StateType * flexcanState);
#define CAN_STOP_SEC_CODE
#include "Can_MemMap.h"
/*==================================================================================================
*                                GLOBAL VARIABLE DECLARATIONS
==================================================================================================*/
#define CAN_START_SEC_VAR_INIT_UNSPECIFIED
#include "Can_MemMap.h"
/* FlexCAN State Structure used By driver
User should not modify this structure */
Flexcan_Ip_StateType FlexCAN_State0;
/* FlexCAN State Structure used By driver
User should not modify this structure */
Flexcan_Ip_StateType FlexCAN_State1;
/* FlexCAN State Structure used By driver
User should not modify this structure */
Flexcan_Ip_StateType FlexCAN_State2;
/* FlexCAN State Structure used By driver
User should not modify this structure */
Flexcan_Ip_StateType FlexCAN_State3;
/* FlexCAN State Structure used By driver
User should not modify this structure */
Flexcan_Ip_StateType FlexCAN_State4;
/* FlexCAN State Structure used By driver
User should not modify this structure */
Flexcan_Ip_StateType FlexCAN_State5;
#define CAN_STOP_SEC_VAR_INIT_UNSPECIFIED
#include "Can_MemMap.h"
/*==================================================================================================
*                                      GLOBAL CONSTANTS
==================================================================================================*/
#define CAN_START_SEC_CONFIG_DATA_UNSPECIFIED
#include "Can_MemMap.h"

const Flexcan_Ip_ConfigType FlexCAN_Config0  = {
    /* Number Of Message Buffer used .max_num_mb  */
    (uint8)24,
    /*Can Hw filter count* .num_id_filters*- aici exista variatna sa generez toate filtrele si sa referentiezi tu in cod */
    FLEXCAN_RX_FIFO_ID_FILTERS_8,
    /* Legacy FIFO ENABLED .is_rx_fifo_needed*/
    (boolean)FALSE,
#if (FEATURE_CAN_HAS_ENHANCED_RX_FIFO == STD_ON)
    /* The number of standard ID filter elements */
    2U,
    /* The number of extended ID filter elements */
    1U,
    /* The number of enhanced Rx FIFO watermark */
    0U,
    /* The Enhanced Rx FIFO feature is enabled or not. */
    (boolean)TRUE,
#endif
#if (FEATURE_CAN_HAS_HR_TIMER == STD_ON)
    /* TimeStamp Structure Configuration */
    {
        /* timeStampSurce Timer Source */
        FLEXCAN_CAN_CLK_TIMESTAMP_SRC,
        /* msgBuffTimeStampType Timestamp MB Type  */
        FLEXCAN_MSGBUFFTIMESTAMP_TIMER,
        /* hrConfigType Timestamp HR capture configuration */
        FLEXCAN_TIMESTAMPCAPTURE_DISABLE,
        /* hrSrc HT Timer Source */
        FLEXCAN_HRTIMERSRC_MAC,
    },
#endif
    FLEXCAN_NORMAL_MODE,
     /*ctrlOptions*/
    (uint32)(CAN_FD_ISO_U32 | \
    CAN_BUSOFF_RECOVERY_U32 | \
    0U),
     /* Can FD RamBlock specified *//*.payload*/
    {
      FLEXCAN_PAYLOAD_SIZE_32,
      FLEXCAN_PAYLOAD_SIZE_32,
      FLEXCAN_PAYLOAD_SIZE_32
    },
        /*Can FD enabled .fd_enable*/
        (boolean)TRUE,
        /*Enhance CBT support . extCbtEnable*/
        (boolean)TRUE,
        /*BRS for FD .bitRateSwitch*/
        (boolean)TRUE,
        /*values for normal baudrate .bitrate*/
        {   /* Prop Seg */
            (20U),
            /* Phase Seg 1 */
            (41U),
            /* Phase Seg 2*/
            (15U),
            /* Pre Divider */
            (1U),
            /* Resync jump width */
            (14U)
        },
            /*values for FD baudrate .bitrate*/
        {   /* Prop Seg */
            (10U),
            /* Phase Seg 1 */
            (3U),
            /* Phase Seg 2*/
            (4U),
            /* Pre Divider */
            (1U),
            /* Resync jump width */
            (4U)
        },
        /*transfer_type*/
        FLEXCAN_RXFIFO_USING_INTERRUPTS,
#if (FEATURE_CAN_HAS_DMA_ENABLE == STD_ON)
     /* DMA channel number used for transfers. */
        0,
  #endif
    /* Controller Callback */
    CAN0_Callback,
    /* Error Callback */
    CAN0_ErrCallback
    };
    const Flexcan_Ip_ConfigType FlexCAN_Config1  = {
    /* Number Of Message Buffer used .max_num_mb  */
    (uint8)24,
    /*Can Hw filter count* .num_id_filters*- aici exista variatna sa generez toate filtrele si sa referentiezi tu in cod */
    FLEXCAN_RX_FIFO_ID_FILTERS_8,
    /* Legacy FIFO ENABLED .is_rx_fifo_needed*/
    (boolean)FALSE,
#if (FEATURE_CAN_HAS_ENHANCED_RX_FIFO == STD_ON)
    /* The number of standard ID filter elements */
    0U,
    /* The number of extended ID filter elements */
    0U,
    /* The number of enhanced Rx FIFO watermark */
    0U,
    /* The Enhanced Rx FIFO feature is enabled or not. */
    (boolean)FALSE,
#endif
#if (FEATURE_CAN_HAS_HR_TIMER == STD_ON)
    /* TimeStamp Structure Configuration */
    {
        /* timeStampSurce Timer Source */
        FLEXCAN_CAN_CLK_TIMESTAMP_SRC,
        /* msgBuffTimeStampType Timestamp MB Type  */
        FLEXCAN_MSGBUFFTIMESTAMP_TIMER,
        /* hrConfigType Timestamp HR capture configuration */
        FLEXCAN_TIMESTAMPCAPTURE_DISABLE,
        /* hrSrc HT Timer Source */
        FLEXCAN_HRTIMERSRC_MAC,
    },
#endif
    FLEXCAN_NORMAL_MODE,
     /*ctrlOptions*/
    (uint32)(CAN_FD_ISO_U32 | \
    CAN_BUSOFF_RECOVERY_U32 | \
    0U),
     /* Can FD RamBlock specified *//*.payload*/
    {
      FLEXCAN_PAYLOAD_SIZE_32,
      FLEXCAN_PAYLOAD_SIZE_32,
      FLEXCAN_PAYLOAD_SIZE_32
    },
        /*Can FD enabled .fd_enable*/
        (boolean)TRUE,
        /*Enhance CBT support . extCbtEnable*/
        (boolean)TRUE,
        /*BRS for FD .bitRateSwitch*/
        (boolean)TRUE,
        /*values for normal baudrate .bitrate*/
        {   /* Prop Seg */
            (20U),
            /* Phase Seg 1 */
            (41U),
            /* Phase Seg 2*/
            (15U),
            /* Pre Divider */
            (1U),
            /* Resync jump width */
            (14U)
        },
            /*values for FD baudrate .bitrate*/
        {   /* Prop Seg */
            (10U),
            /* Phase Seg 1 */
            (3U),
            /* Phase Seg 2*/
            (4U),
            /* Pre Divider */
            (1U),
            /* Resync jump width */
            (4U)
        },
        /*transfer_type*/
        FLEXCAN_RXFIFO_USING_INTERRUPTS,
#if (FEATURE_CAN_HAS_DMA_ENABLE == STD_ON)
     /* DMA channel number used for transfers. */
        0,
  #endif
    /* Controller Callback */
    CAN1_Callback,
    /* Error Callback */
    CAN1_ErrCallback
    };
    const Flexcan_Ip_ConfigType FlexCAN_Config2  = {
    /* Number Of Message Buffer used .max_num_mb  */
    (uint8)24,
    /*Can Hw filter count* .num_id_filters*- aici exista variatna sa generez toate filtrele si sa referentiezi tu in cod */
    FLEXCAN_RX_FIFO_ID_FILTERS_8,
    /* Legacy FIFO ENABLED .is_rx_fifo_needed*/
    (boolean)FALSE,
#if (FEATURE_CAN_HAS_ENHANCED_RX_FIFO == STD_ON)
    /* The number of standard ID filter elements */
    0U,
    /* The number of extended ID filter elements */
    0U,
    /* The number of enhanced Rx FIFO watermark */
    0U,
    /* The Enhanced Rx FIFO feature is enabled or not. */
    (boolean)FALSE,
#endif
#if (FEATURE_CAN_HAS_HR_TIMER == STD_ON)
    /* TimeStamp Structure Configuration */
    {
        /* timeStampSurce Timer Source */
        FLEXCAN_CAN_CLK_TIMESTAMP_SRC,
        /* msgBuffTimeStampType Timestamp MB Type  */
        FLEXCAN_MSGBUFFTIMESTAMP_TIMER,
        /* hrConfigType Timestamp HR capture configuration */
        FLEXCAN_TIMESTAMPCAPTURE_DISABLE,
        /* hrSrc HT Timer Source */
        FLEXCAN_HRTIMERSRC_MAC,
    },
#endif
    FLEXCAN_NORMAL_MODE,
     /*ctrlOptions*/
    (uint32)(CAN_FD_ISO_U32 | \
    CAN_BUSOFF_RECOVERY_U32 | \
    0U),
     /* Can FD RamBlock specified *//*.payload*/
    {
      FLEXCAN_PAYLOAD_SIZE_8,
      FLEXCAN_PAYLOAD_SIZE_8,
      FLEXCAN_PAYLOAD_SIZE_8
    },
        /*Can FD enabled .fd_enable*/
        (boolean)TRUE,
        /*Enhance CBT support . extCbtEnable*/
        (boolean)TRUE,
        /*BRS for FD .bitRateSwitch*/
        (boolean)TRUE,
        /*values for normal baudrate .bitrate*/
        {   /* Prop Seg */
            (20U),
            /* Phase Seg 1 */
            (41U),
            /* Phase Seg 2*/
            (15U),
            /* Pre Divider */
            (0U),
            /* Resync jump width */
            (14U)
        },
            /*values for FD baudrate .bitrate*/
        {   /* Prop Seg */
            (10U),
            /* Phase Seg 1 */
            (3U),
            /* Phase Seg 2*/
            (4U),
            /* Pre Divider */
            (1U),
            /* Resync jump width */
            (4U)
        },
        /*transfer_type*/
        FLEXCAN_RXFIFO_USING_INTERRUPTS,
#if (FEATURE_CAN_HAS_DMA_ENABLE == STD_ON)
     /* DMA channel number used for transfers. */
        0,
  #endif
    /* Controller Callback */
    CAN2_Callback,
    /* Error Callback */
    CAN2_ErrCallback
    };
    const Flexcan_Ip_ConfigType FlexCAN_Config3  = {
    /* Number Of Message Buffer used .max_num_mb  */
    (uint8)24,
    /*Can Hw filter count* .num_id_filters*- aici exista variatna sa generez toate filtrele si sa referentiezi tu in cod */
    FLEXCAN_RX_FIFO_ID_FILTERS_8,
    /* Legacy FIFO ENABLED .is_rx_fifo_needed*/
    (boolean)FALSE,
#if (FEATURE_CAN_HAS_ENHANCED_RX_FIFO == STD_ON)
    /* The number of standard ID filter elements */
    0U,
    /* The number of extended ID filter elements */
    0U,
    /* The number of enhanced Rx FIFO watermark */
    0U,
    /* The Enhanced Rx FIFO feature is enabled or not. */
    (boolean)FALSE,
#endif
#if (FEATURE_CAN_HAS_HR_TIMER == STD_ON)
    /* TimeStamp Structure Configuration */
    {
        /* timeStampSurce Timer Source */
        FLEXCAN_CAN_CLK_TIMESTAMP_SRC,
        /* msgBuffTimeStampType Timestamp MB Type  */
        FLEXCAN_MSGBUFFTIMESTAMP_TIMER,
        /* hrConfigType Timestamp HR capture configuration */
        FLEXCAN_TIMESTAMPCAPTURE_DISABLE,
        /* hrSrc HT Timer Source */
        FLEXCAN_HRTIMERSRC_MAC,
    },
#endif
    FLEXCAN_NORMAL_MODE,
     /*ctrlOptions*/
    (uint32)(CAN_FD_ISO_U32 | \
    CAN_BUSOFF_RECOVERY_U32 | \
    0U),
     /* Can FD RamBlock specified *//*.payload*/
    {
      FLEXCAN_PAYLOAD_SIZE_8,
      FLEXCAN_PAYLOAD_SIZE_8,
      FLEXCAN_PAYLOAD_SIZE_8
    },
        /*Can FD enabled .fd_enable*/
        (boolean)TRUE,
        /*Enhance CBT support . extCbtEnable*/
        (boolean)TRUE,
        /*BRS for FD .bitRateSwitch*/
        (boolean)TRUE,
        /*values for normal baudrate .bitrate*/
        {   /* Prop Seg */
            (20U),
            /* Phase Seg 1 */
            (41U),
            /* Phase Seg 2*/
            (15U),
            /* Pre Divider */
            (0U),
            /* Resync jump width */
            (14U)
        },
            /*values for FD baudrate .bitrate*/
        {   /* Prop Seg */
            (10U),
            /* Phase Seg 1 */
            (3U),
            /* Phase Seg 2*/
            (4U),
            /* Pre Divider */
            (1U),
            /* Resync jump width */
            (4U)
        },
        /*transfer_type*/
        FLEXCAN_RXFIFO_USING_INTERRUPTS,
#if (FEATURE_CAN_HAS_DMA_ENABLE == STD_ON)
     /* DMA channel number used for transfers. */
        0,
  #endif
    /* Controller Callback */
    CAN3_Callback,
    /* Error Callback */
    CAN3_ErrCallback
    };
    const Flexcan_Ip_ConfigType FlexCAN_Config4  = {
    /* Number Of Message Buffer used .max_num_mb  */
    (uint8)24,
    /*Can Hw filter count* .num_id_filters*- aici exista variatna sa generez toate filtrele si sa referentiezi tu in cod */
    FLEXCAN_RX_FIFO_ID_FILTERS_8,
    /* Legacy FIFO ENABLED .is_rx_fifo_needed*/
    (boolean)FALSE,
#if (FEATURE_CAN_HAS_ENHANCED_RX_FIFO == STD_ON)
    /* The number of standard ID filter elements */
    0U,
    /* The number of extended ID filter elements */
    0U,
    /* The number of enhanced Rx FIFO watermark */
    0U,
    /* The Enhanced Rx FIFO feature is enabled or not. */
    (boolean)FALSE,
#endif
#if (FEATURE_CAN_HAS_HR_TIMER == STD_ON)
    /* TimeStamp Structure Configuration */
    {
        /* timeStampSurce Timer Source */
        FLEXCAN_CAN_CLK_TIMESTAMP_SRC,
        /* msgBuffTimeStampType Timestamp MB Type  */
        FLEXCAN_MSGBUFFTIMESTAMP_TIMER,
        /* hrConfigType Timestamp HR capture configuration */
        FLEXCAN_TIMESTAMPCAPTURE_DISABLE,
        /* hrSrc HT Timer Source */
        FLEXCAN_HRTIMERSRC_MAC,
    },
#endif
    FLEXCAN_NORMAL_MODE,
     /*ctrlOptions*/
    (uint32)(CAN_FD_ISO_U32 | \
    CAN_BUSOFF_RECOVERY_U32 | \
    0U),
     /* Can FD RamBlock specified *//*.payload*/
    {
      FLEXCAN_PAYLOAD_SIZE_8,
      FLEXCAN_PAYLOAD_SIZE_8,
      FLEXCAN_PAYLOAD_SIZE_8
    },
        /*Can FD enabled .fd_enable*/
        (boolean)TRUE,
        /*Enhance CBT support . extCbtEnable*/
        (boolean)TRUE,
        /*BRS for FD .bitRateSwitch*/
        (boolean)TRUE,
        /*values for normal baudrate .bitrate*/
        {   /* Prop Seg */
            (20U),
            /* Phase Seg 1 */
            (41U),
            /* Phase Seg 2*/
            (15U),
            /* Pre Divider */
            (0U),
            /* Resync jump width */
            (14U)
        },
            /*values for FD baudrate .bitrate*/
        {   /* Prop Seg */
            (10U),
            /* Phase Seg 1 */
            (3U),
            /* Phase Seg 2*/
            (4U),
            /* Pre Divider */
            (1U),
            /* Resync jump width */
            (4U)
        },
        /*transfer_type*/
        FLEXCAN_RXFIFO_USING_INTERRUPTS,
#if (FEATURE_CAN_HAS_DMA_ENABLE == STD_ON)
     /* DMA channel number used for transfers. */
        0,
  #endif
    /* Controller Callback */
    CAN4_Callback,
    /* Error Callback */
    CAN4_ErrCallback
    };
    const Flexcan_Ip_ConfigType FlexCAN_Config5  = {
    /* Number Of Message Buffer used .max_num_mb  */
    (uint8)24,
    /*Can Hw filter count* .num_id_filters*- aici exista variatna sa generez toate filtrele si sa referentiezi tu in cod */
    FLEXCAN_RX_FIFO_ID_FILTERS_8,
    /* Legacy FIFO ENABLED .is_rx_fifo_needed*/
    (boolean)FALSE,
#if (FEATURE_CAN_HAS_ENHANCED_RX_FIFO == STD_ON)
    /* The number of standard ID filter elements */
    0U,
    /* The number of extended ID filter elements */
    0U,
    /* The number of enhanced Rx FIFO watermark */
    0U,
    /* The Enhanced Rx FIFO feature is enabled or not. */
    (boolean)FALSE,
#endif
#if (FEATURE_CAN_HAS_HR_TIMER == STD_ON)
    /* TimeStamp Structure Configuration */
    {
        /* timeStampSurce Timer Source */
        FLEXCAN_CAN_CLK_TIMESTAMP_SRC,
        /* msgBuffTimeStampType Timestamp MB Type  */
        FLEXCAN_MSGBUFFTIMESTAMP_TIMER,
        /* hrConfigType Timestamp HR capture configuration */
        FLEXCAN_TIMESTAMPCAPTURE_DISABLE,
        /* hrSrc HT Timer Source */
        FLEXCAN_HRTIMERSRC_MAC,
    },
#endif
    FLEXCAN_NORMAL_MODE,
     /*ctrlOptions*/
    (uint32)(CAN_FD_ISO_U32 | \
    CAN_BUSOFF_RECOVERY_U32 | \
    0U),
     /* Can FD RamBlock specified *//*.payload*/
    {
      FLEXCAN_PAYLOAD_SIZE_8,
      FLEXCAN_PAYLOAD_SIZE_8,
      FLEXCAN_PAYLOAD_SIZE_8
    },
        /*Can FD enabled .fd_enable*/
        (boolean)TRUE,
        /*Enhance CBT support . extCbtEnable*/
        (boolean)TRUE,
        /*BRS for FD .bitRateSwitch*/
        (boolean)TRUE,
        /*values for normal baudrate .bitrate*/
        {   /* Prop Seg */
            (20U),
            /* Phase Seg 1 */
            (41U),
            /* Phase Seg 2*/
            (15U),
            /* Pre Divider */
            (0U),
            /* Resync jump width */
            (14U)
        },
            /*values for FD baudrate .bitrate*/
        {   /* Prop Seg */
            (10U),
            /* Phase Seg 1 */
            (3U),
            /* Phase Seg 2*/
            (4U),
            /* Pre Divider */
            (1U),
            /* Resync jump width */
            (4U)
        },
        /*transfer_type*/
        FLEXCAN_RXFIFO_USING_INTERRUPTS,
#if (FEATURE_CAN_HAS_DMA_ENABLE == STD_ON)
     /* DMA channel number used for transfers. */
        0,
  #endif
    /* Controller Callback */
    CAN5_Callback,
    /* Error Callback */
    CAN5_ErrCallback
    };
    
#define CAN_STOP_SEC_CONFIG_DATA_UNSPECIFIED
#include "Can_MemMap.h"

#ifdef __cplusplus
}
#endif
/** @} */