diff --git a/DBC_Converter.py b/DBC_Converter.py index fc32371..2146ba7 100644 --- a/DBC_Converter.py +++ b/DBC_Converter.py @@ -160,10 +160,10 @@ class MainView(QtWidgets.QMainWindow): # 보기 메뉴 항목 추가 size_menu = view_menu.addMenu("창크기") + size_menu.addAction("기본", lambda: self.setWindowSize("default")).setShortcut('Ctrl+0') size_menu.addAction("작게", lambda: self.setWindowSize("small")).setShortcut('Ctrl+1') size_menu.addAction("보통", lambda: self.setWindowSize("medium")).setShortcut('Ctrl+2') size_menu.addAction("크게", lambda: self.setWindowSize("large")).setShortcut('Ctrl+3') - size_menu.addAction("기본", lambda: self.setWindowSize("default")).setShortcut('Ctrl+0') size_menu.addAction("자동", lambda: self.setWindowSize("auto")).setShortcut('Ctrl+4') sort_menu = view_menu.addMenu("정렬") diff --git a/DBC_Converter_RX.py b/DBC_Converter_RX.py index 2037220..2a45b88 100644 --- a/DBC_Converter_RX.py +++ b/DBC_Converter_RX.py @@ -1,7 +1,6 @@ import sys from DBC_Converter_Data_Parsing import load_dbc_file - #============================== Generate Globals ==============================# def generate_globals(signals, C_file, header_file): if not signals: @@ -31,7 +30,6 @@ def generate_globals(signals, C_file, header_file): f.write("\n#endif // GENERATED_GLOBALS_H\n") print(f"[INFO] Globals and extern declarations written to {C_file} and {header_file}") - #============================== Generate VCU RX Function ==============================# def generate_vcu_rx_function_with_factors(signals, output_file): if not signals: @@ -74,7 +72,7 @@ def generate_vcu_rx_function_with_factors(signals, output_file): continue # Skip this message if no signal has RX ECU name as VCU c_file_content += f""" -void {message_name}_RX_{message_info['ID']}(void) +void Receive_{message_name}_{message_info['ID']}(void) {{ struct {{ """ @@ -100,16 +98,16 @@ void {message_name}_RX_{message_info['ID']}(void) start_bit = signal["msb"] % 8 signal_length = signal["Length"] if signal["Byte order"] == 0: # Motorola (Big Endian) - shift_expr = f"(CAN_ch[0].rx.buf[{start_byte}] >> shift{start_bit})" + shift_expr = f"(CAN_ch[0].rx.buf[{start_byte}] << shift{7 - start_bit})" if signal_length > 8: # Handle multi-byte signals multi_byte_expr = [] for i in range((signal_length + 7) // 8): - byte_shift = i * 8 + byte_shift = (7 - start_bit) + (i * 8) if i == 0: - multi_byte_expr.append(f"(CAN_ch[0].rx.buf[{start_byte + i}] >> shift{start_bit})") + multi_byte_expr.append(f"(CAN_ch[0].rx.buf[{start_byte + i}] << shift{7 - start_bit})") else: - multi_byte_expr.append(f"(CAN_ch[0].rx.buf[{start_byte + i}] << shift{byte_shift})") + multi_byte_expr.append(f"(CAN_ch[0].rx.buf[{start_byte + i}] >> shift{byte_shift})") shift_expr = " | ".join(multi_byte_expr) else: # Intel (Little Endian) shift_expr = f"(CAN_ch[0].rx.buf[{start_byte}] >> shift{start_bit})" @@ -136,10 +134,7 @@ void {message_name}_RX_{message_info['ID']}(void) factor = f" * {factor_name}" if signal['Factor'] != 1 else "" offset = f" + {offset_name}" if signal['Offset'] != 0 else "" temp_var = f"{temp_struct_name}.{signal['Signal name']}_temp" - if signal["Byte order"] == 1: - c_file_content += f" VCU.RX.{message_name}_{message_info['ID']}.{signal['Signal name']} = ({temp_var}{factor}){offset};\n" - else: - c_file_content += f" VCU.RX.{message_name}_{message_info['ID']}.{signal['Signal name']} = {temp_var}{factor}{offset};\n" + c_file_content += f" VCU.RX.{message_name}_{message_info['ID']}.{signal['Signal name']} = ({temp_var}{factor}){offset};\n" c_file_content += "}\n" @@ -148,7 +143,6 @@ void {message_name}_RX_{message_info['ID']}(void) c_file.write(c_file_content) print(f"Generated RX function C file with Factors and Offsets: {output_file}") - #============================== Generate Input Function ==============================# def generate_input_functions(signals, output_file): if not signals: @@ -165,7 +159,6 @@ def generate_input_functions(signals, output_file): f.write("}\n\n") print(f"[INFO] Input functions written to {output_file}") - #============================== Generate Initialization ==============================# def generate_initialization(signals, output_file): if not signals: @@ -192,7 +185,6 @@ def generate_initialization(signals, output_file): f.write("}\n") print(f"[INFO] Initialization function written to {output_file}") - #============================== Main ==============================# if __name__ == "__main__": dbc_file_path = sys.argv[1] diff --git a/__pycache__/DBC_Converter_Data_Parsing.cpython-313.pyc b/__pycache__/DBC_Converter_Data_Parsing.cpython-313.pyc index de1648f..f9d1021 100644 Binary files a/__pycache__/DBC_Converter_Data_Parsing.cpython-313.pyc and b/__pycache__/DBC_Converter_Data_Parsing.cpython-313.pyc differ