mirror of
https://github.com/Dev-KATECH/ADM.git
synced 2026-05-17 18:03:59 +09:00
5724 lines
173 KiB
Plaintext
5724 lines
173 KiB
Plaintext
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Reclaiming functions:
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Reclaiming variables:
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Clearing address taken flags:
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Symbol table:
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SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_30/126 (SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_30) @07e5c620
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: Emios_Pwm_Ip_ComparatorTransferDisable/89 (1073741824 (estimated locally),1.00 per call)
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Calls:
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Emios_Mcl_Ip_ComparatorTransferDisable/125 (Emios_Mcl_Ip_ComparatorTransferDisable) @07e5c540
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: Emios_Pwm_Ip_ComparatorTransferDisable/89 (1073741824 (estimated locally),1.00 per call)
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Calls:
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SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_30/124 (SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_30) @07e5c460
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: Emios_Pwm_Ip_ComparatorTransferDisable/89 (1073741824 (estimated locally),1.00 per call)
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Calls:
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SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_29/123 (SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_29) @07e5c2a0
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: Emios_Pwm_Ip_ComparatorTransferEnable/88 (1073741824 (estimated locally),1.00 per call)
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Calls:
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Emios_Mcl_Ip_ComparatorTransferEnable/122 (Emios_Mcl_Ip_ComparatorTransferEnable) @07e5c1c0
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: Emios_Pwm_Ip_SyncUpdate/90 (42949673 (estimated locally),1.00 per call) Emios_Pwm_Ip_SyncUpdate/90 (8842125 (estimated locally),0.21 per call) Emios_Pwm_Ip_SyncUpdate/90 (16796839 (estimated locally),0.39 per call) Emios_Pwm_Ip_ComparatorTransferEnable/88 (1073741824 (estimated locally),1.00 per call)
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Calls:
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SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_29/121 (SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_29) @07e5c0e0
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: Emios_Pwm_Ip_ComparatorTransferEnable/88 (1073741824 (estimated locally),1.00 per call)
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Calls:
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SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_28/120 (SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_28) @07e52ee0
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: Emios_Pwm_Ip_SetClockPs/87 (1073741824 (estimated locally),1.00 per call)
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Calls:
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SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_28/119 (SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_28) @07e52e00
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: Emios_Pwm_Ip_SetClockPs/87 (1073741824 (estimated locally),1.00 per call)
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Calls:
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SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_27/118 (SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_27) @07e52c40
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: Emios_Pwm_Ip_SetBusSelected/86 (1073741824 (estimated locally),1.00 per call)
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Calls:
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SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_27/117 (SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_27) @07e52b60
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: Emios_Pwm_Ip_SetBusSelected/86 (1073741824 (estimated locally),1.00 per call)
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Calls:
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SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_26/116 (SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_26) @07e529a0
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: Emios_Pwm_Ip_SetPreEnableClock/85 (1073741824 (estimated locally),1.00 per call)
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Calls:
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SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_26/115 (SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_26) @07e528c0
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: Emios_Pwm_Ip_SetPreEnableClock/85 (1073741824 (estimated locally),1.00 per call)
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Calls:
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SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_25/114 (SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_25) @07e52460
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: Emios_Pwm_Ip_SetOutputToNormal/82 (1073741824 (estimated locally),1.00 per call)
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Calls:
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SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_25/113 (SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_25) @07e52380
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: Emios_Pwm_Ip_SetOutputToNormal/82 (1073741824 (estimated locally),1.00 per call)
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Calls:
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SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_24/112 (SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_24) @07e521c0
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: Emios_Pwm_Ip_SetOutputState/81 (1073741824 (estimated locally),1.00 per call)
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Calls:
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SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_24/111 (SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_24) @07e520e0
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: Emios_Pwm_Ip_SetOutputState/81 (1073741824 (estimated locally),1.00 per call)
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Calls:
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SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_23/110 (SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_23) @07e46d20
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: Emios_Pwm_Ip_SetFlagRequest/79 (1073741824 (estimated locally),1.00 per call)
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Calls:
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SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_23/109 (SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_23) @07e46c40
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: Emios_Pwm_Ip_SetFlagRequest/79 (1073741824 (estimated locally),1.00 per call)
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Calls:
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SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_22/108 (SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_22) @07e467e0
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: Emios_Pwm_Ip_ChannelStopDebugMode/77 (1073741824 (estimated locally),1.00 per call)
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Calls:
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SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_22/107 (SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_22) @07e46700
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: Emios_Pwm_Ip_ChannelStopDebugMode/77 (1073741824 (estimated locally),1.00 per call)
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Calls:
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SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_21/106 (SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_21) @07e46380
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: Emios_Pwm_Ip_ChannelEnterDebugMode/76 (1073741824 (estimated locally),1.00 per call)
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Calls:
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SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_21/105 (SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_21) @07e462a0
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: Emios_Pwm_Ip_ChannelEnterDebugMode/76 (1073741824 (estimated locally),1.00 per call)
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Calls:
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SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_20/104 (SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_20) @07e460e0
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: Emios_Pwm_Ip_SetTriggerPlacement/75 (1073741824 (estimated locally),1.00 per call)
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Calls:
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SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_20/103 (SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_20) @07e46000
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: Emios_Pwm_Ip_SetTriggerPlacement/75 (1073741824 (estimated locally),1.00 per call)
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Calls:
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SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_19/102 (SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_19) @07e2be00
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: Emios_Pwm_Ip_SetDeadTime/73 (1073741824 (estimated locally),1.00 per call)
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Calls:
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SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_19/101 (SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_19) @07e2bd20
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: Emios_Pwm_Ip_SetDeadTime/73 (1073741824 (estimated locally),1.00 per call)
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Calls:
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SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_18/100 (SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_18) @07e2ba80
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: Emios_Pwm_Ip_SetPhaseShift/71 (1073741824 (estimated locally),1.00 per call)
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Calls:
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SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_18/99 (SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_18) @07e2b9a0
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: Emios_Pwm_Ip_SetPhaseShift/71 (1073741823 (estimated locally),1.00 per call)
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Calls:
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SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_17/98 (SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_17) @07ec9e00
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: Emios_Pwm_Ip_SetDutyCycle/69 (1073741824 (estimated locally),1.00 per call)
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Calls:
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SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_17/97 (SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_17) @07ec9d20
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: Emios_Pwm_Ip_SetDutyCycle/69 (1073741824 (estimated locally),1.00 per call)
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Calls:
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SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_16/96 (SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_16) @07ec99a0
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: Emios_Pwm_Ip_SetPeriod/67 (1073741824 (estimated locally),1.00 per call)
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Calls:
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SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_16/95 (SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_16) @07ec98c0
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: Emios_Pwm_Ip_SetPeriod/67 (1073741824 (estimated locally),1.00 per call)
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Calls:
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SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_15/94 (SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_15) @07ec9460
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: Emios_Pwm_Ip_ForceMatchTrailingEdge/65 (1073741824 (estimated locally),1.00 per call)
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Calls:
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SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_15/93 (SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_15) @07ec9380
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: Emios_Pwm_Ip_ForceMatchTrailingEdge/65 (1073741824 (estimated locally),1.00 per call)
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Calls:
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SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_14/92 (SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_14) @07ec91c0
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: Emios_Pwm_Ip_ForceMatchLeadingEdge/64 (1073741824 (estimated locally),1.00 per call)
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Calls:
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SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_14/91 (SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_14) @07ec90e0
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: Emios_Pwm_Ip_ForceMatchLeadingEdge/64 (1073741824 (estimated locally),1.00 per call)
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Calls:
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Emios_Pwm_Ip_SyncUpdate/90 (Emios_Pwm_Ip_SyncUpdate) @07e16700
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Type: function definition analyzed
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Visibility: externally_visible public
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References: Emios_Pwm_Ip_aBasePtr/41 (read)Emios_Pwm_Ip_aCheckState/49 (read)
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Referring:
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Availability: available
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Function flags: count:42949672 (estimated locally) body optimize_size
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Called by:
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Calls: Emios_Mcl_Ip_ComparatorTransferEnable/122 (42949673 (estimated locally),1.00 per call) Emios_Mcl_Ip_ComparatorTransferEnable/122 (8842125 (estimated locally),0.21 per call) Emios_Mcl_Ip_ComparatorTransferEnable/122 (16796839 (estimated locally),0.39 per call) Emios_Pwm_Ip_GetPwmMode/27 (104316166 (estimated locally),2.43 per call)
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Emios_Pwm_Ip_ComparatorTransferDisable/89 (Emios_Pwm_Ip_ComparatorTransferDisable) @07e16460
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Type: function definition analyzed
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Visibility: externally_visible public
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References:
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Referring:
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Availability: available
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Function flags: count:1073741824 (estimated locally) body optimize_size
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Called by:
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Calls: SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_30/126 (1073741824 (estimated locally),1.00 per call) Emios_Mcl_Ip_ComparatorTransferDisable/125 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_30/124 (1073741824 (estimated locally),1.00 per call)
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Emios_Pwm_Ip_ComparatorTransferEnable/88 (Emios_Pwm_Ip_ComparatorTransferEnable) @07e161c0
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Type: function definition analyzed
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Visibility: externally_visible public
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References:
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Referring:
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Availability: available
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Function flags: count:1073741824 (estimated locally) body optimize_size
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Called by:
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Calls: SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_29/123 (1073741824 (estimated locally),1.00 per call) Emios_Mcl_Ip_ComparatorTransferEnable/122 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_29/121 (1073741824 (estimated locally),1.00 per call)
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Emios_Pwm_Ip_SetClockPs/87 (Emios_Pwm_Ip_SetClockPs) @07e0cd20
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Type: function definition analyzed
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Visibility: externally_visible public
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References: Emios_Pwm_Ip_aBasePtr/41 (read)
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Referring:
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Availability: available
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Function flags: count:1073741824 (estimated locally) body optimize_size
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Called by:
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Calls: SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_28/120 (1073741824 (estimated locally),1.00 per call) Emios_Pwm_Ip_SetExtendedPrescaler/39 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_28/119 (1073741824 (estimated locally),1.00 per call)
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Emios_Pwm_Ip_SetBusSelected/86 (Emios_Pwm_Ip_SetBusSelected) @07e0c7e0
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Type: function definition analyzed
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Visibility: externally_visible public
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References: Emios_Pwm_Ip_aBasePtr/41 (read)
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Referring:
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Availability: available
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Function flags: count:1073741824 (estimated locally) body optimize_size
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Called by:
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Calls: SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_27/118 (1073741824 (estimated locally),1.00 per call) Emios_Pwm_Ip_SetCounterBus/22 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_27/117 (1073741824 (estimated locally),1.00 per call)
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Emios_Pwm_Ip_SetPreEnableClock/85 (Emios_Pwm_Ip_SetPreEnableClock) @07e0c2a0
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Type: function definition analyzed
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Visibility: externally_visible public
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References: Emios_Pwm_Ip_aBasePtr/41 (read)
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Referring:
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Availability: available
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Function flags: count:1073741824 (estimated locally) body optimize_size
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Called by:
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Calls: SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_26/116 (1073741824 (estimated locally),1.00 per call) Emios_Pwm_Ip_SetPrescalerEnable/15 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_26/115 (1073741824 (estimated locally),1.00 per call)
|
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Emios_Pwm_Ip_GetMasterBusChannel/84 (Emios_Pwm_Ip_GetMasterBusChannel) @07e0cee0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: Emios_Pwm_Ip_aBasePtr/41 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by: Emios_Pwm_Ip_SetDutyCycleDaoc/61 (1073741824 (estimated locally),1.00 per call) Emios_Pwm_Ip_InitDoubleCompareMode/60 (1073741824 (estimated locally),1.00 per call)
|
|
Calls: Emios_Pwm_Ip_GetCounterBus/23 (1073741824 (estimated locally),1.00 per call)
|
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Emios_Pwm_Ip_GetChannelMode/83 (Emios_Pwm_Ip_GetChannelMode) @07e0cc40
|
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Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: Emios_Pwm_Ip_aBasePtr/41 (read)
|
|
Referring:
|
|
Availability: available
|
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Function flags: count:1073741824 (estimated locally) body optimize_size
|
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Called by:
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Calls: Emios_Pwm_Ip_GetPwmMode/27 (1073741824 (estimated locally),1.00 per call)
|
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Emios_Pwm_Ip_SetOutputToNormal/82 (Emios_Pwm_Ip_SetOutputToNormal) @07e0c9a0
|
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Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: Emios_Pwm_Ip_aBasePtr/41 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
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Calls: SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_25/114 (1073741824 (estimated locally),1.00 per call) Emios_Pwm_Ip_SetPwmModePol/28 (66769924 (estimated locally),0.06 per call) Emios_Pwm_Ip_SetEdgePolarity/24 (34396628 (estimated locally),0.03 per call) Emios_Pwm_Ip_SetPwmModePol/28 (34396628 (estimated locally),0.03 per call) Emios_Pwm_Ip_SetEdgePolarity/24 (91013306 (estimated locally),0.08 per call) Emios_Pwm_Ip_SetEdgePolarity/24 (172892362 (estimated locally),0.16 per call) Emios_Pwm_Ip_GetPwmMode/27 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_25/113 (1073741824 (estimated locally),1.00 per call)
|
|
Emios_Pwm_Ip_SetOutputState/81 (Emios_Pwm_Ip_SetOutputState) @07e0c700
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: Emios_Pwm_Ip_aBasePtr/41 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
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Called by:
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Calls: SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_24/112 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_24/111 (1073741824 (estimated locally),1.00 per call)
|
|
Emios_Pwm_Ip_GetOutputState/80 (Emios_Pwm_Ip_GetOutputState) @07e0c460
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: Emios_Pwm_Ip_aBasePtr/41 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
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Called by:
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Calls:
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Emios_Pwm_Ip_SetFlagRequest/79 (Emios_Pwm_Ip_SetFlagRequest) @07e0c1c0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: Emios_Pwm_Ip_aBasePtr/41 (read)Emios_Pwm_Ip_aNotif/46 (read)Emios_Pwm_Ip_aCheckEnableNotif/47 (write)Emios_Pwm_Ip_aCheckEnableNotif/47 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
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Calls: SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_23/110 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_23/109 (1073741824 (estimated locally),1.00 per call)
|
|
Emios_Pwm_Ip_GetFlagRequest/78 (Emios_Pwm_Ip_GetFlagRequest) @07e03d20
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: Emios_Pwm_Ip_aBasePtr/41 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
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Calls:
|
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Emios_Pwm_Ip_ChannelStopDebugMode/77 (Emios_Pwm_Ip_ChannelStopDebugMode) @07e037e0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: Emios_Pwm_Ip_aBasePtr/41 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_22/108 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_22/107 (1073741824 (estimated locally),1.00 per call)
|
|
Emios_Pwm_Ip_ChannelEnterDebugMode/76 (Emios_Pwm_Ip_ChannelEnterDebugMode) @07e032a0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: Emios_Pwm_Ip_aBasePtr/41 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_21/106 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_21/105 (1073741824 (estimated locally),1.00 per call)
|
|
Emios_Pwm_Ip_SetTriggerPlacement/75 (Emios_Pwm_Ip_SetTriggerPlacement) @07e03ee0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: Emios_Pwm_Ip_aBasePtr/41 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_20/104 (1073741824 (estimated locally),1.00 per call) Emios_Pwm_Ip_GetCounterBusMode/51 (1073741824 (estimated locally),1.00 per call) Emios_Pwm_Ip_GetCounterBus/23 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_20/103 (1073741824 (estimated locally),1.00 per call)
|
|
Emios_Pwm_Ip_GetTriggerPlacement/74 (Emios_Pwm_Ip_GetTriggerPlacement) @07e03c40
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: Emios_Pwm_Ip_aBasePtr/41 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls:
|
|
Emios_Pwm_Ip_SetDeadTime/73 (Emios_Pwm_Ip_SetDeadTime) @07e039a0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: Emios_Pwm_Ip_aBasePtr/41 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_19/102 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_19/101 (1073741824 (estimated locally),1.00 per call)
|
|
Emios_Pwm_Ip_GetDeadTime/72 (Emios_Pwm_Ip_GetDeadTime) @07e03700
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: Emios_Pwm_Ip_aBasePtr/41 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls:
|
|
Emios_Pwm_Ip_SetPhaseShift/71 (Emios_Pwm_Ip_SetPhaseShift) @07e03460
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: Emios_Pwm_Ip_aBasePtr/41 (read)Emios_Pwm_Ip_aRegA/44 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741823 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_18/100 (1073741824 (estimated locally),1.00 per call) Emios_Pwm_Ip_GetCounterBusMode/51 (1073741823 (estimated locally),1.00 per call) Emios_Pwm_Ip_GetCounterBus/23 (1073741823 (estimated locally),1.00 per call) Emios_Pwm_Ip_GetDutyCycle/68 (1073741823 (estimated locally),1.00 per call) Emios_Pwm_Ip_GetCounterBusPeriod/50 (1073741823 (estimated locally),1.00 per call) Emios_Pwm_Ip_GetCounterBus/23 (1073741823 (estimated locally),1.00 per call) SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_18/99 (1073741823 (estimated locally),1.00 per call) Emios_Pwm_Ip_GetPwmMode/27 (1073741823 (estimated locally),1.00 per call)
|
|
Emios_Pwm_Ip_GetPhaseShift/70 (Emios_Pwm_Ip_GetPhaseShift) @07e031c0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: Emios_Pwm_Ip_aBasePtr/41 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls:
|
|
Emios_Pwm_Ip_SetDutyCycle/69 (Emios_Pwm_Ip_SetDutyCycle) @07df4ee0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: Emios_Pwm_Ip_aBasePtr/41 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_17/98 (1073741824 (estimated locally),1.00 per call) Emios_Pwm_Ip_SetDutyCycleOpwmt/59 (40255664 (estimated locally),0.04 per call) Emios_Pwm_Ip_SetDutyCycleDaoc/61 (27974275 (estimated locally),0.03 per call) Emios_Pwm_Ip_SetDutyCycleOpwmb/57 (61382267 (estimated locally),0.06 per call) Emios_Pwm_Ip_SetDutyCycleOpwmcb/55 (435622670 (estimated locally),0.41 per call) Emios_Pwm_Ip_SetDutyCycleOpwfmb/53 (508506948 (estimated locally),0.47 per call) SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_17/97 (1073741824 (estimated locally),1.00 per call) Emios_Pwm_Ip_GetPwmMode/27 (1073741824 (estimated locally),1.00 per call)
|
|
Emios_Pwm_Ip_GetDutyCycle/68 (Emios_Pwm_Ip_GetDutyCycle) @07df49a0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: Emios_Pwm_Ip_aBasePtr/41 (read)Emios_Pwm_Ip_aDaocDuty/45 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by: Emios_Pwm_Ip_SetPhaseShift/71 (1073741823 (estimated locally),1.00 per call)
|
|
Calls: Emios_Pwm_Ip_GetCounterBusPeriod/50 (214748365 (estimated locally),0.20 per call) Emios_Pwm_Ip_GetCounterBus/23 (214748365 (estimated locally),0.20 per call) Emios_Pwm_Ip_GetPwmMode/27 (1073741824 (estimated locally),1.00 per call)
|
|
Emios_Pwm_Ip_SetPeriod/67 (Emios_Pwm_Ip_SetPeriod) @07df4460
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: Emios_Pwm_Ip_aBasePtr/41 (read)Emios_Pwm_Ip_aPeriod/43 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_16/96 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_16/95 (1073741824 (estimated locally),1.00 per call)
|
|
Emios_Pwm_Ip_GetPeriod/66 (Emios_Pwm_Ip_GetPeriod) @07df4e00
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: Emios_Pwm_Ip_aBasePtr/41 (read)Emios_Pwm_Ip_aPeriod/43 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Emios_Pwm_Ip_GetCounterBusPeriod/50 (194011060 (estimated locally),0.18 per call) Emios_Pwm_Ip_GetCounterBus/23 (194011060 (estimated locally),0.18 per call) Emios_Pwm_Ip_GetPwmMode/27 (1073741824 (estimated locally),1.00 per call)
|
|
Emios_Pwm_Ip_ForceMatchTrailingEdge/65 (Emios_Pwm_Ip_ForceMatchTrailingEdge) @07df4b60
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: Emios_Pwm_Ip_aBasePtr/41 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_15/94 (1073741824 (estimated locally),1.00 per call) Emios_Pwm_Ip_SetForceMatchB/21 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_15/93 (1073741824 (estimated locally),1.00 per call)
|
|
Emios_Pwm_Ip_ForceMatchLeadingEdge/64 (Emios_Pwm_Ip_ForceMatchLeadingEdge) @07df48c0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: Emios_Pwm_Ip_aBasePtr/41 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_14/92 (1073741824 (estimated locally),1.00 per call) Emios_Pwm_Ip_SetForceMatchA/20 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_14/91 (1073741824 (estimated locally),1.00 per call)
|
|
Emios_Pwm_Ip_DeInitChannel/63 (Emios_Pwm_Ip_DeInitChannel) @07df4620
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: Emios_Pwm_Ip_aBasePtr/41 (read)Emios_Pwm_Ip_aCheckEnableNotif/47 (write)Emios_Pwm_Ip_aCheckState/49 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Emios_Pwm_Ip_GetPwmMode/27 (1073741824 (estimated locally),1.00 per call)
|
|
Emios_Pwm_Ip_InitChannel/62 (Emios_Pwm_Ip_InitChannel) @07df4380
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: Emios_Pwm_Ip_aBasePtr/41 (read)Emios_Pwm_Ip_aNotificationPtr/42 (write)Emios_Pwm_Ip_aCheckState/49 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073527118 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Emios_Pwm_Ip_SetPrescalerSource/40 (524845003 (estimated locally),0.49 per call) Emios_Pwm_Ip_SetExtendedPrescaler/39 (524845003 (estimated locally),0.49 per call) Emios_Pwm_Ip_InitDoubleCompareMode/60 (178956970 (estimated locally),0.17 per call) Emios_Pwm_Ip_InitTriggerMode/58 (178956970 (estimated locally),0.17 per call) Emios_Pwm_Ip_InitEdgePlacementMode/56 (178956970 (estimated locally),0.17 per call) Emios_Pwm_Ip_InitDeadTimeMode/54 (178956970 (estimated locally),0.17 per call) Emios_Pwm_Ip_InitPeriodDutyCycleMode/52 (178956970 (estimated locally),0.17 per call) Emios_Pwm_Ip_SetOutDisableSource/14 (524740055 (estimated locally),0.49 per call)
|
|
Emios_Pwm_Ip_SetDutyCycleDaoc/61 (Emios_Pwm_Ip_SetDutyCycleDaoc) @07df40e0
|
|
Type: function definition analyzed
|
|
Visibility: prevailing_def_ironly
|
|
References: Emios_Pwm_Ip_aBasePtr/41 (read)Emios_Pwm_Ip_aPeriod/43 (read)Emios_Pwm_Ip_aDaocDuty/45 (write)Emios_Pwm_Ip_aPolarity/48 (read)Emios_Pwm_Ip_aNotif/46 (write)Emios_Pwm_Ip_aDaocDuty/45 (write)Emios_Pwm_Ip_aPolarity/48 (read)Emios_Pwm_Ip_aNotif/46 (write)Emios_Pwm_Ip_aDaocDuty/45 (write)Emios_Pwm_Ip_aPolarity/48 (read)Emios_Pwm_Ip_aNotif/46 (write)
|
|
Referring:
|
|
Availability: local
|
|
Function flags: count:1073741824 (estimated locally) body local optimize_size
|
|
Called by: Emios_Pwm_Ip_SetDutyCycle/69 (27974275 (estimated locally),0.03 per call)
|
|
Calls: Emios_Pwm_Ip_SetEdgePolarity/24 (131867307 (estimated locally),0.12 per call) Emios_Pwm_Ip_SetEdgePolarity/24 (137910326 (estimated locally),0.13 per call) Emios_Pwm_Ip_SetEdgePolarity/24 (535528735 (estimated locally),0.50 per call) Emios_Pwm_Ip_GetMasterBusChannel/84 (1073741824 (estimated locally),1.00 per call)
|
|
Emios_Pwm_Ip_InitDoubleCompareMode/60 (Emios_Pwm_Ip_InitDoubleCompareMode) @07de2e00
|
|
Type: function definition analyzed
|
|
Visibility: prevailing_def_ironly
|
|
References: Emios_Pwm_Ip_aBasePtr/41 (read)Emios_Pwm_Ip_aPeriod/43 (write)Emios_Pwm_Ip_aPolarity/48 (write)Emios_Pwm_Ip_aDaocDuty/45 (write)Emios_Pwm_Ip_aNotif/46 (write)Emios_Pwm_Ip_aPeriod/43 (read)Emios_Pwm_Ip_aDaocDuty/45 (write)Emios_Pwm_Ip_aNotif/46 (write)Emios_Pwm_Ip_aDaocDuty/45 (write)Emios_Pwm_Ip_aNotif/46 (write)
|
|
Referring:
|
|
Availability: local
|
|
Function flags: count:1073741824 (estimated locally) body local optimize_size
|
|
Called by: Emios_Pwm_Ip_InitChannel/62 (178956970 (estimated locally),0.17 per call)
|
|
Calls: Emios_Pwm_Ip_SetEdgePolarity/24 (351646152 (estimated locally),0.33 per call) Emios_Pwm_Ip_SetEdgePolarity/24 (367760870 (estimated locally),0.34 per call) Emios_Pwm_Ip_SetEdgePolarity/24 (354334802 (estimated locally),0.33 per call) Emios_Pwm_Ip_SetEdgePolarity/24 (1073741824 (estimated locally),1.00 per call) Emios_Pwm_Ip_SetEdgePolarity/24 (708669605 (estimated locally),0.66 per call) Emios_Pwm_Ip_SetEdgePolarity/24 (365072220 (estimated locally),0.34 per call) Emios_Pwm_Ip_SetCounterBus/22 (1073741824 (estimated locally),1.00 per call) Emios_Pwm_Ip_GetMasterBusChannel/84 (1073741824 (estimated locally),1.00 per call)
|
|
Emios_Pwm_Ip_SetDutyCycleOpwmt/59 (Emios_Pwm_Ip_SetDutyCycleOpwmt) @07de2b60
|
|
Type: function definition analyzed
|
|
Visibility: prevailing_def_ironly
|
|
References: Emios_Pwm_Ip_aBasePtr/41 (read)Emios_Pwm_Ip_aNotif/46 (write)Emios_Pwm_Ip_aRegA/44 (read)Emios_Pwm_Ip_aNotif/46 (write)Emios_Pwm_Ip_aRegA/44 (read)Emios_Pwm_Ip_aNotif/46 (write)Emios_Pwm_Ip_aCheckEnableNotif/47 (read)
|
|
Referring:
|
|
Availability: local
|
|
Function flags: count:1073741824 (estimated locally) body local optimize_size
|
|
Called by: Emios_Pwm_Ip_SetDutyCycle/69 (40255664 (estimated locally),0.04 per call)
|
|
Calls: Emios_Pwm_Ip_SetInterruptRequest/18 (116930485 (estimated locally),0.11 per call) Emios_Pwm_Ip_GetCounterBusPeriod/50 (1073741824 (estimated locally),1.00 per call) Emios_Pwm_Ip_GetCounterBus/23 (1073741824 (estimated locally),1.00 per call)
|
|
Emios_Pwm_Ip_InitTriggerMode/58 (Emios_Pwm_Ip_InitTriggerMode) @07de28c0
|
|
Type: function definition analyzed
|
|
Visibility: prevailing_def_ironly
|
|
References: Emios_Pwm_Ip_aBasePtr/41 (read)Emios_Pwm_Ip_aNotif/46 (write)Emios_Pwm_Ip_aNotif/46 (write)Emios_Pwm_Ip_aNotif/46 (write)Emios_Pwm_Ip_aRegA/44 (write)
|
|
Referring:
|
|
Availability: local
|
|
Function flags: count:1073741824 (estimated locally) body local optimize_size
|
|
Called by: Emios_Pwm_Ip_InitChannel/62 (178956970 (estimated locally),0.17 per call)
|
|
Calls: Emios_Pwm_Ip_SetEdgePolarity/24 (1073741824 (estimated locally),1.00 per call) Emios_Pwm_Ip_SetEdgePolarity/24 (708669605 (estimated locally),0.66 per call) Emios_Pwm_Ip_SetEdgePolarity/24 (365072220 (estimated locally),0.34 per call) Emios_Pwm_Ip_SetCounterBus/22 (1073741824 (estimated locally),1.00 per call) Emios_Pwm_Ip_GetCounterBusMode/51 (1073741824 (estimated locally),1.00 per call) Emios_Pwm_Ip_GetCounterBusPeriod/50 (1073741824 (estimated locally),1.00 per call)
|
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Emios_Pwm_Ip_SetDutyCycleOpwmb/57 (Emios_Pwm_Ip_SetDutyCycleOpwmb) @07de2620
|
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Type: function definition analyzed
|
|
Visibility: prevailing_def_ironly
|
|
References: Emios_Pwm_Ip_aBasePtr/41 (read)Emios_Pwm_Ip_aRegA/44 (read)Emios_Pwm_Ip_aNotif/46 (write)Emios_Pwm_Ip_aNotif/46 (write)Emios_Pwm_Ip_aNotif/46 (write)Emios_Pwm_Ip_aCheckEnableNotif/47 (read)Emios_Pwm_Ip_aRegA/44 (read)
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|
Referring:
|
|
Availability: local
|
|
Function flags: count:1073741824 (estimated locally) body local optimize_size
|
|
Called by: Emios_Pwm_Ip_SetDutyCycle/69 (61382267 (estimated locally),0.06 per call)
|
|
Calls: Emios_Pwm_Ip_SetInterruptRequest/18 (131211251 (estimated locally),0.12 per call) Emios_Pwm_Ip_GetCounterBusPeriod/50 (1073741824 (estimated locally),1.00 per call) Emios_Pwm_Ip_GetCounterBus/23 (1073741824 (estimated locally),1.00 per call)
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Emios_Pwm_Ip_InitEdgePlacementMode/56 (Emios_Pwm_Ip_InitEdgePlacementMode) @07de2380
|
|
Type: function definition analyzed
|
|
Visibility: prevailing_def_ironly
|
|
References: Emios_Pwm_Ip_aBasePtr/41 (read)Emios_Pwm_Ip_aRegA/44 (write)Emios_Pwm_Ip_aNotif/46 (write)Emios_Pwm_Ip_aNotif/46 (write)Emios_Pwm_Ip_aNotif/46 (write)
|
|
Referring:
|
|
Availability: local
|
|
Function flags: count:1073741824 (estimated locally) body local optimize_size
|
|
Called by: Emios_Pwm_Ip_InitChannel/62 (178956970 (estimated locally),0.17 per call)
|
|
Calls: Emios_Pwm_Ip_SetEdgePolarity/24 (1073741824 (estimated locally),1.00 per call) Emios_Pwm_Ip_SetCounterBus/22 (1073741824 (estimated locally),1.00 per call)
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Emios_Pwm_Ip_SetDutyCycleOpwmcb/55 (Emios_Pwm_Ip_SetDutyCycleOpwmcb) @07de20e0
|
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Type: function definition analyzed
|
|
Visibility: prevailing_def_ironly
|
|
References: Emios_Pwm_Ip_aBasePtr/41 (read)Emios_Pwm_Ip_aNotif/46 (write)Emios_Pwm_Ip_aNotif/46 (write)Emios_Pwm_Ip_aNotif/46 (write)Emios_Pwm_Ip_aCheckEnableNotif/47 (read)
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|
Referring:
|
|
Availability: local
|
|
Function flags: count:1073741824 (estimated locally) body local optimize_size
|
|
Called by: Emios_Pwm_Ip_SetDutyCycle/69 (435622670 (estimated locally),0.41 per call)
|
|
Calls: Emios_Pwm_Ip_SetInterruptRequest/18 (131211251 (estimated locally),0.12 per call) Emios_Pwm_Ip_GetCounterBusPeriod/50 (1073741824 (estimated locally),1.00 per call) Emios_Pwm_Ip_GetCounterBus/23 (1073741824 (estimated locally),1.00 per call) Emios_Pwm_Ip_GetPwmMode/27 (1073741824 (estimated locally),1.00 per call)
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Emios_Pwm_Ip_InitDeadTimeMode/54 (Emios_Pwm_Ip_InitDeadTimeMode) @07d1ce00
|
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Type: function definition analyzed
|
|
Visibility: prevailing_def_ironly
|
|
References: Emios_Pwm_Ip_aBasePtr/41 (read)Emios_Pwm_Ip_aNotif/46 (write)Emios_Pwm_Ip_aNotif/46 (write)Emios_Pwm_Ip_aNotif/46 (write)
|
|
Referring:
|
|
Availability: local
|
|
Function flags: count:1073741824 (estimated locally) body local optimize_size
|
|
Called by: Emios_Pwm_Ip_InitChannel/62 (178956970 (estimated locally),0.17 per call)
|
|
Calls: Emios_Pwm_Ip_SetEdgePolarity/24 (1073741824 (estimated locally),1.00 per call) Emios_Pwm_Ip_SetEdgePolarity/24 (708669605 (estimated locally),0.66 per call) Emios_Pwm_Ip_SetEdgePolarity/24 (365072220 (estimated locally),0.34 per call) Emios_Pwm_Ip_SetCounterBus/22 (1073741824 (estimated locally),1.00 per call) Emios_Pwm_Ip_GetCounterBusPeriod/50 (418115066 (estimated locally),0.39 per call) Emios_Pwm_Ip_GetCounterBusPeriod/50 (290554538 (estimated locally),0.27 per call)
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|
Emios_Pwm_Ip_SetDutyCycleOpwfmb/53 (Emios_Pwm_Ip_SetDutyCycleOpwfmb) @07d1cb60
|
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Type: function definition analyzed
|
|
Visibility: prevailing_def_ironly
|
|
References: Emios_Pwm_Ip_aBasePtr/41 (read)Emios_Pwm_Ip_aPeriod/43 (read)Emios_Pwm_Ip_aNotif/46 (write)Emios_Pwm_Ip_aNotif/46 (write)Emios_Pwm_Ip_aNotif/46 (write)Emios_Pwm_Ip_aNotif/46 (write)Emios_Pwm_Ip_aCheckEnableNotif/47 (read)
|
|
Referring:
|
|
Availability: local
|
|
Function flags: count:1073741824 (estimated locally) body local optimize_size
|
|
Called by: Emios_Pwm_Ip_SetDutyCycle/69 (508506948 (estimated locally),0.47 per call)
|
|
Calls: Emios_Pwm_Ip_SetInterruptRequest/18 (98408438 (estimated locally),0.09 per call)
|
|
Emios_Pwm_Ip_InitPeriodDutyCycleMode/52 (Emios_Pwm_Ip_InitPeriodDutyCycleMode) @07d1c8c0
|
|
Type: function definition analyzed
|
|
Visibility: prevailing_def_ironly
|
|
References: Emios_Pwm_Ip_aBasePtr/41 (read)Emios_Pwm_Ip_aPeriod/43 (write)Emios_Pwm_Ip_aNotif/46 (write)Emios_Pwm_Ip_aNotif/46 (write)Emios_Pwm_Ip_aNotif/46 (write)
|
|
Referring:
|
|
Availability: local
|
|
Function flags: count:1073741824 (estimated locally) body local optimize_size
|
|
Called by: Emios_Pwm_Ip_InitChannel/62 (178956970 (estimated locally),0.17 per call)
|
|
Calls: Emios_Pwm_Ip_SetEdgePolarity/24 (1073741824 (estimated locally),1.00 per call) Emios_Pwm_Ip_SetCounterBus/22 (1073741824 (estimated locally),1.00 per call)
|
|
Emios_Pwm_Ip_GetCounterBusMode/51 (Emios_Pwm_Ip_GetCounterBusMode) @07d1c620
|
|
Type: function definition analyzed
|
|
Visibility: prevailing_def_ironly
|
|
References: Emios_Pwm_Ip_aBasePtr/41 (read)
|
|
Referring:
|
|
Availability: local
|
|
Function flags: count:1073741824 (estimated locally) body local optimize_size
|
|
Called by: Emios_Pwm_Ip_SetTriggerPlacement/75 (1073741824 (estimated locally),1.00 per call) Emios_Pwm_Ip_SetPhaseShift/71 (1073741823 (estimated locally),1.00 per call) Emios_Pwm_Ip_InitTriggerMode/58 (1073741824 (estimated locally),1.00 per call)
|
|
Calls: Emios_Pwm_Ip_GetChannelPwmMode/29 (268435456 (estimated locally),0.25 per call) Emios_Pwm_Ip_GetChannelPwmMode/29 (268435456 (estimated locally),0.25 per call) Emios_Pwm_Ip_GetChannelPwmMode/29 (268435456 (estimated locally),0.25 per call)
|
|
Emios_Pwm_Ip_GetCounterBusPeriod/50 (Emios_Pwm_Ip_GetCounterBusPeriod) @07d1c380
|
|
Type: function definition analyzed
|
|
Visibility: prevailing_def_ironly
|
|
References: Emios_Pwm_Ip_aBasePtr/41 (read)
|
|
Referring:
|
|
Availability: local
|
|
Function flags: count:1073741824 (estimated locally) body local optimize_size
|
|
Called by: Emios_Pwm_Ip_SetPhaseShift/71 (1073741823 (estimated locally),1.00 per call) Emios_Pwm_Ip_GetDutyCycle/68 (214748365 (estimated locally),0.20 per call) Emios_Pwm_Ip_GetPeriod/66 (194011060 (estimated locally),0.18 per call) Emios_Pwm_Ip_SetDutyCycleOpwmt/59 (1073741824 (estimated locally),1.00 per call) Emios_Pwm_Ip_InitTriggerMode/58 (1073741824 (estimated locally),1.00 per call) Emios_Pwm_Ip_SetDutyCycleOpwmb/57 (1073741824 (estimated locally),1.00 per call) Emios_Pwm_Ip_SetDutyCycleOpwmcb/55 (1073741824 (estimated locally),1.00 per call) Emios_Pwm_Ip_InitDeadTimeMode/54 (418115066 (estimated locally),0.39 per call) Emios_Pwm_Ip_InitDeadTimeMode/54 (290554538 (estimated locally),0.27 per call)
|
|
Calls:
|
|
Emios_Pwm_Ip_aCheckState/49 (Emios_Pwm_Ip_aCheckState) @07d9b5a0
|
|
Type: variable definition analyzed
|
|
Visibility: externally_visible public
|
|
References:
|
|
Referring: Emios_Pwm_Ip_InitChannel/62 (write)Emios_Pwm_Ip_DeInitChannel/63 (write)Emios_Pwm_Ip_SyncUpdate/90 (read)
|
|
Availability: available
|
|
Varpool flags: initialized
|
|
Emios_Pwm_Ip_aPolarity/48 (Emios_Pwm_Ip_aPolarity) @07d9b510
|
|
Type: variable definition analyzed
|
|
Visibility: externally_visible public
|
|
References:
|
|
Referring: Emios_Pwm_Ip_InitDoubleCompareMode/60 (write)Emios_Pwm_Ip_SetDutyCycleDaoc/61 (read)Emios_Pwm_Ip_SetDutyCycleDaoc/61 (read)Emios_Pwm_Ip_SetDutyCycleDaoc/61 (read)
|
|
Availability: available
|
|
Varpool flags: initialized
|
|
Emios_Pwm_Ip_aCheckEnableNotif/47 (Emios_Pwm_Ip_aCheckEnableNotif) @07d9b480
|
|
Type: variable definition analyzed
|
|
Visibility: externally_visible public
|
|
References:
|
|
Referring: Emios_Pwm_Ip_SetDutyCycleOpwmb/57 (read)Emios_Pwm_Ip_SetDutyCycleOpwmt/59 (read)Emios_Pwm_Ip_DeInitChannel/63 (write)Emios_Pwm_Ip_SetDutyCycleOpwfmb/53 (read)Emios_Pwm_Ip_SetDutyCycleOpwmcb/55 (read)Emios_Pwm_Ip_SetFlagRequest/79 (write)Emios_Pwm_Ip_SetFlagRequest/79 (write)
|
|
Availability: available
|
|
Varpool flags: initialized
|
|
Emios_Pwm_Ip_aNotif/46 (Emios_Pwm_Ip_aNotif) @07d9b3f0
|
|
Type: variable definition analyzed
|
|
Visibility: externally_visible public
|
|
References:
|
|
Referring: Emios_Pwm_Ip_SetDutyCycleOpwmb/57 (write)Emios_Pwm_Ip_SetDutyCycleOpwmb/57 (write)Emios_Pwm_Ip_InitTriggerMode/58 (write)Emios_Pwm_Ip_InitPeriodDutyCycleMode/52 (write)Emios_Pwm_Ip_InitPeriodDutyCycleMode/52 (write)Emios_Pwm_Ip_InitPeriodDutyCycleMode/52 (write)Emios_Pwm_Ip_InitDeadTimeMode/54 (write)Emios_Pwm_Ip_InitDeadTimeMode/54 (write)Emios_Pwm_Ip_InitDeadTimeMode/54 (write)Emios_Pwm_Ip_InitEdgePlacementMode/56 (write)Emios_Pwm_Ip_InitEdgePlacementMode/56 (write)Emios_Pwm_Ip_InitEdgePlacementMode/56 (write)Emios_Pwm_Ip_InitTriggerMode/58 (write)Emios_Pwm_Ip_InitTriggerMode/58 (write)Emios_Pwm_Ip_SetDutyCycleOpwmt/59 (write)Emios_Pwm_Ip_SetDutyCycleOpwmb/57 (write)Emios_Pwm_Ip_InitDoubleCompareMode/60 (write)Emios_Pwm_Ip_InitDoubleCompareMode/60 (write)Emios_Pwm_Ip_InitDoubleCompareMode/60 (write)Emios_Pwm_Ip_SetDutyCycleOpwfmb/53 (write)Emios_Pwm_Ip_SetDutyCycleOpwfmb/53 (write)Emios_Pwm_Ip_SetDutyCycleOpwfmb/53 (write)Emios_Pwm_Ip_SetDutyCycleOpwmcb/55 (write)Emios_Pwm_Ip_SetDutyCycleOpwmcb/55 (write)Emios_Pwm_Ip_SetDutyCycleOpwmcb/55 (write)Emios_Pwm_Ip_SetDutyCycleOpwmt/59 (write)Emios_Pwm_Ip_SetDutyCycleOpwmt/59 (write)Emios_Pwm_Ip_SetFlagRequest/79 (read)Emios_Pwm_Ip_SetDutyCycleOpwfmb/53 (write)Emios_Pwm_Ip_SetDutyCycleDaoc/61 (write)Emios_Pwm_Ip_SetDutyCycleDaoc/61 (write)Emios_Pwm_Ip_SetDutyCycleDaoc/61 (write)
|
|
Availability: available
|
|
Varpool flags: initialized
|
|
Emios_Pwm_Ip_aDaocDuty/45 (Emios_Pwm_Ip_aDaocDuty) @07d9b360
|
|
Type: variable definition analyzed
|
|
Visibility: externally_visible public
|
|
References:
|
|
Referring: Emios_Pwm_Ip_InitDoubleCompareMode/60 (write)Emios_Pwm_Ip_InitDoubleCompareMode/60 (write)Emios_Pwm_Ip_InitDoubleCompareMode/60 (write)Emios_Pwm_Ip_GetDutyCycle/68 (read)Emios_Pwm_Ip_SetDutyCycleDaoc/61 (write)Emios_Pwm_Ip_SetDutyCycleDaoc/61 (write)Emios_Pwm_Ip_SetDutyCycleDaoc/61 (write)
|
|
Availability: available
|
|
Varpool flags: initialized
|
|
Emios_Pwm_Ip_aRegA/44 (Emios_Pwm_Ip_aRegA) @07d9b2d0
|
|
Type: variable definition analyzed
|
|
Visibility: externally_visible public
|
|
References:
|
|
Referring: Emios_Pwm_Ip_InitTriggerMode/58 (write)Emios_Pwm_Ip_InitEdgePlacementMode/56 (write)Emios_Pwm_Ip_SetDutyCycleOpwmb/57 (read)Emios_Pwm_Ip_SetDutyCycleOpwmt/59 (read)Emios_Pwm_Ip_SetDutyCycleOpwmb/57 (read)Emios_Pwm_Ip_SetDutyCycleOpwmt/59 (read)Emios_Pwm_Ip_SetPhaseShift/71 (write)
|
|
Availability: available
|
|
Varpool flags: initialized
|
|
Emios_Pwm_Ip_aPeriod/43 (Emios_Pwm_Ip_aPeriod) @07d9b240
|
|
Type: variable definition analyzed
|
|
Visibility: externally_visible public
|
|
References:
|
|
Referring: Emios_Pwm_Ip_SetPeriod/67 (write)Emios_Pwm_Ip_InitDoubleCompareMode/60 (write)Emios_Pwm_Ip_GetPeriod/66 (read)Emios_Pwm_Ip_InitPeriodDutyCycleMode/52 (write)Emios_Pwm_Ip_SetDutyCycleOpwfmb/53 (read)Emios_Pwm_Ip_InitDoubleCompareMode/60 (read)Emios_Pwm_Ip_SetDutyCycleDaoc/61 (read)
|
|
Availability: available
|
|
Varpool flags: initialized
|
|
Emios_Pwm_Ip_aNotificationPtr/42 (Emios_Pwm_Ip_aNotificationPtr) @07d9b168
|
|
Type: variable definition analyzed
|
|
Visibility: externally_visible public
|
|
References:
|
|
Referring: Emios_Pwm_Ip_InitChannel/62 (write)
|
|
Availability: available
|
|
Varpool flags: initialized
|
|
Emios_Pwm_Ip_aBasePtr/41 (Emios_Pwm_Ip_aBasePtr) @07d92f78
|
|
Type: variable definition analyzed
|
|
Visibility: externally_visible public
|
|
References:
|
|
Referring: Emios_Pwm_Ip_SetPreEnableClock/85 (read)Emios_Pwm_Ip_GetMasterBusChannel/84 (read)Emios_Pwm_Ip_GetCounterBusPeriod/50 (read)Emios_Pwm_Ip_InitPeriodDutyCycleMode/52 (read)Emios_Pwm_Ip_SetBusSelected/86 (read)Emios_Pwm_Ip_InitDeadTimeMode/54 (read)Emios_Pwm_Ip_InitEdgePlacementMode/56 (read)Emios_Pwm_Ip_SetClockPs/87 (read)Emios_Pwm_Ip_GetChannelMode/83 (read)Emios_Pwm_Ip_InitTriggerMode/58 (read)Emios_Pwm_Ip_SetDutyCycleOpwmt/59 (read)Emios_Pwm_Ip_DeInitChannel/63 (read)Emios_Pwm_Ip_ForceMatchLeadingEdge/64 (read)Emios_Pwm_Ip_ForceMatchTrailingEdge/65 (read)Emios_Pwm_Ip_GetPeriod/66 (read)Emios_Pwm_Ip_InitChannel/62 (read)Emios_Pwm_Ip_GetCounterBusMode/51 (read)Emios_Pwm_Ip_SetDutyCycleOpwfmb/53 (read)Emios_Pwm_Ip_SetDutyCycleOpwmcb/55 (read)Emios_Pwm_Ip_InitDoubleCompareMode/60 (read)Emios_Pwm_Ip_SetDutyCycleOpwmb/57 (read)Emios_Pwm_Ip_SetPeriod/67 (read)Emios_Pwm_Ip_GetDutyCycle/68 (read)Emios_Pwm_Ip_GetPhaseShift/70 (read)Emios_Pwm_Ip_SetPhaseShift/71 (read)Emios_Pwm_Ip_GetDeadTime/72 (read)Emios_Pwm_Ip_SetDeadTime/73 (read)Emios_Pwm_Ip_GetTriggerPlacement/74 (read)Emios_Pwm_Ip_SetTriggerPlacement/75 (read)Emios_Pwm_Ip_ChannelEnterDebugMode/76 (read)Emios_Pwm_Ip_ChannelStopDebugMode/77 (read)Emios_Pwm_Ip_GetFlagRequest/78 (read)Emios_Pwm_Ip_SetFlagRequest/79 (read)Emios_Pwm_Ip_GetOutputState/80 (read)Emios_Pwm_Ip_SetOutputState/81 (read)Emios_Pwm_Ip_SetOutputToNormal/82 (read)Emios_Pwm_Ip_SetDutyCycleDaoc/61 (read)Emios_Pwm_Ip_SetDutyCycle/69 (read)Emios_Pwm_Ip_SyncUpdate/90 (read)
|
|
Availability: available
|
|
Varpool flags: initialized read-only const-value-known
|
|
Emios_Pwm_Ip_SetPrescalerSource/40 (Emios_Pwm_Ip_SetPrescalerSource) @06a43d20
|
|
Type: function definition analyzed
|
|
Visibility: prevailing_def_ironly
|
|
References:
|
|
Referring:
|
|
Availability: local
|
|
Function flags: count:1073741824 (estimated locally) body local optimize_size
|
|
Called by: Emios_Pwm_Ip_InitChannel/62 (524845003 (estimated locally),0.49 per call)
|
|
Calls:
|
|
Emios_Pwm_Ip_SetExtendedPrescaler/39 (Emios_Pwm_Ip_SetExtendedPrescaler) @06a439a0
|
|
Type: function definition analyzed
|
|
Visibility: prevailing_def_ironly
|
|
References:
|
|
Referring:
|
|
Availability: local
|
|
Function flags: count:1073741824 (estimated locally) body local optimize_size
|
|
Called by: Emios_Pwm_Ip_SetClockPs/87 (1073741824 (estimated locally),1.00 per call) Emios_Pwm_Ip_InitChannel/62 (524845003 (estimated locally),0.49 per call)
|
|
Calls:
|
|
Emios_Pwm_Ip_GetChannelPwmMode/29 (Emios_Pwm_Ip_GetChannelPwmMode) @06a38a80
|
|
Type: function definition analyzed
|
|
Visibility: prevailing_def_ironly
|
|
References:
|
|
Referring:
|
|
Availability: local
|
|
Function flags: count:1073527120 (estimated locally) body local optimize_size
|
|
Called by: Emios_Pwm_Ip_GetCounterBusMode/51 (268435456 (estimated locally),0.25 per call) Emios_Pwm_Ip_GetCounterBusMode/51 (268435456 (estimated locally),0.25 per call) Emios_Pwm_Ip_GetCounterBusMode/51 (268435456 (estimated locally),0.25 per call)
|
|
Calls:
|
|
Emios_Pwm_Ip_SetPwmModePol/28 (Emios_Pwm_Ip_SetPwmModePol) @06a387e0
|
|
Type: function definition analyzed
|
|
Visibility: prevailing_def_ironly
|
|
References:
|
|
Referring:
|
|
Availability: local
|
|
Function flags: count:1073741824 (estimated locally) body local optimize_size
|
|
Called by: Emios_Pwm_Ip_SetOutputToNormal/82 (66769924 (estimated locally),0.06 per call) Emios_Pwm_Ip_SetOutputToNormal/82 (34396628 (estimated locally),0.03 per call)
|
|
Calls:
|
|
Emios_Pwm_Ip_GetPwmMode/27 (Emios_Pwm_Ip_GetPwmMode) @06a38380
|
|
Type: function definition analyzed
|
|
Visibility: prevailing_def_ironly
|
|
References:
|
|
Referring:
|
|
Availability: local
|
|
Function flags: count:1073741824 (estimated locally) body local optimize_size
|
|
Called by: Emios_Pwm_Ip_SyncUpdate/90 (104316166 (estimated locally),2.43 per call) Emios_Pwm_Ip_SetDutyCycle/69 (1073741824 (estimated locally),1.00 per call) Emios_Pwm_Ip_GetChannelMode/83 (1073741824 (estimated locally),1.00 per call) Emios_Pwm_Ip_SetOutputToNormal/82 (1073741824 (estimated locally),1.00 per call) Emios_Pwm_Ip_SetPhaseShift/71 (1073741823 (estimated locally),1.00 per call) Emios_Pwm_Ip_GetDutyCycle/68 (1073741824 (estimated locally),1.00 per call) Emios_Pwm_Ip_GetPeriod/66 (1073741824 (estimated locally),1.00 per call) Emios_Pwm_Ip_DeInitChannel/63 (1073741824 (estimated locally),1.00 per call) Emios_Pwm_Ip_SetDutyCycleOpwmcb/55 (1073741824 (estimated locally),1.00 per call)
|
|
Calls:
|
|
Emios_Pwm_Ip_SetEdgePolarity/24 (Emios_Pwm_Ip_SetEdgePolarity) @06a33a80
|
|
Type: function definition analyzed
|
|
Visibility: prevailing_def_ironly
|
|
References:
|
|
Referring:
|
|
Availability: local
|
|
Function flags: count:1073741824 (estimated locally) body local optimize_size
|
|
Called by: Emios_Pwm_Ip_SetDutyCycleDaoc/61 (131867307 (estimated locally),0.12 per call) Emios_Pwm_Ip_SetDutyCycleDaoc/61 (137910326 (estimated locally),0.13 per call) Emios_Pwm_Ip_SetDutyCycleDaoc/61 (535528735 (estimated locally),0.50 per call) Emios_Pwm_Ip_InitDoubleCompareMode/60 (351646152 (estimated locally),0.33 per call) Emios_Pwm_Ip_InitDoubleCompareMode/60 (367760870 (estimated locally),0.34 per call) Emios_Pwm_Ip_InitDoubleCompareMode/60 (354334802 (estimated locally),0.33 per call) Emios_Pwm_Ip_InitDoubleCompareMode/60 (1073741824 (estimated locally),1.00 per call) Emios_Pwm_Ip_InitDoubleCompareMode/60 (708669605 (estimated locally),0.66 per call) Emios_Pwm_Ip_InitDoubleCompareMode/60 (365072220 (estimated locally),0.34 per call) Emios_Pwm_Ip_SetOutputToNormal/82 (34396628 (estimated locally),0.03 per call) Emios_Pwm_Ip_SetOutputToNormal/82 (91013306 (estimated locally),0.08 per call) Emios_Pwm_Ip_SetOutputToNormal/82 (172892362 (estimated locally),0.16 per call) Emios_Pwm_Ip_InitTriggerMode/58 (1073741824 (estimated locally),1.00 per call) Emios_Pwm_Ip_InitTriggerMode/58 (708669605 (estimated locally),0.66 per call) Emios_Pwm_Ip_InitTriggerMode/58 (365072220 (estimated locally),0.34 per call) Emios_Pwm_Ip_InitEdgePlacementMode/56 (1073741824 (estimated locally),1.00 per call) Emios_Pwm_Ip_InitDeadTimeMode/54 (1073741824 (estimated locally),1.00 per call) Emios_Pwm_Ip_InitDeadTimeMode/54 (708669605 (estimated locally),0.66 per call) Emios_Pwm_Ip_InitDeadTimeMode/54 (365072220 (estimated locally),0.34 per call) Emios_Pwm_Ip_InitPeriodDutyCycleMode/52 (1073741824 (estimated locally),1.00 per call)
|
|
Calls:
|
|
Emios_Pwm_Ip_GetCounterBus/23 (Emios_Pwm_Ip_GetCounterBus) @06a33700
|
|
Type: function definition analyzed
|
|
Visibility: prevailing_def_ironly
|
|
References:
|
|
Referring:
|
|
Availability: local
|
|
Function flags: count:1073741824 (estimated locally) body local optimize_size
|
|
Called by: Emios_Pwm_Ip_GetMasterBusChannel/84 (1073741824 (estimated locally),1.00 per call) Emios_Pwm_Ip_SetTriggerPlacement/75 (1073741824 (estimated locally),1.00 per call) Emios_Pwm_Ip_SetPhaseShift/71 (1073741823 (estimated locally),1.00 per call) Emios_Pwm_Ip_SetPhaseShift/71 (1073741823 (estimated locally),1.00 per call) Emios_Pwm_Ip_GetDutyCycle/68 (214748365 (estimated locally),0.20 per call) Emios_Pwm_Ip_GetPeriod/66 (194011060 (estimated locally),0.18 per call) Emios_Pwm_Ip_SetDutyCycleOpwmt/59 (1073741824 (estimated locally),1.00 per call) Emios_Pwm_Ip_SetDutyCycleOpwmb/57 (1073741824 (estimated locally),1.00 per call) Emios_Pwm_Ip_SetDutyCycleOpwmcb/55 (1073741824 (estimated locally),1.00 per call)
|
|
Calls:
|
|
Emios_Pwm_Ip_SetCounterBus/22 (Emios_Pwm_Ip_SetCounterBus) @06a33460
|
|
Type: function definition analyzed
|
|
Visibility: prevailing_def_ironly
|
|
References:
|
|
Referring:
|
|
Availability: local
|
|
Function flags: count:1073741824 (estimated locally) body local optimize_size
|
|
Called by: Emios_Pwm_Ip_SetBusSelected/86 (1073741824 (estimated locally),1.00 per call) Emios_Pwm_Ip_InitDoubleCompareMode/60 (1073741824 (estimated locally),1.00 per call) Emios_Pwm_Ip_InitTriggerMode/58 (1073741824 (estimated locally),1.00 per call) Emios_Pwm_Ip_InitEdgePlacementMode/56 (1073741824 (estimated locally),1.00 per call) Emios_Pwm_Ip_InitDeadTimeMode/54 (1073741824 (estimated locally),1.00 per call) Emios_Pwm_Ip_InitPeriodDutyCycleMode/52 (1073741824 (estimated locally),1.00 per call)
|
|
Calls:
|
|
Emios_Pwm_Ip_SetForceMatchB/21 (Emios_Pwm_Ip_SetForceMatchB) @06a330e0
|
|
Type: function definition analyzed
|
|
Visibility: prevailing_def_ironly
|
|
References:
|
|
Referring:
|
|
Availability: local
|
|
Function flags: count:1073741824 (estimated locally) body local optimize_size
|
|
Called by: Emios_Pwm_Ip_ForceMatchTrailingEdge/65 (1073741824 (estimated locally),1.00 per call)
|
|
Calls:
|
|
Emios_Pwm_Ip_SetForceMatchA/20 (Emios_Pwm_Ip_SetForceMatchA) @06a2ed20
|
|
Type: function definition analyzed
|
|
Visibility: prevailing_def_ironly
|
|
References:
|
|
Referring:
|
|
Availability: local
|
|
Function flags: count:1073741824 (estimated locally) body local optimize_size
|
|
Called by: Emios_Pwm_Ip_ForceMatchLeadingEdge/64 (1073741824 (estimated locally),1.00 per call)
|
|
Calls:
|
|
Emios_Pwm_Ip_SetInterruptRequest/18 (Emios_Pwm_Ip_SetInterruptRequest) @06a2e700
|
|
Type: function definition analyzed
|
|
Visibility: prevailing_def_ironly
|
|
References:
|
|
Referring:
|
|
Availability: local
|
|
Function flags: count:1073741824 (estimated locally) body local optimize_size
|
|
Called by: Emios_Pwm_Ip_SetDutyCycleOpwmt/59 (116930485 (estimated locally),0.11 per call) Emios_Pwm_Ip_SetDutyCycleOpwmb/57 (131211251 (estimated locally),0.12 per call) Emios_Pwm_Ip_SetDutyCycleOpwmcb/55 (131211251 (estimated locally),0.12 per call) Emios_Pwm_Ip_SetDutyCycleOpwfmb/53 (98408438 (estimated locally),0.09 per call)
|
|
Calls:
|
|
Emios_Pwm_Ip_SetPrescalerEnable/15 (Emios_Pwm_Ip_SetPrescalerEnable) @06a28d20
|
|
Type: function definition analyzed
|
|
Visibility: prevailing_def_ironly
|
|
References:
|
|
Referring:
|
|
Availability: local
|
|
Function flags: count:1073741824 (estimated locally) body local optimize_size
|
|
Called by: Emios_Pwm_Ip_SetPreEnableClock/85 (1073741824 (estimated locally),1.00 per call)
|
|
Calls:
|
|
Emios_Pwm_Ip_SetOutDisableSource/14 (Emios_Pwm_Ip_SetOutDisableSource) @06a289a0
|
|
Type: function definition analyzed
|
|
Visibility: prevailing_def_ironly
|
|
References:
|
|
Referring:
|
|
Availability: local
|
|
Function flags: count:1073741824 (estimated locally) body local optimize_size
|
|
Called by: Emios_Pwm_Ip_InitChannel/62 (524740055 (estimated locally),0.49 per call)
|
|
Calls:
|
|
Emios_Pwm_Ip_SyncUpdate (uint8 instance)
|
|
{
|
|
uint8 channelId;
|
|
uint8 oudisDisable;
|
|
Emios_Pwm_Ip_PwmModeType chMode;
|
|
uint32 channelMask;
|
|
struct Emios_Pwm_Ip_HwAddrType * const base;
|
|
int _1;
|
|
int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _6;
|
|
unsigned char _7;
|
|
long unsigned int _25;
|
|
long unsigned int _26;
|
|
short unsigned int _27;
|
|
long unsigned int _28;
|
|
long unsigned int _29;
|
|
long unsigned int _30;
|
|
long unsigned int _31;
|
|
long unsigned int _32;
|
|
long unsigned int _33;
|
|
|
|
<bb 2> [local count: 42949672]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) instance_14(D);
|
|
base_16 = Emios_Pwm_Ip_aBasePtr[_1];
|
|
# DEBUG base => base_16
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG base => base_16
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_GetOutputUpdateInstance
|
|
# DEBUG BEGIN_STMT
|
|
_25 ={v} MEM[(const struct Emios_Pwm_Ip_HwAddrType *)base_16].OUDIS;
|
|
# DEBUG base => NULL
|
|
# DEBUG oudisRegVal => _25
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG channelMask => 0
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG oudisDisable => 0
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG channelId => 0
|
|
goto <bb 14>; [100.00%]
|
|
|
|
<bb 3> [local count: 1030792152]:
|
|
# DEBUG BEGIN_STMT
|
|
_2 = (int) channelId_10;
|
|
_3 = 1 << _2;
|
|
_4 = _3 & _25;
|
|
_6 = _4 >> _2;
|
|
oudisDisable_18 = (uint8) _6;
|
|
# DEBUG oudisDisable => oudisDisable_18
|
|
# DEBUG BEGIN_STMT
|
|
_7 = Emios_Pwm_Ip_aCheckState[_1][_2];
|
|
if (_7 != 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 13>; [50.00%]
|
|
|
|
<bb 4> [local count: 515396076]:
|
|
if (oudisDisable_18 == 1)
|
|
goto <bb 5>; [20.24%]
|
|
else
|
|
goto <bb 13>; [79.76%]
|
|
|
|
<bb 5> [local count: 104316166]:
|
|
# DEBUG BEGIN_STMT
|
|
chMode_20 = Emios_Pwm_Ip_GetPwmMode (base_16, channelId_10);
|
|
# DEBUG chMode => chMode_20
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG base => base_16
|
|
# DEBUG channel => channelId_10
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_GetUCRegA
|
|
# DEBUG BEGIN_STMT
|
|
_26 ={v} MEM[(const struct Emios_Pwm_Ip_HwAddrType *)base_16].CH.UC[_2].A;
|
|
_27 = (short unsigned int) _26;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
if (_27 == 1)
|
|
goto <bb 6>; [34.00%]
|
|
else
|
|
goto <bb 12>; [66.00%]
|
|
|
|
<bb 6> [local count: 35467496]:
|
|
# DEBUG BEGIN_STMT
|
|
if (chMode_20 == 92)
|
|
goto <bb 8>; [20.24%]
|
|
else
|
|
goto <bb 7>; [79.76%]
|
|
|
|
<bb 7> [local count: 28288875]:
|
|
if (chMode_20 == 94)
|
|
goto <bb 8>; [34.00%]
|
|
else
|
|
goto <bb 9>; [66.00%]
|
|
|
|
<bb 8> [local count: 16796839]:
|
|
# DEBUG BEGIN_STMT
|
|
Emios_Mcl_Ip_ComparatorTransferEnable (instance_14(D), _3);
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG base => base_16
|
|
# DEBUG channel => channelId_10
|
|
# DEBUG value => 1
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_SetForceMatchB
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG value_convert => 1
|
|
# DEBUG BEGIN_STMT
|
|
_28 ={v} base_16->CH.UC[_2].C;
|
|
_29 = _28 & 4294963199;
|
|
_30 = _29 | 4096;
|
|
base_16->CH.UC[_2].C ={v} _30;
|
|
goto <bb 12>; [100.00%]
|
|
|
|
<bb 9> [local count: 18670658]:
|
|
# DEBUG BEGIN_STMT
|
|
if (chMode_20 == 93)
|
|
goto <bb 11>; [20.24%]
|
|
else
|
|
goto <bb 10>; [79.76%]
|
|
|
|
<bb 10> [local count: 14891716]:
|
|
if (chMode_20 == 95)
|
|
goto <bb 11>; [34.00%]
|
|
else
|
|
goto <bb 12>; [66.00%]
|
|
|
|
<bb 11> [local count: 8842125]:
|
|
# DEBUG BEGIN_STMT
|
|
Emios_Mcl_Ip_ComparatorTransferEnable (instance_14(D), _3);
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG base => base_16
|
|
# DEBUG channel => channelId_10
|
|
# DEBUG value => 1
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_SetForceMatchA
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG value_convert => 1
|
|
# DEBUG BEGIN_STMT
|
|
_31 ={v} base_16->CH.UC[_2].C;
|
|
_32 = _31 & 4294959103;
|
|
_33 = _32 | 8192;
|
|
base_16->CH.UC[_2].C ={v} _33;
|
|
|
|
<bb 12> [local count: 104316166]:
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG value => NULL
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG value => NULL
|
|
# DEBUG BEGIN_STMT
|
|
channelMask_23 = _3 | channelMask_9;
|
|
# DEBUG channelMask => channelMask_23
|
|
|
|
<bb 13> [local count: 1030792152]:
|
|
# channelMask_8 = PHI <channelMask_9(3), channelMask_9(4), channelMask_23(12)>
|
|
# DEBUG channelMask => channelMask_8
|
|
# DEBUG BEGIN_STMT
|
|
channelId_24 = channelId_10 + 1;
|
|
# DEBUG channelId => channelId_24
|
|
|
|
<bb 14> [local count: 1073741824]:
|
|
# channelMask_9 = PHI <0(2), channelMask_8(13)>
|
|
# channelId_10 = PHI <0(2), channelId_24(13)>
|
|
# DEBUG channelId => channelId_10
|
|
# DEBUG channelMask => channelMask_9
|
|
# DEBUG BEGIN_STMT
|
|
if (channelId_10 != 24)
|
|
goto <bb 3>; [96.00%]
|
|
else
|
|
goto <bb 15>; [4.00%]
|
|
|
|
<bb 15> [local count: 42949673]:
|
|
# channelMask_5 = PHI <channelMask_9(14)>
|
|
# DEBUG BEGIN_STMT
|
|
Emios_Mcl_Ip_ComparatorTransferEnable (instance_14(D), channelMask_5);
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Emios_Pwm_Ip_ComparatorTransferDisable (uint8 instance, uint32 channelMask)
|
|
{
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_30 ();
|
|
# DEBUG BEGIN_STMT
|
|
Emios_Mcl_Ip_ComparatorTransferDisable (instance_3(D), channelMask_4(D));
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_30 ();
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Emios_Pwm_Ip_ComparatorTransferEnable (uint8 instance, uint32 channelMask)
|
|
{
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_29 ();
|
|
# DEBUG BEGIN_STMT
|
|
Emios_Mcl_Ip_ComparatorTransferEnable (instance_3(D), channelMask_4(D));
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_29 ();
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Emios_Pwm_Ip_SetClockPs (uint8 instance, uint8 channel, Emios_Pwm_Ip_InternalClkPsType value)
|
|
{
|
|
struct Emios_Pwm_Ip_HwAddrType * const base;
|
|
int _1;
|
|
long unsigned int _10;
|
|
long unsigned int _11;
|
|
long unsigned int _12;
|
|
int _13;
|
|
long unsigned int _14;
|
|
long unsigned int _15;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) instance_2(D);
|
|
base_4 = Emios_Pwm_Ip_aBasePtr[_1];
|
|
# DEBUG base => base_4
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_28 ();
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG base => base_4
|
|
# DEBUG channel => channel_6(D)
|
|
# DEBUG value => 0
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_SetPrescalerEnable
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG value_convert => 0
|
|
# DEBUG BEGIN_STMT
|
|
_13 = (int) channel_6(D);
|
|
_14 ={v} base_4->CH.UC[_13].C;
|
|
_15 = _14 & 4261412863;
|
|
base_4->CH.UC[_13].C ={v} _15;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG value => NULL
|
|
# DEBUG BEGIN_STMT
|
|
Emios_Pwm_Ip_SetExtendedPrescaler (base_4, channel_6(D), value_7(D));
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG base => base_4
|
|
# DEBUG channel => channel_6(D)
|
|
# DEBUG value => 1
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_SetPrescalerEnable
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG value_convert => 1
|
|
# DEBUG BEGIN_STMT
|
|
_10 ={v} base_4->CH.UC[_13].C;
|
|
_11 = _10 & 4261412863;
|
|
_12 = _11 | 33554432;
|
|
base_4->CH.UC[_13].C ={v} _12;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG value => NULL
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_28 ();
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Emios_Pwm_Ip_SetBusSelected (uint8 instance, uint8 channel, Emios_Pwm_Ip_CounterBusSourceType value)
|
|
{
|
|
struct Emios_Pwm_Ip_HwAddrType * const base;
|
|
int _1;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) instance_2(D);
|
|
base_4 = Emios_Pwm_Ip_aBasePtr[_1];
|
|
# DEBUG base => base_4
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_27 ();
|
|
# DEBUG BEGIN_STMT
|
|
Emios_Pwm_Ip_SetCounterBus (base_4, channel_6(D), value_7(D));
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_27 ();
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Emios_Pwm_Ip_SetPreEnableClock (uint8 instance, uint8 channel, boolean value)
|
|
{
|
|
struct Emios_Pwm_Ip_HwAddrType * const base;
|
|
int _1;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) instance_2(D);
|
|
base_4 = Emios_Pwm_Ip_aBasePtr[_1];
|
|
# DEBUG base => base_4
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_26 ();
|
|
# DEBUG BEGIN_STMT
|
|
Emios_Pwm_Ip_SetPrescalerEnable (base_4, channel_6(D), value_7(D));
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_26 ();
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Emios_Pwm_Ip_GetMasterBusChannel (uint8 instance, uint8 channel)
|
|
{
|
|
Emios_Pwm_Ip_CounterBusSourceType counterBus;
|
|
uint8 channelMaster;
|
|
const struct Emios_Pwm_Ip_HwAddrType * const base;
|
|
int _1;
|
|
unsigned char _2;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) instance_4(D);
|
|
base_6 = Emios_Pwm_Ip_aBasePtr[_1];
|
|
# DEBUG base => base_6
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG channelMaster => channel_7(D)
|
|
# DEBUG BEGIN_STMT
|
|
counterBus_9 = Emios_Pwm_Ip_GetCounterBus (base_6, channel_7(D));
|
|
# DEBUG counterBus => counterBus_9
|
|
# DEBUG BEGIN_STMT
|
|
switch (counterBus_9) <default: <L3> [25.00%], case 0: <L6> [25.00%], case 1: <L2> [25.00%], case 2: <L1> [25.00%]>
|
|
|
|
<bb 3> [local count: 268435456]:
|
|
<L1>:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG channelMaster => 22
|
|
# DEBUG BEGIN_STMT
|
|
goto <bb 6>; [100.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
<L2>:
|
|
# DEBUG BEGIN_STMT
|
|
_2 = channel_7(D) >> 3;
|
|
channelMaster_10 = _2 * 8;
|
|
# DEBUG channelMaster => channelMaster_10
|
|
# DEBUG BEGIN_STMT
|
|
goto <bb 6>; [100.00%]
|
|
|
|
<bb 5> [local count: 268435456]:
|
|
<L3>:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG channelMaster => channel_7(D)
|
|
# DEBUG BEGIN_STMT
|
|
|
|
<bb 6> [local count: 1073741824]:
|
|
# channelMaster_3 = PHI <23(2), 22(3), channelMaster_10(4), channel_7(D)(5)>
|
|
<L6>:
|
|
# DEBUG channelMaster => channelMaster_3
|
|
# DEBUG BEGIN_STMT
|
|
return channelMaster_3;
|
|
|
|
}
|
|
|
|
|
|
Emios_Pwm_Ip_GetChannelMode (uint8 instance, uint8 channel)
|
|
{
|
|
Emios_Pwm_Ip_PwmModeType channelMode;
|
|
const struct Emios_Pwm_Ip_HwAddrType * const base;
|
|
int _1;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) instance_2(D);
|
|
base_4 = Emios_Pwm_Ip_aBasePtr[_1];
|
|
# DEBUG base => base_4
|
|
# DEBUG BEGIN_STMT
|
|
channelMode_7 = Emios_Pwm_Ip_GetPwmMode (base_4, channel_5(D));
|
|
# DEBUG channelMode => channelMode_7
|
|
# DEBUG BEGIN_STMT
|
|
return channelMode_7;
|
|
|
|
}
|
|
|
|
|
|
Emios_Pwm_Ip_SetOutputToNormal (uint8 instance, uint8 channel, uint16 dutyPercent, Emios_Pwm_Ip_PolarityType polarity, Emios_Pwm_Ip_PwmModeType mode)
|
|
{
|
|
struct Emios_Pwm_Ip_HwAddrType * const base;
|
|
int _1;
|
|
<unnamed type> _2;
|
|
_Bool _3;
|
|
<unnamed type> _4;
|
|
_Bool _5;
|
|
<unnamed type> _6;
|
|
int _23;
|
|
long unsigned int _24;
|
|
long unsigned int _25;
|
|
<unnamed type> _26;
|
|
long unsigned int _27;
|
|
long unsigned int _28;
|
|
int _29;
|
|
long unsigned int _30;
|
|
long unsigned int _31;
|
|
<unnamed type> _32;
|
|
long unsigned int _33;
|
|
long unsigned int _34;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) instance_8(D);
|
|
base_10 = Emios_Pwm_Ip_aBasePtr[_1];
|
|
# DEBUG base => base_10
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_25 ();
|
|
# DEBUG BEGIN_STMT
|
|
_2 = Emios_Pwm_Ip_GetPwmMode (base_10, channel_12(D));
|
|
if (_2 == 1)
|
|
goto <bb 3>; [34.00%]
|
|
else
|
|
goto <bb 12>; [66.00%]
|
|
|
|
<bb 3> [local count: 365072220]:
|
|
# DEBUG BEGIN_STMT
|
|
if (mode_14(D) == 88)
|
|
goto <bb 5>; [20.24%]
|
|
else
|
|
goto <bb 4>; [79.76%]
|
|
|
|
<bb 4> [local count: 291181603]:
|
|
if (mode_14(D) == 90)
|
|
goto <bb 5>; [34.00%]
|
|
else
|
|
goto <bb 6>; [66.00%]
|
|
|
|
<bb 5> [local count: 172892362]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG base => base_10
|
|
# DEBUG channel => channel_12(D)
|
|
# DEBUG mode => mode_14(D)
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_SetPwmMode
|
|
# DEBUG BEGIN_STMT
|
|
_23 = (int) channel_12(D);
|
|
_24 ={v} base_10->CH.UC[_23].C;
|
|
_25 = _24 & 4294967168;
|
|
_26 = mode_14(D) & 127;
|
|
_27 = (long unsigned int) _26;
|
|
_28 = _25 | _27;
|
|
base_10->CH.UC[_23].C ={v} _28;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG mode => NULL
|
|
# DEBUG BEGIN_STMT
|
|
_3 = polarity_16(D) != 1;
|
|
_4 = (<unnamed type>) _3;
|
|
Emios_Pwm_Ip_SetEdgePolarity (base_10, channel_12(D), _4);
|
|
goto <bb 12>; [100.00%]
|
|
|
|
<bb 6> [local count: 192179858]:
|
|
# DEBUG BEGIN_STMT
|
|
if (mode_14(D) == 96)
|
|
goto <bb 8>; [20.24%]
|
|
else
|
|
goto <bb 7>; [79.76%]
|
|
|
|
<bb 7> [local count: 153282654]:
|
|
if (mode_14(D) == 98)
|
|
goto <bb 8>; [34.00%]
|
|
else
|
|
goto <bb 9>; [66.00%]
|
|
|
|
<bb 8> [local count: 91013306]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG base => base_10
|
|
# DEBUG channel => channel_12(D)
|
|
# DEBUG mode => mode_14(D)
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_SetPwmMode
|
|
# DEBUG BEGIN_STMT
|
|
_29 = (int) channel_12(D);
|
|
_30 ={v} base_10->CH.UC[_29].C;
|
|
_31 = _30 & 4294967168;
|
|
_32 = mode_14(D) & 127;
|
|
_33 = (long unsigned int) _32;
|
|
_34 = _31 | _33;
|
|
base_10->CH.UC[_29].C ={v} _34;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG mode => NULL
|
|
# DEBUG BEGIN_STMT
|
|
Emios_Pwm_Ip_SetEdgePolarity (base_10, channel_12(D), polarity_16(D));
|
|
goto <bb 12>; [100.00%]
|
|
|
|
<bb 9> [local count: 101166552]:
|
|
# DEBUG BEGIN_STMT
|
|
if (dutyPercent_15(D) == 32768)
|
|
goto <bb 10>; [34.00%]
|
|
else
|
|
goto <bb 11>; [66.00%]
|
|
|
|
<bb 10> [local count: 34396628]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 = polarity_16(D) != 1;
|
|
_6 = (<unnamed type>) _5;
|
|
Emios_Pwm_Ip_SetPwmModePol (base_10, channel_12(D), mode_14(D), _6);
|
|
# DEBUG BEGIN_STMT
|
|
Emios_Pwm_Ip_SetEdgePolarity (base_10, channel_12(D), polarity_16(D));
|
|
goto <bb 12>; [100.00%]
|
|
|
|
<bb 11> [local count: 66769924]:
|
|
# DEBUG BEGIN_STMT
|
|
Emios_Pwm_Ip_SetPwmModePol (base_10, channel_12(D), mode_14(D), polarity_16(D));
|
|
|
|
<bb 12> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_25 ();
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Emios_Pwm_Ip_SetOutputState (uint8 instance, uint8 channel, Emios_Pwm_Ip_OutputStateType outputState)
|
|
{
|
|
struct Emios_Pwm_Ip_HwAddrType * const base;
|
|
int _1;
|
|
int _10;
|
|
long unsigned int _11;
|
|
long unsigned int _12;
|
|
int _13;
|
|
long unsigned int _14;
|
|
long unsigned int _15;
|
|
long unsigned int _16;
|
|
long unsigned int _17;
|
|
long unsigned int _18;
|
|
long unsigned int _19;
|
|
long unsigned int _20;
|
|
int _21;
|
|
long unsigned int _22;
|
|
long unsigned int _23;
|
|
long unsigned int _24;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) instance_3(D);
|
|
base_5 = Emios_Pwm_Ip_aBasePtr[_1];
|
|
# DEBUG base => base_5
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_24 ();
|
|
# DEBUG BEGIN_STMT
|
|
if (outputState_7(D) == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 4>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG base => base_5
|
|
# DEBUG channel => channel_8(D)
|
|
# DEBUG value => 0
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_SetEdgePolarity
|
|
# DEBUG BEGIN_STMT
|
|
_10 = (int) channel_8(D);
|
|
_11 ={v} base_5->CH.UC[_10].C;
|
|
_12 = _11 & 4294967167;
|
|
base_5->CH.UC[_10].C ={v} _12;
|
|
goto <bb 5>; [100.00%]
|
|
|
|
<bb 4> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG base => base_5
|
|
# DEBUG channel => channel_8(D)
|
|
# DEBUG value => 1
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_SetEdgePolarity
|
|
# DEBUG BEGIN_STMT
|
|
_13 = (int) channel_8(D);
|
|
_14 ={v} base_5->CH.UC[_13].C;
|
|
_15 = _14 & 4294967167;
|
|
_16 = _15 | 128;
|
|
base_5->CH.UC[_13].C ={v} _16;
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG value => NULL
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG value => NULL
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG base => base_5
|
|
# DEBUG channel => channel_8(D)
|
|
# DEBUG mode => 1
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_SetPwmMode
|
|
# DEBUG BEGIN_STMT
|
|
_21 = (int) channel_8(D);
|
|
_22 ={v} base_5->CH.UC[_21].C;
|
|
_23 = _22 & 4294967168;
|
|
_24 = _23 | 1;
|
|
base_5->CH.UC[_21].C ={v} _24;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG mode => NULL
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG base => base_5
|
|
# DEBUG channel => channel_8(D)
|
|
# DEBUG value => 0
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_SetInterruptRequest
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG value_convert => 0
|
|
# DEBUG BEGIN_STMT
|
|
_19 ={v} base_5->CH.UC[_21].C;
|
|
_20 = _19 & 4294836223;
|
|
base_5->CH.UC[_21].C ={v} _20;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG value => NULL
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG base => base_5
|
|
# DEBUG channel => channel_8(D)
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_ClearFlagEvent
|
|
# DEBUG BEGIN_STMT
|
|
_17 ={v} base_5->CH.UC[_21].S;
|
|
_18 = _17 | 1;
|
|
base_5->CH.UC[_21].S ={v} _18;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_24 ();
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Emios_Pwm_Ip_GetOutputState (uint8 instance, uint8 channel)
|
|
{
|
|
const struct Emios_Pwm_Ip_HwAddrType * const base;
|
|
int _1;
|
|
Emios_Pwm_Ip_OutputStateType iftmp.12_2;
|
|
int _7;
|
|
long unsigned int _8;
|
|
long unsigned int _9;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) instance_3(D);
|
|
base_5 = Emios_Pwm_Ip_aBasePtr[_1];
|
|
# DEBUG base => base_5
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG base => base_5
|
|
# DEBUG channel => channel_6(D)
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_GetOutputPinState
|
|
# DEBUG BEGIN_STMT
|
|
_7 = (int) channel_6(D);
|
|
_8 ={v} base_5->CH.UC[_7].S;
|
|
_9 = _8 & 2;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
if (_9 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 3>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
|
|
<bb 4> [local count: 1073741824]:
|
|
# iftmp.12_2 = PHI <0(2), 1(3)>
|
|
return iftmp.12_2;
|
|
|
|
}
|
|
|
|
|
|
Emios_Pwm_Ip_SetFlagRequest (uint8 instance, uint8 channel, Emios_Pwm_Ip_InterruptType event)
|
|
{
|
|
struct Emios_Pwm_Ip_HwAddrType * const base;
|
|
int _1;
|
|
unsigned char _2;
|
|
int _13;
|
|
long unsigned int _14;
|
|
long unsigned int _15;
|
|
long unsigned int _16;
|
|
long unsigned int _17;
|
|
long unsigned int _18;
|
|
long unsigned int _19;
|
|
long unsigned int _20;
|
|
long unsigned int _21;
|
|
long unsigned int _22;
|
|
long unsigned int _23;
|
|
long unsigned int _24;
|
|
long unsigned int _25;
|
|
long unsigned int _26;
|
|
long unsigned int _27;
|
|
long unsigned int _28;
|
|
long unsigned int _29;
|
|
long unsigned int _30;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) instance_4(D);
|
|
base_6 = Emios_Pwm_Ip_aBasePtr[_1];
|
|
# DEBUG base => base_6
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_23 ();
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG base => base_6
|
|
# DEBUG channel => channel_8(D)
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_ClearFlagEvent
|
|
# DEBUG BEGIN_STMT
|
|
_13 = (int) channel_8(D);
|
|
_14 ={v} base_6->CH.UC[_13].S;
|
|
_15 = _14 | 1;
|
|
base_6->CH.UC[_13].S ={v} _15;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG BEGIN_STMT
|
|
switch (event_9(D)) <default: <L7> [25.00%], case 0: <L12> [25.00%], case 1: <L0> [25.00%], case 2: <L11> [25.00%]>
|
|
|
|
<bb 3> [local count: 268435456]:
|
|
<L0>:
|
|
# DEBUG BEGIN_STMT
|
|
_2 = Emios_Pwm_Ip_aNotif[_1][_13];
|
|
if (_2 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 7>; [50.00%]
|
|
|
|
<bb 4> [local count: 134217728]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG base => base_6
|
|
# DEBUG channel => channel_8(D)
|
|
# DEBUG value => 1
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_SetInterruptRequest
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG value_convert => 1
|
|
# DEBUG BEGIN_STMT
|
|
_18 ={v} base_6->CH.UC[_13].C;
|
|
_19 = _18 & 4294836223;
|
|
_20 = _19 | 131072;
|
|
base_6->CH.UC[_13].C ={v} _20;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG value => NULL
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG base => base_6
|
|
# DEBUG channel => channel_8(D)
|
|
# DEBUG value => 0
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_SetDMARequest
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG value_convert => 0
|
|
# DEBUG BEGIN_STMT
|
|
_16 ={v} base_6->CH.UC[_13].C;
|
|
_17 = _16 & 4278190079;
|
|
base_6->CH.UC[_13].C ={v} _17;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG value => NULL
|
|
# DEBUG BEGIN_STMT
|
|
Emios_Pwm_Ip_aCheckEnableNotif[_1][_13] = 1;
|
|
goto <bb 7>; [100.00%]
|
|
|
|
<bb 5> [local count: 268435456]:
|
|
<L11>:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG base => base_6
|
|
# DEBUG channel => channel_8(D)
|
|
# DEBUG value => 1
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_SetInterruptRequest
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG value_convert => 1
|
|
# DEBUG BEGIN_STMT
|
|
_24 ={v} base_6->CH.UC[_13].C;
|
|
_25 = _24 & 4294836223;
|
|
_26 = _25 | 131072;
|
|
base_6->CH.UC[_13].C ={v} _26;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG value => NULL
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG base => base_6
|
|
# DEBUG channel => channel_8(D)
|
|
# DEBUG value => 1
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_SetDMARequest
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG value_convert => 1
|
|
# DEBUG BEGIN_STMT
|
|
_21 ={v} base_6->CH.UC[_13].C;
|
|
_22 = _21 & 4278190079;
|
|
_23 = _22 | 16777216;
|
|
base_6->CH.UC[_13].C ={v} _23;
|
|
goto <bb 7>; [100.00%]
|
|
|
|
<bb 6> [local count: 268435456]:
|
|
<L12>:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG base => base_6
|
|
# DEBUG channel => channel_8(D)
|
|
# DEBUG value => 0
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_SetInterruptRequest
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG value_convert => 0
|
|
# DEBUG BEGIN_STMT
|
|
_29 ={v} base_6->CH.UC[_13].C;
|
|
_30 = _29 & 4294836223;
|
|
base_6->CH.UC[_13].C ={v} _30;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG value => NULL
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG base => base_6
|
|
# DEBUG channel => channel_8(D)
|
|
# DEBUG value => 0
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_SetDMARequest
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG value_convert => 0
|
|
# DEBUG BEGIN_STMT
|
|
_27 ={v} base_6->CH.UC[_13].C;
|
|
_28 = _27 & 4278190079;
|
|
base_6->CH.UC[_13].C ={v} _28;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG value => NULL
|
|
# DEBUG BEGIN_STMT
|
|
Emios_Pwm_Ip_aCheckEnableNotif[_1][_13] = 0;
|
|
# DEBUG BEGIN_STMT
|
|
|
|
<bb 7> [local count: 1073741824]:
|
|
<L7>:
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG value => NULL
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_23 ();
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Emios_Pwm_Ip_GetFlagRequest (uint8 instance, uint8 channel)
|
|
{
|
|
Emios_Pwm_Ip_InterruptType eventType;
|
|
const struct Emios_Pwm_Ip_HwAddrType * const base;
|
|
int _1;
|
|
int _7;
|
|
long unsigned int _8;
|
|
long unsigned int _9;
|
|
long unsigned int _10;
|
|
long unsigned int _11;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) instance_3(D);
|
|
base_5 = Emios_Pwm_Ip_aBasePtr[_1];
|
|
# DEBUG base => base_5
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG eventType => 0
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG base => base_5
|
|
# DEBUG channel => channel_6(D)
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_GetInterruptRequest
|
|
# DEBUG BEGIN_STMT
|
|
_7 = (int) channel_6(D);
|
|
_8 ={v} base_5->CH.UC[_7].C;
|
|
_9 = _8 & 131072;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
if (_9 != 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG base => base_5
|
|
# DEBUG channel => channel_6(D)
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_GetDMARequest
|
|
# DEBUG BEGIN_STMT
|
|
_10 ={v} base_5->CH.UC[_7].C;
|
|
_11 = _10 & 16777216;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
if (_11 != 0)
|
|
goto <bb 5>; [35.00%]
|
|
else
|
|
goto <bb 4>; [65.00%]
|
|
|
|
<bb 4> [local count: 348966093]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG eventType => 1
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# eventType_2 = PHI <0(2), 2(3), 1(4)>
|
|
# DEBUG eventType => eventType_2
|
|
# DEBUG BEGIN_STMT
|
|
return eventType_2;
|
|
|
|
}
|
|
|
|
|
|
Emios_Pwm_Ip_ChannelStopDebugMode (uint8 instance, uint8 channel)
|
|
{
|
|
struct Emios_Pwm_Ip_HwAddrType * const base;
|
|
int _1;
|
|
int _8;
|
|
long unsigned int _9;
|
|
long unsigned int _10;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) instance_2(D);
|
|
base_4 = Emios_Pwm_Ip_aBasePtr[_1];
|
|
# DEBUG base => base_4
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_22 ();
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG base => base_4
|
|
# DEBUG channel => channel_6(D)
|
|
# DEBUG value => 0
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_SetFreezeEnable
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG value_convert => 0
|
|
# DEBUG BEGIN_STMT
|
|
_8 = (int) channel_6(D);
|
|
_9 ={v} base_4->CH.UC[_8].C;
|
|
_10 = _9 & 2147483647;
|
|
base_4->CH.UC[_8].C ={v} _10;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG value => NULL
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_22 ();
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Emios_Pwm_Ip_ChannelEnterDebugMode (uint8 instance, uint8 channel)
|
|
{
|
|
Emios_Pwm_Ip_StatusType ret;
|
|
struct Emios_Pwm_Ip_HwAddrType * const base;
|
|
int _1;
|
|
long unsigned int _10;
|
|
long unsigned int _11;
|
|
int _12;
|
|
long unsigned int _13;
|
|
long unsigned int _14;
|
|
long unsigned int _15;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) instance_4(D);
|
|
base_6 = Emios_Pwm_Ip_aBasePtr[_1];
|
|
# DEBUG base => base_6
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG ret => 0
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_21 ();
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG base => base_6
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_GetDebugMode
|
|
# DEBUG BEGIN_STMT
|
|
_10 ={v} MEM[(const struct Emios_Pwm_Ip_HwAddrType *)base_6].MCR;
|
|
_11 = _10 & 536870912;
|
|
# DEBUG base => NULL
|
|
if (_11 != 0)
|
|
goto <bb 3>; [65.00%]
|
|
else
|
|
goto <bb 4>; [35.00%]
|
|
|
|
<bb 3> [local count: 697932186]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG base => base_6
|
|
# DEBUG channel => channel_8(D)
|
|
# DEBUG value => 1
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_SetFreezeEnable
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG value_convert => 1
|
|
# DEBUG BEGIN_STMT
|
|
_12 = (int) channel_8(D);
|
|
_13 ={v} base_6->CH.UC[_12].C;
|
|
_14 = _13 & 2147483647;
|
|
_15 = _14 | 2147483648;
|
|
base_6->CH.UC[_12].C ={v} _15;
|
|
|
|
<bb 4> [local count: 1073741824]:
|
|
# ret_2 = PHI <0(3), 3075(2)>
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG value => NULL
|
|
# DEBUG ret => ret_2
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_21 ();
|
|
# DEBUG BEGIN_STMT
|
|
return ret_2;
|
|
|
|
}
|
|
|
|
|
|
Emios_Pwm_Ip_SetTriggerPlacement (uint8 instance, uint8 channel, uint32 newTriggerPlacement)
|
|
{
|
|
uint8 counterStart;
|
|
struct Emios_Pwm_Ip_HwAddrType * const base;
|
|
int _1;
|
|
<unnamed type> _2;
|
|
<unnamed type> _3;
|
|
short unsigned int _4;
|
|
short unsigned int _5;
|
|
short unsigned int _6;
|
|
int _17;
|
|
long unsigned int _18;
|
|
long unsigned int _19;
|
|
long unsigned int _20;
|
|
long unsigned int _21;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) instance_8(D);
|
|
base_10 = Emios_Pwm_Ip_aBasePtr[_1];
|
|
# DEBUG base => base_10
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG counterStart => 0
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_20 ();
|
|
# DEBUG BEGIN_STMT
|
|
_2 = Emios_Pwm_Ip_GetCounterBus (base_10, channel_12(D));
|
|
_3 = Emios_Pwm_Ip_GetCounterBusMode (instance_8(D), channel_12(D), _2);
|
|
if (_3 == 80)
|
|
goto <bb 4>; [34.00%]
|
|
else
|
|
goto <bb 3>; [66.00%]
|
|
|
|
<bb 3> [local count: 708669605]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG counterStart => 0
|
|
|
|
<bb 4> [local count: 1073741824]:
|
|
# counterStart_7 = PHI <1(2), 0(3)>
|
|
# DEBUG counterStart => counterStart_7
|
|
# DEBUG BEGIN_STMT
|
|
_4 = (short unsigned int) newTriggerPlacement_15(D);
|
|
_5 = (short unsigned int) counterStart_7;
|
|
_6 = _4 + _5;
|
|
# DEBUG base => base_10
|
|
# DEBUG channel => channel_12(D)
|
|
# DEBUG value => _6
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_SetTrigger
|
|
# DEBUG BEGIN_STMT
|
|
_17 = (int) channel_12(D);
|
|
_18 ={v} base_10->CH.UC[_17].ALTA;
|
|
_19 = _18 & 4294901760;
|
|
_20 = (long unsigned int) _6;
|
|
_21 = _19 | _20;
|
|
base_10->CH.UC[_17].ALTA ={v} _21;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG value => NULL
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_20 ();
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Emios_Pwm_Ip_GetTriggerPlacement (uint8 instance, uint8 channel)
|
|
{
|
|
const struct Emios_Pwm_Ip_HwAddrType * const base;
|
|
int _1;
|
|
int _6;
|
|
long unsigned int _7;
|
|
long unsigned int _8;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) instance_2(D);
|
|
base_4 = Emios_Pwm_Ip_aBasePtr[_1];
|
|
# DEBUG base => base_4
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG base => base_4
|
|
# DEBUG channel => channel_5(D)
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_GetTrigger
|
|
# DEBUG BEGIN_STMT
|
|
_6 = (int) channel_5(D);
|
|
_7 ={v} base_4->CH.UC[_6].ALTA;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
_8 = _7 & 65535;
|
|
return _8;
|
|
|
|
}
|
|
|
|
|
|
Emios_Pwm_Ip_SetDeadTime (uint8 instance, uint8 channel, uint16 newDeadTime)
|
|
{
|
|
struct Emios_Pwm_Ip_HwAddrType * const base;
|
|
int _1;
|
|
int _9;
|
|
long unsigned int _10;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) instance_2(D);
|
|
base_4 = Emios_Pwm_Ip_aBasePtr[_1];
|
|
# DEBUG base => base_4
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_19 ();
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG base => base_4
|
|
# DEBUG channel => channel_6(D)
|
|
# DEBUG value => newDeadTime_7(D)
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_SetUCRegB
|
|
# DEBUG BEGIN_STMT
|
|
_9 = (int) channel_6(D);
|
|
_10 = (long unsigned int) newDeadTime_7(D);
|
|
base_4->CH.UC[_9].B ={v} _10;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG value => NULL
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_19 ();
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Emios_Pwm_Ip_GetDeadTime (uint8 instance, uint8 channel)
|
|
{
|
|
const struct Emios_Pwm_Ip_HwAddrType * const base;
|
|
int _1;
|
|
int _6;
|
|
long unsigned int _7;
|
|
short unsigned int _8;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) instance_2(D);
|
|
base_4 = Emios_Pwm_Ip_aBasePtr[_1];
|
|
# DEBUG base => base_4
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG base => base_4
|
|
# DEBUG channel => channel_5(D)
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_GetUCRegB
|
|
# DEBUG BEGIN_STMT
|
|
_6 = (int) channel_5(D);
|
|
_7 ={v} base_4->CH.UC[_6].B;
|
|
_8 = (short unsigned int) _7;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
return _8;
|
|
|
|
}
|
|
|
|
|
|
Emios_Pwm_Ip_SetPhaseShift (uint8 instance, uint8 channel, uint16 phaseShift)
|
|
{
|
|
uint8 counterStart;
|
|
uint16 dutyCycle;
|
|
uint16 chPeriod;
|
|
Emios_Pwm_Ip_PwmModeType chMode;
|
|
struct Emios_Pwm_Ip_HwAddrType * const base;
|
|
Emios_Pwm_Ip_StatusType status;
|
|
int _1;
|
|
<unnamed type> _2;
|
|
<unnamed type> _3;
|
|
<unnamed type> _4;
|
|
short unsigned int _5;
|
|
int _6;
|
|
short unsigned int _7;
|
|
int _8;
|
|
int _9;
|
|
int _10;
|
|
int _11;
|
|
short unsigned int _12;
|
|
short unsigned int _13;
|
|
unsigned int _14;
|
|
unsigned int _15;
|
|
unsigned int _16;
|
|
int _17;
|
|
int _18;
|
|
int _19;
|
|
int _20;
|
|
int _21;
|
|
short unsigned int _22;
|
|
short unsigned int _23;
|
|
long unsigned int _44;
|
|
long unsigned int _45;
|
|
long unsigned int _46;
|
|
long unsigned int _47;
|
|
|
|
<bb 2> [local count: 1073741823]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG status => 0
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) instance_27(D);
|
|
base_29 = Emios_Pwm_Ip_aBasePtr[_1];
|
|
# DEBUG base => base_29
|
|
# DEBUG BEGIN_STMT
|
|
chMode_32 = Emios_Pwm_Ip_GetPwmMode (base_29, channel_30(D));
|
|
# DEBUG chMode => chMode_32
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG chPeriod => 0
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG dutyCycle => 0
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG counterStart => 0
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_18 ();
|
|
# DEBUG BEGIN_STMT
|
|
_2 = Emios_Pwm_Ip_GetCounterBus (base_29, channel_30(D));
|
|
chPeriod_36 = Emios_Pwm_Ip_GetCounterBusPeriod (instance_27(D), channel_30(D), _2);
|
|
# DEBUG chPeriod => chPeriod_36
|
|
# DEBUG BEGIN_STMT
|
|
dutyCycle_38 = Emios_Pwm_Ip_GetDutyCycle (instance_27(D), channel_30(D));
|
|
# DEBUG dutyCycle => dutyCycle_38
|
|
# DEBUG BEGIN_STMT
|
|
_3 = Emios_Pwm_Ip_GetCounterBus (base_29, channel_30(D));
|
|
_4 = Emios_Pwm_Ip_GetCounterBusMode (instance_27(D), channel_30(D), _3);
|
|
if (_4 == 80)
|
|
goto <bb 4>; [34.00%]
|
|
else
|
|
goto <bb 3>; [66.00%]
|
|
|
|
<bb 3> [local count: 708669604]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG counterStart => 0
|
|
|
|
<bb 4> [local count: 1073741823]:
|
|
# counterStart_25 = PHI <1(2), 0(3)>
|
|
# DEBUG counterStart => counterStart_25
|
|
# DEBUG BEGIN_STMT
|
|
_5 = (short unsigned int) counterStart_25;
|
|
_6 = (int) channel_30(D);
|
|
_7 = _5 + phaseShift_41(D);
|
|
Emios_Pwm_Ip_aRegA[_1][_6] = _7;
|
|
# DEBUG BEGIN_STMT
|
|
if (chMode_32 == 96)
|
|
goto <bb 6>; [34.00%]
|
|
else
|
|
goto <bb 5>; [66.00%]
|
|
|
|
<bb 5> [local count: 708669604]:
|
|
if (chMode_32 == 98)
|
|
goto <bb 6>; [34.00%]
|
|
else
|
|
goto <bb 8>; [66.00%]
|
|
|
|
<bb 6> [local count: 606019886]:
|
|
# DEBUG BEGIN_STMT
|
|
_8 = (int) phaseShift_41(D);
|
|
_9 = (int) dutyCycle_38;
|
|
_10 = _8 + _9;
|
|
_11 = (int) chPeriod_36;
|
|
if (_10 > _11)
|
|
goto <bb 12>; [50.00%]
|
|
else
|
|
goto <bb 7>; [50.00%]
|
|
|
|
<bb 7> [local count: 303009943]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG base => base_29
|
|
# DEBUG channel => channel_30(D)
|
|
# DEBUG value => _7
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_SetUCRegA
|
|
# DEBUG BEGIN_STMT
|
|
_45 = (long unsigned int) _7;
|
|
base_29->CH.UC[_6].A ={v} _45;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG value => NULL
|
|
# DEBUG BEGIN_STMT
|
|
_12 = dutyCycle_38 + phaseShift_41(D);
|
|
_13 = _5 + _12;
|
|
# DEBUG base => base_29
|
|
# DEBUG channel => channel_30(D)
|
|
# DEBUG value => _13
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_SetUCRegB
|
|
# DEBUG BEGIN_STMT
|
|
_44 = (long unsigned int) _13;
|
|
base_29->CH.UC[_6].B ={v} _44;
|
|
goto <bb 12>; [100.00%]
|
|
|
|
<bb 8> [local count: 467721938]:
|
|
# DEBUG BEGIN_STMT
|
|
if (chMode_32 == 38)
|
|
goto <bb 9>; [34.00%]
|
|
else
|
|
goto <bb 12>; [66.00%]
|
|
|
|
<bb 9> [local count: 159025459]:
|
|
# DEBUG BEGIN_STMT
|
|
if (chPeriod_36 < phaseShift_41(D))
|
|
goto <bb 12>; [50.00%]
|
|
else
|
|
goto <bb 10>; [50.00%]
|
|
|
|
<bb 10> [local count: 79512729]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG base => base_29
|
|
# DEBUG channel => channel_30(D)
|
|
# DEBUG value => _7
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_SetUCRegA
|
|
# DEBUG BEGIN_STMT
|
|
_46 = (long unsigned int) _7;
|
|
base_29->CH.UC[_6].A ={v} _46;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG value => NULL
|
|
# DEBUG BEGIN_STMT
|
|
_14 = (unsigned int) dutyCycle_38;
|
|
_15 = (unsigned int) chPeriod_36;
|
|
_16 = _15 + 1;
|
|
if (_14 < _16)
|
|
goto <bb 11>; [50.00%]
|
|
else
|
|
goto <bb 12>; [50.00%]
|
|
|
|
<bb 11> [local count: 39756365]:
|
|
# DEBUG BEGIN_STMT
|
|
_17 = (int) phaseShift_41(D);
|
|
_18 = (int) dutyCycle_38;
|
|
_19 = _17 + _18;
|
|
_20 = (int) chPeriod_36;
|
|
_21 = _19 % _20;
|
|
_22 = (short unsigned int) _21;
|
|
_23 = _5 + _22;
|
|
# DEBUG base => base_29
|
|
# DEBUG channel => channel_30(D)
|
|
# DEBUG value => _23
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_SetUCRegB
|
|
# DEBUG BEGIN_STMT
|
|
_47 = (long unsigned int) _23;
|
|
base_29->CH.UC[_6].B ={v} _47;
|
|
|
|
<bb 12> [local count: 1073741824]:
|
|
# status_24 = PHI <0(7), 0(10), 1(8), 1(6), 1(9), 0(11)>
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG value => NULL
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG value => NULL
|
|
# DEBUG status => status_24
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_18 ();
|
|
# DEBUG BEGIN_STMT
|
|
return status_24;
|
|
|
|
}
|
|
|
|
|
|
Emios_Pwm_Ip_GetPhaseShift (uint8 instance, uint8 channel)
|
|
{
|
|
const struct Emios_Pwm_Ip_HwAddrType * const base;
|
|
int _1;
|
|
int _6;
|
|
long unsigned int _7;
|
|
short unsigned int _8;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) instance_2(D);
|
|
base_4 = Emios_Pwm_Ip_aBasePtr[_1];
|
|
# DEBUG base => base_4
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG base => base_4
|
|
# DEBUG channel => channel_5(D)
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_GetUCRegA
|
|
# DEBUG BEGIN_STMT
|
|
_6 = (int) channel_5(D);
|
|
_7 ={v} base_4->CH.UC[_6].A;
|
|
_8 = (short unsigned int) _7;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
return _8;
|
|
|
|
}
|
|
|
|
|
|
Emios_Pwm_Ip_SetDutyCycle (uint8 instance, uint8 channel, uint16 newDutyCycle)
|
|
{
|
|
Emios_Pwm_Ip_PwmModeType chMode;
|
|
Emios_Pwm_Ip_StatusType ret;
|
|
const struct Emios_Pwm_Ip_HwAddrType * const base;
|
|
int _1;
|
|
unsigned char _2;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) instance_5(D);
|
|
base_7 = Emios_Pwm_Ip_aBasePtr[_1];
|
|
# DEBUG base => base_7
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG ret => 0
|
|
# DEBUG BEGIN_STMT
|
|
chMode_10 = Emios_Pwm_Ip_GetPwmMode (base_7, channel_8(D));
|
|
# DEBUG chMode => chMode_10
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_17 ();
|
|
# DEBUG BEGIN_STMT
|
|
if (chMode_10 == 88)
|
|
goto <bb 4>; [20.24%]
|
|
else
|
|
goto <bb 3>; [79.76%]
|
|
|
|
<bb 3> [local count: 856416480]:
|
|
if (chMode_10 == 90)
|
|
goto <bb 4>; [34.00%]
|
|
else
|
|
goto <bb 5>; [66.00%]
|
|
|
|
<bb 4> [local count: 508506948]:
|
|
# DEBUG BEGIN_STMT
|
|
ret_22 = Emios_Pwm_Ip_SetDutyCycleOpwfmb (instance_5(D), channel_8(D), newDutyCycle_12(D));
|
|
# DEBUG ret => ret_22
|
|
goto <bb 16>; [100.00%]
|
|
|
|
<bb 5> [local count: 565234877]:
|
|
# DEBUG BEGIN_STMT
|
|
if (chMode_10 == 92)
|
|
goto <bb 9>; [20.24%]
|
|
else
|
|
goto <bb 6>; [79.76%]
|
|
|
|
<bb 6> [local count: 450831337]:
|
|
if (chMode_10 == 94)
|
|
goto <bb 9>; [34.00%]
|
|
else
|
|
goto <bb 7>; [66.00%]
|
|
|
|
<bb 7> [local count: 297548683]:
|
|
if (chMode_10 == 93)
|
|
goto <bb 9>; [34.00%]
|
|
else
|
|
goto <bb 8>; [66.00%]
|
|
|
|
<bb 8> [local count: 196382130]:
|
|
if (chMode_10 == 95)
|
|
goto <bb 9>; [34.00%]
|
|
else
|
|
goto <bb 10>; [66.00%]
|
|
|
|
<bb 9> [local count: 435622670]:
|
|
# DEBUG BEGIN_STMT
|
|
ret_20 = Emios_Pwm_Ip_SetDutyCycleOpwmcb (instance_5(D), channel_8(D), newDutyCycle_12(D));
|
|
# DEBUG ret => ret_20
|
|
goto <bb 16>; [100.00%]
|
|
|
|
<bb 10> [local count: 129612206]:
|
|
# DEBUG BEGIN_STMT
|
|
if (chMode_10 == 96)
|
|
goto <bb 12>; [20.24%]
|
|
else
|
|
goto <bb 11>; [79.76%]
|
|
|
|
<bb 11> [local count: 103378695]:
|
|
if (chMode_10 == 98)
|
|
goto <bb 12>; [34.00%]
|
|
else
|
|
goto <bb 13>; [66.00%]
|
|
|
|
<bb 12> [local count: 61382267]:
|
|
# DEBUG BEGIN_STMT
|
|
ret_18 = Emios_Pwm_Ip_SetDutyCycleOpwmb (instance_5(D), channel_8(D), newDutyCycle_12(D));
|
|
# DEBUG ret => ret_18
|
|
goto <bb 16>; [100.00%]
|
|
|
|
<bb 13> [local count: 68229939]:
|
|
# DEBUG BEGIN_STMT
|
|
_2 = chMode_10 + 250;
|
|
if (_2 <= 1)
|
|
goto <bb 14>; [41.00%]
|
|
else
|
|
goto <bb 15>; [59.00%]
|
|
|
|
<bb 14> [local count: 27974275]:
|
|
# DEBUG BEGIN_STMT
|
|
ret_16 = Emios_Pwm_Ip_SetDutyCycleDaoc (instance_5(D), channel_8(D), newDutyCycle_12(D));
|
|
# DEBUG ret => ret_16
|
|
goto <bb 16>; [100.00%]
|
|
|
|
<bb 15> [local count: 40255664]:
|
|
# DEBUG BEGIN_STMT
|
|
ret_14 = Emios_Pwm_Ip_SetDutyCycleOpwmt (instance_5(D), channel_8(D), newDutyCycle_12(D));
|
|
# DEBUG ret => ret_14
|
|
|
|
<bb 16> [local count: 1073741824]:
|
|
# ret_3 = PHI <ret_22(4), ret_20(9), ret_18(12), ret_16(14), ret_14(15)>
|
|
# DEBUG ret => ret_3
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_17 ();
|
|
# DEBUG BEGIN_STMT
|
|
return ret_3;
|
|
|
|
}
|
|
|
|
|
|
Emios_Pwm_Ip_GetDutyCycle (uint8 instance, uint8 channel)
|
|
{
|
|
uint16 dutyCycle;
|
|
uint16 chPeriod;
|
|
Emios_Pwm_Ip_PwmModeType chMode;
|
|
const struct Emios_Pwm_Ip_HwAddrType * const base;
|
|
int _1;
|
|
<unnamed type> _2;
|
|
short unsigned int _3;
|
|
long unsigned int _19;
|
|
short unsigned int _20;
|
|
int _21;
|
|
long unsigned int _22;
|
|
short unsigned int _23;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) instance_6(D);
|
|
base_8 = Emios_Pwm_Ip_aBasePtr[_1];
|
|
# DEBUG base => base_8
|
|
# DEBUG BEGIN_STMT
|
|
chMode_11 = Emios_Pwm_Ip_GetPwmMode (base_8, channel_9(D));
|
|
# DEBUG chMode => chMode_11
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG base => base_8
|
|
# DEBUG channel => channel_9(D)
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_GetUCRegA
|
|
# DEBUG BEGIN_STMT
|
|
_21 = (int) channel_9(D);
|
|
_22 ={v} base_8->CH.UC[_21].A;
|
|
_23 = (short unsigned int) _22;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG regAValue => _23
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG base => base_8
|
|
# DEBUG channel => channel_9(D)
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_GetUCRegB
|
|
# DEBUG BEGIN_STMT
|
|
_19 ={v} base_8->CH.UC[_21].B;
|
|
_20 = (short unsigned int) _19;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG regBValue => _20
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG chPeriod => 0
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG dutyCycle => 0
|
|
# DEBUG BEGIN_STMT
|
|
switch (chMode_11) <default: <L20> [20.00%], case 6 ... 7: <L15> [20.00%], case 38: <L8> [20.00%], case 88: <L0> [20.00%], case 90: <L0> [20.00%], case 92 ... 95: <L0> [20.00%], case 96: <L6> [20.00%], case 98: <L6> [20.00%]>
|
|
|
|
<bb 3> [local count: 214748365]:
|
|
<L0>:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG dutyCycle => _23
|
|
# DEBUG BEGIN_STMT
|
|
goto <bb 10>; [100.00%]
|
|
|
|
<bb 4> [local count: 214748365]:
|
|
<L6>:
|
|
# DEBUG BEGIN_STMT
|
|
dutyCycle_12 = _20 - _23;
|
|
# DEBUG dutyCycle => dutyCycle_12
|
|
# DEBUG BEGIN_STMT
|
|
goto <bb 10>; [100.00%]
|
|
|
|
<bb 5> [local count: 214748365]:
|
|
<L8>:
|
|
# DEBUG BEGIN_STMT
|
|
_2 = Emios_Pwm_Ip_GetCounterBus (base_8, channel_9(D));
|
|
chPeriod_15 = Emios_Pwm_Ip_GetCounterBusPeriod (instance_6(D), channel_9(D), _2);
|
|
# DEBUG chPeriod => chPeriod_15
|
|
# DEBUG BEGIN_STMT
|
|
if (chPeriod_15 < _20)
|
|
goto <bb 10>; [50.00%]
|
|
else
|
|
goto <bb 6>; [50.00%]
|
|
|
|
<bb 6> [local count: 107374182]:
|
|
# DEBUG BEGIN_STMT
|
|
if (_20 < _23)
|
|
goto <bb 7>; [50.00%]
|
|
else
|
|
goto <bb 8>; [50.00%]
|
|
|
|
<bb 7> [local count: 53687091]:
|
|
# DEBUG BEGIN_STMT
|
|
_3 = chPeriod_15 - _23;
|
|
dutyCycle_17 = _3 + _20;
|
|
# DEBUG dutyCycle => dutyCycle_17
|
|
goto <bb 10>; [100.00%]
|
|
|
|
<bb 8> [local count: 53687091]:
|
|
# DEBUG BEGIN_STMT
|
|
dutyCycle_16 = _20 - _23;
|
|
# DEBUG dutyCycle => dutyCycle_16
|
|
goto <bb 10>; [100.00%]
|
|
|
|
<bb 9> [local count: 214748365]:
|
|
<L15>:
|
|
# DEBUG BEGIN_STMT
|
|
dutyCycle_18 = Emios_Pwm_Ip_aDaocDuty[_1][_21];
|
|
# DEBUG dutyCycle => dutyCycle_18
|
|
# DEBUG BEGIN_STMT
|
|
|
|
<bb 10> [local count: 1073741824]:
|
|
# dutyCycle_4 = PHI <_23(3), dutyCycle_12(4), dutyCycle_17(7), dutyCycle_18(9), 0(2), _20(5), dutyCycle_16(8)>
|
|
<L20>:
|
|
# DEBUG dutyCycle => dutyCycle_4
|
|
# DEBUG BEGIN_STMT
|
|
return dutyCycle_4;
|
|
|
|
}
|
|
|
|
|
|
Emios_Pwm_Ip_SetPeriod (uint8 instance, uint8 channel, uint16 newPeriod)
|
|
{
|
|
struct Emios_Pwm_Ip_HwAddrType * const base;
|
|
int _1;
|
|
int _2;
|
|
int _12;
|
|
long unsigned int _13;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) instance_4(D);
|
|
base_6 = Emios_Pwm_Ip_aBasePtr[_1];
|
|
# DEBUG base => base_6
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_16 ();
|
|
# DEBUG BEGIN_STMT
|
|
if (newPeriod_8(D) == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 3>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG base => base_6
|
|
# DEBUG channel => channel_9(D)
|
|
# DEBUG value => newPeriod_8(D)
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_SetUCRegB
|
|
# DEBUG BEGIN_STMT
|
|
_12 = (int) channel_9(D);
|
|
_13 = (long unsigned int) newPeriod_8(D);
|
|
base_6->CH.UC[_12].B ={v} _13;
|
|
|
|
<bb 4> [local count: 1073741824]:
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG value => NULL
|
|
# DEBUG BEGIN_STMT
|
|
_2 = (int) channel_9(D);
|
|
Emios_Pwm_Ip_aPeriod[_1][_2] = newPeriod_8(D);
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_16 ();
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Emios_Pwm_Ip_GetPeriod (uint8 instance, uint8 channel)
|
|
{
|
|
uint16 chPeriod;
|
|
Emios_Pwm_Ip_PwmModeType chMode;
|
|
const struct Emios_Pwm_Ip_HwAddrType * const base;
|
|
int _1;
|
|
unsigned char _2;
|
|
int _3;
|
|
<unnamed type> _4;
|
|
int _17;
|
|
long unsigned int _18;
|
|
short unsigned int _19;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) instance_7(D);
|
|
base_9 = Emios_Pwm_Ip_aBasePtr[_1];
|
|
# DEBUG base => base_9
|
|
# DEBUG BEGIN_STMT
|
|
chMode_12 = Emios_Pwm_Ip_GetPwmMode (base_9, channel_10(D));
|
|
# DEBUG chMode => chMode_12
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG chPeriod => 0
|
|
# DEBUG BEGIN_STMT
|
|
if (chMode_12 == 88)
|
|
goto <bb 4>; [34.00%]
|
|
else
|
|
goto <bb 3>; [66.00%]
|
|
|
|
<bb 3> [local count: 708669605]:
|
|
if (chMode_12 == 90)
|
|
goto <bb 4>; [34.00%]
|
|
else
|
|
goto <bb 5>; [66.00%]
|
|
|
|
<bb 4> [local count: 606019887]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG base => base_9
|
|
# DEBUG channel => channel_10(D)
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_GetUCRegB
|
|
# DEBUG BEGIN_STMT
|
|
_17 = (int) channel_10(D);
|
|
_18 ={v} base_9->CH.UC[_17].B;
|
|
_19 = (short unsigned int) _18;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG chPeriod => _19
|
|
goto <bb 8>; [100.00%]
|
|
|
|
<bb 5> [local count: 467721939]:
|
|
# DEBUG BEGIN_STMT
|
|
_2 = chMode_12 + 250;
|
|
if (_2 <= 1)
|
|
goto <bb 6>; [58.52%]
|
|
else
|
|
goto <bb 7>; [41.48%]
|
|
|
|
<bb 6> [local count: 273710878]:
|
|
# DEBUG BEGIN_STMT
|
|
_3 = (int) channel_10(D);
|
|
chPeriod_16 = Emios_Pwm_Ip_aPeriod[_1][_3];
|
|
# DEBUG chPeriod => chPeriod_16
|
|
goto <bb 8>; [100.00%]
|
|
|
|
<bb 7> [local count: 194011060]:
|
|
# DEBUG BEGIN_STMT
|
|
_4 = Emios_Pwm_Ip_GetCounterBus (base_9, channel_10(D));
|
|
chPeriod_15 = Emios_Pwm_Ip_GetCounterBusPeriod (instance_7(D), channel_10(D), _4);
|
|
# DEBUG chPeriod => chPeriod_15
|
|
|
|
<bb 8> [local count: 1073741824]:
|
|
# chPeriod_5 = PHI <_19(4), chPeriod_16(6), chPeriod_15(7)>
|
|
# DEBUG chPeriod => chPeriod_5
|
|
# DEBUG BEGIN_STMT
|
|
return chPeriod_5;
|
|
|
|
}
|
|
|
|
|
|
Emios_Pwm_Ip_ForceMatchTrailingEdge (uint8 instance, uint8 channel, boolean enable)
|
|
{
|
|
struct Emios_Pwm_Ip_HwAddrType * const base;
|
|
int _1;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) instance_2(D);
|
|
base_4 = Emios_Pwm_Ip_aBasePtr[_1];
|
|
# DEBUG base => base_4
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_15 ();
|
|
# DEBUG BEGIN_STMT
|
|
Emios_Pwm_Ip_SetForceMatchB (base_4, channel_6(D), enable_7(D));
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_15 ();
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Emios_Pwm_Ip_ForceMatchLeadingEdge (uint8 instance, uint8 channel, boolean enable)
|
|
{
|
|
struct Emios_Pwm_Ip_HwAddrType * const base;
|
|
int _1;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) instance_2(D);
|
|
base_4 = Emios_Pwm_Ip_aBasePtr[_1];
|
|
# DEBUG base => base_4
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_14 ();
|
|
# DEBUG BEGIN_STMT
|
|
Emios_Pwm_Ip_SetForceMatchA (base_4, channel_6(D), enable_7(D));
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_14 ();
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Emios_Pwm_Ip_DeInitChannel (uint8 instance, uint8 channel)
|
|
{
|
|
struct Emios_Pwm_Ip_HwAddrType * const base;
|
|
int _1;
|
|
int _2;
|
|
<unnamed type> _3;
|
|
long unsigned int _14;
|
|
long unsigned int _15;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) instance_5(D);
|
|
base_7 = Emios_Pwm_Ip_aBasePtr[_1];
|
|
# DEBUG base => base_7
|
|
# DEBUG BEGIN_STMT
|
|
_2 = (int) channel_8(D);
|
|
base_7->CH.UC[_2].C2 ={v} 0;
|
|
# DEBUG BEGIN_STMT
|
|
base_7->CH.UC[_2].C ={v} 0;
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG base => base_7
|
|
# DEBUG channel => channel_8(D)
|
|
# DEBUG value => 0
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_SetUCRegA
|
|
# DEBUG BEGIN_STMT
|
|
base_7->CH.UC[_2].A ={v} 0;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG value => NULL
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG base => base_7
|
|
# DEBUG channel => channel_8(D)
|
|
# DEBUG value => 0
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_SetUCRegB
|
|
# DEBUG BEGIN_STMT
|
|
base_7->CH.UC[_2].B ={v} 0;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG value => NULL
|
|
# DEBUG BEGIN_STMT
|
|
_3 = Emios_Pwm_Ip_GetPwmMode (base_7, channel_8(D));
|
|
if (_3 == 38)
|
|
goto <bb 3>; [34.00%]
|
|
else
|
|
goto <bb 4>; [66.00%]
|
|
|
|
<bb 3> [local count: 365072220]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG base => base_7
|
|
# DEBUG channel => channel_8(D)
|
|
# DEBUG value => 0
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_SetTrigger
|
|
# DEBUG BEGIN_STMT
|
|
_14 ={v} base_7->CH.UC[_2].ALTA;
|
|
_15 = _14 & 4294901760;
|
|
base_7->CH.UC[_2].ALTA ={v} _15;
|
|
|
|
<bb 4> [local count: 1073741824]:
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG value => NULL
|
|
# DEBUG BEGIN_STMT
|
|
Emios_Pwm_Ip_aCheckEnableNotif[_1][_2] = 0;
|
|
# DEBUG BEGIN_STMT
|
|
Emios_Pwm_Ip_aCheckState[_1][_2] = 0;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Emios_Pwm_Ip_InitChannel (uint8 instance, const struct Emios_Pwm_Ip_ChannelConfigType * userChCfg)
|
|
{
|
|
uint8 channel;
|
|
struct Emios_Pwm_Ip_HwAddrType * const base;
|
|
int _1;
|
|
int _2;
|
|
<unnamed type> _3;
|
|
<unnamed type> _4;
|
|
unsigned char _5;
|
|
int _6;
|
|
const struct Emios_Pwm_Ip_NotificationType * _7;
|
|
unsigned char _8;
|
|
<unnamed type> _9;
|
|
<unnamed type> _10;
|
|
unsigned char _11;
|
|
unsigned char _12;
|
|
<unnamed type> _13;
|
|
unsigned char _14;
|
|
unsigned char _15;
|
|
int _16;
|
|
long unsigned int _37;
|
|
long unsigned int _38;
|
|
long unsigned int _39;
|
|
long unsigned int _40;
|
|
int _41;
|
|
long unsigned int _42;
|
|
long unsigned int _43;
|
|
long unsigned int _44;
|
|
int _45;
|
|
long unsigned int _46;
|
|
long unsigned int _47;
|
|
long unsigned int _48;
|
|
|
|
<bb 2> [local count: 1073527118]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) instance_21(D);
|
|
base_23 = Emios_Pwm_Ip_aBasePtr[_1];
|
|
# DEBUG base => base_23
|
|
# DEBUG BEGIN_STMT
|
|
channel_25 = userChCfg_24(D)->channelId;
|
|
# DEBUG channel => channel_25
|
|
# DEBUG BEGIN_STMT
|
|
_2 = (int) channel_25;
|
|
base_23->CH.UC[_2].C ={v} 0;
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG base => base_23
|
|
# DEBUG channel => channel_25
|
|
# DEBUG value => 1
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_SetOutputUpdate
|
|
# DEBUG BEGIN_STMT
|
|
_37 ={v} base_23->OUDIS;
|
|
base_23->OUDIS ={v} _37;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG value => NULL
|
|
# DEBUG BEGIN_STMT
|
|
_3 = userChCfg_24(D)->outputDisableSource;
|
|
if (_3 != 255)
|
|
goto <bb 3>; [48.88%]
|
|
else
|
|
goto <bb 4>; [51.12%]
|
|
|
|
<bb 3> [local count: 524740055]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG base => base_23
|
|
# DEBUG channel => channel_25
|
|
# DEBUG value => 1
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_SetOutDisable
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG value_convert => 1
|
|
# DEBUG BEGIN_STMT
|
|
_38 ={v} base_23->CH.UC[_2].C;
|
|
_39 = _38 & 3221225471;
|
|
_40 = _39 | 1073741824;
|
|
base_23->CH.UC[_2].C ={v} _40;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG value => NULL
|
|
# DEBUG BEGIN_STMT
|
|
Emios_Pwm_Ip_SetOutDisableSource (base_23, channel_25, _3);
|
|
|
|
<bb 4> [local count: 1073527118]:
|
|
# DEBUG BEGIN_STMT
|
|
_4 = userChCfg_24(D)->irqMode;
|
|
if (_4 != 0)
|
|
goto <bb 5>; [50.00%]
|
|
else
|
|
goto <bb 8>; [50.00%]
|
|
|
|
<bb 5> [local count: 536763559]:
|
|
# DEBUG BEGIN_STMT
|
|
if (_4 == 1)
|
|
goto <bb 6>; [34.00%]
|
|
else
|
|
goto <bb 7>; [66.00%]
|
|
|
|
<bb 6> [local count: 182499610]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 = userChCfg_24(D)->channelId;
|
|
_6 = (int) _5;
|
|
_7 = &userChCfg_24(D)->userCallback;
|
|
Emios_Pwm_Ip_aNotificationPtr[_1][_6] = _7;
|
|
goto <bb 8>; [100.00%]
|
|
|
|
<bb 7> [local count: 354263949]:
|
|
# DEBUG BEGIN_STMT
|
|
_8 = userChCfg_24(D)->channelId;
|
|
# DEBUG base => base_23
|
|
# DEBUG channel => _8
|
|
# DEBUG value => 1
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_SetDMARequest
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG value_convert => 1
|
|
# DEBUG BEGIN_STMT
|
|
_41 = (int) _8;
|
|
_42 ={v} base_23->CH.UC[_41].C;
|
|
_43 = _42 & 4278190079;
|
|
_44 = _43 | 16777216;
|
|
base_23->CH.UC[_41].C ={v} _44;
|
|
|
|
<bb 8> [local count: 1073527118]:
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG value => NULL
|
|
# DEBUG BEGIN_STMT
|
|
_9 = userChCfg_24(D)->mode;
|
|
switch (_9) <default: <L22> [16.67%], case 6 ... 7: <L16> [16.67%], case 38: <L15> [16.67%], case 88: <L7> [16.67%], case 90: <L7> [16.67%], case 92 ... 95: <L9> [16.67%], case 96: <L13> [16.67%], case 98: <L13> [16.67%]>
|
|
|
|
<bb 9> [local count: 178956970]:
|
|
<L7>:
|
|
# DEBUG BEGIN_STMT
|
|
Emios_Pwm_Ip_InitPeriodDutyCycleMode (instance_21(D), userChCfg_24(D));
|
|
# DEBUG BEGIN_STMT
|
|
goto <bb 14>; [100.00%]
|
|
|
|
<bb 10> [local count: 178956970]:
|
|
<L9>:
|
|
# DEBUG BEGIN_STMT
|
|
Emios_Pwm_Ip_InitDeadTimeMode (instance_21(D), userChCfg_24(D));
|
|
# DEBUG BEGIN_STMT
|
|
goto <bb 14>; [100.00%]
|
|
|
|
<bb 11> [local count: 178956970]:
|
|
<L13>:
|
|
# DEBUG BEGIN_STMT
|
|
Emios_Pwm_Ip_InitEdgePlacementMode (instance_21(D), userChCfg_24(D));
|
|
# DEBUG BEGIN_STMT
|
|
goto <bb 14>; [100.00%]
|
|
|
|
<bb 12> [local count: 178956970]:
|
|
<L15>:
|
|
# DEBUG BEGIN_STMT
|
|
Emios_Pwm_Ip_InitTriggerMode (instance_21(D), userChCfg_24(D));
|
|
# DEBUG BEGIN_STMT
|
|
goto <bb 14>; [100.00%]
|
|
|
|
<bb 13> [local count: 178956970]:
|
|
<L16>:
|
|
# DEBUG BEGIN_STMT
|
|
Emios_Pwm_Ip_InitDoubleCompareMode (instance_21(D), userChCfg_24(D));
|
|
# DEBUG BEGIN_STMT
|
|
|
|
<bb 14> [local count: 1073741823]:
|
|
<L22>:
|
|
# DEBUG BEGIN_STMT
|
|
_10 = userChCfg_24(D)->internalPs;
|
|
if (_10 != 255)
|
|
goto <bb 15>; [48.88%]
|
|
else
|
|
goto <bb 16>; [51.12%]
|
|
|
|
<bb 15> [local count: 524845003]:
|
|
# DEBUG BEGIN_STMT
|
|
_11 = userChCfg_24(D)->channelId;
|
|
Emios_Pwm_Ip_SetExtendedPrescaler (base_23, _11, _10);
|
|
# DEBUG BEGIN_STMT
|
|
_12 = userChCfg_24(D)->channelId;
|
|
_13 = userChCfg_24(D)->internalPsSrc;
|
|
Emios_Pwm_Ip_SetPrescalerSource (base_23, _12, _13);
|
|
# DEBUG BEGIN_STMT
|
|
_14 = userChCfg_24(D)->channelId;
|
|
# DEBUG base => base_23
|
|
# DEBUG channel => _14
|
|
# DEBUG value => 1
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_SetPrescalerEnable
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG value_convert => 1
|
|
# DEBUG BEGIN_STMT
|
|
_45 = (int) _14;
|
|
_46 ={v} base_23->CH.UC[_45].C;
|
|
_47 = _46 & 4261412863;
|
|
_48 = _47 | 33554432;
|
|
base_23->CH.UC[_45].C ={v} _48;
|
|
|
|
<bb 16> [local count: 1073741824]:
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG value => NULL
|
|
# DEBUG BEGIN_STMT
|
|
_15 = userChCfg_24(D)->channelId;
|
|
_16 = (int) _15;
|
|
Emios_Pwm_Ip_aCheckState[_1][_16] = 1;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Emios_Pwm_Ip_SetDutyCycleDaoc (uint8 instance, uint8 channel, uint16 newDutyCycle)
|
|
{
|
|
uint16 daocRegA;
|
|
Emios_Pwm_Ip_StatusType ret;
|
|
struct Emios_Pwm_Ip_HwAddrType * const base;
|
|
int _1;
|
|
unsigned char _2;
|
|
int _3;
|
|
short unsigned int _4;
|
|
short unsigned int _5;
|
|
unsigned char _6;
|
|
_Bool _7;
|
|
<unnamed type> _8;
|
|
int _9;
|
|
int _10;
|
|
int _11;
|
|
int _12;
|
|
int _13;
|
|
unsigned char _14;
|
|
_Bool _15;
|
|
<unnamed type> _16;
|
|
short unsigned int _17;
|
|
unsigned char _18;
|
|
_Bool _19;
|
|
<unnamed type> _20;
|
|
uint16 iftmp.9_22;
|
|
long unsigned int _27;
|
|
long unsigned int _28;
|
|
int _42;
|
|
long unsigned int _43;
|
|
short unsigned int _44;
|
|
long unsigned int _45;
|
|
long unsigned int _46;
|
|
long unsigned int _47;
|
|
long unsigned int _48;
|
|
long unsigned int _49;
|
|
long unsigned int _50;
|
|
long unsigned int _51;
|
|
long unsigned int _52;
|
|
long unsigned int _53;
|
|
long unsigned int _54;
|
|
long unsigned int _55;
|
|
long unsigned int _56;
|
|
long unsigned int _57;
|
|
long unsigned int _58;
|
|
long unsigned int _59;
|
|
long unsigned int _60;
|
|
long unsigned int _61;
|
|
long unsigned int _62;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) instance_24(D);
|
|
base_26 = Emios_Pwm_Ip_aBasePtr[_1];
|
|
# DEBUG base => base_26
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG ret => 0
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG daocRegA => 0
|
|
# DEBUG BEGIN_STMT
|
|
_2 = Emios_Pwm_Ip_GetMasterBusChannel (instance_24(D), channel_29(D));
|
|
# DEBUG base => base_26
|
|
# DEBUG channel => _2
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_GetUCRegA
|
|
# DEBUG BEGIN_STMT
|
|
_42 = (int) _2;
|
|
_43 ={v} MEM[(const struct Emios_Pwm_Ip_HwAddrType *)base_26].CH.UC[_42].A;
|
|
_44 = (short unsigned int) _43;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG counterMax => _44
|
|
# DEBUG BEGIN_STMT
|
|
_3 = (int) channel_29(D);
|
|
_4 = Emios_Pwm_Ip_aPeriod[_1][_3];
|
|
if (_4 < newDutyCycle_31(D))
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 4>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
if (_4 != 0)
|
|
goto <bb 12>; [50.00%]
|
|
else
|
|
goto <bb 4>; [50.00%]
|
|
|
|
<bb 4> [local count: 805306369]:
|
|
# DEBUG BEGIN_STMT
|
|
if (_4 == 0)
|
|
goto <bb 6>; [33.00%]
|
|
else
|
|
goto <bb 5>; [67.00%]
|
|
|
|
<bb 5> [local count: 539555267]:
|
|
if (newDutyCycle_31(D) == 0)
|
|
goto <bb 6>; [50.00%]
|
|
else
|
|
goto <bb 7>; [50.00%]
|
|
|
|
<bb 6> [local count: 535528735]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG base => base_26
|
|
# DEBUG channel => channel_29(D)
|
|
# DEBUG value => 0
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_SetInterruptRequest
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG value_convert => 0
|
|
# DEBUG BEGIN_STMT
|
|
_51 ={v} base_26->CH.UC[_3].C;
|
|
_52 = _51 & 4294836223;
|
|
base_26->CH.UC[_3].C ={v} _52;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG value => NULL
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG base => base_26
|
|
# DEBUG channel => channel_29(D)
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_ClearFlagEvent
|
|
# DEBUG BEGIN_STMT
|
|
_49 ={v} base_26->CH.UC[_3].S;
|
|
_50 = _49 | 1;
|
|
base_26->CH.UC[_3].S ={v} _50;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG BEGIN_STMT
|
|
Emios_Pwm_Ip_aDaocDuty[_1][_3] = 0;
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG base => base_26
|
|
# DEBUG channel => channel_29(D)
|
|
# DEBUG value => 1
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_SetForceMatchB
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG value_convert => 1
|
|
# DEBUG BEGIN_STMT
|
|
_46 ={v} base_26->CH.UC[_3].C;
|
|
_47 = _46 & 4294963199;
|
|
_48 = _47 | 4096;
|
|
base_26->CH.UC[_3].C ={v} _48;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG value => NULL
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG base => base_26
|
|
# DEBUG channel => channel_29(D)
|
|
# DEBUG value => 1
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_SetUCRegA
|
|
# DEBUG BEGIN_STMT
|
|
base_26->CH.UC[_3].A ={v} 1;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG value => NULL
|
|
# DEBUG BEGIN_STMT
|
|
_5 = newDutyCycle_31(D) + 1;
|
|
# DEBUG base => base_26
|
|
# DEBUG channel => channel_29(D)
|
|
# DEBUG value => _5
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_SetUCRegB
|
|
# DEBUG BEGIN_STMT
|
|
_45 = (long unsigned int) _5;
|
|
base_26->CH.UC[_3].B ={v} _45;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG value => NULL
|
|
# DEBUG BEGIN_STMT
|
|
_6 = Emios_Pwm_Ip_aPolarity[_1][_3];
|
|
_7 = _6 == 1;
|
|
_8 = (<unnamed type>) _7;
|
|
Emios_Pwm_Ip_SetEdgePolarity (base_26, channel_29(D), _8);
|
|
# DEBUG BEGIN_STMT
|
|
Emios_Pwm_Ip_aNotif[_1][_3] = 1;
|
|
goto <bb 12>; [100.00%]
|
|
|
|
<bb 7> [local count: 269777633]:
|
|
# DEBUG BEGIN_STMT
|
|
if (_4 == newDutyCycle_31(D))
|
|
goto <bb 8>; [51.12%]
|
|
else
|
|
goto <bb 11>; [48.88%]
|
|
|
|
<bb 8> [local count: 137910326]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG base => base_26
|
|
# DEBUG channel => channel_29(D)
|
|
# DEBUG value => 0
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_SetInterruptRequest
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG value_convert => 0
|
|
# DEBUG BEGIN_STMT
|
|
_59 ={v} base_26->CH.UC[_3].C;
|
|
_60 = _59 & 4294836223;
|
|
base_26->CH.UC[_3].C ={v} _60;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG value => NULL
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG base => base_26
|
|
# DEBUG channel => channel_29(D)
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_ClearFlagEvent
|
|
# DEBUG BEGIN_STMT
|
|
_57 ={v} base_26->CH.UC[_3].S;
|
|
_58 = _57 | 1;
|
|
base_26->CH.UC[_3].S ={v} _58;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG BEGIN_STMT
|
|
Emios_Pwm_Ip_aDaocDuty[_1][_3] = 0;
|
|
# DEBUG BEGIN_STMT
|
|
_9 = (int) _4;
|
|
# DEBUG base => base_26
|
|
# DEBUG channel => channel_29(D)
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_GetUCRegA
|
|
# DEBUG BEGIN_STMT
|
|
_56 ={v} MEM[(const struct Emios_Pwm_Ip_HwAddrType *)base_26].CH.UC[_3].A;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
_27 = _56 & 65535;
|
|
_10 = (int) _27;
|
|
_11 = _9 + _10;
|
|
_28 = _43 & 65535;
|
|
_12 = (int) _28;
|
|
_13 = _11 % _12;
|
|
daocRegA_36 = (uint16) _13;
|
|
# DEBUG daocRegA => daocRegA_36
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG base => base_26
|
|
# DEBUG channel => channel_29(D)
|
|
# DEBUG value => 1
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_SetForceMatchA
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG value_convert => 1
|
|
# DEBUG BEGIN_STMT
|
|
_53 ={v} base_26->CH.UC[_3].C;
|
|
_54 = _53 & 4294959103;
|
|
_55 = _54 | 8192;
|
|
base_26->CH.UC[_3].C ={v} _55;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG value => NULL
|
|
# DEBUG BEGIN_STMT
|
|
if (daocRegA_36 == 0)
|
|
goto <bb 10>; [50.00%]
|
|
else
|
|
goto <bb 9>; [50.00%]
|
|
|
|
<bb 9> [local count: 68955163]:
|
|
|
|
<bb 10> [local count: 137910326]:
|
|
# iftmp.9_22 = PHI <_44(8), daocRegA_36(9)>
|
|
# DEBUG base => base_26
|
|
# DEBUG channel => channel_29(D)
|
|
# DEBUG value => iftmp.9_22
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_SetUCRegA
|
|
# DEBUG BEGIN_STMT
|
|
_61 = (long unsigned int) iftmp.9_22;
|
|
base_26->CH.UC[_3].A ={v} _61;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG value => NULL
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG base => base_26
|
|
# DEBUG channel => channel_29(D)
|
|
# DEBUG value => iftmp.9_22
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_SetUCRegB
|
|
# DEBUG BEGIN_STMT
|
|
base_26->CH.UC[_3].B ={v} _61;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG value => NULL
|
|
# DEBUG BEGIN_STMT
|
|
_14 = Emios_Pwm_Ip_aPolarity[_1][_3];
|
|
_15 = _14 != 1;
|
|
_16 = (<unnamed type>) _15;
|
|
Emios_Pwm_Ip_SetEdgePolarity (base_26, channel_29(D), _16);
|
|
# DEBUG BEGIN_STMT
|
|
Emios_Pwm_Ip_aNotif[_1][_3] = 1;
|
|
goto <bb 12>; [100.00%]
|
|
|
|
<bb 11> [local count: 131867307]:
|
|
# DEBUG BEGIN_STMT
|
|
Emios_Pwm_Ip_aDaocDuty[_1][_3] = newDutyCycle_31(D);
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG base => base_26
|
|
# DEBUG channel => channel_29(D)
|
|
# DEBUG value => 1
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_SetUCRegA
|
|
# DEBUG BEGIN_STMT
|
|
base_26->CH.UC[_3].A ={v} 1;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG value => NULL
|
|
# DEBUG BEGIN_STMT
|
|
_17 = newDutyCycle_31(D) + 1;
|
|
# DEBUG base => base_26
|
|
# DEBUG channel => channel_29(D)
|
|
# DEBUG value => _17
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_SetUCRegB
|
|
# DEBUG BEGIN_STMT
|
|
_62 = (long unsigned int) _17;
|
|
base_26->CH.UC[_3].B ={v} _62;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG value => NULL
|
|
# DEBUG BEGIN_STMT
|
|
_18 = Emios_Pwm_Ip_aPolarity[_1][_3];
|
|
_19 = _18 == 1;
|
|
_20 = (<unnamed type>) _19;
|
|
Emios_Pwm_Ip_SetEdgePolarity (base_26, channel_29(D), _20);
|
|
# DEBUG BEGIN_STMT
|
|
Emios_Pwm_Ip_aNotif[_1][_3] = 0;
|
|
|
|
<bb 12> [local count: 1073741824]:
|
|
# ret_21 = PHI <1(3), 0(6), 0(10), 0(11)>
|
|
# DEBUG ret => ret_21
|
|
# DEBUG BEGIN_STMT
|
|
return ret_21;
|
|
|
|
}
|
|
|
|
|
|
Emios_Pwm_Ip_InitDoubleCompareMode (uint8 instance, const struct Emios_Pwm_Ip_ChannelConfigType * userChCfg)
|
|
{
|
|
uint16 daocRegA;
|
|
struct Emios_Pwm_Ip_HwAddrType * const base;
|
|
int _1;
|
|
unsigned char _2;
|
|
int _3;
|
|
short unsigned int _4;
|
|
<unnamed type> _5;
|
|
unsigned char _6;
|
|
unsigned char _7;
|
|
unsigned char _8;
|
|
<unnamed type> _9;
|
|
short unsigned int _10;
|
|
short unsigned int _11;
|
|
unsigned char _12;
|
|
<unnamed type> _13;
|
|
_Bool _14;
|
|
<unnamed type> _15;
|
|
unsigned char _16;
|
|
<unnamed type> _17;
|
|
unsigned char _18;
|
|
<unnamed type> _19;
|
|
<unnamed type> _20;
|
|
short unsigned int _21;
|
|
unsigned char _22;
|
|
int _23;
|
|
short unsigned int _24;
|
|
short unsigned int _25;
|
|
<unnamed type> _26;
|
|
unsigned char _27;
|
|
int _28;
|
|
short unsigned int _29;
|
|
unsigned char _30;
|
|
int _31;
|
|
short unsigned int _32;
|
|
int _33;
|
|
int _34;
|
|
int _35;
|
|
int _36;
|
|
int _37;
|
|
<unnamed type> _38;
|
|
_Bool _39;
|
|
<unnamed type> _40;
|
|
unsigned char _41;
|
|
int _42;
|
|
unsigned char _43;
|
|
int _44;
|
|
short unsigned int _45;
|
|
short unsigned int _46;
|
|
<unnamed type> _47;
|
|
unsigned char _48;
|
|
int _49;
|
|
uint8 iftmp.2_50;
|
|
uint16 iftmp.3_51;
|
|
long unsigned int _59;
|
|
long unsigned int _60;
|
|
int _77;
|
|
long unsigned int _78;
|
|
long unsigned int _79;
|
|
long unsigned int _80;
|
|
int _81;
|
|
long unsigned int _82;
|
|
short unsigned int _83;
|
|
int _84;
|
|
long unsigned int _85;
|
|
long unsigned int _86;
|
|
<unnamed type> _87;
|
|
long unsigned int _88;
|
|
long unsigned int _89;
|
|
long unsigned int _90;
|
|
long unsigned int _91;
|
|
long unsigned int _92;
|
|
long unsigned int _93;
|
|
long unsigned int _94;
|
|
long unsigned int _95;
|
|
long unsigned int _96;
|
|
long unsigned int _97;
|
|
long unsigned int _98;
|
|
long unsigned int _99;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) instance_54(D);
|
|
base_56 = Emios_Pwm_Ip_aBasePtr[_1];
|
|
# DEBUG base => base_56
|
|
# DEBUG BEGIN_STMT
|
|
_2 = userChCfg_57(D)->channelId;
|
|
_3 = (int) _2;
|
|
_4 = userChCfg_57(D)->periodCount;
|
|
Emios_Pwm_Ip_aPeriod[_1][_3] = _4;
|
|
# DEBUG BEGIN_STMT
|
|
_5 = userChCfg_57(D)->outputPolarity;
|
|
if (_5 == 1)
|
|
goto <bb 4>; [34.00%]
|
|
else
|
|
goto <bb 3>; [66.00%]
|
|
|
|
<bb 3> [local count: 708669605]:
|
|
|
|
<bb 4> [local count: 1073741824]:
|
|
# iftmp.2_50 = PHI <1(2), 0(3)>
|
|
Emios_Pwm_Ip_aPolarity[_1][_3] = iftmp.2_50;
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG daocRegA => 0
|
|
# DEBUG BEGIN_STMT
|
|
_6 = userChCfg_57(D)->channelId;
|
|
_7 = Emios_Pwm_Ip_GetMasterBusChannel (instance_54(D), _6);
|
|
# DEBUG base => base_56
|
|
# DEBUG channel => _7
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_GetUCRegA
|
|
# DEBUG BEGIN_STMT
|
|
_81 = (int) _7;
|
|
_82 ={v} MEM[(const struct Emios_Pwm_Ip_HwAddrType *)base_56].CH.UC[_81].A;
|
|
_83 = (short unsigned int) _82;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG counterMax => _83
|
|
# DEBUG BEGIN_STMT
|
|
_8 = userChCfg_57(D)->channelId;
|
|
# DEBUG base => base_56
|
|
# DEBUG channel => _8
|
|
# DEBUG value => 1
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_SetInterruptRequest
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG value_convert => 1
|
|
# DEBUG BEGIN_STMT
|
|
_77 = (int) _8;
|
|
_78 ={v} base_56->CH.UC[_77].C;
|
|
_79 = _78 & 4294836223;
|
|
_80 = _79 | 131072;
|
|
base_56->CH.UC[_77].C ={v} _80;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG value => NULL
|
|
# DEBUG BEGIN_STMT
|
|
_9 = userChCfg_57(D)->timebase;
|
|
Emios_Pwm_Ip_SetCounterBus (base_56, _8, _9);
|
|
# DEBUG BEGIN_STMT
|
|
_10 = userChCfg_57(D)->periodCount;
|
|
_11 = userChCfg_57(D)->dutyCycle;
|
|
if (_10 == _11)
|
|
goto <bb 5>; [34.00%]
|
|
else
|
|
goto <bb 6>; [66.00%]
|
|
|
|
<bb 5> [local count: 365072220]:
|
|
# DEBUG BEGIN_STMT
|
|
_12 = userChCfg_57(D)->channelId;
|
|
_13 = userChCfg_57(D)->outputPolarity;
|
|
_14 = _13 != 1;
|
|
_15 = (<unnamed type>) _14;
|
|
Emios_Pwm_Ip_SetEdgePolarity (base_56, _12, _15);
|
|
goto <bb 7>; [100.00%]
|
|
|
|
<bb 6> [local count: 708669605]:
|
|
# DEBUG BEGIN_STMT
|
|
_16 = userChCfg_57(D)->channelId;
|
|
_17 = userChCfg_57(D)->outputPolarity;
|
|
Emios_Pwm_Ip_SetEdgePolarity (base_56, _16, _17);
|
|
|
|
<bb 7> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_18 = userChCfg_57(D)->channelId;
|
|
_19 = userChCfg_57(D)->mode;
|
|
# DEBUG base => base_56
|
|
# DEBUG channel => _18
|
|
# DEBUG mode => _19
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_SetPwmMode
|
|
# DEBUG BEGIN_STMT
|
|
_84 = (int) _18;
|
|
_85 ={v} base_56->CH.UC[_84].C;
|
|
_86 = _85 & 4294967168;
|
|
_87 = _19 & 127;
|
|
_88 = (long unsigned int) _87;
|
|
_89 = _86 | _88;
|
|
base_56->CH.UC[_84].C ={v} _89;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG mode => NULL
|
|
# DEBUG BEGIN_STMT
|
|
_20 = userChCfg_57(D)->outputPolarity;
|
|
Emios_Pwm_Ip_SetEdgePolarity (base_56, _18, _20);
|
|
# DEBUG BEGIN_STMT
|
|
_21 = userChCfg_57(D)->dutyCycle;
|
|
if (_21 == 0)
|
|
goto <bb 8>; [33.00%]
|
|
else
|
|
goto <bb 9>; [67.00%]
|
|
|
|
<bb 8> [local count: 354334802]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG daocRegA => 1
|
|
# DEBUG BEGIN_STMT
|
|
_22 = userChCfg_57(D)->channelId;
|
|
_23 = (int) _22;
|
|
Emios_Pwm_Ip_aDaocDuty[_1][_23] = 0;
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG base => base_56
|
|
# DEBUG channel => _22
|
|
# DEBUG value => 1
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_SetForceMatchB
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG value_convert => 1
|
|
# DEBUG BEGIN_STMT
|
|
_91 ={v} base_56->CH.UC[_23].C;
|
|
_92 = _91 & 4294963199;
|
|
_93 = _92 | 4096;
|
|
base_56->CH.UC[_23].C ={v} _93;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG value => NULL
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG base => base_56
|
|
# DEBUG channel => _22
|
|
# DEBUG value => 1
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_SetUCRegA
|
|
# DEBUG BEGIN_STMT
|
|
base_56->CH.UC[_23].A ={v} 1;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG value => NULL
|
|
# DEBUG BEGIN_STMT
|
|
_24 = userChCfg_57(D)->dutyCycle;
|
|
_25 = _24 + 1;
|
|
# DEBUG base => base_56
|
|
# DEBUG channel => _22
|
|
# DEBUG value => _25
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_SetUCRegB
|
|
# DEBUG BEGIN_STMT
|
|
_90 = (long unsigned int) _25;
|
|
base_56->CH.UC[_23].B ={v} _90;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG value => NULL
|
|
# DEBUG BEGIN_STMT
|
|
_26 = userChCfg_57(D)->outputPolarity;
|
|
Emios_Pwm_Ip_SetEdgePolarity (base_56, _22, _26);
|
|
# DEBUG BEGIN_STMT
|
|
_27 = userChCfg_57(D)->channelId;
|
|
_28 = (int) _27;
|
|
Emios_Pwm_Ip_aNotif[_1][_28] = 1;
|
|
goto <bb 14>; [100.00%]
|
|
|
|
<bb 9> [local count: 719407023]:
|
|
# DEBUG BEGIN_STMT
|
|
_29 = userChCfg_57(D)->periodCount;
|
|
if (_21 == _29)
|
|
goto <bb 10>; [51.12%]
|
|
else
|
|
goto <bb 13>; [48.88%]
|
|
|
|
<bb 10> [local count: 367760870]:
|
|
# DEBUG BEGIN_STMT
|
|
_30 = userChCfg_57(D)->channelId;
|
|
_31 = (int) _30;
|
|
_32 = Emios_Pwm_Ip_aPeriod[_1][_31];
|
|
_33 = (int) _32;
|
|
# DEBUG base => base_56
|
|
# DEBUG channel => _30
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_GetUCRegA
|
|
# DEBUG BEGIN_STMT
|
|
_97 ={v} MEM[(const struct Emios_Pwm_Ip_HwAddrType *)base_56].CH.UC[_31].A;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
_59 = _97 & 65535;
|
|
_34 = (int) _59;
|
|
_35 = _33 + _34;
|
|
_60 = _82 & 65535;
|
|
_36 = (int) _60;
|
|
_37 = _35 % _36;
|
|
daocRegA_70 = (uint16) _37;
|
|
# DEBUG daocRegA => daocRegA_70
|
|
# DEBUG BEGIN_STMT
|
|
Emios_Pwm_Ip_aDaocDuty[_1][_31] = 0;
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG base => base_56
|
|
# DEBUG channel => _30
|
|
# DEBUG value => 1
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_SetForceMatchA
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG value_convert => 1
|
|
# DEBUG BEGIN_STMT
|
|
_94 ={v} base_56->CH.UC[_31].C;
|
|
_95 = _94 & 4294959103;
|
|
_96 = _95 | 8192;
|
|
base_56->CH.UC[_31].C ={v} _96;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG value => NULL
|
|
# DEBUG BEGIN_STMT
|
|
if (daocRegA_70 == 0)
|
|
goto <bb 12>; [50.00%]
|
|
else
|
|
goto <bb 11>; [50.00%]
|
|
|
|
<bb 11> [local count: 183880435]:
|
|
|
|
<bb 12> [local count: 367760870]:
|
|
# iftmp.3_51 = PHI <_83(10), daocRegA_70(11)>
|
|
# DEBUG base => base_56
|
|
# DEBUG channel => _30
|
|
# DEBUG value => iftmp.3_51
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_SetUCRegA
|
|
# DEBUG BEGIN_STMT
|
|
_98 = (long unsigned int) iftmp.3_51;
|
|
base_56->CH.UC[_31].A ={v} _98;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG value => NULL
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG base => base_56
|
|
# DEBUG channel => _30
|
|
# DEBUG value => iftmp.3_51
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_SetUCRegB
|
|
# DEBUG BEGIN_STMT
|
|
base_56->CH.UC[_31].B ={v} _98;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG value => NULL
|
|
# DEBUG BEGIN_STMT
|
|
_38 = userChCfg_57(D)->outputPolarity;
|
|
_39 = _38 != 1;
|
|
_40 = (<unnamed type>) _39;
|
|
Emios_Pwm_Ip_SetEdgePolarity (base_56, _30, _40);
|
|
# DEBUG BEGIN_STMT
|
|
_41 = userChCfg_57(D)->channelId;
|
|
_42 = (int) _41;
|
|
Emios_Pwm_Ip_aNotif[_1][_42] = 1;
|
|
goto <bb 14>; [100.00%]
|
|
|
|
<bb 13> [local count: 351646152]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG daocRegA => 1
|
|
# DEBUG BEGIN_STMT
|
|
_43 = userChCfg_57(D)->channelId;
|
|
_44 = (int) _43;
|
|
Emios_Pwm_Ip_aDaocDuty[_1][_44] = _21;
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG base => base_56
|
|
# DEBUG channel => _43
|
|
# DEBUG value => 1
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_SetUCRegA
|
|
# DEBUG BEGIN_STMT
|
|
base_56->CH.UC[_44].A ={v} 1;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG value => NULL
|
|
# DEBUG BEGIN_STMT
|
|
_45 = userChCfg_57(D)->dutyCycle;
|
|
_46 = _45 + 1;
|
|
# DEBUG base => base_56
|
|
# DEBUG channel => _43
|
|
# DEBUG value => _46
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_SetUCRegB
|
|
# DEBUG BEGIN_STMT
|
|
_99 = (long unsigned int) _46;
|
|
base_56->CH.UC[_44].B ={v} _99;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG value => NULL
|
|
# DEBUG BEGIN_STMT
|
|
_47 = userChCfg_57(D)->outputPolarity;
|
|
Emios_Pwm_Ip_SetEdgePolarity (base_56, _43, _47);
|
|
# DEBUG BEGIN_STMT
|
|
_48 = userChCfg_57(D)->channelId;
|
|
_49 = (int) _48;
|
|
Emios_Pwm_Ip_aNotif[_1][_49] = 0;
|
|
|
|
<bb 14> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Emios_Pwm_Ip_SetDutyCycleOpwmt (uint8 instance, uint8 channel, uint16 newDutyCycle)
|
|
{
|
|
uint16 chPeriod;
|
|
Emios_Pwm_Ip_StatusType ret;
|
|
struct Emios_Pwm_Ip_HwAddrType * const base;
|
|
int _1;
|
|
<unnamed type> _2;
|
|
short unsigned int _3;
|
|
short unsigned int _4;
|
|
int _5;
|
|
short unsigned int _6;
|
|
int _7;
|
|
int _8;
|
|
int _9;
|
|
int _10;
|
|
int _11;
|
|
unsigned char _12;
|
|
_Bool _13;
|
|
int _19;
|
|
long unsigned int _29;
|
|
long unsigned int _30;
|
|
long unsigned int _31;
|
|
int _32;
|
|
long unsigned int _33;
|
|
long unsigned int _34;
|
|
long unsigned int _35;
|
|
long unsigned int _36;
|
|
long unsigned int _37;
|
|
int _38;
|
|
long unsigned int _39;
|
|
long unsigned int _40;
|
|
long unsigned int _41;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) instance_16(D);
|
|
base_18 = Emios_Pwm_Ip_aBasePtr[_1];
|
|
# DEBUG base => base_18
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG ret => 0
|
|
# DEBUG BEGIN_STMT
|
|
_2 = Emios_Pwm_Ip_GetCounterBus (base_18, channel_20(D));
|
|
chPeriod_23 = Emios_Pwm_Ip_GetCounterBusPeriod (instance_16(D), channel_20(D), _2);
|
|
# DEBUG chPeriod => chPeriod_23
|
|
# DEBUG BEGIN_STMT
|
|
if (chPeriod_23 < newDutyCycle_24(D))
|
|
goto <bb 8>; [50.00%]
|
|
else
|
|
goto <bb 3>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
if (chPeriod_23 == newDutyCycle_24(D))
|
|
goto <bb 4>; [34.00%]
|
|
else
|
|
goto <bb 5>; [66.00%]
|
|
|
|
<bb 4> [local count: 182536110]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG base => base_18
|
|
# DEBUG channel => channel_20(D)
|
|
# DEBUG value => 0
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_SetInterruptRequest
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG value_convert => 0
|
|
# DEBUG BEGIN_STMT
|
|
_32 = (int) channel_20(D);
|
|
_33 ={v} base_18->CH.UC[_32].C;
|
|
_34 = _33 & 4294836223;
|
|
base_18->CH.UC[_32].C ={v} _34;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG value => NULL
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG base => base_18
|
|
# DEBUG channel => channel_20(D)
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_ClearFlagEvent
|
|
# DEBUG BEGIN_STMT
|
|
_30 ={v} base_18->CH.UC[_32].S;
|
|
_31 = _30 | 1;
|
|
base_18->CH.UC[_32].S ={v} _31;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG BEGIN_STMT
|
|
_3 = newDutyCycle_24(D) + 1;
|
|
# DEBUG base => base_18
|
|
# DEBUG channel => channel_20(D)
|
|
# DEBUG value => _3
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_SetUCRegB
|
|
# DEBUG BEGIN_STMT
|
|
_29 = (long unsigned int) _3;
|
|
base_18->CH.UC[_32].B ={v} _29;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG value => NULL
|
|
# DEBUG BEGIN_STMT
|
|
Emios_Pwm_Ip_aNotif[_1][_32] = 1;
|
|
goto <bb 8>; [100.00%]
|
|
|
|
<bb 5> [local count: 354334802]:
|
|
# DEBUG BEGIN_STMT
|
|
if (newDutyCycle_24(D) == 0)
|
|
goto <bb 6>; [67.00%]
|
|
else
|
|
goto <bb 7>; [33.00%]
|
|
|
|
<bb 6> [local count: 237404317]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG base => base_18
|
|
# DEBUG channel => channel_20(D)
|
|
# DEBUG value => 0
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_SetInterruptRequest
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG value_convert => 0
|
|
# DEBUG BEGIN_STMT
|
|
_38 = (int) channel_20(D);
|
|
_39 ={v} base_18->CH.UC[_38].C;
|
|
_40 = _39 & 4294836223;
|
|
base_18->CH.UC[_38].C ={v} _40;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG value => NULL
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG base => base_18
|
|
# DEBUG channel => channel_20(D)
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_ClearFlagEvent
|
|
# DEBUG BEGIN_STMT
|
|
_36 ={v} base_18->CH.UC[_38].S;
|
|
_37 = _36 | 1;
|
|
base_18->CH.UC[_38].S ={v} _37;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG BEGIN_STMT
|
|
_4 = Emios_Pwm_Ip_aRegA[_1][_38];
|
|
# DEBUG base => base_18
|
|
# DEBUG channel => channel_20(D)
|
|
# DEBUG value => _4
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_SetUCRegB
|
|
# DEBUG BEGIN_STMT
|
|
_35 = (long unsigned int) _4;
|
|
base_18->CH.UC[_38].B ={v} _35;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG value => NULL
|
|
# DEBUG BEGIN_STMT
|
|
Emios_Pwm_Ip_aNotif[_1][_38] = 1;
|
|
goto <bb 8>; [100.00%]
|
|
|
|
<bb 7> [local count: 116930485]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 = (int) channel_20(D);
|
|
_6 = Emios_Pwm_Ip_aRegA[_1][_5];
|
|
_7 = (int) _6;
|
|
_8 = (int) newDutyCycle_24(D);
|
|
_9 = _7 + _8;
|
|
_10 = (int) chPeriod_23;
|
|
_11 = _9 % _10;
|
|
# DEBUG base => base_18
|
|
# DEBUG channel => channel_20(D)
|
|
# DEBUG value => (short unsigned int) _11
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_SetUCRegB
|
|
# DEBUG BEGIN_STMT
|
|
_19 = _11;
|
|
_41 = (long unsigned int) _19;
|
|
base_18->CH.UC[_5].B ={v} _41;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG value => NULL
|
|
# DEBUG BEGIN_STMT
|
|
Emios_Pwm_Ip_aNotif[_1][_5] = 0;
|
|
# DEBUG BEGIN_STMT
|
|
_12 = Emios_Pwm_Ip_aCheckEnableNotif[_1][_5];
|
|
_13 = _12 != 0;
|
|
Emios_Pwm_Ip_SetInterruptRequest (base_18, channel_20(D), _13);
|
|
|
|
<bb 8> [local count: 1073741824]:
|
|
# ret_14 = PHI <1(2), 0(4), 0(6), 0(7)>
|
|
# DEBUG ret => ret_14
|
|
# DEBUG BEGIN_STMT
|
|
return ret_14;
|
|
|
|
}
|
|
|
|
|
|
Emios_Pwm_Ip_InitTriggerMode (uint8 instance, const struct Emios_Pwm_Ip_ChannelConfigType * userChCfg)
|
|
{
|
|
uint8 counterStart;
|
|
uint16 trailingEdge;
|
|
uint16 counterBusPeriod;
|
|
struct Emios_Pwm_Ip_HwAddrType * const base;
|
|
int _1;
|
|
unsigned char _2;
|
|
<unnamed type> _3;
|
|
unsigned char _4;
|
|
<unnamed type> _5;
|
|
<unnamed type> _6;
|
|
short unsigned int _7;
|
|
unsigned char _8;
|
|
int _9;
|
|
unsigned char _10;
|
|
int _11;
|
|
short unsigned int _12;
|
|
int _13;
|
|
int _14;
|
|
int _15;
|
|
int _16;
|
|
int _17;
|
|
unsigned char _18;
|
|
int _19;
|
|
short unsigned int _20;
|
|
short unsigned int _21;
|
|
unsigned char _22;
|
|
int _23;
|
|
short unsigned int _24;
|
|
<unnamed type> _25;
|
|
unsigned char _26;
|
|
short unsigned int _27;
|
|
short unsigned int _28;
|
|
short unsigned int _29;
|
|
short unsigned int _30;
|
|
short unsigned int _31;
|
|
short unsigned int _32;
|
|
<unnamed type> _33;
|
|
_Bool _34;
|
|
<unnamed type> _35;
|
|
<unnamed type> _36;
|
|
unsigned char _37;
|
|
<unnamed type> _38;
|
|
<unnamed type> _39;
|
|
long unsigned int _62;
|
|
long unsigned int _63;
|
|
long unsigned int _64;
|
|
long unsigned int _65;
|
|
long unsigned int _66;
|
|
int _67;
|
|
long unsigned int _68;
|
|
int _69;
|
|
long unsigned int _70;
|
|
long unsigned int _71;
|
|
<unnamed type> _72;
|
|
long unsigned int _73;
|
|
long unsigned int _74;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) instance_44(D);
|
|
base_46 = Emios_Pwm_Ip_aBasePtr[_1];
|
|
# DEBUG base => base_46
|
|
# DEBUG BEGIN_STMT
|
|
_2 = userChCfg_47(D)->channelId;
|
|
_3 = userChCfg_47(D)->timebase;
|
|
counterBusPeriod_49 = Emios_Pwm_Ip_GetCounterBusPeriod (instance_44(D), _2, _3);
|
|
# DEBUG counterBusPeriod => counterBusPeriod_49
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG trailingEdge => 0
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG counterStart => 0
|
|
# DEBUG BEGIN_STMT
|
|
_4 = userChCfg_47(D)->channelId;
|
|
_5 = userChCfg_47(D)->timebase;
|
|
_6 = Emios_Pwm_Ip_GetCounterBusMode (instance_44(D), _4, _5);
|
|
if (_6 == 80)
|
|
goto <bb 4>; [34.00%]
|
|
else
|
|
goto <bb 3>; [66.00%]
|
|
|
|
<bb 3> [local count: 708669605]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG counterStart => 0
|
|
|
|
<bb 4> [local count: 1073741824]:
|
|
# counterStart_41 = PHI <1(2), 0(3)>
|
|
# DEBUG counterStart => counterStart_41
|
|
# DEBUG BEGIN_STMT
|
|
_7 = userChCfg_47(D)->dutyCycle;
|
|
if (_7 == counterBusPeriod_49)
|
|
goto <bb 5>; [34.00%]
|
|
else
|
|
goto <bb 6>; [66.00%]
|
|
|
|
<bb 5> [local count: 365072220]:
|
|
# DEBUG BEGIN_STMT
|
|
trailingEdge_55 = _7 + 1;
|
|
# DEBUG trailingEdge => trailingEdge_55
|
|
# DEBUG BEGIN_STMT
|
|
_8 = userChCfg_47(D)->channelId;
|
|
_9 = (int) _8;
|
|
Emios_Pwm_Ip_aNotif[_1][_9] = 1;
|
|
goto <bb 9>; [100.00%]
|
|
|
|
<bb 6> [local count: 708669605]:
|
|
# DEBUG BEGIN_STMT
|
|
if (_7 == 0)
|
|
goto <bb 7>; [50.00%]
|
|
else
|
|
goto <bb 8>; [50.00%]
|
|
|
|
<bb 7> [local count: 354334802]:
|
|
# DEBUG BEGIN_STMT
|
|
trailingEdge_53 = userChCfg_47(D)->phaseShift;
|
|
# DEBUG trailingEdge => trailingEdge_53
|
|
# DEBUG BEGIN_STMT
|
|
_10 = userChCfg_47(D)->channelId;
|
|
_11 = (int) _10;
|
|
Emios_Pwm_Ip_aNotif[_1][_11] = 1;
|
|
goto <bb 9>; [100.00%]
|
|
|
|
<bb 8> [local count: 354334802]:
|
|
# DEBUG BEGIN_STMT
|
|
_12 = userChCfg_47(D)->phaseShift;
|
|
_13 = (int) _12;
|
|
_14 = (int) _7;
|
|
_15 = _13 + _14;
|
|
_16 = (int) counterBusPeriod_49;
|
|
_17 = _15 % _16;
|
|
trailingEdge_51 = (uint16) _17;
|
|
# DEBUG trailingEdge => trailingEdge_51
|
|
# DEBUG BEGIN_STMT
|
|
_18 = userChCfg_47(D)->channelId;
|
|
_19 = (int) _18;
|
|
Emios_Pwm_Ip_aNotif[_1][_19] = 0;
|
|
|
|
<bb 9> [local count: 1073741824]:
|
|
# trailingEdge_40 = PHI <trailingEdge_55(5), trailingEdge_53(7), trailingEdge_51(8)>
|
|
# DEBUG trailingEdge => trailingEdge_40
|
|
# DEBUG BEGIN_STMT
|
|
_20 = userChCfg_47(D)->phaseShift;
|
|
_21 = (short unsigned int) counterStart_41;
|
|
_22 = userChCfg_47(D)->channelId;
|
|
_23 = (int) _22;
|
|
_24 = _20 + _21;
|
|
Emios_Pwm_Ip_aRegA[_1][_23] = _24;
|
|
# DEBUG BEGIN_STMT
|
|
_25 = userChCfg_47(D)->timebase;
|
|
Emios_Pwm_Ip_SetCounterBus (base_46, _22, _25);
|
|
# DEBUG BEGIN_STMT
|
|
_26 = userChCfg_47(D)->channelId;
|
|
_27 = userChCfg_47(D)->phaseShift;
|
|
_28 = _21 + _27;
|
|
# DEBUG base => base_46
|
|
# DEBUG channel => _26
|
|
# DEBUG value => _28
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_SetUCRegA
|
|
# DEBUG BEGIN_STMT
|
|
_67 = (int) _26;
|
|
_68 = (long unsigned int) _28;
|
|
base_46->CH.UC[_67].A ={v} _68;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG value => NULL
|
|
# DEBUG BEGIN_STMT
|
|
_29 = _21 + trailingEdge_40;
|
|
# DEBUG base => base_46
|
|
# DEBUG channel => _26
|
|
# DEBUG value => _29
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_SetUCRegB
|
|
# DEBUG BEGIN_STMT
|
|
_66 = (long unsigned int) _29;
|
|
base_46->CH.UC[_67].B ={v} _66;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG value => NULL
|
|
# DEBUG BEGIN_STMT
|
|
_30 = userChCfg_47(D)->triggerPosition;
|
|
_31 = _21 + _30;
|
|
# DEBUG base => base_46
|
|
# DEBUG channel => _26
|
|
# DEBUG value => _31
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_SetTrigger
|
|
# DEBUG BEGIN_STMT
|
|
_62 ={v} base_46->CH.UC[_67].ALTA;
|
|
_63 = _62 & 4294901760;
|
|
_64 = (long unsigned int) _31;
|
|
_65 = _63 | _64;
|
|
base_46->CH.UC[_67].ALTA ={v} _65;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG value => NULL
|
|
# DEBUG BEGIN_STMT
|
|
_32 = userChCfg_47(D)->dutyCycle;
|
|
if (_32 == counterBusPeriod_49)
|
|
goto <bb 10>; [34.00%]
|
|
else
|
|
goto <bb 11>; [66.00%]
|
|
|
|
<bb 10> [local count: 365072220]:
|
|
# DEBUG BEGIN_STMT
|
|
_33 = userChCfg_47(D)->outputPolarity;
|
|
_34 = _33 != 1;
|
|
_35 = (<unnamed type>) _34;
|
|
Emios_Pwm_Ip_SetEdgePolarity (base_46, _26, _35);
|
|
goto <bb 12>; [100.00%]
|
|
|
|
<bb 11> [local count: 708669605]:
|
|
# DEBUG BEGIN_STMT
|
|
_36 = userChCfg_47(D)->outputPolarity;
|
|
Emios_Pwm_Ip_SetEdgePolarity (base_46, _26, _36);
|
|
|
|
<bb 12> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_37 = userChCfg_47(D)->channelId;
|
|
_38 = userChCfg_47(D)->mode;
|
|
# DEBUG base => base_46
|
|
# DEBUG channel => _37
|
|
# DEBUG mode => _38
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_SetPwmMode
|
|
# DEBUG BEGIN_STMT
|
|
_69 = (int) _37;
|
|
_70 ={v} base_46->CH.UC[_69].C;
|
|
_71 = _70 & 4294967168;
|
|
_72 = _38 & 127;
|
|
_73 = (long unsigned int) _72;
|
|
_74 = _71 | _73;
|
|
base_46->CH.UC[_69].C ={v} _74;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG mode => NULL
|
|
# DEBUG BEGIN_STMT
|
|
_39 = userChCfg_47(D)->outputPolarity;
|
|
Emios_Pwm_Ip_SetEdgePolarity (base_46, _37, _39);
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Emios_Pwm_Ip_SetDutyCycleOpwmb (uint8 instance, uint8 channel, uint16 newDutyCycle)
|
|
{
|
|
uint16 chPeriod;
|
|
Emios_Pwm_Ip_StatusType ret;
|
|
struct Emios_Pwm_Ip_HwAddrType * const base;
|
|
int _1;
|
|
<unnamed type> _2;
|
|
int _3;
|
|
int _4;
|
|
short unsigned int _5;
|
|
int _6;
|
|
int _7;
|
|
int _8;
|
|
unsigned char _9;
|
|
_Bool _10;
|
|
short unsigned int _11;
|
|
short unsigned int _12;
|
|
long unsigned int _28;
|
|
long unsigned int _29;
|
|
long unsigned int _30;
|
|
long unsigned int _31;
|
|
long unsigned int _32;
|
|
long unsigned int _33;
|
|
long unsigned int _34;
|
|
long unsigned int _35;
|
|
long unsigned int _36;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) instance_16(D);
|
|
base_18 = Emios_Pwm_Ip_aBasePtr[_1];
|
|
# DEBUG base => base_18
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG ret => 0
|
|
# DEBUG BEGIN_STMT
|
|
_2 = Emios_Pwm_Ip_GetCounterBus (base_18, channel_19(D));
|
|
chPeriod_22 = Emios_Pwm_Ip_GetCounterBusPeriod (instance_16(D), channel_19(D), _2);
|
|
# DEBUG chPeriod => chPeriod_22
|
|
# DEBUG BEGIN_STMT
|
|
_3 = (int) newDutyCycle_23(D);
|
|
_4 = (int) channel_19(D);
|
|
_5 = Emios_Pwm_Ip_aRegA[_1][_4];
|
|
_6 = (int) _5;
|
|
_7 = _3 + _6;
|
|
_8 = (int) chPeriod_22;
|
|
if (_7 > _8)
|
|
goto <bb 9>; [50.00%]
|
|
else
|
|
goto <bb 3>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
if (newDutyCycle_23(D) == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG base => base_18
|
|
# DEBUG channel => channel_19(D)
|
|
# DEBUG value => 0
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_SetInterruptRequest
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG value_convert => 0
|
|
# DEBUG BEGIN_STMT
|
|
_30 ={v} base_18->CH.UC[_4].C;
|
|
_31 = _30 & 4294836223;
|
|
base_18->CH.UC[_4].C ={v} _31;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG value => NULL
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG base => base_18
|
|
# DEBUG channel => channel_19(D)
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_ClearFlagEvent
|
|
# DEBUG BEGIN_STMT
|
|
_28 ={v} base_18->CH.UC[_4].S;
|
|
_29 = _28 | 1;
|
|
base_18->CH.UC[_4].S ={v} _29;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG BEGIN_STMT
|
|
Emios_Pwm_Ip_aNotif[_1][_4] = 1;
|
|
goto <bb 8>; [100.00%]
|
|
|
|
<bb 5> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
if (chPeriod_22 == newDutyCycle_23(D))
|
|
goto <bb 6>; [51.12%]
|
|
else
|
|
goto <bb 7>; [48.88%]
|
|
|
|
<bb 6> [local count: 137224205]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG base => base_18
|
|
# DEBUG channel => channel_19(D)
|
|
# DEBUG value => 0
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_SetInterruptRequest
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG value_convert => 0
|
|
# DEBUG BEGIN_STMT
|
|
_34 ={v} base_18->CH.UC[_4].C;
|
|
_35 = _34 & 4294836223;
|
|
base_18->CH.UC[_4].C ={v} _35;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG value => NULL
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG base => base_18
|
|
# DEBUG channel => channel_19(D)
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_ClearFlagEvent
|
|
# DEBUG BEGIN_STMT
|
|
_32 ={v} base_18->CH.UC[_4].S;
|
|
_33 = _32 | 1;
|
|
base_18->CH.UC[_4].S ={v} _33;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG BEGIN_STMT
|
|
Emios_Pwm_Ip_aNotif[_1][_4] = 1;
|
|
goto <bb 8>; [100.00%]
|
|
|
|
<bb 7> [local count: 131211251]:
|
|
# DEBUG BEGIN_STMT
|
|
Emios_Pwm_Ip_aNotif[_1][_4] = 0;
|
|
# DEBUG BEGIN_STMT
|
|
_9 = Emios_Pwm_Ip_aCheckEnableNotif[_1][_4];
|
|
_10 = _9 != 0;
|
|
Emios_Pwm_Ip_SetInterruptRequest (base_18, channel_19(D), _10);
|
|
|
|
<bb 8> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
_11 = Emios_Pwm_Ip_aRegA[_1][_4];
|
|
_12 = _11 + newDutyCycle_23(D);
|
|
# DEBUG base => base_18
|
|
# DEBUG channel => channel_19(D)
|
|
# DEBUG value => _12
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_SetUCRegB
|
|
# DEBUG BEGIN_STMT
|
|
_36 = (long unsigned int) _12;
|
|
base_18->CH.UC[_4].B ={v} _36;
|
|
|
|
<bb 9> [local count: 1073741824]:
|
|
# ret_13 = PHI <1(2), 0(8)>
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG value => NULL
|
|
# DEBUG ret => ret_13
|
|
# DEBUG BEGIN_STMT
|
|
return ret_13;
|
|
|
|
}
|
|
|
|
|
|
Emios_Pwm_Ip_InitEdgePlacementMode (uint8 instance, const struct Emios_Pwm_Ip_ChannelConfigType * userChCfg)
|
|
{
|
|
struct Emios_Pwm_Ip_HwAddrType * const base;
|
|
int _1;
|
|
unsigned char _2;
|
|
int _3;
|
|
short unsigned int _4;
|
|
<unnamed type> _5;
|
|
unsigned char _6;
|
|
short unsigned int _7;
|
|
short unsigned int _8;
|
|
short unsigned int _9;
|
|
<unnamed type> _10;
|
|
<unnamed type> _11;
|
|
short unsigned int _12;
|
|
short unsigned int _13;
|
|
unsigned char _14;
|
|
int _15;
|
|
unsigned char _16;
|
|
int _17;
|
|
unsigned char _18;
|
|
int _19;
|
|
long unsigned int _31;
|
|
long unsigned int _32;
|
|
<unnamed type> _33;
|
|
long unsigned int _34;
|
|
long unsigned int _35;
|
|
long unsigned int _36;
|
|
int _37;
|
|
long unsigned int _38;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) instance_21(D);
|
|
base_23 = Emios_Pwm_Ip_aBasePtr[_1];
|
|
# DEBUG base => base_23
|
|
# DEBUG BEGIN_STMT
|
|
_2 = userChCfg_24(D)->channelId;
|
|
_3 = (int) _2;
|
|
_4 = userChCfg_24(D)->phaseShift;
|
|
Emios_Pwm_Ip_aRegA[_1][_3] = _4;
|
|
# DEBUG BEGIN_STMT
|
|
_5 = userChCfg_24(D)->timebase;
|
|
Emios_Pwm_Ip_SetCounterBus (base_23, _2, _5);
|
|
# DEBUG BEGIN_STMT
|
|
_6 = userChCfg_24(D)->channelId;
|
|
_7 = userChCfg_24(D)->phaseShift;
|
|
# DEBUG base => base_23
|
|
# DEBUG channel => _6
|
|
# DEBUG value => _7
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_SetUCRegA
|
|
# DEBUG BEGIN_STMT
|
|
_37 = (int) _6;
|
|
_38 = (long unsigned int) _7;
|
|
base_23->CH.UC[_37].A ={v} _38;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG value => NULL
|
|
# DEBUG BEGIN_STMT
|
|
_8 = userChCfg_24(D)->dutyCycle;
|
|
_9 = _7 + _8;
|
|
# DEBUG base => base_23
|
|
# DEBUG channel => _6
|
|
# DEBUG value => _9
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_SetUCRegB
|
|
# DEBUG BEGIN_STMT
|
|
_36 = (long unsigned int) _9;
|
|
base_23->CH.UC[_37].B ={v} _36;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG value => NULL
|
|
# DEBUG BEGIN_STMT
|
|
_10 = userChCfg_24(D)->mode;
|
|
# DEBUG base => base_23
|
|
# DEBUG channel => _6
|
|
# DEBUG mode => _10
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_SetPwmMode
|
|
# DEBUG BEGIN_STMT
|
|
_31 ={v} base_23->CH.UC[_37].C;
|
|
_32 = _31 & 4294967168;
|
|
_33 = _10 & 127;
|
|
_34 = (long unsigned int) _33;
|
|
_35 = _32 | _34;
|
|
base_23->CH.UC[_37].C ={v} _35;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG mode => NULL
|
|
# DEBUG BEGIN_STMT
|
|
_11 = userChCfg_24(D)->outputPolarity;
|
|
Emios_Pwm_Ip_SetEdgePolarity (base_23, _6, _11);
|
|
# DEBUG BEGIN_STMT
|
|
_12 = userChCfg_24(D)->periodCount;
|
|
_13 = userChCfg_24(D)->dutyCycle;
|
|
if (_12 == _13)
|
|
goto <bb 3>; [34.00%]
|
|
else
|
|
goto <bb 4>; [66.00%]
|
|
|
|
<bb 3> [local count: 365072220]:
|
|
# DEBUG BEGIN_STMT
|
|
_14 = userChCfg_24(D)->channelId;
|
|
_15 = (int) _14;
|
|
Emios_Pwm_Ip_aNotif[_1][_15] = 1;
|
|
goto <bb 7>; [100.00%]
|
|
|
|
<bb 4> [local count: 708669605]:
|
|
# DEBUG BEGIN_STMT
|
|
if (_13 <= 1)
|
|
goto <bb 5>; [41.00%]
|
|
else
|
|
goto <bb 6>; [59.00%]
|
|
|
|
<bb 5> [local count: 290554538]:
|
|
# DEBUG BEGIN_STMT
|
|
_16 = userChCfg_24(D)->channelId;
|
|
_17 = (int) _16;
|
|
Emios_Pwm_Ip_aNotif[_1][_17] = 1;
|
|
goto <bb 7>; [100.00%]
|
|
|
|
<bb 6> [local count: 418115066]:
|
|
# DEBUG BEGIN_STMT
|
|
_18 = userChCfg_24(D)->channelId;
|
|
_19 = (int) _18;
|
|
Emios_Pwm_Ip_aNotif[_1][_19] = 0;
|
|
|
|
<bb 7> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Emios_Pwm_Ip_SetDutyCycleOpwmcb (uint8 instance, uint8 channel, uint16 newDutyCycle)
|
|
{
|
|
uint16 chPeriod;
|
|
Emios_Pwm_Ip_PwmModeType chMode;
|
|
Emios_Pwm_Ip_StatusType ret;
|
|
struct Emios_Pwm_Ip_HwAddrType * const base;
|
|
int _1;
|
|
<unnamed type> _2;
|
|
unsigned int _3;
|
|
unsigned int _4;
|
|
unsigned int _5;
|
|
unsigned int _6;
|
|
short unsigned int _7;
|
|
short unsigned int _8;
|
|
short unsigned int _9;
|
|
unsigned char _10;
|
|
_Bool _11;
|
|
long unsigned int _28;
|
|
short unsigned int _29;
|
|
long unsigned int _30;
|
|
long unsigned int _31;
|
|
long unsigned int _32;
|
|
int _33;
|
|
long unsigned int _34;
|
|
long unsigned int _35;
|
|
long unsigned int _36;
|
|
long unsigned int _37;
|
|
long unsigned int _38;
|
|
long unsigned int _39;
|
|
long unsigned int _40;
|
|
long unsigned int _41;
|
|
long unsigned int _42;
|
|
long unsigned int _43;
|
|
int _44;
|
|
long unsigned int _45;
|
|
long unsigned int _46;
|
|
int _47;
|
|
long unsigned int _48;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) instance_14(D);
|
|
base_16 = Emios_Pwm_Ip_aBasePtr[_1];
|
|
# DEBUG base => base_16
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG ret => 0
|
|
# DEBUG BEGIN_STMT
|
|
chMode_19 = Emios_Pwm_Ip_GetPwmMode (base_16, channel_17(D));
|
|
# DEBUG chMode => chMode_19
|
|
# DEBUG BEGIN_STMT
|
|
_2 = Emios_Pwm_Ip_GetCounterBus (base_16, channel_17(D));
|
|
chPeriod_22 = Emios_Pwm_Ip_GetCounterBusPeriod (instance_14(D), channel_17(D), _2);
|
|
# DEBUG chPeriod => chPeriod_22
|
|
# DEBUG BEGIN_STMT
|
|
_3 = (unsigned int) newDutyCycle_23(D);
|
|
_4 = (unsigned int) chPeriod_22;
|
|
_5 = _4 + 2147483647;
|
|
_6 = _5 * 2;
|
|
if (_3 > _6)
|
|
goto <bb 12>; [50.00%]
|
|
else
|
|
goto <bb 3>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
if (newDutyCycle_23(D) == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 9>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG base => base_16
|
|
# DEBUG channel => channel_17(D)
|
|
# DEBUG value => 0
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_SetInterruptRequest
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG value_convert => 0
|
|
# DEBUG BEGIN_STMT
|
|
_33 = (int) channel_17(D);
|
|
_34 ={v} base_16->CH.UC[_33].C;
|
|
_35 = _34 & 4294836223;
|
|
base_16->CH.UC[_33].C ={v} _35;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG value => NULL
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG base => base_16
|
|
# DEBUG channel => channel_17(D)
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_ClearFlagEvent
|
|
# DEBUG BEGIN_STMT
|
|
_31 ={v} base_16->CH.UC[_33].S;
|
|
_32 = _31 | 1;
|
|
base_16->CH.UC[_33].S ={v} _32;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG BEGIN_STMT
|
|
_7 = chPeriod_22 + 1;
|
|
# DEBUG base => base_16
|
|
# DEBUG channel => channel_17(D)
|
|
# DEBUG value => _7
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_SetUCRegA
|
|
# DEBUG BEGIN_STMT
|
|
_30 = (long unsigned int) _7;
|
|
base_16->CH.UC[_33].A ={v} _30;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG value => NULL
|
|
# DEBUG BEGIN_STMT
|
|
Emios_Pwm_Ip_aNotif[_1][_33] = 1;
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG base => base_16
|
|
# DEBUG channel => channel_17(D)
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_GetUCRegA
|
|
# DEBUG BEGIN_STMT
|
|
_28 ={v} MEM[(const struct Emios_Pwm_Ip_HwAddrType *)base_16].CH.UC[_33].A;
|
|
_29 = (short unsigned int) _28;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
if (_29 == 1)
|
|
goto <bb 5>; [34.00%]
|
|
else
|
|
goto <bb 12>; [66.00%]
|
|
|
|
<bb 5> [local count: 91268055]:
|
|
# DEBUG BEGIN_STMT
|
|
if (chMode_19 == 92)
|
|
goto <bb 7>; [34.00%]
|
|
else
|
|
goto <bb 6>; [66.00%]
|
|
|
|
<bb 6> [local count: 60236916]:
|
|
if (chMode_19 == 94)
|
|
goto <bb 7>; [34.00%]
|
|
else
|
|
goto <bb 8>; [66.00%]
|
|
|
|
<bb 7> [local count: 51511690]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG base => base_16
|
|
# DEBUG channel => channel_17(D)
|
|
# DEBUG value => 1
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_SetForceMatchB
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG value_convert => 1
|
|
# DEBUG BEGIN_STMT
|
|
_36 ={v} base_16->CH.UC[_33].C;
|
|
_37 = _36 & 4294963199;
|
|
_38 = _37 | 4096;
|
|
base_16->CH.UC[_33].C ={v} _38;
|
|
goto <bb 12>; [100.00%]
|
|
|
|
<bb 8> [local count: 39756365]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG base => base_16
|
|
# DEBUG channel => channel_17(D)
|
|
# DEBUG value => 1
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_SetForceMatchA
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG value_convert => 1
|
|
# DEBUG BEGIN_STMT
|
|
_39 ={v} base_16->CH.UC[_33].C;
|
|
_40 = _39 & 4294959103;
|
|
_41 = _40 | 8192;
|
|
base_16->CH.UC[_33].C ={v} _41;
|
|
goto <bb 12>; [100.00%]
|
|
|
|
<bb 9> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
if (_3 == _6)
|
|
goto <bb 10>; [51.12%]
|
|
else
|
|
goto <bb 11>; [48.88%]
|
|
|
|
<bb 10> [local count: 137224205]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG base => base_16
|
|
# DEBUG channel => channel_17(D)
|
|
# DEBUG value => 0
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_SetInterruptRequest
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG value_convert => 0
|
|
# DEBUG BEGIN_STMT
|
|
_44 = (int) channel_17(D);
|
|
_45 ={v} base_16->CH.UC[_44].C;
|
|
_46 = _45 & 4294836223;
|
|
base_16->CH.UC[_44].C ={v} _46;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG value => NULL
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG base => base_16
|
|
# DEBUG channel => channel_17(D)
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_ClearFlagEvent
|
|
# DEBUG BEGIN_STMT
|
|
_42 ={v} base_16->CH.UC[_44].S;
|
|
_43 = _42 | 1;
|
|
base_16->CH.UC[_44].S ={v} _43;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG base => base_16
|
|
# DEBUG channel => channel_17(D)
|
|
# DEBUG value => 1
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_SetUCRegA
|
|
# DEBUG BEGIN_STMT
|
|
base_16->CH.UC[_44].A ={v} 1;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG value => NULL
|
|
# DEBUG BEGIN_STMT
|
|
Emios_Pwm_Ip_aNotif[_1][_44] = 1;
|
|
goto <bb 12>; [100.00%]
|
|
|
|
<bb 11> [local count: 131211251]:
|
|
# DEBUG BEGIN_STMT
|
|
_8 = newDutyCycle_23(D) >> 1;
|
|
_9 = chPeriod_22 - _8;
|
|
# DEBUG base => base_16
|
|
# DEBUG channel => channel_17(D)
|
|
# DEBUG value => _9
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_SetUCRegA
|
|
# DEBUG BEGIN_STMT
|
|
_47 = (int) channel_17(D);
|
|
_48 = (long unsigned int) _9;
|
|
base_16->CH.UC[_47].A ={v} _48;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG value => NULL
|
|
# DEBUG BEGIN_STMT
|
|
Emios_Pwm_Ip_aNotif[_1][_47] = 0;
|
|
# DEBUG BEGIN_STMT
|
|
_10 = Emios_Pwm_Ip_aCheckEnableNotif[_1][_47];
|
|
_11 = _10 != 0;
|
|
Emios_Pwm_Ip_SetInterruptRequest (base_16, channel_17(D), _11);
|
|
|
|
<bb 12> [local count: 1073741824]:
|
|
# ret_12 = PHI <1(2), 0(7), 0(10), 0(11), 0(4), 0(8)>
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG value => NULL
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG value => NULL
|
|
# DEBUG ret => ret_12
|
|
# DEBUG BEGIN_STMT
|
|
return ret_12;
|
|
|
|
}
|
|
|
|
|
|
Emios_Pwm_Ip_InitDeadTimeMode (uint8 instance, const struct Emios_Pwm_Ip_ChannelConfigType * userChCfg)
|
|
{
|
|
uint16 dutyCycle;
|
|
struct Emios_Pwm_Ip_HwAddrType * const base;
|
|
int _1;
|
|
short unsigned int _2;
|
|
short unsigned int _3;
|
|
unsigned char _4;
|
|
int _5;
|
|
unsigned char _6;
|
|
<unnamed type> _7;
|
|
short unsigned int _8;
|
|
unsigned char _9;
|
|
int _10;
|
|
unsigned char _11;
|
|
<unnamed type> _12;
|
|
short unsigned int _13;
|
|
unsigned char _14;
|
|
int _15;
|
|
unsigned char _16;
|
|
<unnamed type> _17;
|
|
unsigned char _18;
|
|
short unsigned int _19;
|
|
short unsigned int _20;
|
|
short unsigned int _21;
|
|
<unnamed type> _22;
|
|
_Bool _23;
|
|
<unnamed type> _24;
|
|
<unnamed type> _25;
|
|
unsigned char _26;
|
|
<unnamed type> _27;
|
|
<unnamed type> _28;
|
|
long unsigned int _48;
|
|
int _49;
|
|
long unsigned int _50;
|
|
int _51;
|
|
long unsigned int _52;
|
|
long unsigned int _53;
|
|
<unnamed type> _54;
|
|
long unsigned int _55;
|
|
long unsigned int _56;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) instance_32(D);
|
|
base_34 = Emios_Pwm_Ip_aBasePtr[_1];
|
|
# DEBUG base => base_34
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG dutyCycle => 0
|
|
# DEBUG BEGIN_STMT
|
|
_2 = userChCfg_35(D)->periodCount;
|
|
_3 = userChCfg_35(D)->dutyCycle;
|
|
if (_2 == _3)
|
|
goto <bb 3>; [34.00%]
|
|
else
|
|
goto <bb 4>; [66.00%]
|
|
|
|
<bb 3> [local count: 365072220]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG dutyCycle => 1
|
|
# DEBUG BEGIN_STMT
|
|
_4 = userChCfg_35(D)->channelId;
|
|
_5 = (int) _4;
|
|
Emios_Pwm_Ip_aNotif[_1][_5] = 1;
|
|
goto <bb 7>; [100.00%]
|
|
|
|
<bb 4> [local count: 708669605]:
|
|
# DEBUG BEGIN_STMT
|
|
if (_3 <= 1)
|
|
goto <bb 5>; [41.00%]
|
|
else
|
|
goto <bb 6>; [59.00%]
|
|
|
|
<bb 5> [local count: 290554538]:
|
|
# DEBUG BEGIN_STMT
|
|
_6 = userChCfg_35(D)->channelId;
|
|
_7 = userChCfg_35(D)->timebase;
|
|
_8 = Emios_Pwm_Ip_GetCounterBusPeriod (instance_32(D), _6, _7);
|
|
dutyCycle_41 = _8 + 1;
|
|
# DEBUG dutyCycle => dutyCycle_41
|
|
# DEBUG BEGIN_STMT
|
|
_9 = userChCfg_35(D)->channelId;
|
|
_10 = (int) _9;
|
|
Emios_Pwm_Ip_aNotif[_1][_10] = 1;
|
|
goto <bb 7>; [100.00%]
|
|
|
|
<bb 6> [local count: 418115066]:
|
|
# DEBUG BEGIN_STMT
|
|
dutyCycle_36 = _3 >> 1;
|
|
# DEBUG dutyCycle => dutyCycle_36
|
|
# DEBUG BEGIN_STMT
|
|
_11 = userChCfg_35(D)->channelId;
|
|
_12 = userChCfg_35(D)->timebase;
|
|
_13 = Emios_Pwm_Ip_GetCounterBusPeriod (instance_32(D), _11, _12);
|
|
dutyCycle_38 = _13 - dutyCycle_36;
|
|
# DEBUG dutyCycle => dutyCycle_38
|
|
# DEBUG BEGIN_STMT
|
|
_14 = userChCfg_35(D)->channelId;
|
|
_15 = (int) _14;
|
|
Emios_Pwm_Ip_aNotif[_1][_15] = 0;
|
|
|
|
<bb 7> [local count: 1073741824]:
|
|
# dutyCycle_29 = PHI <1(3), dutyCycle_41(5), dutyCycle_38(6)>
|
|
# DEBUG dutyCycle => dutyCycle_29
|
|
# DEBUG BEGIN_STMT
|
|
_16 = userChCfg_35(D)->channelId;
|
|
_17 = userChCfg_35(D)->timebase;
|
|
Emios_Pwm_Ip_SetCounterBus (base_34, _16, _17);
|
|
# DEBUG BEGIN_STMT
|
|
_18 = userChCfg_35(D)->channelId;
|
|
# DEBUG base => base_34
|
|
# DEBUG channel => _18
|
|
# DEBUG value => dutyCycle_29
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_SetUCRegA
|
|
# DEBUG BEGIN_STMT
|
|
_49 = (int) _18;
|
|
_50 = (long unsigned int) dutyCycle_29;
|
|
base_34->CH.UC[_49].A ={v} _50;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG value => NULL
|
|
# DEBUG BEGIN_STMT
|
|
_19 = userChCfg_35(D)->deadTime;
|
|
# DEBUG base => base_34
|
|
# DEBUG channel => _18
|
|
# DEBUG value => _19
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_SetUCRegB
|
|
# DEBUG BEGIN_STMT
|
|
_48 = (long unsigned int) _19;
|
|
base_34->CH.UC[_49].B ={v} _48;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG value => NULL
|
|
# DEBUG BEGIN_STMT
|
|
_20 = userChCfg_35(D)->periodCount;
|
|
_21 = userChCfg_35(D)->dutyCycle;
|
|
if (_20 == _21)
|
|
goto <bb 8>; [34.00%]
|
|
else
|
|
goto <bb 9>; [66.00%]
|
|
|
|
<bb 8> [local count: 365072220]:
|
|
# DEBUG BEGIN_STMT
|
|
_22 = userChCfg_35(D)->outputPolarity;
|
|
_23 = _22 != 1;
|
|
_24 = (<unnamed type>) _23;
|
|
Emios_Pwm_Ip_SetEdgePolarity (base_34, _18, _24);
|
|
goto <bb 10>; [100.00%]
|
|
|
|
<bb 9> [local count: 708669605]:
|
|
# DEBUG BEGIN_STMT
|
|
_25 = userChCfg_35(D)->outputPolarity;
|
|
Emios_Pwm_Ip_SetEdgePolarity (base_34, _18, _25);
|
|
|
|
<bb 10> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_26 = userChCfg_35(D)->channelId;
|
|
_27 = userChCfg_35(D)->mode;
|
|
# DEBUG base => base_34
|
|
# DEBUG channel => _26
|
|
# DEBUG mode => _27
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_SetPwmMode
|
|
# DEBUG BEGIN_STMT
|
|
_51 = (int) _26;
|
|
_52 ={v} base_34->CH.UC[_51].C;
|
|
_53 = _52 & 4294967168;
|
|
_54 = _27 & 127;
|
|
_55 = (long unsigned int) _54;
|
|
_56 = _53 | _55;
|
|
base_34->CH.UC[_51].C ={v} _56;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG mode => NULL
|
|
# DEBUG BEGIN_STMT
|
|
_28 = userChCfg_35(D)->outputPolarity;
|
|
Emios_Pwm_Ip_SetEdgePolarity (base_34, _26, _28);
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Emios_Pwm_Ip_SetDutyCycleOpwfmb (uint8 instance, uint8 channel, uint16 newDutyCycle)
|
|
{
|
|
Emios_Pwm_Ip_StatusType ret;
|
|
struct Emios_Pwm_Ip_HwAddrType * const base;
|
|
int _1;
|
|
int _2;
|
|
short unsigned int _3;
|
|
unsigned char _4;
|
|
_Bool _5;
|
|
long unsigned int _19;
|
|
long unsigned int _20;
|
|
long unsigned int _21;
|
|
long unsigned int _22;
|
|
long unsigned int _23;
|
|
long unsigned int _24;
|
|
long unsigned int _25;
|
|
long unsigned int _26;
|
|
long unsigned int _27;
|
|
long unsigned int _28;
|
|
long unsigned int _29;
|
|
long unsigned int _30;
|
|
long unsigned int _31;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) instance_9(D);
|
|
base_11 = Emios_Pwm_Ip_aBasePtr[_1];
|
|
# DEBUG base => base_11
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG ret => 0
|
|
# DEBUG BEGIN_STMT
|
|
_2 = (int) channel_12(D);
|
|
_3 = Emios_Pwm_Ip_aPeriod[_1][_2];
|
|
if (_3 < newDutyCycle_13(D))
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 4>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
if (_3 != 0)
|
|
goto <bb 12>; [50.00%]
|
|
else
|
|
goto <bb 4>; [50.00%]
|
|
|
|
<bb 4> [local count: 805306369]:
|
|
# DEBUG BEGIN_STMT
|
|
if (_3 == 0)
|
|
goto <bb 5>; [50.00%]
|
|
else
|
|
goto <bb 6>; [50.00%]
|
|
|
|
<bb 5> [local count: 402653184]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG base => base_11
|
|
# DEBUG channel => channel_12(D)
|
|
# DEBUG value => 0
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_SetInterruptRequest
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG value_convert => 0
|
|
# DEBUG BEGIN_STMT
|
|
_21 ={v} base_11->CH.UC[_2].C;
|
|
_22 = _21 & 4294836223;
|
|
base_11->CH.UC[_2].C ={v} _22;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG value => NULL
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG base => base_11
|
|
# DEBUG channel => channel_12(D)
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_ClearFlagEvent
|
|
# DEBUG BEGIN_STMT
|
|
_19 ={v} base_11->CH.UC[_2].S;
|
|
_20 = _19 | 1;
|
|
base_11->CH.UC[_2].S ={v} _20;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG base => base_11
|
|
# DEBUG channel => channel_12(D)
|
|
# DEBUG value => 0
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_SetUCRegA
|
|
# DEBUG BEGIN_STMT
|
|
base_11->CH.UC[_2].A ={v} 0;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG value => NULL
|
|
# DEBUG BEGIN_STMT
|
|
Emios_Pwm_Ip_aNotif[_1][_2] = 1;
|
|
goto <bb 12>; [100.00%]
|
|
|
|
<bb 6> [local count: 402653184]:
|
|
# DEBUG BEGIN_STMT
|
|
if (newDutyCycle_13(D) == 0)
|
|
goto <bb 7>; [50.00%]
|
|
else
|
|
goto <bb 8>; [50.00%]
|
|
|
|
<bb 7> [local count: 201326592]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG base => base_11
|
|
# DEBUG channel => channel_12(D)
|
|
# DEBUG value => 0
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_SetInterruptRequest
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG value_convert => 0
|
|
# DEBUG BEGIN_STMT
|
|
_25 ={v} base_11->CH.UC[_2].C;
|
|
_26 = _25 & 4294836223;
|
|
base_11->CH.UC[_2].C ={v} _26;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG value => NULL
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG base => base_11
|
|
# DEBUG channel => channel_12(D)
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_ClearFlagEvent
|
|
# DEBUG BEGIN_STMT
|
|
_23 ={v} base_11->CH.UC[_2].S;
|
|
_24 = _23 | 1;
|
|
base_11->CH.UC[_2].S ={v} _24;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG BEGIN_STMT
|
|
Emios_Pwm_Ip_aNotif[_1][_2] = 1;
|
|
goto <bb 11>; [100.00%]
|
|
|
|
<bb 8> [local count: 201326592]:
|
|
# DEBUG BEGIN_STMT
|
|
if (_3 == newDutyCycle_13(D))
|
|
goto <bb 9>; [51.12%]
|
|
else
|
|
goto <bb 10>; [48.88%]
|
|
|
|
<bb 9> [local count: 102918154]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG base => base_11
|
|
# DEBUG channel => channel_12(D)
|
|
# DEBUG value => 0
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_SetInterruptRequest
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG value_convert => 0
|
|
# DEBUG BEGIN_STMT
|
|
_29 ={v} base_11->CH.UC[_2].C;
|
|
_30 = _29 & 4294836223;
|
|
base_11->CH.UC[_2].C ={v} _30;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG value => NULL
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG base => base_11
|
|
# DEBUG channel => channel_12(D)
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_ClearFlagEvent
|
|
# DEBUG BEGIN_STMT
|
|
_27 ={v} base_11->CH.UC[_2].S;
|
|
_28 = _27 | 1;
|
|
base_11->CH.UC[_2].S ={v} _28;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG BEGIN_STMT
|
|
Emios_Pwm_Ip_aNotif[_1][_2] = 1;
|
|
goto <bb 11>; [100.00%]
|
|
|
|
<bb 10> [local count: 98408438]:
|
|
# DEBUG BEGIN_STMT
|
|
Emios_Pwm_Ip_aNotif[_1][_2] = 0;
|
|
# DEBUG BEGIN_STMT
|
|
_4 = Emios_Pwm_Ip_aCheckEnableNotif[_1][_2];
|
|
_5 = _4 != 0;
|
|
Emios_Pwm_Ip_SetInterruptRequest (base_11, channel_12(D), _5);
|
|
|
|
<bb 11> [local count: 402653184]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG base => base_11
|
|
# DEBUG channel => channel_12(D)
|
|
# DEBUG value => newDutyCycle_13(D)
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_SetUCRegA
|
|
# DEBUG BEGIN_STMT
|
|
_31 = (long unsigned int) newDutyCycle_13(D);
|
|
base_11->CH.UC[_2].A ={v} _31;
|
|
|
|
<bb 12> [local count: 1073741824]:
|
|
# ret_6 = PHI <1(3), 0(5), 0(11)>
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG value => NULL
|
|
# DEBUG ret => ret_6
|
|
# DEBUG BEGIN_STMT
|
|
return ret_6;
|
|
|
|
}
|
|
|
|
|
|
Emios_Pwm_Ip_InitPeriodDutyCycleMode (uint8 instance, const struct Emios_Pwm_Ip_ChannelConfigType * userChCfg)
|
|
{
|
|
struct Emios_Pwm_Ip_HwAddrType * const base;
|
|
int _1;
|
|
unsigned char _2;
|
|
<unnamed type> _3;
|
|
unsigned char _4;
|
|
short unsigned int _5;
|
|
short unsigned int _6;
|
|
<unnamed type> _7;
|
|
<unnamed type> _8;
|
|
_Bool _9;
|
|
<unnamed type> _10;
|
|
unsigned char _11;
|
|
int _12;
|
|
short unsigned int _13;
|
|
short unsigned int _14;
|
|
long unsigned int _26;
|
|
long unsigned int _27;
|
|
<unnamed type> _28;
|
|
long unsigned int _29;
|
|
long unsigned int _30;
|
|
long unsigned int _31;
|
|
int _32;
|
|
long unsigned int _33;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) instance_16(D);
|
|
base_18 = Emios_Pwm_Ip_aBasePtr[_1];
|
|
# DEBUG base => base_18
|
|
# DEBUG BEGIN_STMT
|
|
_2 = userChCfg_19(D)->channelId;
|
|
_3 = userChCfg_19(D)->timebase;
|
|
Emios_Pwm_Ip_SetCounterBus (base_18, _2, _3);
|
|
# DEBUG BEGIN_STMT
|
|
_4 = userChCfg_19(D)->channelId;
|
|
_5 = userChCfg_19(D)->dutyCycle;
|
|
# DEBUG base => base_18
|
|
# DEBUG channel => _4
|
|
# DEBUG value => _5
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_SetUCRegA
|
|
# DEBUG BEGIN_STMT
|
|
_32 = (int) _4;
|
|
_33 = (long unsigned int) _5;
|
|
base_18->CH.UC[_32].A ={v} _33;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG value => NULL
|
|
# DEBUG BEGIN_STMT
|
|
_6 = userChCfg_19(D)->periodCount;
|
|
# DEBUG base => base_18
|
|
# DEBUG channel => _4
|
|
# DEBUG value => _6
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_SetUCRegB
|
|
# DEBUG BEGIN_STMT
|
|
_31 = (long unsigned int) _6;
|
|
base_18->CH.UC[_32].B ={v} _31;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG value => NULL
|
|
# DEBUG BEGIN_STMT
|
|
_7 = userChCfg_19(D)->mode;
|
|
# DEBUG base => base_18
|
|
# DEBUG channel => _4
|
|
# DEBUG mode => _7
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_SetPwmMode
|
|
# DEBUG BEGIN_STMT
|
|
_26 ={v} base_18->CH.UC[_32].C;
|
|
_27 = _26 & 4294967168;
|
|
_28 = _7 & 127;
|
|
_29 = (long unsigned int) _28;
|
|
_30 = _27 | _29;
|
|
base_18->CH.UC[_32].C ={v} _30;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG mode => NULL
|
|
# DEBUG BEGIN_STMT
|
|
_8 = userChCfg_19(D)->outputPolarity;
|
|
_9 = _8 != 1;
|
|
_10 = (<unnamed type>) _9;
|
|
Emios_Pwm_Ip_SetEdgePolarity (base_18, _4, _10);
|
|
# DEBUG BEGIN_STMT
|
|
_11 = userChCfg_19(D)->channelId;
|
|
_12 = (int) _11;
|
|
_13 = userChCfg_19(D)->periodCount;
|
|
Emios_Pwm_Ip_aPeriod[_1][_12] = _13;
|
|
# DEBUG BEGIN_STMT
|
|
_14 = userChCfg_19(D)->dutyCycle;
|
|
if (_13 == _14)
|
|
goto <bb 3>; [34.00%]
|
|
else
|
|
goto <bb 4>; [66.00%]
|
|
|
|
<bb 3> [local count: 365072220]:
|
|
# DEBUG BEGIN_STMT
|
|
Emios_Pwm_Ip_aNotif[_1][_12] = 1;
|
|
goto <bb 7>; [100.00%]
|
|
|
|
<bb 4> [local count: 708669605]:
|
|
# DEBUG BEGIN_STMT
|
|
if (_14 == 0)
|
|
goto <bb 5>; [50.00%]
|
|
else
|
|
goto <bb 6>; [50.00%]
|
|
|
|
<bb 5> [local count: 354334802]:
|
|
# DEBUG BEGIN_STMT
|
|
Emios_Pwm_Ip_aNotif[_1][_12] = 1;
|
|
goto <bb 7>; [100.00%]
|
|
|
|
<bb 6> [local count: 354334802]:
|
|
# DEBUG BEGIN_STMT
|
|
Emios_Pwm_Ip_aNotif[_1][_12] = 0;
|
|
|
|
<bb 7> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Emios_Pwm_Ip_GetCounterBusMode (uint8 instance, uint8 channel, Emios_Pwm_Ip_CounterBusSourceType counterBus)
|
|
{
|
|
Emios_Pwm_Ip_MasterBusModeType counterBusMode;
|
|
const struct Emios_Pwm_Ip_HwAddrType * const base;
|
|
int _1;
|
|
unsigned char _2;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) instance_5(D);
|
|
base_7 = Emios_Pwm_Ip_aBasePtr[_1];
|
|
# DEBUG base => base_7
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG counterBusMode => 16
|
|
# DEBUG BEGIN_STMT
|
|
switch (counterBus_8(D)) <default: <L6> [25.00%], case 0: <L0> [25.00%], case 1: <L1> [25.00%], case 2: <L2> [25.00%]>
|
|
|
|
<bb 3> [local count: 268435456]:
|
|
<L0>:
|
|
# DEBUG BEGIN_STMT
|
|
counterBusMode_15 = Emios_Pwm_Ip_GetChannelPwmMode (base_7, 23);
|
|
# DEBUG counterBusMode => counterBusMode_15
|
|
# DEBUG BEGIN_STMT
|
|
goto <bb 6>; [100.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
<L1>:
|
|
# DEBUG BEGIN_STMT
|
|
_2 = channel_11(D) & 248;
|
|
counterBusMode_13 = Emios_Pwm_Ip_GetChannelPwmMode (base_7, _2);
|
|
# DEBUG counterBusMode => counterBusMode_13
|
|
# DEBUG BEGIN_STMT
|
|
goto <bb 6>; [100.00%]
|
|
|
|
<bb 5> [local count: 268435456]:
|
|
<L2>:
|
|
# DEBUG BEGIN_STMT
|
|
counterBusMode_10 = Emios_Pwm_Ip_GetChannelPwmMode (base_7, 22);
|
|
# DEBUG counterBusMode => counterBusMode_10
|
|
# DEBUG BEGIN_STMT
|
|
|
|
<bb 6> [local count: 1073741824]:
|
|
# counterBusMode_3 = PHI <counterBusMode_15(3), counterBusMode_13(4), counterBusMode_10(5), 0(2)>
|
|
<L6>:
|
|
# DEBUG counterBusMode => counterBusMode_3
|
|
# DEBUG BEGIN_STMT
|
|
return counterBusMode_3;
|
|
|
|
}
|
|
|
|
|
|
Emios_Pwm_Ip_GetCounterBusPeriod (uint8 instance, uint8 channel, Emios_Pwm_Ip_CounterBusSourceType counterBus)
|
|
{
|
|
uint16 chPeriod;
|
|
const struct Emios_Pwm_Ip_HwAddrType * const base;
|
|
int _1;
|
|
unsigned char _2;
|
|
long unsigned int _9;
|
|
short unsigned int _10;
|
|
long unsigned int _11;
|
|
short unsigned int _12;
|
|
int _13;
|
|
long unsigned int _14;
|
|
short unsigned int _15;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) instance_4(D);
|
|
base_6 = Emios_Pwm_Ip_aBasePtr[_1];
|
|
# DEBUG base => base_6
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG chPeriod => 0
|
|
# DEBUG BEGIN_STMT
|
|
if (counterBus_7(D) == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 4>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG base => base_6
|
|
# DEBUG channel => 23
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_GetUCRegA
|
|
# DEBUG BEGIN_STMT
|
|
_9 ={v} base_6->CH.UC[23].A;
|
|
_10 = (short unsigned int) _9;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG chPeriod => _10
|
|
goto <bb 8>; [100.00%]
|
|
|
|
<bb 4> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
if (counterBus_7(D) == 2)
|
|
goto <bb 5>; [34.00%]
|
|
else
|
|
goto <bb 6>; [66.00%]
|
|
|
|
<bb 5> [local count: 182536110]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG base => base_6
|
|
# DEBUG channel => 22
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_GetUCRegA
|
|
# DEBUG BEGIN_STMT
|
|
_11 ={v} base_6->CH.UC[22].A;
|
|
_12 = (short unsigned int) _11;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG chPeriod => _12
|
|
goto <bb 8>; [100.00%]
|
|
|
|
<bb 6> [local count: 354334802]:
|
|
# DEBUG BEGIN_STMT
|
|
if (counterBus_7(D) == 1)
|
|
goto <bb 7>; [34.00%]
|
|
else
|
|
goto <bb 8>; [66.00%]
|
|
|
|
<bb 7> [local count: 120473833]:
|
|
# DEBUG BEGIN_STMT
|
|
_2 = channel_8(D) & 248;
|
|
# DEBUG base => base_6
|
|
# DEBUG channel => _2
|
|
# DEBUG INLINE_ENTRY Emios_Pwm_Ip_GetUCRegA
|
|
# DEBUG BEGIN_STMT
|
|
_13 = (int) _2;
|
|
_14 ={v} base_6->CH.UC[_13].A;
|
|
_15 = (short unsigned int) _14;
|
|
# DEBUG base => NULL
|
|
# DEBUG channel => NULL
|
|
# DEBUG chPeriod => _15
|
|
|
|
<bb 8> [local count: 1073741824]:
|
|
# chPeriod_3 = PHI <_10(3), _12(5), 0(6), _15(7)>
|
|
# DEBUG chPeriod => chPeriod_3
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
return chPeriod_3;
|
|
|
|
}
|
|
|
|
|
|
Emios_Pwm_Ip_SetPrescalerSource (struct Emios_Pwm_Ip_HwAddrType * const base, uint8 channel, Emios_Pwm_Ip_InternalPsSrcType value)
|
|
{
|
|
int _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
long unsigned int _7;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) channel_8(D);
|
|
_2 ={v} base_10(D)->CH.UC[_1].C2;
|
|
_3 = _2 & 4294950911;
|
|
_4 = (long unsigned int) value_11(D);
|
|
_5 = _4 << 14;
|
|
_6 = _5 & 16384;
|
|
_7 = _3 | _6;
|
|
base_10(D)->CH.UC[_1].C2 ={v} _7;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Emios_Pwm_Ip_SetExtendedPrescaler (struct Emios_Pwm_Ip_HwAddrType * const base, uint8 channel, Emios_Pwm_Ip_InternalClkPsType value)
|
|
{
|
|
int _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
long unsigned int _7;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) channel_8(D);
|
|
_2 ={v} base_10(D)->CH.UC[_1].C2;
|
|
_3 = _2 & 4293984255;
|
|
_4 = (long unsigned int) value_11(D);
|
|
_5 = _4 << 16;
|
|
_6 = _5 & 983040;
|
|
_7 = _3 | _6;
|
|
base_10(D)->CH.UC[_1].C2 ={v} _7;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Emios_Pwm_Ip_GetChannelPwmMode (const struct Emios_Pwm_Ip_HwAddrType * const base, uint8 channel)
|
|
{
|
|
Emios_Pwm_Ip_MasterBusModeType masterBusMode;
|
|
int _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
|
|
<bb 2> [local count: 1073527120]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) channel_5(D);
|
|
_2 ={v} base_7(D)->CH.UC[_1].C;
|
|
_3 = _2 & 127;
|
|
switch (_3) <default: <L5> [16.67%], case 16: <L8> [16.67%], case 18: <L1> [16.67%], case 20: <L2> [16.67%], case 80: <L3> [16.67%], case 84: <L4> [16.67%]>
|
|
|
|
<bb 3> [local count: 178956971]:
|
|
<L1>:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG masterBusMode => 18
|
|
# DEBUG BEGIN_STMT
|
|
goto <bb 8>; [100.00%]
|
|
|
|
<bb 4> [local count: 178956971]:
|
|
<L2>:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG masterBusMode => 20
|
|
# DEBUG BEGIN_STMT
|
|
goto <bb 8>; [100.00%]
|
|
|
|
<bb 5> [local count: 178956971]:
|
|
<L3>:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG masterBusMode => 80
|
|
# DEBUG BEGIN_STMT
|
|
goto <bb 8>; [100.00%]
|
|
|
|
<bb 6> [local count: 178956971]:
|
|
<L4>:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG masterBusMode => 84
|
|
# DEBUG BEGIN_STMT
|
|
goto <bb 8>; [100.00%]
|
|
|
|
<bb 7> [local count: 178956971]:
|
|
<L5>:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG masterBusMode => 0
|
|
# DEBUG BEGIN_STMT
|
|
|
|
<bb 8> [local count: 1073741824]:
|
|
# masterBusMode_4 = PHI <16(2), 18(3), 20(4), 80(5), 84(6), 0(7)>
|
|
<L8>:
|
|
# DEBUG masterBusMode => masterBusMode_4
|
|
# DEBUG BEGIN_STMT
|
|
return masterBusMode_4;
|
|
|
|
}
|
|
|
|
|
|
Emios_Pwm_Ip_SetPwmModePol (struct Emios_Pwm_Ip_HwAddrType * const base, uint8 channel, Emios_Pwm_Ip_PwmModeType mode, Emios_Pwm_Ip_PolarityType pol)
|
|
{
|
|
int _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
long unsigned int _7;
|
|
long unsigned int _8;
|
|
long unsigned int _9;
|
|
<unnamed type> _16;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) channel_10(D);
|
|
_2 ={v} base_12(D)->CH.UC[_1].C;
|
|
_3 = _2 & 4294967040;
|
|
_16 = mode_13(D) & 127;
|
|
_4 = (long unsigned int) _16;
|
|
_5 = _3 | _4;
|
|
_6 = (long unsigned int) pol_14(D);
|
|
_7 = _6 << 7;
|
|
_8 = _7 & 255;
|
|
_9 = _5 | _8;
|
|
base_12(D)->CH.UC[_1].C ={v} _9;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Emios_Pwm_Ip_GetPwmMode (const struct Emios_Pwm_Ip_HwAddrType * const base, uint8 channel)
|
|
{
|
|
Emios_Pwm_Ip_PwmModeType mode;
|
|
int _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) channel_5(D);
|
|
_2 ={v} base_7(D)->CH.UC[_1].C;
|
|
_3 = _2 & 127;
|
|
switch (_3) <default: <L12> [7.69%], case 1: <L15> [7.69%], case 6: <L1> [7.69%], case 7: <L2> [7.69%], case 38: <L3> [7.69%], case 88: <L4> [7.69%], case 90: <L5> [7.69%], case 92: <L6> [7.69%], case 93: <L8> [7.69%], case 94: <L7> [7.69%], case 95: <L9> [7.69%], case 96: <L10> [7.69%], case 98: <L11> [7.69%]>
|
|
|
|
<bb 3> [local count: 82570746]:
|
|
<L1>:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG mode => 6
|
|
# DEBUG BEGIN_STMT
|
|
goto <bb 15>; [100.00%]
|
|
|
|
<bb 4> [local count: 82570746]:
|
|
<L2>:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG mode => 7
|
|
# DEBUG BEGIN_STMT
|
|
goto <bb 15>; [100.00%]
|
|
|
|
<bb 5> [local count: 82570746]:
|
|
<L3>:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG mode => 38
|
|
# DEBUG BEGIN_STMT
|
|
goto <bb 15>; [100.00%]
|
|
|
|
<bb 6> [local count: 82570746]:
|
|
<L4>:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG mode => 88
|
|
# DEBUG BEGIN_STMT
|
|
goto <bb 15>; [100.00%]
|
|
|
|
<bb 7> [local count: 82570746]:
|
|
<L5>:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG mode => 90
|
|
# DEBUG BEGIN_STMT
|
|
goto <bb 15>; [100.00%]
|
|
|
|
<bb 8> [local count: 82570746]:
|
|
<L6>:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG mode => 92
|
|
# DEBUG BEGIN_STMT
|
|
goto <bb 15>; [100.00%]
|
|
|
|
<bb 9> [local count: 82570746]:
|
|
<L7>:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG mode => 94
|
|
# DEBUG BEGIN_STMT
|
|
goto <bb 15>; [100.00%]
|
|
|
|
<bb 10> [local count: 82570746]:
|
|
<L8>:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG mode => 93
|
|
# DEBUG BEGIN_STMT
|
|
goto <bb 15>; [100.00%]
|
|
|
|
<bb 11> [local count: 82570746]:
|
|
<L9>:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG mode => 95
|
|
# DEBUG BEGIN_STMT
|
|
goto <bb 15>; [100.00%]
|
|
|
|
<bb 12> [local count: 82570746]:
|
|
<L10>:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG mode => 96
|
|
# DEBUG BEGIN_STMT
|
|
goto <bb 15>; [100.00%]
|
|
|
|
<bb 13> [local count: 82570746]:
|
|
<L11>:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG mode => 98
|
|
# DEBUG BEGIN_STMT
|
|
goto <bb 15>; [100.00%]
|
|
|
|
<bb 14> [local count: 82570746]:
|
|
<L12>:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG mode => 255
|
|
# DEBUG BEGIN_STMT
|
|
|
|
<bb 15> [local count: 1073419702]:
|
|
# mode_4 = PHI <1(2), 6(3), 7(4), 38(5), 88(6), 90(7), 92(8), 94(9), 93(10), 95(11), 96(12), 98(13), 255(14)>
|
|
<L15>:
|
|
# DEBUG mode => mode_4
|
|
# DEBUG BEGIN_STMT
|
|
return mode_4;
|
|
|
|
}
|
|
|
|
|
|
Emios_Pwm_Ip_SetEdgePolarity (struct Emios_Pwm_Ip_HwAddrType * const base, uint8 channel, Emios_Pwm_Ip_PolarityType value)
|
|
{
|
|
int _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
long unsigned int _7;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) channel_8(D);
|
|
_2 ={v} base_10(D)->CH.UC[_1].C;
|
|
_3 = _2 & 4294967167;
|
|
_4 = (long unsigned int) value_11(D);
|
|
_5 = _4 << 7;
|
|
_6 = _5 & 255;
|
|
_7 = _3 | _6;
|
|
base_10(D)->CH.UC[_1].C ={v} _7;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Emios_Pwm_Ip_GetCounterBus (const struct Emios_Pwm_Ip_HwAddrType * const base, uint8 channel)
|
|
{
|
|
Emios_Pwm_Ip_CounterBusSourceType counterBus;
|
|
int _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
<unnamed type> _10;
|
|
unsigned int _12;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) channel_6(D);
|
|
_2 ={v} base_8(D)->CH.UC[_1].C;
|
|
_3 = _2 >> 9;
|
|
_4 = _3 & 3;
|
|
_12 = _4;
|
|
if (_12 <= 2)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 3>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
<L7>:
|
|
counterBus_11 = 3;
|
|
goto <bb 5>; [100.00%]
|
|
|
|
<bb 4> [local count: 536870913]:
|
|
<L8>:
|
|
_10 = (<unnamed type>) _4;
|
|
counterBus_9 = _10;
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# counterBus_5 = PHI <counterBus_9(4), counterBus_11(3)>
|
|
<L9>:
|
|
<L6>:
|
|
# DEBUG counterBus => counterBus_5
|
|
# DEBUG BEGIN_STMT
|
|
return counterBus_5;
|
|
|
|
}
|
|
|
|
|
|
Emios_Pwm_Ip_SetCounterBus (struct Emios_Pwm_Ip_HwAddrType * const base, uint8 channel, Emios_Pwm_Ip_CounterBusSourceType value)
|
|
{
|
|
int _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
long unsigned int _7;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) channel_8(D);
|
|
_2 ={v} base_10(D)->CH.UC[_1].C;
|
|
_3 = _2 & 4294965759;
|
|
_4 = (long unsigned int) value_11(D);
|
|
_5 = _4 << 9;
|
|
_6 = _5 & 1536;
|
|
_7 = _3 | _6;
|
|
base_10(D)->CH.UC[_1].C ={v} _7;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Emios_Pwm_Ip_SetForceMatchB (struct Emios_Pwm_Ip_HwAddrType * const base, uint8 channel, boolean value)
|
|
{
|
|
int _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
uint8 iftmp.6_7;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
if (value_8(D) != 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 4>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
|
|
<bb 4> [local count: 1073741824]:
|
|
# iftmp.6_7 = PHI <0(2), 1(3)>
|
|
# DEBUG value_convert => iftmp.6_7
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) channel_9(D);
|
|
_2 ={v} base_11(D)->CH.UC[_1].C;
|
|
_3 = _2 & 4294963199;
|
|
_4 = (long unsigned int) iftmp.6_7;
|
|
_5 = _4 << 12;
|
|
_6 = _3 | _5;
|
|
base_11(D)->CH.UC[_1].C ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Emios_Pwm_Ip_SetForceMatchA (struct Emios_Pwm_Ip_HwAddrType * const base, uint8 channel, boolean value)
|
|
{
|
|
int _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
uint8 iftmp.7_7;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
if (value_8(D) != 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 4>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
|
|
<bb 4> [local count: 1073741824]:
|
|
# iftmp.7_7 = PHI <0(2), 1(3)>
|
|
# DEBUG value_convert => iftmp.7_7
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) channel_9(D);
|
|
_2 ={v} base_11(D)->CH.UC[_1].C;
|
|
_3 = _2 & 4294959103;
|
|
_4 = (long unsigned int) iftmp.7_7;
|
|
_5 = _4 << 13;
|
|
_6 = _3 | _5;
|
|
base_11(D)->CH.UC[_1].C ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Emios_Pwm_Ip_SetInterruptRequest (struct Emios_Pwm_Ip_HwAddrType * const base, uint8 channel, boolean value)
|
|
{
|
|
int _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
uint8 iftmp.5_7;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
if (value_8(D) != 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 4>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
|
|
<bb 4> [local count: 1073741824]:
|
|
# iftmp.5_7 = PHI <0(2), 1(3)>
|
|
# DEBUG value_convert => iftmp.5_7
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) channel_9(D);
|
|
_2 ={v} base_11(D)->CH.UC[_1].C;
|
|
_3 = _2 & 4294836223;
|
|
_4 = (long unsigned int) iftmp.5_7;
|
|
_5 = _4 << 17;
|
|
_6 = _3 | _5;
|
|
base_11(D)->CH.UC[_1].C ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Emios_Pwm_Ip_SetPrescalerEnable (struct Emios_Pwm_Ip_HwAddrType * const base, uint8 channel, boolean value)
|
|
{
|
|
int _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
uint8 iftmp.8_7;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
if (value_8(D) != 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 4>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
|
|
<bb 4> [local count: 1073741824]:
|
|
# iftmp.8_7 = PHI <0(2), 1(3)>
|
|
# DEBUG value_convert => iftmp.8_7
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) channel_9(D);
|
|
_2 ={v} base_11(D)->CH.UC[_1].C;
|
|
_3 = _2 & 4261412863;
|
|
_4 = (long unsigned int) iftmp.8_7;
|
|
_5 = _4 << 25;
|
|
_6 = _3 | _5;
|
|
base_11(D)->CH.UC[_1].C ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Emios_Pwm_Ip_SetOutDisableSource (struct Emios_Pwm_Ip_HwAddrType * const base, uint8 channel, Emios_Pwm_Ip_OutDisableSourceType value)
|
|
{
|
|
int _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
long unsigned int _7;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) channel_8(D);
|
|
_2 ={v} base_10(D)->CH.UC[_1].C;
|
|
_3 = _2 & 3489660927;
|
|
_4 = (long unsigned int) value_11(D);
|
|
_5 = _4 << 28;
|
|
_6 = _5 & 805306368;
|
|
_7 = _3 | _6;
|
|
base_10(D)->CH.UC[_1].C ={v} _7;
|
|
return;
|
|
|
|
}
|
|
|
|
|