mirror of
https://github.com/Dev-KATECH/ADM.git
synced 2026-05-17 09:53:59 +09:00
3minbe
85257c3f29
- Drive_Mode.c 수정 : bool 변수 삭제 - Drive_Mode.c/RcRequestCheck 함수 수정 : RC ACU 동시 요청 시 비상정지 : 마지막 요청을 RC_ModeReq에 저장하도록 수정 - Drive_Mode.c/ExecuteEmergencyMode 함수 수정 : VCU_Emergency_Flag 조건 추가 - VSCode에서 빌드 가능하도록 수정 : GW/Debug_STANDALONE 생성
6883 lines
249 KiB
C++
6883 lines
249 KiB
C++
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IPA constant propagation start:
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IPA structures before propagation:
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Jump functions:
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Jump functions of caller Sys_GetCoreID/189:
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Jump functions of caller SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_46/188:
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Jump functions of caller SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_46/187:
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Jump functions of caller SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_45/186:
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Jump functions of caller SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_45/185:
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Jump functions of caller SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_44/184:
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Jump functions of caller SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_44/183:
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Jump functions of caller SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_43/182:
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Jump functions of caller SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_43/181:
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Jump functions of caller SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_42/180:
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Jump functions of caller SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_42/179:
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Jump functions of caller SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_41/178:
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Jump functions of caller SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_41/177:
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Jump functions of caller SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_40/176:
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Jump functions of caller SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_40/175:
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Jump functions of caller SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_39/174:
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Jump functions of caller SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_39/173:
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Jump functions of caller SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_38/172:
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Jump functions of caller SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_38/171:
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Jump functions of caller SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_37/170:
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Jump functions of caller SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_37/169:
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Jump functions of caller SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_36/168:
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Jump functions of caller SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_36/167:
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Jump functions of caller SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_35/166:
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Jump functions of caller SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_35/165:
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Jump functions of caller SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_34/164:
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Jump functions of caller SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_34/163:
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Jump functions of caller SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_33/162:
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Jump functions of caller SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_33/161:
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Jump functions of caller SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_32/160:
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Jump functions of caller SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_32/159:
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Jump functions of caller SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_31/158:
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Jump functions of caller SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_31/157:
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Jump functions of caller SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_30/156:
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Jump functions of caller SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_30/155:
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Jump functions of caller SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_29/154:
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Jump functions of caller SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_29/153:
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Jump functions of caller SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_28/152:
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Jump functions of caller SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_28/151:
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Jump functions of caller SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_27/150:
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Jump functions of caller SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_27/149:
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Jump functions of caller SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_26/148:
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Jump functions of caller SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_26/147:
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Jump functions of caller SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_25/146:
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Jump functions of caller SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_25/145:
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Jump functions of caller SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_24/144:
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Jump functions of caller SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_24/143:
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Jump functions of caller SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_23/142:
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Jump functions of caller SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_23/141:
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Jump functions of caller SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_22/140:
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Jump functions of caller SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_22/139:
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Jump functions of caller SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_21/138:
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Jump functions of caller SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_21/137:
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Jump functions of caller SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_20/136:
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Jump functions of caller SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_20/135:
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Jump functions of caller SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_19/134:
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Jump functions of caller SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_19/133:
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Jump functions of caller SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_18/132:
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Jump functions of caller SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_18/131:
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Jump functions of caller SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_17/130:
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Jump functions of caller SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_17/129:
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Jump functions of caller SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_16/128:
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Jump functions of caller SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_16/127:
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Jump functions of caller SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_15/126:
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Jump functions of caller SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_15/125:
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Jump functions of caller SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_14/124:
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Jump functions of caller SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_14/123:
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Jump functions of caller SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_13/122:
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Jump functions of caller SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_13/121:
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Jump functions of caller SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_12/120:
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Jump functions of caller SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_12/119:
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Jump functions of caller SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_11/118:
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Jump functions of caller SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_11/117:
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Jump functions of caller SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_10/116:
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Jump functions of caller SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_10/115:
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Jump functions of caller SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_09/114:
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Jump functions of caller SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_09/113:
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Jump functions of caller SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_08/112:
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Jump functions of caller SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_08/111:
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Jump functions of caller SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_07/110:
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Jump functions of caller SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_07/109:
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Jump functions of caller SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_06/108:
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Jump functions of caller SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_06/107:
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Jump functions of caller SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_05/106:
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Jump functions of caller SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_05/105:
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Jump functions of caller SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_04/104:
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Jump functions of caller SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_04/103:
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Jump functions of caller SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_03/102:
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Jump functions of caller SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_03/101:
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Jump functions of caller SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_02/100:
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Jump functions of caller SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_02/99:
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Jump functions of caller SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_01/98:
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Jump functions of caller SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_01/97:
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Jump functions of caller SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_00/96:
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Jump functions of caller SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_00/95:
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Jump functions of caller Mcl_schm_read_msr/94:
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Propagating constants:
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Not considering SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_46 for cloning; -fipa-cp-clone disabled.
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Not considering SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_46 for cloning; -fipa-cp-clone disabled.
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Not considering SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_45 for cloning; -fipa-cp-clone disabled.
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Not considering SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_45 for cloning; -fipa-cp-clone disabled.
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Not considering SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_44 for cloning; -fipa-cp-clone disabled.
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Not considering SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_44 for cloning; -fipa-cp-clone disabled.
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Not considering SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_43 for cloning; -fipa-cp-clone disabled.
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Not considering SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_43 for cloning; -fipa-cp-clone disabled.
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Not considering SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_42 for cloning; -fipa-cp-clone disabled.
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Not considering SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_42 for cloning; -fipa-cp-clone disabled.
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Not considering SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_41 for cloning; -fipa-cp-clone disabled.
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Not considering SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_41 for cloning; -fipa-cp-clone disabled.
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Not considering SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_40 for cloning; -fipa-cp-clone disabled.
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Not considering SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_40 for cloning; -fipa-cp-clone disabled.
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Not considering SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_39 for cloning; -fipa-cp-clone disabled.
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Not considering SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_39 for cloning; -fipa-cp-clone disabled.
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Not considering SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_38 for cloning; -fipa-cp-clone disabled.
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Not considering SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_38 for cloning; -fipa-cp-clone disabled.
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Not considering SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_37 for cloning; -fipa-cp-clone disabled.
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Not considering SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_37 for cloning; -fipa-cp-clone disabled.
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Not considering SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_36 for cloning; -fipa-cp-clone disabled.
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Not considering SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_36 for cloning; -fipa-cp-clone disabled.
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Not considering SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_35 for cloning; -fipa-cp-clone disabled.
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Not considering SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_35 for cloning; -fipa-cp-clone disabled.
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Not considering SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_34 for cloning; -fipa-cp-clone disabled.
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Not considering SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_34 for cloning; -fipa-cp-clone disabled.
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Not considering SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_33 for cloning; -fipa-cp-clone disabled.
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Not considering SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_33 for cloning; -fipa-cp-clone disabled.
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Not considering SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_32 for cloning; -fipa-cp-clone disabled.
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Not considering SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_32 for cloning; -fipa-cp-clone disabled.
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Not considering SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_31 for cloning; -fipa-cp-clone disabled.
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Not considering SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_31 for cloning; -fipa-cp-clone disabled.
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Not considering SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_30 for cloning; -fipa-cp-clone disabled.
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Not considering SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_30 for cloning; -fipa-cp-clone disabled.
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Not considering SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_29 for cloning; -fipa-cp-clone disabled.
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Not considering SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_29 for cloning; -fipa-cp-clone disabled.
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Not considering SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_28 for cloning; -fipa-cp-clone disabled.
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Not considering SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_28 for cloning; -fipa-cp-clone disabled.
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Not considering SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_27 for cloning; -fipa-cp-clone disabled.
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Not considering SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_27 for cloning; -fipa-cp-clone disabled.
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Not considering SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_26 for cloning; -fipa-cp-clone disabled.
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Not considering SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_26 for cloning; -fipa-cp-clone disabled.
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Not considering SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_25 for cloning; -fipa-cp-clone disabled.
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Not considering SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_25 for cloning; -fipa-cp-clone disabled.
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Not considering SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_24 for cloning; -fipa-cp-clone disabled.
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Not considering SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_24 for cloning; -fipa-cp-clone disabled.
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Not considering SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_23 for cloning; -fipa-cp-clone disabled.
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Not considering SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_23 for cloning; -fipa-cp-clone disabled.
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Not considering SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_22 for cloning; -fipa-cp-clone disabled.
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Not considering SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_22 for cloning; -fipa-cp-clone disabled.
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Not considering SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_21 for cloning; -fipa-cp-clone disabled.
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Not considering SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_21 for cloning; -fipa-cp-clone disabled.
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Not considering SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_20 for cloning; -fipa-cp-clone disabled.
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Not considering SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_20 for cloning; -fipa-cp-clone disabled.
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Not considering SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_19 for cloning; -fipa-cp-clone disabled.
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Not considering SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_19 for cloning; -fipa-cp-clone disabled.
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Not considering SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_18 for cloning; -fipa-cp-clone disabled.
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Not considering SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_18 for cloning; -fipa-cp-clone disabled.
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Not considering SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_17 for cloning; -fipa-cp-clone disabled.
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Not considering SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_17 for cloning; -fipa-cp-clone disabled.
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Not considering SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_16 for cloning; -fipa-cp-clone disabled.
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Not considering SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_16 for cloning; -fipa-cp-clone disabled.
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Not considering SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_15 for cloning; -fipa-cp-clone disabled.
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Not considering SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_15 for cloning; -fipa-cp-clone disabled.
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Not considering SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_14 for cloning; -fipa-cp-clone disabled.
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Not considering SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_14 for cloning; -fipa-cp-clone disabled.
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Not considering SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_13 for cloning; -fipa-cp-clone disabled.
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Not considering SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_13 for cloning; -fipa-cp-clone disabled.
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Not considering SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_12 for cloning; -fipa-cp-clone disabled.
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Not considering SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_12 for cloning; -fipa-cp-clone disabled.
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Not considering SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_11 for cloning; -fipa-cp-clone disabled.
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Not considering SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_11 for cloning; -fipa-cp-clone disabled.
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Not considering SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_10 for cloning; -fipa-cp-clone disabled.
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Not considering SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_10 for cloning; -fipa-cp-clone disabled.
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Not considering SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_09 for cloning; -fipa-cp-clone disabled.
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Not considering SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_09 for cloning; -fipa-cp-clone disabled.
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Not considering SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_08 for cloning; -fipa-cp-clone disabled.
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Not considering SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_08 for cloning; -fipa-cp-clone disabled.
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Not considering SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_07 for cloning; -fipa-cp-clone disabled.
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Not considering SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_07 for cloning; -fipa-cp-clone disabled.
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Not considering SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_06 for cloning; -fipa-cp-clone disabled.
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Not considering SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_06 for cloning; -fipa-cp-clone disabled.
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Not considering SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_05 for cloning; -fipa-cp-clone disabled.
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Not considering SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_05 for cloning; -fipa-cp-clone disabled.
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Not considering SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_04 for cloning; -fipa-cp-clone disabled.
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Not considering SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_04 for cloning; -fipa-cp-clone disabled.
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Not considering SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_03 for cloning; -fipa-cp-clone disabled.
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Not considering SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_03 for cloning; -fipa-cp-clone disabled.
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Not considering SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_02 for cloning; -fipa-cp-clone disabled.
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Not considering SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_02 for cloning; -fipa-cp-clone disabled.
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Not considering SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_01 for cloning; -fipa-cp-clone disabled.
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Not considering SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_01 for cloning; -fipa-cp-clone disabled.
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Not considering SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_00 for cloning; -fipa-cp-clone disabled.
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Not considering SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_00 for cloning; -fipa-cp-clone disabled.
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Not considering Mcl_schm_read_msr for cloning; -fipa-cp-clone disabled.
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overall_size: 1602, max_new_size: 11001
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IPA lattices after all propagation:
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Lattices:
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Node: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_46/188:
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Node: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_46/187:
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Node: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_45/186:
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Node: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_45/185:
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Node: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_44/184:
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Node: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_44/183:
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Node: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_43/182:
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Node: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_43/181:
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Node: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_42/180:
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Node: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_42/179:
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Node: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_41/178:
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Node: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_41/177:
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Node: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_40/176:
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Node: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_40/175:
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Node: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_39/174:
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Node: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_39/173:
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Node: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_38/172:
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Node: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_38/171:
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Node: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_37/170:
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Node: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_37/169:
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Node: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_36/168:
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Node: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_36/167:
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Node: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_35/166:
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Node: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_35/165:
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Node: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_34/164:
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Node: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_34/163:
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Node: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_33/162:
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Node: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_33/161:
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Node: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_32/160:
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Node: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_32/159:
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Node: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_31/158:
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Node: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_31/157:
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Node: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_30/156:
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Node: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_30/155:
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Node: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_29/154:
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Node: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_29/153:
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Node: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_28/152:
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Node: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_28/151:
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Node: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_27/150:
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Node: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_27/149:
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Node: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_26/148:
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Node: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_26/147:
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Node: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_25/146:
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Node: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_25/145:
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Node: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_24/144:
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Node: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_24/143:
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Node: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_23/142:
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Node: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_23/141:
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Node: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_22/140:
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Node: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_22/139:
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Node: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_21/138:
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Node: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_21/137:
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Node: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_20/136:
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Node: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_20/135:
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Node: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_19/134:
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Node: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_19/133:
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Node: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_18/132:
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Node: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_18/131:
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Node: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_17/130:
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Node: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_17/129:
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Node: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_16/128:
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Node: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_16/127:
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Node: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_15/126:
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Node: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_15/125:
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Node: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_14/124:
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Node: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_14/123:
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Node: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_13/122:
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Node: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_13/121:
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Node: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_12/120:
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Node: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_12/119:
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Node: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_11/118:
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Node: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_11/117:
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Node: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_10/116:
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Node: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_10/115:
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Node: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_09/114:
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Node: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_09/113:
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Node: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_08/112:
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Node: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_08/111:
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Node: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_07/110:
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Node: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_07/109:
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Node: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_06/108:
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Node: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_06/107:
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Node: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_05/106:
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Node: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_05/105:
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Node: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_04/104:
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Node: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_04/103:
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Node: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_03/102:
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Node: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_03/101:
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Node: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_02/100:
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Node: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_02/99:
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Node: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_01/98:
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Node: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_01/97:
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Node: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_00/96:
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Node: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_00/95:
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Node: Mcl_schm_read_msr/94:
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IPA decision stage:
|
|
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|
|
|
IPA constant propagation end
|
|
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|
Reclaiming functions:
|
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Reclaiming variables:
|
|
Clearing address taken flags:
|
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Symbol table:
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Sys_GetCoreID/189 (Sys_GetCoreID) @06d1e1c0
|
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Type: function
|
|
Visibility: external public
|
|
References:
|
|
Referring:
|
|
Availability: not_available
|
|
Function flags: optimize_size
|
|
Called by: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_46/188 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_46/187 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_45/186 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_45/185 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_44/184 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_44/183 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_43/182 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_43/181 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_42/180 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_42/179 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_41/178 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_41/177 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_40/176 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_40/175 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_39/174 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_39/173 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_38/172 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_38/171 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_37/170 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_37/169 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_36/168 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_36/167 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_35/166 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_35/165 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_34/164 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_34/163 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_33/162 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_33/161 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_32/160 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_32/159 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_31/158 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_31/157 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_30/156 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_30/155 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_29/154 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_29/153 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_28/152 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_28/151 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_27/150 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_27/149 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_26/148 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_26/147 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_25/146 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_25/145 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_24/144 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_24/143 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_23/142 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_23/141 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_22/140 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_22/139 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_21/138 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_21/137 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_20/136 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_20/135 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_19/134 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_19/133 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_18/132 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_18/131 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_17/130 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_17/129 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_16/128 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_16/127 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_15/126 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_15/125 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_14/124 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_14/123 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_13/122 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_13/121 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_12/120 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_12/119 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_11/118 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_11/117 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_10/116 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_10/115 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_09/114 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_09/113 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_08/112 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_08/111 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_07/110 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_07/109 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_06/108 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_06/107 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_05/106 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_05/105 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_04/104 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_04/103 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_03/102 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_03/101 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_02/100 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_02/99 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_01/98 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_01/97 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_00/96 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_00/95 (1073741824 (estimated locally),1.00 per call)
|
|
Calls:
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_46/188 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_46) @06d17620
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_46/93 (read)reentry_guard_MCL_EXCLUSIVE_AREA_46/93 (write)msr_MCL_EXCLUSIVE_AREA_46/92 (read)reentry_guard_MCL_EXCLUSIVE_AREA_46/93 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_46/187 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_46) @06d170e0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_46/93 (read)msr_MCL_EXCLUSIVE_AREA_46/92 (write)msr_MCL_EXCLUSIVE_AREA_46/92 (read)reentry_guard_MCL_EXCLUSIVE_AREA_46/93 (read)reentry_guard_MCL_EXCLUSIVE_AREA_46/93 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_45/186 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_45) @06d17d20
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_45/91 (read)reentry_guard_MCL_EXCLUSIVE_AREA_45/91 (write)msr_MCL_EXCLUSIVE_AREA_45/90 (read)reentry_guard_MCL_EXCLUSIVE_AREA_45/91 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_45/185 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_45) @06d17a80
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_45/91 (read)msr_MCL_EXCLUSIVE_AREA_45/90 (write)msr_MCL_EXCLUSIVE_AREA_45/90 (read)reentry_guard_MCL_EXCLUSIVE_AREA_45/91 (read)reentry_guard_MCL_EXCLUSIVE_AREA_45/91 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_44/184 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_44) @06d177e0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_44/89 (read)reentry_guard_MCL_EXCLUSIVE_AREA_44/89 (write)msr_MCL_EXCLUSIVE_AREA_44/88 (read)reentry_guard_MCL_EXCLUSIVE_AREA_44/89 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_44/183 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_44) @06d17540
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_44/89 (read)msr_MCL_EXCLUSIVE_AREA_44/88 (write)msr_MCL_EXCLUSIVE_AREA_44/88 (read)reentry_guard_MCL_EXCLUSIVE_AREA_44/89 (read)reentry_guard_MCL_EXCLUSIVE_AREA_44/89 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_43/182 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_43) @06d172a0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_43/87 (read)reentry_guard_MCL_EXCLUSIVE_AREA_43/87 (write)msr_MCL_EXCLUSIVE_AREA_43/86 (read)reentry_guard_MCL_EXCLUSIVE_AREA_43/87 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_43/181 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_43) @06d17000
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_43/87 (read)msr_MCL_EXCLUSIVE_AREA_43/86 (write)msr_MCL_EXCLUSIVE_AREA_43/86 (read)reentry_guard_MCL_EXCLUSIVE_AREA_43/87 (read)reentry_guard_MCL_EXCLUSIVE_AREA_43/87 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_42/180 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_42) @06d0fb60
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_42/85 (read)reentry_guard_MCL_EXCLUSIVE_AREA_42/85 (write)msr_MCL_EXCLUSIVE_AREA_42/84 (read)reentry_guard_MCL_EXCLUSIVE_AREA_42/85 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_42/179 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_42) @06d0f620
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_42/85 (read)msr_MCL_EXCLUSIVE_AREA_42/84 (write)msr_MCL_EXCLUSIVE_AREA_42/84 (read)reentry_guard_MCL_EXCLUSIVE_AREA_42/85 (read)reentry_guard_MCL_EXCLUSIVE_AREA_42/85 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_41/178 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_41) @06d0f0e0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_41/83 (read)reentry_guard_MCL_EXCLUSIVE_AREA_41/83 (write)msr_MCL_EXCLUSIVE_AREA_41/82 (read)reentry_guard_MCL_EXCLUSIVE_AREA_41/83 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_41/177 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_41) @06d0fd20
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_41/83 (read)msr_MCL_EXCLUSIVE_AREA_41/82 (write)msr_MCL_EXCLUSIVE_AREA_41/82 (read)reentry_guard_MCL_EXCLUSIVE_AREA_41/83 (read)reentry_guard_MCL_EXCLUSIVE_AREA_41/83 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_40/176 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_40) @06d0fa80
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_40/81 (read)reentry_guard_MCL_EXCLUSIVE_AREA_40/81 (write)msr_MCL_EXCLUSIVE_AREA_40/80 (read)reentry_guard_MCL_EXCLUSIVE_AREA_40/81 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_40/175 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_40) @06d0f7e0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_40/81 (read)msr_MCL_EXCLUSIVE_AREA_40/80 (write)msr_MCL_EXCLUSIVE_AREA_40/80 (read)reentry_guard_MCL_EXCLUSIVE_AREA_40/81 (read)reentry_guard_MCL_EXCLUSIVE_AREA_40/81 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_39/174 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_39) @06d0f540
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_39/79 (read)reentry_guard_MCL_EXCLUSIVE_AREA_39/79 (write)msr_MCL_EXCLUSIVE_AREA_39/78 (read)reentry_guard_MCL_EXCLUSIVE_AREA_39/79 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_39/173 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_39) @06d0f2a0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_39/79 (read)msr_MCL_EXCLUSIVE_AREA_39/78 (write)msr_MCL_EXCLUSIVE_AREA_39/78 (read)reentry_guard_MCL_EXCLUSIVE_AREA_39/79 (read)reentry_guard_MCL_EXCLUSIVE_AREA_39/79 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_38/172 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_38) @06d0f000
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_38/77 (read)reentry_guard_MCL_EXCLUSIVE_AREA_38/77 (write)msr_MCL_EXCLUSIVE_AREA_38/76 (read)reentry_guard_MCL_EXCLUSIVE_AREA_38/77 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_38/171 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_38) @06d08b60
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_38/77 (read)msr_MCL_EXCLUSIVE_AREA_38/76 (write)msr_MCL_EXCLUSIVE_AREA_38/76 (read)reentry_guard_MCL_EXCLUSIVE_AREA_38/77 (read)reentry_guard_MCL_EXCLUSIVE_AREA_38/77 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_37/170 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_37) @06d08620
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_37/75 (read)reentry_guard_MCL_EXCLUSIVE_AREA_37/75 (write)msr_MCL_EXCLUSIVE_AREA_37/74 (read)reentry_guard_MCL_EXCLUSIVE_AREA_37/75 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_37/169 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_37) @06d080e0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_37/75 (read)msr_MCL_EXCLUSIVE_AREA_37/74 (write)msr_MCL_EXCLUSIVE_AREA_37/74 (read)reentry_guard_MCL_EXCLUSIVE_AREA_37/75 (read)reentry_guard_MCL_EXCLUSIVE_AREA_37/75 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_36/168 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_36) @06d08d20
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_36/73 (read)reentry_guard_MCL_EXCLUSIVE_AREA_36/73 (write)msr_MCL_EXCLUSIVE_AREA_36/72 (read)reentry_guard_MCL_EXCLUSIVE_AREA_36/73 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_36/167 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_36) @06d08a80
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_36/73 (read)msr_MCL_EXCLUSIVE_AREA_36/72 (write)msr_MCL_EXCLUSIVE_AREA_36/72 (read)reentry_guard_MCL_EXCLUSIVE_AREA_36/73 (read)reentry_guard_MCL_EXCLUSIVE_AREA_36/73 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_35/166 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_35) @06d087e0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_35/71 (read)reentry_guard_MCL_EXCLUSIVE_AREA_35/71 (write)msr_MCL_EXCLUSIVE_AREA_35/70 (read)reentry_guard_MCL_EXCLUSIVE_AREA_35/71 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_35/165 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_35) @06d08540
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_35/71 (read)msr_MCL_EXCLUSIVE_AREA_35/70 (write)msr_MCL_EXCLUSIVE_AREA_35/70 (read)reentry_guard_MCL_EXCLUSIVE_AREA_35/71 (read)reentry_guard_MCL_EXCLUSIVE_AREA_35/71 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_34/164 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_34) @06d082a0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_34/69 (read)reentry_guard_MCL_EXCLUSIVE_AREA_34/69 (write)msr_MCL_EXCLUSIVE_AREA_34/68 (read)reentry_guard_MCL_EXCLUSIVE_AREA_34/69 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_34/163 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_34) @06d08000
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_34/69 (read)msr_MCL_EXCLUSIVE_AREA_34/68 (write)msr_MCL_EXCLUSIVE_AREA_34/68 (read)reentry_guard_MCL_EXCLUSIVE_AREA_34/69 (read)reentry_guard_MCL_EXCLUSIVE_AREA_34/69 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_33/162 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_33) @06d01b60
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_33/67 (read)reentry_guard_MCL_EXCLUSIVE_AREA_33/67 (write)msr_MCL_EXCLUSIVE_AREA_33/66 (read)reentry_guard_MCL_EXCLUSIVE_AREA_33/67 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_33/161 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_33) @06d01620
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_33/67 (read)msr_MCL_EXCLUSIVE_AREA_33/66 (write)msr_MCL_EXCLUSIVE_AREA_33/66 (read)reentry_guard_MCL_EXCLUSIVE_AREA_33/67 (read)reentry_guard_MCL_EXCLUSIVE_AREA_33/67 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_32/160 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_32) @06d010e0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_32/65 (read)reentry_guard_MCL_EXCLUSIVE_AREA_32/65 (write)msr_MCL_EXCLUSIVE_AREA_32/64 (read)reentry_guard_MCL_EXCLUSIVE_AREA_32/65 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_32/159 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_32) @06d01d20
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_32/65 (read)msr_MCL_EXCLUSIVE_AREA_32/64 (write)msr_MCL_EXCLUSIVE_AREA_32/64 (read)reentry_guard_MCL_EXCLUSIVE_AREA_32/65 (read)reentry_guard_MCL_EXCLUSIVE_AREA_32/65 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_31/158 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_31) @06d01a80
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_31/63 (read)reentry_guard_MCL_EXCLUSIVE_AREA_31/63 (write)msr_MCL_EXCLUSIVE_AREA_31/62 (read)reentry_guard_MCL_EXCLUSIVE_AREA_31/63 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_31/157 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_31) @06d017e0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_31/63 (read)msr_MCL_EXCLUSIVE_AREA_31/62 (write)msr_MCL_EXCLUSIVE_AREA_31/62 (read)reentry_guard_MCL_EXCLUSIVE_AREA_31/63 (read)reentry_guard_MCL_EXCLUSIVE_AREA_31/63 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_30/156 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_30) @06d01540
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_30/61 (read)reentry_guard_MCL_EXCLUSIVE_AREA_30/61 (write)msr_MCL_EXCLUSIVE_AREA_30/60 (read)reentry_guard_MCL_EXCLUSIVE_AREA_30/61 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_30/155 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_30) @06d012a0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_30/61 (read)msr_MCL_EXCLUSIVE_AREA_30/60 (write)msr_MCL_EXCLUSIVE_AREA_30/60 (read)reentry_guard_MCL_EXCLUSIVE_AREA_30/61 (read)reentry_guard_MCL_EXCLUSIVE_AREA_30/61 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_29/154 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_29) @06d01000
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_29/59 (read)reentry_guard_MCL_EXCLUSIVE_AREA_29/59 (write)msr_MCL_EXCLUSIVE_AREA_29/58 (read)reentry_guard_MCL_EXCLUSIVE_AREA_29/59 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_29/153 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_29) @06cf6b60
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_29/59 (read)msr_MCL_EXCLUSIVE_AREA_29/58 (write)msr_MCL_EXCLUSIVE_AREA_29/58 (read)reentry_guard_MCL_EXCLUSIVE_AREA_29/59 (read)reentry_guard_MCL_EXCLUSIVE_AREA_29/59 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_28/152 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_28) @06cf6620
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_28/57 (read)reentry_guard_MCL_EXCLUSIVE_AREA_28/57 (write)msr_MCL_EXCLUSIVE_AREA_28/56 (read)reentry_guard_MCL_EXCLUSIVE_AREA_28/57 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_28/151 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_28) @06cf60e0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_28/57 (read)msr_MCL_EXCLUSIVE_AREA_28/56 (write)msr_MCL_EXCLUSIVE_AREA_28/56 (read)reentry_guard_MCL_EXCLUSIVE_AREA_28/57 (read)reentry_guard_MCL_EXCLUSIVE_AREA_28/57 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_27/150 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_27) @06cf6d20
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_27/55 (read)reentry_guard_MCL_EXCLUSIVE_AREA_27/55 (write)msr_MCL_EXCLUSIVE_AREA_27/54 (read)reentry_guard_MCL_EXCLUSIVE_AREA_27/55 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_27/149 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_27) @06cf6a80
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_27/55 (read)msr_MCL_EXCLUSIVE_AREA_27/54 (write)msr_MCL_EXCLUSIVE_AREA_27/54 (read)reentry_guard_MCL_EXCLUSIVE_AREA_27/55 (read)reentry_guard_MCL_EXCLUSIVE_AREA_27/55 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_26/148 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_26) @06cf67e0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_26/53 (read)reentry_guard_MCL_EXCLUSIVE_AREA_26/53 (write)msr_MCL_EXCLUSIVE_AREA_26/52 (read)reentry_guard_MCL_EXCLUSIVE_AREA_26/53 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_26/147 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_26) @06cf6540
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_26/53 (read)msr_MCL_EXCLUSIVE_AREA_26/52 (write)msr_MCL_EXCLUSIVE_AREA_26/52 (read)reentry_guard_MCL_EXCLUSIVE_AREA_26/53 (read)reentry_guard_MCL_EXCLUSIVE_AREA_26/53 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_25/146 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_25) @06cf62a0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_25/51 (read)reentry_guard_MCL_EXCLUSIVE_AREA_25/51 (write)msr_MCL_EXCLUSIVE_AREA_25/50 (read)reentry_guard_MCL_EXCLUSIVE_AREA_25/51 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_25/145 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_25) @06cf6000
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_25/51 (read)msr_MCL_EXCLUSIVE_AREA_25/50 (write)msr_MCL_EXCLUSIVE_AREA_25/50 (read)reentry_guard_MCL_EXCLUSIVE_AREA_25/51 (read)reentry_guard_MCL_EXCLUSIVE_AREA_25/51 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_24/144 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_24) @06cefb60
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_24/49 (read)reentry_guard_MCL_EXCLUSIVE_AREA_24/49 (write)msr_MCL_EXCLUSIVE_AREA_24/48 (read)reentry_guard_MCL_EXCLUSIVE_AREA_24/49 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_24/143 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_24) @06cef620
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_24/49 (read)msr_MCL_EXCLUSIVE_AREA_24/48 (write)msr_MCL_EXCLUSIVE_AREA_24/48 (read)reentry_guard_MCL_EXCLUSIVE_AREA_24/49 (read)reentry_guard_MCL_EXCLUSIVE_AREA_24/49 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_23/142 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_23) @06cef0e0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_23/47 (read)reentry_guard_MCL_EXCLUSIVE_AREA_23/47 (write)msr_MCL_EXCLUSIVE_AREA_23/46 (read)reentry_guard_MCL_EXCLUSIVE_AREA_23/47 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_23/141 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_23) @06cefd20
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_23/47 (read)msr_MCL_EXCLUSIVE_AREA_23/46 (write)msr_MCL_EXCLUSIVE_AREA_23/46 (read)reentry_guard_MCL_EXCLUSIVE_AREA_23/47 (read)reentry_guard_MCL_EXCLUSIVE_AREA_23/47 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_22/140 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_22) @06cefa80
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_22/45 (read)reentry_guard_MCL_EXCLUSIVE_AREA_22/45 (write)msr_MCL_EXCLUSIVE_AREA_22/44 (read)reentry_guard_MCL_EXCLUSIVE_AREA_22/45 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_22/139 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_22) @06cef7e0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_22/45 (read)msr_MCL_EXCLUSIVE_AREA_22/44 (write)msr_MCL_EXCLUSIVE_AREA_22/44 (read)reentry_guard_MCL_EXCLUSIVE_AREA_22/45 (read)reentry_guard_MCL_EXCLUSIVE_AREA_22/45 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_21/138 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_21) @06cef540
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_21/43 (read)reentry_guard_MCL_EXCLUSIVE_AREA_21/43 (write)msr_MCL_EXCLUSIVE_AREA_21/42 (read)reentry_guard_MCL_EXCLUSIVE_AREA_21/43 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_21/137 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_21) @06cef2a0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_21/43 (read)msr_MCL_EXCLUSIVE_AREA_21/42 (write)msr_MCL_EXCLUSIVE_AREA_21/42 (read)reentry_guard_MCL_EXCLUSIVE_AREA_21/43 (read)reentry_guard_MCL_EXCLUSIVE_AREA_21/43 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_20/136 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_20) @06cef000
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_20/41 (read)reentry_guard_MCL_EXCLUSIVE_AREA_20/41 (write)msr_MCL_EXCLUSIVE_AREA_20/40 (read)reentry_guard_MCL_EXCLUSIVE_AREA_20/41 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_20/135 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_20) @06ce8b60
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_20/41 (read)msr_MCL_EXCLUSIVE_AREA_20/40 (write)msr_MCL_EXCLUSIVE_AREA_20/40 (read)reentry_guard_MCL_EXCLUSIVE_AREA_20/41 (read)reentry_guard_MCL_EXCLUSIVE_AREA_20/41 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_19/134 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_19) @06ce8620
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_19/39 (read)reentry_guard_MCL_EXCLUSIVE_AREA_19/39 (write)msr_MCL_EXCLUSIVE_AREA_19/38 (read)reentry_guard_MCL_EXCLUSIVE_AREA_19/39 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_19/133 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_19) @06ce80e0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_19/39 (read)msr_MCL_EXCLUSIVE_AREA_19/38 (write)msr_MCL_EXCLUSIVE_AREA_19/38 (read)reentry_guard_MCL_EXCLUSIVE_AREA_19/39 (read)reentry_guard_MCL_EXCLUSIVE_AREA_19/39 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_18/132 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_18) @06ce8d20
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_18/37 (read)reentry_guard_MCL_EXCLUSIVE_AREA_18/37 (write)msr_MCL_EXCLUSIVE_AREA_18/36 (read)reentry_guard_MCL_EXCLUSIVE_AREA_18/37 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_18/131 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_18) @06ce8a80
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_18/37 (read)msr_MCL_EXCLUSIVE_AREA_18/36 (write)msr_MCL_EXCLUSIVE_AREA_18/36 (read)reentry_guard_MCL_EXCLUSIVE_AREA_18/37 (read)reentry_guard_MCL_EXCLUSIVE_AREA_18/37 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_17/130 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_17) @06ce87e0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_17/35 (read)reentry_guard_MCL_EXCLUSIVE_AREA_17/35 (write)msr_MCL_EXCLUSIVE_AREA_17/34 (read)reentry_guard_MCL_EXCLUSIVE_AREA_17/35 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_17/129 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_17) @06ce8540
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_17/35 (read)msr_MCL_EXCLUSIVE_AREA_17/34 (write)msr_MCL_EXCLUSIVE_AREA_17/34 (read)reentry_guard_MCL_EXCLUSIVE_AREA_17/35 (read)reentry_guard_MCL_EXCLUSIVE_AREA_17/35 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_16/128 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_16) @06ce82a0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_16/33 (read)reentry_guard_MCL_EXCLUSIVE_AREA_16/33 (write)msr_MCL_EXCLUSIVE_AREA_16/32 (read)reentry_guard_MCL_EXCLUSIVE_AREA_16/33 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_16/127 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_16) @06ce8000
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_16/33 (read)msr_MCL_EXCLUSIVE_AREA_16/32 (write)msr_MCL_EXCLUSIVE_AREA_16/32 (read)reentry_guard_MCL_EXCLUSIVE_AREA_16/33 (read)reentry_guard_MCL_EXCLUSIVE_AREA_16/33 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_15/126 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_15) @06ce1b60
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_15/31 (read)reentry_guard_MCL_EXCLUSIVE_AREA_15/31 (write)msr_MCL_EXCLUSIVE_AREA_15/30 (read)reentry_guard_MCL_EXCLUSIVE_AREA_15/31 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_15/125 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_15) @06ce1620
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_15/31 (read)msr_MCL_EXCLUSIVE_AREA_15/30 (write)msr_MCL_EXCLUSIVE_AREA_15/30 (read)reentry_guard_MCL_EXCLUSIVE_AREA_15/31 (read)reentry_guard_MCL_EXCLUSIVE_AREA_15/31 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_14/124 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_14) @06ce10e0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_14/29 (read)reentry_guard_MCL_EXCLUSIVE_AREA_14/29 (write)msr_MCL_EXCLUSIVE_AREA_14/28 (read)reentry_guard_MCL_EXCLUSIVE_AREA_14/29 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_14/123 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_14) @06ce1d20
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_14/29 (read)msr_MCL_EXCLUSIVE_AREA_14/28 (write)msr_MCL_EXCLUSIVE_AREA_14/28 (read)reentry_guard_MCL_EXCLUSIVE_AREA_14/29 (read)reentry_guard_MCL_EXCLUSIVE_AREA_14/29 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_13/122 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_13) @06ce1a80
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_13/27 (read)reentry_guard_MCL_EXCLUSIVE_AREA_13/27 (write)msr_MCL_EXCLUSIVE_AREA_13/26 (read)reentry_guard_MCL_EXCLUSIVE_AREA_13/27 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_13/121 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_13) @06ce17e0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_13/27 (read)msr_MCL_EXCLUSIVE_AREA_13/26 (write)msr_MCL_EXCLUSIVE_AREA_13/26 (read)reentry_guard_MCL_EXCLUSIVE_AREA_13/27 (read)reentry_guard_MCL_EXCLUSIVE_AREA_13/27 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_12/120 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_12) @06ce1540
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_12/25 (read)reentry_guard_MCL_EXCLUSIVE_AREA_12/25 (write)msr_MCL_EXCLUSIVE_AREA_12/24 (read)reentry_guard_MCL_EXCLUSIVE_AREA_12/25 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_12/119 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_12) @06ce12a0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_12/25 (read)msr_MCL_EXCLUSIVE_AREA_12/24 (write)msr_MCL_EXCLUSIVE_AREA_12/24 (read)reentry_guard_MCL_EXCLUSIVE_AREA_12/25 (read)reentry_guard_MCL_EXCLUSIVE_AREA_12/25 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_11/118 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_11) @06ce1000
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_11/23 (read)reentry_guard_MCL_EXCLUSIVE_AREA_11/23 (write)msr_MCL_EXCLUSIVE_AREA_11/22 (read)reentry_guard_MCL_EXCLUSIVE_AREA_11/23 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_11/117 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_11) @06cd7b60
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_11/23 (read)msr_MCL_EXCLUSIVE_AREA_11/22 (write)msr_MCL_EXCLUSIVE_AREA_11/22 (read)reentry_guard_MCL_EXCLUSIVE_AREA_11/23 (read)reentry_guard_MCL_EXCLUSIVE_AREA_11/23 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_10/116 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_10) @06cd7620
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_10/21 (read)reentry_guard_MCL_EXCLUSIVE_AREA_10/21 (write)msr_MCL_EXCLUSIVE_AREA_10/20 (read)reentry_guard_MCL_EXCLUSIVE_AREA_10/21 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_10/115 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_10) @06cd70e0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_10/21 (read)msr_MCL_EXCLUSIVE_AREA_10/20 (write)msr_MCL_EXCLUSIVE_AREA_10/20 (read)reentry_guard_MCL_EXCLUSIVE_AREA_10/21 (read)reentry_guard_MCL_EXCLUSIVE_AREA_10/21 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_09/114 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_09) @06cd7d20
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_09/19 (read)reentry_guard_MCL_EXCLUSIVE_AREA_09/19 (write)msr_MCL_EXCLUSIVE_AREA_09/18 (read)reentry_guard_MCL_EXCLUSIVE_AREA_09/19 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_09/113 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_09) @06cd7a80
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_09/19 (read)msr_MCL_EXCLUSIVE_AREA_09/18 (write)msr_MCL_EXCLUSIVE_AREA_09/18 (read)reentry_guard_MCL_EXCLUSIVE_AREA_09/19 (read)reentry_guard_MCL_EXCLUSIVE_AREA_09/19 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_08/112 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_08) @06cd77e0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_08/17 (read)reentry_guard_MCL_EXCLUSIVE_AREA_08/17 (write)msr_MCL_EXCLUSIVE_AREA_08/16 (read)reentry_guard_MCL_EXCLUSIVE_AREA_08/17 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_08/111 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_08) @06cd7540
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_08/17 (read)msr_MCL_EXCLUSIVE_AREA_08/16 (write)msr_MCL_EXCLUSIVE_AREA_08/16 (read)reentry_guard_MCL_EXCLUSIVE_AREA_08/17 (read)reentry_guard_MCL_EXCLUSIVE_AREA_08/17 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_07/110 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_07) @06cd72a0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_07/15 (read)reentry_guard_MCL_EXCLUSIVE_AREA_07/15 (write)msr_MCL_EXCLUSIVE_AREA_07/14 (read)reentry_guard_MCL_EXCLUSIVE_AREA_07/15 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_07/109 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_07) @06cd7000
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_07/15 (read)msr_MCL_EXCLUSIVE_AREA_07/14 (write)msr_MCL_EXCLUSIVE_AREA_07/14 (read)reentry_guard_MCL_EXCLUSIVE_AREA_07/15 (read)reentry_guard_MCL_EXCLUSIVE_AREA_07/15 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_06/108 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_06) @06cd1b60
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_06/13 (read)reentry_guard_MCL_EXCLUSIVE_AREA_06/13 (write)msr_MCL_EXCLUSIVE_AREA_06/12 (read)reentry_guard_MCL_EXCLUSIVE_AREA_06/13 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_06/107 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_06) @06cd1620
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_06/13 (read)msr_MCL_EXCLUSIVE_AREA_06/12 (write)msr_MCL_EXCLUSIVE_AREA_06/12 (read)reentry_guard_MCL_EXCLUSIVE_AREA_06/13 (read)reentry_guard_MCL_EXCLUSIVE_AREA_06/13 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_05/106 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_05) @06cd10e0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_05/11 (read)reentry_guard_MCL_EXCLUSIVE_AREA_05/11 (write)msr_MCL_EXCLUSIVE_AREA_05/10 (read)reentry_guard_MCL_EXCLUSIVE_AREA_05/11 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_05/105 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_05) @06cd1d20
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_05/11 (read)msr_MCL_EXCLUSIVE_AREA_05/10 (write)msr_MCL_EXCLUSIVE_AREA_05/10 (read)reentry_guard_MCL_EXCLUSIVE_AREA_05/11 (read)reentry_guard_MCL_EXCLUSIVE_AREA_05/11 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_04/104 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_04) @06cd1a80
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_04/9 (read)reentry_guard_MCL_EXCLUSIVE_AREA_04/9 (write)msr_MCL_EXCLUSIVE_AREA_04/8 (read)reentry_guard_MCL_EXCLUSIVE_AREA_04/9 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_04/103 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_04) @06cd17e0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_04/9 (read)msr_MCL_EXCLUSIVE_AREA_04/8 (write)msr_MCL_EXCLUSIVE_AREA_04/8 (read)reentry_guard_MCL_EXCLUSIVE_AREA_04/9 (read)reentry_guard_MCL_EXCLUSIVE_AREA_04/9 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_03/102 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_03) @06cd1540
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_03/7 (read)reentry_guard_MCL_EXCLUSIVE_AREA_03/7 (write)msr_MCL_EXCLUSIVE_AREA_03/6 (read)reentry_guard_MCL_EXCLUSIVE_AREA_03/7 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_03/101 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_03) @06cd12a0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_03/7 (read)msr_MCL_EXCLUSIVE_AREA_03/6 (write)msr_MCL_EXCLUSIVE_AREA_03/6 (read)reentry_guard_MCL_EXCLUSIVE_AREA_03/7 (read)reentry_guard_MCL_EXCLUSIVE_AREA_03/7 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_02/100 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_02) @06cd1000
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_02/5 (read)reentry_guard_MCL_EXCLUSIVE_AREA_02/5 (write)msr_MCL_EXCLUSIVE_AREA_02/4 (read)reentry_guard_MCL_EXCLUSIVE_AREA_02/5 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_02/99 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_02) @06c6dc40
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_02/5 (read)msr_MCL_EXCLUSIVE_AREA_02/4 (write)msr_MCL_EXCLUSIVE_AREA_02/4 (read)reentry_guard_MCL_EXCLUSIVE_AREA_02/5 (read)reentry_guard_MCL_EXCLUSIVE_AREA_02/5 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_01/98 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_01) @06c6d700
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_01/3 (read)reentry_guard_MCL_EXCLUSIVE_AREA_01/3 (write)msr_MCL_EXCLUSIVE_AREA_01/2 (read)reentry_guard_MCL_EXCLUSIVE_AREA_01/3 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_01/97 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_01) @06c6de00
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_01/3 (read)msr_MCL_EXCLUSIVE_AREA_01/2 (write)msr_MCL_EXCLUSIVE_AREA_01/2 (read)reentry_guard_MCL_EXCLUSIVE_AREA_01/3 (read)reentry_guard_MCL_EXCLUSIVE_AREA_01/3 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_00/96 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_00) @06c6db60
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_00/1 (read)reentry_guard_MCL_EXCLUSIVE_AREA_00/1 (write)msr_MCL_EXCLUSIVE_AREA_00/0 (read)reentry_guard_MCL_EXCLUSIVE_AREA_00/1 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_00/95 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_00) @06c6d8c0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_00/1 (read)msr_MCL_EXCLUSIVE_AREA_00/0 (write)msr_MCL_EXCLUSIVE_AREA_00/0 (read)reentry_guard_MCL_EXCLUSIVE_AREA_00/1 (read)reentry_guard_MCL_EXCLUSIVE_AREA_00/1 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
Mcl_schm_read_msr/94 (Mcl_schm_read_msr) @06c6d620
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References:
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_46/93 (reentry_guard_MCL_EXCLUSIVE_AREA_46) @06c6c288
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_46/187 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_46/187 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_46/187 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_46/188 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_46/188 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_46/188 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_46/92 (msr_MCL_EXCLUSIVE_AREA_46) @06c6c1f8
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_46/187 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_46/187 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_46/188 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_45/91 (reentry_guard_MCL_EXCLUSIVE_AREA_45) @06c6c168
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_45/185 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_45/185 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_45/185 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_45/186 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_45/186 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_45/186 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_45/90 (msr_MCL_EXCLUSIVE_AREA_45) @06c6c0d8
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_45/185 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_45/185 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_45/186 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_44/89 (reentry_guard_MCL_EXCLUSIVE_AREA_44) @06c6c048
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_44/183 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_44/183 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_44/183 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_44/184 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_44/184 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_44/184 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_44/88 (msr_MCL_EXCLUSIVE_AREA_44) @06c68f78
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_44/183 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_44/183 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_44/184 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_43/87 (reentry_guard_MCL_EXCLUSIVE_AREA_43) @06c68ee8
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_43/181 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_43/181 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_43/181 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_43/182 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_43/182 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_43/182 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_43/86 (msr_MCL_EXCLUSIVE_AREA_43) @06c68e58
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_43/181 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_43/181 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_43/182 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_42/85 (reentry_guard_MCL_EXCLUSIVE_AREA_42) @06c68dc8
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_42/179 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_42/179 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_42/179 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_42/180 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_42/180 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_42/180 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_42/84 (msr_MCL_EXCLUSIVE_AREA_42) @06c68d38
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_42/179 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_42/179 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_42/180 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_41/83 (reentry_guard_MCL_EXCLUSIVE_AREA_41) @06c68ca8
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_41/177 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_41/177 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_41/177 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_41/178 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_41/178 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_41/178 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_41/82 (msr_MCL_EXCLUSIVE_AREA_41) @06c68c18
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_41/177 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_41/177 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_41/178 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_40/81 (reentry_guard_MCL_EXCLUSIVE_AREA_40) @06c68b88
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_40/175 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_40/175 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_40/175 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_40/176 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_40/176 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_40/176 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_40/80 (msr_MCL_EXCLUSIVE_AREA_40) @06c68af8
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_40/175 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_40/175 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_40/176 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_39/79 (reentry_guard_MCL_EXCLUSIVE_AREA_39) @06c68a68
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_39/173 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_39/173 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_39/173 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_39/174 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_39/174 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_39/174 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_39/78 (msr_MCL_EXCLUSIVE_AREA_39) @06c689d8
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_39/173 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_39/173 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_39/174 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_38/77 (reentry_guard_MCL_EXCLUSIVE_AREA_38) @06c68948
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_38/171 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_38/171 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_38/171 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_38/172 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_38/172 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_38/172 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_38/76 (msr_MCL_EXCLUSIVE_AREA_38) @06c688b8
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_38/171 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_38/171 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_38/172 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_37/75 (reentry_guard_MCL_EXCLUSIVE_AREA_37) @06c68828
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_37/169 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_37/169 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_37/169 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_37/170 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_37/170 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_37/170 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_37/74 (msr_MCL_EXCLUSIVE_AREA_37) @06c68798
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_37/169 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_37/169 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_37/170 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_36/73 (reentry_guard_MCL_EXCLUSIVE_AREA_36) @06c68708
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_36/167 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_36/167 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_36/167 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_36/168 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_36/168 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_36/168 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_36/72 (msr_MCL_EXCLUSIVE_AREA_36) @06c68678
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_36/167 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_36/167 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_36/168 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_35/71 (reentry_guard_MCL_EXCLUSIVE_AREA_35) @06c685e8
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_35/165 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_35/165 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_35/165 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_35/166 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_35/166 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_35/166 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_35/70 (msr_MCL_EXCLUSIVE_AREA_35) @06c68558
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_35/165 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_35/165 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_35/166 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_34/69 (reentry_guard_MCL_EXCLUSIVE_AREA_34) @06c684c8
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_34/163 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_34/163 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_34/163 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_34/164 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_34/164 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_34/164 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_34/68 (msr_MCL_EXCLUSIVE_AREA_34) @06c68438
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_34/163 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_34/163 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_34/164 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_33/67 (reentry_guard_MCL_EXCLUSIVE_AREA_33) @06c683a8
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_33/161 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_33/161 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_33/161 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_33/162 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_33/162 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_33/162 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_33/66 (msr_MCL_EXCLUSIVE_AREA_33) @06c68318
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_33/161 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_33/161 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_33/162 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_32/65 (reentry_guard_MCL_EXCLUSIVE_AREA_32) @06c68288
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_32/159 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_32/159 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_32/159 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_32/160 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_32/160 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_32/160 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_32/64 (msr_MCL_EXCLUSIVE_AREA_32) @06c681f8
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_32/159 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_32/159 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_32/160 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_31/63 (reentry_guard_MCL_EXCLUSIVE_AREA_31) @06c68168
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_31/157 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_31/157 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_31/157 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_31/158 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_31/158 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_31/158 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_31/62 (msr_MCL_EXCLUSIVE_AREA_31) @06c680d8
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_31/157 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_31/157 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_31/158 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_30/61 (reentry_guard_MCL_EXCLUSIVE_AREA_30) @06c68048
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_30/155 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_30/155 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_30/155 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_30/156 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_30/156 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_30/156 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_30/60 (msr_MCL_EXCLUSIVE_AREA_30) @06c62f78
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_30/155 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_30/155 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_30/156 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_29/59 (reentry_guard_MCL_EXCLUSIVE_AREA_29) @06c62ee8
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_29/153 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_29/153 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_29/153 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_29/154 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_29/154 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_29/154 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_29/58 (msr_MCL_EXCLUSIVE_AREA_29) @06c62e58
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_29/153 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_29/153 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_29/154 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_28/57 (reentry_guard_MCL_EXCLUSIVE_AREA_28) @06c62dc8
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_28/151 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_28/151 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_28/151 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_28/152 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_28/152 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_28/152 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_28/56 (msr_MCL_EXCLUSIVE_AREA_28) @06c62d38
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_28/151 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_28/151 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_28/152 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_27/55 (reentry_guard_MCL_EXCLUSIVE_AREA_27) @06c62ca8
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_27/149 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_27/149 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_27/149 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_27/150 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_27/150 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_27/150 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_27/54 (msr_MCL_EXCLUSIVE_AREA_27) @06c62c18
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_27/149 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_27/149 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_27/150 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_26/53 (reentry_guard_MCL_EXCLUSIVE_AREA_26) @06c62b88
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_26/147 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_26/147 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_26/147 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_26/148 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_26/148 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_26/148 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_26/52 (msr_MCL_EXCLUSIVE_AREA_26) @06c62af8
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_26/147 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_26/147 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_26/148 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_25/51 (reentry_guard_MCL_EXCLUSIVE_AREA_25) @06c62a68
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_25/145 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_25/145 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_25/145 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_25/146 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_25/146 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_25/146 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_25/50 (msr_MCL_EXCLUSIVE_AREA_25) @06c629d8
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_25/145 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_25/145 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_25/146 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_24/49 (reentry_guard_MCL_EXCLUSIVE_AREA_24) @06c62948
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_24/143 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_24/143 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_24/143 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_24/144 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_24/144 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_24/144 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_24/48 (msr_MCL_EXCLUSIVE_AREA_24) @06c628b8
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_24/143 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_24/143 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_24/144 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_23/47 (reentry_guard_MCL_EXCLUSIVE_AREA_23) @06c62828
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_23/141 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_23/141 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_23/141 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_23/142 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_23/142 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_23/142 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_23/46 (msr_MCL_EXCLUSIVE_AREA_23) @06c62798
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_23/141 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_23/141 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_23/142 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_22/45 (reentry_guard_MCL_EXCLUSIVE_AREA_22) @06c62708
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_22/139 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_22/139 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_22/139 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_22/140 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_22/140 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_22/140 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_22/44 (msr_MCL_EXCLUSIVE_AREA_22) @06c62678
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_22/139 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_22/139 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_22/140 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_21/43 (reentry_guard_MCL_EXCLUSIVE_AREA_21) @06c625e8
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_21/137 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_21/137 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_21/137 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_21/138 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_21/138 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_21/138 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_21/42 (msr_MCL_EXCLUSIVE_AREA_21) @06c62558
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_21/137 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_21/137 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_21/138 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_20/41 (reentry_guard_MCL_EXCLUSIVE_AREA_20) @06c624c8
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_20/135 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_20/135 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_20/135 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_20/136 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_20/136 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_20/136 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_20/40 (msr_MCL_EXCLUSIVE_AREA_20) @06c62438
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_20/135 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_20/135 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_20/136 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_19/39 (reentry_guard_MCL_EXCLUSIVE_AREA_19) @06c623a8
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_19/133 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_19/133 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_19/133 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_19/134 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_19/134 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_19/134 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_19/38 (msr_MCL_EXCLUSIVE_AREA_19) @06c62318
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_19/133 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_19/133 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_19/134 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_18/37 (reentry_guard_MCL_EXCLUSIVE_AREA_18) @06c62288
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_18/131 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_18/131 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_18/131 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_18/132 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_18/132 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_18/132 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_18/36 (msr_MCL_EXCLUSIVE_AREA_18) @06c621f8
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_18/131 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_18/131 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_18/132 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_17/35 (reentry_guard_MCL_EXCLUSIVE_AREA_17) @06c62168
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_17/129 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_17/129 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_17/129 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_17/130 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_17/130 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_17/130 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_17/34 (msr_MCL_EXCLUSIVE_AREA_17) @06c620d8
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_17/129 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_17/129 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_17/130 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_16/33 (reentry_guard_MCL_EXCLUSIVE_AREA_16) @06c62048
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_16/127 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_16/127 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_16/127 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_16/128 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_16/128 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_16/128 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_16/32 (msr_MCL_EXCLUSIVE_AREA_16) @06c5df78
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_16/127 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_16/127 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_16/128 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_15/31 (reentry_guard_MCL_EXCLUSIVE_AREA_15) @06c5dee8
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_15/125 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_15/125 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_15/125 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_15/126 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_15/126 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_15/126 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_15/30 (msr_MCL_EXCLUSIVE_AREA_15) @06c5de58
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_15/125 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_15/125 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_15/126 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_14/29 (reentry_guard_MCL_EXCLUSIVE_AREA_14) @06c5ddc8
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_14/123 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_14/123 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_14/123 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_14/124 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_14/124 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_14/124 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_14/28 (msr_MCL_EXCLUSIVE_AREA_14) @06c5dd38
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_14/123 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_14/123 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_14/124 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_13/27 (reentry_guard_MCL_EXCLUSIVE_AREA_13) @06c5dca8
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_13/121 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_13/121 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_13/121 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_13/122 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_13/122 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_13/122 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_13/26 (msr_MCL_EXCLUSIVE_AREA_13) @06c5dc18
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_13/121 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_13/121 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_13/122 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_12/25 (reentry_guard_MCL_EXCLUSIVE_AREA_12) @06c5db88
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_12/119 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_12/119 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_12/119 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_12/120 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_12/120 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_12/120 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_12/24 (msr_MCL_EXCLUSIVE_AREA_12) @06c5daf8
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_12/119 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_12/119 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_12/120 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_11/23 (reentry_guard_MCL_EXCLUSIVE_AREA_11) @06c5da68
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_11/117 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_11/117 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_11/117 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_11/118 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_11/118 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_11/118 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_11/22 (msr_MCL_EXCLUSIVE_AREA_11) @06c5d9d8
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_11/117 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_11/117 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_11/118 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_10/21 (reentry_guard_MCL_EXCLUSIVE_AREA_10) @06c5d948
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_10/115 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_10/115 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_10/115 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_10/116 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_10/116 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_10/116 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_10/20 (msr_MCL_EXCLUSIVE_AREA_10) @06c5d8b8
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_10/115 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_10/115 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_10/116 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_09/19 (reentry_guard_MCL_EXCLUSIVE_AREA_09) @06c5d828
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_09/113 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_09/113 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_09/113 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_09/114 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_09/114 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_09/114 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_09/18 (msr_MCL_EXCLUSIVE_AREA_09) @06c5d798
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_09/113 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_09/113 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_09/114 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_08/17 (reentry_guard_MCL_EXCLUSIVE_AREA_08) @06c5d708
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_08/111 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_08/111 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_08/111 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_08/112 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_08/112 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_08/112 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_08/16 (msr_MCL_EXCLUSIVE_AREA_08) @06c5d678
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_08/111 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_08/111 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_08/112 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_07/15 (reentry_guard_MCL_EXCLUSIVE_AREA_07) @06c5d5e8
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_07/109 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_07/109 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_07/109 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_07/110 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_07/110 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_07/110 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_07/14 (msr_MCL_EXCLUSIVE_AREA_07) @06c5d558
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_07/109 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_07/109 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_07/110 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_06/13 (reentry_guard_MCL_EXCLUSIVE_AREA_06) @06c5d4c8
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_06/107 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_06/107 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_06/107 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_06/108 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_06/108 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_06/108 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_06/12 (msr_MCL_EXCLUSIVE_AREA_06) @06c5d438
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_06/107 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_06/107 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_06/108 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_05/11 (reentry_guard_MCL_EXCLUSIVE_AREA_05) @06c5d3a8
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_05/105 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_05/105 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_05/105 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_05/106 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_05/106 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_05/106 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_05/10 (msr_MCL_EXCLUSIVE_AREA_05) @06c5d318
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_05/105 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_05/105 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_05/106 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_04/9 (reentry_guard_MCL_EXCLUSIVE_AREA_04) @06c5d288
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_04/103 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_04/103 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_04/103 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_04/104 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_04/104 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_04/104 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_04/8 (msr_MCL_EXCLUSIVE_AREA_04) @06c5d1f8
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_04/103 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_04/103 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_04/104 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_03/7 (reentry_guard_MCL_EXCLUSIVE_AREA_03) @06c5d168
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_03/101 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_03/101 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_03/101 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_03/102 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_03/102 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_03/102 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_03/6 (msr_MCL_EXCLUSIVE_AREA_03) @06c5d0d8
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_03/101 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_03/101 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_03/102 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_02/5 (reentry_guard_MCL_EXCLUSIVE_AREA_02) @06c5d048
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_02/99 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_02/99 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_02/99 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_02/100 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_02/100 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_02/100 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_02/4 (msr_MCL_EXCLUSIVE_AREA_02) @06c56f78
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_02/99 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_02/99 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_02/100 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_01/3 (reentry_guard_MCL_EXCLUSIVE_AREA_01) @06c56ee8
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_01/97 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_01/97 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_01/97 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_01/98 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_01/98 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_01/98 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_01/2 (msr_MCL_EXCLUSIVE_AREA_01) @06c56e58
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_01/97 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_01/97 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_01/98 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_00/1 (reentry_guard_MCL_EXCLUSIVE_AREA_00) @06c56dc8
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_00/95 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_00/95 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_00/95 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_00/96 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_00/96 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_00/96 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_00/0 (msr_MCL_EXCLUSIVE_AREA_00) @06c56d38
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_00/95 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_00/95 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_00/96 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
|
|
;; Function Mcl_schm_read_msr (Mcl_schm_read_msr, funcdef_no=0, decl_uid=4358, cgraph_uid=1, symbol_order=94)
|
|
|
|
Modification phase of node Mcl_schm_read_msr/94
|
|
Mcl_schm_read_msr ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_1);
|
|
# DEBUG reg_tmp => reg_tmp_1
|
|
# DEBUG BEGIN_STMT
|
|
return reg_tmp_1;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_00 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_00, funcdef_no=1, decl_uid=4076, cgraph_uid=2, symbol_order=95)
|
|
|
|
Modification phase of node SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_00/95
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_00 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_00[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_00[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_00[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_00[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_00[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_00 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_00, funcdef_no=2, decl_uid=4078, cgraph_uid=3, symbol_order=96)
|
|
|
|
Modification phase of node SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_00/96
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_00 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_00[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_00[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_00[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_00[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_01 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_01, funcdef_no=3, decl_uid=4080, cgraph_uid=4, symbol_order=97)
|
|
|
|
Modification phase of node SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_01/97
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_01 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_01[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_01[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_01[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_01[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_01[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_01 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_01, funcdef_no=4, decl_uid=4082, cgraph_uid=5, symbol_order=98)
|
|
|
|
Modification phase of node SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_01/98
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_01 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_01[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_01[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_01[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_01[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_02 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_02, funcdef_no=5, decl_uid=4084, cgraph_uid=6, symbol_order=99)
|
|
|
|
Modification phase of node SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_02/99
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_02 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_02[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_02[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_02[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_02[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_02[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_02 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_02, funcdef_no=6, decl_uid=4086, cgraph_uid=7, symbol_order=100)
|
|
|
|
Modification phase of node SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_02/100
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_02 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_02[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_02[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_02[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_02[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_03 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_03, funcdef_no=7, decl_uid=4088, cgraph_uid=8, symbol_order=101)
|
|
|
|
Modification phase of node SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_03/101
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_03 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_03[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_03[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_03[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_03[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_03[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_03 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_03, funcdef_no=8, decl_uid=4090, cgraph_uid=9, symbol_order=102)
|
|
|
|
Modification phase of node SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_03/102
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_03 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_03[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_03[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_03[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_03[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_04 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_04, funcdef_no=9, decl_uid=4092, cgraph_uid=10, symbol_order=103)
|
|
|
|
Modification phase of node SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_04/103
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_04 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_04[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_04[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_04[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_04[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_04[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_04 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_04, funcdef_no=10, decl_uid=4094, cgraph_uid=11, symbol_order=104)
|
|
|
|
Modification phase of node SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_04/104
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_04 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_04[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_04[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_04[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_04[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_05 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_05, funcdef_no=11, decl_uid=4096, cgraph_uid=12, symbol_order=105)
|
|
|
|
Modification phase of node SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_05/105
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_05 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_05[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_05[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_05[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_05[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_05[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_05 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_05, funcdef_no=12, decl_uid=4098, cgraph_uid=13, symbol_order=106)
|
|
|
|
Modification phase of node SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_05/106
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_05 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_05[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_05[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_05[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_05[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_06 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_06, funcdef_no=13, decl_uid=4100, cgraph_uid=14, symbol_order=107)
|
|
|
|
Modification phase of node SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_06/107
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_06 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_06[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_06[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_06[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_06[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_06[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_06 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_06, funcdef_no=14, decl_uid=4102, cgraph_uid=15, symbol_order=108)
|
|
|
|
Modification phase of node SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_06/108
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_06 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_06[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_06[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_06[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_06[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_07 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_07, funcdef_no=15, decl_uid=4104, cgraph_uid=16, symbol_order=109)
|
|
|
|
Modification phase of node SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_07/109
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_07 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_07[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_07[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_07[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_07[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_07[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_07 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_07, funcdef_no=16, decl_uid=4106, cgraph_uid=17, symbol_order=110)
|
|
|
|
Modification phase of node SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_07/110
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_07 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_07[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_07[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_07[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_07[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_08 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_08, funcdef_no=17, decl_uid=4108, cgraph_uid=18, symbol_order=111)
|
|
|
|
Modification phase of node SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_08/111
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_08 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_08[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_08[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_08[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_08[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_08[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_08 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_08, funcdef_no=18, decl_uid=4110, cgraph_uid=19, symbol_order=112)
|
|
|
|
Modification phase of node SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_08/112
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_08 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_08[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_08[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_08[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_08[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_09 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_09, funcdef_no=19, decl_uid=4112, cgraph_uid=20, symbol_order=113)
|
|
|
|
Modification phase of node SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_09/113
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_09 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_09[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_09[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_09[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_09[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_09[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_09 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_09, funcdef_no=20, decl_uid=4114, cgraph_uid=21, symbol_order=114)
|
|
|
|
Modification phase of node SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_09/114
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_09 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_09[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_09[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_09[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_09[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_10 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_10, funcdef_no=21, decl_uid=4116, cgraph_uid=22, symbol_order=115)
|
|
|
|
Modification phase of node SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_10/115
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_10 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_10[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_10[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_10[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_10[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_10[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_10 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_10, funcdef_no=22, decl_uid=4118, cgraph_uid=23, symbol_order=116)
|
|
|
|
Modification phase of node SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_10/116
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_10 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_10[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_10[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_10[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_10[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_11 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_11, funcdef_no=23, decl_uid=4120, cgraph_uid=24, symbol_order=117)
|
|
|
|
Modification phase of node SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_11/117
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_11 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_11[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_11[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_11[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_11[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_11[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_11 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_11, funcdef_no=24, decl_uid=4122, cgraph_uid=25, symbol_order=118)
|
|
|
|
Modification phase of node SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_11/118
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_11 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_11[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_11[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_11[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_11[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_12 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_12, funcdef_no=25, decl_uid=4124, cgraph_uid=26, symbol_order=119)
|
|
|
|
Modification phase of node SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_12/119
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_12 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_12[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_12[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_12[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_12[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_12[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_12 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_12, funcdef_no=26, decl_uid=4126, cgraph_uid=27, symbol_order=120)
|
|
|
|
Modification phase of node SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_12/120
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_12 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_12[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_12[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_12[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_12[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_13 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_13, funcdef_no=27, decl_uid=4128, cgraph_uid=28, symbol_order=121)
|
|
|
|
Modification phase of node SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_13/121
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_13 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_13[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_13[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_13[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_13[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_13[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_13 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_13, funcdef_no=28, decl_uid=4130, cgraph_uid=29, symbol_order=122)
|
|
|
|
Modification phase of node SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_13/122
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_13 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_13[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_13[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_13[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_13[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_14 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_14, funcdef_no=29, decl_uid=4132, cgraph_uid=30, symbol_order=123)
|
|
|
|
Modification phase of node SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_14/123
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_14 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_14[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_14[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_14[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_14[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_14[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_14 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_14, funcdef_no=30, decl_uid=4134, cgraph_uid=31, symbol_order=124)
|
|
|
|
Modification phase of node SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_14/124
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_14 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_14[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_14[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_14[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_14[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_15 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_15, funcdef_no=31, decl_uid=4136, cgraph_uid=32, symbol_order=125)
|
|
|
|
Modification phase of node SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_15/125
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_15 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_15[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_15[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_15[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_15[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_15[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_15 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_15, funcdef_no=32, decl_uid=4138, cgraph_uid=33, symbol_order=126)
|
|
|
|
Modification phase of node SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_15/126
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_15 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_15[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_15[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_15[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_15[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_16 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_16, funcdef_no=33, decl_uid=4140, cgraph_uid=34, symbol_order=127)
|
|
|
|
Modification phase of node SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_16/127
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_16 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_16[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_16[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_16[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_16[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_16[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_16 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_16, funcdef_no=34, decl_uid=4142, cgraph_uid=35, symbol_order=128)
|
|
|
|
Modification phase of node SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_16/128
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_16 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_16[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_16[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_16[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_16[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_17 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_17, funcdef_no=35, decl_uid=4144, cgraph_uid=36, symbol_order=129)
|
|
|
|
Modification phase of node SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_17/129
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_17 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_17[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_17[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_17[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_17[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_17[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_17 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_17, funcdef_no=36, decl_uid=4146, cgraph_uid=37, symbol_order=130)
|
|
|
|
Modification phase of node SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_17/130
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_17 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_17[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_17[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_17[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_17[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_18 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_18, funcdef_no=37, decl_uid=4148, cgraph_uid=38, symbol_order=131)
|
|
|
|
Modification phase of node SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_18/131
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_18 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_18[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_18[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_18[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_18[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_18[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_18 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_18, funcdef_no=38, decl_uid=4150, cgraph_uid=39, symbol_order=132)
|
|
|
|
Modification phase of node SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_18/132
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_18 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_18[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_18[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_18[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_18[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_19 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_19, funcdef_no=39, decl_uid=4152, cgraph_uid=40, symbol_order=133)
|
|
|
|
Modification phase of node SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_19/133
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_19 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_19[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_19[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_19[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_19[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_19[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_19 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_19, funcdef_no=40, decl_uid=4154, cgraph_uid=41, symbol_order=134)
|
|
|
|
Modification phase of node SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_19/134
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_19 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_19[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_19[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_19[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_19[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_20 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_20, funcdef_no=41, decl_uid=4156, cgraph_uid=42, symbol_order=135)
|
|
|
|
Modification phase of node SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_20/135
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_20 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_20[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_20[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_20[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_20[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_20[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_20 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_20, funcdef_no=42, decl_uid=4158, cgraph_uid=43, symbol_order=136)
|
|
|
|
Modification phase of node SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_20/136
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_20 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_20[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_20[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_20[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_20[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_21 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_21, funcdef_no=43, decl_uid=4160, cgraph_uid=44, symbol_order=137)
|
|
|
|
Modification phase of node SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_21/137
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_21 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_21[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_21[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_21[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_21[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_21[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_21 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_21, funcdef_no=44, decl_uid=4162, cgraph_uid=45, symbol_order=138)
|
|
|
|
Modification phase of node SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_21/138
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_21 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_21[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_21[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_21[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_21[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_22 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_22, funcdef_no=45, decl_uid=4164, cgraph_uid=46, symbol_order=139)
|
|
|
|
Modification phase of node SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_22/139
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_22 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_22[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_22[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_22[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_22[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_22[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_22 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_22, funcdef_no=46, decl_uid=4166, cgraph_uid=47, symbol_order=140)
|
|
|
|
Modification phase of node SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_22/140
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_22 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_22[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_22[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_22[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_22[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_23 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_23, funcdef_no=47, decl_uid=4168, cgraph_uid=48, symbol_order=141)
|
|
|
|
Modification phase of node SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_23/141
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_23 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_23[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_23[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_23[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_23[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_23[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_23 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_23, funcdef_no=48, decl_uid=4170, cgraph_uid=49, symbol_order=142)
|
|
|
|
Modification phase of node SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_23/142
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_23 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_23[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_23[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_23[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_23[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_24 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_24, funcdef_no=49, decl_uid=4172, cgraph_uid=50, symbol_order=143)
|
|
|
|
Modification phase of node SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_24/143
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_24 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_24[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_24[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_24[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_24[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_24[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_24 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_24, funcdef_no=50, decl_uid=4174, cgraph_uid=51, symbol_order=144)
|
|
|
|
Modification phase of node SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_24/144
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_24 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_24[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_24[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_24[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_24[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_25 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_25, funcdef_no=51, decl_uid=4176, cgraph_uid=52, symbol_order=145)
|
|
|
|
Modification phase of node SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_25/145
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_25 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_25[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_25[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_25[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_25[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_25[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_25 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_25, funcdef_no=52, decl_uid=4178, cgraph_uid=53, symbol_order=146)
|
|
|
|
Modification phase of node SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_25/146
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_25 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_25[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_25[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_25[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_25[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_26 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_26, funcdef_no=53, decl_uid=4180, cgraph_uid=54, symbol_order=147)
|
|
|
|
Modification phase of node SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_26/147
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_26 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_26[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_26[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_26[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_26[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_26[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_26 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_26, funcdef_no=54, decl_uid=4182, cgraph_uid=55, symbol_order=148)
|
|
|
|
Modification phase of node SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_26/148
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_26 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_26[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_26[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_26[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_26[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_27 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_27, funcdef_no=55, decl_uid=4184, cgraph_uid=56, symbol_order=149)
|
|
|
|
Modification phase of node SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_27/149
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_27 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_27[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_27[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_27[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_27[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_27[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_27 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_27, funcdef_no=56, decl_uid=4186, cgraph_uid=57, symbol_order=150)
|
|
|
|
Modification phase of node SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_27/150
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_27 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_27[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_27[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_27[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_27[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_28 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_28, funcdef_no=57, decl_uid=4188, cgraph_uid=58, symbol_order=151)
|
|
|
|
Modification phase of node SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_28/151
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_28 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_28[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_28[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_28[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_28[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_28[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_28 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_28, funcdef_no=58, decl_uid=4190, cgraph_uid=59, symbol_order=152)
|
|
|
|
Modification phase of node SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_28/152
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_28 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_28[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_28[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_28[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_28[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_29 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_29, funcdef_no=59, decl_uid=4192, cgraph_uid=60, symbol_order=153)
|
|
|
|
Modification phase of node SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_29/153
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_29 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_29[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_29[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_29[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_29[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_29[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_29 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_29, funcdef_no=60, decl_uid=4194, cgraph_uid=61, symbol_order=154)
|
|
|
|
Modification phase of node SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_29/154
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_29 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_29[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_29[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_29[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_29[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_30 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_30, funcdef_no=61, decl_uid=4196, cgraph_uid=62, symbol_order=155)
|
|
|
|
Modification phase of node SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_30/155
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_30 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_30[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_30[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_30[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_30[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_30[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_30 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_30, funcdef_no=62, decl_uid=4198, cgraph_uid=63, symbol_order=156)
|
|
|
|
Modification phase of node SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_30/156
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_30 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_30[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_30[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_30[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_30[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_31 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_31, funcdef_no=63, decl_uid=4200, cgraph_uid=64, symbol_order=157)
|
|
|
|
Modification phase of node SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_31/157
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_31 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_31[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_31[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_31[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_31[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_31[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_31 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_31, funcdef_no=64, decl_uid=4202, cgraph_uid=65, symbol_order=158)
|
|
|
|
Modification phase of node SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_31/158
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_31 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_31[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_31[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_31[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_31[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_32 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_32, funcdef_no=65, decl_uid=4204, cgraph_uid=66, symbol_order=159)
|
|
|
|
Modification phase of node SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_32/159
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_32 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_32[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_32[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_32[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_32[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_32[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_32 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_32, funcdef_no=66, decl_uid=4206, cgraph_uid=67, symbol_order=160)
|
|
|
|
Modification phase of node SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_32/160
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_32 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_32[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_32[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_32[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_32[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_33 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_33, funcdef_no=67, decl_uid=4208, cgraph_uid=68, symbol_order=161)
|
|
|
|
Modification phase of node SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_33/161
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_33 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_33[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_33[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_33[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_33[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_33[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_33 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_33, funcdef_no=68, decl_uid=4210, cgraph_uid=69, symbol_order=162)
|
|
|
|
Modification phase of node SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_33/162
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_33 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_33[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_33[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_33[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_33[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_34 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_34, funcdef_no=69, decl_uid=4212, cgraph_uid=70, symbol_order=163)
|
|
|
|
Modification phase of node SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_34/163
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_34 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_34[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_34[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_34[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_34[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_34[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_34 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_34, funcdef_no=70, decl_uid=4214, cgraph_uid=71, symbol_order=164)
|
|
|
|
Modification phase of node SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_34/164
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_34 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_34[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_34[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_34[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_34[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_35 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_35, funcdef_no=71, decl_uid=4216, cgraph_uid=72, symbol_order=165)
|
|
|
|
Modification phase of node SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_35/165
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_35 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_35[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_35[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_35[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_35[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_35[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_35 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_35, funcdef_no=72, decl_uid=4218, cgraph_uid=73, symbol_order=166)
|
|
|
|
Modification phase of node SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_35/166
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_35 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_35[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_35[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_35[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_35[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_36 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_36, funcdef_no=73, decl_uid=4220, cgraph_uid=74, symbol_order=167)
|
|
|
|
Modification phase of node SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_36/167
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_36 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_36[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_36[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_36[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_36[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_36[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_36 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_36, funcdef_no=74, decl_uid=4222, cgraph_uid=75, symbol_order=168)
|
|
|
|
Modification phase of node SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_36/168
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_36 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_36[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_36[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_36[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_36[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_37 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_37, funcdef_no=75, decl_uid=4224, cgraph_uid=76, symbol_order=169)
|
|
|
|
Modification phase of node SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_37/169
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_37 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_37[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_37[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_37[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_37[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_37[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_37 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_37, funcdef_no=76, decl_uid=4226, cgraph_uid=77, symbol_order=170)
|
|
|
|
Modification phase of node SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_37/170
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_37 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_37[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_37[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_37[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_37[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_38 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_38, funcdef_no=77, decl_uid=4228, cgraph_uid=78, symbol_order=171)
|
|
|
|
Modification phase of node SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_38/171
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_38 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_38[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_38[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_38[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_38[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_38[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_38 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_38, funcdef_no=78, decl_uid=4230, cgraph_uid=79, symbol_order=172)
|
|
|
|
Modification phase of node SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_38/172
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_38 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_38[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_38[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_38[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_38[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_39 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_39, funcdef_no=79, decl_uid=4232, cgraph_uid=80, symbol_order=173)
|
|
|
|
Modification phase of node SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_39/173
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_39 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_39[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_39[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_39[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_39[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_39[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_39 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_39, funcdef_no=80, decl_uid=4234, cgraph_uid=81, symbol_order=174)
|
|
|
|
Modification phase of node SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_39/174
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_39 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_39[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_39[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_39[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_39[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_40 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_40, funcdef_no=81, decl_uid=4236, cgraph_uid=82, symbol_order=175)
|
|
|
|
Modification phase of node SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_40/175
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_40 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_40[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_40[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_40[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_40[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_40[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_40 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_40, funcdef_no=82, decl_uid=4238, cgraph_uid=83, symbol_order=176)
|
|
|
|
Modification phase of node SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_40/176
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_40 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_40[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_40[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_40[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_40[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_41 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_41, funcdef_no=83, decl_uid=4240, cgraph_uid=84, symbol_order=177)
|
|
|
|
Modification phase of node SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_41/177
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_41 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_41[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_41[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_41[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_41[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_41[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_41 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_41, funcdef_no=84, decl_uid=4242, cgraph_uid=85, symbol_order=178)
|
|
|
|
Modification phase of node SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_41/178
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_41 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_41[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_41[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_41[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_41[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_42 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_42, funcdef_no=85, decl_uid=4244, cgraph_uid=86, symbol_order=179)
|
|
|
|
Modification phase of node SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_42/179
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_42 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_42[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_42[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_42[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_42[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_42[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_42 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_42, funcdef_no=86, decl_uid=4246, cgraph_uid=87, symbol_order=180)
|
|
|
|
Modification phase of node SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_42/180
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_42 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_42[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_42[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_42[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_42[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_43 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_43, funcdef_no=87, decl_uid=4248, cgraph_uid=88, symbol_order=181)
|
|
|
|
Modification phase of node SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_43/181
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_43 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_43[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_43[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_43[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_43[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_43[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_43 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_43, funcdef_no=88, decl_uid=4250, cgraph_uid=89, symbol_order=182)
|
|
|
|
Modification phase of node SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_43/182
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_43 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_43[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_43[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_43[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_43[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_44 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_44, funcdef_no=89, decl_uid=4252, cgraph_uid=90, symbol_order=183)
|
|
|
|
Modification phase of node SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_44/183
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_44 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_44[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_44[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_44[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_44[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_44[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_44 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_44, funcdef_no=90, decl_uid=4254, cgraph_uid=91, symbol_order=184)
|
|
|
|
Modification phase of node SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_44/184
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_44 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_44[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_44[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_44[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_44[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_45 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_45, funcdef_no=91, decl_uid=4256, cgraph_uid=92, symbol_order=185)
|
|
|
|
Modification phase of node SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_45/185
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_45 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_45[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_45[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_45[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_45[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_45[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_45 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_45, funcdef_no=92, decl_uid=4258, cgraph_uid=93, symbol_order=186)
|
|
|
|
Modification phase of node SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_45/186
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_45 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_45[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_45[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_45[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_45[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_46 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_46, funcdef_no=93, decl_uid=4260, cgraph_uid=94, symbol_order=187)
|
|
|
|
Modification phase of node SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_46/187
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_46 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_46[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_46[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_46[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_46[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_46[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Function SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_46 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_46, funcdef_no=94, decl_uid=4262, cgraph_uid=95, symbol_order=188)
|
|
|
|
Modification phase of node SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_46/188
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_46 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_46[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_46[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_46[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_46[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|