mirror of
https://github.com/Dev-KATECH/ADM.git
synced 2026-05-17 09:53:59 +09:00
1040 lines
32 KiB
Plaintext
1040 lines
32 KiB
Plaintext
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Marking local functions:
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Marking externally visible functions: SchM_Exit_Uart_UART_EXCLUSIVE_AREA_08 SchM_Enter_Uart_UART_EXCLUSIVE_AREA_08 SchM_Exit_Uart_UART_EXCLUSIVE_AREA_07 SchM_Enter_Uart_UART_EXCLUSIVE_AREA_07 SchM_Exit_Uart_UART_EXCLUSIVE_AREA_06 SchM_Enter_Uart_UART_EXCLUSIVE_AREA_06 SchM_Exit_Uart_UART_EXCLUSIVE_AREA_05 SchM_Enter_Uart_UART_EXCLUSIVE_AREA_05 SchM_Exit_Uart_UART_EXCLUSIVE_AREA_04 SchM_Enter_Uart_UART_EXCLUSIVE_AREA_04 SchM_Exit_Uart_UART_EXCLUSIVE_AREA_03 SchM_Enter_Uart_UART_EXCLUSIVE_AREA_03 SchM_Exit_Uart_UART_EXCLUSIVE_AREA_02 SchM_Enter_Uart_UART_EXCLUSIVE_AREA_02 SchM_Exit_Uart_UART_EXCLUSIVE_AREA_01 SchM_Enter_Uart_UART_EXCLUSIVE_AREA_01 SchM_Exit_Uart_UART_EXCLUSIVE_AREA_00 SchM_Enter_Uart_UART_EXCLUSIVE_AREA_00 Uart_schm_read_msr
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Marking externally visible variables:
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Reclaiming functions:
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Reclaiming variables:
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Clearing address taken flags:
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Symbol table:
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Sys_GetCoreID/37 (Sys_GetCoreID) @05db8460
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: SchM_Exit_Uart_UART_EXCLUSIVE_AREA_08/36 SchM_Enter_Uart_UART_EXCLUSIVE_AREA_08/35 SchM_Exit_Uart_UART_EXCLUSIVE_AREA_07/34 SchM_Enter_Uart_UART_EXCLUSIVE_AREA_07/33 SchM_Exit_Uart_UART_EXCLUSIVE_AREA_06/32 SchM_Enter_Uart_UART_EXCLUSIVE_AREA_06/31 SchM_Exit_Uart_UART_EXCLUSIVE_AREA_05/30 SchM_Enter_Uart_UART_EXCLUSIVE_AREA_05/29 SchM_Exit_Uart_UART_EXCLUSIVE_AREA_04/28 SchM_Enter_Uart_UART_EXCLUSIVE_AREA_04/27 SchM_Exit_Uart_UART_EXCLUSIVE_AREA_03/26 SchM_Enter_Uart_UART_EXCLUSIVE_AREA_03/25 SchM_Exit_Uart_UART_EXCLUSIVE_AREA_02/24 SchM_Enter_Uart_UART_EXCLUSIVE_AREA_02/23 SchM_Exit_Uart_UART_EXCLUSIVE_AREA_01/22 SchM_Enter_Uart_UART_EXCLUSIVE_AREA_01/21 SchM_Exit_Uart_UART_EXCLUSIVE_AREA_00/20 SchM_Enter_Uart_UART_EXCLUSIVE_AREA_00/19
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Calls:
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SchM_Exit_Uart_UART_EXCLUSIVE_AREA_08/36 (SchM_Exit_Uart_UART_EXCLUSIVE_AREA_08) @05db1d20
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Type: function definition analyzed
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Visibility: externally_visible public
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References: reentry_guard_UART_EXCLUSIVE_AREA_08/17 (read)reentry_guard_UART_EXCLUSIVE_AREA_08/17 (write)msr_UART_EXCLUSIVE_AREA_08/8 (read)reentry_guard_UART_EXCLUSIVE_AREA_08/17 (read)
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Referring:
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Availability: available
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Function flags: body optimize_size
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Called by:
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Calls: Sys_GetCoreID/37
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SchM_Enter_Uart_UART_EXCLUSIVE_AREA_08/35 (SchM_Enter_Uart_UART_EXCLUSIVE_AREA_08) @05db17e0
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Type: function definition analyzed
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Visibility: externally_visible public
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References: reentry_guard_UART_EXCLUSIVE_AREA_08/17 (read)msr_UART_EXCLUSIVE_AREA_08/8 (write)msr_UART_EXCLUSIVE_AREA_08/8 (read)reentry_guard_UART_EXCLUSIVE_AREA_08/17 (read)reentry_guard_UART_EXCLUSIVE_AREA_08/17 (write)
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Referring:
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Availability: available
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Function flags: body optimize_size
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Called by:
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Calls: Uart_schm_read_msr/18 Sys_GetCoreID/37
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SchM_Exit_Uart_UART_EXCLUSIVE_AREA_07/34 (SchM_Exit_Uart_UART_EXCLUSIVE_AREA_07) @05db12a0
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Type: function definition analyzed
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Visibility: externally_visible public
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References: reentry_guard_UART_EXCLUSIVE_AREA_07/16 (read)reentry_guard_UART_EXCLUSIVE_AREA_07/16 (write)msr_UART_EXCLUSIVE_AREA_07/7 (read)reentry_guard_UART_EXCLUSIVE_AREA_07/16 (read)
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Referring:
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Availability: available
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Function flags: body optimize_size
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Called by:
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Calls: Sys_GetCoreID/37
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SchM_Enter_Uart_UART_EXCLUSIVE_AREA_07/33 (SchM_Enter_Uart_UART_EXCLUSIVE_AREA_07) @05db1ee0
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Type: function definition analyzed
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Visibility: externally_visible public
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References: reentry_guard_UART_EXCLUSIVE_AREA_07/16 (read)msr_UART_EXCLUSIVE_AREA_07/7 (write)msr_UART_EXCLUSIVE_AREA_07/7 (read)reentry_guard_UART_EXCLUSIVE_AREA_07/16 (read)reentry_guard_UART_EXCLUSIVE_AREA_07/16 (write)
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Referring:
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Availability: available
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Function flags: body optimize_size
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Called by:
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Calls: Uart_schm_read_msr/18 Sys_GetCoreID/37
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SchM_Exit_Uart_UART_EXCLUSIVE_AREA_06/32 (SchM_Exit_Uart_UART_EXCLUSIVE_AREA_06) @05db1c40
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Type: function definition analyzed
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Visibility: externally_visible public
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References: reentry_guard_UART_EXCLUSIVE_AREA_06/15 (read)reentry_guard_UART_EXCLUSIVE_AREA_06/15 (write)msr_UART_EXCLUSIVE_AREA_06/6 (read)reentry_guard_UART_EXCLUSIVE_AREA_06/15 (read)
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Referring:
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Availability: available
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Function flags: body optimize_size
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Called by:
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Calls: Sys_GetCoreID/37
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SchM_Enter_Uart_UART_EXCLUSIVE_AREA_06/31 (SchM_Enter_Uart_UART_EXCLUSIVE_AREA_06) @05db19a0
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Type: function definition analyzed
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Visibility: externally_visible public
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References: reentry_guard_UART_EXCLUSIVE_AREA_06/15 (read)msr_UART_EXCLUSIVE_AREA_06/6 (write)msr_UART_EXCLUSIVE_AREA_06/6 (read)reentry_guard_UART_EXCLUSIVE_AREA_06/15 (read)reentry_guard_UART_EXCLUSIVE_AREA_06/15 (write)
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Referring:
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Availability: available
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Function flags: body optimize_size
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Called by:
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Calls: Uart_schm_read_msr/18 Sys_GetCoreID/37
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SchM_Exit_Uart_UART_EXCLUSIVE_AREA_05/30 (SchM_Exit_Uart_UART_EXCLUSIVE_AREA_05) @05db1700
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Type: function definition analyzed
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Visibility: externally_visible public
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References: reentry_guard_UART_EXCLUSIVE_AREA_05/14 (read)reentry_guard_UART_EXCLUSIVE_AREA_05/14 (write)msr_UART_EXCLUSIVE_AREA_05/5 (read)reentry_guard_UART_EXCLUSIVE_AREA_05/14 (read)
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Referring:
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Availability: available
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Function flags: body optimize_size
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Called by:
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Calls: Sys_GetCoreID/37
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SchM_Enter_Uart_UART_EXCLUSIVE_AREA_05/29 (SchM_Enter_Uart_UART_EXCLUSIVE_AREA_05) @05db1460
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Type: function definition analyzed
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Visibility: externally_visible public
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References: reentry_guard_UART_EXCLUSIVE_AREA_05/14 (read)msr_UART_EXCLUSIVE_AREA_05/5 (write)msr_UART_EXCLUSIVE_AREA_05/5 (read)reentry_guard_UART_EXCLUSIVE_AREA_05/14 (read)reentry_guard_UART_EXCLUSIVE_AREA_05/14 (write)
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Referring:
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Availability: available
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Function flags: body optimize_size
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Called by:
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Calls: Uart_schm_read_msr/18 Sys_GetCoreID/37
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SchM_Exit_Uart_UART_EXCLUSIVE_AREA_04/28 (SchM_Exit_Uart_UART_EXCLUSIVE_AREA_04) @05db11c0
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Type: function definition analyzed
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Visibility: externally_visible public
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References: reentry_guard_UART_EXCLUSIVE_AREA_04/13 (read)reentry_guard_UART_EXCLUSIVE_AREA_04/13 (write)msr_UART_EXCLUSIVE_AREA_04/4 (read)reentry_guard_UART_EXCLUSIVE_AREA_04/13 (read)
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Referring:
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Availability: available
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Function flags: body optimize_size
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Called by:
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Calls: Sys_GetCoreID/37
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SchM_Enter_Uart_UART_EXCLUSIVE_AREA_04/27 (SchM_Enter_Uart_UART_EXCLUSIVE_AREA_04) @05c83d20
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Type: function definition analyzed
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Visibility: externally_visible public
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References: reentry_guard_UART_EXCLUSIVE_AREA_04/13 (read)msr_UART_EXCLUSIVE_AREA_04/4 (write)msr_UART_EXCLUSIVE_AREA_04/4 (read)reentry_guard_UART_EXCLUSIVE_AREA_04/13 (read)reentry_guard_UART_EXCLUSIVE_AREA_04/13 (write)
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Referring:
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Availability: available
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Function flags: body optimize_size
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Called by:
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Calls: Uart_schm_read_msr/18 Sys_GetCoreID/37
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SchM_Exit_Uart_UART_EXCLUSIVE_AREA_03/26 (SchM_Exit_Uart_UART_EXCLUSIVE_AREA_03) @05c837e0
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Type: function definition analyzed
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Visibility: externally_visible public
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References: reentry_guard_UART_EXCLUSIVE_AREA_03/12 (read)reentry_guard_UART_EXCLUSIVE_AREA_03/12 (write)msr_UART_EXCLUSIVE_AREA_03/3 (read)reentry_guard_UART_EXCLUSIVE_AREA_03/12 (read)
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Referring:
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Availability: available
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Function flags: body optimize_size
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Called by:
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Calls: Sys_GetCoreID/37
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SchM_Enter_Uart_UART_EXCLUSIVE_AREA_03/25 (SchM_Enter_Uart_UART_EXCLUSIVE_AREA_03) @05c832a0
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Type: function definition analyzed
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Visibility: externally_visible public
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References: reentry_guard_UART_EXCLUSIVE_AREA_03/12 (read)msr_UART_EXCLUSIVE_AREA_03/3 (write)msr_UART_EXCLUSIVE_AREA_03/3 (read)reentry_guard_UART_EXCLUSIVE_AREA_03/12 (read)reentry_guard_UART_EXCLUSIVE_AREA_03/12 (write)
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Referring:
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Availability: available
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Function flags: body optimize_size
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Called by:
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Calls: Uart_schm_read_msr/18 Sys_GetCoreID/37
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SchM_Exit_Uart_UART_EXCLUSIVE_AREA_02/24 (SchM_Exit_Uart_UART_EXCLUSIVE_AREA_02) @05c83ee0
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Type: function definition analyzed
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Visibility: externally_visible public
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References: reentry_guard_UART_EXCLUSIVE_AREA_02/11 (read)reentry_guard_UART_EXCLUSIVE_AREA_02/11 (write)msr_UART_EXCLUSIVE_AREA_02/2 (read)reentry_guard_UART_EXCLUSIVE_AREA_02/11 (read)
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Referring:
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Availability: available
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Function flags: body optimize_size
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Called by:
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Calls: Sys_GetCoreID/37
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SchM_Enter_Uart_UART_EXCLUSIVE_AREA_02/23 (SchM_Enter_Uart_UART_EXCLUSIVE_AREA_02) @05c83c40
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Type: function definition analyzed
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Visibility: externally_visible public
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References: reentry_guard_UART_EXCLUSIVE_AREA_02/11 (read)msr_UART_EXCLUSIVE_AREA_02/2 (write)msr_UART_EXCLUSIVE_AREA_02/2 (read)reentry_guard_UART_EXCLUSIVE_AREA_02/11 (read)reentry_guard_UART_EXCLUSIVE_AREA_02/11 (write)
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Referring:
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Availability: available
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Function flags: body optimize_size
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Called by:
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Calls: Uart_schm_read_msr/18 Sys_GetCoreID/37
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SchM_Exit_Uart_UART_EXCLUSIVE_AREA_01/22 (SchM_Exit_Uart_UART_EXCLUSIVE_AREA_01) @05c839a0
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Type: function definition analyzed
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Visibility: externally_visible public
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References: reentry_guard_UART_EXCLUSIVE_AREA_01/10 (read)reentry_guard_UART_EXCLUSIVE_AREA_01/10 (write)msr_UART_EXCLUSIVE_AREA_01/1 (read)reentry_guard_UART_EXCLUSIVE_AREA_01/10 (read)
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Referring:
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Availability: available
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Function flags: body optimize_size
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Called by:
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Calls: Sys_GetCoreID/37
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SchM_Enter_Uart_UART_EXCLUSIVE_AREA_01/21 (SchM_Enter_Uart_UART_EXCLUSIVE_AREA_01) @05c83700
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Type: function definition analyzed
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Visibility: externally_visible public
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References: reentry_guard_UART_EXCLUSIVE_AREA_01/10 (read)msr_UART_EXCLUSIVE_AREA_01/1 (write)msr_UART_EXCLUSIVE_AREA_01/1 (read)reentry_guard_UART_EXCLUSIVE_AREA_01/10 (read)reentry_guard_UART_EXCLUSIVE_AREA_01/10 (write)
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Referring:
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Availability: available
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Function flags: body optimize_size
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Called by:
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Calls: Uart_schm_read_msr/18 Sys_GetCoreID/37
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SchM_Exit_Uart_UART_EXCLUSIVE_AREA_00/20 (SchM_Exit_Uart_UART_EXCLUSIVE_AREA_00) @05c83460
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Type: function definition analyzed
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Visibility: externally_visible public
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References: reentry_guard_UART_EXCLUSIVE_AREA_00/9 (read)reentry_guard_UART_EXCLUSIVE_AREA_00/9 (write)msr_UART_EXCLUSIVE_AREA_00/0 (read)reentry_guard_UART_EXCLUSIVE_AREA_00/9 (read)
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Referring:
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Availability: available
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Function flags: body optimize_size
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Called by:
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Calls: Sys_GetCoreID/37
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SchM_Enter_Uart_UART_EXCLUSIVE_AREA_00/19 (SchM_Enter_Uart_UART_EXCLUSIVE_AREA_00) @05c831c0
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Type: function definition analyzed
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Visibility: externally_visible public
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References: reentry_guard_UART_EXCLUSIVE_AREA_00/9 (read)msr_UART_EXCLUSIVE_AREA_00/0 (write)msr_UART_EXCLUSIVE_AREA_00/0 (read)reentry_guard_UART_EXCLUSIVE_AREA_00/9 (read)reentry_guard_UART_EXCLUSIVE_AREA_00/9 (write)
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Referring:
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Availability: available
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Function flags: body optimize_size
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Called by:
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Calls: Uart_schm_read_msr/18 Sys_GetCoreID/37
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Uart_schm_read_msr/18 (Uart_schm_read_msr) @05c7ee00
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Type: function definition analyzed
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Visibility: externally_visible public
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References:
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Referring:
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Availability: available
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Function flags: body optimize_size
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Called by: SchM_Enter_Uart_UART_EXCLUSIVE_AREA_08/35 SchM_Enter_Uart_UART_EXCLUSIVE_AREA_07/33 SchM_Enter_Uart_UART_EXCLUSIVE_AREA_06/31 SchM_Enter_Uart_UART_EXCLUSIVE_AREA_05/29 SchM_Enter_Uart_UART_EXCLUSIVE_AREA_04/27 SchM_Enter_Uart_UART_EXCLUSIVE_AREA_03/25 SchM_Enter_Uart_UART_EXCLUSIVE_AREA_02/23 SchM_Enter_Uart_UART_EXCLUSIVE_AREA_01/21 SchM_Enter_Uart_UART_EXCLUSIVE_AREA_00/19
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Calls:
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reentry_guard_UART_EXCLUSIVE_AREA_08/17 (reentry_guard_UART_EXCLUSIVE_AREA_08) @05c80048
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Type: variable definition analyzed
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Visibility: force_output prevailing_def_ironly
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References:
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Referring: SchM_Enter_Uart_UART_EXCLUSIVE_AREA_08/35 (read)SchM_Enter_Uart_UART_EXCLUSIVE_AREA_08/35 (read)SchM_Enter_Uart_UART_EXCLUSIVE_AREA_08/35 (write)SchM_Exit_Uart_UART_EXCLUSIVE_AREA_08/36 (read)SchM_Exit_Uart_UART_EXCLUSIVE_AREA_08/36 (write)SchM_Exit_Uart_UART_EXCLUSIVE_AREA_08/36 (read)
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Availability: available
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Varpool flags:
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reentry_guard_UART_EXCLUSIVE_AREA_07/16 (reentry_guard_UART_EXCLUSIVE_AREA_07) @05c7af78
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Type: variable definition analyzed
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Visibility: force_output prevailing_def_ironly
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References:
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Referring: SchM_Enter_Uart_UART_EXCLUSIVE_AREA_07/33 (read)SchM_Enter_Uart_UART_EXCLUSIVE_AREA_07/33 (read)SchM_Enter_Uart_UART_EXCLUSIVE_AREA_07/33 (write)SchM_Exit_Uart_UART_EXCLUSIVE_AREA_07/34 (read)SchM_Exit_Uart_UART_EXCLUSIVE_AREA_07/34 (write)SchM_Exit_Uart_UART_EXCLUSIVE_AREA_07/34 (read)
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Availability: available
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Varpool flags:
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reentry_guard_UART_EXCLUSIVE_AREA_06/15 (reentry_guard_UART_EXCLUSIVE_AREA_06) @05c7aee8
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Type: variable definition analyzed
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Visibility: force_output prevailing_def_ironly
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References:
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Referring: SchM_Enter_Uart_UART_EXCLUSIVE_AREA_06/31 (read)SchM_Enter_Uart_UART_EXCLUSIVE_AREA_06/31 (read)SchM_Enter_Uart_UART_EXCLUSIVE_AREA_06/31 (write)SchM_Exit_Uart_UART_EXCLUSIVE_AREA_06/32 (read)SchM_Exit_Uart_UART_EXCLUSIVE_AREA_06/32 (write)SchM_Exit_Uart_UART_EXCLUSIVE_AREA_06/32 (read)
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Availability: available
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Varpool flags:
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reentry_guard_UART_EXCLUSIVE_AREA_05/14 (reentry_guard_UART_EXCLUSIVE_AREA_05) @05c7ae58
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Type: variable definition analyzed
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Visibility: force_output prevailing_def_ironly
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References:
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Referring: SchM_Enter_Uart_UART_EXCLUSIVE_AREA_05/29 (read)SchM_Enter_Uart_UART_EXCLUSIVE_AREA_05/29 (read)SchM_Enter_Uart_UART_EXCLUSIVE_AREA_05/29 (write)SchM_Exit_Uart_UART_EXCLUSIVE_AREA_05/30 (read)SchM_Exit_Uart_UART_EXCLUSIVE_AREA_05/30 (write)SchM_Exit_Uart_UART_EXCLUSIVE_AREA_05/30 (read)
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Availability: available
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Varpool flags:
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reentry_guard_UART_EXCLUSIVE_AREA_04/13 (reentry_guard_UART_EXCLUSIVE_AREA_04) @05c7adc8
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Type: variable definition analyzed
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Visibility: force_output prevailing_def_ironly
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References:
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Referring: SchM_Enter_Uart_UART_EXCLUSIVE_AREA_04/27 (read)SchM_Enter_Uart_UART_EXCLUSIVE_AREA_04/27 (read)SchM_Enter_Uart_UART_EXCLUSIVE_AREA_04/27 (write)SchM_Exit_Uart_UART_EXCLUSIVE_AREA_04/28 (read)SchM_Exit_Uart_UART_EXCLUSIVE_AREA_04/28 (write)SchM_Exit_Uart_UART_EXCLUSIVE_AREA_04/28 (read)
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Availability: available
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Varpool flags:
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reentry_guard_UART_EXCLUSIVE_AREA_03/12 (reentry_guard_UART_EXCLUSIVE_AREA_03) @05c7ad38
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Type: variable definition analyzed
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Visibility: force_output prevailing_def_ironly
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References:
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Referring: SchM_Enter_Uart_UART_EXCLUSIVE_AREA_03/25 (read)SchM_Enter_Uart_UART_EXCLUSIVE_AREA_03/25 (read)SchM_Enter_Uart_UART_EXCLUSIVE_AREA_03/25 (write)SchM_Exit_Uart_UART_EXCLUSIVE_AREA_03/26 (read)SchM_Exit_Uart_UART_EXCLUSIVE_AREA_03/26 (write)SchM_Exit_Uart_UART_EXCLUSIVE_AREA_03/26 (read)
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Availability: available
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Varpool flags:
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reentry_guard_UART_EXCLUSIVE_AREA_02/11 (reentry_guard_UART_EXCLUSIVE_AREA_02) @05c7aca8
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Type: variable definition analyzed
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Visibility: force_output prevailing_def_ironly
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References:
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Referring: SchM_Enter_Uart_UART_EXCLUSIVE_AREA_02/23 (read)SchM_Enter_Uart_UART_EXCLUSIVE_AREA_02/23 (read)SchM_Enter_Uart_UART_EXCLUSIVE_AREA_02/23 (write)SchM_Exit_Uart_UART_EXCLUSIVE_AREA_02/24 (read)SchM_Exit_Uart_UART_EXCLUSIVE_AREA_02/24 (write)SchM_Exit_Uart_UART_EXCLUSIVE_AREA_02/24 (read)
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Availability: available
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Varpool flags:
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reentry_guard_UART_EXCLUSIVE_AREA_01/10 (reentry_guard_UART_EXCLUSIVE_AREA_01) @05c7ac18
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Type: variable definition analyzed
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Visibility: force_output prevailing_def_ironly
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References:
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Referring: SchM_Enter_Uart_UART_EXCLUSIVE_AREA_01/21 (read)SchM_Enter_Uart_UART_EXCLUSIVE_AREA_01/21 (read)SchM_Enter_Uart_UART_EXCLUSIVE_AREA_01/21 (write)SchM_Exit_Uart_UART_EXCLUSIVE_AREA_01/22 (read)SchM_Exit_Uart_UART_EXCLUSIVE_AREA_01/22 (write)SchM_Exit_Uart_UART_EXCLUSIVE_AREA_01/22 (read)
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Availability: available
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Varpool flags:
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reentry_guard_UART_EXCLUSIVE_AREA_00/9 (reentry_guard_UART_EXCLUSIVE_AREA_00) @05c7ab88
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Type: variable definition analyzed
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Visibility: force_output prevailing_def_ironly
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References:
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Referring: SchM_Enter_Uart_UART_EXCLUSIVE_AREA_00/19 (read)SchM_Enter_Uart_UART_EXCLUSIVE_AREA_00/19 (read)SchM_Enter_Uart_UART_EXCLUSIVE_AREA_00/19 (write)SchM_Exit_Uart_UART_EXCLUSIVE_AREA_00/20 (read)SchM_Exit_Uart_UART_EXCLUSIVE_AREA_00/20 (write)SchM_Exit_Uart_UART_EXCLUSIVE_AREA_00/20 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_UART_EXCLUSIVE_AREA_08/8 (msr_UART_EXCLUSIVE_AREA_08) @05c7aaf8
|
|
Type: variable definition analyzed
|
|
Visibility: prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Uart_UART_EXCLUSIVE_AREA_08/35 (write)SchM_Enter_Uart_UART_EXCLUSIVE_AREA_08/35 (read)SchM_Exit_Uart_UART_EXCLUSIVE_AREA_08/36 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_UART_EXCLUSIVE_AREA_07/7 (msr_UART_EXCLUSIVE_AREA_07) @05c7aa68
|
|
Type: variable definition analyzed
|
|
Visibility: prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Uart_UART_EXCLUSIVE_AREA_07/33 (write)SchM_Enter_Uart_UART_EXCLUSIVE_AREA_07/33 (read)SchM_Exit_Uart_UART_EXCLUSIVE_AREA_07/34 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_UART_EXCLUSIVE_AREA_06/6 (msr_UART_EXCLUSIVE_AREA_06) @05c7a9d8
|
|
Type: variable definition analyzed
|
|
Visibility: prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Uart_UART_EXCLUSIVE_AREA_06/31 (write)SchM_Enter_Uart_UART_EXCLUSIVE_AREA_06/31 (read)SchM_Exit_Uart_UART_EXCLUSIVE_AREA_06/32 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_UART_EXCLUSIVE_AREA_05/5 (msr_UART_EXCLUSIVE_AREA_05) @05c7a948
|
|
Type: variable definition analyzed
|
|
Visibility: prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Uart_UART_EXCLUSIVE_AREA_05/29 (write)SchM_Enter_Uart_UART_EXCLUSIVE_AREA_05/29 (read)SchM_Exit_Uart_UART_EXCLUSIVE_AREA_05/30 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_UART_EXCLUSIVE_AREA_04/4 (msr_UART_EXCLUSIVE_AREA_04) @05c7a8b8
|
|
Type: variable definition analyzed
|
|
Visibility: prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Uart_UART_EXCLUSIVE_AREA_04/27 (write)SchM_Enter_Uart_UART_EXCLUSIVE_AREA_04/27 (read)SchM_Exit_Uart_UART_EXCLUSIVE_AREA_04/28 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_UART_EXCLUSIVE_AREA_03/3 (msr_UART_EXCLUSIVE_AREA_03) @05c7a828
|
|
Type: variable definition analyzed
|
|
Visibility: prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Uart_UART_EXCLUSIVE_AREA_03/25 (write)SchM_Enter_Uart_UART_EXCLUSIVE_AREA_03/25 (read)SchM_Exit_Uart_UART_EXCLUSIVE_AREA_03/26 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_UART_EXCLUSIVE_AREA_02/2 (msr_UART_EXCLUSIVE_AREA_02) @05c7a798
|
|
Type: variable definition analyzed
|
|
Visibility: prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Uart_UART_EXCLUSIVE_AREA_02/23 (write)SchM_Enter_Uart_UART_EXCLUSIVE_AREA_02/23 (read)SchM_Exit_Uart_UART_EXCLUSIVE_AREA_02/24 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_UART_EXCLUSIVE_AREA_01/1 (msr_UART_EXCLUSIVE_AREA_01) @05c7a708
|
|
Type: variable definition analyzed
|
|
Visibility: prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Uart_UART_EXCLUSIVE_AREA_01/21 (write)SchM_Enter_Uart_UART_EXCLUSIVE_AREA_01/21 (read)SchM_Exit_Uart_UART_EXCLUSIVE_AREA_01/22 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_UART_EXCLUSIVE_AREA_00/0 (msr_UART_EXCLUSIVE_AREA_00) @05c7a678
|
|
Type: variable definition analyzed
|
|
Visibility: prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Uart_UART_EXCLUSIVE_AREA_00/19 (write)SchM_Enter_Uart_UART_EXCLUSIVE_AREA_00/19 (read)SchM_Exit_Uart_UART_EXCLUSIVE_AREA_00/20 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
SchM_Exit_Uart_UART_EXCLUSIVE_AREA_08 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId = (uint32) _1;
|
|
# DEBUG BEGIN_STMT
|
|
_2 = reentry_guard_UART_EXCLUSIVE_AREA_08[u32CoreId];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_UART_EXCLUSIVE_AREA_08[u32CoreId] = _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 = msr_UART_EXCLUSIVE_AREA_08[u32CoreId];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 3> :
|
|
_6 = reentry_guard_UART_EXCLUSIVE_AREA_08[u32CoreId];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [INV]
|
|
else
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> :
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Uart_UART_EXCLUSIVE_AREA_08 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId = (uint32) _1;
|
|
# DEBUG BEGIN_STMT
|
|
_2 = reentry_guard_UART_EXCLUSIVE_AREA_08[u32CoreId];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
_3 = Uart_schm_read_msr ();
|
|
msr_UART_EXCLUSIVE_AREA_08[u32CoreId] = _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 = msr_UART_EXCLUSIVE_AREA_08[u32CoreId];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 4>; [INV]
|
|
else
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> :
|
|
# DEBUG BEGIN_STMT
|
|
_6 = reentry_guard_UART_EXCLUSIVE_AREA_08[u32CoreId];
|
|
_7 = _6 + 1;
|
|
reentry_guard_UART_EXCLUSIVE_AREA_08[u32CoreId] = _7;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Uart_UART_EXCLUSIVE_AREA_07 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId = (uint32) _1;
|
|
# DEBUG BEGIN_STMT
|
|
_2 = reentry_guard_UART_EXCLUSIVE_AREA_07[u32CoreId];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_UART_EXCLUSIVE_AREA_07[u32CoreId] = _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 = msr_UART_EXCLUSIVE_AREA_07[u32CoreId];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 3> :
|
|
_6 = reentry_guard_UART_EXCLUSIVE_AREA_07[u32CoreId];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [INV]
|
|
else
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> :
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Uart_UART_EXCLUSIVE_AREA_07 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId = (uint32) _1;
|
|
# DEBUG BEGIN_STMT
|
|
_2 = reentry_guard_UART_EXCLUSIVE_AREA_07[u32CoreId];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
_3 = Uart_schm_read_msr ();
|
|
msr_UART_EXCLUSIVE_AREA_07[u32CoreId] = _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 = msr_UART_EXCLUSIVE_AREA_07[u32CoreId];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 4>; [INV]
|
|
else
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> :
|
|
# DEBUG BEGIN_STMT
|
|
_6 = reentry_guard_UART_EXCLUSIVE_AREA_07[u32CoreId];
|
|
_7 = _6 + 1;
|
|
reentry_guard_UART_EXCLUSIVE_AREA_07[u32CoreId] = _7;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Uart_UART_EXCLUSIVE_AREA_06 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId = (uint32) _1;
|
|
# DEBUG BEGIN_STMT
|
|
_2 = reentry_guard_UART_EXCLUSIVE_AREA_06[u32CoreId];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_UART_EXCLUSIVE_AREA_06[u32CoreId] = _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 = msr_UART_EXCLUSIVE_AREA_06[u32CoreId];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 3> :
|
|
_6 = reentry_guard_UART_EXCLUSIVE_AREA_06[u32CoreId];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [INV]
|
|
else
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> :
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Uart_UART_EXCLUSIVE_AREA_06 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId = (uint32) _1;
|
|
# DEBUG BEGIN_STMT
|
|
_2 = reentry_guard_UART_EXCLUSIVE_AREA_06[u32CoreId];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
_3 = Uart_schm_read_msr ();
|
|
msr_UART_EXCLUSIVE_AREA_06[u32CoreId] = _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 = msr_UART_EXCLUSIVE_AREA_06[u32CoreId];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 4>; [INV]
|
|
else
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> :
|
|
# DEBUG BEGIN_STMT
|
|
_6 = reentry_guard_UART_EXCLUSIVE_AREA_06[u32CoreId];
|
|
_7 = _6 + 1;
|
|
reentry_guard_UART_EXCLUSIVE_AREA_06[u32CoreId] = _7;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Uart_UART_EXCLUSIVE_AREA_05 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId = (uint32) _1;
|
|
# DEBUG BEGIN_STMT
|
|
_2 = reentry_guard_UART_EXCLUSIVE_AREA_05[u32CoreId];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_UART_EXCLUSIVE_AREA_05[u32CoreId] = _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 = msr_UART_EXCLUSIVE_AREA_05[u32CoreId];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 3> :
|
|
_6 = reentry_guard_UART_EXCLUSIVE_AREA_05[u32CoreId];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [INV]
|
|
else
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> :
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Uart_UART_EXCLUSIVE_AREA_05 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId = (uint32) _1;
|
|
# DEBUG BEGIN_STMT
|
|
_2 = reentry_guard_UART_EXCLUSIVE_AREA_05[u32CoreId];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
_3 = Uart_schm_read_msr ();
|
|
msr_UART_EXCLUSIVE_AREA_05[u32CoreId] = _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 = msr_UART_EXCLUSIVE_AREA_05[u32CoreId];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 4>; [INV]
|
|
else
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> :
|
|
# DEBUG BEGIN_STMT
|
|
_6 = reentry_guard_UART_EXCLUSIVE_AREA_05[u32CoreId];
|
|
_7 = _6 + 1;
|
|
reentry_guard_UART_EXCLUSIVE_AREA_05[u32CoreId] = _7;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Uart_UART_EXCLUSIVE_AREA_04 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId = (uint32) _1;
|
|
# DEBUG BEGIN_STMT
|
|
_2 = reentry_guard_UART_EXCLUSIVE_AREA_04[u32CoreId];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_UART_EXCLUSIVE_AREA_04[u32CoreId] = _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 = msr_UART_EXCLUSIVE_AREA_04[u32CoreId];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 3> :
|
|
_6 = reentry_guard_UART_EXCLUSIVE_AREA_04[u32CoreId];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [INV]
|
|
else
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> :
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Uart_UART_EXCLUSIVE_AREA_04 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId = (uint32) _1;
|
|
# DEBUG BEGIN_STMT
|
|
_2 = reentry_guard_UART_EXCLUSIVE_AREA_04[u32CoreId];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
_3 = Uart_schm_read_msr ();
|
|
msr_UART_EXCLUSIVE_AREA_04[u32CoreId] = _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 = msr_UART_EXCLUSIVE_AREA_04[u32CoreId];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 4>; [INV]
|
|
else
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> :
|
|
# DEBUG BEGIN_STMT
|
|
_6 = reentry_guard_UART_EXCLUSIVE_AREA_04[u32CoreId];
|
|
_7 = _6 + 1;
|
|
reentry_guard_UART_EXCLUSIVE_AREA_04[u32CoreId] = _7;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Uart_UART_EXCLUSIVE_AREA_03 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId = (uint32) _1;
|
|
# DEBUG BEGIN_STMT
|
|
_2 = reentry_guard_UART_EXCLUSIVE_AREA_03[u32CoreId];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_UART_EXCLUSIVE_AREA_03[u32CoreId] = _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 = msr_UART_EXCLUSIVE_AREA_03[u32CoreId];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 3> :
|
|
_6 = reentry_guard_UART_EXCLUSIVE_AREA_03[u32CoreId];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [INV]
|
|
else
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> :
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Uart_UART_EXCLUSIVE_AREA_03 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId = (uint32) _1;
|
|
# DEBUG BEGIN_STMT
|
|
_2 = reentry_guard_UART_EXCLUSIVE_AREA_03[u32CoreId];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
_3 = Uart_schm_read_msr ();
|
|
msr_UART_EXCLUSIVE_AREA_03[u32CoreId] = _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 = msr_UART_EXCLUSIVE_AREA_03[u32CoreId];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 4>; [INV]
|
|
else
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> :
|
|
# DEBUG BEGIN_STMT
|
|
_6 = reentry_guard_UART_EXCLUSIVE_AREA_03[u32CoreId];
|
|
_7 = _6 + 1;
|
|
reentry_guard_UART_EXCLUSIVE_AREA_03[u32CoreId] = _7;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Uart_UART_EXCLUSIVE_AREA_02 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId = (uint32) _1;
|
|
# DEBUG BEGIN_STMT
|
|
_2 = reentry_guard_UART_EXCLUSIVE_AREA_02[u32CoreId];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_UART_EXCLUSIVE_AREA_02[u32CoreId] = _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 = msr_UART_EXCLUSIVE_AREA_02[u32CoreId];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 3> :
|
|
_6 = reentry_guard_UART_EXCLUSIVE_AREA_02[u32CoreId];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [INV]
|
|
else
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> :
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Uart_UART_EXCLUSIVE_AREA_02 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId = (uint32) _1;
|
|
# DEBUG BEGIN_STMT
|
|
_2 = reentry_guard_UART_EXCLUSIVE_AREA_02[u32CoreId];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
_3 = Uart_schm_read_msr ();
|
|
msr_UART_EXCLUSIVE_AREA_02[u32CoreId] = _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 = msr_UART_EXCLUSIVE_AREA_02[u32CoreId];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 4>; [INV]
|
|
else
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> :
|
|
# DEBUG BEGIN_STMT
|
|
_6 = reentry_guard_UART_EXCLUSIVE_AREA_02[u32CoreId];
|
|
_7 = _6 + 1;
|
|
reentry_guard_UART_EXCLUSIVE_AREA_02[u32CoreId] = _7;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Uart_UART_EXCLUSIVE_AREA_01 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId = (uint32) _1;
|
|
# DEBUG BEGIN_STMT
|
|
_2 = reentry_guard_UART_EXCLUSIVE_AREA_01[u32CoreId];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_UART_EXCLUSIVE_AREA_01[u32CoreId] = _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 = msr_UART_EXCLUSIVE_AREA_01[u32CoreId];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 3> :
|
|
_6 = reentry_guard_UART_EXCLUSIVE_AREA_01[u32CoreId];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [INV]
|
|
else
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> :
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Uart_UART_EXCLUSIVE_AREA_01 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId = (uint32) _1;
|
|
# DEBUG BEGIN_STMT
|
|
_2 = reentry_guard_UART_EXCLUSIVE_AREA_01[u32CoreId];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
_3 = Uart_schm_read_msr ();
|
|
msr_UART_EXCLUSIVE_AREA_01[u32CoreId] = _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 = msr_UART_EXCLUSIVE_AREA_01[u32CoreId];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 4>; [INV]
|
|
else
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> :
|
|
# DEBUG BEGIN_STMT
|
|
_6 = reentry_guard_UART_EXCLUSIVE_AREA_01[u32CoreId];
|
|
_7 = _6 + 1;
|
|
reentry_guard_UART_EXCLUSIVE_AREA_01[u32CoreId] = _7;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Uart_UART_EXCLUSIVE_AREA_00 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId = (uint32) _1;
|
|
# DEBUG BEGIN_STMT
|
|
_2 = reentry_guard_UART_EXCLUSIVE_AREA_00[u32CoreId];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_UART_EXCLUSIVE_AREA_00[u32CoreId] = _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 = msr_UART_EXCLUSIVE_AREA_00[u32CoreId];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 3> :
|
|
_6 = reentry_guard_UART_EXCLUSIVE_AREA_00[u32CoreId];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [INV]
|
|
else
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> :
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Uart_UART_EXCLUSIVE_AREA_00 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId = (uint32) _1;
|
|
# DEBUG BEGIN_STMT
|
|
_2 = reentry_guard_UART_EXCLUSIVE_AREA_00[u32CoreId];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
_3 = Uart_schm_read_msr ();
|
|
msr_UART_EXCLUSIVE_AREA_00[u32CoreId] = _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 = msr_UART_EXCLUSIVE_AREA_00[u32CoreId];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 4>; [INV]
|
|
else
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> :
|
|
# DEBUG BEGIN_STMT
|
|
_6 = reentry_guard_UART_EXCLUSIVE_AREA_00[u32CoreId];
|
|
_7 = _6 + 1;
|
|
reentry_guard_UART_EXCLUSIVE_AREA_00[u32CoreId] = _7;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Uart_schm_read_msr ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 D.4210;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp);
|
|
# DEBUG BEGIN_STMT
|
|
D.4210 = reg_tmp;
|
|
return D.4210;
|
|
|
|
}
|
|
|
|
|