mirror of
https://github.com/Dev-KATECH/ADM.git
synced 2026-05-17 18:03:59 +09:00
3522 lines
90 KiB
Plaintext
3522 lines
90 KiB
Plaintext
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Marking local functions: Lpuart_Uart_Ip_GetData Lpuart_Uart_Ip_PutData Lpuart_Uart_Ip_CompleteReceiveDataUsingInt Lpuart_Uart_Ip_StartReceiveDataUsingInt Lpuart_Uart_Ip_CompleteSendDataUsingInt Lpuart_Uart_Ip_StartSendDataUsingInt Lpuart_Uart_Ip_ErrIrqHandler Lpuart_Uart_Ip_TxCompleteIrqHandler Lpuart_Uart_Ip_TxEmptyIrqHandler Lpuart_Uart_Ip_RxIrqHandler Lpuart_Uart_Ip_StartGetData DevAssert LPUART_Uart_FlushRxBuffer LPUART_Uart_FlushTxBuffer LPUART_Uart_CheckTimeout LPUART_Uart_ClearErrorFlags LPUART_Uart_ClearStatusFlag LPUART_Uart_GetStatusFlag LPUART_Uart_Getchar10 LPUART_Uart_Getchar9 LPUART_Uart_Getchar LPUART_Uart_Putchar10 LPUART_Uart_Putchar9 LPUART_Uart_Putchar LPUART_Uart_GetIntMode LPUART_Uart_SetIntMode LPUART_Uart_SetStopBitCount LPUART_Uart_SetParityMode LPUART_Uart_SetBitCountPerChar LPUART_Uart_EnableBothEdgeSamplingCmd LPUART_Uart_SetOversamplingRatio LPUART_Uart_SetBaudRateDivisor LPUART_Uart_SetReceiverCmd LPUART_Uart_SetTransmitterCmd LPUART_Uart_Init
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Marking externally visible functions: Lpuart_Uart_Ip_IRQHandler Lpuart_Uart_Ip_SetRxBuffer Lpuart_Uart_Ip_SetTxBuffer Lpuart_Uart_Ip_GetBaudRate Lpuart_Uart_Ip_SetBaudRate Lpuart_Uart_Ip_AbortReceivingData Lpuart_Uart_Ip_GetReceiveStatus Lpuart_Uart_Ip_AsyncReceive Lpuart_Uart_Ip_SyncReceive Lpuart_Uart_Ip_AbortSendingData Lpuart_Uart_Ip_GetTransmitStatus Lpuart_Uart_Ip_AsyncSend Lpuart_Uart_Ip_SyncSend Lpuart_Uart_Ip_Deinit Lpuart_Uart_Ip_Init
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Marking externally visible variables: Lpuart_Uart_Ip_apUserConfig Lpuart_Uart_Ip_apStateStructure
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Reclaiming functions:
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Reclaiming variables:
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Clearing address taken flags:
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Symbol table:
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SchM_Exit_Uart_UART_EXCLUSIVE_AREA_03/66 (SchM_Exit_Uart_UART_EXCLUSIVE_AREA_03) @06cb9380
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: Lpuart_Uart_Ip_AsyncReceive/38 Lpuart_Uart_Ip_AsyncReceive/38
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Calls:
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SchM_Enter_Uart_UART_EXCLUSIVE_AREA_03/65 (SchM_Enter_Uart_UART_EXCLUSIVE_AREA_03) @06cb92a0
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: Lpuart_Uart_Ip_AsyncReceive/38
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Calls:
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OsIf_GetElapsed/64 (OsIf_GetElapsed) @06ca0a80
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: Lpuart_Uart_Ip_SyncReceive/36
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Calls:
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SchM_Exit_Uart_UART_EXCLUSIVE_AREA_02/63 (SchM_Exit_Uart_UART_EXCLUSIVE_AREA_02) @06ca09a0
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: Lpuart_Uart_Ip_SyncReceive/36 Lpuart_Uart_Ip_SyncReceive/36
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Calls:
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SchM_Enter_Uart_UART_EXCLUSIVE_AREA_02/62 (SchM_Enter_Uart_UART_EXCLUSIVE_AREA_02) @06ca08c0
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: Lpuart_Uart_Ip_SyncReceive/36
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Calls:
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SchM_Exit_Uart_UART_EXCLUSIVE_AREA_01/61 (SchM_Exit_Uart_UART_EXCLUSIVE_AREA_01) @06ca02a0
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: Lpuart_Uart_Ip_AsyncSend/33 Lpuart_Uart_Ip_AsyncSend/33
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Calls:
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SchM_Enter_Uart_UART_EXCLUSIVE_AREA_01/60 (SchM_Enter_Uart_UART_EXCLUSIVE_AREA_01) @06ca01c0
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: Lpuart_Uart_Ip_AsyncSend/33
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Calls:
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SchM_Exit_Uart_UART_EXCLUSIVE_AREA_00/59 (SchM_Exit_Uart_UART_EXCLUSIVE_AREA_00) @06c79b60
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: Lpuart_Uart_Ip_SyncSend/32 Lpuart_Uart_Ip_SyncSend/32
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Calls:
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SchM_Enter_Uart_UART_EXCLUSIVE_AREA_00/58 (SchM_Enter_Uart_UART_EXCLUSIVE_AREA_00) @06c79a80
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: Lpuart_Uart_Ip_SyncSend/32
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Calls:
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OsIf_MicrosToTicks/57 (OsIf_MicrosToTicks) @06c797e0
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: Lpuart_Uart_Ip_SyncReceive/36 LPUART_Uart_CheckTimeout/22
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Calls:
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OsIf_GetCounter/56 (OsIf_GetCounter) @06c79540
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: Lpuart_Uart_Ip_SyncReceive/36 Lpuart_Uart_Ip_SyncSend/32 LPUART_Uart_CheckTimeout/22 Lpuart_Uart_Ip_Deinit/31
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Calls:
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Lpuart_Uart_Ip_GetData/55 (Lpuart_Uart_Ip_GetData) @06c6ad20
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Type: function definition analyzed
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Visibility: prevailing_def_ironly
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References: Lpuart_Uart_Ip_apBases/29 (read)Lpuart_Uart_Ip_apStateStructuresArray/27 (read)Lpuart_Uart_Ip_apUserConfig/28 (read)
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Referring:
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Availability: local
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Function flags: body local optimize_size
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Called by: Lpuart_Uart_Ip_RxIrqHandler/46 Lpuart_Uart_Ip_StartGetData/37
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Calls: LPUART_Uart_Getchar10/18 LPUART_Uart_Getchar9/17 LPUART_Uart_Getchar/16
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Lpuart_Uart_Ip_PutData/54 (Lpuart_Uart_Ip_PutData) @06c6aa80
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Type: function definition analyzed
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Visibility: prevailing_def_ironly
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References: Lpuart_Uart_Ip_apBases/29 (read)Lpuart_Uart_Ip_apStateStructuresArray/27 (read)Lpuart_Uart_Ip_apUserConfig/28 (read)
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Referring:
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Availability: local
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Function flags: body local optimize_size
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Called by: Lpuart_Uart_Ip_TxEmptyIrqHandler/47 Lpuart_Uart_Ip_SyncSend/32
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Calls: LPUART_Uart_Putchar10/15 LPUART_Uart_Putchar9/14 LPUART_Uart_Putchar/13
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Lpuart_Uart_Ip_CompleteReceiveDataUsingInt/53 (Lpuart_Uart_Ip_CompleteReceiveDataUsingInt) @06c6a7e0
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Type: function definition analyzed
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Visibility: prevailing_def_ironly
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References: Lpuart_Uart_Ip_apBases/29 (read)Lpuart_Uart_Ip_apStateStructuresArray/27 (read)
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Referring:
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Availability: local
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Function flags: body local optimize_size
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Called by: Lpuart_Uart_Ip_RxIrqHandler/46 Lpuart_Uart_Ip_ErrIrqHandler/49 Lpuart_Uart_Ip_AbortReceivingData/40
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Calls: LPUART_Uart_Getchar/16 LPUART_Uart_SetIntMode/11 LPUART_Uart_SetIntMode/11 LPUART_Uart_SetIntMode/11 LPUART_Uart_SetIntMode/11 LPUART_Uart_SetIntMode/11 LPUART_Uart_SetReceiverCmd/2
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Lpuart_Uart_Ip_StartReceiveDataUsingInt/52 (Lpuart_Uart_Ip_StartReceiveDataUsingInt) @06c6a540
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Type: function definition analyzed
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Visibility: prevailing_def_ironly
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References: Lpuart_Uart_Ip_apBases/29 (read)Lpuart_Uart_Ip_apStateStructuresArray/27 (read)
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Referring:
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Availability: local
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Function flags: body local optimize_size
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Called by: Lpuart_Uart_Ip_AsyncReceive/38
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Calls: LPUART_Uart_SetIntMode/11 LPUART_Uart_SetIntMode/11 LPUART_Uart_SetIntMode/11 LPUART_Uart_SetIntMode/11 LPUART_Uart_SetIntMode/11 LPUART_Uart_SetReceiverCmd/2 LPUART_Uart_FlushRxBuffer/24 LPUART_Uart_ClearErrorFlags/21
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Lpuart_Uart_Ip_CompleteSendDataUsingInt/51 (Lpuart_Uart_Ip_CompleteSendDataUsingInt) @06c6a2a0
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Type: function definition analyzed
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Visibility: prevailing_def_ironly
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References: Lpuart_Uart_Ip_apBases/29 (read)Lpuart_Uart_Ip_apStateStructuresArray/27 (read)
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Referring:
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Availability: local
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Function flags: body local optimize_size
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Called by: Lpuart_Uart_Ip_TxCompleteIrqHandler/48 Lpuart_Uart_Ip_AbortSendingData/35
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Calls: LPUART_Uart_SetTransmitterCmd/1 LPUART_Uart_SetIntMode/11 LPUART_Uart_SetIntMode/11
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Lpuart_Uart_Ip_StartSendDataUsingInt/50 (Lpuart_Uart_Ip_StartSendDataUsingInt) @06c6a000
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Type: function definition analyzed
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Visibility: prevailing_def_ironly
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References: Lpuart_Uart_Ip_apBases/29 (read)Lpuart_Uart_Ip_apStateStructuresArray/27 (read)
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Referring:
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Availability: local
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Function flags: body local optimize_size
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Called by: Lpuart_Uart_Ip_AsyncSend/33
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Calls: LPUART_Uart_SetIntMode/11 LPUART_Uart_SetTransmitterCmd/1
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Lpuart_Uart_Ip_ErrIrqHandler/49 (Lpuart_Uart_Ip_ErrIrqHandler) @06c5fb60
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Type: function definition analyzed
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Visibility: prevailing_def_ironly
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References: Lpuart_Uart_Ip_apBases/29 (read)Lpuart_Uart_Ip_apStateStructuresArray/27 (read)Lpuart_Uart_Ip_apUserConfig/28 (read)
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Referring:
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Availability: local
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Function flags: body local optimize_size
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Called by: Lpuart_Uart_Ip_IRQHandler/45
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Calls: Lpuart_Uart_Ip_CompleteReceiveDataUsingInt/53 LPUART_Uart_GetIntMode/12 LPUART_Uart_ClearStatusFlag/20 LPUART_Uart_GetStatusFlag/19 LPUART_Uart_GetIntMode/12 LPUART_Uart_ClearStatusFlag/20 LPUART_Uart_GetStatusFlag/19 LPUART_Uart_GetIntMode/12 LPUART_Uart_ClearStatusFlag/20 LPUART_Uart_GetStatusFlag/19 LPUART_Uart_GetIntMode/12 LPUART_Uart_ClearStatusFlag/20 LPUART_Uart_GetStatusFlag/19
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Indirect call
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Lpuart_Uart_Ip_TxCompleteIrqHandler/48 (Lpuart_Uart_Ip_TxCompleteIrqHandler) @06c5f620
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Type: function definition analyzed
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Visibility: prevailing_def_ironly
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References: Lpuart_Uart_Ip_apStateStructuresArray/27 (read)Lpuart_Uart_Ip_apUserConfig/28 (read)
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Referring:
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Availability: local
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Function flags: body local optimize_size
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Called by: Lpuart_Uart_Ip_IRQHandler/45
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Calls: Lpuart_Uart_Ip_CompleteSendDataUsingInt/51
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Indirect call
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Lpuart_Uart_Ip_TxEmptyIrqHandler/47 (Lpuart_Uart_Ip_TxEmptyIrqHandler) @06c5f0e0
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Type: function definition analyzed
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Visibility: prevailing_def_ironly
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References: Lpuart_Uart_Ip_apBases/29 (read)Lpuart_Uart_Ip_apStateStructuresArray/27 (read)Lpuart_Uart_Ip_apUserConfig/28 (read)
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Referring:
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Availability: local
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Function flags: body local optimize_size
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Called by: Lpuart_Uart_Ip_IRQHandler/45
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Calls: LPUART_Uart_SetIntMode/11 LPUART_Uart_SetIntMode/11 Lpuart_Uart_Ip_PutData/54
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Indirect call
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Lpuart_Uart_Ip_RxIrqHandler/46 (Lpuart_Uart_Ip_RxIrqHandler) @06c5fd20
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Type: function definition analyzed
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Visibility: prevailing_def_ironly
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References: Lpuart_Uart_Ip_apStateStructuresArray/27 (read)Lpuart_Uart_Ip_apUserConfig/28 (read)
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Referring:
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Availability: local
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Function flags: body local optimize_size
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Called by: Lpuart_Uart_Ip_IRQHandler/45
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Calls: Lpuart_Uart_Ip_CompleteReceiveDataUsingInt/53 Lpuart_Uart_Ip_GetData/55
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Indirect call
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Indirect call
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Lpuart_Uart_Ip_IRQHandler/45 (Lpuart_Uart_Ip_IRQHandler) @06c5fa80
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Type: function definition analyzed
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Visibility: externally_visible public
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References: Lpuart_Uart_Ip_apBases/29 (read)Lpuart_Uart_Ip_apStateStructuresArray/27 (read)
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Referring:
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Availability: available
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Function flags: body optimize_size
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Called by:
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Calls: Lpuart_Uart_Ip_TxCompleteIrqHandler/48 LPUART_Uart_GetIntMode/12 LPUART_Uart_GetStatusFlag/19 Lpuart_Uart_Ip_TxEmptyIrqHandler/47 LPUART_Uart_GetIntMode/12 LPUART_Uart_GetStatusFlag/19 LPUART_Uart_Getchar/16 Lpuart_Uart_Ip_RxIrqHandler/46 LPUART_Uart_GetIntMode/12 LPUART_Uart_GetStatusFlag/19 Lpuart_Uart_Ip_ErrIrqHandler/49 LPUART_Uart_ClearErrorFlags/21 LPUART_Uart_Getchar/16 DevAssert/25
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Lpuart_Uart_Ip_SetRxBuffer/44 (Lpuart_Uart_Ip_SetRxBuffer) @06c5f7e0
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Type: function definition analyzed
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Visibility: externally_visible public
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References: Lpuart_Uart_Ip_apStateStructuresArray/27 (read)
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Referring:
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Availability: available
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Function flags: body optimize_size
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Called by:
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Calls: DevAssert/25 DevAssert/25 DevAssert/25
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Lpuart_Uart_Ip_SetTxBuffer/43 (Lpuart_Uart_Ip_SetTxBuffer) @06c5f540
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Type: function definition analyzed
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Visibility: externally_visible public
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References: Lpuart_Uart_Ip_apStateStructuresArray/27 (read)
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Referring:
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Availability: available
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Function flags: body optimize_size
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Called by:
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Calls: DevAssert/25 DevAssert/25 DevAssert/25
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Lpuart_Uart_Ip_GetBaudRate/42 (Lpuart_Uart_Ip_GetBaudRate) @06c5f2a0
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Type: function definition analyzed
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Visibility: externally_visible public
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References: Lpuart_Uart_Ip_apStateStructuresArray/27 (read)
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Referring:
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Availability: available
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Function flags: body optimize_size
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Called by:
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Calls: DevAssert/25 DevAssert/25
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Lpuart_Uart_Ip_SetBaudRate/41 (Lpuart_Uart_Ip_SetBaudRate) @06c5f000
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Type: function definition analyzed
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Visibility: externally_visible public
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References: Lpuart_Uart_Ip_apBases/29 (read)Lpuart_Uart_Ip_apStateStructuresArray/27 (read)
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Referring:
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Availability: available
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Function flags: body optimize_size
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Called by:
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Calls: LPUART_Uart_SetBaudRateDivisor/3 LPUART_Uart_SetOversamplingRatio/5 LPUART_Uart_EnableBothEdgeSamplingCmd/7 DevAssert/25 DevAssert/25 DevAssert/25
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Lpuart_Uart_Ip_AbortReceivingData/40 (Lpuart_Uart_Ip_AbortReceivingData) @06b7f9a0
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Type: function definition analyzed
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Visibility: externally_visible public
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References: Lpuart_Uart_Ip_apBases/29 (read)Lpuart_Uart_Ip_apStateStructuresArray/27 (read)Lpuart_Uart_Ip_apUserConfig/28 (read)
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Referring:
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Availability: available
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Function flags: body optimize_size
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Called by:
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Calls: LPUART_Uart_FlushRxBuffer/24 LPUART_Uart_ClearErrorFlags/21 Lpuart_Uart_Ip_CompleteReceiveDataUsingInt/53 DevAssert/25 DevAssert/25 DevAssert/25
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Lpuart_Uart_Ip_GetReceiveStatus/39 (Lpuart_Uart_Ip_GetReceiveStatus) @06b7f460
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Type: function definition analyzed
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Visibility: externally_visible public
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References: Lpuart_Uart_Ip_apStateStructuresArray/27 (read)Lpuart_Uart_Ip_apUserConfig/28 (read)
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Referring:
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Availability: available
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Function flags: body optimize_size
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Called by:
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Calls: DevAssert/25 DevAssert/25 DevAssert/25
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Lpuart_Uart_Ip_AsyncReceive/38 (Lpuart_Uart_Ip_AsyncReceive) @06b7fee0
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Type: function definition analyzed
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Visibility: externally_visible public
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References: Lpuart_Uart_Ip_apUserConfig/28 (read)Lpuart_Uart_Ip_apStateStructuresArray/27 (read)
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Referring:
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Availability: available
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Function flags: body optimize_size
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Called by:
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Calls: Lpuart_Uart_Ip_StartReceiveDataUsingInt/52 DevAssert/25 DevAssert/25 SchM_Exit_Uart_UART_EXCLUSIVE_AREA_03/66 SchM_Exit_Uart_UART_EXCLUSIVE_AREA_03/66 SchM_Enter_Uart_UART_EXCLUSIVE_AREA_03/65 DevAssert/25 DevAssert/25 DevAssert/25 DevAssert/25
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Lpuart_Uart_Ip_StartGetData/37 (Lpuart_Uart_Ip_StartGetData) @06b7fb60
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Type: function definition analyzed
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Visibility: prevailing_def_ironly
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References: Lpuart_Uart_Ip_apStateStructuresArray/27 (read)
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Referring:
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Availability: local
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Function flags: body local optimize_size
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Called by: Lpuart_Uart_Ip_SyncReceive/36
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Calls: LPUART_Uart_CheckTimeout/22 Lpuart_Uart_Ip_GetData/55 LPUART_Uart_ClearStatusFlag/20 LPUART_Uart_SetReceiverCmd/2 LPUART_Uart_GetStatusFlag/19 LPUART_Uart_ClearStatusFlag/20 LPUART_Uart_SetReceiverCmd/2 LPUART_Uart_GetStatusFlag/19 LPUART_Uart_ClearStatusFlag/20 LPUART_Uart_SetReceiverCmd/2 LPUART_Uart_GetStatusFlag/19 LPUART_Uart_ClearStatusFlag/20 LPUART_Uart_SetReceiverCmd/2 LPUART_Uart_GetStatusFlag/19 LPUART_Uart_CheckTimeout/22 LPUART_Uart_GetStatusFlag/19
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Lpuart_Uart_Ip_SyncReceive/36 (Lpuart_Uart_Ip_SyncReceive) @06b7f8c0
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Type: function definition analyzed
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Visibility: externally_visible public
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References: Lpuart_Uart_Ip_apBases/29 (read)Lpuart_Uart_Ip_apStateStructuresArray/27 (read)
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Referring:
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Availability: available
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Function flags: body optimize_size
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Called by:
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Calls: LPUART_Uart_Getchar/16 LPUART_Uart_SetReceiverCmd/2 OsIf_MicrosToTicks/57 OsIf_GetElapsed/64 Lpuart_Uart_Ip_StartGetData/37 OsIf_GetCounter/56 LPUART_Uart_SetReceiverCmd/2 LPUART_Uart_SetIntMode/11 SchM_Exit_Uart_UART_EXCLUSIVE_AREA_02/63 SchM_Exit_Uart_UART_EXCLUSIVE_AREA_02/63 SchM_Enter_Uart_UART_EXCLUSIVE_AREA_02/62 DevAssert/25 DevAssert/25 DevAssert/25 DevAssert/25
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Lpuart_Uart_Ip_AbortSendingData/35 (Lpuart_Uart_Ip_AbortSendingData) @06b7f620
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Type: function definition analyzed
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Visibility: externally_visible public
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References: Lpuart_Uart_Ip_apBases/29 (read)Lpuart_Uart_Ip_apStateStructuresArray/27 (read)Lpuart_Uart_Ip_apUserConfig/28 (read)
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Referring:
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Availability: available
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Function flags: body optimize_size
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Called by:
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Calls: LPUART_Uart_FlushTxBuffer/23 Lpuart_Uart_Ip_CompleteSendDataUsingInt/51 DevAssert/25 DevAssert/25 DevAssert/25
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Lpuart_Uart_Ip_GetTransmitStatus/34 (Lpuart_Uart_Ip_GetTransmitStatus) @06b7f380
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Type: function definition analyzed
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Visibility: externally_visible public
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References: Lpuart_Uart_Ip_apStateStructuresArray/27 (read)Lpuart_Uart_Ip_apUserConfig/28 (read)
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Referring:
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Availability: available
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Function flags: body optimize_size
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Called by:
|
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Calls: DevAssert/25 DevAssert/25 DevAssert/25
|
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Lpuart_Uart_Ip_AsyncSend/33 (Lpuart_Uart_Ip_AsyncSend) @06b7f0e0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
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References: Lpuart_Uart_Ip_apUserConfig/28 (read)Lpuart_Uart_Ip_apStateStructuresArray/27 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: body optimize_size
|
|
Called by:
|
|
Calls: Lpuart_Uart_Ip_StartSendDataUsingInt/50 DevAssert/25 DevAssert/25 SchM_Exit_Uart_UART_EXCLUSIVE_AREA_01/61 SchM_Exit_Uart_UART_EXCLUSIVE_AREA_01/61 SchM_Enter_Uart_UART_EXCLUSIVE_AREA_01/60 DevAssert/25 DevAssert/25 DevAssert/25 DevAssert/25
|
|
Lpuart_Uart_Ip_SyncSend/32 (Lpuart_Uart_Ip_SyncSend) @06a75b60
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: Lpuart_Uart_Ip_apBases/29 (read)Lpuart_Uart_Ip_apStateStructuresArray/27 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: body optimize_size
|
|
Called by:
|
|
Calls: LPUART_Uart_SetTransmitterCmd/1 LPUART_Uart_CheckTimeout/22 LPUART_Uart_CheckTimeout/22 LPUART_Uart_GetStatusFlag/19 Lpuart_Uart_Ip_PutData/54 OsIf_GetCounter/56 LPUART_Uart_SetTransmitterCmd/1 LPUART_Uart_SetIntMode/11 LPUART_Uart_SetIntMode/11 SchM_Exit_Uart_UART_EXCLUSIVE_AREA_00/59 SchM_Exit_Uart_UART_EXCLUSIVE_AREA_00/59 SchM_Enter_Uart_UART_EXCLUSIVE_AREA_00/58 DevAssert/25 DevAssert/25 DevAssert/25 DevAssert/25
|
|
Lpuart_Uart_Ip_Deinit/31 (Lpuart_Uart_Ip_Deinit) @06a75e00
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: Lpuart_Uart_Ip_apBases/29 (read)Lpuart_Uart_Ip_apStateStructuresArray/27 (read)Lpuart_Uart_Ip_apStateStructuresArray/27 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: body optimize_size
|
|
Called by:
|
|
Calls: LPUART_Uart_SetIntMode/11 LPUART_Uart_SetIntMode/11 LPUART_Uart_SetIntMode/11 LPUART_Uart_SetIntMode/11 LPUART_Uart_SetIntMode/11 LPUART_Uart_SetIntMode/11 LPUART_Uart_SetIntMode/11 LPUART_Uart_CheckTimeout/22 LPUART_Uart_GetStatusFlag/19 OsIf_GetCounter/56 DevAssert/25 DevAssert/25
|
|
Lpuart_Uart_Ip_Init/30 (Lpuart_Uart_Ip_Init) @06a75a80
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: Lpuart_Uart_Ip_apStateStructuresArray/27 (read)Lpuart_Uart_Ip_apBases/29 (read)Lpuart_Uart_Ip_apStateStructuresArray/27 (write)Lpuart_Uart_Ip_apStateStructuresArray/27 (read)Lpuart_Uart_Ip_apUserConfig/28 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: body optimize_size
|
|
Called by:
|
|
Calls: LPUART_Uart_SetStopBitCount/10 LPUART_Uart_SetParityMode/9 LPUART_Uart_SetBitCountPerChar/8 LPUART_Uart_SetBitCountPerChar/8 LPUART_Uart_SetBaudRateDivisor/3 LPUART_Uart_SetOversamplingRatio/5 LPUART_Uart_EnableBothEdgeSamplingCmd/7 LPUART_Uart_Init/0 DevAssert/25 DevAssert/25 DevAssert/25 DevAssert/25 DevAssert/25 DevAssert/25
|
|
Lpuart_Uart_Ip_apBases/29 (Lpuart_Uart_Ip_apBases) @06a6f3f0
|
|
Type: variable definition analyzed
|
|
Visibility: prevailing_def_ironly
|
|
References:
|
|
Referring: Lpuart_Uart_Ip_Init/30 (read)Lpuart_Uart_Ip_Deinit/31 (read)Lpuart_Uart_Ip_SyncSend/32 (read)Lpuart_Uart_Ip_PutData/54 (read)Lpuart_Uart_Ip_StartSendDataUsingInt/50 (read)Lpuart_Uart_Ip_AbortSendingData/35 (read)Lpuart_Uart_Ip_CompleteSendDataUsingInt/51 (read)Lpuart_Uart_Ip_SyncReceive/36 (read)Lpuart_Uart_Ip_GetData/55 (read)Lpuart_Uart_Ip_StartReceiveDataUsingInt/52 (read)Lpuart_Uart_Ip_AbortReceivingData/40 (read)Lpuart_Uart_Ip_CompleteReceiveDataUsingInt/53 (read)Lpuart_Uart_Ip_SetBaudRate/41 (read)Lpuart_Uart_Ip_IRQHandler/45 (read)Lpuart_Uart_Ip_ErrIrqHandler/49 (read)Lpuart_Uart_Ip_TxEmptyIrqHandler/47 (read)
|
|
Availability: available
|
|
Varpool flags: initialized read-only const-value-known
|
|
Lpuart_Uart_Ip_apUserConfig/28 (Lpuart_Uart_Ip_apUserConfig) @06a6f318
|
|
Type: variable definition analyzed
|
|
Visibility: externally_visible public
|
|
References:
|
|
Referring: Lpuart_Uart_Ip_Init/30 (write)Lpuart_Uart_Ip_PutData/54 (read)Lpuart_Uart_Ip_AsyncSend/33 (read)Lpuart_Uart_Ip_GetTransmitStatus/34 (read)Lpuart_Uart_Ip_AbortSendingData/35 (read)Lpuart_Uart_Ip_GetData/55 (read)Lpuart_Uart_Ip_AsyncReceive/38 (read)Lpuart_Uart_Ip_GetReceiveStatus/39 (read)Lpuart_Uart_Ip_AbortReceivingData/40 (read)Lpuart_Uart_Ip_ErrIrqHandler/49 (read)Lpuart_Uart_Ip_RxIrqHandler/46 (read)Lpuart_Uart_Ip_TxEmptyIrqHandler/47 (read)Lpuart_Uart_Ip_TxCompleteIrqHandler/48 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
Lpuart_Uart_Ip_apStateStructuresArray/27 (Lpuart_Uart_Ip_apStateStructuresArray) @06a6f288
|
|
Type: variable definition analyzed
|
|
Visibility: prevailing_def_ironly
|
|
References:
|
|
Referring: Lpuart_Uart_Ip_Init/30 (read)Lpuart_Uart_Ip_Init/30 (write)Lpuart_Uart_Ip_Init/30 (read)Lpuart_Uart_Ip_Deinit/31 (read)Lpuart_Uart_Ip_Deinit/31 (write)Lpuart_Uart_Ip_SyncSend/32 (read)Lpuart_Uart_Ip_PutData/54 (read)Lpuart_Uart_Ip_AsyncSend/33 (read)Lpuart_Uart_Ip_StartSendDataUsingInt/50 (read)Lpuart_Uart_Ip_GetTransmitStatus/34 (read)Lpuart_Uart_Ip_AbortSendingData/35 (read)Lpuart_Uart_Ip_CompleteSendDataUsingInt/51 (read)Lpuart_Uart_Ip_SyncReceive/36 (read)Lpuart_Uart_Ip_StartGetData/37 (read)Lpuart_Uart_Ip_GetData/55 (read)Lpuart_Uart_Ip_AsyncReceive/38 (read)Lpuart_Uart_Ip_StartReceiveDataUsingInt/52 (read)Lpuart_Uart_Ip_GetReceiveStatus/39 (read)Lpuart_Uart_Ip_AbortReceivingData/40 (read)Lpuart_Uart_Ip_CompleteReceiveDataUsingInt/53 (read)Lpuart_Uart_Ip_SetBaudRate/41 (read)Lpuart_Uart_Ip_GetBaudRate/42 (read)Lpuart_Uart_Ip_SetTxBuffer/43 (read)Lpuart_Uart_Ip_SetRxBuffer/44 (read)Lpuart_Uart_Ip_IRQHandler/45 (read)Lpuart_Uart_Ip_ErrIrqHandler/49 (read)Lpuart_Uart_Ip_RxIrqHandler/46 (read)Lpuart_Uart_Ip_TxEmptyIrqHandler/47 (read)Lpuart_Uart_Ip_TxCompleteIrqHandler/48 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
Lpuart_Uart_Ip_apStateStructure/26 (Lpuart_Uart_Ip_apStateStructure) @06a6f1f8
|
|
Type: variable definition analyzed
|
|
Visibility: externally_visible public
|
|
References:
|
|
Referring:
|
|
Availability: available
|
|
Varpool flags:
|
|
DevAssert/25 (DevAssert) @06a6bb60
|
|
Type: function definition analyzed
|
|
Visibility: prevailing_def_ironly
|
|
References:
|
|
Referring:
|
|
Availability: local
|
|
Function flags: body local optimize_size
|
|
Called by: Lpuart_Uart_Ip_IRQHandler/45 Lpuart_Uart_Ip_SetRxBuffer/44 Lpuart_Uart_Ip_SetRxBuffer/44 Lpuart_Uart_Ip_SetRxBuffer/44 Lpuart_Uart_Ip_SetTxBuffer/43 Lpuart_Uart_Ip_SetTxBuffer/43 Lpuart_Uart_Ip_SetTxBuffer/43 Lpuart_Uart_Ip_GetBaudRate/42 Lpuart_Uart_Ip_GetBaudRate/42 Lpuart_Uart_Ip_SetBaudRate/41 Lpuart_Uart_Ip_SetBaudRate/41 Lpuart_Uart_Ip_SetBaudRate/41 Lpuart_Uart_Ip_AbortReceivingData/40 Lpuart_Uart_Ip_AbortReceivingData/40 Lpuart_Uart_Ip_AbortReceivingData/40 Lpuart_Uart_Ip_GetReceiveStatus/39 Lpuart_Uart_Ip_GetReceiveStatus/39 Lpuart_Uart_Ip_GetReceiveStatus/39 Lpuart_Uart_Ip_AsyncReceive/38 Lpuart_Uart_Ip_AsyncReceive/38 Lpuart_Uart_Ip_AsyncReceive/38 Lpuart_Uart_Ip_AsyncReceive/38 Lpuart_Uart_Ip_AsyncReceive/38 Lpuart_Uart_Ip_AsyncReceive/38 Lpuart_Uart_Ip_SyncReceive/36 Lpuart_Uart_Ip_SyncReceive/36 Lpuart_Uart_Ip_SyncReceive/36 Lpuart_Uart_Ip_SyncReceive/36 Lpuart_Uart_Ip_AbortSendingData/35 Lpuart_Uart_Ip_AbortSendingData/35 Lpuart_Uart_Ip_AbortSendingData/35 Lpuart_Uart_Ip_GetTransmitStatus/34 Lpuart_Uart_Ip_GetTransmitStatus/34 Lpuart_Uart_Ip_GetTransmitStatus/34 Lpuart_Uart_Ip_AsyncSend/33 Lpuart_Uart_Ip_AsyncSend/33 Lpuart_Uart_Ip_AsyncSend/33 Lpuart_Uart_Ip_AsyncSend/33 Lpuart_Uart_Ip_AsyncSend/33 Lpuart_Uart_Ip_AsyncSend/33 Lpuart_Uart_Ip_SyncSend/32 Lpuart_Uart_Ip_SyncSend/32 Lpuart_Uart_Ip_SyncSend/32 Lpuart_Uart_Ip_SyncSend/32 Lpuart_Uart_Ip_Deinit/31 Lpuart_Uart_Ip_Deinit/31 Lpuart_Uart_Ip_Init/30 Lpuart_Uart_Ip_Init/30 Lpuart_Uart_Ip_Init/30 Lpuart_Uart_Ip_Init/30 Lpuart_Uart_Ip_Init/30 Lpuart_Uart_Ip_Init/30
|
|
Calls:
|
|
LPUART_Uart_FlushRxBuffer/24 (LPUART_Uart_FlushRxBuffer) @06a26ee0
|
|
Type: function definition analyzed
|
|
Visibility: prevailing_def_ironly
|
|
References:
|
|
Referring:
|
|
Availability: local
|
|
Function flags: body local optimize_size
|
|
Called by: Lpuart_Uart_Ip_AbortReceivingData/40 Lpuart_Uart_Ip_StartReceiveDataUsingInt/52
|
|
Calls:
|
|
LPUART_Uart_FlushTxBuffer/23 (LPUART_Uart_FlushTxBuffer) @06a26c40
|
|
Type: function definition analyzed
|
|
Visibility: prevailing_def_ironly
|
|
References:
|
|
Referring:
|
|
Availability: local
|
|
Function flags: body local optimize_size
|
|
Called by: Lpuart_Uart_Ip_AbortSendingData/35
|
|
Calls:
|
|
LPUART_Uart_CheckTimeout/22 (LPUART_Uart_CheckTimeout) @06a269a0
|
|
Type: function definition analyzed
|
|
Visibility: prevailing_def_ironly
|
|
References:
|
|
Referring:
|
|
Availability: local
|
|
Function flags: body local optimize_size
|
|
Called by: Lpuart_Uart_Ip_StartGetData/37 Lpuart_Uart_Ip_StartGetData/37 Lpuart_Uart_Ip_SyncSend/32 Lpuart_Uart_Ip_SyncSend/32 Lpuart_Uart_Ip_Deinit/31
|
|
Calls: OsIf_GetCounter/56 OsIf_MicrosToTicks/57
|
|
LPUART_Uart_ClearErrorFlags/21 (LPUART_Uart_ClearErrorFlags) @06a26700
|
|
Type: function definition analyzed
|
|
Visibility: prevailing_def_ironly
|
|
References:
|
|
Referring:
|
|
Availability: local
|
|
Function flags: body local optimize_size
|
|
Called by: Lpuart_Uart_Ip_IRQHandler/45 Lpuart_Uart_Ip_AbortReceivingData/40 Lpuart_Uart_Ip_StartReceiveDataUsingInt/52
|
|
Calls:
|
|
LPUART_Uart_ClearStatusFlag/20 (LPUART_Uart_ClearStatusFlag) @06a26460
|
|
Type: function definition analyzed
|
|
Visibility: prevailing_def_ironly
|
|
References:
|
|
Referring:
|
|
Availability: local
|
|
Function flags: body local optimize_size
|
|
Called by: Lpuart_Uart_Ip_ErrIrqHandler/49 Lpuart_Uart_Ip_ErrIrqHandler/49 Lpuart_Uart_Ip_ErrIrqHandler/49 Lpuart_Uart_Ip_ErrIrqHandler/49 Lpuart_Uart_Ip_StartGetData/37 Lpuart_Uart_Ip_StartGetData/37 Lpuart_Uart_Ip_StartGetData/37 Lpuart_Uart_Ip_StartGetData/37
|
|
Calls:
|
|
LPUART_Uart_GetStatusFlag/19 (LPUART_Uart_GetStatusFlag) @06a261c0
|
|
Type: function definition analyzed
|
|
Visibility: prevailing_def_ironly
|
|
References:
|
|
Referring:
|
|
Availability: local
|
|
Function flags: body local optimize_size
|
|
Called by: Lpuart_Uart_Ip_ErrIrqHandler/49 Lpuart_Uart_Ip_ErrIrqHandler/49 Lpuart_Uart_Ip_ErrIrqHandler/49 Lpuart_Uart_Ip_ErrIrqHandler/49 Lpuart_Uart_Ip_IRQHandler/45 Lpuart_Uart_Ip_IRQHandler/45 Lpuart_Uart_Ip_IRQHandler/45 Lpuart_Uart_Ip_StartGetData/37 Lpuart_Uart_Ip_StartGetData/37 Lpuart_Uart_Ip_StartGetData/37 Lpuart_Uart_Ip_StartGetData/37 Lpuart_Uart_Ip_StartGetData/37 Lpuart_Uart_Ip_SyncSend/32 Lpuart_Uart_Ip_Deinit/31
|
|
Calls:
|
|
LPUART_Uart_Getchar10/18 (LPUART_Uart_Getchar10) @06a21ee0
|
|
Type: function definition analyzed
|
|
Visibility: prevailing_def_ironly
|
|
References:
|
|
Referring:
|
|
Availability: local
|
|
Function flags: body local optimize_size
|
|
Called by: Lpuart_Uart_Ip_GetData/55
|
|
Calls:
|
|
LPUART_Uart_Getchar9/17 (LPUART_Uart_Getchar9) @06a21c40
|
|
Type: function definition analyzed
|
|
Visibility: prevailing_def_ironly
|
|
References:
|
|
Referring:
|
|
Availability: local
|
|
Function flags: body local optimize_size
|
|
Called by: Lpuart_Uart_Ip_GetData/55
|
|
Calls:
|
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LPUART_Uart_Getchar/16 (LPUART_Uart_Getchar) @06a219a0
|
|
Type: function definition analyzed
|
|
Visibility: prevailing_def_ironly
|
|
References:
|
|
Referring:
|
|
Availability: local
|
|
Function flags: body local optimize_size
|
|
Called by: Lpuart_Uart_Ip_IRQHandler/45 Lpuart_Uart_Ip_IRQHandler/45 Lpuart_Uart_Ip_CompleteReceiveDataUsingInt/53 Lpuart_Uart_Ip_GetData/55 Lpuart_Uart_Ip_SyncReceive/36
|
|
Calls:
|
|
LPUART_Uart_Putchar10/15 (LPUART_Uart_Putchar10) @06a21700
|
|
Type: function definition analyzed
|
|
Visibility: prevailing_def_ironly
|
|
References:
|
|
Referring:
|
|
Availability: local
|
|
Function flags: body local optimize_size
|
|
Called by: Lpuart_Uart_Ip_PutData/54
|
|
Calls:
|
|
LPUART_Uart_Putchar9/14 (LPUART_Uart_Putchar9) @06a21460
|
|
Type: function definition analyzed
|
|
Visibility: prevailing_def_ironly
|
|
References:
|
|
Referring:
|
|
Availability: local
|
|
Function flags: body local optimize_size
|
|
Called by: Lpuart_Uart_Ip_PutData/54
|
|
Calls:
|
|
LPUART_Uart_Putchar/13 (LPUART_Uart_Putchar) @06a211c0
|
|
Type: function definition analyzed
|
|
Visibility: prevailing_def_ironly
|
|
References:
|
|
Referring:
|
|
Availability: local
|
|
Function flags: body local optimize_size
|
|
Called by: Lpuart_Uart_Ip_PutData/54
|
|
Calls:
|
|
LPUART_Uart_GetIntMode/12 (LPUART_Uart_GetIntMode) @06a09ee0
|
|
Type: function definition analyzed
|
|
Visibility: prevailing_def_ironly
|
|
References:
|
|
Referring:
|
|
Availability: local
|
|
Function flags: body local optimize_size
|
|
Called by: Lpuart_Uart_Ip_ErrIrqHandler/49 Lpuart_Uart_Ip_ErrIrqHandler/49 Lpuart_Uart_Ip_ErrIrqHandler/49 Lpuart_Uart_Ip_ErrIrqHandler/49 Lpuart_Uart_Ip_IRQHandler/45 Lpuart_Uart_Ip_IRQHandler/45 Lpuart_Uart_Ip_IRQHandler/45
|
|
Calls:
|
|
LPUART_Uart_SetIntMode/11 (LPUART_Uart_SetIntMode) @06a09c40
|
|
Type: function definition analyzed
|
|
Visibility: prevailing_def_ironly
|
|
References:
|
|
Referring:
|
|
Availability: local
|
|
Function flags: body local optimize_size
|
|
Called by: Lpuart_Uart_Ip_TxEmptyIrqHandler/47 Lpuart_Uart_Ip_TxEmptyIrqHandler/47 Lpuart_Uart_Ip_CompleteReceiveDataUsingInt/53 Lpuart_Uart_Ip_CompleteReceiveDataUsingInt/53 Lpuart_Uart_Ip_CompleteReceiveDataUsingInt/53 Lpuart_Uart_Ip_CompleteReceiveDataUsingInt/53 Lpuart_Uart_Ip_CompleteReceiveDataUsingInt/53 Lpuart_Uart_Ip_StartReceiveDataUsingInt/52 Lpuart_Uart_Ip_StartReceiveDataUsingInt/52 Lpuart_Uart_Ip_StartReceiveDataUsingInt/52 Lpuart_Uart_Ip_StartReceiveDataUsingInt/52 Lpuart_Uart_Ip_StartReceiveDataUsingInt/52 Lpuart_Uart_Ip_SyncReceive/36 Lpuart_Uart_Ip_CompleteSendDataUsingInt/51 Lpuart_Uart_Ip_CompleteSendDataUsingInt/51 Lpuart_Uart_Ip_StartSendDataUsingInt/50 Lpuart_Uart_Ip_SyncSend/32 Lpuart_Uart_Ip_SyncSend/32 Lpuart_Uart_Ip_Deinit/31 Lpuart_Uart_Ip_Deinit/31 Lpuart_Uart_Ip_Deinit/31 Lpuart_Uart_Ip_Deinit/31 Lpuart_Uart_Ip_Deinit/31 Lpuart_Uart_Ip_Deinit/31 Lpuart_Uart_Ip_Deinit/31
|
|
Calls:
|
|
LPUART_Uart_SetStopBitCount/10 (LPUART_Uart_SetStopBitCount) @06a099a0
|
|
Type: function definition analyzed
|
|
Visibility: prevailing_def_ironly
|
|
References:
|
|
Referring:
|
|
Availability: local
|
|
Function flags: body local optimize_size
|
|
Called by: Lpuart_Uart_Ip_Init/30
|
|
Calls:
|
|
LPUART_Uart_SetParityMode/9 (LPUART_Uart_SetParityMode) @06a09700
|
|
Type: function definition analyzed
|
|
Visibility: prevailing_def_ironly
|
|
References:
|
|
Referring:
|
|
Availability: local
|
|
Function flags: body local optimize_size
|
|
Called by: Lpuart_Uart_Ip_Init/30
|
|
Calls:
|
|
LPUART_Uart_SetBitCountPerChar/8 (LPUART_Uart_SetBitCountPerChar) @06a09460
|
|
Type: function definition analyzed
|
|
Visibility: prevailing_def_ironly
|
|
References:
|
|
Referring:
|
|
Availability: local
|
|
Function flags: body local optimize_size
|
|
Called by: Lpuart_Uart_Ip_Init/30 Lpuart_Uart_Ip_Init/30
|
|
Calls:
|
|
LPUART_Uart_EnableBothEdgeSamplingCmd/7 (LPUART_Uart_EnableBothEdgeSamplingCmd) @06a091c0
|
|
Type: function definition analyzed
|
|
Visibility: prevailing_def_ironly
|
|
References:
|
|
Referring:
|
|
Availability: local
|
|
Function flags: body local optimize_size
|
|
Called by: Lpuart_Uart_Ip_SetBaudRate/41 Lpuart_Uart_Ip_Init/30
|
|
Calls:
|
|
LPUART_Uart_SetOversamplingRatio/5 (LPUART_Uart_SetOversamplingRatio) @06a05c40
|
|
Type: function definition analyzed
|
|
Visibility: prevailing_def_ironly
|
|
References:
|
|
Referring:
|
|
Availability: local
|
|
Function flags: body local optimize_size
|
|
Called by: Lpuart_Uart_Ip_SetBaudRate/41 Lpuart_Uart_Ip_Init/30
|
|
Calls:
|
|
LPUART_Uart_SetBaudRateDivisor/3 (LPUART_Uart_SetBaudRateDivisor) @06a05620
|
|
Type: function definition analyzed
|
|
Visibility: prevailing_def_ironly
|
|
References:
|
|
Referring:
|
|
Availability: local
|
|
Function flags: body local optimize_size
|
|
Called by: Lpuart_Uart_Ip_SetBaudRate/41 Lpuart_Uart_Ip_Init/30
|
|
Calls:
|
|
LPUART_Uart_SetReceiverCmd/2 (LPUART_Uart_SetReceiverCmd) @06a05380
|
|
Type: function definition analyzed
|
|
Visibility: prevailing_def_ironly
|
|
References:
|
|
Referring:
|
|
Availability: local
|
|
Function flags: body local optimize_size
|
|
Called by: Lpuart_Uart_Ip_CompleteReceiveDataUsingInt/53 Lpuart_Uart_Ip_StartReceiveDataUsingInt/52 Lpuart_Uart_Ip_StartGetData/37 Lpuart_Uart_Ip_StartGetData/37 Lpuart_Uart_Ip_StartGetData/37 Lpuart_Uart_Ip_StartGetData/37 Lpuart_Uart_Ip_SyncReceive/36 Lpuart_Uart_Ip_SyncReceive/36
|
|
Calls:
|
|
LPUART_Uart_SetTransmitterCmd/1 (LPUART_Uart_SetTransmitterCmd) @06a050e0
|
|
Type: function definition analyzed
|
|
Visibility: prevailing_def_ironly
|
|
References:
|
|
Referring:
|
|
Availability: local
|
|
Function flags: body local optimize_size
|
|
Called by: Lpuart_Uart_Ip_CompleteSendDataUsingInt/51 Lpuart_Uart_Ip_StartSendDataUsingInt/50 Lpuart_Uart_Ip_SyncSend/32 Lpuart_Uart_Ip_SyncSend/32
|
|
Calls:
|
|
LPUART_Uart_Init/0 (LPUART_Uart_Init) @069cde00
|
|
Type: function definition analyzed
|
|
Visibility: prevailing_def_ironly
|
|
References:
|
|
Referring:
|
|
Availability: local
|
|
Function flags: body local optimize_size
|
|
Called by: Lpuart_Uart_Ip_Init/30
|
|
Calls:
|
|
Lpuart_Uart_Ip_GetData (uint32 u32Instance)
|
|
{
|
|
uint16 u16Data;
|
|
struct LPUART_Type * pBase;
|
|
const struct Lpuart_Uart_Ip_UserConfigType * pUartUserCfg;
|
|
struct Lpuart_Uart_Ip_StateStructureType * pUartState;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
pBase = Lpuart_Uart_Ip_apBases[u32Instance];
|
|
# DEBUG BEGIN_STMT
|
|
pUartState = Lpuart_Uart_Ip_apStateStructuresArray[u32Instance];
|
|
# DEBUG BEGIN_STMT
|
|
pUartUserCfg = Lpuart_Uart_Ip_apUserConfig[u32Instance];
|
|
# DEBUG BEGIN_STMT
|
|
_1 = pUartUserCfg->eBitCountPerChar;
|
|
if (_1 <= 1)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 6>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
_2 = pUartState->pRxBuff;
|
|
_3 = LPUART_Uart_Getchar (pBase);
|
|
*_2 = _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 = pUartUserCfg->eBitCountPerChar;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [INV]
|
|
else
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
_5 = pUartState->pRxBuff;
|
|
_6 = *_5;
|
|
_7 = pUartState->pRxBuff;
|
|
_8 = _6 & 127;
|
|
*_7 = _8;
|
|
|
|
<bb 5> :
|
|
# DEBUG BEGIN_STMT
|
|
_9 = pUartState->pRxBuff;
|
|
_10 = _9 + 1;
|
|
pUartState->pRxBuff = _10;
|
|
# DEBUG BEGIN_STMT
|
|
_11 = pUartState->u32RxSize;
|
|
_12 = _11 + 4294967295;
|
|
pUartState->u32RxSize = _12;
|
|
goto <bb 12>; [INV]
|
|
|
|
<bb 6> :
|
|
# DEBUG BEGIN_STMT
|
|
_13 = pUartUserCfg->eBitCountPerChar;
|
|
if (_13 == 2)
|
|
goto <bb 7>; [INV]
|
|
else
|
|
goto <bb 8>; [INV]
|
|
|
|
<bb 7> :
|
|
# DEBUG BEGIN_STMT
|
|
u16Data = LPUART_Uart_Getchar9 (pBase);
|
|
goto <bb 9>; [INV]
|
|
|
|
<bb 8> :
|
|
# DEBUG BEGIN_STMT
|
|
u16Data = LPUART_Uart_Getchar10 (pBase);
|
|
|
|
<bb 9> :
|
|
# DEBUG BEGIN_STMT
|
|
_14 = pUartState->u32RxSize;
|
|
if (_14 == 1)
|
|
goto <bb 10>; [INV]
|
|
else
|
|
goto <bb 11>; [INV]
|
|
|
|
<bb 10> :
|
|
# DEBUG BEGIN_STMT
|
|
_15 = pUartState->pRxBuff;
|
|
_16 = (unsigned char) u16Data;
|
|
*_15 = _16;
|
|
# DEBUG BEGIN_STMT
|
|
_17 = pUartState->pRxBuff;
|
|
_18 = _17 + 1;
|
|
pUartState->pRxBuff = _18;
|
|
# DEBUG BEGIN_STMT
|
|
_19 = pUartState->u32RxSize;
|
|
_20 = _19 + 4294967295;
|
|
pUartState->u32RxSize = _20;
|
|
goto <bb 12>; [INV]
|
|
|
|
<bb 11> :
|
|
# DEBUG BEGIN_STMT
|
|
_21 = pUartState->pRxBuff;
|
|
_22 = (unsigned char) u16Data;
|
|
*_21 = _22;
|
|
# DEBUG BEGIN_STMT
|
|
_23 = pUartState->pRxBuff;
|
|
_24 = _23 + 1;
|
|
pUartState->pRxBuff = _24;
|
|
# DEBUG BEGIN_STMT
|
|
_25 = u16Data >> 8;
|
|
_26 = pUartState->pRxBuff;
|
|
_27 = (unsigned char) _25;
|
|
*_26 = _27;
|
|
# DEBUG BEGIN_STMT
|
|
_28 = pUartState->pRxBuff;
|
|
_29 = _28 + 1;
|
|
pUartState->pRxBuff = _29;
|
|
# DEBUG BEGIN_STMT
|
|
_30 = pUartState->u32RxSize;
|
|
_31 = _30 + 4294967294;
|
|
pUartState->u32RxSize = _31;
|
|
|
|
<bb 12> :
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Lpuart_Uart_Ip_PutData (uint32 u32Instance)
|
|
{
|
|
uint8 u8Data;
|
|
uint16 u16Data;
|
|
struct LPUART_Type * pBase;
|
|
const struct Lpuart_Uart_Ip_UserConfigType * pUartUserCfg;
|
|
struct Lpuart_Uart_Ip_StateStructureType * pUartState;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
pBase = Lpuart_Uart_Ip_apBases[u32Instance];
|
|
# DEBUG BEGIN_STMT
|
|
pUartState = Lpuart_Uart_Ip_apStateStructuresArray[u32Instance];
|
|
# DEBUG BEGIN_STMT
|
|
pUartUserCfg = Lpuart_Uart_Ip_apUserConfig[u32Instance];
|
|
# DEBUG BEGIN_STMT
|
|
_1 = pUartUserCfg->eBitCountPerChar;
|
|
if (_1 <= 1)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 4>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
_2 = pUartState->pTxBuff;
|
|
u8Data = *_2;
|
|
# DEBUG BEGIN_STMT
|
|
_3 = pUartState->pTxBuff;
|
|
_4 = _3 + 1;
|
|
pUartState->pTxBuff = _4;
|
|
# DEBUG BEGIN_STMT
|
|
_5 = pUartState->u32TxSize;
|
|
_6 = _5 + 4294967295;
|
|
pUartState->u32TxSize = _6;
|
|
# DEBUG BEGIN_STMT
|
|
LPUART_Uart_Putchar (pBase, u8Data);
|
|
goto <bb 10>; [INV]
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
_7 = pUartState->pTxBuff;
|
|
_8 = *_7;
|
|
u16Data = (uint16) _8;
|
|
# DEBUG BEGIN_STMT
|
|
_9 = pUartState->u32TxSize;
|
|
if (_9 == 1)
|
|
goto <bb 5>; [INV]
|
|
else
|
|
goto <bb 6>; [INV]
|
|
|
|
<bb 5> :
|
|
# DEBUG BEGIN_STMT
|
|
_10 = pUartState->pTxBuff;
|
|
_11 = _10 + 1;
|
|
pUartState->pTxBuff = _11;
|
|
# DEBUG BEGIN_STMT
|
|
_12 = pUartState->u32TxSize;
|
|
_13 = _12 + 4294967295;
|
|
pUartState->u32TxSize = _13;
|
|
goto <bb 7>; [INV]
|
|
|
|
<bb 6> :
|
|
# DEBUG BEGIN_STMT
|
|
_14 = pUartState->pTxBuff;
|
|
_15 = _14 + 1;
|
|
pUartState->pTxBuff = _15;
|
|
# DEBUG BEGIN_STMT
|
|
_16 = pUartState->pTxBuff;
|
|
_17 = *_16;
|
|
_18 = (short unsigned int) _17;
|
|
_19 = _18 << 8;
|
|
u16Data = u16Data | _19;
|
|
# DEBUG BEGIN_STMT
|
|
_20 = pUartState->pTxBuff;
|
|
_21 = _20 + 1;
|
|
pUartState->pTxBuff = _21;
|
|
# DEBUG BEGIN_STMT
|
|
_22 = pUartState->u32TxSize;
|
|
_23 = _22 + 4294967294;
|
|
pUartState->u32TxSize = _23;
|
|
|
|
<bb 7> :
|
|
# DEBUG BEGIN_STMT
|
|
_24 = pUartUserCfg->eBitCountPerChar;
|
|
if (_24 == 2)
|
|
goto <bb 8>; [INV]
|
|
else
|
|
goto <bb 9>; [INV]
|
|
|
|
<bb 8> :
|
|
# DEBUG BEGIN_STMT
|
|
LPUART_Uart_Putchar9 (pBase, u16Data);
|
|
goto <bb 10>; [INV]
|
|
|
|
<bb 9> :
|
|
# DEBUG BEGIN_STMT
|
|
LPUART_Uart_Putchar10 (pBase, u16Data);
|
|
|
|
<bb 10> :
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Lpuart_Uart_Ip_CompleteReceiveDataUsingInt (uint32 u32Instance)
|
|
{
|
|
struct Lpuart_Uart_Ip_StateStructureType * pUartState;
|
|
struct LPUART_Type * pBase;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
pBase = Lpuart_Uart_Ip_apBases[u32Instance];
|
|
# DEBUG BEGIN_STMT
|
|
pUartState = Lpuart_Uart_Ip_apStateStructuresArray[u32Instance];
|
|
# DEBUG BEGIN_STMT
|
|
LPUART_Uart_SetReceiverCmd (pBase, 0);
|
|
# DEBUG BEGIN_STMT
|
|
LPUART_Uart_SetIntMode (pBase, 27, 0);
|
|
# DEBUG BEGIN_STMT
|
|
LPUART_Uart_SetIntMode (pBase, 24, 0);
|
|
# DEBUG BEGIN_STMT
|
|
LPUART_Uart_SetIntMode (pBase, 26, 0);
|
|
# DEBUG BEGIN_STMT
|
|
LPUART_Uart_SetIntMode (pBase, 25, 0);
|
|
# DEBUG BEGIN_STMT
|
|
LPUART_Uart_SetIntMode (pBase, 21, 0);
|
|
# DEBUG BEGIN_STMT
|
|
LPUART_Uart_Getchar (pBase);
|
|
# DEBUG BEGIN_STMT
|
|
pUartState->bIsRxBusy = 0;
|
|
# DEBUG BEGIN_STMT
|
|
_1 = pUartState->eReceiveStatus;
|
|
if (_1 == 2)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 4>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
pUartState->eReceiveStatus = 0;
|
|
|
|
<bb 4> :
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Lpuart_Uart_Ip_StartReceiveDataUsingInt (uint32 u32Instance, uint8 * pRxBuff, uint32 u32RxSize)
|
|
{
|
|
struct Lpuart_Uart_Ip_StateStructureType * pUartState;
|
|
struct LPUART_Type * pBase;
|
|
Lpuart_Uart_Ip_StatusType D.4980;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
pBase = Lpuart_Uart_Ip_apBases[u32Instance];
|
|
# DEBUG BEGIN_STMT
|
|
pUartState = Lpuart_Uart_Ip_apStateStructuresArray[u32Instance];
|
|
# DEBUG BEGIN_STMT
|
|
pUartState->bIsRxBusy = 1;
|
|
# DEBUG BEGIN_STMT
|
|
pUartState->pRxBuff = pRxBuff;
|
|
# DEBUG BEGIN_STMT
|
|
pUartState->u32RxSize = u32RxSize;
|
|
# DEBUG BEGIN_STMT
|
|
pUartState->eReceiveStatus = 2;
|
|
# DEBUG BEGIN_STMT
|
|
LPUART_Uart_ClearErrorFlags (pBase);
|
|
# DEBUG BEGIN_STMT
|
|
LPUART_Uart_FlushRxBuffer (pBase);
|
|
# DEBUG BEGIN_STMT
|
|
LPUART_Uart_SetReceiverCmd (pBase, 1);
|
|
# DEBUG BEGIN_STMT
|
|
LPUART_Uart_SetIntMode (pBase, 27, 1);
|
|
# DEBUG BEGIN_STMT
|
|
LPUART_Uart_SetIntMode (pBase, 24, 1);
|
|
# DEBUG BEGIN_STMT
|
|
LPUART_Uart_SetIntMode (pBase, 26, 1);
|
|
# DEBUG BEGIN_STMT
|
|
LPUART_Uart_SetIntMode (pBase, 25, 1);
|
|
# DEBUG BEGIN_STMT
|
|
LPUART_Uart_SetIntMode (pBase, 21, 1);
|
|
# DEBUG BEGIN_STMT
|
|
D.4980 = 0;
|
|
return D.4980;
|
|
|
|
}
|
|
|
|
|
|
Lpuart_Uart_Ip_CompleteSendDataUsingInt (uint32 u32Instance)
|
|
{
|
|
struct LPUART_Type * pBase;
|
|
struct Lpuart_Uart_Ip_StateStructureType * pUartState;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
pBase = Lpuart_Uart_Ip_apBases[u32Instance];
|
|
# DEBUG BEGIN_STMT
|
|
pUartState = Lpuart_Uart_Ip_apStateStructuresArray[u32Instance];
|
|
# DEBUG BEGIN_STMT
|
|
_1 = pUartState->eTransmitStatus;
|
|
if (_1 == 2)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 4>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
pUartState->eTransmitStatus = 0;
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
LPUART_Uart_SetIntMode (pBase, 23, 0);
|
|
|
|
<bb 5> :
|
|
# DEBUG BEGIN_STMT
|
|
LPUART_Uart_SetIntMode (pBase, 22, 0);
|
|
# DEBUG BEGIN_STMT
|
|
LPUART_Uart_SetTransmitterCmd (pBase, 0);
|
|
# DEBUG BEGIN_STMT
|
|
pUartState->bIsTxBusy = 0;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Lpuart_Uart_Ip_StartSendDataUsingInt (uint32 u32Instance, const uint8 * pTxBuff, uint32 u32TxSize)
|
|
{
|
|
struct Lpuart_Uart_Ip_StateStructureType * pUartState;
|
|
struct LPUART_Type * pBase;
|
|
Lpuart_Uart_Ip_StatusType D.4900;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
pBase = Lpuart_Uart_Ip_apBases[u32Instance];
|
|
# DEBUG BEGIN_STMT
|
|
pUartState = Lpuart_Uart_Ip_apStateStructuresArray[u32Instance];
|
|
# DEBUG BEGIN_STMT
|
|
pUartState->pTxBuff = pTxBuff;
|
|
# DEBUG BEGIN_STMT
|
|
pUartState->u32TxSize = u32TxSize;
|
|
# DEBUG BEGIN_STMT
|
|
pUartState->eTransmitStatus = 2;
|
|
# DEBUG BEGIN_STMT
|
|
LPUART_Uart_SetTransmitterCmd (pBase, 1);
|
|
# DEBUG BEGIN_STMT
|
|
LPUART_Uart_SetIntMode (pBase, 23, 1);
|
|
# DEBUG BEGIN_STMT
|
|
D.4900 = 0;
|
|
return D.4900;
|
|
|
|
}
|
|
|
|
|
|
Lpuart_Uart_Ip_ErrIrqHandler (uint32 u32Instance)
|
|
{
|
|
boolean bIsReturn;
|
|
boolean bIsError;
|
|
struct LPUART_Type * pBase;
|
|
const struct Lpuart_Uart_Ip_UserConfigType * pUartUserCfg;
|
|
struct Lpuart_Uart_Ip_StateStructureType * pUartState;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
bIsError = 0;
|
|
# DEBUG BEGIN_STMT
|
|
bIsReturn = 0;
|
|
# DEBUG BEGIN_STMT
|
|
pBase = Lpuart_Uart_Ip_apBases[u32Instance];
|
|
# DEBUG BEGIN_STMT
|
|
pUartState = Lpuart_Uart_Ip_apStateStructuresArray[u32Instance];
|
|
# DEBUG BEGIN_STMT
|
|
pUartUserCfg = Lpuart_Uart_Ip_apUserConfig[u32Instance];
|
|
# DEBUG BEGIN_STMT
|
|
_1 = LPUART_Uart_GetStatusFlag (pBase, 19);
|
|
if (_1 != 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 6>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
LPUART_Uart_ClearStatusFlag (pBase, 19);
|
|
# DEBUG BEGIN_STMT
|
|
_2 = LPUART_Uart_GetIntMode (pBase, 27);
|
|
_3 = ~_2;
|
|
if (_3 != 0)
|
|
goto <bb 4>; [INV]
|
|
else
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
bIsReturn = 1;
|
|
goto <bb 6>; [INV]
|
|
|
|
<bb 5> :
|
|
# DEBUG BEGIN_STMT
|
|
bIsError = 1;
|
|
# DEBUG BEGIN_STMT
|
|
pUartState->eReceiveStatus = 5;
|
|
|
|
<bb 6> :
|
|
# DEBUG BEGIN_STMT
|
|
_4 = LPUART_Uart_GetStatusFlag (pBase, 17);
|
|
if (_4 != 0)
|
|
goto <bb 7>; [INV]
|
|
else
|
|
goto <bb 11>; [INV]
|
|
|
|
<bb 7> :
|
|
_5 = ~bIsReturn;
|
|
if (_5 != 0)
|
|
goto <bb 8>; [INV]
|
|
else
|
|
goto <bb 11>; [INV]
|
|
|
|
<bb 8> :
|
|
# DEBUG BEGIN_STMT
|
|
LPUART_Uart_ClearStatusFlag (pBase, 17);
|
|
# DEBUG BEGIN_STMT
|
|
_6 = LPUART_Uart_GetIntMode (pBase, 25);
|
|
_7 = ~_6;
|
|
if (_7 != 0)
|
|
goto <bb 9>; [INV]
|
|
else
|
|
goto <bb 10>; [INV]
|
|
|
|
<bb 9> :
|
|
# DEBUG BEGIN_STMT
|
|
bIsReturn = 1;
|
|
goto <bb 11>; [INV]
|
|
|
|
<bb 10> :
|
|
# DEBUG BEGIN_STMT
|
|
bIsError = 1;
|
|
# DEBUG BEGIN_STMT
|
|
pUartState->eReceiveStatus = 7;
|
|
|
|
<bb 11> :
|
|
# DEBUG BEGIN_STMT
|
|
_8 = LPUART_Uart_GetStatusFlag (pBase, 16);
|
|
if (_8 != 0)
|
|
goto <bb 12>; [INV]
|
|
else
|
|
goto <bb 16>; [INV]
|
|
|
|
<bb 12> :
|
|
_9 = ~bIsReturn;
|
|
if (_9 != 0)
|
|
goto <bb 13>; [INV]
|
|
else
|
|
goto <bb 16>; [INV]
|
|
|
|
<bb 13> :
|
|
# DEBUG BEGIN_STMT
|
|
LPUART_Uart_ClearStatusFlag (pBase, 16);
|
|
# DEBUG BEGIN_STMT
|
|
_10 = LPUART_Uart_GetIntMode (pBase, 24);
|
|
_11 = ~_10;
|
|
if (_11 != 0)
|
|
goto <bb 14>; [INV]
|
|
else
|
|
goto <bb 15>; [INV]
|
|
|
|
<bb 14> :
|
|
# DEBUG BEGIN_STMT
|
|
bIsReturn = 1;
|
|
goto <bb 16>; [INV]
|
|
|
|
<bb 15> :
|
|
# DEBUG BEGIN_STMT
|
|
bIsError = 1;
|
|
# DEBUG BEGIN_STMT
|
|
pUartState->eReceiveStatus = 8;
|
|
|
|
<bb 16> :
|
|
# DEBUG BEGIN_STMT
|
|
_12 = LPUART_Uart_GetStatusFlag (pBase, 18);
|
|
if (_12 != 0)
|
|
goto <bb 17>; [INV]
|
|
else
|
|
goto <bb 21>; [INV]
|
|
|
|
<bb 17> :
|
|
_13 = ~bIsReturn;
|
|
if (_13 != 0)
|
|
goto <bb 18>; [INV]
|
|
else
|
|
goto <bb 21>; [INV]
|
|
|
|
<bb 18> :
|
|
# DEBUG BEGIN_STMT
|
|
LPUART_Uart_ClearStatusFlag (pBase, 18);
|
|
# DEBUG BEGIN_STMT
|
|
_14 = LPUART_Uart_GetIntMode (pBase, 26);
|
|
_15 = ~_14;
|
|
if (_15 != 0)
|
|
goto <bb 19>; [INV]
|
|
else
|
|
goto <bb 20>; [INV]
|
|
|
|
<bb 19> :
|
|
# DEBUG BEGIN_STMT
|
|
bIsReturn = 1;
|
|
goto <bb 21>; [INV]
|
|
|
|
<bb 20> :
|
|
# DEBUG BEGIN_STMT
|
|
bIsError = 1;
|
|
# DEBUG BEGIN_STMT
|
|
pUartState->eReceiveStatus = 9;
|
|
|
|
<bb 21> :
|
|
# DEBUG BEGIN_STMT
|
|
_16 = ~bIsReturn;
|
|
if (_16 != 0)
|
|
goto <bb 22>; [INV]
|
|
else
|
|
goto <bb 27>; [INV]
|
|
|
|
<bb 22> :
|
|
# DEBUG BEGIN_STMT
|
|
if (bIsError != 0)
|
|
goto <bb 23>; [INV]
|
|
else
|
|
goto <bb 27>; [INV]
|
|
|
|
<bb 23> :
|
|
# DEBUG BEGIN_STMT
|
|
_17 = pUartUserCfg->eTransferType;
|
|
if (_17 == 1)
|
|
goto <bb 24>; [INV]
|
|
else
|
|
goto <bb 25>; [INV]
|
|
|
|
<bb 24> :
|
|
# DEBUG BEGIN_STMT
|
|
Lpuart_Uart_Ip_CompleteReceiveDataUsingInt (u32Instance);
|
|
|
|
<bb 25> :
|
|
# DEBUG BEGIN_STMT
|
|
_18 = pUartUserCfg->pfErrorCallback;
|
|
if (_18 != 0B)
|
|
goto <bb 26>; [INV]
|
|
else
|
|
goto <bb 27>; [INV]
|
|
|
|
<bb 26> :
|
|
# DEBUG BEGIN_STMT
|
|
_19 = pUartUserCfg->pfErrorCallback;
|
|
_20 = pUartUserCfg->pErrorCallbackParam;
|
|
_19 (u32Instance, pUartState, 3, _20);
|
|
|
|
<bb 27> :
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Lpuart_Uart_Ip_TxCompleteIrqHandler (uint32 u32Instance)
|
|
{
|
|
const struct Lpuart_Uart_Ip_UserConfigType * pUartUserCfg;
|
|
struct Lpuart_Uart_Ip_StateStructureType * pUartState;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
pUartState = Lpuart_Uart_Ip_apStateStructuresArray[u32Instance];
|
|
# DEBUG BEGIN_STMT
|
|
pUartUserCfg = Lpuart_Uart_Ip_apUserConfig[u32Instance];
|
|
# DEBUG BEGIN_STMT
|
|
_1 = pUartState->u32TxSize;
|
|
if (_1 == 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 7>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
_2 = pUartUserCfg->eTransferType;
|
|
if (_2 == 1)
|
|
goto <bb 4>; [INV]
|
|
else
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
Lpuart_Uart_Ip_CompleteSendDataUsingInt (u32Instance);
|
|
|
|
<bb 5> :
|
|
# DEBUG BEGIN_STMT
|
|
_3 = pUartUserCfg->pfTxCallback;
|
|
if (_3 != 0B)
|
|
goto <bb 6>; [INV]
|
|
else
|
|
goto <bb 7>; [INV]
|
|
|
|
<bb 6> :
|
|
# DEBUG BEGIN_STMT
|
|
_4 = pUartUserCfg->pfTxCallback;
|
|
_5 = pUartUserCfg->pTxCallbackParam;
|
|
_4 (u32Instance, pUartState, 2, _5);
|
|
|
|
<bb 7> :
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Lpuart_Uart_Ip_TxEmptyIrqHandler (uint32 u32Instance)
|
|
{
|
|
struct LPUART_Type * pBase;
|
|
const struct Lpuart_Uart_Ip_UserConfigType * pUartUserCfg;
|
|
struct Lpuart_Uart_Ip_StateStructureType * pUartState;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
pBase = Lpuart_Uart_Ip_apBases[u32Instance];
|
|
# DEBUG BEGIN_STMT
|
|
pUartState = Lpuart_Uart_Ip_apStateStructuresArray[u32Instance];
|
|
# DEBUG BEGIN_STMT
|
|
pUartUserCfg = Lpuart_Uart_Ip_apUserConfig[u32Instance];
|
|
# DEBUG BEGIN_STMT
|
|
_1 = pUartState->u32TxSize;
|
|
if (_1 != 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 8>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
Lpuart_Uart_Ip_PutData (u32Instance);
|
|
# DEBUG BEGIN_STMT
|
|
_2 = pUartState->u32TxSize;
|
|
if (_2 == 0)
|
|
goto <bb 4>; [INV]
|
|
else
|
|
goto <bb 6>; [INV]
|
|
|
|
<bb 4> :
|
|
_3 = pUartUserCfg->pfTxCallback;
|
|
if (_3 != 0B)
|
|
goto <bb 5>; [INV]
|
|
else
|
|
goto <bb 6>; [INV]
|
|
|
|
<bb 5> :
|
|
# DEBUG BEGIN_STMT
|
|
_4 = pUartUserCfg->pfTxCallback;
|
|
_5 = pUartUserCfg->pTxCallbackParam;
|
|
_4 (u32Instance, pUartState, 1, _5);
|
|
|
|
<bb 6> :
|
|
# DEBUG BEGIN_STMT
|
|
_6 = pUartState->u32TxSize;
|
|
if (_6 == 0)
|
|
goto <bb 7>; [INV]
|
|
else
|
|
goto <bb 8>; [INV]
|
|
|
|
<bb 7> :
|
|
# DEBUG BEGIN_STMT
|
|
LPUART_Uart_SetIntMode (pBase, 23, 0);
|
|
# DEBUG BEGIN_STMT
|
|
LPUART_Uart_SetIntMode (pBase, 22, 1);
|
|
|
|
<bb 8> :
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Lpuart_Uart_Ip_RxIrqHandler (uint32 u32Instance)
|
|
{
|
|
const struct Lpuart_Uart_Ip_UserConfigType * pUartUserCfg;
|
|
struct Lpuart_Uart_Ip_StateStructureType * pUartState;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
pUartState = Lpuart_Uart_Ip_apStateStructuresArray[u32Instance];
|
|
# DEBUG BEGIN_STMT
|
|
pUartUserCfg = Lpuart_Uart_Ip_apUserConfig[u32Instance];
|
|
# DEBUG BEGIN_STMT
|
|
Lpuart_Uart_Ip_GetData (u32Instance);
|
|
# DEBUG BEGIN_STMT
|
|
_1 = pUartState->u32RxSize;
|
|
if (_1 == 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
_2 = pUartUserCfg->pfRxCallback;
|
|
if (_2 != 0B)
|
|
goto <bb 4>; [INV]
|
|
else
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
_3 = pUartUserCfg->pfRxCallback;
|
|
_4 = pUartUserCfg->pRxCallbackParam;
|
|
_3 (u32Instance, pUartState, 0, _4);
|
|
|
|
<bb 5> :
|
|
# DEBUG BEGIN_STMT
|
|
_5 = pUartState->u32RxSize;
|
|
if (_5 == 0)
|
|
goto <bb 6>; [INV]
|
|
else
|
|
goto <bb 8>; [INV]
|
|
|
|
<bb 6> :
|
|
# DEBUG BEGIN_STMT
|
|
Lpuart_Uart_Ip_CompleteReceiveDataUsingInt (u32Instance);
|
|
# DEBUG BEGIN_STMT
|
|
_6 = pUartUserCfg->pfRxCallback;
|
|
if (_6 != 0B)
|
|
goto <bb 7>; [INV]
|
|
else
|
|
goto <bb 8>; [INV]
|
|
|
|
<bb 7> :
|
|
# DEBUG BEGIN_STMT
|
|
_7 = pUartUserCfg->pfRxCallback;
|
|
_8 = pUartUserCfg->pRxCallbackParam;
|
|
_7 (u32Instance, pUartState, 2, _8);
|
|
|
|
<bb 8> :
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Lpuart_Uart_Ip_IRQHandler (uint32 u32Instance)
|
|
{
|
|
boolean bIsReturn;
|
|
struct Lpuart_Uart_Ip_StateStructureType * pUartState;
|
|
struct LPUART_Type * pBase;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = u32Instance <= 15;
|
|
DevAssert (_1);
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
pBase = Lpuart_Uart_Ip_apBases[u32Instance];
|
|
# DEBUG BEGIN_STMT
|
|
pUartState = Lpuart_Uart_Ip_apStateStructuresArray[u32Instance];
|
|
# DEBUG BEGIN_STMT
|
|
bIsReturn = 0;
|
|
# DEBUG BEGIN_STMT
|
|
if (pUartState == 0B)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 4>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
LPUART_Uart_Getchar (pBase);
|
|
# DEBUG BEGIN_STMT
|
|
LPUART_Uart_ClearErrorFlags (pBase);
|
|
goto <bb 17>; [INV]
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
Lpuart_Uart_Ip_ErrIrqHandler (u32Instance);
|
|
# DEBUG BEGIN_STMT
|
|
_2 = LPUART_Uart_GetStatusFlag (pBase, 21);
|
|
if (_2 != 0)
|
|
goto <bb 5>; [INV]
|
|
else
|
|
goto <bb 9>; [INV]
|
|
|
|
<bb 5> :
|
|
# DEBUG BEGIN_STMT
|
|
_3 = LPUART_Uart_GetIntMode (pBase, 21);
|
|
if (_3 != 0)
|
|
goto <bb 6>; [INV]
|
|
else
|
|
goto <bb 7>; [INV]
|
|
|
|
<bb 6> :
|
|
# DEBUG BEGIN_STMT
|
|
Lpuart_Uart_Ip_RxIrqHandler (u32Instance);
|
|
goto <bb 8>; [INV]
|
|
|
|
<bb 7> :
|
|
# DEBUG BEGIN_STMT
|
|
LPUART_Uart_Getchar (pBase);
|
|
|
|
<bb 8> :
|
|
# DEBUG BEGIN_STMT
|
|
bIsReturn = 1;
|
|
|
|
<bb 9> :
|
|
# DEBUG BEGIN_STMT
|
|
_4 = LPUART_Uart_GetStatusFlag (pBase, 23);
|
|
if (_4 != 0)
|
|
goto <bb 10>; [INV]
|
|
else
|
|
goto <bb 13>; [INV]
|
|
|
|
<bb 10> :
|
|
_5 = ~bIsReturn;
|
|
if (_5 != 0)
|
|
goto <bb 11>; [INV]
|
|
else
|
|
goto <bb 13>; [INV]
|
|
|
|
<bb 11> :
|
|
# DEBUG BEGIN_STMT
|
|
_6 = LPUART_Uart_GetIntMode (pBase, 23);
|
|
if (_6 != 0)
|
|
goto <bb 12>; [INV]
|
|
else
|
|
goto <bb 13>; [INV]
|
|
|
|
<bb 12> :
|
|
# DEBUG BEGIN_STMT
|
|
Lpuart_Uart_Ip_TxEmptyIrqHandler (u32Instance);
|
|
# DEBUG BEGIN_STMT
|
|
bIsReturn = 1;
|
|
|
|
<bb 13> :
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
_7 = LPUART_Uart_GetStatusFlag (pBase, 22);
|
|
if (_7 != 0)
|
|
goto <bb 14>; [INV]
|
|
else
|
|
goto <bb 17>; [INV]
|
|
|
|
<bb 14> :
|
|
_8 = ~bIsReturn;
|
|
if (_8 != 0)
|
|
goto <bb 15>; [INV]
|
|
else
|
|
goto <bb 17>; [INV]
|
|
|
|
<bb 15> :
|
|
# DEBUG BEGIN_STMT
|
|
_9 = LPUART_Uart_GetIntMode (pBase, 22);
|
|
if (_9 != 0)
|
|
goto <bb 16>; [INV]
|
|
else
|
|
goto <bb 17>; [INV]
|
|
|
|
<bb 16> :
|
|
# DEBUG BEGIN_STMT
|
|
Lpuart_Uart_Ip_TxCompleteIrqHandler (u32Instance);
|
|
|
|
<bb 17> :
|
|
# DEBUG BEGIN_STMT
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Lpuart_Uart_Ip_SetRxBuffer (uint32 u32Instance, uint8 * pRxBuff, uint32 u32RxSize)
|
|
{
|
|
struct Lpuart_Uart_Ip_StateStructureType * pUartState;
|
|
Lpuart_Uart_Ip_StatusType D.5029;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = u32Instance <= 15;
|
|
DevAssert (_1);
|
|
# DEBUG BEGIN_STMT
|
|
_2 = pRxBuff != 0B;
|
|
DevAssert (_2);
|
|
# DEBUG BEGIN_STMT
|
|
_3 = u32RxSize != 0;
|
|
DevAssert (_3);
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
pUartState = Lpuart_Uart_Ip_apStateStructuresArray[u32Instance];
|
|
# DEBUG BEGIN_STMT
|
|
pUartState->pRxBuff = pRxBuff;
|
|
# DEBUG BEGIN_STMT
|
|
pUartState->u32RxSize = u32RxSize;
|
|
# DEBUG BEGIN_STMT
|
|
D.5029 = 0;
|
|
return D.5029;
|
|
|
|
}
|
|
|
|
|
|
Lpuart_Uart_Ip_SetTxBuffer (uint32 u32Instance, const uint8 * pTxBuff, uint32 u32TxSize)
|
|
{
|
|
struct Lpuart_Uart_Ip_StateStructureType * pUartState;
|
|
Lpuart_Uart_Ip_StatusType D.5027;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = u32Instance <= 15;
|
|
DevAssert (_1);
|
|
# DEBUG BEGIN_STMT
|
|
_2 = pTxBuff != 0B;
|
|
DevAssert (_2);
|
|
# DEBUG BEGIN_STMT
|
|
_3 = u32TxSize != 0;
|
|
DevAssert (_3);
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
pUartState = Lpuart_Uart_Ip_apStateStructuresArray[u32Instance];
|
|
# DEBUG BEGIN_STMT
|
|
pUartState->pTxBuff = pTxBuff;
|
|
# DEBUG BEGIN_STMT
|
|
pUartState->u32TxSize = u32TxSize;
|
|
# DEBUG BEGIN_STMT
|
|
D.5027 = 0;
|
|
return D.5027;
|
|
|
|
}
|
|
|
|
|
|
Lpuart_Uart_Ip_GetBaudRate (uint32 u32Instance, uint32 * pConfiguredBaudRate)
|
|
{
|
|
struct Lpuart_Uart_Ip_StateStructureType * pUartState;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = u32Instance <= 15;
|
|
DevAssert (_1);
|
|
# DEBUG BEGIN_STMT
|
|
_2 = pConfiguredBaudRate != 0B;
|
|
DevAssert (_2);
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
pUartState = Lpuart_Uart_Ip_apStateStructuresArray[u32Instance];
|
|
# DEBUG BEGIN_STMT
|
|
_3 = pUartState->u32BaudRate;
|
|
*pConfiguredBaudRate = _3;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Lpuart_Uart_Ip_SetBaudRate (uint32 u32Instance, Lpuart_Uart_Ip_BaudrateType u32DesiredBaudrate, uint32 u32ClockFrequency)
|
|
{
|
|
Lpuart_Uart_Ip_StatusType retVal;
|
|
boolean bIsReturn;
|
|
struct Lpuart_Uart_Ip_StateStructureType * pUartState;
|
|
struct LPUART_Type * pBase;
|
|
uint32 maxOsr;
|
|
uint32 baudDiff;
|
|
uint32 calculatedBaud;
|
|
uint32 tempDiff;
|
|
uint32 osr;
|
|
uint16 i;
|
|
uint16 sbrTemp;
|
|
uint16 sbr;
|
|
Lpuart_Uart_Ip_StatusType D.5025;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = u32Instance <= 15;
|
|
DevAssert (_1);
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
pBase = Lpuart_Uart_Ip_apBases[u32Instance];
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
pUartState = Lpuart_Uart_Ip_apStateStructuresArray[u32Instance];
|
|
# DEBUG BEGIN_STMT
|
|
bIsReturn = 0;
|
|
# DEBUG BEGIN_STMT
|
|
retVal = 1;
|
|
# DEBUG BEGIN_STMT
|
|
if (pUartState != 0B)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 8>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
_2 = pUartState->bIsTxBusy;
|
|
if (_2 != 0)
|
|
goto <bb 4>; [INV]
|
|
else
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
retVal = 2;
|
|
# DEBUG BEGIN_STMT
|
|
bIsReturn = 1;
|
|
|
|
<bb 5> :
|
|
# DEBUG BEGIN_STMT
|
|
_3 = pUartState->bIsRxBusy;
|
|
if (_3 != 0)
|
|
goto <bb 6>; [INV]
|
|
else
|
|
goto <bb 8>; [INV]
|
|
|
|
<bb 6> :
|
|
_4 = ~bIsReturn;
|
|
if (_4 != 0)
|
|
goto <bb 7>; [INV]
|
|
else
|
|
goto <bb 8>; [INV]
|
|
|
|
<bb 7> :
|
|
# DEBUG BEGIN_STMT
|
|
retVal = 2;
|
|
# DEBUG BEGIN_STMT
|
|
bIsReturn = 1;
|
|
|
|
<bb 8> :
|
|
# DEBUG BEGIN_STMT
|
|
_5 = ~bIsReturn;
|
|
if (_5 != 0)
|
|
goto <bb 9>; [INV]
|
|
else
|
|
goto <bb 26>; [INV]
|
|
|
|
<bb 9> :
|
|
# DEBUG BEGIN_STMT
|
|
_6 = u32ClockFrequency != 0;
|
|
DevAssert (_6);
|
|
# DEBUG BEGIN_STMT
|
|
_7 = u32DesiredBaudrate * 5;
|
|
_8 = u32ClockFrequency >= _7;
|
|
DevAssert (_8);
|
|
# DEBUG BEGIN_STMT
|
|
osr = 4;
|
|
# DEBUG BEGIN_STMT
|
|
_9 = u32DesiredBaudrate * osr;
|
|
_10 = u32ClockFrequency / _9;
|
|
sbr = (uint16) _10;
|
|
# DEBUG BEGIN_STMT
|
|
_11 = (long unsigned int) sbr;
|
|
_12 = osr * _11;
|
|
calculatedBaud = u32ClockFrequency / _12;
|
|
# DEBUG BEGIN_STMT
|
|
if (calculatedBaud > u32DesiredBaudrate)
|
|
goto <bb 10>; [INV]
|
|
else
|
|
goto <bb 11>; [INV]
|
|
|
|
<bb 10> :
|
|
# DEBUG BEGIN_STMT
|
|
baudDiff = calculatedBaud - u32DesiredBaudrate;
|
|
goto <bb 12>; [INV]
|
|
|
|
<bb 11> :
|
|
# DEBUG BEGIN_STMT
|
|
baudDiff = u32DesiredBaudrate - calculatedBaud;
|
|
|
|
<bb 12> :
|
|
# DEBUG BEGIN_STMT
|
|
maxOsr = u32ClockFrequency / u32DesiredBaudrate;
|
|
# DEBUG BEGIN_STMT
|
|
if (maxOsr > 32)
|
|
goto <bb 13>; [INV]
|
|
else
|
|
goto <bb 14>; [INV]
|
|
|
|
<bb 13> :
|
|
# DEBUG BEGIN_STMT
|
|
maxOsr = 32;
|
|
|
|
<bb 14> :
|
|
# DEBUG BEGIN_STMT
|
|
if (maxOsr > 4)
|
|
goto <bb 15>; [INV]
|
|
else
|
|
goto <bb 23>; [INV]
|
|
|
|
<bb 15> :
|
|
# DEBUG BEGIN_STMT
|
|
i = 5;
|
|
goto <bb 22>; [INV]
|
|
|
|
<bb 16> :
|
|
# DEBUG BEGIN_STMT
|
|
_13 = (unsigned int) i;
|
|
_14 = u32DesiredBaudrate * _13;
|
|
_15 = u32ClockFrequency / _14;
|
|
sbrTemp = (uint16) _15;
|
|
# DEBUG BEGIN_STMT
|
|
_16 = (int) i;
|
|
_17 = (int) sbrTemp;
|
|
_18 = _16 * _17;
|
|
_19 = (long unsigned int) _18;
|
|
calculatedBaud = u32ClockFrequency / _19;
|
|
# DEBUG BEGIN_STMT
|
|
if (calculatedBaud > u32DesiredBaudrate)
|
|
goto <bb 17>; [INV]
|
|
else
|
|
goto <bb 18>; [INV]
|
|
|
|
<bb 17> :
|
|
# DEBUG BEGIN_STMT
|
|
tempDiff = calculatedBaud - u32DesiredBaudrate;
|
|
goto <bb 19>; [INV]
|
|
|
|
<bb 18> :
|
|
# DEBUG BEGIN_STMT
|
|
tempDiff = u32DesiredBaudrate - calculatedBaud;
|
|
|
|
<bb 19> :
|
|
# DEBUG BEGIN_STMT
|
|
if (tempDiff <= baudDiff)
|
|
goto <bb 20>; [INV]
|
|
else
|
|
goto <bb 21>; [INV]
|
|
|
|
<bb 20> :
|
|
# DEBUG BEGIN_STMT
|
|
baudDiff = tempDiff;
|
|
# DEBUG BEGIN_STMT
|
|
osr = (uint32) i;
|
|
# DEBUG BEGIN_STMT
|
|
sbr = sbrTemp;
|
|
|
|
<bb 21> :
|
|
# DEBUG BEGIN_STMT
|
|
i.6_20 = i;
|
|
i = i.6_20 + 1;
|
|
|
|
<bb 22> :
|
|
# DEBUG BEGIN_STMT
|
|
_21 = (long unsigned int) i;
|
|
if (maxOsr >= _21)
|
|
goto <bb 16>; [INV]
|
|
else
|
|
goto <bb 23>; [INV]
|
|
|
|
<bb 23> :
|
|
# DEBUG BEGIN_STMT
|
|
if (osr <= 7)
|
|
goto <bb 24>; [INV]
|
|
else
|
|
goto <bb 25>; [INV]
|
|
|
|
<bb 24> :
|
|
# DEBUG BEGIN_STMT
|
|
LPUART_Uart_EnableBothEdgeSamplingCmd (pBase);
|
|
|
|
<bb 25> :
|
|
# DEBUG BEGIN_STMT
|
|
_22 = osr + 4294967295;
|
|
LPUART_Uart_SetOversamplingRatio (pBase, _22);
|
|
# DEBUG BEGIN_STMT
|
|
_23 = (long unsigned int) sbr;
|
|
LPUART_Uart_SetBaudRateDivisor (pBase, _23);
|
|
# DEBUG BEGIN_STMT
|
|
pUartState->u32BaudRate = calculatedBaud;
|
|
# DEBUG BEGIN_STMT
|
|
retVal = 0;
|
|
|
|
<bb 26> :
|
|
# DEBUG BEGIN_STMT
|
|
D.5025 = retVal;
|
|
return D.5025;
|
|
|
|
}
|
|
|
|
|
|
Lpuart_Uart_Ip_AbortReceivingData (uint32 u32Instance)
|
|
{
|
|
Lpuart_Uart_Ip_StatusType retVal;
|
|
boolean bIsReturn;
|
|
struct LPUART_Type * pBase;
|
|
const struct Lpuart_Uart_Ip_UserConfigType * pUartUserCfg;
|
|
struct Lpuart_Uart_Ip_StateStructureType * pUartState;
|
|
Lpuart_Uart_Ip_StatusType D.4997;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = u32Instance <= 15;
|
|
DevAssert (_1);
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
pBase = Lpuart_Uart_Ip_apBases[u32Instance];
|
|
# DEBUG BEGIN_STMT
|
|
pUartState = Lpuart_Uart_Ip_apStateStructuresArray[u32Instance];
|
|
# DEBUG BEGIN_STMT
|
|
pUartUserCfg = Lpuart_Uart_Ip_apUserConfig[u32Instance];
|
|
# DEBUG BEGIN_STMT
|
|
_2 = pUartState != 0B;
|
|
DevAssert (_2);
|
|
# DEBUG BEGIN_STMT
|
|
_3 = pUartUserCfg != 0B;
|
|
DevAssert (_3);
|
|
# DEBUG BEGIN_STMT
|
|
bIsReturn = 0;
|
|
# DEBUG BEGIN_STMT
|
|
retVal = 1;
|
|
# DEBUG BEGIN_STMT
|
|
_4 = pUartState->bIsRxBusy;
|
|
_5 = ~_4;
|
|
if (_5 != 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 4>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
retVal = 0;
|
|
# DEBUG BEGIN_STMT
|
|
bIsReturn = 1;
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
_6 = ~bIsReturn;
|
|
if (_6 != 0)
|
|
goto <bb 5>; [INV]
|
|
else
|
|
goto <bb 8>; [INV]
|
|
|
|
<bb 5> :
|
|
# DEBUG BEGIN_STMT
|
|
pUartState->eReceiveStatus = 6;
|
|
# DEBUG BEGIN_STMT
|
|
_7 = pUartUserCfg->eTransferType;
|
|
if (_7 == 1)
|
|
goto <bb 6>; [INV]
|
|
else
|
|
goto <bb 7>; [INV]
|
|
|
|
<bb 6> :
|
|
# DEBUG BEGIN_STMT
|
|
Lpuart_Uart_Ip_CompleteReceiveDataUsingInt (u32Instance);
|
|
|
|
<bb 7> :
|
|
# DEBUG BEGIN_STMT
|
|
LPUART_Uart_ClearErrorFlags (pBase);
|
|
# DEBUG BEGIN_STMT
|
|
LPUART_Uart_FlushRxBuffer (pBase);
|
|
# DEBUG BEGIN_STMT
|
|
retVal = 0;
|
|
|
|
<bb 8> :
|
|
# DEBUG BEGIN_STMT
|
|
D.4997 = retVal;
|
|
return D.4997;
|
|
|
|
}
|
|
|
|
|
|
Lpuart_Uart_Ip_GetReceiveStatus (uint32 u32Instance, uint32 * pBytesRemaining)
|
|
{
|
|
const struct Lpuart_Uart_Ip_UserConfigType * pUartUserCfg;
|
|
struct Lpuart_Uart_Ip_StateStructureType * pUartState;
|
|
Lpuart_Uart_Ip_StatusType D.4989;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = u32Instance <= 15;
|
|
DevAssert (_1);
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
pUartState = Lpuart_Uart_Ip_apStateStructuresArray[u32Instance];
|
|
# DEBUG BEGIN_STMT
|
|
pUartUserCfg = Lpuart_Uart_Ip_apUserConfig[u32Instance];
|
|
# DEBUG BEGIN_STMT
|
|
_2 = pUartState != 0B;
|
|
DevAssert (_2);
|
|
# DEBUG BEGIN_STMT
|
|
_3 = pUartUserCfg != 0B;
|
|
DevAssert (_3);
|
|
# DEBUG BEGIN_STMT
|
|
if (pBytesRemaining != 0B)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 7>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
_4 = pUartState->bIsRxBusy;
|
|
if (_4 != 0)
|
|
goto <bb 4>; [INV]
|
|
else
|
|
goto <bb 6>; [INV]
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
_5 = pUartUserCfg->eTransferType;
|
|
if (_5 == 1)
|
|
goto <bb 5>; [INV]
|
|
else
|
|
goto <bb 7>; [INV]
|
|
|
|
<bb 5> :
|
|
# DEBUG BEGIN_STMT
|
|
_6 = pUartState->u32RxSize;
|
|
*pBytesRemaining = _6;
|
|
goto <bb 7>; [INV]
|
|
|
|
<bb 6> :
|
|
# DEBUG BEGIN_STMT
|
|
*pBytesRemaining = 0;
|
|
|
|
<bb 7> :
|
|
# DEBUG BEGIN_STMT
|
|
D.4989 = pUartState->eReceiveStatus;
|
|
return D.4989;
|
|
|
|
}
|
|
|
|
|
|
Lpuart_Uart_Ip_AsyncReceive (uint32 u32Instance, uint8 * pRxBuff, uint32 u32RxSize)
|
|
{
|
|
boolean bIsReturn;
|
|
Lpuart_Uart_Ip_StatusType retVal;
|
|
struct Lpuart_Uart_Ip_StateStructureType * pUartState;
|
|
const struct Lpuart_Uart_Ip_UserConfigType * pUartUserCfg;
|
|
Lpuart_Uart_Ip_StatusType D.4978;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = u32Instance <= 15;
|
|
DevAssert (_1);
|
|
# DEBUG BEGIN_STMT
|
|
_2 = pRxBuff != 0B;
|
|
DevAssert (_2);
|
|
# DEBUG BEGIN_STMT
|
|
_3 = u32RxSize != 0;
|
|
DevAssert (_3);
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
retVal = 0;
|
|
# DEBUG BEGIN_STMT
|
|
pUartUserCfg = Lpuart_Uart_Ip_apUserConfig[u32Instance];
|
|
# DEBUG BEGIN_STMT
|
|
pUartState = Lpuart_Uart_Ip_apStateStructuresArray[u32Instance];
|
|
# DEBUG BEGIN_STMT
|
|
bIsReturn = 0;
|
|
# DEBUG BEGIN_STMT
|
|
_4 = pUartState != 0B;
|
|
DevAssert (_4);
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Enter_Uart_UART_EXCLUSIVE_AREA_03 ();
|
|
# DEBUG BEGIN_STMT
|
|
_5 = pUartState->bIsRxBusy;
|
|
if (_5 != 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 4>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Exit_Uart_UART_EXCLUSIVE_AREA_03 ();
|
|
# DEBUG BEGIN_STMT
|
|
retVal = 2;
|
|
# DEBUG BEGIN_STMT
|
|
bIsReturn = 1;
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
_6 = ~bIsReturn;
|
|
if (_6 != 0)
|
|
goto <bb 5>; [INV]
|
|
else
|
|
goto <bb 7>; [INV]
|
|
|
|
<bb 5> :
|
|
# DEBUG BEGIN_STMT
|
|
pUartState->bIsRxBusy = 1;
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Exit_Uart_UART_EXCLUSIVE_AREA_03 ();
|
|
# DEBUG BEGIN_STMT
|
|
_7 = pUartUserCfg != 0B;
|
|
DevAssert (_7);
|
|
# DEBUG BEGIN_STMT
|
|
_8 = pUartUserCfg->eTransferType;
|
|
_9 = _8 <= 1;
|
|
DevAssert (_9);
|
|
# DEBUG BEGIN_STMT
|
|
_10 = pUartUserCfg->eTransferType;
|
|
if (_10 == 1)
|
|
goto <bb 6>; [INV]
|
|
else
|
|
goto <bb 7>; [INV]
|
|
|
|
<bb 6> :
|
|
# DEBUG BEGIN_STMT
|
|
retVal = Lpuart_Uart_Ip_StartReceiveDataUsingInt (u32Instance, pRxBuff, u32RxSize);
|
|
|
|
<bb 7> :
|
|
# DEBUG BEGIN_STMT
|
|
D.4978 = retVal;
|
|
return D.4978;
|
|
|
|
}
|
|
|
|
|
|
Lpuart_Uart_Ip_StartGetData (struct LPUART_Type * pBase, uint32 u32Instance, uint32 u32StartTime)
|
|
{
|
|
struct Lpuart_Uart_Ip_StateStructureType * pUartState;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
pUartState = Lpuart_Uart_Ip_apStateStructuresArray[u32Instance];
|
|
# DEBUG BEGIN_STMT
|
|
goto <bb 14>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
_1 = LPUART_Uart_GetStatusFlag (pBase, 21);
|
|
_2 = ~_1;
|
|
if (_2 != 0)
|
|
goto <bb 4>; [INV]
|
|
else
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 4> :
|
|
_3 = LPUART_Uart_CheckTimeout (u32StartTime, 0);
|
|
_4 = ~_3;
|
|
if (_4 != 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 5> :
|
|
# DEBUG BEGIN_STMT
|
|
_5 = LPUART_Uart_GetStatusFlag (pBase, 19);
|
|
if (_5 != 0)
|
|
goto <bb 6>; [INV]
|
|
else
|
|
goto <bb 7>; [INV]
|
|
|
|
<bb 6> :
|
|
# DEBUG BEGIN_STMT
|
|
pUartState->eReceiveStatus = 5;
|
|
# DEBUG BEGIN_STMT
|
|
LPUART_Uart_SetReceiverCmd (pBase, 0);
|
|
# DEBUG BEGIN_STMT
|
|
LPUART_Uart_ClearStatusFlag (pBase, 19);
|
|
# DEBUG BEGIN_STMT
|
|
goto <bb 16>; [INV]
|
|
|
|
<bb 7> :
|
|
# DEBUG BEGIN_STMT
|
|
_6 = LPUART_Uart_GetStatusFlag (pBase, 17);
|
|
if (_6 != 0)
|
|
goto <bb 8>; [INV]
|
|
else
|
|
goto <bb 9>; [INV]
|
|
|
|
<bb 8> :
|
|
# DEBUG BEGIN_STMT
|
|
pUartState->eReceiveStatus = 7;
|
|
# DEBUG BEGIN_STMT
|
|
LPUART_Uart_SetReceiverCmd (pBase, 0);
|
|
# DEBUG BEGIN_STMT
|
|
LPUART_Uart_ClearStatusFlag (pBase, 17);
|
|
# DEBUG BEGIN_STMT
|
|
goto <bb 16>; [INV]
|
|
|
|
<bb 9> :
|
|
# DEBUG BEGIN_STMT
|
|
_7 = LPUART_Uart_GetStatusFlag (pBase, 18);
|
|
if (_7 != 0)
|
|
goto <bb 10>; [INV]
|
|
else
|
|
goto <bb 11>; [INV]
|
|
|
|
<bb 10> :
|
|
# DEBUG BEGIN_STMT
|
|
pUartState->eReceiveStatus = 9;
|
|
# DEBUG BEGIN_STMT
|
|
LPUART_Uart_SetReceiverCmd (pBase, 0);
|
|
# DEBUG BEGIN_STMT
|
|
LPUART_Uart_ClearStatusFlag (pBase, 18);
|
|
# DEBUG BEGIN_STMT
|
|
goto <bb 16>; [INV]
|
|
|
|
<bb 11> :
|
|
# DEBUG BEGIN_STMT
|
|
_8 = LPUART_Uart_GetStatusFlag (pBase, 16);
|
|
if (_8 != 0)
|
|
goto <bb 12>; [INV]
|
|
else
|
|
goto <bb 13>; [INV]
|
|
|
|
<bb 12> :
|
|
# DEBUG BEGIN_STMT
|
|
pUartState->eReceiveStatus = 8;
|
|
# DEBUG BEGIN_STMT
|
|
LPUART_Uart_SetReceiverCmd (pBase, 0);
|
|
# DEBUG BEGIN_STMT
|
|
LPUART_Uart_ClearStatusFlag (pBase, 16);
|
|
# DEBUG BEGIN_STMT
|
|
goto <bb 16>; [INV]
|
|
|
|
<bb 13> :
|
|
# DEBUG BEGIN_STMT
|
|
Lpuart_Uart_Ip_GetData (u32Instance);
|
|
|
|
<bb 14> :
|
|
# DEBUG BEGIN_STMT
|
|
_9 = pUartState->u32RxSize;
|
|
if (_9 != 0)
|
|
goto <bb 15>; [INV]
|
|
else
|
|
goto <bb 16>; [INV]
|
|
|
|
<bb 15> :
|
|
_10 = LPUART_Uart_CheckTimeout (u32StartTime, 0);
|
|
_11 = ~_10;
|
|
if (_11 != 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 16>; [INV]
|
|
|
|
<bb 16> :
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Lpuart_Uart_Ip_SyncReceive (uint32 u32Instance, uint8 * pRxBuff, uint32 u32RxSize)
|
|
{
|
|
Lpuart_Uart_Ip_StatusType retVal;
|
|
boolean bIsReturn;
|
|
uint32 u32TimeoutTicks;
|
|
uint32 u32ElapsedTime;
|
|
uint32 u32StartTime;
|
|
struct Lpuart_Uart_Ip_StateStructureType * pUartState;
|
|
struct LPUART_Type * pBase;
|
|
Lpuart_Uart_Ip_StatusType D.4934;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = u32Instance <= 15;
|
|
DevAssert (_1);
|
|
# DEBUG BEGIN_STMT
|
|
_2 = pRxBuff != 0B;
|
|
DevAssert (_2);
|
|
# DEBUG BEGIN_STMT
|
|
_3 = u32RxSize != 0;
|
|
DevAssert (_3);
|
|
# DEBUG BEGIN_STMT
|
|
pBase = Lpuart_Uart_Ip_apBases[u32Instance];
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
bIsReturn = 0;
|
|
# DEBUG BEGIN_STMT
|
|
retVal = 0;
|
|
# DEBUG BEGIN_STMT
|
|
pUartState = Lpuart_Uart_Ip_apStateStructuresArray[u32Instance];
|
|
# DEBUG BEGIN_STMT
|
|
_4 = pUartState != 0B;
|
|
DevAssert (_4);
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Enter_Uart_UART_EXCLUSIVE_AREA_02 ();
|
|
# DEBUG BEGIN_STMT
|
|
_5 = pUartState->bIsRxBusy;
|
|
if (_5 != 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 4>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Exit_Uart_UART_EXCLUSIVE_AREA_02 ();
|
|
# DEBUG BEGIN_STMT
|
|
retVal = 2;
|
|
# DEBUG BEGIN_STMT
|
|
bIsReturn = 1;
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
_6 = ~bIsReturn;
|
|
if (_6 != 0)
|
|
goto <bb 5>; [INV]
|
|
else
|
|
goto <bb 13>; [INV]
|
|
|
|
<bb 5> :
|
|
# DEBUG BEGIN_STMT
|
|
pUartState->bIsRxBusy = 1;
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Exit_Uart_UART_EXCLUSIVE_AREA_02 ();
|
|
# DEBUG BEGIN_STMT
|
|
pUartState->pRxBuff = pRxBuff;
|
|
# DEBUG BEGIN_STMT
|
|
pUartState->u32RxSize = u32RxSize;
|
|
# DEBUG BEGIN_STMT
|
|
pUartState->eReceiveStatus = 2;
|
|
# DEBUG BEGIN_STMT
|
|
LPUART_Uart_SetIntMode (pBase, 21, 0);
|
|
# DEBUG BEGIN_STMT
|
|
LPUART_Uart_SetReceiverCmd (pBase, 1);
|
|
# DEBUG BEGIN_STMT
|
|
_7 = OsIf_GetCounter (0);
|
|
u32StartTime = _7;
|
|
# DEBUG BEGIN_STMT
|
|
u32StartTime.4_8 = u32StartTime;
|
|
Lpuart_Uart_Ip_StartGetData (pBase, u32Instance, u32StartTime.4_8);
|
|
# DEBUG BEGIN_STMT
|
|
u32ElapsedTime = OsIf_GetElapsed (&u32StartTime, 0);
|
|
# DEBUG BEGIN_STMT
|
|
u32TimeoutTicks = OsIf_MicrosToTicks (0, 0);
|
|
# DEBUG BEGIN_STMT
|
|
if (u32ElapsedTime >= u32TimeoutTicks)
|
|
goto <bb 6>; [INV]
|
|
else
|
|
goto <bb 7>; [INV]
|
|
|
|
<bb 6> :
|
|
# DEBUG BEGIN_STMT
|
|
pUartState->eReceiveStatus = 3;
|
|
|
|
<bb 7> :
|
|
# DEBUG BEGIN_STMT
|
|
_9 = pUartState->eReceiveStatus;
|
|
if (_9 == 2)
|
|
goto <bb 8>; [INV]
|
|
else
|
|
goto <bb 9>; [INV]
|
|
|
|
<bb 8> :
|
|
# DEBUG BEGIN_STMT
|
|
pUartState->eReceiveStatus = 0;
|
|
|
|
<bb 9> :
|
|
# DEBUG BEGIN_STMT
|
|
_10 = pUartState->u32RxSize;
|
|
if (_10 == 0)
|
|
goto <bb 10>; [INV]
|
|
else
|
|
goto <bb 12>; [INV]
|
|
|
|
<bb 10> :
|
|
_11 = pUartState->eReceiveStatus;
|
|
if (_11 == 5)
|
|
goto <bb 11>; [INV]
|
|
else
|
|
goto <bb 12>; [INV]
|
|
|
|
<bb 11> :
|
|
# DEBUG BEGIN_STMT
|
|
pUartState->eReceiveStatus = 0;
|
|
|
|
<bb 12> :
|
|
# DEBUG BEGIN_STMT
|
|
LPUART_Uart_SetReceiverCmd (pBase, 0);
|
|
# DEBUG BEGIN_STMT
|
|
pUartState->bIsRxBusy = 0;
|
|
# DEBUG BEGIN_STMT
|
|
LPUART_Uart_Getchar (pBase);
|
|
# DEBUG BEGIN_STMT
|
|
retVal = pUartState->eReceiveStatus;
|
|
|
|
<bb 13> :
|
|
# DEBUG BEGIN_STMT
|
|
D.4934 = retVal;
|
|
u32StartTime = {CLOBBER};
|
|
return D.4934;
|
|
|
|
}
|
|
|
|
|
|
Lpuart_Uart_Ip_AbortSendingData (uint32 u32Instance)
|
|
{
|
|
Lpuart_Uart_Ip_StatusType retVal;
|
|
boolean bIsReturn;
|
|
struct LPUART_Type * pBase;
|
|
const struct Lpuart_Uart_Ip_UserConfigType * pUartUserCfg;
|
|
struct Lpuart_Uart_Ip_StateStructureType * pUartState;
|
|
Lpuart_Uart_Ip_StatusType D.4917;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = u32Instance <= 15;
|
|
DevAssert (_1);
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
pBase = Lpuart_Uart_Ip_apBases[u32Instance];
|
|
# DEBUG BEGIN_STMT
|
|
bIsReturn = 0;
|
|
# DEBUG BEGIN_STMT
|
|
retVal = 0;
|
|
# DEBUG BEGIN_STMT
|
|
pUartState = Lpuart_Uart_Ip_apStateStructuresArray[u32Instance];
|
|
# DEBUG BEGIN_STMT
|
|
pUartUserCfg = Lpuart_Uart_Ip_apUserConfig[u32Instance];
|
|
# DEBUG BEGIN_STMT
|
|
_2 = pUartState != 0B;
|
|
DevAssert (_2);
|
|
# DEBUG BEGIN_STMT
|
|
_3 = pUartUserCfg != 0B;
|
|
DevAssert (_3);
|
|
# DEBUG BEGIN_STMT
|
|
_4 = pUartState->bIsTxBusy;
|
|
_5 = ~_4;
|
|
if (_5 != 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 4>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
retVal = 0;
|
|
# DEBUG BEGIN_STMT
|
|
bIsReturn = 1;
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
_6 = ~bIsReturn;
|
|
if (_6 != 0)
|
|
goto <bb 5>; [INV]
|
|
else
|
|
goto <bb 8>; [INV]
|
|
|
|
<bb 5> :
|
|
# DEBUG BEGIN_STMT
|
|
pUartState->eTransmitStatus = 6;
|
|
# DEBUG BEGIN_STMT
|
|
_7 = pUartUserCfg->eTransferType;
|
|
if (_7 == 1)
|
|
goto <bb 6>; [INV]
|
|
else
|
|
goto <bb 7>; [INV]
|
|
|
|
<bb 6> :
|
|
# DEBUG BEGIN_STMT
|
|
Lpuart_Uart_Ip_CompleteSendDataUsingInt (u32Instance);
|
|
|
|
<bb 7> :
|
|
# DEBUG BEGIN_STMT
|
|
LPUART_Uart_FlushTxBuffer (pBase);
|
|
# DEBUG BEGIN_STMT
|
|
retVal = 0;
|
|
|
|
<bb 8> :
|
|
# DEBUG BEGIN_STMT
|
|
D.4917 = retVal;
|
|
return D.4917;
|
|
|
|
}
|
|
|
|
|
|
Lpuart_Uart_Ip_GetTransmitStatus (uint32 u32Instance, uint32 * pBytesRemaining)
|
|
{
|
|
const struct Lpuart_Uart_Ip_UserConfigType * pUartUserCfg;
|
|
struct Lpuart_Uart_Ip_StateStructureType * pUartState;
|
|
Lpuart_Uart_Ip_StatusType D.4909;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = u32Instance <= 15;
|
|
DevAssert (_1);
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
pUartState = Lpuart_Uart_Ip_apStateStructuresArray[u32Instance];
|
|
# DEBUG BEGIN_STMT
|
|
pUartUserCfg = Lpuart_Uart_Ip_apUserConfig[u32Instance];
|
|
# DEBUG BEGIN_STMT
|
|
_2 = pUartState != 0B;
|
|
DevAssert (_2);
|
|
# DEBUG BEGIN_STMT
|
|
_3 = pUartUserCfg != 0B;
|
|
DevAssert (_3);
|
|
# DEBUG BEGIN_STMT
|
|
if (pBytesRemaining != 0B)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 7>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
_4 = pUartState->bIsTxBusy;
|
|
if (_4 != 0)
|
|
goto <bb 4>; [INV]
|
|
else
|
|
goto <bb 6>; [INV]
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
_5 = pUartUserCfg->eTransferType;
|
|
if (_5 == 1)
|
|
goto <bb 5>; [INV]
|
|
else
|
|
goto <bb 7>; [INV]
|
|
|
|
<bb 5> :
|
|
# DEBUG BEGIN_STMT
|
|
_6 = pUartState->u32TxSize;
|
|
*pBytesRemaining = _6;
|
|
goto <bb 7>; [INV]
|
|
|
|
<bb 6> :
|
|
# DEBUG BEGIN_STMT
|
|
*pBytesRemaining = 0;
|
|
|
|
<bb 7> :
|
|
# DEBUG BEGIN_STMT
|
|
D.4909 = pUartState->eTransmitStatus;
|
|
return D.4909;
|
|
|
|
}
|
|
|
|
|
|
Lpuart_Uart_Ip_AsyncSend (uint32 u32Instance, const uint8 * pTxBuff, uint32 u32TxSize)
|
|
{
|
|
boolean bIsReturn;
|
|
Lpuart_Uart_Ip_StatusType retVal;
|
|
struct Lpuart_Uart_Ip_StateStructureType * pUartState;
|
|
const struct Lpuart_Uart_Ip_UserConfigType * pUartUserCfg;
|
|
Lpuart_Uart_Ip_StatusType D.4898;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = u32Instance <= 15;
|
|
DevAssert (_1);
|
|
# DEBUG BEGIN_STMT
|
|
_2 = pTxBuff != 0B;
|
|
DevAssert (_2);
|
|
# DEBUG BEGIN_STMT
|
|
_3 = u32TxSize != 0;
|
|
DevAssert (_3);
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
retVal = 0;
|
|
# DEBUG BEGIN_STMT
|
|
pUartUserCfg = Lpuart_Uart_Ip_apUserConfig[u32Instance];
|
|
# DEBUG BEGIN_STMT
|
|
pUartState = Lpuart_Uart_Ip_apStateStructuresArray[u32Instance];
|
|
# DEBUG BEGIN_STMT
|
|
bIsReturn = 0;
|
|
# DEBUG BEGIN_STMT
|
|
_4 = pUartState != 0B;
|
|
DevAssert (_4);
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Enter_Uart_UART_EXCLUSIVE_AREA_01 ();
|
|
# DEBUG BEGIN_STMT
|
|
_5 = pUartState->bIsTxBusy;
|
|
if (_5 != 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 4>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Exit_Uart_UART_EXCLUSIVE_AREA_01 ();
|
|
# DEBUG BEGIN_STMT
|
|
retVal = 2;
|
|
# DEBUG BEGIN_STMT
|
|
bIsReturn = 1;
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
_6 = ~bIsReturn;
|
|
if (_6 != 0)
|
|
goto <bb 5>; [INV]
|
|
else
|
|
goto <bb 7>; [INV]
|
|
|
|
<bb 5> :
|
|
# DEBUG BEGIN_STMT
|
|
pUartState->bIsTxBusy = 1;
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Exit_Uart_UART_EXCLUSIVE_AREA_01 ();
|
|
# DEBUG BEGIN_STMT
|
|
_7 = pUartUserCfg != 0B;
|
|
DevAssert (_7);
|
|
# DEBUG BEGIN_STMT
|
|
_8 = pUartUserCfg->eTransferType;
|
|
_9 = _8 <= 1;
|
|
DevAssert (_9);
|
|
# DEBUG BEGIN_STMT
|
|
_10 = pUartUserCfg->eTransferType;
|
|
if (_10 == 1)
|
|
goto <bb 6>; [INV]
|
|
else
|
|
goto <bb 7>; [INV]
|
|
|
|
<bb 6> :
|
|
# DEBUG BEGIN_STMT
|
|
retVal = Lpuart_Uart_Ip_StartSendDataUsingInt (u32Instance, pTxBuff, u32TxSize);
|
|
|
|
<bb 7> :
|
|
# DEBUG BEGIN_STMT
|
|
D.4898 = retVal;
|
|
return D.4898;
|
|
|
|
}
|
|
|
|
|
|
Lpuart_Uart_Ip_SyncSend (uint32 u32Instance, const uint8 * pTxBuff, uint32 u32TxSize)
|
|
{
|
|
Lpuart_Uart_Ip_StatusType retVal;
|
|
boolean bIsReturn;
|
|
uint32 u32StartTime;
|
|
struct Lpuart_Uart_Ip_StateStructureType * pUartState;
|
|
struct LPUART_Type * pBase;
|
|
Lpuart_Uart_Ip_StatusType D.4877;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = u32Instance <= 15;
|
|
DevAssert (_1);
|
|
# DEBUG BEGIN_STMT
|
|
_2 = pTxBuff != 0B;
|
|
DevAssert (_2);
|
|
# DEBUG BEGIN_STMT
|
|
_3 = u32TxSize != 0;
|
|
DevAssert (_3);
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
bIsReturn = 0;
|
|
# DEBUG BEGIN_STMT
|
|
retVal = 0;
|
|
# DEBUG BEGIN_STMT
|
|
pBase = Lpuart_Uart_Ip_apBases[u32Instance];
|
|
# DEBUG BEGIN_STMT
|
|
pUartState = Lpuart_Uart_Ip_apStateStructuresArray[u32Instance];
|
|
# DEBUG BEGIN_STMT
|
|
_4 = pUartState != 0B;
|
|
DevAssert (_4);
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Enter_Uart_UART_EXCLUSIVE_AREA_00 ();
|
|
# DEBUG BEGIN_STMT
|
|
_5 = pUartState->bIsTxBusy;
|
|
if (_5 != 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 4>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Exit_Uart_UART_EXCLUSIVE_AREA_00 ();
|
|
# DEBUG BEGIN_STMT
|
|
retVal = 2;
|
|
# DEBUG BEGIN_STMT
|
|
bIsReturn = 1;
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
_6 = ~bIsReturn;
|
|
if (_6 != 0)
|
|
goto <bb 5>; [INV]
|
|
else
|
|
goto <bb 15>; [INV]
|
|
|
|
<bb 5> :
|
|
# DEBUG BEGIN_STMT
|
|
pUartState->bIsTxBusy = 1;
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Exit_Uart_UART_EXCLUSIVE_AREA_00 ();
|
|
# DEBUG BEGIN_STMT
|
|
pUartState->pTxBuff = pTxBuff;
|
|
# DEBUG BEGIN_STMT
|
|
pUartState->u32TxSize = u32TxSize;
|
|
# DEBUG BEGIN_STMT
|
|
pUartState->eTransmitStatus = 2;
|
|
# DEBUG BEGIN_STMT
|
|
LPUART_Uart_SetIntMode (pBase, 23, 0);
|
|
# DEBUG BEGIN_STMT
|
|
LPUART_Uart_SetIntMode (pBase, 22, 0);
|
|
# DEBUG BEGIN_STMT
|
|
LPUART_Uart_SetTransmitterCmd (pBase, 1);
|
|
# DEBUG BEGIN_STMT
|
|
u32StartTime = OsIf_GetCounter (0);
|
|
# DEBUG BEGIN_STMT
|
|
goto <bb 9>; [INV]
|
|
|
|
<bb 6> :
|
|
# DEBUG BEGIN_STMT
|
|
Lpuart_Uart_Ip_PutData (u32Instance);
|
|
# DEBUG BEGIN_STMT
|
|
|
|
<bb 7> :
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
_7 = LPUART_Uart_GetStatusFlag (pBase, 23);
|
|
_8 = ~_7;
|
|
if (_8 != 0)
|
|
goto <bb 8>; [INV]
|
|
else
|
|
goto <bb 9>; [INV]
|
|
|
|
<bb 8> :
|
|
_9 = LPUART_Uart_CheckTimeout (u32StartTime, 0);
|
|
_10 = ~_9;
|
|
if (_10 != 0)
|
|
goto <bb 7>; [INV]
|
|
else
|
|
goto <bb 9>; [INV]
|
|
|
|
<bb 9> :
|
|
# DEBUG BEGIN_STMT
|
|
_11 = pUartState->u32TxSize;
|
|
if (_11 != 0)
|
|
goto <bb 10>; [INV]
|
|
else
|
|
goto <bb 11>; [INV]
|
|
|
|
<bb 10> :
|
|
_12 = LPUART_Uart_CheckTimeout (u32StartTime, 0);
|
|
_13 = ~_12;
|
|
if (_13 != 0)
|
|
goto <bb 6>; [INV]
|
|
else
|
|
goto <bb 11>; [INV]
|
|
|
|
<bb 11> :
|
|
# DEBUG BEGIN_STMT
|
|
LPUART_Uart_SetTransmitterCmd (pBase, 0);
|
|
# DEBUG BEGIN_STMT
|
|
_14 = pUartState->u32TxSize;
|
|
if (_14 != 0)
|
|
goto <bb 12>; [INV]
|
|
else
|
|
goto <bb 13>; [INV]
|
|
|
|
<bb 12> :
|
|
# DEBUG BEGIN_STMT
|
|
pUartState->eTransmitStatus = 3;
|
|
goto <bb 14>; [INV]
|
|
|
|
<bb 13> :
|
|
# DEBUG BEGIN_STMT
|
|
pUartState->eTransmitStatus = 0;
|
|
|
|
<bb 14> :
|
|
# DEBUG BEGIN_STMT
|
|
pUartState->bIsTxBusy = 0;
|
|
# DEBUG BEGIN_STMT
|
|
retVal = pUartState->eTransmitStatus;
|
|
|
|
<bb 15> :
|
|
# DEBUG BEGIN_STMT
|
|
D.4877 = retVal;
|
|
return D.4877;
|
|
|
|
}
|
|
|
|
|
|
Lpuart_Uart_Ip_Deinit (uint32 u32Instance)
|
|
{
|
|
struct LPUART_Type * pBase;
|
|
uint32 u32StartTime;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = u32Instance <= 15;
|
|
DevAssert (_1);
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
pBase = Lpuart_Uart_Ip_apBases[u32Instance];
|
|
# DEBUG BEGIN_STMT
|
|
_2 = Lpuart_Uart_Ip_apStateStructuresArray[u32Instance];
|
|
_3 = _2 != 0B;
|
|
DevAssert (_3);
|
|
# DEBUG BEGIN_STMT
|
|
u32StartTime = OsIf_GetCounter (0);
|
|
# DEBUG BEGIN_STMT
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
_4 = LPUART_Uart_GetStatusFlag (pBase, 22);
|
|
_5 = ~_4;
|
|
if (_5 != 0)
|
|
goto <bb 4>; [INV]
|
|
else
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 4> :
|
|
_6 = LPUART_Uart_CheckTimeout (u32StartTime, 0);
|
|
_7 = ~_6;
|
|
if (_7 != 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 5> :
|
|
# DEBUG BEGIN_STMT
|
|
LPUART_Uart_SetIntMode (pBase, 23, 0);
|
|
# DEBUG BEGIN_STMT
|
|
LPUART_Uart_SetIntMode (pBase, 22, 0);
|
|
# DEBUG BEGIN_STMT
|
|
LPUART_Uart_SetIntMode (pBase, 21, 0);
|
|
# DEBUG BEGIN_STMT
|
|
LPUART_Uart_SetIntMode (pBase, 27, 0);
|
|
# DEBUG BEGIN_STMT
|
|
LPUART_Uart_SetIntMode (pBase, 24, 0);
|
|
# DEBUG BEGIN_STMT
|
|
LPUART_Uart_SetIntMode (pBase, 26, 0);
|
|
# DEBUG BEGIN_STMT
|
|
LPUART_Uart_SetIntMode (pBase, 25, 0);
|
|
# DEBUG BEGIN_STMT
|
|
Lpuart_Uart_Ip_apStateStructuresArray[u32Instance] = 0B;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Lpuart_Uart_Ip_Init (uint32 u32Instance, const struct Lpuart_Uart_Ip_UserConfigType * pUserConfig)
|
|
{
|
|
uint8 * pClearStructPtr;
|
|
uint32 u32Index;
|
|
struct Lpuart_Uart_Ip_StateStructureType * pUartStatePtr;
|
|
struct LPUART_Type * pBase;
|
|
int iftmp.0;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = u32Instance <= 15;
|
|
DevAssert (_1);
|
|
# DEBUG BEGIN_STMT
|
|
_2 = pUserConfig != 0B;
|
|
DevAssert (_2);
|
|
# DEBUG BEGIN_STMT
|
|
_3 = Lpuart_Uart_Ip_apStateStructuresArray[u32Instance];
|
|
_4 = _3 == 0B;
|
|
DevAssert (_4);
|
|
# DEBUG BEGIN_STMT
|
|
_5 = pUserConfig->u8BaudOverSamplingRatio;
|
|
_6 = _5 <= 32;
|
|
DevAssert (_6);
|
|
# DEBUG BEGIN_STMT
|
|
_7 = pUserConfig->u32BaudRateDivisor;
|
|
_8 = _7 + 4294967295;
|
|
_9 = _8 <= 8190;
|
|
DevAssert (_9);
|
|
# DEBUG BEGIN_STMT
|
|
pBase = Lpuart_Uart_Ip_apBases[u32Instance];
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
_10 = pUserConfig->pStateStruct;
|
|
Lpuart_Uart_Ip_apStateStructuresArray[u32Instance] = _10;
|
|
# DEBUG BEGIN_STMT
|
|
pUartStatePtr = Lpuart_Uart_Ip_apStateStructuresArray[u32Instance];
|
|
# DEBUG BEGIN_STMT
|
|
Lpuart_Uart_Ip_apUserConfig[u32Instance] = pUserConfig;
|
|
# DEBUG BEGIN_STMT
|
|
_11 = pUserConfig->eBitCountPerChar;
|
|
if (_11 != 3)
|
|
goto <bb 4>; [INV]
|
|
else
|
|
goto <bb 3>; [INV]
|
|
|
|
<bb 3> :
|
|
_12 = pUserConfig->eParityMode;
|
|
if (_12 == 0)
|
|
goto <bb 4>; [INV]
|
|
else
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 4> :
|
|
iftmp.0 = 1;
|
|
goto <bb 6>; [INV]
|
|
|
|
<bb 5> :
|
|
iftmp.0 = 0;
|
|
|
|
<bb 6> :
|
|
_13 = (_Bool) iftmp.0;
|
|
DevAssert (_13);
|
|
# DEBUG BEGIN_STMT
|
|
pClearStructPtr = pUartStatePtr;
|
|
# DEBUG BEGIN_STMT
|
|
u32Index = 0;
|
|
goto <bb 8>; [INV]
|
|
|
|
<bb 7> :
|
|
# DEBUG BEGIN_STMT
|
|
_14 = pClearStructPtr + u32Index;
|
|
*_14 = 0;
|
|
# DEBUG BEGIN_STMT
|
|
u32Index = u32Index + 1;
|
|
|
|
<bb 8> :
|
|
# DEBUG BEGIN_STMT
|
|
if (u32Index <= 23)
|
|
goto <bb 7>; [INV]
|
|
else
|
|
goto <bb 9>; [INV]
|
|
|
|
<bb 9> :
|
|
# DEBUG BEGIN_STMT
|
|
LPUART_Uart_Init (pBase);
|
|
# DEBUG BEGIN_STMT
|
|
_15 = pUserConfig->u8BaudOverSamplingRatio;
|
|
if (_15 <= 7)
|
|
goto <bb 10>; [INV]
|
|
else
|
|
goto <bb 11>; [INV]
|
|
|
|
<bb 10> :
|
|
# DEBUG BEGIN_STMT
|
|
LPUART_Uart_EnableBothEdgeSamplingCmd (pBase);
|
|
|
|
<bb 11> :
|
|
# DEBUG BEGIN_STMT
|
|
_16 = pUserConfig->u8BaudOverSamplingRatio;
|
|
_17 = (unsigned int) _16;
|
|
_18 = _17 + 4294967295;
|
|
LPUART_Uart_SetOversamplingRatio (pBase, _18);
|
|
# DEBUG BEGIN_STMT
|
|
_19 = pUserConfig->u32BaudRateDivisor;
|
|
LPUART_Uart_SetBaudRateDivisor (pBase, _19);
|
|
# DEBUG BEGIN_STMT
|
|
_20 = pUserConfig->eParityMode;
|
|
if (_20 != 0)
|
|
goto <bb 12>; [INV]
|
|
else
|
|
goto <bb 13>; [INV]
|
|
|
|
<bb 12> :
|
|
# DEBUG BEGIN_STMT
|
|
_21 = pUserConfig->eBitCountPerChar;
|
|
LPUART_Uart_SetBitCountPerChar (pBase, _21, 1);
|
|
goto <bb 14>; [INV]
|
|
|
|
<bb 13> :
|
|
# DEBUG BEGIN_STMT
|
|
_22 = pUserConfig->eBitCountPerChar;
|
|
LPUART_Uart_SetBitCountPerChar (pBase, _22, 0);
|
|
|
|
<bb 14> :
|
|
# DEBUG BEGIN_STMT
|
|
_23 = pUserConfig->eParityMode;
|
|
LPUART_Uart_SetParityMode (pBase, _23);
|
|
# DEBUG BEGIN_STMT
|
|
_24 = pUserConfig->eStopBitsCount;
|
|
LPUART_Uart_SetStopBitCount (pBase, _24);
|
|
# DEBUG BEGIN_STMT
|
|
pUartStatePtr->eTransmitStatus = 0;
|
|
# DEBUG BEGIN_STMT
|
|
pUartStatePtr->eReceiveStatus = 0;
|
|
# DEBUG BEGIN_STMT
|
|
_25 = pUserConfig->u32BaudRate;
|
|
pUartStatePtr->u32BaudRate = _25;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
DevAssert (volatile boolean x)
|
|
{
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
x.1_1 = x;
|
|
if (x.1_1 != 0)
|
|
goto <bb 4>; [INV]
|
|
else
|
|
goto <bb 3>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
goto <bb 3>; [INV]
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
LPUART_Uart_FlushRxBuffer (struct LPUART_Type * pBase)
|
|
{
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = pBase->FIFO;
|
|
_2 = _1 | 16384;
|
|
pBase->FIFO = _2;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
LPUART_Uart_FlushTxBuffer (struct LPUART_Type * pBase)
|
|
{
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = pBase->FIFO;
|
|
_2 = _1 | 32768;
|
|
pBase->FIFO = _2;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
LPUART_Uart_CheckTimeout (uint32 startTime, uint32 timeoutUs)
|
|
{
|
|
boolean retVal;
|
|
uint32 currentTime;
|
|
uint32 timeoutTicks;
|
|
boolean D.4862;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
timeoutTicks = OsIf_MicrosToTicks (timeoutUs, 0);
|
|
# DEBUG BEGIN_STMT
|
|
currentTime = OsIf_GetCounter (0);
|
|
# DEBUG BEGIN_STMT
|
|
if (currentTime <= startTime)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 4>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = startTime - currentTime;
|
|
retVal = timeoutTicks < _1;
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
_2 = startTime - currentTime;
|
|
_3 = _2 + 16777215;
|
|
retVal = timeoutTicks < _3;
|
|
|
|
<bb 5> :
|
|
# DEBUG BEGIN_STMT
|
|
D.4862 = retVal;
|
|
return D.4862;
|
|
|
|
}
|
|
|
|
|
|
LPUART_Uart_ClearErrorFlags (struct LPUART_Type * pBase)
|
|
{
|
|
uint32 mask;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
mask = 983040;
|
|
# DEBUG BEGIN_STMT
|
|
_1 = pBase->STAT;
|
|
_2 = _1 & 1071661055;
|
|
_3 = mask | _2;
|
|
pBase->STAT = _3;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
LPUART_Uart_ClearStatusFlag (struct LPUART_Type * pBase, Lpuart_Uart_Ip_StatusFlagType statusFlag)
|
|
{
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) statusFlag;
|
|
switch (_1) <default: <L6> [INV], case 16: <L3> [INV], case 17: <L2> [INV], case 18: <L1> [INV], case 19: <L0> [INV]>
|
|
|
|
<bb 3> :
|
|
<L0>:
|
|
# DEBUG BEGIN_STMT
|
|
_2 = pBase->STAT;
|
|
_3 = _2 & 1071661055;
|
|
_4 = _3 | 524288;
|
|
pBase->STAT = _4;
|
|
# DEBUG BEGIN_STMT
|
|
goto <bb 7>; [INV]
|
|
|
|
<bb 4> :
|
|
<L1>:
|
|
# DEBUG BEGIN_STMT
|
|
_5 = pBase->STAT;
|
|
_6 = _5 & 1071661055;
|
|
_7 = _6 | 262144;
|
|
pBase->STAT = _7;
|
|
# DEBUG BEGIN_STMT
|
|
goto <bb 7>; [INV]
|
|
|
|
<bb 5> :
|
|
<L2>:
|
|
# DEBUG BEGIN_STMT
|
|
_8 = pBase->STAT;
|
|
_9 = _8 & 1071661055;
|
|
_10 = _9 | 131072;
|
|
pBase->STAT = _10;
|
|
# DEBUG BEGIN_STMT
|
|
goto <bb 7>; [INV]
|
|
|
|
<bb 6> :
|
|
<L3>:
|
|
# DEBUG BEGIN_STMT
|
|
_11 = pBase->STAT;
|
|
_12 = _11 & 1071661055;
|
|
_13 = _12 | 65536;
|
|
pBase->STAT = _13;
|
|
# DEBUG BEGIN_STMT
|
|
|
|
<bb 7> :
|
|
<L6>:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
LPUART_Uart_GetStatusFlag (const struct LPUART_Type * pBase, Lpuart_Uart_Ip_StatusFlagType eStatusFlag)
|
|
{
|
|
boolean retVal;
|
|
boolean D.4857;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
retVal = 0;
|
|
# DEBUG BEGIN_STMT
|
|
_1 = pBase->STAT;
|
|
_2 = (long unsigned int) eStatusFlag;
|
|
_3 = _1 >> _2;
|
|
_4 = _3 & 1;
|
|
retVal = _4 != 0;
|
|
# DEBUG BEGIN_STMT
|
|
D.4857 = retVal;
|
|
return D.4857;
|
|
|
|
}
|
|
|
|
|
|
LPUART_Uart_Getchar10 (const struct LPUART_Type * pBase)
|
|
{
|
|
uint16 readData;
|
|
uint16 D.4964;
|
|
unsigned char D.4963;
|
|
short unsigned int D.4962;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
_1 = pBase->CTRL;
|
|
_2 = _1 >> 30;
|
|
_3 = (short unsigned int) _2;
|
|
_4 = _3 << 9;
|
|
readData = _4 & 512;
|
|
# DEBUG BEGIN_STMT
|
|
_5 = pBase->CTRL;
|
|
_6 = _5 >> 31;
|
|
_7 = (short unsigned int) _6;
|
|
_8 = _7 << 8;
|
|
D.4962 = _8 & 256;
|
|
readData = D.4962 | readData;
|
|
# DEBUG BEGIN_STMT
|
|
_9 = pBase->DATA;
|
|
D.4963 = (unsigned char) _9;
|
|
_10 = (short unsigned int) D.4963;
|
|
readData = readData | _10;
|
|
# DEBUG BEGIN_STMT
|
|
D.4964 = readData;
|
|
return D.4964;
|
|
|
|
}
|
|
|
|
|
|
LPUART_Uart_Getchar9 (const struct LPUART_Type * pBase)
|
|
{
|
|
uint16 readData;
|
|
uint16 D.4960;
|
|
unsigned char D.4959;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
_1 = pBase->CTRL;
|
|
_2 = _1 >> 31;
|
|
_3 = (short unsigned int) _2;
|
|
_4 = _3 << 8;
|
|
readData = _4 & 256;
|
|
# DEBUG BEGIN_STMT
|
|
_5 = pBase->DATA;
|
|
D.4959 = (unsigned char) _5;
|
|
_6 = (short unsigned int) D.4959;
|
|
readData = readData | _6;
|
|
# DEBUG BEGIN_STMT
|
|
D.4960 = readData;
|
|
return D.4960;
|
|
|
|
}
|
|
|
|
|
|
LPUART_Uart_Getchar (const struct LPUART_Type * pBase)
|
|
{
|
|
uint8 D.4970;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = pBase->DATA;
|
|
D.4970 = (uint8) _1;
|
|
return D.4970;
|
|
|
|
}
|
|
|
|
|
|
LPUART_Uart_Putchar10 (struct LPUART_Type * pBase, uint16 data)
|
|
{
|
|
volatile uint8 * dataRegBytes;
|
|
uint32 ctrlRegVal;
|
|
uint8 tenthDataBit;
|
|
uint8 ninthDataBit;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
dataRegBytes = &pBase->DATA;
|
|
# DEBUG BEGIN_STMT
|
|
_1 = data >> 8;
|
|
_2 = (unsigned char) _1;
|
|
ninthDataBit = _2 & 1;
|
|
# DEBUG BEGIN_STMT
|
|
_3 = data >> 9;
|
|
_4 = (unsigned char) _3;
|
|
tenthDataBit = _4 & 1;
|
|
# DEBUG BEGIN_STMT
|
|
ctrlRegVal = pBase->CTRL;
|
|
# DEBUG BEGIN_STMT
|
|
_5 = ctrlRegVal & 3221225471;
|
|
_6 = (long unsigned int) ninthDataBit;
|
|
_7 = _6 << 30;
|
|
ctrlRegVal = _5 | _7;
|
|
# DEBUG BEGIN_STMT
|
|
_8 = ctrlRegVal & 2147483647;
|
|
_9 = (long unsigned int) tenthDataBit;
|
|
_10 = _9 << 31;
|
|
ctrlRegVal = _8 | _10;
|
|
# DEBUG BEGIN_STMT
|
|
pBase->CTRL = ctrlRegVal;
|
|
# DEBUG BEGIN_STMT
|
|
_11 = (unsigned char) data;
|
|
*dataRegBytes = _11;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
LPUART_Uart_Putchar9 (struct LPUART_Type * pBase, uint16 data)
|
|
{
|
|
volatile uint8 * dataRegBytes;
|
|
uint8 ninthDataBit;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
dataRegBytes = &pBase->DATA;
|
|
# DEBUG BEGIN_STMT
|
|
_1 = data >> 8;
|
|
_2 = (unsigned char) _1;
|
|
ninthDataBit = _2 & 1;
|
|
# DEBUG BEGIN_STMT
|
|
_3 = pBase->CTRL;
|
|
_4 = _3 & 3221225471;
|
|
_5 = (long unsigned int) ninthDataBit;
|
|
_6 = _5 << 30;
|
|
_7 = _4 | _6;
|
|
pBase->CTRL = _7;
|
|
# DEBUG BEGIN_STMT
|
|
_8 = (unsigned char) data;
|
|
*dataRegBytes = _8;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
LPUART_Uart_Putchar (struct LPUART_Type * pBase, uint8 data)
|
|
{
|
|
volatile uint8 * dataRegBytes;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
dataRegBytes = &pBase->DATA;
|
|
# DEBUG BEGIN_STMT
|
|
*dataRegBytes = data;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
LPUART_Uart_GetIntMode (const struct LPUART_Type * pBase, Lpuart_Uart_Ip_InterruptType intSrc)
|
|
{
|
|
boolean retVal;
|
|
boolean D.5103;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
retVal = 0;
|
|
# DEBUG BEGIN_STMT
|
|
_1 = pBase->CTRL;
|
|
_2 = (long unsigned int) intSrc;
|
|
_3 = _1 >> _2;
|
|
_4 = _3 & 1;
|
|
retVal = _4 != 0;
|
|
# DEBUG BEGIN_STMT
|
|
D.5103 = retVal;
|
|
return D.5103;
|
|
|
|
}
|
|
|
|
|
|
LPUART_Uart_SetIntMode (struct LPUART_Type * pBase, Lpuart_Uart_Ip_InterruptType intSrc, boolean enable)
|
|
{
|
|
unsigned int iftmp.2;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = pBase->CTRL;
|
|
_2 = (long unsigned int) intSrc;
|
|
_3 = 1 << _2;
|
|
_4 = ~_3;
|
|
_5 = _1 & _4;
|
|
if (enable != 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 4>; [INV]
|
|
|
|
<bb 3> :
|
|
iftmp.2 = 1;
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 4> :
|
|
iftmp.2 = 0;
|
|
|
|
<bb 5> :
|
|
_6 = (long unsigned int) intSrc;
|
|
_7 = iftmp.2 << _6;
|
|
_8 = _5 | _7;
|
|
pBase->CTRL = _8;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
LPUART_Uart_SetStopBitCount (struct LPUART_Type * pBase, Lpuart_Uart_Ip_StopBitCountType stopBitCount)
|
|
{
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = pBase->BAUD;
|
|
_2 = _1 & 4294959103;
|
|
_3 = (long unsigned int) stopBitCount;
|
|
_4 = _3 << 13;
|
|
_5 = _2 | _4;
|
|
pBase->BAUD = _5;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
LPUART_Uart_SetParityMode (struct LPUART_Type * pBase, Lpuart_Uart_Ip_ParityModeType parityModeType)
|
|
{
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = pBase->CTRL;
|
|
_2 = _1 & 4294967293;
|
|
_3 = parityModeType >> 1;
|
|
_4 = (long unsigned int) _3;
|
|
_5 = _4 << 1;
|
|
_6 = _2 | _5;
|
|
pBase->CTRL = _6;
|
|
# DEBUG BEGIN_STMT
|
|
_7 = pBase->CTRL;
|
|
_8 = _7 & 4294967294;
|
|
_9 = (long unsigned int) parityModeType;
|
|
_10 = _9 & 1;
|
|
_11 = _8 | _10;
|
|
pBase->CTRL = _11;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
LPUART_Uart_SetBitCountPerChar (struct LPUART_Type * pBase, Lpuart_Uart_Ip_BitCountPerCharType bitCountPerChar, boolean parity)
|
|
{
|
|
uint32 tmpBitCountPerChar;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
tmpBitCountPerChar = (uint32) bitCountPerChar;
|
|
# DEBUG BEGIN_STMT
|
|
if (parity != 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 4>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
tmpBitCountPerChar = tmpBitCountPerChar + 1;
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
if (tmpBitCountPerChar == 3)
|
|
goto <bb 5>; [INV]
|
|
else
|
|
goto <bb 6>; [INV]
|
|
|
|
<bb 5> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = pBase->BAUD;
|
|
_2 = _1 | 536870912;
|
|
pBase->BAUD = _2;
|
|
goto <bb 12>; [INV]
|
|
|
|
<bb 6> :
|
|
# DEBUG BEGIN_STMT
|
|
if (bitCountPerChar == 0)
|
|
goto <bb 7>; [INV]
|
|
else
|
|
goto <bb 10>; [INV]
|
|
|
|
<bb 7> :
|
|
# DEBUG BEGIN_STMT
|
|
if (parity != 0)
|
|
goto <bb 8>; [INV]
|
|
else
|
|
goto <bb 9>; [INV]
|
|
|
|
<bb 8> :
|
|
# DEBUG BEGIN_STMT
|
|
_3 = pBase->CTRL;
|
|
_4 = _3 & 4294965231;
|
|
pBase->CTRL = _4;
|
|
goto <bb 11>; [INV]
|
|
|
|
<bb 9> :
|
|
# DEBUG BEGIN_STMT
|
|
_5 = pBase->CTRL;
|
|
_6 = _5 | 2048;
|
|
pBase->CTRL = _6;
|
|
goto <bb 11>; [INV]
|
|
|
|
<bb 10> :
|
|
# DEBUG BEGIN_STMT
|
|
tmpBitCountPerChar = tmpBitCountPerChar + 4294967295;
|
|
# DEBUG BEGIN_STMT
|
|
_7 = pBase->CTRL;
|
|
_8 = _7 & 4294967279;
|
|
_9 = tmpBitCountPerChar << 4;
|
|
_10 = _8 | _9;
|
|
pBase->CTRL = _10;
|
|
|
|
<bb 11> :
|
|
# DEBUG BEGIN_STMT
|
|
_11 = pBase->BAUD;
|
|
_12 = _11 & 3758096383;
|
|
pBase->BAUD = _12;
|
|
|
|
<bb 12> :
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
LPUART_Uart_EnableBothEdgeSamplingCmd (struct LPUART_Type * pBase)
|
|
{
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = pBase->BAUD;
|
|
_2 = _1 | 131072;
|
|
pBase->BAUD = _2;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
LPUART_Uart_SetOversamplingRatio (struct LPUART_Type * pBase, uint32 overSamplingRatio)
|
|
{
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = pBase->BAUD;
|
|
_2 = _1 & 3774873599;
|
|
_3 = overSamplingRatio << 24;
|
|
_4 = _3 & 520093696;
|
|
_5 = _2 | _4;
|
|
pBase->BAUD = _5;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
LPUART_Uart_SetBaudRateDivisor (struct LPUART_Type * pBase, uint32 baudRateDivisor)
|
|
{
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = pBase->BAUD;
|
|
_2 = _1 & 4294959104;
|
|
_3 = baudRateDivisor & 8191;
|
|
_4 = _2 | _3;
|
|
pBase->BAUD = _4;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
LPUART_Uart_SetReceiverCmd (struct LPUART_Type * pBase, boolean enable)
|
|
{
|
|
long unsigned int iftmp.5;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = pBase->CTRL;
|
|
_2 = _1 & 4294705151;
|
|
if (enable != 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 4>; [INV]
|
|
|
|
<bb 3> :
|
|
iftmp.5 = 262144;
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 4> :
|
|
iftmp.5 = 0;
|
|
|
|
<bb 5> :
|
|
_3 = iftmp.5 | _2;
|
|
pBase->CTRL = _3;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
LPUART_Uart_SetTransmitterCmd (struct LPUART_Type * pBase, boolean enable)
|
|
{
|
|
long unsigned int iftmp.3;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = pBase->CTRL;
|
|
_2 = _1 & 4294443007;
|
|
if (enable != 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 4>; [INV]
|
|
|
|
<bb 3> :
|
|
iftmp.3 = 524288;
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 4> :
|
|
iftmp.3 = 0;
|
|
|
|
<bb 5> :
|
|
_3 = iftmp.3 | _2;
|
|
pBase->CTRL = _3;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
LPUART_Uart_Init (struct LPUART_Type * pBase)
|
|
{
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
pBase->BAUD = 251658244;
|
|
# DEBUG BEGIN_STMT
|
|
pBase->STAT = 3223306240;
|
|
# DEBUG BEGIN_STMT
|
|
pBase->CTRL = 0;
|
|
return;
|
|
|
|
}
|
|
|
|
|