ADM/GW/Debug_FLASH/RTD/src/Adc_Sar_Ip.c.016i.visibility

Marking local functions: Adc_Sar_ConfigExternalTrigger Adc_Sar_CheckAndCallNotification Adc_Sar_ResetWdog Adc_Sar_GetConvResults Adc_Sar_CheckSelfTestProgress Adc_Sar_EnableChannelWatchdog Adc_Sar_CollectMcrMasks Adc_Sar_GetIsrFlags Adc_Sar_GetMsrFlags Adc_Sar_GetMaskedResult Adc_Sar_GetResolution Adc_Sar_ResetWdogCWSELR Adc_Sar_WriteChannelMapping Adc_Sar_WriteThresholds Adc_Sar_Powerdown Adc_Sar_Powerup


Marking externally visible functions: Adc_Sar_Ip_SetExternalTrigger Adc_Sar_Ip_SetCtuMode Adc_Sar_Ip_SetConversionMode Adc_Sar_Ip_SetWdgThreshold Adc_Sar_Ip_SetDmaClearSource Adc_Sar_Ip_DisableChannelDmaAll Adc_Sar_Ip_DisableChannelDma Adc_Sar_Ip_EnableChannelDma Adc_Sar_Ip_DisableDma Adc_Sar_Ip_EnableDma Adc_Sar_Ip_DisablePresampleConversion Adc_Sar_Ip_EnablePresampleConversion Adc_Sar_Ip_DisableChannelPresampling Adc_Sar_Ip_EnableChannelPresampling Adc_Sar_Ip_SetPresamplingSource Adc_Sar_Ip_AbortChain Adc_Sar_Ip_AbortConversion Adc_Sar_Ip_SetAveraging Adc_Sar_Ip_SetSampleTimes Adc_Sar_Ip_SetClockMode Adc_Sar_Ip_DisableChannelNotifications Adc_Sar_Ip_EnableChannelNotifications Adc_Sar_Ip_DisableNotifications Adc_Sar_Ip_EnableNotifications Adc_Sar_Ip_Powerdown Adc_Sar_Ip_Powerup Adc_Sar_Ip_DoCalibration Adc_Sar_Ip_GetConvResult Adc_Sar_Ip_GetConvData Adc_Sar_Ip_GetConvResultsToArray Adc_Sar_Ip_GetConvDataToArray Adc_Sar_Ip_SelfTest Adc_Sar_Ip_ClearStatusFlags Adc_Sar_Ip_GetStatusFlags Adc_Sar_Ip_StartConversion Adc_Sar_Ip_SetResolution Adc_Sar_Ip_DisableChannel Adc_Sar_Ip_EnableChannel Adc_Sar_Ip_ChainConfig Adc_Sar_Ip_Deinit Adc_Sar_Ip_Init Adc_Sar_Ip_IRQHandler Adc_Sar_Ip_GetDataAddress


Marking externally visible variables:


Reclaiming functions:
Reclaiming variables:
Clearing address taken flags:
Symbol table:

SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_21/143 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_21) @06e227e0
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Adc_Sar_ConfigExternalTrigger/22 
  Calls: 
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_21/142 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_21) @06e22700
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Adc_Sar_ConfigExternalTrigger/22 
  Calls: 
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_20/141 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_20) @06e22460
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Adc_Sar_Ip_SetCtuMode/63 Adc_Sar_Ip_SetCtuMode/63 
  Calls: 
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_20/140 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_20) @06e22380
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Adc_Sar_Ip_SetCtuMode/63 Adc_Sar_Ip_SetCtuMode/63 
  Calls: 
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_19/139 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_19) @06e221c0
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Adc_Sar_Ip_SetConversionMode/62 
  Calls: 
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_19/138 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_19) @06e220e0
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Adc_Sar_Ip_SetConversionMode/62 
  Calls: 
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_32/137 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_32) @06e18ee0
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Adc_Sar_Ip_SetWdgThreshold/61 
  Calls: 
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_32/136 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_32) @06e18e00
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Adc_Sar_Ip_SetWdgThreshold/61 
  Calls: 
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_45/135 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_45) @06e18c40
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Adc_Sar_Ip_SetDmaClearSource/60 
  Calls: 
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_45/134 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_45) @06e18b60
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Adc_Sar_Ip_SetDmaClearSource/60 
  Calls: 
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_48/133 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_48) @06e189a0
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Adc_Sar_Ip_DisableChannelDmaAll/59 
  Calls: 
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_48/132 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_48) @06e188c0
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Adc_Sar_Ip_DisableChannelDmaAll/59 
  Calls: 
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_47/131 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_47) @06e18700
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Adc_Sar_Ip_DisableChannelDma/58 
  Calls: 
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_47/130 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_47) @06e18620
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Adc_Sar_Ip_DisableChannelDma/58 
  Calls: 
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_46/129 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_46) @06e18460
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Adc_Sar_Ip_EnableChannelDma/57 
  Calls: 
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_46/128 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_46) @06e18380
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Adc_Sar_Ip_EnableChannelDma/57 
  Calls: 
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_44/127 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_44) @06e181c0
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Adc_Sar_Ip_DisableDma/56 
  Calls: 
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_44/126 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_44) @06e180e0
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Adc_Sar_Ip_DisableDma/56 
  Calls: 
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_43/125 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_43) @06e10ee0
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Adc_Sar_Ip_EnableDma/55 
  Calls: 
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_43/124 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_43) @06e10e00
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Adc_Sar_Ip_EnableDma/55 
  Calls: 
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_40/123 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_40) @06e10c40
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Adc_Sar_Ip_DisablePresampleConversion/54 
  Calls: 
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_40/122 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_40) @06e10b60
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Adc_Sar_Ip_DisablePresampleConversion/54 
  Calls: 
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_39/121 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_39) @06e109a0
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Adc_Sar_Ip_EnablePresampleConversion/53 
  Calls: 
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_39/120 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_39) @06e108c0
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Adc_Sar_Ip_EnablePresampleConversion/53 
  Calls: 
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_42/119 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_42) @06e10700
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Adc_Sar_Ip_DisableChannelPresampling/52 
  Calls: 
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_42/118 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_42) @06e10620
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Adc_Sar_Ip_DisableChannelPresampling/52 
  Calls: 
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_41/117 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_41) @06e10460
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Adc_Sar_Ip_EnableChannelPresampling/51 
  Calls: 
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_41/116 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_41) @06e10380
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Adc_Sar_Ip_EnableChannelPresampling/51 
  Calls: 
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_38/115 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_38) @06e101c0
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Adc_Sar_Ip_SetPresamplingSource/50 
  Calls: 
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_38/114 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_38) @06e100e0
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Adc_Sar_Ip_SetPresamplingSource/50 
  Calls: 
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_18/113 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_18) @06e01ee0
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Adc_Sar_Ip_AbortChain/49 
  Calls: 
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_18/112 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_18) @06e01e00
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Adc_Sar_Ip_AbortChain/49 
  Calls: 
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_17/111 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_17) @06e01c40
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Adc_Sar_Ip_AbortConversion/48 
  Calls: 
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_17/110 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_17) @06e01b60
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Adc_Sar_Ip_AbortConversion/48 
  Calls: 
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_16/109 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_16) @06e019a0
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Adc_Sar_Ip_SetAveraging/47 
  Calls: 
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_16/108 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_16) @06e018c0
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Adc_Sar_Ip_SetAveraging/47 
  Calls: 
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_15/107 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_15) @06e01620
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Adc_Sar_Ip_SetClockMode/45 
  Calls: 
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_15/106 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_15) @06e01540
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Adc_Sar_Ip_SetClockMode/45 
  Calls: 
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_29/105 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_29) @06e01380
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Adc_Sar_Ip_DisableChannelNotifications/44 
  Calls: 
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_29/104 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_29) @06e012a0
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Adc_Sar_Ip_DisableChannelNotifications/44 
  Calls: 
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_31/103 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_31) @06e011c0
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Adc_Sar_Ip_DisableChannelNotifications/44 
  Calls: 
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_31/102 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_31) @06e010e0
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Adc_Sar_Ip_DisableChannelNotifications/44 
  Calls: 
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_28/101 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_28) @06df7ee0
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Adc_Sar_Ip_EnableChannelNotifications/43 
  Calls: 
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_28/100 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_28) @06df7e00
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Adc_Sar_Ip_EnableChannelNotifications/43 
  Calls: 
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_30/99 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_30) @06df7d20
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Adc_Sar_Ip_EnableChannelNotifications/43 
  Calls: 
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_30/98 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_30) @06df7c40
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Adc_Sar_Ip_EnableChannelNotifications/43 
  Calls: 
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_34/97 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_34) @06df7a80
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Adc_Sar_Ip_DisableNotifications/42 
  Calls: 
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_34/96 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_34) @06df79a0
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Adc_Sar_Ip_DisableNotifications/42 
  Calls: 
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_33/95 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_33) @06df77e0
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Adc_Sar_Ip_EnableNotifications/41 
  Calls: 
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_33/94 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_33) @06df7700
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Adc_Sar_Ip_EnableNotifications/41 
  Calls: 
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_14/93 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_14) @06df7460
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Adc_Sar_Ip_Powerdown/40 
  Calls: 
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_14/92 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_14) @06df7380
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Adc_Sar_Ip_Powerdown/40 
  Calls: 
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_13/91 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_13) @06df70e0
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Adc_Sar_Ip_Powerup/39 
  Calls: 
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_13/90 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_13) @06df7000
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Adc_Sar_Ip_Powerup/39 
  Calls: 
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_36/89 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_36) @06ddee00
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Adc_Sar_Ip_DoCalibration/38 
  Calls: 
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_36/88 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_36) @06dded20
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Adc_Sar_Ip_DoCalibration/38 
  Calls: 
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_12/87 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_12) @06ddec40
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Adc_Sar_Ip_DoCalibration/38 Adc_Sar_Ip_DoCalibration/38 
  Calls: 
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_12/86 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_12) @06ddeb60
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Adc_Sar_Ip_DoCalibration/38 Adc_Sar_Ip_DoCalibration/38 
  Calls: 
OsIf_GetElapsed/85 (OsIf_GetElapsed) @06dde0e0
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Adc_Sar_Ip_AbortChain/49 Adc_Sar_Ip_Powerdown/40 Adc_Sar_Ip_Powerup/39 Adc_Sar_Ip_DoCalibration/38 Adc_Sar_CheckSelfTestProgress/17 Adc_Sar_CheckSelfTestProgress/17 Adc_Sar_Ip_SelfTest/33 
  Calls: 
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_35/84 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_35) @06dde000
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Adc_Sar_Ip_SelfTest/33 Adc_Sar_Ip_SelfTest/33 
  Calls: 
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_35/83 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_35) @06dd3ee0
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Adc_Sar_Ip_SelfTest/33 Adc_Sar_Ip_SelfTest/33 
  Calls: 
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_11/82 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_11) @06dd3e00
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Adc_Sar_Ip_SelfTest/33 Adc_Sar_Ip_SelfTest/33 Adc_Sar_Ip_SelfTest/33 
  Calls: 
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_11/81 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_11) @06dd3d20
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Adc_Sar_Ip_SelfTest/33 Adc_Sar_Ip_SelfTest/33 Adc_Sar_Ip_SelfTest/33 
  Calls: 
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_25/80 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_25) @06dd3c40
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Adc_Sar_Ip_SelfTest/33 
  Calls: 
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_25/79 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_25) @06dd3b60
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Adc_Sar_Ip_SelfTest/33 
  Calls: 
OsIf_GetCounter/78 (OsIf_GetCounter) @06dd3a80
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Adc_Sar_Ip_AbortChain/49 Adc_Sar_Ip_Powerdown/40 Adc_Sar_Ip_Powerup/39 Adc_Sar_Ip_DoCalibration/38 Adc_Sar_CheckSelfTestProgress/17 Adc_Sar_Ip_SelfTest/33 
  Calls: 
OsIf_MicrosToTicks/77 (OsIf_MicrosToTicks) @06dd39a0
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Adc_Sar_Ip_AbortChain/49 Adc_Sar_Ip_Powerdown/40 Adc_Sar_Ip_Powerup/39 Adc_Sar_Ip_DoCalibration/38 Adc_Sar_CheckSelfTestProgress/17 Adc_Sar_Ip_SelfTest/33 
  Calls: 
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_10/76 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_10) @06dd3460
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Adc_Sar_Ip_StartConversion/30 
  Calls: 
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_10/75 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_10) @06dd3380
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Adc_Sar_Ip_StartConversion/30 
  Calls: 
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_37/74 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_37) @06dd31c0
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Adc_Sar_Ip_SetResolution/29 
  Calls: 
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_37/73 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_37) @06dd30e0
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Adc_Sar_Ip_SetResolution/29 
  Calls: 
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_27/72 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_27) @04aff1c0
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Adc_Sar_Ip_DisableChannel/28 
  Calls: 
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_27/71 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_27) @04affee0
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Adc_Sar_Ip_DisableChannel/28 
  Calls: 
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_24/70 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_24) @04affe00
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Adc_Sar_Ip_DisableChannel/28 
  Calls: 
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_24/69 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_24) @04affd20
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Adc_Sar_Ip_DisableChannel/28 
  Calls: 
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_26/68 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_26) @04affb60
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Adc_Sar_Ip_EnableChannel/27 
  Calls: 
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_26/67 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_26) @04affa80
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Adc_Sar_Ip_EnableChannel/27 
  Calls: 
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_23/66 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_23) @04aff9a0
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Adc_Sar_Ip_EnableChannel/27 
  Calls: 
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_23/65 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_23) @04aff8c0
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Adc_Sar_Ip_EnableChannel/27 
  Calls: 
Adc_Sar_Ip_SetExternalTrigger/64 (Adc_Sar_Ip_SetExternalTrigger) @06da9700
  Type: function definition analyzed
  Visibility: externally_visible public
  References: 
  Referring: 
  Availability: available
  Function flags: body optimize_size
  Called by: 
  Calls: Adc_Sar_ConfigExternalTrigger/22 Adc_Sar_ConfigExternalTrigger/22 Adc_Sar_ConfigExternalTrigger/22 Adc_Sar_ConfigExternalTrigger/22 
Adc_Sar_Ip_SetCtuMode/63 (Adc_Sar_Ip_SetCtuMode) @06da9460
  Type: function definition analyzed
  Visibility: externally_visible public
  References: pAdcBase/7 (read)u32AdcFeatureBitmap/10 (read)
  Referring: 
  Availability: available
  Function flags: body optimize_size
  Called by: 
  Calls: Adc_Sar_Ip_Powerup/39 SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_20/141 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_20/140 Adc_Sar_Ip_Powerdown/40 SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_20/141 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_20/140 
Adc_Sar_Ip_SetConversionMode/62 (Adc_Sar_Ip_SetConversionMode) @06d51ee0
  Type: function definition analyzed
  Visibility: externally_visible public
  References: pAdcBase/7 (read)
  Referring: 
  Availability: available
  Function flags: body optimize_size
  Called by: 
  Calls: SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_19/139 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_19/138 
Adc_Sar_Ip_SetWdgThreshold/61 (Adc_Sar_Ip_SetWdgThreshold) @06d51a80
  Type: function definition analyzed
  Visibility: externally_visible public
  References: pAdcBase/7 (read)
  Referring: 
  Availability: available
  Function flags: body optimize_size
  Called by: Adc_Sar_Ip_Init/24 
  Calls: SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_32/137 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_32/136 Adc_Sar_WriteThresholds/4 Adc_Sar_GetResolution/11 
Adc_Sar_Ip_SetDmaClearSource/60 (Adc_Sar_Ip_SetDmaClearSource) @06d51460
  Type: function definition analyzed
  Visibility: externally_visible public
  References: pAdcBase/7 (read)
  Referring: 
  Availability: available
  Function flags: body optimize_size
  Called by: Adc_Sar_Ip_Init/24 
  Calls: SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_45/135 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_45/134 
Adc_Sar_Ip_DisableChannelDmaAll/59 (Adc_Sar_Ip_DisableChannelDmaAll) @06d510e0
  Type: function definition analyzed
  Visibility: externally_visible public
  References: pAdcBase/7 (read)u32AdcChanBitmap/9 (read)u32AdcChanBitmap/9 (read)
  Referring: 
  Availability: available
  Function flags: body optimize_size
  Called by: 
  Calls: SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_48/133 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_48/132 
Adc_Sar_Ip_DisableChannelDma/58 (Adc_Sar_Ip_DisableChannelDma) @06d4ba80
  Type: function definition analyzed
  Visibility: externally_visible public
  References: pAdcBase/7 (read)
  Referring: 
  Availability: available
  Function flags: body optimize_size
  Called by: 
  Calls: SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_47/131 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_47/130 
Adc_Sar_Ip_EnableChannelDma/57 (Adc_Sar_Ip_EnableChannelDma) @06d4b2a0
  Type: function definition analyzed
  Visibility: externally_visible public
  References: pAdcBase/7 (read)
  Referring: 
  Availability: available
  Function flags: body optimize_size
  Called by: 
  Calls: SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_46/129 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_46/128 
Adc_Sar_Ip_DisableDma/56 (Adc_Sar_Ip_DisableDma) @06d4bd20
  Type: function definition analyzed
  Visibility: externally_visible public
  References: pAdcBase/7 (read)
  Referring: 
  Availability: available
  Function flags: body optimize_size
  Called by: 
  Calls: SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_44/127 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_44/126 
Adc_Sar_Ip_EnableDma/55 (Adc_Sar_Ip_EnableDma) @06d4b9a0
  Type: function definition analyzed
  Visibility: externally_visible public
  References: pAdcBase/7 (read)
  Referring: 
  Availability: available
  Function flags: body optimize_size
  Called by: 
  Calls: SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_43/125 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_43/124 
Adc_Sar_Ip_DisablePresampleConversion/54 (Adc_Sar_Ip_DisablePresampleConversion) @06d4b620
  Type: function definition analyzed
  Visibility: externally_visible public
  References: u32AdcFeatureBitmap/10 (read)pAdcBase/7 (read)
  Referring: 
  Availability: available
  Function flags: body optimize_size
  Called by: 
  Calls: SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_40/123 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_40/122 
Adc_Sar_Ip_EnablePresampleConversion/53 (Adc_Sar_Ip_EnablePresampleConversion) @06d4b1c0
  Type: function definition analyzed
  Visibility: externally_visible public
  References: u32AdcFeatureBitmap/10 (read)pAdcBase/7 (read)
  Referring: 
  Availability: available
  Function flags: body optimize_size
  Called by: 
  Calls: SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_39/121 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_39/120 
Adc_Sar_Ip_DisableChannelPresampling/52 (Adc_Sar_Ip_DisableChannelPresampling) @06d43b60
  Type: function definition analyzed
  Visibility: externally_visible public
  References: u32AdcFeatureBitmap/10 (read)pAdcBase/7 (read)
  Referring: 
  Availability: available
  Function flags: body optimize_size
  Called by: 
  Calls: SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_42/119 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_42/118 
Adc_Sar_Ip_EnableChannelPresampling/51 (Adc_Sar_Ip_EnableChannelPresampling) @06d43e00
  Type: function definition analyzed
  Visibility: externally_visible public
  References: u32AdcFeatureBitmap/10 (read)pAdcBase/7 (read)
  Referring: 
  Availability: available
  Function flags: body optimize_size
  Called by: 
  Calls: SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_41/117 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_41/116 
Adc_Sar_Ip_SetPresamplingSource/50 (Adc_Sar_Ip_SetPresamplingSource) @06d43a80
  Type: function definition analyzed
  Visibility: externally_visible public
  References: u32AdcFeatureBitmap/10 (read)pAdcBase/7 (read)
  Referring: 
  Availability: available
  Function flags: body optimize_size
  Called by: Adc_Sar_Ip_Init/24 Adc_Sar_Ip_Init/24 Adc_Sar_Ip_Init/24 
  Calls: SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_38/115 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_38/114 
Adc_Sar_Ip_AbortChain/49 (Adc_Sar_Ip_AbortChain) @06d43460
  Type: function definition analyzed
  Visibility: externally_visible public
  References: pAdcBase/7 (read)
  Referring: 
  Availability: available
  Function flags: body optimize_size
  Called by: Adc_Sar_Ip_Init/24 
  Calls: OsIf_GetElapsed/85 SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_18/113 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_18/112 OsIf_GetCounter/78 OsIf_MicrosToTicks/77 
Adc_Sar_Ip_AbortConversion/48 (Adc_Sar_Ip_AbortConversion) @06d43000
  Type: function definition analyzed
  Visibility: externally_visible public
  References: pAdcBase/7 (read)
  Referring: 
  Availability: available
  Function flags: body optimize_size
  Called by: 
  Calls: SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_17/111 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_17/110 
Adc_Sar_Ip_SetAveraging/47 (Adc_Sar_Ip_SetAveraging) @06c58ee0
  Type: function definition analyzed
  Visibility: externally_visible public
  References: pAdcBase/7 (read)
  Referring: 
  Availability: available
  Function flags: body optimize_size
  Called by: Adc_Sar_Ip_SetClockMode/45 
  Calls: SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_16/109 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_16/108 
Adc_Sar_Ip_SetSampleTimes/46 (Adc_Sar_Ip_SetSampleTimes) @06c58a80
  Type: function definition analyzed
  Visibility: externally_visible public
  References: pAdcBase/7 (read)u32AdcChanBitmap/9 (read)u32AdcChanBitmap/9 (read)u32AdcChanBitmap/9 (read)
  Referring: 
  Availability: available
  Function flags: body optimize_size
  Called by: Adc_Sar_Ip_SetClockMode/45 
  Calls: 
Adc_Sar_Ip_SetClockMode/45 (Adc_Sar_Ip_SetClockMode) @06c58000
  Type: function definition analyzed
  Visibility: externally_visible public
  References: pAdcBase/7 (read)
  Referring: 
  Availability: available
  Function flags: body optimize_size
  Called by: 
  Calls: Adc_Sar_Ip_SetSampleTimes/46 Adc_Sar_Ip_SetAveraging/47 Adc_Sar_Ip_Powerup/39 SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_15/107 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_15/106 Adc_Sar_Ip_Powerdown/40 
Adc_Sar_Ip_DisableChannelNotifications/44 (Adc_Sar_Ip_DisableChannelNotifications) @06c50e00
  Type: function definition analyzed
  Visibility: externally_visible public
  References: pAdcBase/7 (read)u32AdcChanBitmap/9 (read)u32AdcChanBitmap/9 (read)
  Referring: 
  Availability: available
  Function flags: body optimize_size
  Called by: 
  Calls: SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_29/105 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_29/104 SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_31/103 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_31/102 
Adc_Sar_Ip_EnableChannelNotifications/43 (Adc_Sar_Ip_EnableChannelNotifications) @06c509a0
  Type: function definition analyzed
  Visibility: externally_visible public
  References: pAdcBase/7 (read)u32AdcChanBitmap/9 (read)u32AdcChanBitmap/9 (read)
  Referring: 
  Availability: available
  Function flags: body optimize_size
  Called by: Adc_Sar_EnableChannelWatchdog/16 
  Calls: SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_28/101 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_28/100 SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_30/99 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_30/98 
Adc_Sar_Ip_DisableNotifications/42 (Adc_Sar_Ip_DisableNotifications) @06c50540
  Type: function definition analyzed
  Visibility: externally_visible public
  References: pAdcBase/7 (read)u32AdcFeatureBitmap/10 (read)
  Referring: 
  Availability: available
  Function flags: body optimize_size
  Called by: 
  Calls: SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_34/97 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_34/96 
Adc_Sar_Ip_EnableNotifications/41 (Adc_Sar_Ip_EnableNotifications) @06c48620
  Type: function definition analyzed
  Visibility: externally_visible public
  References: pAdcBase/7 (read)u32AdcFeatureBitmap/10 (read)
  Referring: 
  Availability: available
  Function flags: body optimize_size
  Called by: 
  Calls: SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_33/95 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_33/94 
Adc_Sar_Ip_Powerdown/40 (Adc_Sar_Ip_Powerdown) @06c488c0
  Type: function definition analyzed
  Visibility: externally_visible public
  References: pAdcBase/7 (read)
  Referring: 
  Availability: available
  Function flags: body optimize_size
  Called by: Adc_Sar_Ip_SetCtuMode/63 Adc_Sar_Ip_SetClockMode/45 Adc_Sar_Ip_DoCalibration/38 Adc_Sar_Ip_DoCalibration/38 Adc_Sar_Ip_Deinit/25 Adc_Sar_Ip_Init/24 
  Calls: OsIf_GetElapsed/85 SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_14/93 Adc_Sar_Powerdown/2 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_14/92 OsIf_GetCounter/78 OsIf_MicrosToTicks/77 
Adc_Sar_Ip_Powerup/39 (Adc_Sar_Ip_Powerup) @06c48540
  Type: function definition analyzed
  Visibility: externally_visible public
  References: pAdcBase/7 (read)
  Referring: 
  Availability: available
  Function flags: body optimize_size
  Called by: Adc_Sar_Ip_SetCtuMode/63 Adc_Sar_Ip_SetClockMode/45 Adc_Sar_Ip_DoCalibration/38 Adc_Sar_Ip_DoCalibration/38 Adc_Sar_Ip_Init/24 
  Calls: OsIf_GetElapsed/85 SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_13/91 Adc_Sar_Powerup/1 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_13/90 OsIf_GetCounter/78 OsIf_MicrosToTicks/77 
Adc_Sar_Ip_DoCalibration/38 (Adc_Sar_Ip_DoCalibration) @06c481c0
  Type: function definition analyzed
  Visibility: externally_visible public
  References: pAdcBase/7 (read)aAdcSarState/8 (read)
  Referring: 
  Availability: available
  Function flags: body optimize_size
  Called by: 
  Calls: Adc_Sar_Ip_Powerup/39 SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_12/87 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_12/86 Adc_Sar_Ip_Powerdown/40 OsIf_GetElapsed/85 SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_36/89 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_36/88 Adc_Sar_Ip_Powerup/39 SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_12/87 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_12/86 Adc_Sar_Ip_Powerdown/40 OsIf_GetCounter/78 OsIf_MicrosToTicks/77 
Adc_Sar_Ip_GetConvResult/37 (Adc_Sar_Ip_GetConvResult) @06c41380
  Type: function definition analyzed
  Visibility: externally_visible public
  References: pAdcBase/7 (read)
  Referring: 
  Availability: available
  Function flags: body optimize_size
  Called by: 
  Calls: Adc_Sar_GetMaskedResult/12 
Adc_Sar_Ip_GetConvData/36 (Adc_Sar_Ip_GetConvData) @06c41b60
  Type: function definition analyzed
  Visibility: externally_visible public
  References: pAdcBase/7 (read)
  Referring: 
  Availability: available
  Function flags: body optimize_size
  Called by: 
  Calls: Adc_Sar_GetMaskedResult/12 
Adc_Sar_Ip_GetConvResultsToArray/35 (Adc_Sar_Ip_GetConvResultsToArray) @06c417e0
  Type: function definition analyzed
  Visibility: externally_visible public
  References: 
  Referring: 
  Availability: available
  Function flags: body optimize_size
  Called by: 
  Calls: Adc_Sar_GetConvResults/18 
Adc_Sar_Ip_GetConvDataToArray/34 (Adc_Sar_Ip_GetConvDataToArray) @06c41540
  Type: function definition analyzed
  Visibility: externally_visible public
  References: 
  Referring: 
  Availability: available
  Function flags: body optimize_size
  Called by: 
  Calls: Adc_Sar_GetConvResults/18 
Adc_Sar_Ip_SelfTest/33 (Adc_Sar_Ip_SelfTest) @06c412a0
  Type: function definition analyzed
  Visibility: externally_visible public
  References: pAdcBase/7 (read)
  Referring: 
  Availability: available
  Function flags: body optimize_size
  Called by: 
  Calls: SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_35/84 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_35/83 OsIf_GetElapsed/85 SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_11/82 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_11/81 Adc_Sar_CheckSelfTestProgress/17 SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_11/82 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_11/81 SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_35/84 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_35/83 SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_11/82 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_11/81 SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_25/80 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_25/79 OsIf_GetCounter/78 OsIf_MicrosToTicks/77 
Adc_Sar_Ip_ClearStatusFlags/32 (Adc_Sar_Ip_ClearStatusFlags) @06c3c9a0
  Type: function definition analyzed
  Visibility: externally_visible public
  References: pAdcBase/7 (read)u32AdcFeatureBitmap/10 (read)
  Referring: 
  Availability: available
  Function flags: body optimize_size
  Called by: Adc_Sar_Ip_Deinit/25 
  Calls: 
Adc_Sar_Ip_GetStatusFlags/31 (Adc_Sar_Ip_GetStatusFlags) @06c3c1c0
  Type: function definition analyzed
  Visibility: externally_visible public
  References: 
  Referring: 
  Availability: available
  Function flags: body optimize_size
  Called by: 
  Calls: Adc_Sar_GetIsrFlags/14 Adc_Sar_GetMsrFlags/13 
Adc_Sar_Ip_StartConversion/30 (Adc_Sar_Ip_StartConversion) @06c2fc40
  Type: function definition analyzed
  Visibility: externally_visible public
  References: pAdcBase/7 (read)
  Referring: 
  Availability: available
  Function flags: body optimize_size
  Called by: 
  Calls: SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_10/76 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_10/75 
Adc_Sar_Ip_SetResolution/29 (Adc_Sar_Ip_SetResolution) @06c2fee0
  Type: function definition analyzed
  Visibility: externally_visible public
  References: pAdcBase/7 (read)
  Referring: 
  Availability: available
  Function flags: body optimize_size
  Called by: Adc_Sar_Ip_Deinit/25 Adc_Sar_Ip_Init/24 
  Calls: SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_37/74 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_37/73 
Adc_Sar_Ip_DisableChannel/28 (Adc_Sar_Ip_DisableChannel) @06c2fb60
  Type: function definition analyzed
  Visibility: externally_visible public
  References: pAdcBase/7 (read)
  Referring: 
  Availability: available
  Function flags: body optimize_size
  Called by: 
  Calls: SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_27/72 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_27/71 SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_24/70 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_24/69 
Adc_Sar_Ip_EnableChannel/27 (Adc_Sar_Ip_EnableChannel) @06c2f8c0
  Type: function definition analyzed
  Visibility: externally_visible public
  References: pAdcBase/7 (read)
  Referring: 
  Availability: available
  Function flags: body optimize_size
  Called by: 
  Calls: SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_26/68 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_26/67 SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_23/66 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_23/65 
Adc_Sar_Ip_ChainConfig/26 (Adc_Sar_Ip_ChainConfig) @06c2f620
  Type: function definition analyzed
  Visibility: externally_visible public
  References: pAdcBase/7 (read)u32AdcChanBitmap/9 (read)u32AdcChanBitmap/9 (read)
  Referring: 
  Availability: available
  Function flags: body optimize_size
  Called by: 
  Calls: 
Adc_Sar_Ip_Deinit/25 (Adc_Sar_Ip_Deinit) @06c2f1c0
  Type: function definition analyzed
  Visibility: externally_visible public
  References: pAdcBase/7 (read)u32AdcChanBitmap/9 (read)u32AdcChanBitmap/9 (read)u32AdcChanBitmap/9 (read)aAdcSarState/8 (write)
  Referring: 
  Availability: available
  Function flags: body optimize_size
  Called by: 
  Calls: Adc_Sar_Ip_Powerdown/40 Adc_Sar_Ip_SetResolution/29 Adc_Sar_Ip_ClearStatusFlags/32 Adc_Sar_ResetWdog/19 Adc_Sar_Ip_Init/24 
Adc_Sar_Ip_Init/24 (Adc_Sar_Ip_Init) @06b1bd20
  Type: function definition analyzed
  Visibility: externally_visible public
  References: pAdcBase/7 (read)aAdcSarState/8 (write)u32AdcChanBitmap/9 (read)u32AdcChanBitmap/9 (read)u32AdcChanBitmap/9 (read)u32AdcFeatureBitmap/10 (read)u32AdcChanBitmap/9 (read)u32AdcChanBitmap/9 (read)aAdcSarState/8 (write)aAdcSarState/8 (write)aAdcSarState/8 (write)aAdcSarState/8 (write)aAdcSarState/8 (write)aAdcSarState/8 (write)aAdcSarState/8 (write)
  Referring: 
  Availability: available
  Function flags: body optimize_size
  Called by: Adc_Sar_Ip_Deinit/25 
  Calls: Adc_Sar_Ip_SetDmaClearSource/60 Adc_Sar_Ip_SetPresamplingSource/50 Adc_Sar_Ip_SetPresamplingSource/50 Adc_Sar_Ip_SetPresamplingSource/50 Adc_Sar_EnableChannelWatchdog/16 Adc_Sar_Ip_SetWdgThreshold/61 Adc_Sar_Ip_SetResolution/29 Adc_Sar_Ip_Powerup/39 Adc_Sar_CollectMcrMasks/15 Adc_Sar_Ip_Powerdown/40 Adc_Sar_Ip_AbortChain/49 
Adc_Sar_Ip_IRQHandler/23 (Adc_Sar_Ip_IRQHandler) @06b12ee0
  Type: function definition analyzed
  Visibility: externally_visible public
  References: pAdcBase/7 (read)aAdcSarState/8 (read)aAdcSarState/8 (read)aAdcSarState/8 (read)
  Referring: 
  Availability: available
  Function flags: body optimize_size
  Called by: 
  Calls: Adc_Sar_CheckAndCallNotification/20 Adc_Sar_CheckAndCallNotification/20 Adc_Sar_CheckAndCallNotification/20 
Adc_Sar_ConfigExternalTrigger/22 (Adc_Sar_ConfigExternalTrigger) @06b12b60
  Type: function definition analyzed
  Visibility: prevailing_def_ironly
  References: pAdcBase/7 (read)
  Referring: 
  Availability: local
  Function flags: body local optimize_size
  Called by: Adc_Sar_Ip_SetExternalTrigger/64 Adc_Sar_Ip_SetExternalTrigger/64 Adc_Sar_Ip_SetExternalTrigger/64 Adc_Sar_Ip_SetExternalTrigger/64 
  Calls: SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_21/143 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_21/142 
Adc_Sar_Ip_GetDataAddress/21 (Adc_Sar_Ip_GetDataAddress) @06b128c0
  Type: function definition analyzed
  Visibility: externally_visible public
  References: pAdcBase/7 (read)
  Referring: 
  Availability: available
  Function flags: body optimize_size
  Called by: 
  Calls: 
Adc_Sar_CheckAndCallNotification/20 (Adc_Sar_CheckAndCallNotification) @06b12540
  Type: function definition analyzed
  Visibility: prevailing_def_ironly
  References: aAdcSarState/8 (read)
  Referring: 
  Availability: local
  Function flags: body local optimize_size
  Called by: Adc_Sar_Ip_IRQHandler/23 Adc_Sar_Ip_IRQHandler/23 Adc_Sar_Ip_IRQHandler/23 
  Calls: 
   Indirect call
Adc_Sar_ResetWdog/19 (Adc_Sar_ResetWdog) @06b122a0
  Type: function definition analyzed
  Visibility: prevailing_def_ironly
  References: pAdcBase/7 (read)u32AdcChanBitmap/9 (read)u32AdcChanBitmap/9 (read)u32AdcChanBitmap/9 (read)
  Referring: 
  Availability: local
  Function flags: body local optimize_size
  Called by: Adc_Sar_Ip_Deinit/25 
  Calls: Adc_Sar_ResetWdogCWSELR/6 Adc_Sar_WriteThresholds/4 
Adc_Sar_GetConvResults/18 (Adc_Sar_GetConvResults) @06b00e00
  Type: function definition analyzed
  Visibility: prevailing_def_ironly
  References: pAdcBase/7 (read)u32AdcChanBitmap/9 (read)u32AdcChanBitmap/9 (read)
  Referring: 
  Availability: local
  Function flags: body local optimize_size
  Called by: Adc_Sar_Ip_GetConvResultsToArray/35 Adc_Sar_Ip_GetConvDataToArray/34 
  Calls: Adc_Sar_GetMaskedResult/12 Adc_Sar_GetMaskedResult/12 
Adc_Sar_CheckSelfTestProgress/17 (Adc_Sar_CheckSelfTestProgress) @06b008c0
  Type: function definition analyzed
  Visibility: prevailing_def_ironly
  References: pAdcBase/7 (read)
  Referring: 
  Availability: local
  Function flags: body local optimize_size
  Called by: Adc_Sar_Ip_SelfTest/33 
  Calls: OsIf_GetElapsed/85 OsIf_GetElapsed/85 OsIf_GetCounter/78 OsIf_MicrosToTicks/77 
Adc_Sar_EnableChannelWatchdog/16 (Adc_Sar_EnableChannelWatchdog) @06b00620
  Type: function definition analyzed
  Visibility: prevailing_def_ironly
  References: pAdcBase/7 (read)u32AdcChanBitmap/9 (read)u32AdcChanBitmap/9 (read)
  Referring: 
  Availability: local
  Function flags: body local optimize_size
  Called by: Adc_Sar_Ip_Init/24 
  Calls: Adc_Sar_Ip_EnableChannelNotifications/43 Adc_Sar_WriteChannelMapping/5 
Adc_Sar_CollectMcrMasks/15 (Adc_Sar_CollectMcrMasks) @06b002a0
  Type: function definition analyzed
  Visibility: prevailing_def_ironly
  References: u32AdcFeatureBitmap/10 (read)
  Referring: 
  Availability: local
  Function flags: body local optimize_size
  Called by: Adc_Sar_Ip_Init/24 
  Calls: 
Adc_Sar_GetIsrFlags/14 (Adc_Sar_GetIsrFlags) @06af8620
  Type: function definition analyzed
  Visibility: prevailing_def_ironly
  References: pAdcBase/7 (read)u32AdcFeatureBitmap/10 (read)
  Referring: 
  Availability: local
  Function flags: body local optimize_size
  Called by: Adc_Sar_Ip_GetStatusFlags/31 
  Calls: 
Adc_Sar_GetMsrFlags/13 (Adc_Sar_GetMsrFlags) @06af82a0
  Type: function definition analyzed
  Visibility: prevailing_def_ironly
  References: pAdcBase/7 (read)u32AdcFeatureBitmap/10 (read)
  Referring: 
  Availability: local
  Function flags: body local optimize_size
  Called by: Adc_Sar_Ip_GetStatusFlags/31 
  Calls: 
Adc_Sar_GetMaskedResult/12 (Adc_Sar_GetMaskedResult) @06c16ee0
  Type: function definition analyzed
  Visibility: prevailing_def_ironly
  References: aAdcSarState/8 (read)
  Referring: 
  Availability: local
  Function flags: body local optimize_size
  Called by: Adc_Sar_Ip_GetConvResult/37 Adc_Sar_Ip_GetConvData/36 Adc_Sar_GetConvResults/18 Adc_Sar_GetConvResults/18 
  Calls: Adc_Sar_GetResolution/11 
Adc_Sar_GetResolution/11 (Adc_Sar_GetResolution) @06c16c40
  Type: function definition analyzed
  Visibility: prevailing_def_ironly
  References: pAdcBase/7 (read)
  Referring: 
  Availability: local
  Function flags: body local optimize_size
  Called by: Adc_Sar_Ip_SetWdgThreshold/61 Adc_Sar_GetMaskedResult/12 
  Calls: 
u32AdcFeatureBitmap/10 (u32AdcFeatureBitmap) @06c13048
  Type: variable definition analyzed
  Visibility: prevailing_def_ironly
  References: 
  Referring: Adc_Sar_Ip_Init/24 (read)Adc_Sar_CollectMcrMasks/15 (read)Adc_Sar_GetMsrFlags/13 (read)Adc_Sar_GetIsrFlags/14 (read)Adc_Sar_Ip_ClearStatusFlags/32 (read)Adc_Sar_Ip_EnableNotifications/41 (read)Adc_Sar_Ip_DisableNotifications/42 (read)Adc_Sar_Ip_SetPresamplingSource/50 (read)Adc_Sar_Ip_EnableChannelPresampling/51 (read)Adc_Sar_Ip_DisableChannelPresampling/52 (read)Adc_Sar_Ip_EnablePresampleConversion/53 (read)Adc_Sar_Ip_DisablePresampleConversion/54 (read)Adc_Sar_Ip_SetCtuMode/63 (read)
  Availability: available
  Varpool flags: initialized read-only const-value-known
u32AdcChanBitmap/9 (u32AdcChanBitmap) @06c0cf78
  Type: variable definition analyzed
  Visibility: prevailing_def_ironly
  References: 
  Referring: Adc_Sar_Ip_Init/24 (read)Adc_Sar_Ip_Init/24 (read)Adc_Sar_Ip_Init/24 (read)Adc_Sar_Ip_Init/24 (read)Adc_Sar_Ip_Init/24 (read)Adc_Sar_EnableChannelWatchdog/16 (read)Adc_Sar_EnableChannelWatchdog/16 (read)Adc_Sar_Ip_Deinit/25 (read)Adc_Sar_Ip_Deinit/25 (read)Adc_Sar_Ip_Deinit/25 (read)Adc_Sar_ResetWdog/19 (read)Adc_Sar_ResetWdog/19 (read)Adc_Sar_ResetWdog/19 (read)Adc_Sar_Ip_ChainConfig/26 (read)Adc_Sar_Ip_ChainConfig/26 (read)Adc_Sar_GetConvResults/18 (read)Adc_Sar_GetConvResults/18 (read)Adc_Sar_Ip_EnableChannelNotifications/43 (read)Adc_Sar_Ip_EnableChannelNotifications/43 (read)Adc_Sar_Ip_DisableChannelNotifications/44 (read)Adc_Sar_Ip_DisableChannelNotifications/44 (read)Adc_Sar_Ip_SetSampleTimes/46 (read)Adc_Sar_Ip_SetSampleTimes/46 (read)Adc_Sar_Ip_SetSampleTimes/46 (read)Adc_Sar_Ip_DisableChannelDmaAll/59 (read)Adc_Sar_Ip_DisableChannelDmaAll/59 (read)
  Availability: available
  Varpool flags: initialized read-only const-value-known
aAdcSarState/8 (aAdcSarState) @06c0ce58
  Type: variable definition analyzed
  Visibility: prevailing_def_ironly
  References: 
  Referring: Adc_Sar_Ip_IRQHandler/23 (read)Adc_Sar_Ip_IRQHandler/23 (read)Adc_Sar_Ip_IRQHandler/23 (read)Adc_Sar_CheckAndCallNotification/20 (read)Adc_Sar_Ip_Init/24 (write)Adc_Sar_Ip_Init/24 (write)Adc_Sar_Ip_Init/24 (write)Adc_Sar_Ip_Init/24 (write)Adc_Sar_Ip_Init/24 (write)Adc_Sar_Ip_Init/24 (write)Adc_Sar_Ip_Init/24 (write)Adc_Sar_Ip_Init/24 (write)Adc_Sar_Ip_Deinit/25 (write)Adc_Sar_GetMaskedResult/12 (read)Adc_Sar_Ip_DoCalibration/38 (read)
  Availability: available
  Varpool flags:
pAdcBase/7 (pAdcBase) @06c0cd80
  Type: variable definition analyzed
  Visibility: prevailing_def_ironly
  References: 
  Referring: Adc_Sar_Ip_GetDataAddress/21 (read)Adc_Sar_Ip_IRQHandler/23 (read)Adc_Sar_Ip_Init/24 (read)Adc_Sar_EnableChannelWatchdog/16 (read)Adc_Sar_Ip_Deinit/25 (read)Adc_Sar_ResetWdog/19 (read)Adc_Sar_Ip_ChainConfig/26 (read)Adc_Sar_Ip_EnableChannel/27 (read)Adc_Sar_Ip_DisableChannel/28 (read)Adc_Sar_Ip_SetResolution/29 (read)Adc_Sar_Ip_StartConversion/30 (read)Adc_Sar_GetMsrFlags/13 (read)Adc_Sar_GetIsrFlags/14 (read)Adc_Sar_Ip_ClearStatusFlags/32 (read)Adc_Sar_Ip_SelfTest/33 (read)Adc_Sar_CheckSelfTestProgress/17 (read)Adc_Sar_GetConvResults/18 (read)Adc_Sar_GetResolution/11 (read)Adc_Sar_Ip_GetConvData/36 (read)Adc_Sar_Ip_GetConvResult/37 (read)Adc_Sar_Ip_DoCalibration/38 (read)Adc_Sar_Ip_Powerup/39 (read)Adc_Sar_Ip_Powerdown/40 (read)Adc_Sar_Ip_EnableNotifications/41 (read)Adc_Sar_Ip_DisableNotifications/42 (read)Adc_Sar_Ip_EnableChannelNotifications/43 (read)Adc_Sar_Ip_DisableChannelNotifications/44 (read)Adc_Sar_Ip_SetClockMode/45 (read)Adc_Sar_Ip_SetSampleTimes/46 (read)Adc_Sar_Ip_SetAveraging/47 (read)Adc_Sar_Ip_AbortConversion/48 (read)Adc_Sar_Ip_AbortChain/49 (read)Adc_Sar_Ip_SetPresamplingSource/50 (read)Adc_Sar_Ip_EnableChannelPresampling/51 (read)Adc_Sar_Ip_DisableChannelPresampling/52 (read)Adc_Sar_Ip_EnablePresampleConversion/53 (read)Adc_Sar_Ip_DisablePresampleConversion/54 (read)Adc_Sar_Ip_EnableDma/55 (read)Adc_Sar_Ip_DisableDma/56 (read)Adc_Sar_Ip_EnableChannelDma/57 (read)Adc_Sar_Ip_DisableChannelDma/58 (read)Adc_Sar_Ip_DisableChannelDmaAll/59 (read)Adc_Sar_Ip_SetDmaClearSource/60 (read)Adc_Sar_Ip_SetWdgThreshold/61 (read)Adc_Sar_Ip_SetConversionMode/62 (read)Adc_Sar_Ip_SetCtuMode/63 (read)Adc_Sar_ConfigExternalTrigger/22 (read)
  Availability: available
  Varpool flags: initialized read-only const-value-known
Adc_Sar_ResetWdogCWSELR/6 (Adc_Sar_ResetWdogCWSELR) @06bf3620
  Type: function definition analyzed
  Visibility: prevailing_def_ironly
  References: 
  Referring: 
  Availability: local
  Function flags: body local optimize_size
  Called by: Adc_Sar_ResetWdog/19 
  Calls: 
Adc_Sar_WriteChannelMapping/5 (Adc_Sar_WriteChannelMapping) @06bf32a0
  Type: function definition analyzed
  Visibility: prevailing_def_ironly
  References: 
  Referring: 
  Availability: local
  Function flags: body local optimize_size
  Called by: Adc_Sar_EnableChannelWatchdog/16 
  Calls: 
Adc_Sar_WriteThresholds/4 (Adc_Sar_WriteThresholds) @06bc8a80
  Type: function definition analyzed
  Visibility: prevailing_def_ironly
  References: 
  Referring: 
  Availability: local
  Function flags: body local optimize_size
  Called by: Adc_Sar_Ip_SetWdgThreshold/61 Adc_Sar_ResetWdog/19 
  Calls: 
Adc_Sar_Powerdown/2 (Adc_Sar_Powerdown) @06bc82a0
  Type: function definition analyzed
  Visibility: prevailing_def_ironly
  References: 
  Referring: 
  Availability: local
  Function flags: body local optimize_size
  Called by: Adc_Sar_Ip_Powerdown/40 
  Calls: 
Adc_Sar_Powerup/1 (Adc_Sar_Powerup) @06bc3ee0
  Type: function definition analyzed
  Visibility: prevailing_def_ironly
  References: 
  Referring: 
  Availability: local
  Function flags: body local optimize_size
  Called by: Adc_Sar_Ip_Powerup/39 
  Calls: 
Adc_Sar_Ip_SetExternalTrigger (const uint32 u32Instance, const Adc_Sar_Ip_ExtTriggerEdgeType eTriggerEdge, const Adc_Sar_Ip_ExtTriggerSourceType eTrggerSrc)
{
  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) eTrggerSrc;
  switch (_1) <default: <L6> [INV], case 0: <L0> [INV], case 1: <L1> [INV], case 2: <L2> [INV], case 3: <L3> [INV]>

  <bb 3> :
<L0>:
  # DEBUG BEGIN_STMT
  Adc_Sar_ConfigExternalTrigger (u32Instance, eTriggerEdge, 67108864, 0, 134217728);
  # DEBUG BEGIN_STMT
  goto <bb 7>; [INV]

  <bb 4> :
<L1>:
  # DEBUG BEGIN_STMT
  Adc_Sar_ConfigExternalTrigger (u32Instance, eTriggerEdge, 67108864, 0, 33554432);
  # DEBUG BEGIN_STMT
  goto <bb 7>; [INV]

  <bb 5> :
<L2>:
  # DEBUG BEGIN_STMT
  Adc_Sar_ConfigExternalTrigger (u32Instance, eTriggerEdge, 67108864, 67108864, 167772160);
  # DEBUG BEGIN_STMT
  goto <bb 7>; [INV]

  <bb 6> :
<L3>:
  # DEBUG BEGIN_STMT
  Adc_Sar_ConfigExternalTrigger (u32Instance, eTriggerEdge, 2097152, 2097152, 4194304);
  # DEBUG BEGIN_STMT

  <bb 7> :
<L6>:
  return;

}


Adc_Sar_Ip_SetCtuMode (const uint32 u32Instance, const Adc_Sar_Ip_CtuModeType eCtuMode)
{
  struct ADC_Type * const pBase;
  Adc_Sar_Ip_StatusType eStatus;
  Adc_Sar_Ip_StatusType D.5738;

  <bb 2> :
  # DEBUG BEGIN_STMT
  eStatus = 0;
  # DEBUG BEGIN_STMT
  pBase = pAdcBase[u32Instance];
  # DEBUG BEGIN_STMT
  SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_20 ();
  # DEBUG BEGIN_STMT
  _1 = pBase->MCR;
  _2 = _1 & 4294836223;
  pBase->MCR = _2;
  # DEBUG BEGIN_STMT
  SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_20 ();
  # DEBUG BEGIN_STMT
  eStatus = Adc_Sar_Ip_Powerdown (u32Instance);
  # DEBUG BEGIN_STMT
  if (eStatus != 0)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  # DEBUG BEGIN_STMT
  D.5738 = eStatus;
  // predicted unlikely by early return (on trees) predictor.
  goto <bb 11>; [INV]

  <bb 4> :
  # DEBUG BEGIN_STMT
  _3 = u32AdcFeatureBitmap[u32Instance];
  _4 = _3 & 4;
  if (_4 != 0)
    goto <bb 5>; [INV]
  else
    goto <bb 10>; [INV]

  <bb 5> :
  # DEBUG BEGIN_STMT
  SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_20 ();
  # DEBUG BEGIN_STMT
  _5 = (int) eCtuMode;
  switch (_5) <default: <L10> [INV], case 0: <L5> [INV], case 1: <L3> [INV], case 2: <L4> [INV]>

  <bb 6> :
<L3>:
  # DEBUG BEGIN_STMT
  _6 = pBase->MCR;
  _7 = _6 & 4294901759;
  pBase->MCR = _7;
  # DEBUG BEGIN_STMT
  _8 = pBase->MCR;
  _9 = _8 | 131072;
  pBase->MCR = _9;
  # DEBUG BEGIN_STMT
  goto <bb 9>; [INV]

  <bb 7> :
<L4>:
  # DEBUG BEGIN_STMT
  _10 = pBase->MCR;
  _11 = _10 | 196608;
  pBase->MCR = _11;
  # DEBUG BEGIN_STMT
  goto <bb 9>; [INV]

  <bb 8> :
<L5>:
  # DEBUG BEGIN_STMT
  _12 = pBase->MCR;
  _13 = _12 & 4294770687;
  pBase->MCR = _13;
  # DEBUG BEGIN_STMT

  <bb 9> :
<L10>:
  # DEBUG BEGIN_STMT
  SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_20 ();

  <bb 10> :
  # DEBUG BEGIN_STMT
  eStatus = Adc_Sar_Ip_Powerup (u32Instance);
  # DEBUG BEGIN_STMT
  D.5738 = eStatus;

  <bb 11> :
  return D.5738;

}


Adc_Sar_Ip_SetConversionMode (const uint32 u32Instance, const Adc_Sar_Ip_ConvModeType eConvMode)
{
  struct ADC_Type * const pBase;

  <bb 2> :
  # DEBUG BEGIN_STMT
  pBase = pAdcBase[u32Instance];
  # DEBUG BEGIN_STMT
  SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_19 ();
  # DEBUG BEGIN_STMT
  _1 = (int) eConvMode;
  switch (_1) <default: <L4> [INV], case 0: <L0> [INV], case 1: <L1> [INV]>

  <bb 3> :
<L0>:
  # DEBUG BEGIN_STMT
  _2 = pBase->MCR;
  _3 = _2 & 3758096383;
  pBase->MCR = _3;
  # DEBUG BEGIN_STMT
  goto <bb 5>; [INV]

  <bb 4> :
<L1>:
  # DEBUG BEGIN_STMT
  _4 = pBase->MCR;
  _5 = _4 | 536870912;
  pBase->MCR = _5;
  # DEBUG BEGIN_STMT

  <bb 5> :
<L4>:
  # DEBUG BEGIN_STMT
  SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_19 ();
  return;

}


Adc_Sar_Ip_SetWdgThreshold (const uint32 u32Instance, const uint8 u8RegisterIdx, const struct Adc_Sar_Ip_WdgThresholdType * const pThresholdValues)
{
  uint32 u32Wtimr;
  uint16 u16LowThreshold;
  uint16 u16HighThreshold;
  uint8 u8Shift;
  struct ADC_Type * const pBase;

  <bb 2> :
  # DEBUG BEGIN_STMT
  pBase = pAdcBase[u32Instance];
  # DEBUG BEGIN_STMT
  _1 = Adc_Sar_GetResolution (u32Instance);
  u8Shift = 15 - _1;
  # DEBUG BEGIN_STMT
  _2 = pThresholdValues->u16HighThreshold;
  _3 = (int) _2;
  _4 = (int) u8Shift;
  _5 = _3 << _4;
  u16HighThreshold = (uint16) _5;
  # DEBUG BEGIN_STMT
  _6 = pThresholdValues->u16LowThreshold;
  _7 = (int) _6;
  _8 = (int) u8Shift;
  _9 = _7 << _8;
  u16LowThreshold = (uint16) _9;
  # DEBUG BEGIN_STMT
  Adc_Sar_WriteThresholds (pBase, u8RegisterIdx, u16HighThreshold, u16LowThreshold);
  # DEBUG BEGIN_STMT
  SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_32 ();
  # DEBUG BEGIN_STMT
  u32Wtimr = pBase->WTIMR;
  # DEBUG BEGIN_STMT
  _10 = pThresholdValues->bLowThresholdIntEn;
  if (_10 != 0)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  # DEBUG BEGIN_STMT
  _11 = (unsigned int) u8RegisterIdx;
  _12 = _11 * 2;
  _13 = _12 + 1;
  _14 = 1 << _13;
  u32Wtimr = u32Wtimr | _14;
  goto <bb 5>; [INV]

  <bb 4> :
  # DEBUG BEGIN_STMT
  _15 = (unsigned int) u8RegisterIdx;
  _16 = _15 * 2;
  _17 = _16 + 1;
  _18 = 1 << _17;
  _19 = ~_18;
  u32Wtimr = u32Wtimr & _19;

  <bb 5> :
  # DEBUG BEGIN_STMT
  _20 = pThresholdValues->bHighThresholdIntEn;
  if (_20 != 0)
    goto <bb 6>; [INV]
  else
    goto <bb 7>; [INV]

  <bb 6> :
  # DEBUG BEGIN_STMT
  _21 = (unsigned int) u8RegisterIdx;
  _22 = _21 * 2;
  _23 = 1 << _22;
  u32Wtimr = u32Wtimr | _23;
  goto <bb 8>; [INV]

  <bb 7> :
  # DEBUG BEGIN_STMT
  _24 = (unsigned int) u8RegisterIdx;
  _25 = _24 * 2;
  _26 = 1 << _25;
  _27 = ~_26;
  u32Wtimr = u32Wtimr & _27;

  <bb 8> :
  # DEBUG BEGIN_STMT
  pBase->WTIMR = u32Wtimr;
  # DEBUG BEGIN_STMT
  SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_32 ();
  return;

}


Adc_Sar_Ip_SetDmaClearSource (const uint32 u32Instance, const Adc_Sar_Ip_ClearSourceType pDmaClear)
{
  struct ADC_Type * const pBase;

  <bb 2> :
  # DEBUG BEGIN_STMT
  pBase = pAdcBase[u32Instance];
  # DEBUG BEGIN_STMT
  SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_45 ();
  # DEBUG BEGIN_STMT
  _1 = pBase->DMAE;
  _2 = _1 & 4294967293;
  pBase->DMAE = _2;
  # DEBUG BEGIN_STMT
  _3 = pBase->DMAE;
  _4 = (long unsigned int) pDmaClear;
  _5 = _4 << 1;
  _6 = _5 & 2;
  _7 = _3 | _6;
  pBase->DMAE = _7;
  # DEBUG BEGIN_STMT
  SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_45 ();
  return;

}


Adc_Sar_Ip_DisableChannelDmaAll (const uint32 u32Instance)
{
  uint8 u8Index;
  struct ADC_Type * const pBase;

  <bb 2> :
  # DEBUG BEGIN_STMT
  pBase = pAdcBase[u32Instance];
  # DEBUG BEGIN_STMT
  u8Index = 0;
  # DEBUG BEGIN_STMT
  u8Index = 0;
  goto <bb 7>; [INV]

  <bb 3> :
  # DEBUG BEGIN_STMT
  _1 = (int) u8Index;
  _2 = u32AdcChanBitmap[u32Instance][_1];
  if (_2 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  # DEBUG BEGIN_STMT
  // predicted unlikely by continue predictor.
  goto <bb 6>; [INV]

  <bb 5> :
  # DEBUG BEGIN_STMT
  SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_48 ();
  # DEBUG BEGIN_STMT
  _3 = &pBase->DMAR0;
  _4 = (unsigned int) u8Index;
  _5 = _4 * 4;
  _6 = _3 + _5;
  _7 = MEM[(volatile uint32 *)_6];
  _8 = (int) u8Index;
  _9 = u32AdcChanBitmap[u32Instance][_8];
  _10 = ~_9;
  _11 = &pBase->DMAR0;
  _12 = (unsigned int) u8Index;
  _13 = _12 * 4;
  _14 = _11 + _13;
  _15 = _7 & _10;
  MEM[(volatile uint32 *)_14] = _15;
  # DEBUG BEGIN_STMT
  SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_48 ();

  <bb 6> :
  # DEBUG BEGIN_STMT
  u8Index.23_16 = u8Index;
  u8Index = u8Index.23_16 + 1;

  <bb 7> :
  # DEBUG BEGIN_STMT
  if (u8Index <= 2)
    goto <bb 3>; [INV]
  else
    goto <bb 8>; [INV]

  <bb 8> :
  return;

}


Adc_Sar_Ip_DisableChannelDma (const uint32 u32Instance, const uint32 u32ChnIdx)
{
  uint32 u32VectBit;
  uint32 u32VectAdr;
  struct ADC_Type * const pBase;

  <bb 2> :
  # DEBUG BEGIN_STMT
  pBase = pAdcBase[u32Instance];
  # DEBUG BEGIN_STMT
  u32VectAdr = u32ChnIdx / 32;
  # DEBUG BEGIN_STMT
  u32VectBit = u32ChnIdx & 31;
  # DEBUG BEGIN_STMT
  SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_47 ();
  # DEBUG BEGIN_STMT
  _1 = &pBase->DMAR0;
  _2 = u32VectAdr * 4;
  _3 = _1 + _2;
  _4 = MEM[(volatile uint32 *)_3];
  _5 = 1 << u32VectBit;
  _6 = ~_5;
  _7 = &pBase->DMAR0;
  _8 = u32VectAdr * 4;
  _9 = _7 + _8;
  _10 = _4 & _6;
  MEM[(volatile uint32 *)_9] = _10;
  # DEBUG BEGIN_STMT
  SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_47 ();
  return;

}


Adc_Sar_Ip_EnableChannelDma (const uint32 u32Instance, const uint32 u32ChnIdx)
{
  uint32 u32VectBit;
  uint32 u32VectAdr;
  struct ADC_Type * const pBase;

  <bb 2> :
  # DEBUG BEGIN_STMT
  pBase = pAdcBase[u32Instance];
  # DEBUG BEGIN_STMT
  u32VectAdr = u32ChnIdx / 32;
  # DEBUG BEGIN_STMT
  u32VectBit = u32ChnIdx & 31;
  # DEBUG BEGIN_STMT
  SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_46 ();
  # DEBUG BEGIN_STMT
  _1 = &pBase->DMAR0;
  _2 = u32VectAdr * 4;
  _3 = _1 + _2;
  _4 = MEM[(volatile uint32 *)_3];
  _5 = 1 << u32VectBit;
  _6 = &pBase->DMAR0;
  _7 = u32VectAdr * 4;
  _8 = _6 + _7;
  _9 = _4 | _5;
  MEM[(volatile uint32 *)_8] = _9;
  # DEBUG BEGIN_STMT
  SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_46 ();
  return;

}


Adc_Sar_Ip_DisableDma (const uint32 u32Instance)
{
  struct ADC_Type * const pBase;

  <bb 2> :
  # DEBUG BEGIN_STMT
  pBase = pAdcBase[u32Instance];
  # DEBUG BEGIN_STMT
  SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_44 ();
  # DEBUG BEGIN_STMT
  _1 = pBase->DMAE;
  _2 = _1 & 4294967294;
  pBase->DMAE = _2;
  # DEBUG BEGIN_STMT
  SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_44 ();
  return;

}


Adc_Sar_Ip_EnableDma (const uint32 u32Instance)
{
  struct ADC_Type * const pBase;

  <bb 2> :
  # DEBUG BEGIN_STMT
  pBase = pAdcBase[u32Instance];
  # DEBUG BEGIN_STMT
  SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_43 ();
  # DEBUG BEGIN_STMT
  _1 = pBase->DMAE;
  _2 = _1 | 1;
  pBase->DMAE = _2;
  # DEBUG BEGIN_STMT
  SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_43 ();
  return;

}


Adc_Sar_Ip_DisablePresampleConversion (const uint32 u32Instance)
{
  struct ADC_Type * const pBase;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = u32AdcFeatureBitmap[u32Instance];
  _2 = _1 & 2;
  if (_2 != 0)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  # DEBUG BEGIN_STMT
  pBase = pAdcBase[u32Instance];
  # DEBUG BEGIN_STMT
  SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_40 ();
  # DEBUG BEGIN_STMT
  _3 = pBase->PSCR;
  _4 = _3 & 4294967294;
  pBase->PSCR = _4;
  # DEBUG BEGIN_STMT
  SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_40 ();

  <bb 4> :
  return;

}


Adc_Sar_Ip_EnablePresampleConversion (const uint32 u32Instance)
{
  struct ADC_Type * const pBase;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = u32AdcFeatureBitmap[u32Instance];
  _2 = _1 & 2;
  if (_2 != 0)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  # DEBUG BEGIN_STMT
  pBase = pAdcBase[u32Instance];
  # DEBUG BEGIN_STMT
  SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_39 ();
  # DEBUG BEGIN_STMT
  _3 = pBase->PSCR;
  _4 = _3 | 1;
  pBase->PSCR = _4;
  # DEBUG BEGIN_STMT
  SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_39 ();

  <bb 4> :
  return;

}


Adc_Sar_Ip_DisableChannelPresampling (const uint32 u32Instance, const uint32 u32ChnIdx)
{
  uint32 u32VectBit;
  uint32 u32VectAdr;
  struct ADC_Type * const pBase;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = u32AdcFeatureBitmap[u32Instance];
  _2 = _1 & 2;
  if (_2 != 0)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  # DEBUG BEGIN_STMT
  pBase = pAdcBase[u32Instance];
  # DEBUG BEGIN_STMT
  u32VectAdr = u32ChnIdx / 32;
  # DEBUG BEGIN_STMT
  u32VectBit = u32ChnIdx & 31;
  # DEBUG BEGIN_STMT
  SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_42 ();
  # DEBUG BEGIN_STMT
  _3 = &pBase->PSR0;
  _4 = u32VectAdr * 4;
  _5 = _3 + _4;
  _6 = MEM[(volatile uint32 *)_5];
  _7 = 1 << u32VectBit;
  _8 = ~_7;
  _9 = &pBase->PSR0;
  _10 = u32VectAdr * 4;
  _11 = _9 + _10;
  _12 = _6 & _8;
  MEM[(volatile uint32 *)_11] = _12;
  # DEBUG BEGIN_STMT
  SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_42 ();

  <bb 4> :
  return;

}


Adc_Sar_Ip_EnableChannelPresampling (const uint32 u32Instance, const uint32 u32ChnIdx)
{
  uint32 u32VectBit;
  uint32 u32VectAdr;
  struct ADC_Type * const pBase;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = u32AdcFeatureBitmap[u32Instance];
  _2 = _1 & 2;
  if (_2 != 0)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  # DEBUG BEGIN_STMT
  pBase = pAdcBase[u32Instance];
  # DEBUG BEGIN_STMT
  u32VectAdr = u32ChnIdx / 32;
  # DEBUG BEGIN_STMT
  u32VectBit = u32ChnIdx & 31;
  # DEBUG BEGIN_STMT
  SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_41 ();
  # DEBUG BEGIN_STMT
  _3 = &pBase->PSR0;
  _4 = u32VectAdr * 4;
  _5 = _3 + _4;
  _6 = MEM[(volatile uint32 *)_5];
  _7 = 1 << u32VectBit;
  _8 = &pBase->PSR0;
  _9 = u32VectAdr * 4;
  _10 = _8 + _9;
  _11 = _6 | _7;
  MEM[(volatile uint32 *)_10] = _11;
  # DEBUG BEGIN_STMT
  SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_41 ();

  <bb 4> :
  return;

}


Adc_Sar_Ip_SetPresamplingSource (const uint32 u32Instance, const Adc_Sar_Ip_ChanGroupType pChanGroup, const Adc_Sar_Ip_PresamplingSourceType pPresampleSource)
{
  uint32 u32Pscr;
  struct ADC_Type * const pBase;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = u32AdcFeatureBitmap[u32Instance];
  _2 = _1 & 2;
  if (_2 != 0)
    goto <bb 3>; [INV]
  else
    goto <bb 8>; [INV]

  <bb 3> :
  # DEBUG BEGIN_STMT
  pBase = pAdcBase[u32Instance];
  # DEBUG BEGIN_STMT
  SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_38 ();
  # DEBUG BEGIN_STMT
  u32Pscr = pBase->PSCR;
  # DEBUG BEGIN_STMT
  _3 = (int) pChanGroup;
  switch (_3) <default: <L7> [INV], case 0: <L1> [INV], case 1: <L2> [INV], case 2: <L3> [INV]>

  <bb 4> :
<L1>:
  # DEBUG BEGIN_STMT
  u32Pscr = u32Pscr & 4294967293;
  # DEBUG BEGIN_STMT
  _4 = (long unsigned int) pPresampleSource;
  _5 = _4 << 1;
  _6 = _5 & 2;
  u32Pscr = u32Pscr | _6;
  # DEBUG BEGIN_STMT
  goto <bb 7>; [INV]

  <bb 5> :
<L2>:
  # DEBUG BEGIN_STMT
  u32Pscr = u32Pscr & 4294967287;
  # DEBUG BEGIN_STMT
  _7 = (long unsigned int) pPresampleSource;
  _8 = _7 << 3;
  _9 = _8 & 8;
  u32Pscr = u32Pscr | _9;
  # DEBUG BEGIN_STMT
  goto <bb 7>; [INV]

  <bb 6> :
<L3>:
  # DEBUG BEGIN_STMT
  u32Pscr = u32Pscr & 4294967263;
  # DEBUG BEGIN_STMT
  _10 = (long unsigned int) pPresampleSource;
  _11 = _10 << 5;
  _12 = _11 & 32;
  u32Pscr = u32Pscr | _12;
  # DEBUG BEGIN_STMT

  <bb 7> :
<L7>:
  # DEBUG BEGIN_STMT
  pBase->PSCR = u32Pscr;
  # DEBUG BEGIN_STMT
  SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_38 ();

  <bb 8> :
  return;

}


Adc_Sar_Ip_AbortChain (const uint32 u32Instance, const boolean bBlocking, const boolean bAllowRestart)
{
  uint32 u32ElapsedTicks;
  uint32 u32CurrentTicks;
  uint32 u32TimeoutTicks;
  uint32 u32Status;
  struct ADC_Type * const pBase;
  Adc_Sar_Ip_StatusType D.5713;
  long unsigned int D.5709;

  <bb 2> :
  # DEBUG BEGIN_STMT
  pBase = pAdcBase[u32Instance];
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  u32TimeoutTicks = OsIf_MicrosToTicks (3000, 0);
  # DEBUG BEGIN_STMT
  _1 = OsIf_GetCounter (0);
  u32CurrentTicks = _1;
  # DEBUG BEGIN_STMT
  u32ElapsedTicks = 0;
  # DEBUG BEGIN_STMT
  SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_18 ();
  # DEBUG BEGIN_STMT
  _2 = ~bAllowRestart;
  if (_2 != 0)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  # DEBUG BEGIN_STMT
  _3 = pBase->MCR;
  _4 = _3 & 4278190079;
  pBase->MCR = _4;

  <bb 4> :
  # DEBUG BEGIN_STMT
  _5 = pBase->MCR;
  _6 = _5 | 128;
  pBase->MCR = _6;
  # DEBUG BEGIN_STMT
  SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_18 ();
  # DEBUG BEGIN_STMT
  if (bBlocking != 0)
    goto <bb 5>; [INV]
  else
    goto <bb 11>; [INV]

  <bb 5> :
  # DEBUG BEGIN_STMT
  _7 = pBase->MSR;
  u32Status = _7 & 16777216;
  # DEBUG BEGIN_STMT
  goto <bb 7>; [INV]

  <bb 6> :
  # DEBUG BEGIN_STMT
  _8 = pBase->MSR;
  u32Status = _8 & 16777216;
  # DEBUG BEGIN_STMT
  D.5709 = OsIf_GetElapsed (&u32CurrentTicks, 0);
  u32ElapsedTicks = D.5709 + u32ElapsedTicks;

  <bb 7> :
  # DEBUG BEGIN_STMT
  if (u32Status == 16777216)
    goto <bb 8>; [INV]
  else
    goto <bb 9>; [INV]

  <bb 8> :
  if (u32ElapsedTicks < u32TimeoutTicks)
    goto <bb 6>; [INV]
  else
    goto <bb 9>; [INV]

  <bb 9> :
  # DEBUG BEGIN_STMT
  if (u32ElapsedTicks >= u32TimeoutTicks)
    goto <bb 10>; [INV]
  else
    goto <bb 11>; [INV]

  <bb 10> :
  # DEBUG BEGIN_STMT
  D.5713 = 2;
  // predicted unlikely by early return (on trees) predictor.
  goto <bb 12>; [INV]

  <bb 11> :
  # DEBUG BEGIN_STMT
  D.5713 = 0;

  <bb 12> :
  u32CurrentTicks = {CLOBBER};
  return D.5713;

}


Adc_Sar_Ip_AbortConversion (const uint32 u32Instance)
{
  struct ADC_Type * const pBase;

  <bb 2> :
  # DEBUG BEGIN_STMT
  pBase = pAdcBase[u32Instance];
  # DEBUG BEGIN_STMT
  SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_17 ();
  # DEBUG BEGIN_STMT
  _1 = pBase->MCR;
  _2 = _1 | 64;
  pBase->MCR = _2;
  # DEBUG BEGIN_STMT
  SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_17 ();
  return;

}


Adc_Sar_Ip_SetAveraging (const uint32 u32Instance, const boolean bAvgEn, const Adc_Sar_Ip_AvgSelectType eAvgSel)
{
  struct ADC_Type * const pBase;
  long unsigned int iftmp.22;

  <bb 2> :
  # DEBUG BEGIN_STMT
  pBase = pAdcBase[u32Instance];
  # DEBUG BEGIN_STMT
  SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_16 ();
  # DEBUG BEGIN_STMT
  _1 = pBase->MCR;
  _2 = _1 & 4294963711;
  pBase->MCR = _2;
  # DEBUG BEGIN_STMT
  _3 = pBase->MCR;
  if (bAvgEn != 0)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  iftmp.22 = 2048;
  goto <bb 5>; [INV]

  <bb 4> :
  iftmp.22 = 0;

  <bb 5> :
  _4 = (long unsigned int) eAvgSel;
  _5 = _4 << 9;
  _6 = _5 & 1536;
  _7 = iftmp.22 | _6;
  _8 = _3 | _7;
  pBase->MCR = _8;
  # DEBUG BEGIN_STMT
  SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_16 ();
  return;

}


Adc_Sar_Ip_SetSampleTimes (const uint32 u32Instance, const uint8 * const aSampleTimes)
{
  struct ADC_Type * const pBase;

  <bb 2> :
  # DEBUG BEGIN_STMT
  pBase = pAdcBase[u32Instance];
  # DEBUG BEGIN_STMT
  _1 = u32AdcChanBitmap[u32Instance][0];
  if (_1 != 0)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  # DEBUG BEGIN_STMT
  _2 = *aSampleTimes;
  _3 = &pBase->CTR0;
  _4 = (long unsigned int) _2;
  MEM[(volatile uint32 *)_3] = _4;

  <bb 4> :
  # DEBUG BEGIN_STMT
  _5 = u32AdcChanBitmap[u32Instance][1];
  if (_5 != 0)
    goto <bb 5>; [INV]
  else
    goto <bb 6>; [INV]

  <bb 5> :
  # DEBUG BEGIN_STMT
  _6 = aSampleTimes + 1;
  _7 = *_6;
  _8 = &pBase->CTR0;
  _9 = _8 + 4;
  _10 = (long unsigned int) _7;
  MEM[(volatile uint32 *)_9] = _10;

  <bb 6> :
  # DEBUG BEGIN_STMT
  _11 = u32AdcChanBitmap[u32Instance][2];
  if (_11 != 0)
    goto <bb 7>; [INV]
  else
    goto <bb 8>; [INV]

  <bb 7> :
  # DEBUG BEGIN_STMT
  _12 = aSampleTimes + 2;
  _13 = *_12;
  _14 = &pBase->CTR0;
  _15 = _14 + 8;
  _16 = (long unsigned int) _13;
  MEM[(volatile uint32 *)_15] = _16;

  <bb 8> :
  return;

}


Adc_Sar_Ip_SetClockMode (const uint32 u32Instance, const struct Adc_Sar_Ip_ClockConfigType * const pConfig)
{
  uint32 u32Mcr;
  struct ADC_Type * const pBase;
  Adc_Sar_Ip_StatusType eStatus;
  Adc_Sar_Ip_StatusType D.5691;

  <bb 2> :
  # DEBUG BEGIN_STMT
  eStatus = 0;
  # DEBUG BEGIN_STMT
  pBase = pAdcBase[u32Instance];
  # DEBUG BEGIN_STMT
  u32Mcr = 0;
  # DEBUG BEGIN_STMT
  _1 = pConfig->eClkSelect;
  _2 = (long unsigned int) _1;
  _3 = _2 << 1;
  _4 = _3 & 6;
  u32Mcr = u32Mcr | _4;
  # DEBUG BEGIN_STMT
  eStatus = Adc_Sar_Ip_Powerdown (u32Instance);
  # DEBUG BEGIN_STMT
  if (eStatus != 0)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  # DEBUG BEGIN_STMT
  D.5691 = eStatus;
  // predicted unlikely by early return (on trees) predictor.
  goto <bb 7>; [INV]

  <bb 4> :
  # DEBUG BEGIN_STMT
  SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_15 ();
  # DEBUG BEGIN_STMT
  _5 = pBase->MCR;
  _6 = _5 & 4294967289;
  _7 = u32Mcr | _6;
  pBase->MCR = _7;
  # DEBUG BEGIN_STMT
  SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_15 ();
  # DEBUG BEGIN_STMT
  eStatus = Adc_Sar_Ip_Powerup (u32Instance);
  # DEBUG BEGIN_STMT
  if (eStatus != 0)
    goto <bb 5>; [INV]
  else
    goto <bb 6>; [INV]

  <bb 5> :
  # DEBUG BEGIN_STMT
  D.5691 = eStatus;
  // predicted unlikely by early return (on trees) predictor.
  goto <bb 7>; [INV]

  <bb 6> :
  # DEBUG BEGIN_STMT
  _8 = pConfig->bAvgEn;
  _9 = pConfig->eAvgSel;
  Adc_Sar_Ip_SetAveraging (u32Instance, _8, _9);
  # DEBUG BEGIN_STMT
  _10 = pConfig->u8PowerDownDelay;
  _11 = (long unsigned int) _10;
  pBase->PDEDR = _11;
  # DEBUG BEGIN_STMT
  _12 = &pConfig->aSampleTime;
  Adc_Sar_Ip_SetSampleTimes (u32Instance, _12);
  # DEBUG BEGIN_STMT
  D.5691 = eStatus;

  <bb 7> :
  return D.5691;

}


Adc_Sar_Ip_DisableChannelNotifications (const uint32 u32Instance, const uint32 u32ChnIdx, const uint32 u32Mask)
{
  uint32 u32VectBit;
  uint32 u32VectAdr;
  struct ADC_Type * const pBase;

  <bb 2> :
  # DEBUG BEGIN_STMT
  pBase = pAdcBase[u32Instance];
  # DEBUG BEGIN_STMT
  u32VectAdr = u32ChnIdx / 32;
  # DEBUG BEGIN_STMT
  u32VectBit = u32ChnIdx & 31;
  # DEBUG BEGIN_STMT
  _1 = u32Mask & 1;
  if (_1 != 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  # DEBUG BEGIN_STMT
  _2 = u32AdcChanBitmap[u32Instance][u32VectAdr];
  if (_2 != 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  # DEBUG BEGIN_STMT
  SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_31 ();
  # DEBUG BEGIN_STMT
  _3 = &pBase->CIMR0;
  _4 = u32VectAdr * 4;
  _5 = _3 + _4;
  _6 = MEM[(volatile uint32 *)_5];
  _7 = 1 << u32VectBit;
  _8 = ~_7;
  _9 = &pBase->CIMR0;
  _10 = u32VectAdr * 4;
  _11 = _9 + _10;
  _12 = _6 & _8;
  MEM[(volatile uint32 *)_11] = _12;
  # DEBUG BEGIN_STMT
  SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_31 ();

  <bb 5> :
  # DEBUG BEGIN_STMT
  _13 = u32Mask & 2;
  if (_13 != 0)
    goto <bb 6>; [INV]
  else
    goto <bb 8>; [INV]

  <bb 6> :
  # DEBUG BEGIN_STMT
  _14 = u32AdcChanBitmap[u32Instance][u32VectAdr];
  if (_14 != 0)
    goto <bb 7>; [INV]
  else
    goto <bb 8>; [INV]

  <bb 7> :
  # DEBUG BEGIN_STMT
  SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_29 ();
  # DEBUG BEGIN_STMT
  _15 = &pBase->CWENR0;
  _16 = u32VectAdr * 4;
  _17 = _15 + _16;
  _18 = MEM[(volatile uint32 *)_17];
  _19 = 1 << u32VectBit;
  _20 = ~_19;
  _21 = &pBase->CWENR0;
  _22 = u32VectAdr * 4;
  _23 = _21 + _22;
  _24 = _18 & _20;
  MEM[(volatile uint32 *)_23] = _24;
  # DEBUG BEGIN_STMT
  SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_29 ();

  <bb 8> :
  return;

}


Adc_Sar_Ip_EnableChannelNotifications (const uint32 u32Instance, const uint32 u32ChnIdx, const uint32 u32Mask)
{
  uint32 u32VectBit;
  uint32 u32VectAdr;
  struct ADC_Type * const pBase;

  <bb 2> :
  # DEBUG BEGIN_STMT
  pBase = pAdcBase[u32Instance];
  # DEBUG BEGIN_STMT
  u32VectAdr = u32ChnIdx / 32;
  # DEBUG BEGIN_STMT
  u32VectBit = u32ChnIdx & 31;
  # DEBUG BEGIN_STMT
  _1 = u32Mask & 1;
  if (_1 != 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  # DEBUG BEGIN_STMT
  _2 = u32AdcChanBitmap[u32Instance][u32VectAdr];
  if (_2 != 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  # DEBUG BEGIN_STMT
  SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_30 ();
  # DEBUG BEGIN_STMT
  _3 = &pBase->CIMR0;
  _4 = u32VectAdr * 4;
  _5 = _3 + _4;
  _6 = MEM[(volatile uint32 *)_5];
  _7 = 1 << u32VectBit;
  _8 = &pBase->CIMR0;
  _9 = u32VectAdr * 4;
  _10 = _8 + _9;
  _11 = _6 | _7;
  MEM[(volatile uint32 *)_10] = _11;
  # DEBUG BEGIN_STMT
  SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_30 ();

  <bb 5> :
  # DEBUG BEGIN_STMT
  _12 = u32Mask & 2;
  if (_12 != 0)
    goto <bb 6>; [INV]
  else
    goto <bb 8>; [INV]

  <bb 6> :
  # DEBUG BEGIN_STMT
  _13 = u32AdcChanBitmap[u32Instance][u32VectAdr];
  if (_13 != 0)
    goto <bb 7>; [INV]
  else
    goto <bb 8>; [INV]

  <bb 7> :
  # DEBUG BEGIN_STMT
  SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_28 ();
  # DEBUG BEGIN_STMT
  _14 = &pBase->CWENR0;
  _15 = u32VectAdr * 4;
  _16 = _14 + _15;
  _17 = MEM[(volatile uint32 *)_16];
  _18 = 1 << u32VectBit;
  _19 = &pBase->CWENR0;
  _20 = u32VectAdr * 4;
  _21 = _19 + _20;
  _22 = _17 | _18;
  MEM[(volatile uint32 *)_21] = _22;
  # DEBUG BEGIN_STMT
  SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_28 ();

  <bb 8> :
  return;

}


Adc_Sar_Ip_DisableNotifications (const uint32 u32Instance, const uint32 u32NotificationMask)
{
  uint32 u32ImrFlags;
  struct ADC_Type * const pBase;

  <bb 2> :
  # DEBUG BEGIN_STMT
  pBase = pAdcBase[u32Instance];
  # DEBUG BEGIN_STMT
  u32ImrFlags = 0;
  # DEBUG BEGIN_STMT
  _1 = u32NotificationMask & 2;
  u32ImrFlags = u32ImrFlags | _1;
  # DEBUG BEGIN_STMT
  _2 = u32NotificationMask & 1;
  u32ImrFlags = u32ImrFlags | _2;
  # DEBUG BEGIN_STMT
  _3 = u32NotificationMask & 8;
  u32ImrFlags = u32ImrFlags | _3;
  # DEBUG BEGIN_STMT
  _4 = u32NotificationMask & 4;
  u32ImrFlags = u32ImrFlags | _4;
  # DEBUG BEGIN_STMT
  _5 = u32AdcFeatureBitmap[u32Instance];
  _6 = _5 & 4;
  if (_6 != 0)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  # DEBUG BEGIN_STMT
  _7 = u32NotificationMask & 16;
  u32ImrFlags = u32ImrFlags | _7;

  <bb 4> :
  # DEBUG BEGIN_STMT
  SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_34 ();
  # DEBUG BEGIN_STMT
  _8 = pBase->IMR;
  _9 = ~u32ImrFlags;
  _10 = _8 & _9;
  pBase->IMR = _10;
  # DEBUG BEGIN_STMT
  SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_34 ();
  return;

}


Adc_Sar_Ip_EnableNotifications (const uint32 u32Instance, const uint32 u32NotificationMask)
{
  uint32 u32ImrFlags;
  struct ADC_Type * const pBase;

  <bb 2> :
  # DEBUG BEGIN_STMT
  pBase = pAdcBase[u32Instance];
  # DEBUG BEGIN_STMT
  u32ImrFlags = 0;
  # DEBUG BEGIN_STMT
  _1 = u32NotificationMask & 2;
  u32ImrFlags = u32ImrFlags | _1;
  # DEBUG BEGIN_STMT
  _2 = u32NotificationMask & 1;
  u32ImrFlags = u32ImrFlags | _2;
  # DEBUG BEGIN_STMT
  _3 = u32NotificationMask & 8;
  u32ImrFlags = u32ImrFlags | _3;
  # DEBUG BEGIN_STMT
  _4 = u32NotificationMask & 4;
  u32ImrFlags = u32ImrFlags | _4;
  # DEBUG BEGIN_STMT
  _5 = u32AdcFeatureBitmap[u32Instance];
  _6 = _5 & 4;
  if (_6 != 0)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  # DEBUG BEGIN_STMT
  _7 = u32NotificationMask & 16;
  u32ImrFlags = u32ImrFlags | _7;

  <bb 4> :
  # DEBUG BEGIN_STMT
  SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_33 ();
  # DEBUG BEGIN_STMT
  _8 = pBase->IMR;
  _9 = u32ImrFlags | _8;
  pBase->IMR = _9;
  # DEBUG BEGIN_STMT
  SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_33 ();
  return;

}


Adc_Sar_Ip_Powerdown (const uint32 u32Instance)
{
  uint32 u32ElapsedTicks;
  uint32 u32CurrentTicks;
  uint32 u32TimeoutTicks;
  uint32 u32Status;
  uint32 u32ExpectedStatus;
  Adc_Sar_Ip_StatusType eStatus;
  struct ADC_Type * const pBase;
  Adc_Sar_Ip_StatusType D.5666;
  long unsigned int D.5662;

  <bb 2> :
  # DEBUG BEGIN_STMT
  pBase = pAdcBase[u32Instance];
  # DEBUG BEGIN_STMT
  eStatus = 0;
  # DEBUG BEGIN_STMT
  u32ExpectedStatus = 1;
  # DEBUG BEGIN_STMT
  _1 = pBase->MSR;
  u32Status = _1 & 7;
  # DEBUG BEGIN_STMT
  u32TimeoutTicks = OsIf_MicrosToTicks (3000, 0);
  # DEBUG BEGIN_STMT
  _2 = OsIf_GetCounter (0);
  u32CurrentTicks = _2;
  # DEBUG BEGIN_STMT
  u32ElapsedTicks = 0;
  # DEBUG BEGIN_STMT
  SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_14 ();
  # DEBUG BEGIN_STMT
  Adc_Sar_Powerdown (pBase);
  # DEBUG BEGIN_STMT
  SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_14 ();
  # DEBUG BEGIN_STMT
  goto <bb 4>; [INV]

  <bb 3> :
  # DEBUG BEGIN_STMT
  _3 = pBase->MSR;
  u32Status = _3 & 7;
  # DEBUG BEGIN_STMT
  D.5662 = OsIf_GetElapsed (&u32CurrentTicks, 0);
  u32ElapsedTicks = D.5662 + u32ElapsedTicks;

  <bb 4> :
  # DEBUG BEGIN_STMT
  if (u32Status != u32ExpectedStatus)
    goto <bb 5>; [INV]
  else
    goto <bb 6>; [INV]

  <bb 5> :
  if (u32ElapsedTicks < u32TimeoutTicks)
    goto <bb 3>; [INV]
  else
    goto <bb 6>; [INV]

  <bb 6> :
  # DEBUG BEGIN_STMT
  if (u32ElapsedTicks >= u32TimeoutTicks)
    goto <bb 7>; [INV]
  else
    goto <bb 8>; [INV]

  <bb 7> :
  # DEBUG BEGIN_STMT
  eStatus = 2;

  <bb 8> :
  # DEBUG BEGIN_STMT
  D.5666 = eStatus;
  u32CurrentTicks = {CLOBBER};
  return D.5666;

}


Adc_Sar_Ip_Powerup (const uint32 u32Instance)
{
  uint32 u32ElapsedTicks;
  uint32 u32CurrentTicks;
  uint32 u32TimeoutTicks;
  uint32 u32Status;
  uint32 u32ExpectedStatus;
  Adc_Sar_Ip_StatusType eStatus;
  struct ADC_Type * const pBase;
  Adc_Sar_Ip_StatusType D.5659;
  long unsigned int D.5655;

  <bb 2> :
  # DEBUG BEGIN_STMT
  pBase = pAdcBase[u32Instance];
  # DEBUG BEGIN_STMT
  eStatus = 0;
  # DEBUG BEGIN_STMT
  u32ExpectedStatus = 0;
  # DEBUG BEGIN_STMT
  _1 = pBase->MSR;
  u32Status = _1 & 7;
  # DEBUG BEGIN_STMT
  u32TimeoutTicks = OsIf_MicrosToTicks (3000, 0);
  # DEBUG BEGIN_STMT
  _2 = OsIf_GetCounter (0);
  u32CurrentTicks = _2;
  # DEBUG BEGIN_STMT
  u32ElapsedTicks = 0;
  # DEBUG BEGIN_STMT
  SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_13 ();
  # DEBUG BEGIN_STMT
  Adc_Sar_Powerup (pBase);
  # DEBUG BEGIN_STMT
  SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_13 ();
  # DEBUG BEGIN_STMT
  goto <bb 4>; [INV]

  <bb 3> :
  # DEBUG BEGIN_STMT
  _3 = pBase->MSR;
  u32Status = _3 & 7;
  # DEBUG BEGIN_STMT
  D.5655 = OsIf_GetElapsed (&u32CurrentTicks, 0);
  u32ElapsedTicks = D.5655 + u32ElapsedTicks;

  <bb 4> :
  # DEBUG BEGIN_STMT
  if (u32Status != u32ExpectedStatus)
    goto <bb 5>; [INV]
  else
    goto <bb 6>; [INV]

  <bb 5> :
  if (u32ElapsedTicks < u32TimeoutTicks)
    goto <bb 3>; [INV]
  else
    goto <bb 6>; [INV]

  <bb 6> :
  # DEBUG BEGIN_STMT
  if (u32ElapsedTicks >= u32TimeoutTicks)
    goto <bb 7>; [INV]
  else
    goto <bb 8>; [INV]

  <bb 7> :
  # DEBUG BEGIN_STMT
  eStatus = 2;

  <bb 8> :
  # DEBUG BEGIN_STMT
  D.5659 = eStatus;
  u32CurrentTicks = {CLOBBER};
  return D.5659;

}


Adc_Sar_Ip_DoCalibration (const uint32 u32Instance)
{
  uint32 u32Calbistreg;
  uint32 u32AdcClkSel;
  uint32 u32ElapsedTicks;
  uint32 u32CurrentTicks;
  uint32 u32TimeoutTicks;
  struct ADC_Type * const pBase;
  Adc_Sar_Ip_StatusType eCalStatus;
  Adc_Sar_Ip_StatusType eStatus;
  long unsigned int D.5641;
  Adc_Sar_Ip_StatusType D.5638;

  <bb 2> :
  # DEBUG BEGIN_STMT
  eStatus = 0;
  # DEBUG BEGIN_STMT
  eCalStatus = 0;
  # DEBUG BEGIN_STMT
  pBase = pAdcBase[u32Instance];
  # DEBUG BEGIN_STMT
  u32TimeoutTicks = OsIf_MicrosToTicks (3000, 0);
  # DEBUG BEGIN_STMT
  _1 = OsIf_GetCounter (0);
  u32CurrentTicks = _1;
  # DEBUG BEGIN_STMT
  u32ElapsedTicks = 0;
  # DEBUG BEGIN_STMT
  u32AdcClkSel = 0;
  # DEBUG BEGIN_STMT
  eStatus = Adc_Sar_Ip_Powerdown (u32Instance);
  # DEBUG BEGIN_STMT
  if (eStatus != 0)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  # DEBUG BEGIN_STMT
  D.5638 = eStatus;
  // predicted unlikely by early return (on trees) predictor.
  goto <bb 19>; [INV]

  <bb 4> :
  # DEBUG BEGIN_STMT
  SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_12 ();
  # DEBUG BEGIN_STMT
  _2 = pBase->MCR;
  u32AdcClkSel = _2 & 6;
  # DEBUG BEGIN_STMT
  _3 = pBase->MCR;
  _4 = _3 & 4294967289;
  pBase->MCR = _4;
  # DEBUG BEGIN_STMT
  _5 = pBase->MCR;
  _6 = aAdcSarState[u32Instance].eCalibrationClkSelect;
  _7 = (long unsigned int) _6;
  _8 = _7 << 1;
  _9 = _8 & 6;
  _10 = _5 | _9;
  pBase->MCR = _10;
  # DEBUG BEGIN_STMT
  SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_12 ();
  # DEBUG BEGIN_STMT
  eStatus = Adc_Sar_Ip_Powerup (u32Instance);
  # DEBUG BEGIN_STMT
  if (eStatus != 0)
    goto <bb 5>; [INV]
  else
    goto <bb 6>; [INV]

  <bb 5> :
  # DEBUG BEGIN_STMT
  D.5638 = eStatus;
  // predicted unlikely by early return (on trees) predictor.
  goto <bb 19>; [INV]

  <bb 6> :
  # DEBUG BEGIN_STMT
  SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_36 ();
  # DEBUG BEGIN_STMT
  u32Calbistreg = pBase->CALBISTREG;
  # DEBUG BEGIN_STMT
  u32Calbistreg = u32Calbistreg & 3892313998;
  # DEBUG BEGIN_STMT
  u32Calbistreg = u32Calbistreg | 112;
  # DEBUG BEGIN_STMT
  pBase->CALBISTREG = u32Calbistreg;
  # DEBUG BEGIN_STMT
  _11 = pBase->CALBISTREG;
  _12 = _11 | 8;
  pBase->CALBISTREG = _12;
  # DEBUG BEGIN_STMT
  _13 = pBase->CALBISTREG;
  _14 = _13 | 1;
  pBase->CALBISTREG = _14;
  # DEBUG BEGIN_STMT
  SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_36 ();
  # DEBUG BEGIN_STMT
  u32ElapsedTicks = 0;
  # DEBUG BEGIN_STMT
  goto <bb 8>; [INV]

  <bb 7> :
  # DEBUG BEGIN_STMT
  D.5641 = OsIf_GetElapsed (&u32CurrentTicks, 0);
  u32ElapsedTicks = D.5641 + u32ElapsedTicks;

  <bb 8> :
  # DEBUG BEGIN_STMT
  _15 = pBase->CALBISTREG;
  _16 = _15 & 32768;
  if (_16 != 0)
    goto <bb 9>; [INV]
  else
    goto <bb 10>; [INV]

  <bb 9> :
  if (u32ElapsedTicks < u32TimeoutTicks)
    goto <bb 7>; [INV]
  else
    goto <bb 10>; [INV]

  <bb 10> :
  # DEBUG BEGIN_STMT
  if (u32ElapsedTicks >= u32TimeoutTicks)
    goto <bb 11>; [INV]
  else
    goto <bb 12>; [INV]

  <bb 11> :
  # DEBUG BEGIN_STMT
  eCalStatus = 2;
  goto <bb 14>; [INV]

  <bb 12> :
  # DEBUG BEGIN_STMT
  _17 = pBase->CALBISTREG;
  _18 = _17 & 8;
  if (_18 != 0)
    goto <bb 13>; [INV]
  else
    goto <bb 14>; [INV]

  <bb 13> :
  # DEBUG BEGIN_STMT
  eCalStatus = 1;

  <bb 14> :
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  eStatus = Adc_Sar_Ip_Powerdown (u32Instance);
  # DEBUG BEGIN_STMT
  if (eStatus != 0)
    goto <bb 15>; [INV]
  else
    goto <bb 16>; [INV]

  <bb 15> :
  # DEBUG BEGIN_STMT
  D.5638 = eStatus;
  // predicted unlikely by early return (on trees) predictor.
  goto <bb 19>; [INV]

  <bb 16> :
  # DEBUG BEGIN_STMT
  SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_12 ();
  # DEBUG BEGIN_STMT
  _19 = pBase->MCR;
  _20 = _19 & 4294967289;
  pBase->MCR = _20;
  # DEBUG BEGIN_STMT
  _21 = pBase->MCR;
  _22 = u32AdcClkSel | _21;
  pBase->MCR = _22;
  # DEBUG BEGIN_STMT
  SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_12 ();
  # DEBUG BEGIN_STMT
  eStatus = Adc_Sar_Ip_Powerup (u32Instance);
  # DEBUG BEGIN_STMT
  if (eCalStatus != 0)
    goto <bb 17>; [INV]
  else
    goto <bb 18>; [INV]

  <bb 17> :
  # DEBUG BEGIN_STMT
  eStatus = eCalStatus;

  <bb 18> :
  # DEBUG BEGIN_STMT
  D.5638 = eStatus;

  <bb 19> :
  u32CurrentTicks = {CLOBBER};
  return D.5638;

}


Adc_Sar_Ip_GetConvResult (const uint32 u32Instance, const uint32 u32ChnIdx, const Adc_Sar_Ip_ConvChainType pChainType, struct Adc_Sar_Ip_ChanResultType * const pResult)
{
  uint32 u32Cdr;
  uint32 u32VectBit;
  uint32 u32VectAdr;
  struct ADC_Type * const pBase;

  <bb 2> :
  # DEBUG BEGIN_STMT
  pBase = pAdcBase[u32Instance];
  # DEBUG BEGIN_STMT
  u32VectAdr = u32ChnIdx / 32;
  # DEBUG BEGIN_STMT
  u32VectBit = u32ChnIdx & 31;
  # DEBUG BEGIN_STMT
  pResult->u16ConvData = 0;
  # DEBUG BEGIN_STMT
  _1 = (unsigned char) u32ChnIdx;
  pResult->u8ChnIdx = _1;
  # DEBUG BEGIN_STMT
  pResult->bValid = 0;
  # DEBUG BEGIN_STMT
  pResult->bOverWritten = 0;
  # DEBUG BEGIN_STMT
  _2 = &pBase->PCDR[0];
  _3 = u32ChnIdx * 4;
  _4 = _2 + _3;
  u32Cdr = MEM[(volatile uint32 *)_4];
  # DEBUG BEGIN_STMT
  _5 = (long unsigned int) pChainType;
  _6 = _5 << 16;
  _7 = u32Cdr ^ _6;
  _8 = _7 & 196608;
  if (_8 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  # DEBUG BEGIN_STMT
  _9 = u32Cdr & 524288;
  if (_9 != 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  # DEBUG BEGIN_STMT
  pResult->bValid = 1;
  # DEBUG BEGIN_STMT
  _10 = u32Cdr & 262144;
  _11 = _10 != 0;
  pResult->bOverWritten = _11;
  # DEBUG BEGIN_STMT
  _12 = Adc_Sar_GetMaskedResult (u32Instance, u32Cdr);
  pResult->u16ConvData = _12;

  <bb 5> :
  # DEBUG BEGIN_STMT
  _13 = &pBase->CEOCFR0;
  _14 = u32VectAdr * 4;
  _15 = _13 + _14;
  _16 = 1 << u32VectBit;
  MEM[(volatile uint32 *)_15] = _16;
  return;

}


Adc_Sar_Ip_GetConvData (const uint32 u32Instance, const uint32 u32ChnIdx)
{
  uint32 u32Cdr;
  uint32 u32VectBit;
  uint32 u32VectAdr;
  struct ADC_Type * const pBase;
  uint16 u16Result;
  uint16 D.5630;

  <bb 2> :
  # DEBUG BEGIN_STMT
  u16Result = 0;
  # DEBUG BEGIN_STMT
  pBase = pAdcBase[u32Instance];
  # DEBUG BEGIN_STMT
  u32VectAdr = u32ChnIdx / 32;
  # DEBUG BEGIN_STMT
  u32VectBit = u32ChnIdx & 31;
  # DEBUG BEGIN_STMT
  _1 = &pBase->PCDR[0];
  _2 = u32ChnIdx * 4;
  _3 = _1 + _2;
  u32Cdr = MEM[(volatile uint32 *)_3];
  # DEBUG BEGIN_STMT
  _4 = u32Cdr & 524288;
  if (_4 != 0)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  # DEBUG BEGIN_STMT
  u16Result = Adc_Sar_GetMaskedResult (u32Instance, u32Cdr);
  # DEBUG BEGIN_STMT
  _5 = &pBase->CEOCFR0;
  _6 = u32VectAdr * 4;
  _7 = _5 + _6;
  _8 = 1 << u32VectBit;
  MEM[(volatile uint32 *)_7] = _8;

  <bb 4> :
  # DEBUG BEGIN_STMT
  D.5630 = u16Result;
  return D.5630;

}


Adc_Sar_Ip_GetConvResultsToArray (const uint32 u32Instance, const Adc_Sar_Ip_ConvChainType pChainType, const uint32 u32Length, struct Adc_Sar_Ip_ChanResultType * const pResults)
{
  uint32 D.5626;

  <bb 2> :
  # DEBUG BEGIN_STMT
  D.5626 = Adc_Sar_GetConvResults (u32Instance, pChainType, 0B, pResults, u32Length);
  return D.5626;

}


Adc_Sar_Ip_GetConvDataToArray (const uint32 u32Instance, const Adc_Sar_Ip_ConvChainType pChainType, const uint32 u32Length, uint16 * const pResults)
{
  uint32 D.5602;

  <bb 2> :
  # DEBUG BEGIN_STMT
  D.5602 = Adc_Sar_GetConvResults (u32Instance, pChainType, pResults, 0B, u32Length);
  return D.5602;

}


Adc_Sar_Ip_SelfTest (const uint32 u32Instance)
{
  uint32 u32ElapsedTicks;
  uint32 u32CurrentTicks;
  uint32 u32TimeoutTicks;
  uint32 u32MsrStatus;
  uint32 u32Reg;
  Adc_Sar_Ip_StatusType eStatus;
  struct ADC_Type * const pBase;
  Adc_Sar_Ip_StatusType D.5584;
  long unsigned int D.5580;

  <bb 2> :
  # DEBUG BEGIN_STMT
  pBase = pAdcBase[u32Instance];
  # DEBUG BEGIN_STMT
  eStatus = 0;
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  u32TimeoutTicks = OsIf_MicrosToTicks (3000, 0);
  # DEBUG BEGIN_STMT
  _1 = OsIf_GetCounter (0);
  u32CurrentTicks = _1;
  # DEBUG BEGIN_STMT
  u32ElapsedTicks = 0;
  # DEBUG BEGIN_STMT
  SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_25 ();
  # DEBUG BEGIN_STMT
  _2 = &pBase->NCMR0;
  _3 = MEM[(volatile uint32 *)_2];
  _4 = &pBase->NCMR0;
  _5 = _3 | 1;
  MEM[(volatile uint32 *)_4] = _5;
  # DEBUG BEGIN_STMT
  SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_25 ();
  # DEBUG BEGIN_STMT
  SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_11 ();
  # DEBUG BEGIN_STMT
  _6 = pBase->MCR;
  _7 = _6 & 4294836223;
  pBase->MCR = _7;
  # DEBUG BEGIN_STMT
  _8 = pBase->MCR;
  _9 = _8 | 536870912;
  pBase->MCR = _9;
  # DEBUG BEGIN_STMT
  SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_11 ();
  # DEBUG BEGIN_STMT
  u32Reg = 0;
  # DEBUG BEGIN_STMT
  u32Reg = u32Reg | 268439552;
  # DEBUG BEGIN_STMT
  pBase->STCR1 = u32Reg;
  # DEBUG BEGIN_STMT
  SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_35 ();
  # DEBUG BEGIN_STMT
  _10 = pBase->STCR3;
  _11 = _10 | 768;
  pBase->STCR3 = _11;
  # DEBUG BEGIN_STMT
  _12 = pBase->STCR2;
  _13 = _12 | 128;
  pBase->STCR2 = _13;
  # DEBUG BEGIN_STMT
  SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_35 ();
  # DEBUG BEGIN_STMT
  SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_11 ();
  # DEBUG BEGIN_STMT
  _14 = pBase->MCR;
  _15 = _14 | 16777216;
  pBase->MCR = _15;
  # DEBUG BEGIN_STMT
  SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_11 ();
  # DEBUG BEGIN_STMT
  eStatus = Adc_Sar_CheckSelfTestProgress (u32Instance);
  # DEBUG BEGIN_STMT
  SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_11 ();
  # DEBUG BEGIN_STMT
  _16 = pBase->MCR;
  _17 = _16 & 4278190079;
  pBase->MCR = _17;
  # DEBUG BEGIN_STMT
  SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_11 ();
  # DEBUG BEGIN_STMT
  _18 = pBase->MSR;
  u32MsrStatus = _18 & 7;
  # DEBUG BEGIN_STMT
  u32ElapsedTicks = 0;
  # DEBUG BEGIN_STMT
  goto <bb 4>; [INV]

  <bb 3> :
  # DEBUG BEGIN_STMT
  _19 = pBase->MSR;
  u32MsrStatus = _19 & 7;
  # DEBUG BEGIN_STMT
  D.5580 = OsIf_GetElapsed (&u32CurrentTicks, 0);
  u32ElapsedTicks = D.5580 + u32ElapsedTicks;

  <bb 4> :
  # DEBUG BEGIN_STMT
  if (u32MsrStatus != 0)
    goto <bb 5>; [INV]
  else
    goto <bb 6>; [INV]

  <bb 5> :
  if (u32ElapsedTicks < u32TimeoutTicks)
    goto <bb 3>; [INV]
  else
    goto <bb 6>; [INV]

  <bb 6> :
  # DEBUG BEGIN_STMT
  SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_35 ();
  # DEBUG BEGIN_STMT
  _20 = pBase->STCR2;
  _21 = _20 & 4294967167;
  pBase->STCR2 = _21;
  # DEBUG BEGIN_STMT
  SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_35 ();
  # DEBUG BEGIN_STMT
  if (u32ElapsedTicks >= u32TimeoutTicks)
    goto <bb 7>; [INV]
  else
    goto <bb 8>; [INV]

  <bb 7> :
  # DEBUG BEGIN_STMT
  eStatus = 2;

  <bb 8> :
  # DEBUG BEGIN_STMT
  D.5584 = eStatus;
  u32CurrentTicks = {CLOBBER};
  return D.5584;

}


Adc_Sar_Ip_ClearStatusFlags (const uint32 u32Instance, const uint32 u32Mask)
{
  uint32 u32IsrFlags;
  struct ADC_Type * const pBase;

  <bb 2> :
  # DEBUG BEGIN_STMT
  pBase = pAdcBase[u32Instance];
  # DEBUG BEGIN_STMT
  u32IsrFlags = 0;
  # DEBUG BEGIN_STMT
  _1 = u32Mask & 2;
  u32IsrFlags = u32IsrFlags | _1;
  # DEBUG BEGIN_STMT
  _2 = u32Mask & 1;
  u32IsrFlags = u32IsrFlags | _2;
  # DEBUG BEGIN_STMT
  _3 = u32Mask & 8;
  u32IsrFlags = u32IsrFlags | _3;
  # DEBUG BEGIN_STMT
  _4 = u32Mask & 4;
  u32IsrFlags = u32IsrFlags | _4;
  # DEBUG BEGIN_STMT
  _5 = u32AdcFeatureBitmap[u32Instance];
  _6 = _5 & 4;
  if (_6 != 0)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  # DEBUG BEGIN_STMT
  _7 = u32Mask & 16;
  u32IsrFlags = u32IsrFlags | _7;

  <bb 4> :
  # DEBUG BEGIN_STMT
  pBase->ISR = u32IsrFlags;
  return;

}


Adc_Sar_Ip_GetStatusFlags (const uint32 u32Instance)
{
  uint32 u32Flags;
  uint32 D.5568;
  long unsigned int D.5567;
  long unsigned int D.5566;

  <bb 2> :
  # DEBUG BEGIN_STMT
  u32Flags = 0;
  # DEBUG BEGIN_STMT
  D.5566 = Adc_Sar_GetMsrFlags (u32Instance);
  u32Flags = D.5566 | u32Flags;
  # DEBUG BEGIN_STMT
  D.5567 = Adc_Sar_GetIsrFlags (u32Instance);
  u32Flags = D.5567 | u32Flags;
  # DEBUG BEGIN_STMT
  D.5568 = u32Flags;
  return D.5568;

}


Adc_Sar_Ip_StartConversion (const uint32 u32Instance, const Adc_Sar_Ip_ConvChainType pChainType)
{
  struct ADC_Type * const pBase;

  <bb 2> :
  # DEBUG BEGIN_STMT
  pBase = pAdcBase[u32Instance];
  # DEBUG BEGIN_STMT
  SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_10 ();
  # DEBUG BEGIN_STMT
  _1 = (int) pChainType;
  switch (_1) <default: <L4> [INV], case 0: <L0> [INV], case 1: <L1> [INV]>

  <bb 3> :
<L0>:
  # DEBUG BEGIN_STMT
  _2 = pBase->MCR;
  _3 = _2 | 16777216;
  pBase->MCR = _3;
  # DEBUG BEGIN_STMT
  goto <bb 5>; [INV]

  <bb 4> :
<L1>:
  # DEBUG BEGIN_STMT
  _4 = pBase->MCR;
  _5 = _4 | 1048576;
  pBase->MCR = _5;
  # DEBUG BEGIN_STMT

  <bb 5> :
<L4>:
  # DEBUG BEGIN_STMT
  SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_10 ();
  return;

}


Adc_Sar_Ip_SetResolution (const uint32 u32Instance, const Adc_Sar_Ip_Resolution eResolution)
{
  uint32 u32Calbistreg;
  struct ADC_Type * const pBase;

  <bb 2> :
  # DEBUG BEGIN_STMT
  pBase = pAdcBase[u32Instance];
  # DEBUG BEGIN_STMT
  SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_37 ();
  # DEBUG BEGIN_STMT
  u32Calbistreg = pBase->CALBISTREG;
  # DEBUG BEGIN_STMT
  u32Calbistreg = u32Calbistreg & 536870911;
  # DEBUG BEGIN_STMT
  _1 = (long unsigned int) eResolution;
  _2 = _1 << 29;
  u32Calbistreg = u32Calbistreg | _2;
  # DEBUG BEGIN_STMT
  pBase->CALBISTREG = u32Calbistreg;
  # DEBUG BEGIN_STMT
  SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_37 ();
  return;

}


Adc_Sar_Ip_DisableChannel (const uint32 u32Instance, const Adc_Sar_Ip_ConvChainType pChainType, const uint32 u32ChnIdx)
{
  uint32 u32VectBit;
  uint32 u32VectAdr;
  struct ADC_Type * const pBase;

  <bb 2> :
  # DEBUG BEGIN_STMT
  pBase = pAdcBase[u32Instance];
  # DEBUG BEGIN_STMT
  u32VectAdr = u32ChnIdx / 32;
  # DEBUG BEGIN_STMT
  u32VectBit = u32ChnIdx & 31;
  # DEBUG BEGIN_STMT
  _1 = (int) pChainType;
  switch (_1) <default: <L4> [INV], case 0: <L0> [INV], case 1: <L1> [INV]>

  <bb 3> :
<L0>:
  # DEBUG BEGIN_STMT
  SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_24 ();
  # DEBUG BEGIN_STMT
  _2 = &pBase->NCMR0;
  _3 = u32VectAdr * 4;
  _4 = _2 + _3;
  _5 = MEM[(volatile uint32 *)_4];
  _6 = 1 << u32VectBit;
  _7 = ~_6;
  _8 = &pBase->NCMR0;
  _9 = u32VectAdr * 4;
  _10 = _8 + _9;
  _11 = _5 & _7;
  MEM[(volatile uint32 *)_10] = _11;
  # DEBUG BEGIN_STMT
  SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_24 ();
  # DEBUG BEGIN_STMT
  goto <bb 5>; [INV]

  <bb 4> :
<L1>:
  # DEBUG BEGIN_STMT
  SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_27 ();
  # DEBUG BEGIN_STMT
  _12 = &pBase->JCMR0;
  _13 = u32VectAdr * 4;
  _14 = _12 + _13;
  _15 = MEM[(volatile uint32 *)_14];
  _16 = 1 << u32VectBit;
  _17 = ~_16;
  _18 = &pBase->JCMR0;
  _19 = u32VectAdr * 4;
  _20 = _18 + _19;
  _21 = _15 & _17;
  MEM[(volatile uint32 *)_20] = _21;
  # DEBUG BEGIN_STMT
  SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_27 ();
  # DEBUG BEGIN_STMT

  <bb 5> :
<L4>:
  return;

}


Adc_Sar_Ip_EnableChannel (const uint32 u32Instance, const Adc_Sar_Ip_ConvChainType pChainType, const uint32 u32ChnIdx)
{
  uint32 u32VectBit;
  uint32 u32VectAdr;
  struct ADC_Type * const pBase;

  <bb 2> :
  # DEBUG BEGIN_STMT
  pBase = pAdcBase[u32Instance];
  # DEBUG BEGIN_STMT
  u32VectAdr = u32ChnIdx / 32;
  # DEBUG BEGIN_STMT
  u32VectBit = u32ChnIdx & 31;
  # DEBUG BEGIN_STMT
  _1 = (int) pChainType;
  switch (_1) <default: <L4> [INV], case 0: <L0> [INV], case 1: <L1> [INV]>

  <bb 3> :
<L0>:
  # DEBUG BEGIN_STMT
  SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_23 ();
  # DEBUG BEGIN_STMT
  _2 = &pBase->NCMR0;
  _3 = u32VectAdr * 4;
  _4 = _2 + _3;
  _5 = MEM[(volatile uint32 *)_4];
  _6 = 1 << u32VectBit;
  _7 = &pBase->NCMR0;
  _8 = u32VectAdr * 4;
  _9 = _7 + _8;
  _10 = _5 | _6;
  MEM[(volatile uint32 *)_9] = _10;
  # DEBUG BEGIN_STMT
  SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_23 ();
  # DEBUG BEGIN_STMT
  goto <bb 5>; [INV]

  <bb 4> :
<L1>:
  # DEBUG BEGIN_STMT
  SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_26 ();
  # DEBUG BEGIN_STMT
  _11 = &pBase->JCMR0;
  _12 = u32VectAdr * 4;
  _13 = _11 + _12;
  _14 = MEM[(volatile uint32 *)_13];
  _15 = 1 << u32VectBit;
  _16 = &pBase->JCMR0;
  _17 = u32VectAdr * 4;
  _18 = _16 + _17;
  _19 = _14 | _15;
  MEM[(volatile uint32 *)_18] = _19;
  # DEBUG BEGIN_STMT
  SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_26 ();
  # DEBUG BEGIN_STMT

  <bb 5> :
<L4>:
  return;

}


Adc_Sar_Ip_ChainConfig (const uint32 u32Instance, const struct Adc_Sar_Ip_ChansIdxMaskType * const pChansIdxMask, const Adc_Sar_Ip_ConvChainType pChainType)
{
  uint8 u8Index;
  struct ADC_Type * const pBase;

  <bb 2> :
  # DEBUG BEGIN_STMT
  pBase = pAdcBase[u32Instance];
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  _1 = (int) pChainType;
  switch (_1) <default: <L16> [INV], case 0: <L0> [INV], case 1: <L7> [INV]>

  <bb 3> :
<L0>:
  # DEBUG BEGIN_STMT
  u8Index = 0;
  goto <bb 8>; [INV]

  <bb 4> :
  # DEBUG BEGIN_STMT
  _2 = (int) u8Index;
  _3 = u32AdcChanBitmap[u32Instance][_2];
  if (_3 == 0)
    goto <bb 5>; [INV]
  else
    goto <bb 6>; [INV]

  <bb 5> :
  # DEBUG BEGIN_STMT
  // predicted unlikely by continue predictor.
  goto <bb 7>; [INV]

  <bb 6> :
  # DEBUG BEGIN_STMT
  _4 = (int) u8Index;
  _5 = &pBase->NCMR0;
  _6 = (unsigned int) u8Index;
  _7 = _6 * 4;
  _8 = _5 + _7;
  _9 = pChansIdxMask->aChanMask[_4];
  MEM[(volatile uint32 *)_8] = _9;

  <bb 7> :
  # DEBUG BEGIN_STMT
  u8Index.18_10 = u8Index;
  u8Index = u8Index.18_10 + 1;

  <bb 8> :
  # DEBUG BEGIN_STMT
  if (u8Index <= 2)
    goto <bb 4>; [INV]
  else
    goto <bb 15>; [INV]

  <bb 9> :
<L7>:
  # DEBUG BEGIN_STMT
  u8Index = 0;
  goto <bb 14>; [INV]

  <bb 10> :
  # DEBUG BEGIN_STMT
  _11 = (int) u8Index;
  _12 = u32AdcChanBitmap[u32Instance][_11];
  if (_12 == 0)
    goto <bb 11>; [INV]
  else
    goto <bb 12>; [INV]

  <bb 11> :
  # DEBUG BEGIN_STMT
  // predicted unlikely by continue predictor.
  goto <bb 13>; [INV]

  <bb 12> :
  # DEBUG BEGIN_STMT
  _13 = (int) u8Index;
  _14 = &pBase->JCMR0;
  _15 = (unsigned int) u8Index;
  _16 = _15 * 4;
  _17 = _14 + _16;
  _18 = pChansIdxMask->aChanMask[_13];
  MEM[(volatile uint32 *)_17] = _18;

  <bb 13> :
  # DEBUG BEGIN_STMT
  u8Index.19_19 = u8Index;
  u8Index = u8Index.19_19 + 1;

  <bb 14> :
  # DEBUG BEGIN_STMT
  if (u8Index <= 2)
    goto <bb 10>; [INV]
  else
    goto <bb 15>; [INV]

  <bb 15> :
<L16>:
  return;

}


Adc_Sar_Ip_Deinit (const uint32 u32Instance)
{
  struct ADC_Type * const pBase;
  Adc_Sar_Ip_StatusType eStatus;
  struct Adc_Sar_Ip_ConfigType pDefaultConfig;
  uint8 u8Index;
  Adc_Sar_Ip_StatusType D.5543;

  <bb 2> :
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  pBase = pAdcBase[u32Instance];
  # DEBUG BEGIN_STMT
  pDefaultConfig.eConvMode = 0;
  # DEBUG BEGIN_STMT
  pDefaultConfig.eClkSelect = 0;
  # DEBUG BEGIN_STMT
  pDefaultConfig.eCalibrationClkSelect = 1;
  # DEBUG BEGIN_STMT
  pDefaultConfig.eCtuMode = 0;
  # DEBUG BEGIN_STMT
  pDefaultConfig.eInjectedEdge = 0;
  # DEBUG BEGIN_STMT
  pDefaultConfig.eExtTrigger = 0;
  # DEBUG BEGIN_STMT
  pDefaultConfig.bNormalExtTrgEn = 0;
  # DEBUG BEGIN_STMT
  pDefaultConfig.bNormalAuxExtTrgEn = 0;
  # DEBUG BEGIN_STMT
  u8Index = 0;
  goto <bb 4>; [INV]

  <bb 3> :
  # DEBUG BEGIN_STMT
  _1 = (int) u8Index;
  pDefaultConfig.aSampleTime[_1] = 22;
  # DEBUG BEGIN_STMT
  _2 = (int) u8Index;
  pDefaultConfig.aPresamplingSource[_2] = 0;
  # DEBUG BEGIN_STMT
  u8Index.12_3 = u8Index;
  u8Index = u8Index.12_3 + 1;

  <bb 4> :
  # DEBUG BEGIN_STMT
  if (u8Index <= 2)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 5> :
  # DEBUG BEGIN_STMT
  pDefaultConfig.bBypassSampling = 0;
  # DEBUG BEGIN_STMT
  pDefaultConfig.bAutoClockOff = 0;
  # DEBUG BEGIN_STMT
  pDefaultConfig.bOverwriteEnable = 0;
  # DEBUG BEGIN_STMT
  pDefaultConfig.eDataAlign = 0;
  # DEBUG BEGIN_STMT
  pDefaultConfig.u16DecodeDelay = 0;
  # DEBUG BEGIN_STMT
  pDefaultConfig.u8PowerDownDelay = 0;
  # DEBUG BEGIN_STMT
  pDefaultConfig.bAvgEn = 0;
  # DEBUG BEGIN_STMT
  pDefaultConfig.eAvgSel = 0;
  # DEBUG BEGIN_STMT
  pDefaultConfig.u8UsrOffset = 0;
  # DEBUG BEGIN_STMT
  pDefaultConfig.u16UsrGain = 0;
  # DEBUG BEGIN_STMT
  pDefaultConfig.eDmaClearSource = 0;
  # DEBUG BEGIN_STMT
  pDefaultConfig.u8NumChannels = 0;
  # DEBUG BEGIN_STMT
  pDefaultConfig.pChannelConfigs = 0B;
  # DEBUG BEGIN_STMT
  pDefaultConfig.u8NumWdgThresholds = 0;
  # DEBUG BEGIN_STMT
  pDefaultConfig.pWdgThresholds = 0B;
  # DEBUG BEGIN_STMT
  pDefaultConfig.pfEndOfNormalChainNotification = 0B;
  # DEBUG BEGIN_STMT
  pDefaultConfig.pfEndOfInjectedChainNotification = 0B;
  # DEBUG BEGIN_STMT
  pDefaultConfig.pfEndOfCtuConversionNotification = 0B;
  # DEBUG BEGIN_STMT
  pDefaultConfig.pfEndOfConvNotification = 0B;
  # DEBUG BEGIN_STMT
  pDefaultConfig.pfWdgOutOfRangeNotification = 0B;
  # DEBUG BEGIN_STMT
  eStatus = Adc_Sar_Ip_Init (u32Instance, &pDefaultConfig);
  # DEBUG BEGIN_STMT
  if (eStatus != 0)
    goto <bb 6>; [INV]
  else
    goto <bb 7>; [INV]

  <bb 6> :
  # DEBUG BEGIN_STMT
  D.5543 = eStatus;
  // predicted unlikely by early return (on trees) predictor.
  goto <bb 17>; [INV]

  <bb 7> :
  # DEBUG BEGIN_STMT
  u8Index = 0;
  goto <bb 15>; [INV]

  <bb 8> :
  # DEBUG BEGIN_STMT
  _4 = (int) u8Index;
  _5 = u32AdcChanBitmap[u32Instance][_4];
  if (_5 != 0)
    goto <bb 9>; [INV]
  else
    goto <bb 10>; [INV]

  <bb 9> :
  # DEBUG BEGIN_STMT
  _6 = &pBase->CIMR0;
  _7 = (unsigned int) u8Index;
  _8 = _7 * 4;
  _9 = _6 + _8;
  MEM[(volatile uint32 *)_9] = 0;

  <bb 10> :
  # DEBUG BEGIN_STMT
  _10 = (int) u8Index;
  _11 = u32AdcChanBitmap[u32Instance][_10];
  if (_11 != 0)
    goto <bb 11>; [INV]
  else
    goto <bb 12>; [INV]

  <bb 11> :
  # DEBUG BEGIN_STMT
  _12 = &pBase->CEOCFR0;
  _13 = (unsigned int) u8Index;
  _14 = _13 * 4;
  _15 = _12 + _14;
  MEM[(volatile uint32 *)_15] = 4294967295;

  <bb 12> :
  # DEBUG BEGIN_STMT
  _16 = (int) u8Index;
  _17 = u32AdcChanBitmap[u32Instance][_16];
  if (_17 != 0)
    goto <bb 13>; [INV]
  else
    goto <bb 14>; [INV]

  <bb 13> :
  # DEBUG BEGIN_STMT
  _18 = &pBase->PSR0;
  _19 = (unsigned int) u8Index;
  _20 = _19 * 4;
  _21 = _18 + _20;
  MEM[(volatile uint32 *)_21] = 0;

  <bb 14> :
  # DEBUG BEGIN_STMT
  u8Index.13_22 = u8Index;
  u8Index = u8Index.13_22 + 1;

  <bb 15> :
  # DEBUG BEGIN_STMT
  if (u8Index <= 2)
    goto <bb 8>; [INV]
  else
    goto <bb 16>; [INV]

  <bb 16> :
  # DEBUG BEGIN_STMT
  Adc_Sar_ResetWdog (u32Instance);
  # DEBUG BEGIN_STMT
  pBase->WTIMR = 0;
  # DEBUG BEGIN_STMT
  Adc_Sar_Ip_ClearStatusFlags (u32Instance, 31);
  # DEBUG BEGIN_STMT
  Adc_Sar_Ip_SetResolution (u32Instance, 1);
  # DEBUG BEGIN_STMT
  aAdcSarState[u32Instance].bInit = 0;
  # DEBUG BEGIN_STMT
  eStatus = Adc_Sar_Ip_Powerdown (u32Instance);
  # DEBUG BEGIN_STMT
  D.5543 = eStatus;

  <bb 17> :
  pDefaultConfig = {CLOBBER};
  return D.5543;

}


Adc_Sar_Ip_Init (const uint32 u32Instance, const struct Adc_Sar_Ip_ConfigType * const pConfig)
{
  uint8 u8Index;
  struct ADC_Type * const pBase;
  Adc_Sar_Ip_StatusType eStatus;
  long unsigned int iftmp.3;
  Adc_Sar_Ip_StatusType D.5468;

  <bb 2> :
  # DEBUG BEGIN_STMT
  eStatus = 0;
  # DEBUG BEGIN_STMT
  pBase = pAdcBase[u32Instance];
  # DEBUG BEGIN_STMT
  u8Index = 0;
  # DEBUG BEGIN_STMT
  Adc_Sar_Ip_AbortChain (u32Instance, 1, 0);
  # DEBUG BEGIN_STMT
  _1 = pBase->MCR;
  _2 = _1 & 4294836223;
  pBase->MCR = _2;
  # DEBUG BEGIN_STMT
  eStatus = Adc_Sar_Ip_Powerdown (u32Instance);
  # DEBUG BEGIN_STMT
  if (eStatus != 0)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  # DEBUG BEGIN_STMT
  D.5468 = eStatus;
  // predicted unlikely by early return (on trees) predictor.
  goto <bb 38>; [INV]

  <bb 4> :
  # DEBUG BEGIN_STMT
  _3 = Adc_Sar_CollectMcrMasks (u32Instance, pConfig);
  pBase->MCR = _3;
  # DEBUG BEGIN_STMT
  _4 = pConfig->eDataAlign;
  aAdcSarState[u32Instance].eDataAlign = _4;
  # DEBUG BEGIN_STMT
  eStatus = Adc_Sar_Ip_Powerup (u32Instance);
  # DEBUG BEGIN_STMT
  if (eStatus != 0)
    goto <bb 5>; [INV]
  else
    goto <bb 6>; [INV]

  <bb 5> :
  # DEBUG BEGIN_STMT
  D.5468 = eStatus;
  // predicted unlikely by early return (on trees) predictor.
  goto <bb 38>; [INV]

  <bb 6> :
  # DEBUG BEGIN_STMT
  _5 = u32AdcChanBitmap[u32Instance][0];
  if (_5 != 0)
    goto <bb 7>; [INV]
  else
    goto <bb 8>; [INV]

  <bb 7> :
  # DEBUG BEGIN_STMT
  _6 = pConfig->aSampleTime[0];
  _7 = &pBase->CTR0;
  _8 = (long unsigned int) _6;
  MEM[(volatile uint32 *)_7] = _8;

  <bb 8> :
  # DEBUG BEGIN_STMT
  _9 = u32AdcChanBitmap[u32Instance][1];
  if (_9 != 0)
    goto <bb 9>; [INV]
  else
    goto <bb 10>; [INV]

  <bb 9> :
  # DEBUG BEGIN_STMT
  _10 = pConfig->aSampleTime[1];
  _11 = &pBase->CTR0;
  _12 = _11 + 4;
  _13 = (long unsigned int) _10;
  MEM[(volatile uint32 *)_12] = _13;

  <bb 10> :
  # DEBUG BEGIN_STMT
  _14 = u32AdcChanBitmap[u32Instance][2];
  if (_14 != 0)
    goto <bb 11>; [INV]
  else
    goto <bb 12>; [INV]

  <bb 11> :
  # DEBUG BEGIN_STMT
  _15 = pConfig->aSampleTime[2];
  _16 = &pBase->CTR0;
  _17 = _16 + 8;
  _18 = (long unsigned int) _15;
  MEM[(volatile uint32 *)_17] = _18;

  <bb 12> :
  # DEBUG BEGIN_STMT
  _19 = pConfig->u8PowerDownDelay;
  _20 = (long unsigned int) _19;
  pBase->PDEDR = _20;
  # DEBUG BEGIN_STMT
  _21 = u32AdcFeatureBitmap[u32Instance];
  _22 = _21 & 1;
  if (_22 != 0)
    goto <bb 13>; [INV]
  else
    goto <bb 14>; [INV]

  <bb 13> :
  # DEBUG BEGIN_STMT
  _23 = pConfig->u16DecodeDelay;
  _24 = (long unsigned int) _23;
  pBase->DSDR = _24;

  <bb 14> :
  # DEBUG BEGIN_STMT
  u8Index = 0;
  goto <bb 19>; [INV]

  <bb 15> :
  # DEBUG BEGIN_STMT
  _25 = (int) u8Index;
  _26 = u32AdcChanBitmap[u32Instance][_25];
  if (_26 == 0)
    goto <bb 16>; [INV]
  else
    goto <bb 17>; [INV]

  <bb 16> :
  # DEBUG BEGIN_STMT
  // predicted unlikely by continue predictor.
  goto <bb 18>; [INV]

  <bb 17> :
  # DEBUG BEGIN_STMT
  _27 = (int) u8Index;
  _28 = &pBase->NCMR0;
  _29 = (unsigned int) u8Index;
  _30 = _29 * 4;
  _31 = _28 + _30;
  _32 = pConfig->pChanMaskNormal[_27];
  MEM[(volatile uint32 *)_31] = _32;

  <bb 18> :
  # DEBUG BEGIN_STMT
  u8Index.0_33 = u8Index;
  u8Index = u8Index.0_33 + 1;

  <bb 19> :
  # DEBUG BEGIN_STMT
  if (u8Index <= 2)
    goto <bb 15>; [INV]
  else
    goto <bb 20>; [INV]

  <bb 20> :
  # DEBUG BEGIN_STMT
  u8Index = 0;
  goto <bb 25>; [INV]

  <bb 21> :
  # DEBUG BEGIN_STMT
  _34 = (int) u8Index;
  _35 = u32AdcChanBitmap[u32Instance][_34];
  if (_35 == 0)
    goto <bb 22>; [INV]
  else
    goto <bb 23>; [INV]

  <bb 22> :
  # DEBUG BEGIN_STMT
  // predicted unlikely by continue predictor.
  goto <bb 24>; [INV]

  <bb 23> :
  # DEBUG BEGIN_STMT
  _36 = (int) u8Index;
  _37 = &pBase->JCMR0;
  _38 = (unsigned int) u8Index;
  _39 = _38 * 4;
  _40 = _37 + _39;
  _41 = pConfig->pChanMaskInjected[_36];
  MEM[(volatile uint32 *)_40] = _41;

  <bb 24> :
  # DEBUG BEGIN_STMT
  u8Index.1_42 = u8Index;
  u8Index = u8Index.1_42 + 1;

  <bb 25> :
  # DEBUG BEGIN_STMT
  if (u8Index <= 2)
    goto <bb 21>; [INV]
  else
    goto <bb 26>; [INV]

  <bb 26> :
  # DEBUG BEGIN_STMT
  _43 = pConfig->eAdcResolution;
  Adc_Sar_Ip_SetResolution (u32Instance, _43);
  # DEBUG BEGIN_STMT
  _44 = pConfig->pWdgThresholds;
  if (_44 != 0B)
    goto <bb 27>; [INV]
  else
    goto <bb 31>; [INV]

  <bb 27> :
  _45 = pConfig->u8NumWdgThresholds;
  if (_45 != 0)
    goto <bb 28>; [INV]
  else
    goto <bb 31>; [INV]

  <bb 28> :
  # DEBUG BEGIN_STMT
  u8Index = 0;
  goto <bb 30>; [INV]

  <bb 29> :
  # DEBUG BEGIN_STMT
  _46 = pConfig->pWdgThresholds;
  _47 = (unsigned int) u8Index;
  _48 = _47 * 8;
  _49 = _46 + _48;
  _50 = _49->u8WdgIndex;
  _51 = pConfig->pWdgThresholds;
  _52 = (unsigned int) u8Index;
  _53 = _52 * 8;
  _54 = _51 + _53;
  Adc_Sar_Ip_SetWdgThreshold (u32Instance, _50, _54);
  # DEBUG BEGIN_STMT
  u8Index.2_55 = u8Index;
  u8Index = u8Index.2_55 + 1;

  <bb 30> :
  # DEBUG BEGIN_STMT
  _56 = pConfig->u8NumWdgThresholds;
  if (u8Index < _56)
    goto <bb 29>; [INV]
  else
    goto <bb 31>; [INV]

  <bb 31> :
  # DEBUG BEGIN_STMT
  _57 = pConfig->pChannelConfigs;
  if (_57 != 0B)
    goto <bb 32>; [INV]
  else
    goto <bb 34>; [INV]

  <bb 32> :
  _58 = pConfig->u8NumChannels;
  if (_58 != 0)
    goto <bb 33>; [INV]
  else
    goto <bb 34>; [INV]

  <bb 33> :
  # DEBUG BEGIN_STMT
  _59 = pConfig->pChannelConfigs;
  _60 = pConfig->u8NumChannels;
  Adc_Sar_EnableChannelWatchdog (u32Instance, _59, _60);

  <bb 34> :
  # DEBUG BEGIN_STMT
  _61 = pBase->PSCR;
  _62 = _61 & 4294967294;
  pBase->PSCR = _62;
  # DEBUG BEGIN_STMT
  _63 = pBase->PSCR;
  _64 = pConfig->bBypassSampling;
  if (_64 != 0)
    goto <bb 35>; [INV]
  else
    goto <bb 36>; [INV]

  <bb 35> :
  iftmp.3 = 1;
  goto <bb 37>; [INV]

  <bb 36> :
  iftmp.3 = 0;

  <bb 37> :
  _65 = iftmp.3 | _63;
  pBase->PSCR = _65;
  # DEBUG BEGIN_STMT
  _66 = pConfig->aPresamplingSource[0];
  Adc_Sar_Ip_SetPresamplingSource (u32Instance, 0, _66);
  # DEBUG BEGIN_STMT
  _67 = pConfig->aPresamplingSource[1];
  Adc_Sar_Ip_SetPresamplingSource (u32Instance, 1, _67);
  # DEBUG BEGIN_STMT
  _68 = pConfig->aPresamplingSource[2];
  Adc_Sar_Ip_SetPresamplingSource (u32Instance, 2, _68);
  # DEBUG BEGIN_STMT
  _69 = pConfig->pfEndOfNormalChainNotification;
  aAdcSarState[u32Instance].pfEndOfNormalChainNotification = _69;
  # DEBUG BEGIN_STMT
  _70 = pConfig->pfEndOfInjectedChainNotification;
  aAdcSarState[u32Instance].pfEndOfInjectedChainNotification = _70;
  # DEBUG BEGIN_STMT
  _71 = pConfig->pfEndOfCtuConversionNotification;
  aAdcSarState[u32Instance].pfEndOfCtuConversionNotification = _71;
  # DEBUG BEGIN_STMT
  _72 = pConfig->pfEndOfConvNotification;
  aAdcSarState[u32Instance].pfEndOfConvNotification = _72;
  # DEBUG BEGIN_STMT
  _73 = pConfig->pfWdgOutOfRangeNotification;
  aAdcSarState[u32Instance].pfWdgOutOfRangeNotification = _73;
  # DEBUG BEGIN_STMT
  _74 = pConfig->eCalibrationClkSelect;
  aAdcSarState[u32Instance].eCalibrationClkSelect = _74;
  # DEBUG BEGIN_STMT
  _75 = pConfig->eDmaClearSource;
  Adc_Sar_Ip_SetDmaClearSource (u32Instance, _75);
  # DEBUG BEGIN_STMT
  _76 = pConfig->u8UsrOffset;
  _77 = (long unsigned int) _76;
  _78 = pConfig->u16UsrGain;
  _79 = (long unsigned int) _78;
  _80 = _79 << 16;
  _81 = _80 & 67043328;
  _82 = _77 | _81;
  pBase->OFSGNUSR = _82;
  # DEBUG BEGIN_STMT
  aAdcSarState[u32Instance].bInit = 1;
  # DEBUG BEGIN_STMT
  D.5468 = eStatus;

  <bb 38> :
  return D.5468;

}


Adc_Sar_Ip_IRQHandler (const uint32 u32Instance)
{
  struct ADC_Type * const pBase;

  <bb 2> :
  # DEBUG BEGIN_STMT
  pBase = pAdcBase[u32Instance];
  # DEBUG BEGIN_STMT
  _1 = pBase->ISR;
  _2 = _1 & 16;
  if (_2 != 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  # DEBUG BEGIN_STMT
  pBase->ISR = 16;
  # DEBUG BEGIN_STMT
  _3 = pBase->IMR;
  _4 = _3 & 16;
  if (_4 != 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  # DEBUG BEGIN_STMT
  _5 = aAdcSarState[u32Instance].pfEndOfCtuConversionNotification;
  Adc_Sar_CheckAndCallNotification (u32Instance, _5);

  <bb 5> :
  # DEBUG BEGIN_STMT
  _6 = pBase->ISR;
  _7 = _6 & 1;
  if (_7 != 0)
    goto <bb 6>; [INV]
  else
    goto <bb 8>; [INV]

  <bb 6> :
  # DEBUG BEGIN_STMT
  pBase->ISR = 1;
  # DEBUG BEGIN_STMT
  _8 = pBase->IMR;
  _9 = _8 & 1;
  if (_9 != 0)
    goto <bb 7>; [INV]
  else
    goto <bb 8>; [INV]

  <bb 7> :
  # DEBUG BEGIN_STMT
  _10 = aAdcSarState[u32Instance].pfEndOfNormalChainNotification;
  Adc_Sar_CheckAndCallNotification (u32Instance, _10);

  <bb 8> :
  # DEBUG BEGIN_STMT
  _11 = pBase->ISR;
  _12 = _11 & 4;
  if (_12 != 0)
    goto <bb 9>; [INV]
  else
    goto <bb 11>; [INV]

  <bb 9> :
  # DEBUG BEGIN_STMT
  pBase->ISR = 4;
  # DEBUG BEGIN_STMT
  _13 = pBase->IMR;
  _14 = _13 & 4;
  if (_14 != 0)
    goto <bb 10>; [INV]
  else
    goto <bb 11>; [INV]

  <bb 10> :
  # DEBUG BEGIN_STMT
  _15 = aAdcSarState[u32Instance].pfEndOfInjectedChainNotification;
  Adc_Sar_CheckAndCallNotification (u32Instance, _15);

  <bb 11> :
  # DEBUG BEGIN_STMT
  _16 = pBase->ISR;
  _17 = _16 & 2;
  if (_17 != 0)
    goto <bb 12>; [INV]
  else
    goto <bb 13>; [INV]

  <bb 12> :
  # DEBUG BEGIN_STMT
  pBase->ISR = 2;

  <bb 13> :
  # DEBUG BEGIN_STMT
  _18 = pBase->ISR;
  _19 = _18 & 8;
  if (_19 != 0)
    goto <bb 14>; [INV]
  else
    goto <bb 15>; [INV]

  <bb 14> :
  # DEBUG BEGIN_STMT
  pBase->ISR = 8;

  <bb 15> :
  return;

}


Adc_Sar_ConfigExternalTrigger (const uint32 u32Instance, const Adc_Sar_Ip_ExtTriggerEdgeType eTriggerEdge, const uint32 u32TrgEdgeSetMask, const uint32 u32TrgEdgeClrMask, const uint32 u32TrigSrcMask)
{
  struct ADC_Type * const pBase;

  <bb 2> :
  # DEBUG BEGIN_STMT
  pBase = pAdcBase[u32Instance];
  # DEBUG BEGIN_STMT
  SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_21 ();
  # DEBUG BEGIN_STMT
  _1 = (int) eTriggerEdge;
  switch (_1) <default: <L5> [INV], case 0: <L2> [INV], case 1: <L0> [INV], case 2: <L1> [INV]>

  <bb 3> :
<L0>:
  # DEBUG BEGIN_STMT
  _2 = pBase->MCR;
  _3 = ~u32TrgEdgeSetMask;
  _4 = _2 & _3;
  pBase->MCR = _4;
  # DEBUG BEGIN_STMT
  _5 = pBase->MCR;
  _6 = u32TrigSrcMask | _5;
  pBase->MCR = _6;
  # DEBUG BEGIN_STMT
  goto <bb 6>; [INV]

  <bb 4> :
<L1>:
  # DEBUG BEGIN_STMT
  _7 = pBase->MCR;
  _8 = u32TrgEdgeSetMask | u32TrigSrcMask;
  _9 = _7 | _8;
  pBase->MCR = _9;
  # DEBUG BEGIN_STMT
  goto <bb 6>; [INV]

  <bb 5> :
<L2>:
  # DEBUG BEGIN_STMT
  _10 = pBase->MCR;
  _11 = u32TrgEdgeClrMask | u32TrigSrcMask;
  _12 = ~_11;
  _13 = _10 & _12;
  pBase->MCR = _13;
  # DEBUG BEGIN_STMT

  <bb 6> :
<L5>:
  # DEBUG BEGIN_STMT
  SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_21 ();
  return;

}


Adc_Sar_Ip_GetDataAddress (uint32 u32Instance, uint32 u32ChannelIndex)
{
  uint32 D.5444;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = pAdcBase[u32Instance];
  _2 = &_1->PCDR[0];
  _3 = u32ChannelIndex * 4;
  _4 = _2 + _3;
  D.5444 = (uint32) _4;
  return D.5444;

}


Adc_Sar_CheckAndCallNotification (const uint32 u32Instance, void (*<T34c>) (void) pfCallback)
{
  <bb 2> :
  # DEBUG BEGIN_STMT
  if (pfCallback != 0B)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _1 = aAdcSarState[u32Instance].bInit;
  if (_1 != 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  # DEBUG BEGIN_STMT
  pfCallback ();

  <bb 5> :
  return;

}


Adc_Sar_ResetWdog (const uint32 u32Instance)
{
  uint8 u8Index;
  uint32 u32ThrhlrCount;
  struct ADC_Type * const pBase;

  <bb 2> :
  # DEBUG BEGIN_STMT
  pBase = pAdcBase[u32Instance];
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  u32ThrhlrCount = 4;
  # DEBUG BEGIN_STMT
  u8Index = 0;
  goto <bb 7>; [INV]

  <bb 3> :
  # DEBUG BEGIN_STMT
  _1 = (int) u8Index;
  _2 = u32AdcChanBitmap[u32Instance][_1];
  if (_2 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  # DEBUG BEGIN_STMT
  // predicted unlikely by continue predictor.
  goto <bb 6>; [INV]

  <bb 5> :
  # DEBUG BEGIN_STMT
  _3 = &pBase->CWENR0;
  _4 = (unsigned int) u8Index;
  _5 = _4 * 4;
  _6 = _3 + _5;
  MEM[(volatile uint32 *)_6] = 0;

  <bb 6> :
  # DEBUG BEGIN_STMT
  u8Index.14_7 = u8Index;
  u8Index = u8Index.14_7 + 1;

  <bb 7> :
  # DEBUG BEGIN_STMT
  if (u8Index <= 2)
    goto <bb 3>; [INV]
  else
    goto <bb 8>; [INV]

  <bb 8> :
  # DEBUG BEGIN_STMT
  u8Index = 0;
  goto <bb 13>; [INV]

  <bb 9> :
  # DEBUG BEGIN_STMT
  _8 = (int) u8Index;
  _9 = u32AdcChanBitmap[u32Instance][_8];
  if (_9 == 0)
    goto <bb 10>; [INV]
  else
    goto <bb 11>; [INV]

  <bb 10> :
  # DEBUG BEGIN_STMT
  // predicted unlikely by continue predictor.
  goto <bb 12>; [INV]

  <bb 11> :
  # DEBUG BEGIN_STMT
  _10 = &pBase->AWORR0;
  _11 = (unsigned int) u8Index;
  _12 = _11 * 4;
  _13 = _10 + _12;
  MEM[(volatile uint32 *)_13] = 4294967295;

  <bb 12> :
  # DEBUG BEGIN_STMT
  u8Index.15_14 = u8Index;
  u8Index = u8Index.15_14 + 1;

  <bb 13> :
  # DEBUG BEGIN_STMT
  if (u8Index <= 2)
    goto <bb 9>; [INV]
  else
    goto <bb 14>; [INV]

  <bb 14> :
  # DEBUG BEGIN_STMT
  u8Index = 0;
  goto <bb 16>; [INV]

  <bb 15> :
  # DEBUG BEGIN_STMT
  Adc_Sar_WriteThresholds (pBase, u8Index, 65535, 0);
  # DEBUG BEGIN_STMT
  u8Index.16_15 = u8Index;
  u8Index = u8Index.16_15 + 1;

  <bb 16> :
  # DEBUG BEGIN_STMT
  _16 = (long unsigned int) u8Index;
  if (u32ThrhlrCount > _16)
    goto <bb 15>; [INV]
  else
    goto <bb 17>; [INV]

  <bb 17> :
  # DEBUG BEGIN_STMT
  u8Index = 0;
  goto <bb 22>; [INV]

  <bb 18> :
  # DEBUG BEGIN_STMT
  _17 = u8Index / 4;
  _18 = (unsigned int) _17;
  _19 = u32AdcChanBitmap[u32Instance][_18];
  _20 = (unsigned int) u8Index;
  _21 = _20 & 3;
  _22 = _21 * 8;
  _23 = 255 << _22;
  _24 = _19 & _23;
  if (_24 == 0)
    goto <bb 19>; [INV]
  else
    goto <bb 20>; [INV]

  <bb 19> :
  # DEBUG BEGIN_STMT
  // predicted unlikely by continue predictor.
  goto <bb 21>; [INV]

  <bb 20> :
  # DEBUG BEGIN_STMT
  Adc_Sar_ResetWdogCWSELR (pBase, u8Index);

  <bb 21> :
  # DEBUG BEGIN_STMT
  u8Index.17_25 = u8Index;
  u8Index = u8Index.17_25 + 1;

  <bb 22> :
  # DEBUG BEGIN_STMT
  if (u8Index <= 2)
    goto <bb 18>; [INV]
  else
    goto <bb 23>; [INV]

  <bb 23> :
  return;

}


Adc_Sar_GetConvResults (const uint32 u32Instance, const Adc_Sar_Ip_ConvChainType pChainType, uint16 * const pResultsRaw, struct Adc_Sar_Ip_ChanResultType * const pResultsStruct, const uint32 u32Length)
{
  uint32 u32Cdr;
  uint8 u8ChnIdx;
  uint32 u32VectBit;
  uint32 u32VectAdr;
  struct ADC_Type * const pBase;
  boolean bLengthExceeded;
  uint32 u32Index;
  uint32 D.5617;

  <bb 2> :
  # DEBUG BEGIN_STMT
  u32Index = 0;
  # DEBUG BEGIN_STMT
  bLengthExceeded = 0;
  # DEBUG BEGIN_STMT
  pBase = pAdcBase[u32Instance];
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  u32VectAdr = 0;
  goto <bb 19>; [INV]

  <bb 3> :
  # DEBUG BEGIN_STMT
  _1 = u32AdcChanBitmap[u32Instance][u32VectAdr];
  if (_1 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  # DEBUG BEGIN_STMT
  // predicted unlikely by continue predictor.
  goto <bb 18>; [INV]

  <bb 5> :
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  u32VectBit = 0;
  goto <bb 16>; [INV]

  <bb 6> :
  # DEBUG BEGIN_STMT
  _2 = (unsigned char) u32VectAdr;
  _3 = _2 * 32;
  _4 = (unsigned char) u32VectBit;
  u8ChnIdx = _3 + _4;
  # DEBUG BEGIN_STMT
  _5 = u8ChnIdx / 32;
  _6 = (unsigned int) _5;
  _7 = u32AdcChanBitmap[u32Instance][_6];
  _8 = (unsigned int) u8ChnIdx;
  _9 = _8 & 31;
  _10 = _7 >> _9;
  _11 = _10 & 1;
  if (_11 == 0)
    goto <bb 7>; [INV]
  else
    goto <bb 8>; [INV]

  <bb 7> :
  # DEBUG BEGIN_STMT
  // predicted unlikely by continue predictor.
  goto <bb 15>; [INV]

  <bb 8> :
  # DEBUG BEGIN_STMT
  _12 = &pBase->PCDR[0];
  _13 = (unsigned int) u8ChnIdx;
  _14 = _13 * 4;
  _15 = _12 + _14;
  u32Cdr = MEM[(volatile uint32 *)_15];
  # DEBUG BEGIN_STMT
  _16 = (long unsigned int) pChainType;
  _17 = _16 << 16;
  _18 = _17 & 196608;
  _19 = _18 | 524288;
  _20 = u32Cdr & 720896;
  if (_19 == _20)
    goto <bb 9>; [INV]
  else
    goto <bb 15>; [INV]

  <bb 9> :
  # DEBUG BEGIN_STMT
  if (pResultsRaw != 0B)
    goto <bb 10>; [INV]
  else
    goto <bb 11>; [INV]

  <bb 10> :
  # DEBUG BEGIN_STMT
  _21 = u32Index * 2;
  _22 = pResultsRaw + _21;
  _23 = Adc_Sar_GetMaskedResult (u32Instance, u32Cdr);
  *_22 = _23;

  <bb 11> :
  # DEBUG BEGIN_STMT
  if (pResultsStruct != 0B)
    goto <bb 12>; [INV]
  else
    goto <bb 13>; [INV]

  <bb 12> :
  # DEBUG BEGIN_STMT
  _24 = u32Index * 6;
  _25 = pResultsStruct + _24;
  _26 = Adc_Sar_GetMaskedResult (u32Instance, u32Cdr);
  _25->u16ConvData = _26;
  # DEBUG BEGIN_STMT
  _27 = u32Index * 6;
  _28 = pResultsStruct + _27;
  _28->u8ChnIdx = u8ChnIdx;
  # DEBUG BEGIN_STMT
  _29 = u32Cdr >> 19;
  _30 = (int) _29;
  _31 = _30 & 1;
  _32 = u32Index * 6;
  _33 = pResultsStruct + _32;
  _34 = _31 != 0;
  _33->bValid = _34;
  # DEBUG BEGIN_STMT
  _35 = u32Cdr >> 18;
  _36 = (int) _35;
  _37 = _36 & 1;
  _38 = u32Index * 6;
  _39 = pResultsStruct + _38;
  _40 = _37 != 0;
  _39->bOverWritten = _40;

  <bb 13> :
  # DEBUG BEGIN_STMT
  _41 = &pBase->CEOCFR0;
  _42 = u32VectAdr * 4;
  _43 = _41 + _42;
  _44 = 1 << u32VectBit;
  MEM[(volatile uint32 *)_43] = _44;
  # DEBUG BEGIN_STMT
  u32Index = u32Index + 1;
  # DEBUG BEGIN_STMT
  if (u32Index >= u32Length)
    goto <bb 14>; [INV]
  else
    goto <bb 15>; [INV]

  <bb 14> :
  # DEBUG BEGIN_STMT
  bLengthExceeded = 1;
  # DEBUG BEGIN_STMT
  goto <bb 17>; [INV]

  <bb 15> :
  # DEBUG BEGIN_STMT
  u32VectBit = u32VectBit + 1;

  <bb 16> :
  # DEBUG BEGIN_STMT
  if (u32VectBit <= 31)
    goto <bb 6>; [INV]
  else
    goto <bb 17>; [INV]

  <bb 17> :
  # DEBUG BEGIN_STMT
  if (bLengthExceeded != 0)
    goto <bb 20>; [INV]
  else
    goto <bb 18>; [INV]

  <bb 18> :
  # DEBUG BEGIN_STMT
  u32VectAdr = u32VectAdr + 1;

  <bb 19> :
  # DEBUG BEGIN_STMT
  if (u32VectAdr <= 2)
    goto <bb 3>; [INV]
  else
    goto <bb 20>; [INV]

  <bb 20> :
  # DEBUG BEGIN_STMT
  D.5617 = u32Index;
  return D.5617;

}


Adc_Sar_CheckSelfTestProgress (const uint32 u32Instance)
{
  uint8 u8Index;
  uint32 u32ElapsedTicks;
  uint32 u32CurrentTicks;
  uint32 u32TimeoutTicks;
  uint32 u32Reg;
  Adc_Sar_Ip_StatusType eStatus;
  const struct ADC_Type * const pBase;
  Adc_Sar_Ip_StatusType D.5599;
  long unsigned int D.5591;
  long unsigned int D.5587;

  <bb 2> :
  # DEBUG BEGIN_STMT
  pBase = pAdcBase[u32Instance];
  # DEBUG BEGIN_STMT
  eStatus = 0;
  # DEBUG BEGIN_STMT
  u32Reg = 0;
  # DEBUG BEGIN_STMT
  u32TimeoutTicks = OsIf_MicrosToTicks (3000, 0);
  # DEBUG BEGIN_STMT
  _1 = OsIf_GetCounter (0);
  u32CurrentTicks = _1;
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  u8Index = 0;
  goto <bb 16>; [INV]

  <bb 3> :
  # DEBUG BEGIN_STMT
  u32ElapsedTicks = 0;
  # DEBUG BEGIN_STMT
  goto <bb 5>; [INV]

  <bb 4> :
  # DEBUG BEGIN_STMT
  D.5587 = OsIf_GetElapsed (&u32CurrentTicks, 0);
  u32ElapsedTicks = D.5587 + u32ElapsedTicks;

  <bb 5> :
  # DEBUG BEGIN_STMT
  _2 = pBase->MSR;
  _3 = _2 & 262144;
  if (_3 != 262144)
    goto <bb 6>; [INV]
  else
    goto <bb 7>; [INV]

  <bb 6> :
  if (u32ElapsedTicks < u32TimeoutTicks)
    goto <bb 4>; [INV]
  else
    goto <bb 7>; [INV]

  <bb 7> :
  # DEBUG BEGIN_STMT
  if (u32ElapsedTicks >= u32TimeoutTicks)
    goto <bb 8>; [INV]
  else
    goto <bb 9>; [INV]

  <bb 8> :
  # DEBUG BEGIN_STMT
  eStatus = 2;
  # DEBUG BEGIN_STMT
  goto <bb 17>; [INV]

  <bb 9> :
  # DEBUG BEGIN_STMT
  u32ElapsedTicks = 0;
  # DEBUG BEGIN_STMT
  goto <bb 11>; [INV]

  <bb 10> :
  # DEBUG BEGIN_STMT
  D.5591 = OsIf_GetElapsed (&u32CurrentTicks, 0);
  u32ElapsedTicks = D.5591 + u32ElapsedTicks;

  <bb 11> :
  # DEBUG BEGIN_STMT
  _4 = pBase->MSR;
  _5 = _4 & 262144;
  if (_5 == 262144)
    goto <bb 12>; [INV]
  else
    goto <bb 13>; [INV]

  <bb 12> :
  if (u32ElapsedTicks < u32TimeoutTicks)
    goto <bb 10>; [INV]
  else
    goto <bb 13>; [INV]

  <bb 13> :
  # DEBUG BEGIN_STMT
  if (u32ElapsedTicks >= u32TimeoutTicks)
    goto <bb 14>; [INV]
  else
    goto <bb 15>; [INV]

  <bb 14> :
  # DEBUG BEGIN_STMT
  eStatus = 2;
  # DEBUG BEGIN_STMT
  goto <bb 17>; [INV]

  <bb 15> :
  # DEBUG BEGIN_STMT
  u8Index.21_6 = u8Index;
  u8Index = u8Index.21_6 + 1;

  <bb 16> :
  # DEBUG BEGIN_STMT
  if (u8Index <= 1)
    goto <bb 3>; [INV]
  else
    goto <bb 17>; [INV]

  <bb 17> :
  # DEBUG BEGIN_STMT
  if (eStatus != 2)
    goto <bb 18>; [INV]
  else
    goto <bb 20>; [INV]

  <bb 18> :
  # DEBUG BEGIN_STMT
  u32Reg = u32Reg | 47104;
  # DEBUG BEGIN_STMT
  _7 = pBase->STSR1;
  _8 = u32Reg & _7;
  if (_8 != 0)
    goto <bb 19>; [INV]
  else
    goto <bb 20>; [INV]

  <bb 19> :
  # DEBUG BEGIN_STMT
  eStatus = 1;

  <bb 20> :
  # DEBUG BEGIN_STMT
  D.5599 = eStatus;
  u32CurrentTicks = {CLOBBER};
  return D.5599;

}


Adc_Sar_EnableChannelWatchdog (const uint32 u32Instance, const struct Adc_Sar_Ip_ChanConfigType * pChannelConfigs, uint8 u8NumChannels)
{
  uint32 u32Pos;
  uint32 u32RegNum;
  const struct Adc_Sar_Ip_ChanConfigType * pChnConfig;
  uint8 u8Index;
  uint32 u32Mask;
  struct ADC_Type * const pBase;
  long unsigned int iftmp.10;

  <bb 2> :
  # DEBUG BEGIN_STMT
  pBase = pAdcBase[u32Instance];
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  u8Index = 0;
  goto <bb 15>; [INV]

  <bb 3> :
  # DEBUG BEGIN_STMT
  _1 = (unsigned int) u8Index;
  _2 = _1 * 5;
  pChnConfig = pChannelConfigs + _2;
  # DEBUG BEGIN_STMT
  _3 = pChnConfig->u8ChannelIndex;
  _4 = _3 / 8;
  u32RegNum = (uint32) _4;
  # DEBUG BEGIN_STMT
  _5 = pChnConfig->u8ChannelIndex;
  _6 = (long unsigned int) _5;
  u32Pos = _6 & 7;
  # DEBUG BEGIN_STMT
  _7 = u32RegNum / 4;
  _8 = u32AdcChanBitmap[u32Instance][_7];
  _9 = u32RegNum & 3;
  _10 = _9 * 8;
  _11 = 255 << _10;
  _12 = _8 & _11;
  if (_12 != 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  # DEBUG BEGIN_STMT
  _13 = pChnConfig->u8WdgThreshRegIndex;
  _14 = (long unsigned int) _13;
  Adc_Sar_WriteChannelMapping (pBase, u32RegNum, u32Pos, _14);

  <bb 5> :
  # DEBUG BEGIN_STMT
  u32Mask = 0;
  # DEBUG BEGIN_STMT
  _15 = pChnConfig->bEndOfConvNotification;
  if (_15 != 0)
    goto <bb 6>; [INV]
  else
    goto <bb 7>; [INV]

  <bb 6> :
  # DEBUG BEGIN_STMT
  u32Mask = u32Mask | 1;

  <bb 7> :
  # DEBUG BEGIN_STMT
  _16 = pChnConfig->bWdgNotification;
  if (_16 != 0)
    goto <bb 8>; [INV]
  else
    goto <bb 9>; [INV]

  <bb 8> :
  # DEBUG BEGIN_STMT
  u32Mask = u32Mask | 2;

  <bb 9> :
  # DEBUG BEGIN_STMT
  _17 = pChnConfig->u8ChannelIndex;
  _18 = (long unsigned int) _17;
  Adc_Sar_Ip_EnableChannelNotifications (u32Instance, _18, u32Mask);
  # DEBUG BEGIN_STMT
  _19 = pChnConfig->u8ChannelIndex;
  _20 = _19 / 32;
  u32RegNum = (uint32) _20;
  # DEBUG BEGIN_STMT
  _21 = pChnConfig->u8ChannelIndex;
  _22 = (long unsigned int) _21;
  u32Pos = _22 & 31;
  # DEBUG BEGIN_STMT
  _23 = u32AdcChanBitmap[u32Instance][u32RegNum];
  if (_23 != 0)
    goto <bb 10>; [INV]
  else
    goto <bb 14>; [INV]

  <bb 10> :
  # DEBUG BEGIN_STMT
  _24 = &pBase->PSR0;
  _25 = u32RegNum * 4;
  _26 = _24 + _25;
  _27 = MEM[(volatile uint32 *)_26];
  _28 = pChnConfig->bPresamplingEnable;
  if (_28 != 0)
    goto <bb 11>; [INV]
  else
    goto <bb 12>; [INV]

  <bb 11> :
  iftmp.10 = 1 << u32Pos;
  goto <bb 13>; [INV]

  <bb 12> :
  iftmp.10 = 0;

  <bb 13> :
  _29 = &pBase->PSR0;
  _30 = u32RegNum * 4;
  _31 = _29 + _30;
  _32 = iftmp.10 | _27;
  MEM[(volatile uint32 *)_31] = _32;

  <bb 14> :
  # DEBUG BEGIN_STMT
  u8Index.11_33 = u8Index;
  u8Index = u8Index.11_33 + 1;

  <bb 15> :
  # DEBUG BEGIN_STMT
  if (u8Index < u8NumChannels)
    goto <bb 3>; [INV]
  else
    goto <bb 16>; [INV]

  <bb 16> :
  return;

}


Adc_Sar_CollectMcrMasks (const uint32 u32Instance, const struct Adc_Sar_Ip_ConfigType * const pConfig)
{
  uint32 u32Mcr;
  uint32 D.5524;
  long unsigned int iftmp.9;
  long unsigned int iftmp.8;
  long unsigned int iftmp.7;
  long unsigned int iftmp.6;
  long unsigned int iftmp.5;
  long unsigned int iftmp.4;

  <bb 2> :
  # DEBUG BEGIN_STMT
  u32Mcr = 0;
  # DEBUG BEGIN_STMT
  _1 = pConfig->eConvMode;
  _2 = (long unsigned int) _1;
  _3 = _2 << 29;
  _4 = _3 & 536870912;
  u32Mcr = u32Mcr | _4;
  # DEBUG BEGIN_STMT
  _5 = pConfig->eClkSelect;
  _6 = (long unsigned int) _5;
  _7 = _6 << 1;
  _8 = _7 & 6;
  u32Mcr = u32Mcr | _8;
  # DEBUG BEGIN_STMT
  _9 = pConfig->bAutoClockOff;
  if (_9 != 0)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  iftmp.4 = 32;
  goto <bb 5>; [INV]

  <bb 4> :
  iftmp.4 = 0;

  <bb 5> :
  u32Mcr = iftmp.4 | u32Mcr;
  # DEBUG BEGIN_STMT
  _10 = pConfig->bOverwriteEnable;
  if (_10 != 0)
    goto <bb 6>; [INV]
  else
    goto <bb 7>; [INV]

  <bb 6> :
  iftmp.5 = 2147483648;
  goto <bb 8>; [INV]

  <bb 7> :
  iftmp.5 = 0;

  <bb 8> :
  u32Mcr = iftmp.5 | u32Mcr;
  # DEBUG BEGIN_STMT
  _11 = pConfig->eDataAlign;
  _12 = (long unsigned int) _11;
  _13 = _12 << 30;
  _14 = _13 & 1073741824;
  u32Mcr = u32Mcr | _14;
  # DEBUG BEGIN_STMT
  _15 = u32AdcFeatureBitmap[u32Instance];
  _16 = _15 & 4;
  if (_16 != 0)
    goto <bb 9>; [INV]
  else
    goto <bb 12>; [INV]

  <bb 9> :
  # DEBUG BEGIN_STMT
  _17 = pConfig->eCtuMode;
  _18 = (int) _17;
  switch (_18) <default: <L33> [INV], case 1: <L7> [INV], case 2: <L8> [INV]>

  <bb 10> :
<L7>:
  # DEBUG BEGIN_STMT
  u32Mcr = u32Mcr | 131072;
  # DEBUG BEGIN_STMT
  goto <bb 12>; [INV]

  <bb 11> :
<L8>:
  # DEBUG BEGIN_STMT
  u32Mcr = u32Mcr | 65536;
  # DEBUG BEGIN_STMT
  u32Mcr = u32Mcr | 131072;
  # DEBUG BEGIN_STMT

  <bb 12> :
<L33>:
  # DEBUG BEGIN_STMT
  _19 = pConfig->eInjectedEdge;
  _20 = (int) _19;
  switch (_20) <default: <L34> [INV], case 1: <L13> [INV], case 2: <L14> [INV]>

  <bb 13> :
<L13>:
  # DEBUG BEGIN_STMT
  u32Mcr = u32Mcr | 4194304;
  # DEBUG BEGIN_STMT
  goto <bb 15>; [INV]

  <bb 14> :
<L14>:
  # DEBUG BEGIN_STMT
  u32Mcr = u32Mcr | 6291456;
  # DEBUG BEGIN_STMT

  <bb 15> :
<L34>:
  # DEBUG BEGIN_STMT
  _21 = pConfig->eExtTrigger;
  if (_21 == 2)
    goto <bb 16>; [INV]
  else
    goto <bb 17>; [INV]

  <bb 16> :
  iftmp.6 = 67108864;
  goto <bb 18>; [INV]

  <bb 17> :
  iftmp.6 = 0;

  <bb 18> :
  u32Mcr = iftmp.6 | u32Mcr;
  # DEBUG BEGIN_STMT
  _22 = pConfig->eExtTrigger;
  if (_22 != 0)
    goto <bb 19>; [INV]
  else
    goto <bb 26>; [INV]

  <bb 19> :
  # DEBUG BEGIN_STMT
  _23 = pConfig->bNormalExtTrgEn;
  if (_23 != 0)
    goto <bb 20>; [INV]
  else
    goto <bb 21>; [INV]

  <bb 20> :
  iftmp.7 = 134217728;
  goto <bb 22>; [INV]

  <bb 21> :
  iftmp.7 = 0;

  <bb 22> :
  u32Mcr = iftmp.7 | u32Mcr;
  # DEBUG BEGIN_STMT
  _24 = pConfig->bNormalAuxExtTrgEn;
  if (_24 != 0)
    goto <bb 23>; [INV]
  else
    goto <bb 24>; [INV]

  <bb 23> :
  iftmp.8 = 33554432;
  goto <bb 25>; [INV]

  <bb 24> :
  iftmp.8 = 0;

  <bb 25> :
  u32Mcr = iftmp.8 | u32Mcr;

  <bb 26> :
  # DEBUG BEGIN_STMT
  _25 = pConfig->bAvgEn;
  if (_25 != 0)
    goto <bb 27>; [INV]
  else
    goto <bb 28>; [INV]

  <bb 27> :
  iftmp.9 = 2048;
  goto <bb 29>; [INV]

  <bb 28> :
  iftmp.9 = 0;

  <bb 29> :
  u32Mcr = iftmp.9 | u32Mcr;
  # DEBUG BEGIN_STMT
  _26 = pConfig->eAvgSel;
  _27 = (long unsigned int) _26;
  _28 = _27 << 9;
  _29 = _28 & 1536;
  u32Mcr = u32Mcr | _29;
  # DEBUG BEGIN_STMT
  D.5524 = u32Mcr;
  return D.5524;

}


Adc_Sar_GetIsrFlags (const uint32 u32Instance)
{
  uint32 u32Flags;
  uint32 u32Isr;
  const struct ADC_Type * const pBase;
  uint32 D.5576;

  <bb 2> :
  # DEBUG BEGIN_STMT
  pBase = pAdcBase[u32Instance];
  # DEBUG BEGIN_STMT
  u32Isr = pBase->ISR;
  # DEBUG BEGIN_STMT
  u32Flags = 0;
  # DEBUG BEGIN_STMT
  _1 = u32Isr & 2;
  u32Flags = u32Flags | _1;
  # DEBUG BEGIN_STMT
  _2 = u32Isr & 1;
  u32Flags = u32Flags | _2;
  # DEBUG BEGIN_STMT
  _3 = u32Isr & 8;
  u32Flags = u32Flags | _3;
  # DEBUG BEGIN_STMT
  _4 = u32Isr & 4;
  u32Flags = u32Flags | _4;
  # DEBUG BEGIN_STMT
  _5 = u32AdcFeatureBitmap[u32Instance];
  _6 = _5 & 4;
  if (_6 != 0)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  # DEBUG BEGIN_STMT
  _7 = u32Isr & 16;
  u32Flags = u32Flags | _7;

  <bb 4> :
  # DEBUG BEGIN_STMT
  D.5576 = u32Flags;
  return D.5576;

}


Adc_Sar_GetMsrFlags (const uint32 u32Instance)
{
  uint32 u32Flags;
  uint32 u32Msr;
  const struct ADC_Type * const pBase;
  uint32 D.5572;

  <bb 2> :
  # DEBUG BEGIN_STMT
  pBase = pAdcBase[u32Instance];
  # DEBUG BEGIN_STMT
  u32Msr = pBase->MSR;
  # DEBUG BEGIN_STMT
  u32Flags = 0;
  # DEBUG BEGIN_STMT
  u32Msr.20_1 = (signed int) u32Msr;
  _2 = u32Msr.20_1 >> 26;
  _3 = (long unsigned int) _2;
  _4 = _3 & 32;
  u32Flags = u32Flags | _4;
  # DEBUG BEGIN_STMT
  _5 = u32Msr >> 18;
  _6 = _5 & 64;
  u32Flags = u32Flags | _6;
  # DEBUG BEGIN_STMT
  _7 = u32Msr >> 15;
  _8 = _7 & 256;
  u32Flags = u32Flags | _8;
  # DEBUG BEGIN_STMT
  _9 = u32Msr >> 13;
  _10 = _9 & 128;
  u32Flags = u32Flags | _10;
  # DEBUG BEGIN_STMT
  _11 = u32AdcFeatureBitmap[u32Instance];
  _12 = _11 & 4;
  if (_12 != 0)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  # DEBUG BEGIN_STMT
  _13 = u32Msr >> 7;
  _14 = _13 & 512;
  u32Flags = u32Flags | _14;

  <bb 4> :
  # DEBUG BEGIN_STMT
  _15 = u32Msr << 5;
  _16 = _15 & 1024;
  u32Flags = u32Flags | _16;
  # DEBUG BEGIN_STMT
  D.5572 = u32Flags;
  return D.5572;

}


Adc_Sar_GetMaskedResult (const uint32 u32Instance, const uint32 u32Cdr)
{
  uint8 u8Resolution;
  uint16 u16Result;
  uint32 u32CdrMask;
  uint16 D.5622;

  <bb 2> :
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  u8Resolution = Adc_Sar_GetResolution (u32Instance);
  # DEBUG BEGIN_STMT
  _1 = (unsigned int) u8Resolution;
  _2 = 16 - _1;
  u32CdrMask = 65535 << _2;
  # DEBUG BEGIN_STMT
  _3 = aAdcSarState[u32Instance].eDataAlign;
  if (_3 == 1)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  # DEBUG BEGIN_STMT
  _4 = (unsigned int) u8Resolution;
  _5 = 16 - _4;
  u32CdrMask = 65535 << _5;
  # DEBUG BEGIN_STMT
  _6 = (short unsigned int) u32Cdr;
  _7 = (short unsigned int) u32CdrMask;
  u16Result = _6 & _7;
  goto <bb 5>; [INV]

  <bb 4> :
  # DEBUG BEGIN_STMT
  _8 = (unsigned int) u8Resolution;
  _9 = 15 - _8;
  _10 = 65535 << _9;
  u32CdrMask = _10 & 32767;
  # DEBUG BEGIN_STMT
  _11 = (short unsigned int) u32Cdr;
  _12 = (short unsigned int) u32CdrMask;
  _13 = _11 & _12;
  _14 = (int) _13;
  _15 = (unsigned int) u8Resolution;
  _16 = 15 - _15;
  _17 = _14 >> _16;
  u16Result = (uint16) _17;

  <bb 5> :
  # DEBUG BEGIN_STMT
  D.5622 = u16Result;
  return D.5622;

}


Adc_Sar_GetResolution (const uint32 u32Instance)
{
  uint8 u8ResolutionBits;
  uint32 u32Calbistreg;
  struct ADC_Type * const pBase;
  uint8 u8Resolution;
  uint8 D.5624;

  <bb 2> :
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  pBase = pAdcBase[u32Instance];
  # DEBUG BEGIN_STMT
  u32Calbistreg = pBase->CALBISTREG;
  # DEBUG BEGIN_STMT
  _1 = u32Calbistreg >> 29;
  u8ResolutionBits = (uint8) _1;
  # DEBUG BEGIN_STMT
  _2 = (int) u8ResolutionBits;
  switch (_2) <default: <L4> [INV], case 0: <L0> [INV], case 1: <L1> [INV], case 2: <L2> [INV], case 3: <L3> [INV]>

  <bb 3> :
<L0>:
  # DEBUG BEGIN_STMT
  u8Resolution = 14;
  # DEBUG BEGIN_STMT
  goto <bb 8>; [INV]

  <bb 4> :
<L1>:
  # DEBUG BEGIN_STMT
  u8Resolution = 12;
  # DEBUG BEGIN_STMT
  goto <bb 8>; [INV]

  <bb 5> :
<L2>:
  # DEBUG BEGIN_STMT
  u8Resolution = 10;
  # DEBUG BEGIN_STMT
  goto <bb 8>; [INV]

  <bb 6> :
<L3>:
  # DEBUG BEGIN_STMT
  u8Resolution = 8;
  # DEBUG BEGIN_STMT
  goto <bb 8>; [INV]

  <bb 7> :
<L4>:
  # DEBUG BEGIN_STMT
  u8Resolution = 14;
  # DEBUG BEGIN_STMT

  <bb 8> :
  # DEBUG BEGIN_STMT
  D.5624 = u8Resolution;
  return D.5624;

}


Adc_Sar_ResetWdogCWSELR (struct ADC_Type * const pBase, uint8 u8CwselrId)
{
  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = &pBase->CWSELRPI[0];
  _2 = (unsigned int) u8CwselrId;
  _3 = _2 * 4;
  _4 = _1 + _3;
  MEM[(volatile uint32 *)_4] = 0;
  return;

}


Adc_Sar_WriteChannelMapping (struct ADC_Type * const pBase, uint32 u32RegisterNumber, uint32 u32FieldPosition, uint32 u32Value)
{
  <bb 2> :
  # DEBUG BEGIN_STMT
  switch (u32FieldPosition) <default: <L10> [INV], case 0: <L0> [INV], case 1: <L1> [INV], case 2: <L2> [INV], case 3: <L3> [INV], case 4: <L4> [INV], case 5: <L5> [INV], case 6: <L6> [INV], case 7: <L7> [INV]>

  <bb 3> :
<L0>:
  # DEBUG BEGIN_STMT
  _1 = &pBase->CWSELRPI[0];
  _2 = u32RegisterNumber * 4;
  _3 = _1 + _2;
  _4 = MEM[(volatile uint32 *)_3];
  _5 = &pBase->CWSELRPI[0];
  _6 = u32RegisterNumber * 4;
  _7 = _5 + _6;
  _8 = _4 & 4294967292;
  MEM[(volatile uint32 *)_7] = _8;
  # DEBUG BEGIN_STMT
  _9 = &pBase->CWSELRPI[0];
  _10 = u32RegisterNumber * 4;
  _11 = _9 + _10;
  _12 = MEM[(volatile uint32 *)_11];
  _13 = u32Value & 3;
  _14 = &pBase->CWSELRPI[0];
  _15 = u32RegisterNumber * 4;
  _16 = _14 + _15;
  _17 = _12 | _13;
  MEM[(volatile uint32 *)_16] = _17;
  # DEBUG BEGIN_STMT
  goto <bb 11>; [INV]

  <bb 4> :
<L1>:
  # DEBUG BEGIN_STMT
  _18 = &pBase->CWSELRPI[0];
  _19 = u32RegisterNumber * 4;
  _20 = _18 + _19;
  _21 = MEM[(volatile uint32 *)_20];
  _22 = &pBase->CWSELRPI[0];
  _23 = u32RegisterNumber * 4;
  _24 = _22 + _23;
  _25 = _21 & 4294967247;
  MEM[(volatile uint32 *)_24] = _25;
  # DEBUG BEGIN_STMT
  _26 = &pBase->CWSELRPI[0];
  _27 = u32RegisterNumber * 4;
  _28 = _26 + _27;
  _29 = MEM[(volatile uint32 *)_28];
  _30 = u32Value << 4;
  _31 = _30 & 48;
  _32 = &pBase->CWSELRPI[0];
  _33 = u32RegisterNumber * 4;
  _34 = _32 + _33;
  _35 = _29 | _31;
  MEM[(volatile uint32 *)_34] = _35;
  # DEBUG BEGIN_STMT
  goto <bb 11>; [INV]

  <bb 5> :
<L2>:
  # DEBUG BEGIN_STMT
  _36 = &pBase->CWSELRPI[0];
  _37 = u32RegisterNumber * 4;
  _38 = _36 + _37;
  _39 = MEM[(volatile uint32 *)_38];
  _40 = &pBase->CWSELRPI[0];
  _41 = u32RegisterNumber * 4;
  _42 = _40 + _41;
  _43 = _39 & 4294966527;
  MEM[(volatile uint32 *)_42] = _43;
  # DEBUG BEGIN_STMT
  _44 = &pBase->CWSELRPI[0];
  _45 = u32RegisterNumber * 4;
  _46 = _44 + _45;
  _47 = MEM[(volatile uint32 *)_46];
  _48 = u32Value << 8;
  _49 = _48 & 768;
  _50 = &pBase->CWSELRPI[0];
  _51 = u32RegisterNumber * 4;
  _52 = _50 + _51;
  _53 = _47 | _49;
  MEM[(volatile uint32 *)_52] = _53;
  # DEBUG BEGIN_STMT
  goto <bb 11>; [INV]

  <bb 6> :
<L3>:
  # DEBUG BEGIN_STMT
  _54 = &pBase->CWSELRPI[0];
  _55 = u32RegisterNumber * 4;
  _56 = _54 + _55;
  _57 = MEM[(volatile uint32 *)_56];
  _58 = &pBase->CWSELRPI[0];
  _59 = u32RegisterNumber * 4;
  _60 = _58 + _59;
  _61 = _57 & 4294955007;
  MEM[(volatile uint32 *)_60] = _61;
  # DEBUG BEGIN_STMT
  _62 = &pBase->CWSELRPI[0];
  _63 = u32RegisterNumber * 4;
  _64 = _62 + _63;
  _65 = MEM[(volatile uint32 *)_64];
  _66 = u32Value << 12;
  _67 = _66 & 12288;
  _68 = &pBase->CWSELRPI[0];
  _69 = u32RegisterNumber * 4;
  _70 = _68 + _69;
  _71 = _65 | _67;
  MEM[(volatile uint32 *)_70] = _71;
  # DEBUG BEGIN_STMT
  goto <bb 11>; [INV]

  <bb 7> :
<L4>:
  # DEBUG BEGIN_STMT
  _72 = &pBase->CWSELRPI[0];
  _73 = u32RegisterNumber * 4;
  _74 = _72 + _73;
  _75 = MEM[(volatile uint32 *)_74];
  _76 = &pBase->CWSELRPI[0];
  _77 = u32RegisterNumber * 4;
  _78 = _76 + _77;
  _79 = _75 & 4294770687;
  MEM[(volatile uint32 *)_78] = _79;
  # DEBUG BEGIN_STMT
  _80 = &pBase->CWSELRPI[0];
  _81 = u32RegisterNumber * 4;
  _82 = _80 + _81;
  _83 = MEM[(volatile uint32 *)_82];
  _84 = u32Value << 16;
  _85 = _84 & 196608;
  _86 = &pBase->CWSELRPI[0];
  _87 = u32RegisterNumber * 4;
  _88 = _86 + _87;
  _89 = _83 | _85;
  MEM[(volatile uint32 *)_88] = _89;
  # DEBUG BEGIN_STMT
  goto <bb 11>; [INV]

  <bb 8> :
<L5>:
  # DEBUG BEGIN_STMT
  _90 = &pBase->CWSELRPI[0];
  _91 = u32RegisterNumber * 4;
  _92 = _90 + _91;
  _93 = MEM[(volatile uint32 *)_92];
  _94 = &pBase->CWSELRPI[0];
  _95 = u32RegisterNumber * 4;
  _96 = _94 + _95;
  _97 = _93 & 4291821567;
  MEM[(volatile uint32 *)_96] = _97;
  # DEBUG BEGIN_STMT
  _98 = &pBase->CWSELRPI[0];
  _99 = u32RegisterNumber * 4;
  _100 = _98 + _99;
  _101 = MEM[(volatile uint32 *)_100];
  _102 = u32Value << 20;
  _103 = _102 & 3145728;
  _104 = &pBase->CWSELRPI[0];
  _105 = u32RegisterNumber * 4;
  _106 = _104 + _105;
  _107 = _101 | _103;
  MEM[(volatile uint32 *)_106] = _107;
  # DEBUG BEGIN_STMT
  goto <bb 11>; [INV]

  <bb 9> :
<L6>:
  # DEBUG BEGIN_STMT
  _108 = &pBase->CWSELRPI[0];
  _109 = u32RegisterNumber * 4;
  _110 = _108 + _109;
  _111 = MEM[(volatile uint32 *)_110];
  _112 = &pBase->CWSELRPI[0];
  _113 = u32RegisterNumber * 4;
  _114 = _112 + _113;
  _115 = _111 & 4244635647;
  MEM[(volatile uint32 *)_114] = _115;
  # DEBUG BEGIN_STMT
  _116 = &pBase->CWSELRPI[0];
  _117 = u32RegisterNumber * 4;
  _118 = _116 + _117;
  _119 = MEM[(volatile uint32 *)_118];
  _120 = u32Value << 24;
  _121 = _120 & 50331648;
  _122 = &pBase->CWSELRPI[0];
  _123 = u32RegisterNumber * 4;
  _124 = _122 + _123;
  _125 = _119 | _121;
  MEM[(volatile uint32 *)_124] = _125;
  # DEBUG BEGIN_STMT
  goto <bb 11>; [INV]

  <bb 10> :
<L7>:
  # DEBUG BEGIN_STMT
  _126 = &pBase->CWSELRPI[0];
  _127 = u32RegisterNumber * 4;
  _128 = _126 + _127;
  _129 = MEM[(volatile uint32 *)_128];
  _130 = &pBase->CWSELRPI[0];
  _131 = u32RegisterNumber * 4;
  _132 = _130 + _131;
  _133 = _129 & 3489660927;
  MEM[(volatile uint32 *)_132] = _133;
  # DEBUG BEGIN_STMT
  _134 = &pBase->CWSELRPI[0];
  _135 = u32RegisterNumber * 4;
  _136 = _134 + _135;
  _137 = MEM[(volatile uint32 *)_136];
  _138 = u32Value << 28;
  _139 = _138 & 805306368;
  _140 = &pBase->CWSELRPI[0];
  _141 = u32RegisterNumber * 4;
  _142 = _140 + _141;
  _143 = _137 | _139;
  MEM[(volatile uint32 *)_142] = _143;
  # DEBUG BEGIN_STMT

  <bb 11> :
<L10>:
  return;

}


Adc_Sar_WriteThresholds (struct ADC_Type * const pBase, uint8 u8RegisterNumber, uint16 u16HighThreshold, uint16 u16LowThreshold)
{
  uint32 u32Value;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (long unsigned int) u16HighThreshold;
  _2 = _1 << 16;
  _3 = _2 & 2147418112;
  _4 = (long unsigned int) u16LowThreshold;
  _5 = _4 & 32767;
  u32Value = _3 | _5;
  # DEBUG BEGIN_STMT
  _6 = (int) u8RegisterNumber;
  pBase->THRHLR[_6] = u32Value;
  return;

}


Adc_Sar_Powerdown (struct ADC_Type * const pBase)
{
  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = pBase->MCR;
  _2 = _1 | 1;
  pBase->MCR = _2;
  return;

}


Adc_Sar_Powerup (struct ADC_Type * const pBase)
{
  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = pBase->MCR;
  _2 = _1 & 4294967294;
  pBase->MCR = _2;
  return;

}