mirror of
https://github.com/Dev-KATECH/ADM.git
synced 2026-05-17 01:43:59 +09:00
907 lines
22 KiB
Plaintext
907 lines
22 KiB
Plaintext
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Marking local functions:
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Marking externally visible functions: Flexio_Mcl_Ip_ClearPinStatus Flexio_Mcl_Ip_SetTimerDMARequest Flexio_Mcl_Ip_Init Flexio_Mcl_Ip_SetTimerInterrupt Flexio_Mcl_Ip_GetAllTimerInterrupt Flexio_Mcl_Ip_SetShifterDMARequest Flexio_Mcl_Ip_GetAllPinsInterrupt Flexio_Mcl_Ip_GetAllPinsStatus Flexio_Mcl_Ip_SetShifterInterrupt Flexio_Mcl_Ip_SetShifterErrorInterrupt Flexio_Mcl_Ip_GetAllShifterErrorInterrupt Flexio_Mcl_Ip_GetAllShifterInterrupt Flexio_Mcl_Ip_ClearTimerStatus Flexio_Mcl_Ip_GetAllTimerStatus Flexio_Mcl_Ip_GetTimerInterruptEnable Flexio_Mcl_Ip_GetTimerStatus Flexio_Mcl_Ip_ClearShifterErrorStatus Flexio_Mcl_Ip_GetAllShifterErrorStatus Flexio_Mcl_Ip_GetShifterErrorStatus Flexio_Mcl_Ip_ClearShifterStatus Flexio_Mcl_Ip_GetAllShifterStatus Flexio_Mcl_Ip_GetShifterStatus Flexio_Mcl_Ip_SetEnable Flexio_Mcl_Ip_SetDebugEnable Flexio_Mcl_Ip_SetSoftwareReset
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Marking externally visible variables:
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Reclaiming functions:
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Reclaiming variables:
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Clearing address taken flags:
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Symbol table:
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SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_46/40 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_46) @05e9a7e0
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: Flexio_Mcl_Ip_SetTimerDMARequest/23
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Calls:
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SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_46/39 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_46) @05e9a700
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: Flexio_Mcl_Ip_SetTimerDMARequest/23
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Calls:
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SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_45/38 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_45) @05e9a460
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: Flexio_Mcl_Ip_SetTimerInterrupt/21
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Calls:
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SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_45/37 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_45) @05e9a380
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: Flexio_Mcl_Ip_SetTimerInterrupt/21
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Calls:
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SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_44/36 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_44) @05e9a0e0
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: Flexio_Mcl_Ip_SetShifterDMARequest/19
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Calls:
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SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_44/35 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_44) @05e9a000
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: Flexio_Mcl_Ip_SetShifterDMARequest/19
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Calls:
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SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_43/34 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_43) @05e53c40
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: Flexio_Mcl_Ip_SetShifterInterrupt/16
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Calls:
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SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_43/33 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_43) @05e53b60
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: Flexio_Mcl_Ip_SetShifterInterrupt/16
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Calls:
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SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_42/32 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_42) @05e539a0
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: Flexio_Mcl_Ip_SetShifterErrorInterrupt/15
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Calls:
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SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_42/31 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_42) @05e538c0
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: Flexio_Mcl_Ip_SetShifterErrorInterrupt/15
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Calls:
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SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_41/30 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_41) @05e4ed20
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: Flexio_Mcl_Ip_SetEnable/2
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Calls:
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SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_41/29 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_41) @05e4ec40
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: Flexio_Mcl_Ip_SetEnable/2
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Calls:
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SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_40/28 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_40) @05e4ea80
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: Flexio_Mcl_Ip_SetDebugEnable/1
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Calls:
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SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_40/27 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_40) @05e4e9a0
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: Flexio_Mcl_Ip_SetDebugEnable/1
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Calls:
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SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_39/26 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_39) @05e4e7e0
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: Flexio_Mcl_Ip_SetSoftwareReset/0
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Calls:
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SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_39/25 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_39) @05e4e700
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: Flexio_Mcl_Ip_SetSoftwareReset/0
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Calls:
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Flexio_Mcl_Ip_ClearPinStatus/24 (Flexio_Mcl_Ip_ClearPinStatus) @05e4e2a0
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Type: function definition analyzed
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Visibility: externally_visible public
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References:
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Referring:
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Availability: available
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Function flags: body optimize_size
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Called by:
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Calls:
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Flexio_Mcl_Ip_SetTimerDMARequest/23 (Flexio_Mcl_Ip_SetTimerDMARequest) @05e4e000
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Type: function definition analyzed
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Visibility: externally_visible public
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References:
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Referring:
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Availability: available
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Function flags: body optimize_size
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Called by:
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Calls: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_46/40 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_46/39
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Flexio_Mcl_Ip_Init/22 (Flexio_Mcl_Ip_Init) @05df4b60
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Type: function definition analyzed
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Visibility: externally_visible public
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References:
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Referring:
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Availability: available
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Function flags: body optimize_size
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Called by:
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Calls: Flexio_Mcl_Ip_SetSoftwareReset/0
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Flexio_Mcl_Ip_SetTimerInterrupt/21 (Flexio_Mcl_Ip_SetTimerInterrupt) @05df4620
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Type: function definition analyzed
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Visibility: externally_visible public
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References:
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Referring:
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Availability: available
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Function flags: body optimize_size
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Called by:
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Calls: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_45/38 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_45/37
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Flexio_Mcl_Ip_GetAllTimerInterrupt/20 (Flexio_Mcl_Ip_GetAllTimerInterrupt) @05df40e0
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Type: function definition analyzed
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Visibility: externally_visible public
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References:
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Referring:
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Availability: available
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Function flags: body optimize_size
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Called by:
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Calls:
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Flexio_Mcl_Ip_SetShifterDMARequest/19 (Flexio_Mcl_Ip_SetShifterDMARequest) @05df4d20
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Type: function definition analyzed
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Visibility: externally_visible public
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References:
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Referring:
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Availability: available
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Function flags: body optimize_size
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Called by:
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Calls: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_44/36 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_44/35
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Flexio_Mcl_Ip_GetAllPinsInterrupt/18 (Flexio_Mcl_Ip_GetAllPinsInterrupt) @05df4a80
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Type: function definition analyzed
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Visibility: externally_visible public
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References:
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Referring:
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Availability: available
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Function flags: body optimize_size
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Called by:
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Calls:
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Flexio_Mcl_Ip_GetAllPinsStatus/17 (Flexio_Mcl_Ip_GetAllPinsStatus) @05df47e0
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Type: function definition analyzed
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Visibility: externally_visible public
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References:
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Referring:
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Availability: available
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Function flags: body optimize_size
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Called by:
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Calls:
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Flexio_Mcl_Ip_SetShifterInterrupt/16 (Flexio_Mcl_Ip_SetShifterInterrupt) @05df4540
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Type: function definition analyzed
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Visibility: externally_visible public
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References:
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Referring:
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Availability: available
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Function flags: body optimize_size
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Called by:
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Calls: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_43/34 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_43/33
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Flexio_Mcl_Ip_SetShifterErrorInterrupt/15 (Flexio_Mcl_Ip_SetShifterErrorInterrupt) @05df42a0
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Type: function definition analyzed
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Visibility: externally_visible public
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References:
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Referring:
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Availability: available
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Function flags: body optimize_size
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Called by:
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Calls: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_42/32 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_42/31
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Flexio_Mcl_Ip_GetAllShifterErrorInterrupt/14 (Flexio_Mcl_Ip_GetAllShifterErrorInterrupt) @05df4000
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Type: function definition analyzed
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Visibility: externally_visible public
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References:
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Referring:
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Availability: available
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Function flags: body optimize_size
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Called by:
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Calls:
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Flexio_Mcl_Ip_GetAllShifterInterrupt/13 (Flexio_Mcl_Ip_GetAllShifterInterrupt) @05df1b60
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Type: function definition analyzed
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Visibility: externally_visible public
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References:
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Referring:
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Availability: available
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Function flags: body optimize_size
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Called by:
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Calls:
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Flexio_Mcl_Ip_ClearTimerStatus/12 (Flexio_Mcl_Ip_ClearTimerStatus) @05df1620
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Type: function definition analyzed
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Visibility: externally_visible public
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References:
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Referring:
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Availability: available
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Function flags: body optimize_size
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Called by:
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Calls:
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Flexio_Mcl_Ip_GetAllTimerStatus/11 (Flexio_Mcl_Ip_GetAllTimerStatus) @05df10e0
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Type: function definition analyzed
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Visibility: externally_visible public
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References:
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Referring:
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Availability: available
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Function flags: body optimize_size
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Called by:
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Calls:
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Flexio_Mcl_Ip_GetTimerInterruptEnable/10 (Flexio_Mcl_Ip_GetTimerInterruptEnable) @05df1d20
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Type: function definition analyzed
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Visibility: externally_visible public
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References:
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Referring:
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Availability: available
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Function flags: body optimize_size
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Called by:
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Calls:
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Flexio_Mcl_Ip_GetTimerStatus/9 (Flexio_Mcl_Ip_GetTimerStatus) @05df1a80
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Type: function definition analyzed
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Visibility: externally_visible public
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References:
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Referring:
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Availability: available
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Function flags: body optimize_size
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Called by:
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Calls:
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Flexio_Mcl_Ip_ClearShifterErrorStatus/8 (Flexio_Mcl_Ip_ClearShifterErrorStatus) @05df17e0
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Type: function definition analyzed
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Visibility: externally_visible public
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References:
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Referring:
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Availability: available
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Function flags: body optimize_size
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Called by:
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Calls:
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Flexio_Mcl_Ip_GetAllShifterErrorStatus/7 (Flexio_Mcl_Ip_GetAllShifterErrorStatus) @05df1540
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Type: function definition analyzed
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Visibility: externally_visible public
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References:
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Referring:
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Availability: available
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Function flags: body optimize_size
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Called by:
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Calls:
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Flexio_Mcl_Ip_GetShifterErrorStatus/6 (Flexio_Mcl_Ip_GetShifterErrorStatus) @05df12a0
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Type: function definition analyzed
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Visibility: externally_visible public
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References:
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Referring:
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Availability: available
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Function flags: body optimize_size
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Called by:
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Calls:
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Flexio_Mcl_Ip_ClearShifterStatus/5 (Flexio_Mcl_Ip_ClearShifterStatus) @05df1000
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Type: function definition analyzed
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Visibility: externally_visible public
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References:
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Referring:
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Availability: available
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Function flags: body optimize_size
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Called by:
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Calls:
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Flexio_Mcl_Ip_GetAllShifterStatus/4 (Flexio_Mcl_Ip_GetAllShifterStatus) @05dedb60
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Type: function definition analyzed
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Visibility: externally_visible public
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References:
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Referring:
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Availability: available
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Function flags: body optimize_size
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Called by:
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Calls:
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Flexio_Mcl_Ip_GetShifterStatus/3 (Flexio_Mcl_Ip_GetShifterStatus) @05ded620
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Type: function definition analyzed
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Visibility: externally_visible public
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References:
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Referring:
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Availability: available
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Function flags: body optimize_size
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Called by:
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Calls:
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Flexio_Mcl_Ip_SetEnable/2 (Flexio_Mcl_Ip_SetEnable) @05dedd20
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Type: function definition analyzed
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Visibility: externally_visible public
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References:
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Referring:
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Availability: available
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Function flags: body optimize_size
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Called by:
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Calls: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_41/30 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_41/29
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Flexio_Mcl_Ip_SetDebugEnable/1 (Flexio_Mcl_Ip_SetDebugEnable) @05deda80
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Type: function definition analyzed
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Visibility: externally_visible public
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References:
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Referring:
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Availability: available
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Function flags: body optimize_size
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Called by:
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Calls: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_40/28 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_40/27
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Flexio_Mcl_Ip_SetSoftwareReset/0 (Flexio_Mcl_Ip_SetSoftwareReset) @05ded7e0
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Type: function definition analyzed
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Visibility: externally_visible public
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References:
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Referring:
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Availability: available
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Function flags: body optimize_size
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Called by: Flexio_Mcl_Ip_Init/22
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Calls: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_39/26 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_39/25
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Flexio_Mcl_Ip_ClearPinStatus (struct FLEXIO_Type * baseAddr, uint8 pin)
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{
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<bb 2> :
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# DEBUG BEGIN_STMT
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_1 = baseAddr->PINSTAT;
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_2 = (int) pin;
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_3 = 1 << _2;
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_4 = (unsigned char) _3;
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_5 = (long unsigned int) _4;
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_6 = _1 | _5;
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baseAddr->PINSTAT = _6;
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return;
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}
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Flexio_Mcl_Ip_SetTimerDMARequest (struct FLEXIO_Type * baseAddr, uint8 requestMask, boolean enable)
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{
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uint32 tmp;
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<bb 2> :
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# DEBUG BEGIN_STMT
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# DEBUG BEGIN_STMT
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SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_46 ();
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# DEBUG BEGIN_STMT
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tmp = baseAddr->TIMERSDEN;
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# DEBUG BEGIN_STMT
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if (enable != 0)
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goto <bb 3>; [INV]
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else
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goto <bb 4>; [INV]
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<bb 3> :
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# DEBUG BEGIN_STMT
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_1 = (long unsigned int) requestMask;
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tmp = tmp | _1;
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goto <bb 5>; [INV]
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<bb 4> :
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# DEBUG BEGIN_STMT
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_2 = (long unsigned int) requestMask;
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_3 = ~_2;
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tmp = tmp & _3;
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<bb 5> :
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# DEBUG BEGIN_STMT
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baseAddr->TIMERSDEN = tmp;
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# DEBUG BEGIN_STMT
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SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_46 ();
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return;
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}
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Flexio_Mcl_Ip_Init (struct FLEXIO_Type * baseAddr)
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{
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<bb 2> :
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# DEBUG BEGIN_STMT
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Flexio_Mcl_Ip_SetSoftwareReset (baseAddr, 1);
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# DEBUG BEGIN_STMT
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baseAddr->CTRL = 0;
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return;
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}
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Flexio_Mcl_Ip_SetTimerInterrupt (struct FLEXIO_Type * baseAddr, uint8 interruptMask, boolean enable)
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{
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uint32 tmp;
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<bb 2> :
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# DEBUG BEGIN_STMT
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# DEBUG BEGIN_STMT
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SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_45 ();
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# DEBUG BEGIN_STMT
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tmp = baseAddr->TIMIEN;
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# DEBUG BEGIN_STMT
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if (enable != 0)
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goto <bb 3>; [INV]
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else
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goto <bb 4>; [INV]
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|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (long unsigned int) interruptMask;
|
|
tmp = tmp | _1;
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
_2 = (long unsigned int) interruptMask;
|
|
_3 = ~_2;
|
|
tmp = tmp & _3;
|
|
|
|
<bb 5> :
|
|
# DEBUG BEGIN_STMT
|
|
baseAddr->TIMIEN = tmp;
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_45 ();
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Flexio_Mcl_Ip_GetAllTimerInterrupt (const struct FLEXIO_Type * baseAddr)
|
|
{
|
|
uint32 D.4781;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
D.4781 = baseAddr->TIMIEN;
|
|
return D.4781;
|
|
|
|
}
|
|
|
|
|
|
Flexio_Mcl_Ip_SetShifterDMARequest (struct FLEXIO_Type * baseAddr, uint8 requestMask, boolean enable)
|
|
{
|
|
uint32 tmp;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_44 ();
|
|
# DEBUG BEGIN_STMT
|
|
tmp = baseAddr->SHIFTSDEN;
|
|
# DEBUG BEGIN_STMT
|
|
if (enable != 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 4>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (long unsigned int) requestMask;
|
|
tmp = tmp | _1;
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
_2 = (long unsigned int) requestMask;
|
|
_3 = ~_2;
|
|
tmp = tmp & _3;
|
|
|
|
<bb 5> :
|
|
# DEBUG BEGIN_STMT
|
|
baseAddr->SHIFTSDEN = tmp;
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_44 ();
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Flexio_Mcl_Ip_GetAllPinsInterrupt (const struct FLEXIO_Type * baseAddr)
|
|
{
|
|
uint32 D.4776;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
D.4776 = baseAddr->PINIEN;
|
|
return D.4776;
|
|
|
|
}
|
|
|
|
|
|
Flexio_Mcl_Ip_GetAllPinsStatus (const struct FLEXIO_Type * baseAddr)
|
|
{
|
|
uint32 D.4774;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
D.4774 = baseAddr->PINSTAT;
|
|
return D.4774;
|
|
|
|
}
|
|
|
|
|
|
Flexio_Mcl_Ip_SetShifterInterrupt (struct FLEXIO_Type * baseAddr, uint8 interruptMask, boolean enable)
|
|
{
|
|
uint32 tmp;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_43 ();
|
|
# DEBUG BEGIN_STMT
|
|
tmp = baseAddr->SHIFTSIEN;
|
|
# DEBUG BEGIN_STMT
|
|
if (enable != 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 4>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (long unsigned int) interruptMask;
|
|
tmp = tmp | _1;
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
_2 = (long unsigned int) interruptMask;
|
|
_3 = ~_2;
|
|
tmp = tmp & _3;
|
|
|
|
<bb 5> :
|
|
# DEBUG BEGIN_STMT
|
|
baseAddr->SHIFTSIEN = tmp;
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_43 ();
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Flexio_Mcl_Ip_SetShifterErrorInterrupt (struct FLEXIO_Type * baseAddr, uint8 interruptMask, boolean enable)
|
|
{
|
|
uint32 tmp;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_42 ();
|
|
# DEBUG BEGIN_STMT
|
|
tmp = baseAddr->SHIFTEIEN;
|
|
# DEBUG BEGIN_STMT
|
|
if (enable != 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 4>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (long unsigned int) interruptMask;
|
|
tmp = tmp | _1;
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
_2 = (long unsigned int) interruptMask;
|
|
_3 = ~_2;
|
|
tmp = tmp & _3;
|
|
|
|
<bb 5> :
|
|
# DEBUG BEGIN_STMT
|
|
baseAddr->SHIFTEIEN = tmp;
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_42 ();
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Flexio_Mcl_Ip_GetAllShifterErrorInterrupt (const struct FLEXIO_Type * baseAddr)
|
|
{
|
|
uint32 D.4766;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
D.4766 = baseAddr->SHIFTEIEN;
|
|
return D.4766;
|
|
|
|
}
|
|
|
|
|
|
Flexio_Mcl_Ip_GetAllShifterInterrupt (const struct FLEXIO_Type * baseAddr)
|
|
{
|
|
uint32 D.4764;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
D.4764 = baseAddr->SHIFTSIEN;
|
|
return D.4764;
|
|
|
|
}
|
|
|
|
|
|
Flexio_Mcl_Ip_ClearTimerStatus (struct FLEXIO_Type * baseAddr, uint8 timer)
|
|
{
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) timer;
|
|
_2 = 1 << _1;
|
|
baseAddr->TIMSTAT = _2;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Flexio_Mcl_Ip_GetAllTimerStatus (const struct FLEXIO_Type * baseAddr)
|
|
{
|
|
uint32 D.4762;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
D.4762 = baseAddr->TIMSTAT;
|
|
return D.4762;
|
|
|
|
}
|
|
|
|
|
|
Flexio_Mcl_Ip_GetTimerInterruptEnable (const struct FLEXIO_Type * baseAddr, uint8 timer)
|
|
{
|
|
boolean D.4760;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = baseAddr->TIMIEN;
|
|
_2 = (int) timer;
|
|
_3 = _1 >> _2;
|
|
_4 = _3 & 1;
|
|
D.4760 = _4 != 0;
|
|
return D.4760;
|
|
|
|
}
|
|
|
|
|
|
Flexio_Mcl_Ip_GetTimerStatus (const struct FLEXIO_Type * baseAddr, uint8 timer)
|
|
{
|
|
boolean D.4758;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = baseAddr->TIMSTAT;
|
|
_2 = (int) timer;
|
|
_3 = _1 >> _2;
|
|
_4 = _3 & 1;
|
|
D.4758 = _4 != 0;
|
|
return D.4758;
|
|
|
|
}
|
|
|
|
|
|
Flexio_Mcl_Ip_ClearShifterErrorStatus (struct FLEXIO_Type * baseAddr, uint8 shifter)
|
|
{
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) shifter;
|
|
_2 = 1 << _1;
|
|
baseAddr->SHIFTERR = _2;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Flexio_Mcl_Ip_GetAllShifterErrorStatus (const struct FLEXIO_Type * baseAddr)
|
|
{
|
|
uint32 D.4756;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
D.4756 = baseAddr->SHIFTERR;
|
|
return D.4756;
|
|
|
|
}
|
|
|
|
|
|
Flexio_Mcl_Ip_GetShifterErrorStatus (const struct FLEXIO_Type * baseAddr, uint8 shifter)
|
|
{
|
|
boolean D.4754;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = baseAddr->SHIFTERR;
|
|
_2 = (int) shifter;
|
|
_3 = _1 >> _2;
|
|
_4 = _3 & 1;
|
|
D.4754 = _4 != 0;
|
|
return D.4754;
|
|
|
|
}
|
|
|
|
|
|
Flexio_Mcl_Ip_ClearShifterStatus (struct FLEXIO_Type * baseAddr, uint8 shifter)
|
|
{
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) shifter;
|
|
_2 = 1 << _1;
|
|
baseAddr->SHIFTSTAT = _2;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Flexio_Mcl_Ip_GetAllShifterStatus (const struct FLEXIO_Type * baseAddr)
|
|
{
|
|
uint32 D.4752;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
D.4752 = baseAddr->SHIFTSTAT;
|
|
return D.4752;
|
|
|
|
}
|
|
|
|
|
|
Flexio_Mcl_Ip_GetShifterStatus (const struct FLEXIO_Type * baseAddr, uint8 shifter)
|
|
{
|
|
boolean D.4750;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = baseAddr->SHIFTSTAT;
|
|
_2 = (int) shifter;
|
|
_3 = _1 >> _2;
|
|
_4 = _3 & 1;
|
|
D.4750 = _4 != 0;
|
|
return D.4750;
|
|
|
|
}
|
|
|
|
|
|
Flexio_Mcl_Ip_SetEnable (struct FLEXIO_Type * baseAddr, boolean enable)
|
|
{
|
|
uint32 regValue;
|
|
long unsigned int iftmp.2;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_41 ();
|
|
# DEBUG BEGIN_STMT
|
|
regValue = baseAddr->CTRL;
|
|
# DEBUG BEGIN_STMT
|
|
regValue = regValue & 4294967294;
|
|
# DEBUG BEGIN_STMT
|
|
if (enable != 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 4>; [INV]
|
|
|
|
<bb 3> :
|
|
iftmp.2 = 1;
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 4> :
|
|
iftmp.2 = 0;
|
|
|
|
<bb 5> :
|
|
regValue = iftmp.2 | regValue;
|
|
# DEBUG BEGIN_STMT
|
|
baseAddr->CTRL = regValue;
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_41 ();
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Flexio_Mcl_Ip_SetDebugEnable (struct FLEXIO_Type * baseAddr, boolean enable)
|
|
{
|
|
uint32 regValue;
|
|
long unsigned int iftmp.1;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_40 ();
|
|
# DEBUG BEGIN_STMT
|
|
regValue = baseAddr->CTRL;
|
|
# DEBUG BEGIN_STMT
|
|
regValue = regValue & 3221225471;
|
|
# DEBUG BEGIN_STMT
|
|
if (enable != 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 4>; [INV]
|
|
|
|
<bb 3> :
|
|
iftmp.1 = 1073741824;
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 4> :
|
|
iftmp.1 = 0;
|
|
|
|
<bb 5> :
|
|
regValue = iftmp.1 | regValue;
|
|
# DEBUG BEGIN_STMT
|
|
baseAddr->CTRL = regValue;
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_40 ();
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Flexio_Mcl_Ip_SetSoftwareReset (struct FLEXIO_Type * baseAddr, boolean enable)
|
|
{
|
|
uint32 regValue;
|
|
long unsigned int iftmp.0;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_39 ();
|
|
# DEBUG BEGIN_STMT
|
|
regValue = baseAddr->CTRL;
|
|
# DEBUG BEGIN_STMT
|
|
regValue = regValue & 4294967293;
|
|
# DEBUG BEGIN_STMT
|
|
if (enable != 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 4>; [INV]
|
|
|
|
<bb 3> :
|
|
iftmp.0 = 2;
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 4> :
|
|
iftmp.0 = 0;
|
|
|
|
<bb 5> :
|
|
regValue = iftmp.0 | regValue;
|
|
# DEBUG BEGIN_STMT
|
|
baseAddr->CTRL = regValue;
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_39 ();
|
|
return;
|
|
|
|
}
|
|
|
|
|