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ADM/GW/Debug_FLASH/RTD/src/Emios_Mcl_Ip.c.016i.visibility
S2-CHICKEN 68d220f57b 20241030_Layer_정리 거의 완료
2024-10-30 17:21:58 +09:00

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Marking local functions: DevAssert
Marking externally visible functions: Emios_Mcl_Ip_SetCounterBusPeriod Emios_Mcl_Ip_ValidateChannel Emios_Mcl_Ip_SetReloadInterval Emios_Mcl_Ip_Deinit Emios_Mcl_Ip_ComparatorTransferDisable Emios_Mcl_Ip_ComparatorTransferEnable Emios_Mcl_Ip_DisableChannel Emios_Mcl_Ip_EnableChannel Emios_Mcl_Ip_Init
Marking externally visible variables: emiosBase
Reclaiming functions:
Reclaiming variables:
Clearing address taken flags:
Symbol table:
Emios_Mcl_Ip_SetCounterBusPeriod/12 (Emios_Mcl_Ip_SetCounterBusPeriod) @07019a80
Type: function definition analyzed
Visibility: externally_visible public
References: Emios_Ip_ChState/2 (read)Emios_Ip_ChState/2 (read)emiosBase/1 (read)
Referring:
Availability: available
Function flags: body optimize_size
Called by:
Calls: DevAssert/0 DevAssert/0 DevAssert/0
Emios_Mcl_Ip_ValidateChannel/11 (Emios_Mcl_Ip_ValidateChannel) @070197e0
Type: function definition analyzed
Visibility: externally_visible public
References: Emios_Ip_ChState/2 (read)
Referring:
Availability: available
Function flags: body optimize_size
Called by:
Calls: DevAssert/0 DevAssert/0
Emios_Mcl_Ip_SetReloadInterval/10 (Emios_Mcl_Ip_SetReloadInterval) @07019540
Type: function definition analyzed
Visibility: externally_visible public
References: emiosBase/1 (read)
Referring:
Availability: available
Function flags: body optimize_size
Called by:
Calls: DevAssert/0 DevAssert/0 DevAssert/0
Emios_Mcl_Ip_Deinit/9 (Emios_Mcl_Ip_Deinit) @070191c0
Type: function definition analyzed
Visibility: externally_visible public
References: emiosBase/1 (read)Emios_Ip_IpIsInitialized/3 (read)Emios_Ip_ChState/2 (read)emiosBase/1 (read)emiosBase/1 (read)emiosBase/1 (read)emiosBase/1 (read)emiosBase/1 (read)Emios_Ip_ChState/2 (write)Emios_Ip_IpIsInitialized/3 (write)
Referring:
Availability: available
Function flags: body optimize_size
Called by:
Calls: DevAssert/0
Emios_Mcl_Ip_ComparatorTransferDisable/8 (Emios_Mcl_Ip_ComparatorTransferDisable) @0703b7e0
Type: function definition analyzed
Visibility: externally_visible public
References: emiosBase/1 (read)
Referring:
Availability: available
Function flags: body optimize_size
Called by:
Calls: DevAssert/0 DevAssert/0
Emios_Mcl_Ip_ComparatorTransferEnable/7 (Emios_Mcl_Ip_ComparatorTransferEnable) @0703bee0
Type: function definition analyzed
Visibility: externally_visible public
References: emiosBase/1 (read)
Referring:
Availability: available
Function flags: body optimize_size
Called by:
Calls: DevAssert/0 DevAssert/0
Emios_Mcl_Ip_DisableChannel/6 (Emios_Mcl_Ip_DisableChannel) @0703bc40
Type: function definition analyzed
Visibility: externally_visible public
References: emiosBase/1 (read)
Referring:
Availability: available
Function flags: body optimize_size
Called by:
Calls: DevAssert/0 DevAssert/0
Emios_Mcl_Ip_EnableChannel/5 (Emios_Mcl_Ip_EnableChannel) @0703b9a0
Type: function definition analyzed
Visibility: externally_visible public
References: emiosBase/1 (read)
Referring:
Availability: available
Function flags: body optimize_size
Called by:
Calls: DevAssert/0 DevAssert/0
Emios_Mcl_Ip_Init/4 (Emios_Mcl_Ip_Init) @0703b700
Type: function definition analyzed
Visibility: externally_visible public
References: emiosBase/1 (read)Emios_Ip_IpIsInitialized/3 (read)Emios_Ip_ChState/2 (write)Emios_Ip_ChState/2 (write)Emios_Ip_IpIsInitialized/3 (write)
Referring:
Availability: available
Function flags: body optimize_size
Called by:
Calls: DevAssert/0 DevAssert/0
Emios_Ip_IpIsInitialized/3 (Emios_Ip_IpIsInitialized) @070390d8
Type: variable definition analyzed
Visibility: prevailing_def_ironly
References:
Referring: Emios_Mcl_Ip_Init/4 (read)Emios_Mcl_Ip_Init/4 (write)Emios_Mcl_Ip_Deinit/9 (read)Emios_Mcl_Ip_Deinit/9 (write)
Availability: available
Varpool flags: initialized
Emios_Ip_ChState/2 (Emios_Ip_ChState) @07039048
Type: variable definition analyzed
Visibility: prevailing_def_ironly
References:
Referring: Emios_Mcl_Ip_Init/4 (write)Emios_Mcl_Ip_Init/4 (write)Emios_Mcl_Ip_Deinit/9 (read)Emios_Mcl_Ip_Deinit/9 (write)Emios_Mcl_Ip_ValidateChannel/11 (read)Emios_Mcl_Ip_SetCounterBusPeriod/12 (read)Emios_Mcl_Ip_SetCounterBusPeriod/12 (read)
Availability: available
Varpool flags: initialized
emiosBase/1 (emiosBase) @07031f78
Type: variable definition analyzed
Visibility: externally_visible public
References:
Referring: Emios_Mcl_Ip_Init/4 (read)Emios_Mcl_Ip_EnableChannel/5 (read)Emios_Mcl_Ip_DisableChannel/6 (read)Emios_Mcl_Ip_ComparatorTransferEnable/7 (read)Emios_Mcl_Ip_ComparatorTransferDisable/8 (read)Emios_Mcl_Ip_Deinit/9 (read)Emios_Mcl_Ip_Deinit/9 (read)Emios_Mcl_Ip_Deinit/9 (read)Emios_Mcl_Ip_Deinit/9 (read)Emios_Mcl_Ip_Deinit/9 (read)Emios_Mcl_Ip_Deinit/9 (read)Emios_Mcl_Ip_SetReloadInterval/10 (read)Emios_Mcl_Ip_SetCounterBusPeriod/12 (read)
Availability: available
Varpool flags: initialized
DevAssert/0 (DevAssert) @07035000
Type: function definition analyzed
Visibility: prevailing_def_ironly
References:
Referring:
Availability: local
Function flags: body local optimize_size
Called by: Emios_Mcl_Ip_SetCounterBusPeriod/12 Emios_Mcl_Ip_SetCounterBusPeriod/12 Emios_Mcl_Ip_SetCounterBusPeriod/12 Emios_Mcl_Ip_ValidateChannel/11 Emios_Mcl_Ip_ValidateChannel/11 Emios_Mcl_Ip_SetReloadInterval/10 Emios_Mcl_Ip_SetReloadInterval/10 Emios_Mcl_Ip_SetReloadInterval/10 Emios_Mcl_Ip_Deinit/9 Emios_Mcl_Ip_ComparatorTransferDisable/8 Emios_Mcl_Ip_ComparatorTransferDisable/8 Emios_Mcl_Ip_ComparatorTransferEnable/7 Emios_Mcl_Ip_ComparatorTransferEnable/7 Emios_Mcl_Ip_DisableChannel/6 Emios_Mcl_Ip_DisableChannel/6 Emios_Mcl_Ip_EnableChannel/5 Emios_Mcl_Ip_EnableChannel/5 Emios_Mcl_Ip_Init/4 Emios_Mcl_Ip_Init/4
Calls:
Emios_Mcl_Ip_SetCounterBusPeriod (uint8 hwInstance, uint8 hwChannel, uint16 period)
{
Emios_Ip_CommonStatusType status;
Emios_Ip_CommonStatusType D.7723;
<bb 2> :
# DEBUG BEGIN_STMT
_1 = period != 65535;
DevAssert (_1);
# DEBUG BEGIN_STMT
_2 = hwInstance <= 2;
DevAssert (_2);
# DEBUG BEGIN_STMT
_3 = hwChannel <= 23;
DevAssert (_3);
# DEBUG BEGIN_STMT
status = 1;
# DEBUG BEGIN_STMT
_4 = (int) hwInstance;
_5 = (int) hwChannel;
_6 = Emios_Ip_ChState[_4][_5].counterMode;
if (_6 == 80)
goto <bb 4>; [INV]
else
goto <bb 3>; [INV]
<bb 3> :
_7 = (int) hwInstance;
_8 = (int) hwChannel;
_9 = Emios_Ip_ChState[_7][_8].counterMode;
if (_9 == 84)
goto <bb 4>; [INV]
else
goto <bb 6>; [INV]
<bb 4> :
if (period == 0)
goto <bb 5>; [INV]
else
goto <bb 6>; [INV]
<bb 5> :
# DEBUG BEGIN_STMT
status = 1;
goto <bb 7>; [INV]
<bb 6> :
# DEBUG BEGIN_STMT
_10 = (int) hwInstance;
_11 = emiosBase[_10];
_12 = (int) hwChannel;
_13 = (long unsigned int) period;
_11->CH.UC[_12].A = _13;
# DEBUG BEGIN_STMT
status = 0;
<bb 7> :
# DEBUG BEGIN_STMT
D.7723 = status;
return D.7723;
}
Emios_Mcl_Ip_ValidateChannel (uint8 hwInstance, uint8 hwChannel)
{
boolean valid;
boolean D.7716;
<bb 2> :
# DEBUG BEGIN_STMT
_1 = hwInstance <= 2;
DevAssert (_1);
# DEBUG BEGIN_STMT
_2 = hwChannel <= 23;
DevAssert (_2);
# DEBUG BEGIN_STMT
valid = 0;
# DEBUG BEGIN_STMT
_3 = (int) hwInstance;
_4 = (int) hwChannel;
_5 = Emios_Ip_ChState[_3][_4].channelInitState;
if (_5 != 0)
goto <bb 3>; [INV]
else
goto <bb 4>; [INV]
<bb 3> :
# DEBUG BEGIN_STMT
valid = 1;
<bb 4> :
# DEBUG BEGIN_STMT
D.7716 = valid;
return D.7716;
}
Emios_Mcl_Ip_SetReloadInterval (uint8 hwInstance, uint8 hwChannel, uint8 interval)
{
<bb 2> :
# DEBUG BEGIN_STMT
_1 = interval <= 30;
DevAssert (_1);
# DEBUG BEGIN_STMT
_2 = hwInstance <= 2;
DevAssert (_2);
# DEBUG BEGIN_STMT
_3 = hwChannel <= 23;
DevAssert (_3);
# DEBUG BEGIN_STMT
_4 = (long unsigned int) interval;
_5 = (int) hwInstance;
_6 = emiosBase[_5];
_7 = (int) hwChannel;
_8 = _4 & 31;
_6->CH.UC[_7].C2 = _8;
return;
}
Emios_Mcl_Ip_Deinit (uint8 instance)
{
struct eMIOS_Type * base;
Emios_Ip_CommonStatusType status;
uint8 currentChannel;
Emios_Ip_CommonStatusType D.7712;
<bb 2> :
# DEBUG BEGIN_STMT
_1 = instance <= 2;
DevAssert (_1);
# DEBUG BEGIN_STMT
# DEBUG BEGIN_STMT
status = 0;
# DEBUG BEGIN_STMT
_2 = (int) instance;
base = emiosBase[_2];
# DEBUG BEGIN_STMT
_3 = (int) instance;
_4 = Emios_Ip_IpIsInitialized[_3].instanceInitState;
_5 = ~_4;
if (_5 != 0)
goto <bb 3>; [INV]
else
goto <bb 4>; [INV]
<bb 3> :
# DEBUG BEGIN_STMT
status = 1;
goto <bb 10>; [INV]
<bb 4> :
# DEBUG BEGIN_STMT
_6 = base->MCR;
_7 = _6 & 4227858431;
base->MCR = _7;
# DEBUG BEGIN_STMT
base->MCR = 0;
# DEBUG BEGIN_STMT
currentChannel = 0;
goto <bb 8>; [INV]
<bb 5> :
# DEBUG BEGIN_STMT
_8 = (int) instance;
_9 = (int) currentChannel;
_10 = Emios_Ip_ChState[_8][_9].channelInitState;
if (_10 != 0)
goto <bb 6>; [INV]
else
goto <bb 7>; [INV]
<bb 6> :
# DEBUG BEGIN_STMT
_11 = (int) instance;
_12 = emiosBase[_11];
_13 = (int) currentChannel;
_12->CH.UC[_13].C = 0;
# DEBUG BEGIN_STMT
_14 = (int) instance;
_15 = emiosBase[_14];
_16 = (int) currentChannel;
_15->CH.UC[_16].A = 0;
# DEBUG BEGIN_STMT
_17 = (int) instance;
_18 = emiosBase[_17];
_19 = (int) currentChannel;
_18->CH.UC[_19].B = 0;
# DEBUG BEGIN_STMT
_20 = (int) instance;
_21 = emiosBase[_20];
_22 = (int) instance;
_23 = emiosBase[_22];
_24 = _21->UCDIS;
_23->UCDIS = _24;
# DEBUG BEGIN_STMT
_25 = (int) instance;
_26 = (int) currentChannel;
Emios_Ip_ChState[_25][_26].channelInitState = 0;
<bb 7> :
# DEBUG BEGIN_STMT
currentChannel.2_27 = currentChannel;
currentChannel = currentChannel.2_27 + 1;
<bb 8> :
# DEBUG BEGIN_STMT
if (currentChannel <= 23)
goto <bb 5>; [INV]
else
goto <bb 9>; [INV]
<bb 9> :
# DEBUG BEGIN_STMT
_28 = (int) instance;
Emios_Ip_IpIsInitialized[_28].instanceInitState = 0;
<bb 10> :
# DEBUG BEGIN_STMT
D.7712 = status;
return D.7712;
}
Emios_Mcl_Ip_ComparatorTransferDisable (uint8 instance, uint32 channelMask)
{
struct eMIOS_Type * base;
<bb 2> :
# DEBUG BEGIN_STMT
_1 = instance <= 2;
DevAssert (_1);
# DEBUG BEGIN_STMT
_2 = channelMask <= 16777214;
DevAssert (_2);
# DEBUG BEGIN_STMT
_3 = (int) instance;
base = emiosBase[_3];
# DEBUG BEGIN_STMT
_4 = base->OUDIS;
_5 = channelMask | _4;
base->OUDIS = _5;
return;
}
Emios_Mcl_Ip_ComparatorTransferEnable (uint8 instance, uint32 channelMask)
{
struct eMIOS_Type * base;
<bb 2> :
# DEBUG BEGIN_STMT
_1 = instance <= 2;
DevAssert (_1);
# DEBUG BEGIN_STMT
_2 = channelMask <= 16777214;
DevAssert (_2);
# DEBUG BEGIN_STMT
_3 = (int) instance;
base = emiosBase[_3];
# DEBUG BEGIN_STMT
_4 = base->OUDIS;
_5 = ~channelMask;
_6 = _4 & _5;
base->OUDIS = _6;
return;
}
Emios_Mcl_Ip_DisableChannel (uint8 instance, uint8 u8HwChannel)
{
struct eMIOS_Type * base;
<bb 2> :
# DEBUG BEGIN_STMT
_1 = instance <= 2;
DevAssert (_1);
# DEBUG BEGIN_STMT
_2 = u8HwChannel <= 23;
DevAssert (_2);
# DEBUG BEGIN_STMT
_3 = (int) instance;
base = emiosBase[_3];
# DEBUG BEGIN_STMT
_4 = base->UCDIS;
_5 = (long unsigned int) u8HwChannel;
_6 = 1 << _5;
_7 = _4 | _6;
base->UCDIS = _7;
return;
}
Emios_Mcl_Ip_EnableChannel (uint8 instance, uint8 u8HwChannel)
{
struct eMIOS_Type * base;
<bb 2> :
# DEBUG BEGIN_STMT
_1 = instance <= 2;
DevAssert (_1);
# DEBUG BEGIN_STMT
_2 = u8HwChannel <= 23;
DevAssert (_2);
# DEBUG BEGIN_STMT
_3 = (int) instance;
base = emiosBase[_3];
# DEBUG BEGIN_STMT
_4 = base->UCDIS;
_5 = (long unsigned int) u8HwChannel;
_6 = 1 << _5;
_7 = ~_6;
_8 = _4 & _7;
base->UCDIS = _8;
return;
}
Emios_Mcl_Ip_Init (uint8 instance, const struct Emios_Mcl_Ip_ConfigType * const pConfig)
{
Emios_Ip_CommonStatusType status;
struct eMIOS_Type * base;
uint8 currentChannel;
Emios_Ip_CommonStatusType D.7701;
<bb 2> :
# DEBUG BEGIN_STMT
_1 = instance <= 2;
DevAssert (_1);
# DEBUG BEGIN_STMT
_2 = pConfig != 0B;
DevAssert (_2);
# DEBUG BEGIN_STMT
# DEBUG BEGIN_STMT
_3 = (int) instance;
base = emiosBase[_3];
# DEBUG BEGIN_STMT
status = 0;
# DEBUG BEGIN_STMT
_4 = (int) instance;
_5 = Emios_Ip_IpIsInitialized[_4].instanceInitState;
if (_5 != 0)
goto <bb 3>; [INV]
else
goto <bb 4>; [INV]
<bb 3> :
# DEBUG BEGIN_STMT
status = 1;
goto <bb 16>; [INV]
<bb 4> :
# DEBUG BEGIN_STMT
_6 = base->MCR;
_7 = _6 & 4227858431;
base->MCR = _7;
# DEBUG BEGIN_STMT
_8 = pConfig->emiosGlobalConfig;
_9 = _8->clkDivVal;
_10 = (long unsigned int) _9;
_11 = _10 << 8;
_12 = _11 & 65535;
_13 = pConfig->emiosGlobalConfig;
_14 = _13->allowDebugMode;
_15 = (long unsigned int) _14;
_16 = _15 << 29;
_17 = _16 & 536870912;
_18 = _12 | _17;
_19 = pConfig->emiosGlobalConfig;
_20 = _19->enableGlobalTimeBase;
_21 = (long unsigned int) _20;
_22 = _21 << 28;
_23 = _22 & 268435456;
_24 = _18 | _23;
base->MCR = _24;
# DEBUG BEGIN_STMT
currentChannel = 0;
goto <bb 14>; [INV]
<bb 5> :
# DEBUG BEGIN_STMT
_25 = pConfig->masterBusConfig;
_26 = (int) currentChannel;
_27 = *_25[_26].allowDebugMode;
if (_27 != 0)
goto <bb 6>; [INV]
else
goto <bb 7>; [INV]
<bb 6> :
# DEBUG BEGIN_STMT
_28 = pConfig->masterBusConfig;
_29 = (int) currentChannel;
_30 = *_28[_29].hwChannel;
_31 = (int) _30;
_32 = base->CH.UC[_31].C;
_33 = pConfig->masterBusConfig;
_34 = (int) currentChannel;
_35 = *_33[_34].hwChannel;
_36 = (int) _35;
_37 = _32 | 2147483648;
base->CH.UC[_36].C = _37;
<bb 7> :
# DEBUG BEGIN_STMT
_38 = pConfig->masterBusConfig;
_39 = (int) currentChannel;
_40 = *_38[_39].hwChannel;
_41 = (int) _40;
_42 = base->CH.UC[_41].C;
_43 = pConfig->masterBusConfig;
_44 = (int) currentChannel;
_45 = *_43[_44].masterBusPrescaler;
_46 = (long unsigned int) _45;
_47 = _46 << 26;
_48 = _47 & 201326592;
_49 = pConfig->masterBusConfig;
_50 = (int) currentChannel;
_51 = *_49[_50].hwChannel;
_52 = (int) _51;
_53 = _42 | _48;
base->CH.UC[_52].C = _53;
# DEBUG BEGIN_STMT
_54 = pConfig->masterBusConfig;
_55 = (int) currentChannel;
_56 = *_54[_55].masterMode;
_57 = (int) _56;
switch (_57) <default: <L16> [INV], case 16: <L5> [INV], case 18: <L6> [INV], case 20: <L7> [INV], case 80: <L8> [INV], case 84: <L9> [INV]>
<bb 8> :
<L5>:
# DEBUG BEGIN_STMT
_58 = pConfig->masterBusConfig;
_59 = (int) currentChannel;
_60 = pConfig->masterBusConfig;
_61 = (int) currentChannel;
_62 = *_60[_61].hwChannel;
_63 = (int) _62;
_64 = *_58[_59].defaultPeriod;
base->CH.UC[_63].A = _64;
# DEBUG BEGIN_STMT
goto <bb 13>; [INV]
<bb 9> :
<L6>:
# DEBUG BEGIN_STMT
_65 = pConfig->masterBusConfig;
_66 = (int) currentChannel;
_67 = pConfig->masterBusConfig;
_68 = (int) currentChannel;
_69 = *_67[_68].hwChannel;
_70 = (int) _69;
_71 = *_65[_66].defaultPeriod;
base->CH.UC[_70].A = _71;
# DEBUG BEGIN_STMT
goto <bb 13>; [INV]
<bb 10> :
<L7>:
# DEBUG BEGIN_STMT
_72 = pConfig->masterBusConfig;
_73 = (int) currentChannel;
_74 = *_72[_73].hwChannel;
_75 = (int) _74;
base->CH.UC[_75].B = 0;
# DEBUG BEGIN_STMT
_76 = pConfig->masterBusConfig;
_77 = (int) currentChannel;
_78 = pConfig->masterBusConfig;
_79 = (int) currentChannel;
_80 = *_78[_79].hwChannel;
_81 = (int) _80;
_82 = *_76[_77].defaultPeriod;
base->CH.UC[_81].A = _82;
# DEBUG BEGIN_STMT
goto <bb 13>; [INV]
<bb 11> :
<L8>:
# DEBUG BEGIN_STMT
_83 = pConfig->masterBusConfig;
_84 = (int) currentChannel;
_85 = pConfig->masterBusConfig;
_86 = (int) currentChannel;
_87 = *_85[_86].hwChannel;
_88 = (int) _87;
_89 = *_83[_84].defaultPeriod;
base->CH.UC[_88].A = _89;
# DEBUG BEGIN_STMT
goto <bb 13>; [INV]
<bb 12> :
<L9>:
# DEBUG BEGIN_STMT
_90 = pConfig->masterBusConfig;
_91 = (int) currentChannel;
_92 = pConfig->masterBusConfig;
_93 = (int) currentChannel;
_94 = *_92[_93].hwChannel;
_95 = (int) _94;
_96 = *_90[_91].defaultPeriod;
base->CH.UC[_95].A = _96;
# DEBUG BEGIN_STMT
<bb 13> :
<L16>:
# DEBUG BEGIN_STMT
_97 = pConfig->masterBusConfig;
_98 = (int) currentChannel;
_99 = pConfig->masterBusConfig;
_100 = (int) currentChannel;
_101 = *_99[_100].hwChannel;
_102 = (int) _101;
_103 = *_97[_98].offsetStartValue;
base->CH.UC[_102].CNT = _103;
# DEBUG BEGIN_STMT
_104 = pConfig->masterBusConfig;
_105 = (int) currentChannel;
_106 = *_104[_105].hwChannel;
_107 = (int) _106;
_108 = base->CH.UC[_107].C;
_109 = pConfig->masterBusConfig;
_110 = (int) currentChannel;
_111 = *_109[_110].masterMode;
_112 = (long unsigned int) _111;
_113 = _112 & 127;
_114 = pConfig->masterBusConfig;
_115 = (int) currentChannel;
_116 = *_114[_115].hwChannel;
_117 = (int) _116;
_118 = _108 | _113;
base->CH.UC[_117].C = _118;
# DEBUG BEGIN_STMT
_119 = pConfig->masterBusConfig;
_120 = (int) currentChannel;
_121 = *_119[_120].hwChannel;
_122 = (int) _121;
_123 = base->CH.UC[_122].C;
_124 = pConfig->masterBusConfig;
_125 = (int) currentChannel;
_126 = *_124[_125].hwChannel;
_127 = (int) _126;
_128 = _123 | 33554432;
base->CH.UC[_127].C = _128;
# DEBUG BEGIN_STMT
_129 = pConfig->masterBusConfig;
_130 = (int) currentChannel;
_131 = *_129[_130].hwChannel;
_132 = (int) _131;
_133 = base->CH.UC[_132].C;
_134 = pConfig->masterBusConfig;
_135 = (int) currentChannel;
_136 = *_134[_135].interruptEnable;
_137 = (long unsigned int) _136;
_138 = _137 << 17;
_139 = _138 & 131072;
_140 = pConfig->masterBusConfig;
_141 = (int) currentChannel;
_142 = *_140[_141].hwChannel;
_143 = (int) _142;
_144 = _133 | _139;
base->CH.UC[_143].C = _144;
# DEBUG BEGIN_STMT
_145 = pConfig->masterBusConfig;
_146 = (int) currentChannel;
_147 = (int) instance;
_148 = pConfig->masterBusConfig;
_149 = (int) currentChannel;
_150 = *_148[_149].hwChannel;
_151 = (int) _150;
_152 = *_145[_146].masterMode;
Emios_Ip_ChState[_147][_151].counterMode = _152;
# DEBUG BEGIN_STMT
_153 = (int) instance;
_154 = pConfig->masterBusConfig;
_155 = (int) currentChannel;
_156 = *_154[_155].hwChannel;
_157 = (int) _156;
Emios_Ip_ChState[_153][_157].channelInitState = 1;
# DEBUG BEGIN_STMT
currentChannel.0_158 = currentChannel;
currentChannel = currentChannel.0_158 + 1;
<bb 14> :
# DEBUG BEGIN_STMT
_159 = pConfig->channelsNumber;
if (currentChannel < _159)
goto <bb 5>; [INV]
else
goto <bb 15>; [INV]
<bb 15> :
# DEBUG BEGIN_STMT
_160 = (int) instance;
Emios_Ip_IpIsInitialized[_160].instanceInitState = 1;
<bb 16> :
# DEBUG BEGIN_STMT
_161 = base->MCR;
_162 = _161 | 67108864;
base->MCR = _162;
# DEBUG BEGIN_STMT
D.7701 = status;
return D.7701;
}
DevAssert (volatile boolean x)
{
<bb 2> :
# DEBUG BEGIN_STMT
x.1_1 = x;
if (x.1_1 != 0)
goto <bb 4>; [INV]
else
goto <bb 3>; [INV]
<bb 3> :
# DEBUG BEGIN_STMT
# DEBUG BEGIN_STMT
# DEBUG BEGIN_STMT
goto <bb 3>; [INV]
<bb 4> :
# DEBUG BEGIN_STMT
return;
}
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