mirror of
https://github.com/Dev-KATECH/ADM.git
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1622 lines
55 KiB
Plaintext
1622 lines
55 KiB
Plaintext
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Marking local functions:
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Marking externally visible functions: SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_11 SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_11 SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_10 SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_10 SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_09 SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_09 SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_08 SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_08 SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_07 SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_07 SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_06 SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_06 SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_05 SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_05 SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_04 SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_04 SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_03 SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_03 SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_02 SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_02 SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_01 SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_01 SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_00 SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_00 Wdg_schm_read_msr
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Marking externally visible variables:
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Clearing variable flags:
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Reclaiming functions:
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Reclaiming variables:
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Clearing address taken flags:
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Symbol table:
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Sys_GetCoreID/49 (Sys_GetCoreID) @06aefa80
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_11/48 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_11/47 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_10/46 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_10/45 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_09/44 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_09/43 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_08/42 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_08/41 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_07/40 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_07/39 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_06/38 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_06/37 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_05/36 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_05/35 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_04/34 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_04/33 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_03/32 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_03/31 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_02/30 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_02/29 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_01/28 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_01/27 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_00/26 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_00/25 (1073741824 (estimated locally),1.00 per call)
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Calls:
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SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_11/48 (SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_11) @06aef540
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Type: function definition analyzed
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Visibility: externally_visible public
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References: reentry_guard_WDG_EXCLUSIVE_AREA_11/23 (read)reentry_guard_WDG_EXCLUSIVE_AREA_11/23 (write)msr_WDG_EXCLUSIVE_AREA_11/22 (read)reentry_guard_WDG_EXCLUSIVE_AREA_11/23 (read)
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Referring:
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Availability: available
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Function flags: count:1073741824 (estimated locally) body optimize_size
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Called by:
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Calls: Sys_GetCoreID/49 (1073741824 (estimated locally),1.00 per call)
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SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_11/47 (SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_11) @06aef2a0
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Type: function definition analyzed
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Visibility: externally_visible public
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References: reentry_guard_WDG_EXCLUSIVE_AREA_11/23 (read)msr_WDG_EXCLUSIVE_AREA_11/22 (write)msr_WDG_EXCLUSIVE_AREA_11/22 (read)reentry_guard_WDG_EXCLUSIVE_AREA_11/23 (read)reentry_guard_WDG_EXCLUSIVE_AREA_11/23 (write)
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Referring:
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Availability: available
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Function flags: count:1073741824 (estimated locally) body optimize_size
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Called by:
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Calls: Sys_GetCoreID/49 (1073741824 (estimated locally),1.00 per call)
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SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_10/46 (SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_10) @06aef000
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Type: function definition analyzed
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Visibility: externally_visible public
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References: reentry_guard_WDG_EXCLUSIVE_AREA_10/21 (read)reentry_guard_WDG_EXCLUSIVE_AREA_10/21 (write)msr_WDG_EXCLUSIVE_AREA_10/20 (read)reentry_guard_WDG_EXCLUSIVE_AREA_10/21 (read)
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Referring:
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Availability: available
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Function flags: count:1073741824 (estimated locally) body optimize_size
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Called by:
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Calls: Sys_GetCoreID/49 (1073741824 (estimated locally),1.00 per call)
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SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_10/45 (SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_10) @06ae9b60
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Type: function definition analyzed
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Visibility: externally_visible public
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References: reentry_guard_WDG_EXCLUSIVE_AREA_10/21 (read)msr_WDG_EXCLUSIVE_AREA_10/20 (write)msr_WDG_EXCLUSIVE_AREA_10/20 (read)reentry_guard_WDG_EXCLUSIVE_AREA_10/21 (read)reentry_guard_WDG_EXCLUSIVE_AREA_10/21 (write)
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Referring:
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Availability: available
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Function flags: count:1073741824 (estimated locally) body optimize_size
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Called by:
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Calls: Sys_GetCoreID/49 (1073741824 (estimated locally),1.00 per call)
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SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_09/44 (SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_09) @06ae9620
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Type: function definition analyzed
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Visibility: externally_visible public
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References: reentry_guard_WDG_EXCLUSIVE_AREA_09/19 (read)reentry_guard_WDG_EXCLUSIVE_AREA_09/19 (write)msr_WDG_EXCLUSIVE_AREA_09/18 (read)reentry_guard_WDG_EXCLUSIVE_AREA_09/19 (read)
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Referring:
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Availability: available
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Function flags: count:1073741824 (estimated locally) body optimize_size
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Called by:
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Calls: Sys_GetCoreID/49 (1073741824 (estimated locally),1.00 per call)
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SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_09/43 (SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_09) @06ae90e0
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Type: function definition analyzed
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Visibility: externally_visible public
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References: reentry_guard_WDG_EXCLUSIVE_AREA_09/19 (read)msr_WDG_EXCLUSIVE_AREA_09/18 (write)msr_WDG_EXCLUSIVE_AREA_09/18 (read)reentry_guard_WDG_EXCLUSIVE_AREA_09/19 (read)reentry_guard_WDG_EXCLUSIVE_AREA_09/19 (write)
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Referring:
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Availability: available
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Function flags: count:1073741824 (estimated locally) body optimize_size
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Called by:
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Calls: Sys_GetCoreID/49 (1073741824 (estimated locally),1.00 per call)
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SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_08/42 (SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_08) @06ae9d20
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Type: function definition analyzed
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Visibility: externally_visible public
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References: reentry_guard_WDG_EXCLUSIVE_AREA_08/17 (read)reentry_guard_WDG_EXCLUSIVE_AREA_08/17 (write)msr_WDG_EXCLUSIVE_AREA_08/16 (read)reentry_guard_WDG_EXCLUSIVE_AREA_08/17 (read)
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Referring:
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Availability: available
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Function flags: count:1073741824 (estimated locally) body optimize_size
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Called by:
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Calls: Sys_GetCoreID/49 (1073741824 (estimated locally),1.00 per call)
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SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_08/41 (SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_08) @06ae9a80
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Type: function definition analyzed
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Visibility: externally_visible public
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References: reentry_guard_WDG_EXCLUSIVE_AREA_08/17 (read)msr_WDG_EXCLUSIVE_AREA_08/16 (write)msr_WDG_EXCLUSIVE_AREA_08/16 (read)reentry_guard_WDG_EXCLUSIVE_AREA_08/17 (read)reentry_guard_WDG_EXCLUSIVE_AREA_08/17 (write)
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Referring:
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Availability: available
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Function flags: count:1073741824 (estimated locally) body optimize_size
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Called by:
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Calls: Sys_GetCoreID/49 (1073741824 (estimated locally),1.00 per call)
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SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_07/40 (SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_07) @06ae97e0
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Type: function definition analyzed
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Visibility: externally_visible public
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References: reentry_guard_WDG_EXCLUSIVE_AREA_07/15 (read)reentry_guard_WDG_EXCLUSIVE_AREA_07/15 (write)msr_WDG_EXCLUSIVE_AREA_07/14 (read)reentry_guard_WDG_EXCLUSIVE_AREA_07/15 (read)
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Referring:
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Availability: available
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Function flags: count:1073741824 (estimated locally) body optimize_size
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Called by:
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Calls: Sys_GetCoreID/49 (1073741824 (estimated locally),1.00 per call)
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SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_07/39 (SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_07) @06ae9540
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Type: function definition analyzed
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Visibility: externally_visible public
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References: reentry_guard_WDG_EXCLUSIVE_AREA_07/15 (read)msr_WDG_EXCLUSIVE_AREA_07/14 (write)msr_WDG_EXCLUSIVE_AREA_07/14 (read)reentry_guard_WDG_EXCLUSIVE_AREA_07/15 (read)reentry_guard_WDG_EXCLUSIVE_AREA_07/15 (write)
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Referring:
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Availability: available
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Function flags: count:1073741824 (estimated locally) body optimize_size
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Called by:
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Calls: Sys_GetCoreID/49 (1073741824 (estimated locally),1.00 per call)
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SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_06/38 (SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_06) @06ae92a0
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Type: function definition analyzed
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Visibility: externally_visible public
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References: reentry_guard_WDG_EXCLUSIVE_AREA_06/13 (read)reentry_guard_WDG_EXCLUSIVE_AREA_06/13 (write)msr_WDG_EXCLUSIVE_AREA_06/12 (read)reentry_guard_WDG_EXCLUSIVE_AREA_06/13 (read)
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Referring:
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Availability: available
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Function flags: count:1073741824 (estimated locally) body optimize_size
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Called by:
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Calls: Sys_GetCoreID/49 (1073741824 (estimated locally),1.00 per call)
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SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_06/37 (SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_06) @06ae9000
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Type: function definition analyzed
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Visibility: externally_visible public
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References: reentry_guard_WDG_EXCLUSIVE_AREA_06/13 (read)msr_WDG_EXCLUSIVE_AREA_06/12 (write)msr_WDG_EXCLUSIVE_AREA_06/12 (read)reentry_guard_WDG_EXCLUSIVE_AREA_06/13 (read)reentry_guard_WDG_EXCLUSIVE_AREA_06/13 (write)
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Referring:
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Availability: available
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Function flags: count:1073741824 (estimated locally) body optimize_size
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Called by:
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Calls: Sys_GetCoreID/49 (1073741824 (estimated locally),1.00 per call)
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SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_05/36 (SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_05) @069f7b60
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Type: function definition analyzed
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Visibility: externally_visible public
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References: reentry_guard_WDG_EXCLUSIVE_AREA_05/11 (read)reentry_guard_WDG_EXCLUSIVE_AREA_05/11 (write)msr_WDG_EXCLUSIVE_AREA_05/10 (read)reentry_guard_WDG_EXCLUSIVE_AREA_05/11 (read)
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Referring:
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Availability: available
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Function flags: count:1073741824 (estimated locally) body optimize_size
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Called by:
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Calls: Sys_GetCoreID/49 (1073741824 (estimated locally),1.00 per call)
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SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_05/35 (SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_05) @069f7620
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Type: function definition analyzed
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Visibility: externally_visible public
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References: reentry_guard_WDG_EXCLUSIVE_AREA_05/11 (read)msr_WDG_EXCLUSIVE_AREA_05/10 (write)msr_WDG_EXCLUSIVE_AREA_05/10 (read)reentry_guard_WDG_EXCLUSIVE_AREA_05/11 (read)reentry_guard_WDG_EXCLUSIVE_AREA_05/11 (write)
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Referring:
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Availability: available
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Function flags: count:1073741824 (estimated locally) body optimize_size
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Called by:
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Calls: Sys_GetCoreID/49 (1073741824 (estimated locally),1.00 per call)
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SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_04/34 (SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_04) @069f70e0
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Type: function definition analyzed
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Visibility: externally_visible public
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References: reentry_guard_WDG_EXCLUSIVE_AREA_04/9 (read)reentry_guard_WDG_EXCLUSIVE_AREA_04/9 (write)msr_WDG_EXCLUSIVE_AREA_04/8 (read)reentry_guard_WDG_EXCLUSIVE_AREA_04/9 (read)
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Referring:
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Availability: available
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Function flags: count:1073741824 (estimated locally) body optimize_size
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Called by:
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Calls: Sys_GetCoreID/49 (1073741824 (estimated locally),1.00 per call)
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SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_04/33 (SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_04) @069f7d20
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Type: function definition analyzed
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Visibility: externally_visible public
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References: reentry_guard_WDG_EXCLUSIVE_AREA_04/9 (read)msr_WDG_EXCLUSIVE_AREA_04/8 (write)msr_WDG_EXCLUSIVE_AREA_04/8 (read)reentry_guard_WDG_EXCLUSIVE_AREA_04/9 (read)reentry_guard_WDG_EXCLUSIVE_AREA_04/9 (write)
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Referring:
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Availability: available
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Function flags: count:1073741824 (estimated locally) body optimize_size
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Called by:
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Calls: Sys_GetCoreID/49 (1073741824 (estimated locally),1.00 per call)
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SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_03/32 (SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_03) @069f7a80
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Type: function definition analyzed
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Visibility: externally_visible public
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References: reentry_guard_WDG_EXCLUSIVE_AREA_03/7 (read)reentry_guard_WDG_EXCLUSIVE_AREA_03/7 (write)msr_WDG_EXCLUSIVE_AREA_03/6 (read)reentry_guard_WDG_EXCLUSIVE_AREA_03/7 (read)
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Referring:
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Availability: available
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Function flags: count:1073741824 (estimated locally) body optimize_size
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Called by:
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Calls: Sys_GetCoreID/49 (1073741824 (estimated locally),1.00 per call)
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SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_03/31 (SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_03) @069f77e0
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Type: function definition analyzed
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Visibility: externally_visible public
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References: reentry_guard_WDG_EXCLUSIVE_AREA_03/7 (read)msr_WDG_EXCLUSIVE_AREA_03/6 (write)msr_WDG_EXCLUSIVE_AREA_03/6 (read)reentry_guard_WDG_EXCLUSIVE_AREA_03/7 (read)reentry_guard_WDG_EXCLUSIVE_AREA_03/7 (write)
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Referring:
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Availability: available
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Function flags: count:1073741824 (estimated locally) body optimize_size
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Called by:
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Calls: Sys_GetCoreID/49 (1073741824 (estimated locally),1.00 per call)
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SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_02/30 (SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_02) @069f7540
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Type: function definition analyzed
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Visibility: externally_visible public
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References: reentry_guard_WDG_EXCLUSIVE_AREA_02/5 (read)reentry_guard_WDG_EXCLUSIVE_AREA_02/5 (write)msr_WDG_EXCLUSIVE_AREA_02/4 (read)reentry_guard_WDG_EXCLUSIVE_AREA_02/5 (read)
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Referring:
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Availability: available
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Function flags: count:1073741824 (estimated locally) body optimize_size
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Called by:
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Calls: Sys_GetCoreID/49 (1073741824 (estimated locally),1.00 per call)
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SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_02/29 (SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_02) @069f72a0
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Type: function definition analyzed
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Visibility: externally_visible public
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References: reentry_guard_WDG_EXCLUSIVE_AREA_02/5 (read)msr_WDG_EXCLUSIVE_AREA_02/4 (write)msr_WDG_EXCLUSIVE_AREA_02/4 (read)reentry_guard_WDG_EXCLUSIVE_AREA_02/5 (read)reentry_guard_WDG_EXCLUSIVE_AREA_02/5 (write)
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Referring:
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Availability: available
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Function flags: count:1073741824 (estimated locally) body optimize_size
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Called by:
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Calls: Sys_GetCoreID/49 (1073741824 (estimated locally),1.00 per call)
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SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_01/28 (SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_01) @069f7000
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Type: function definition analyzed
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Visibility: externally_visible public
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References: reentry_guard_WDG_EXCLUSIVE_AREA_01/3 (read)reentry_guard_WDG_EXCLUSIVE_AREA_01/3 (write)msr_WDG_EXCLUSIVE_AREA_01/2 (read)reentry_guard_WDG_EXCLUSIVE_AREA_01/3 (read)
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Referring:
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Availability: available
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Function flags: count:1073741824 (estimated locally) body optimize_size
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Called by:
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Calls: Sys_GetCoreID/49 (1073741824 (estimated locally),1.00 per call)
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SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_01/27 (SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_01) @069f2a80
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Type: function definition analyzed
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Visibility: externally_visible public
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References: reentry_guard_WDG_EXCLUSIVE_AREA_01/3 (read)msr_WDG_EXCLUSIVE_AREA_01/2 (write)msr_WDG_EXCLUSIVE_AREA_01/2 (read)reentry_guard_WDG_EXCLUSIVE_AREA_01/3 (read)reentry_guard_WDG_EXCLUSIVE_AREA_01/3 (write)
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Referring:
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Availability: available
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Function flags: count:1073741824 (estimated locally) body optimize_size
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Called by:
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Calls: Sys_GetCoreID/49 (1073741824 (estimated locally),1.00 per call)
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SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_00/26 (SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_00) @069f2ee0
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Type: function definition analyzed
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Visibility: externally_visible public
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References: reentry_guard_WDG_EXCLUSIVE_AREA_00/1 (read)reentry_guard_WDG_EXCLUSIVE_AREA_00/1 (write)msr_WDG_EXCLUSIVE_AREA_00/0 (read)reentry_guard_WDG_EXCLUSIVE_AREA_00/1 (read)
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Referring:
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Availability: available
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Function flags: count:1073741824 (estimated locally) body optimize_size
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Called by:
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Calls: Sys_GetCoreID/49 (1073741824 (estimated locally),1.00 per call)
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SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_00/25 (SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_00) @069f2c40
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Type: function definition analyzed
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Visibility: externally_visible public
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References: reentry_guard_WDG_EXCLUSIVE_AREA_00/1 (read)msr_WDG_EXCLUSIVE_AREA_00/0 (write)msr_WDG_EXCLUSIVE_AREA_00/0 (read)reentry_guard_WDG_EXCLUSIVE_AREA_00/1 (read)reentry_guard_WDG_EXCLUSIVE_AREA_00/1 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/49 (1073741824 (estimated locally),1.00 per call)
|
|
Wdg_schm_read_msr/24 (Wdg_schm_read_msr) @069f29a0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References:
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls:
|
|
reentry_guard_WDG_EXCLUSIVE_AREA_11/23 (reentry_guard_WDG_EXCLUSIVE_AREA_11) @069f15a0
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_11/47 (read)SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_11/47 (read)SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_11/47 (write)SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_11/48 (read)SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_11/48 (write)SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_11/48 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_WDG_EXCLUSIVE_AREA_11/22 (msr_WDG_EXCLUSIVE_AREA_11) @069f1510
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_11/47 (read)SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_11/47 (write)SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_11/48 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_WDG_EXCLUSIVE_AREA_10/21 (reentry_guard_WDG_EXCLUSIVE_AREA_10) @069f1480
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_10/45 (read)SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_10/45 (read)SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_10/45 (write)SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_10/46 (read)SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_10/46 (write)SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_10/46 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_WDG_EXCLUSIVE_AREA_10/20 (msr_WDG_EXCLUSIVE_AREA_10) @069f13f0
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_10/45 (read)SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_10/45 (write)SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_10/46 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_WDG_EXCLUSIVE_AREA_09/19 (reentry_guard_WDG_EXCLUSIVE_AREA_09) @069f1360
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_09/43 (read)SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_09/43 (read)SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_09/43 (write)SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_09/44 (read)SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_09/44 (write)SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_09/44 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_WDG_EXCLUSIVE_AREA_09/18 (msr_WDG_EXCLUSIVE_AREA_09) @069f12d0
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_09/43 (read)SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_09/43 (write)SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_09/44 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_WDG_EXCLUSIVE_AREA_08/17 (reentry_guard_WDG_EXCLUSIVE_AREA_08) @069f1240
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_08/41 (read)SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_08/41 (read)SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_08/41 (write)SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_08/42 (read)SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_08/42 (write)SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_08/42 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_WDG_EXCLUSIVE_AREA_08/16 (msr_WDG_EXCLUSIVE_AREA_08) @069f11b0
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_08/41 (read)SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_08/41 (write)SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_08/42 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_WDG_EXCLUSIVE_AREA_07/15 (reentry_guard_WDG_EXCLUSIVE_AREA_07) @069f1120
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_07/39 (read)SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_07/39 (read)SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_07/39 (write)SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_07/40 (read)SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_07/40 (write)SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_07/40 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_WDG_EXCLUSIVE_AREA_07/14 (msr_WDG_EXCLUSIVE_AREA_07) @069f1090
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_07/39 (read)SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_07/39 (write)SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_07/40 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_WDG_EXCLUSIVE_AREA_06/13 (reentry_guard_WDG_EXCLUSIVE_AREA_06) @069f1000
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_06/37 (read)SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_06/37 (read)SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_06/37 (write)SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_06/38 (read)SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_06/38 (write)SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_06/38 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_WDG_EXCLUSIVE_AREA_06/12 (msr_WDG_EXCLUSIVE_AREA_06) @069eaf30
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_06/37 (read)SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_06/37 (write)SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_06/38 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_WDG_EXCLUSIVE_AREA_05/11 (reentry_guard_WDG_EXCLUSIVE_AREA_05) @069eaea0
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_05/35 (read)SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_05/35 (read)SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_05/35 (write)SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_05/36 (read)SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_05/36 (write)SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_05/36 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_WDG_EXCLUSIVE_AREA_05/10 (msr_WDG_EXCLUSIVE_AREA_05) @069eae10
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_05/35 (read)SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_05/35 (write)SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_05/36 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_WDG_EXCLUSIVE_AREA_04/9 (reentry_guard_WDG_EXCLUSIVE_AREA_04) @069ead80
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_04/33 (read)SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_04/33 (read)SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_04/33 (write)SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_04/34 (read)SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_04/34 (write)SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_04/34 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_WDG_EXCLUSIVE_AREA_04/8 (msr_WDG_EXCLUSIVE_AREA_04) @069eacf0
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_04/33 (read)SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_04/33 (write)SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_04/34 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_WDG_EXCLUSIVE_AREA_03/7 (reentry_guard_WDG_EXCLUSIVE_AREA_03) @069eac60
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_03/31 (read)SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_03/31 (read)SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_03/31 (write)SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_03/32 (read)SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_03/32 (write)SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_03/32 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_WDG_EXCLUSIVE_AREA_03/6 (msr_WDG_EXCLUSIVE_AREA_03) @069eabd0
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_03/31 (read)SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_03/31 (write)SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_03/32 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_WDG_EXCLUSIVE_AREA_02/5 (reentry_guard_WDG_EXCLUSIVE_AREA_02) @069eab40
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_02/29 (read)SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_02/29 (read)SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_02/29 (write)SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_02/30 (read)SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_02/30 (write)SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_02/30 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_WDG_EXCLUSIVE_AREA_02/4 (msr_WDG_EXCLUSIVE_AREA_02) @069eaab0
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_02/29 (read)SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_02/29 (write)SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_02/30 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_WDG_EXCLUSIVE_AREA_01/3 (reentry_guard_WDG_EXCLUSIVE_AREA_01) @069eaa20
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_01/27 (read)SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_01/27 (read)SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_01/27 (write)SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_01/28 (read)SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_01/28 (write)SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_01/28 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_WDG_EXCLUSIVE_AREA_01/2 (msr_WDG_EXCLUSIVE_AREA_01) @069ea990
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_01/27 (read)SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_01/27 (write)SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_01/28 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_WDG_EXCLUSIVE_AREA_00/1 (reentry_guard_WDG_EXCLUSIVE_AREA_00) @069ea900
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_00/25 (read)SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_00/25 (read)SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_00/25 (write)SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_00/26 (read)SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_00/26 (write)SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_00/26 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_WDG_EXCLUSIVE_AREA_00/0 (msr_WDG_EXCLUSIVE_AREA_00) @069ea870
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_00/25 (read)SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_00/25 (write)SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_00/26 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_11 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_WDG_EXCLUSIVE_AREA_11[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_WDG_EXCLUSIVE_AREA_11[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_WDG_EXCLUSIVE_AREA_11[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_WDG_EXCLUSIVE_AREA_11[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_11 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_WDG_EXCLUSIVE_AREA_11[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Wdg_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_WDG_EXCLUSIVE_AREA_11[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_WDG_EXCLUSIVE_AREA_11[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_WDG_EXCLUSIVE_AREA_11[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_WDG_EXCLUSIVE_AREA_11[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_10 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_WDG_EXCLUSIVE_AREA_10[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_WDG_EXCLUSIVE_AREA_10[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_WDG_EXCLUSIVE_AREA_10[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_WDG_EXCLUSIVE_AREA_10[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_10 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_WDG_EXCLUSIVE_AREA_10[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Wdg_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_WDG_EXCLUSIVE_AREA_10[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_WDG_EXCLUSIVE_AREA_10[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_WDG_EXCLUSIVE_AREA_10[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_WDG_EXCLUSIVE_AREA_10[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_09 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_WDG_EXCLUSIVE_AREA_09[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_WDG_EXCLUSIVE_AREA_09[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_WDG_EXCLUSIVE_AREA_09[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_WDG_EXCLUSIVE_AREA_09[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_09 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_WDG_EXCLUSIVE_AREA_09[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Wdg_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_WDG_EXCLUSIVE_AREA_09[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_WDG_EXCLUSIVE_AREA_09[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_WDG_EXCLUSIVE_AREA_09[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_WDG_EXCLUSIVE_AREA_09[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_08 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_WDG_EXCLUSIVE_AREA_08[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_WDG_EXCLUSIVE_AREA_08[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_WDG_EXCLUSIVE_AREA_08[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_WDG_EXCLUSIVE_AREA_08[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_08 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_WDG_EXCLUSIVE_AREA_08[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Wdg_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_WDG_EXCLUSIVE_AREA_08[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_WDG_EXCLUSIVE_AREA_08[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_WDG_EXCLUSIVE_AREA_08[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_WDG_EXCLUSIVE_AREA_08[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_07 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_WDG_EXCLUSIVE_AREA_07[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_WDG_EXCLUSIVE_AREA_07[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_WDG_EXCLUSIVE_AREA_07[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_WDG_EXCLUSIVE_AREA_07[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_07 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_WDG_EXCLUSIVE_AREA_07[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Wdg_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_WDG_EXCLUSIVE_AREA_07[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_WDG_EXCLUSIVE_AREA_07[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_WDG_EXCLUSIVE_AREA_07[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_WDG_EXCLUSIVE_AREA_07[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_06 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_WDG_EXCLUSIVE_AREA_06[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_WDG_EXCLUSIVE_AREA_06[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_WDG_EXCLUSIVE_AREA_06[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_WDG_EXCLUSIVE_AREA_06[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_06 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_WDG_EXCLUSIVE_AREA_06[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Wdg_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_WDG_EXCLUSIVE_AREA_06[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_WDG_EXCLUSIVE_AREA_06[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_WDG_EXCLUSIVE_AREA_06[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_WDG_EXCLUSIVE_AREA_06[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_05 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_WDG_EXCLUSIVE_AREA_05[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_WDG_EXCLUSIVE_AREA_05[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_WDG_EXCLUSIVE_AREA_05[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_WDG_EXCLUSIVE_AREA_05[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_05 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_WDG_EXCLUSIVE_AREA_05[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Wdg_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_WDG_EXCLUSIVE_AREA_05[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_WDG_EXCLUSIVE_AREA_05[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_WDG_EXCLUSIVE_AREA_05[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_WDG_EXCLUSIVE_AREA_05[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_04 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_WDG_EXCLUSIVE_AREA_04[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_WDG_EXCLUSIVE_AREA_04[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_WDG_EXCLUSIVE_AREA_04[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_WDG_EXCLUSIVE_AREA_04[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_04 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_WDG_EXCLUSIVE_AREA_04[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Wdg_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_WDG_EXCLUSIVE_AREA_04[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_WDG_EXCLUSIVE_AREA_04[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_WDG_EXCLUSIVE_AREA_04[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_WDG_EXCLUSIVE_AREA_04[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_03 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_WDG_EXCLUSIVE_AREA_03[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_WDG_EXCLUSIVE_AREA_03[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_WDG_EXCLUSIVE_AREA_03[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_WDG_EXCLUSIVE_AREA_03[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_03 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_WDG_EXCLUSIVE_AREA_03[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Wdg_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_WDG_EXCLUSIVE_AREA_03[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_WDG_EXCLUSIVE_AREA_03[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_WDG_EXCLUSIVE_AREA_03[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_WDG_EXCLUSIVE_AREA_03[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_02 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_WDG_EXCLUSIVE_AREA_02[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_WDG_EXCLUSIVE_AREA_02[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_WDG_EXCLUSIVE_AREA_02[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_WDG_EXCLUSIVE_AREA_02[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_02 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_WDG_EXCLUSIVE_AREA_02[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Wdg_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_WDG_EXCLUSIVE_AREA_02[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_WDG_EXCLUSIVE_AREA_02[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_WDG_EXCLUSIVE_AREA_02[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_WDG_EXCLUSIVE_AREA_02[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_01 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_WDG_EXCLUSIVE_AREA_01[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_WDG_EXCLUSIVE_AREA_01[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_WDG_EXCLUSIVE_AREA_01[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_WDG_EXCLUSIVE_AREA_01[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_01 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_WDG_EXCLUSIVE_AREA_01[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Wdg_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_WDG_EXCLUSIVE_AREA_01[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_WDG_EXCLUSIVE_AREA_01[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_WDG_EXCLUSIVE_AREA_01[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_WDG_EXCLUSIVE_AREA_01[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_00 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_WDG_EXCLUSIVE_AREA_00[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_WDG_EXCLUSIVE_AREA_00[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_WDG_EXCLUSIVE_AREA_00[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_WDG_EXCLUSIVE_AREA_00[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_00 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_WDG_EXCLUSIVE_AREA_00[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Wdg_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_WDG_EXCLUSIVE_AREA_00[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_WDG_EXCLUSIVE_AREA_00[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_WDG_EXCLUSIVE_AREA_00[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_WDG_EXCLUSIVE_AREA_00[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Wdg_schm_read_msr ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_1);
|
|
# DEBUG reg_tmp => reg_tmp_1
|
|
# DEBUG BEGIN_STMT
|
|
return reg_tmp_1;
|
|
|
|
}
|
|
|
|
|