mirror of
https://github.com/Dev-KATECH/ADM.git
synced 2026-05-17 18:03:59 +09:00
8578 lines
205 KiB
Plaintext
8578 lines
205 KiB
Plaintext
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Marking local functions: FlexCAN_CompleteRxMessageFifoData FlexCAN_AbortRxTransfer FlexCAN_AbortTxTransfer FlexCAN_IRQHandlerEnhancedRxFIFO FlexCAN_ProcessIRQHandlerEnhancedRxFIFO FlexCAN_ProcessSpuriousInterruptMB FlexCAN_IRQHandlerRxFIFO FlexCAN_IRQHandlerTxMB FlexCAN_IRQHandlerRxMB FlexCAN_StartRxMessageFifoData FlexCAN_StartSendData FlexCAN_StartRxMessageBufferData FlexCAN_ProccessLegacyRxFIFO FlexCAN_ProccessEnhancedRxFifo FlexCAN_StartRxMessageEnhancedFifoData FlexCAN_CompleteRxMessageEnhancedFifoData FlexCAN_InitController FlexCAN_InitRxFifo FlexCAN_SetRegDefaultVal FlexCAN_GetEnhancedRxFIFOIntStatusFlag FlexCAN_ClearEnhancedRxFifoIntStatusFlag FlexCAN_GetEnhancedRxFIFOStatusFlag FlexCAN_SetEnhancedRxFifoIntAll FlexCAN_IsEnhancedRxFifoEnabled FlexCAN_SetRxMaskType FlexCAN_SetTxArbitrationStartDelay FlexCAN_IsFreezeMode FlexCAN_SetRxIndividualMask FlexCAN_SetRxMsgBuffGlobalMask FlexCAN_GetMsgBuffIntStatusFlag RxFifoOcuppiedLastMsgBuff FlexCAN_IsListenOnlyModeEnabled FlexCAN_IsFDEnabled FlexCAN_SetSelfReception FlexCAN_EnhCbtEnable FlexCAN_EnableExtCbt FlexCAN_IsEnhCbtEnabled FlexCAN_IsExCbtEnabled FlexCAN_GetFDTimeSegments FlexCAN_GetTimeSegments FlexCAN_GetExtendedTimeSegments FlexCAN_GetEnhancedDataTimeSegments FlexCAN_SetEnhancedDataTimeSegments FlexCAN_GetEnhancedNominalTimeSegments FlexCAN_SetEnhancedNominalTimeSegments FlexCAN_SetExtendedTimeSegments FlexCAN_SetTimeSegments FlexCAN_SetFDTimeSegments FlexCAN_GetBuffStatusImask FlexCAN_GetBuffStatusFlag FlexCAN_ClearMsgBuffIntStatusFlag FlexCAN_UnlockRxMsgBuff FlexCAN_SetListenOnlyMode FlexCAN_SetFDEnabled FlexCAN_DisableMemErrorDetection FlexCAN_IsEnabled FlexCAN_SetEnhancedTDCOffset FlexCAN_SetTDCOffset FlexCAN_SetRxFifoGlobalMask DevAssert
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Marking externally visible functions: FlexCAN_Ip_GetListenOnlyMode FlexCAN_Ip_SetListenOnlyMode_Privileged FlexCAN_Ip_SetRxMb15Mask_Privileged FlexCAN_Ip_SetRxMb14Mask_Privileged FlexCAN_Ip_AbortTransfer FlexCAN_Ip_SetErrorInt_Privileged FlexCAN_Ip_DisableInterrupts_Privileged FlexCAN_Ip_EnableInterrupts_Privileged FlexCAN_Ip_ClearBuffStatusFlag FlexCAN_Ip_GetBuffStatusFlag FlexCAN_Ip_SetTxArbitrationStartDelay_Privileged FlexCAN_Ip_SetTDCOffset_Privileged FlexCAN_Ip_GetBitrateFD FlexCAN_Ip_SetBitrateCbt_Privileged FlexCAN_Ip_GetTDCValue_Privileged FlexCAN_Ip_GetTDCFail_Privileged FlexCAN_Ip_ClearTDCFail_Privileged FlexCAN_Ip_GetBitrate FlexCAN_Ip_SetBitrate_Privileged FlexCAN_Ip_SetRxMaskType_Privileged FlexCAN_Ip_SetStopMode_Privileged FlexCAN_Ip_SetStartMode_Privileged FlexCAN_Ip_GetStartMode_Privileged FlexCAN_Ip_GetStopMode_Privileged FlexCAN_Ip_MainFunctionWrite FlexCAN_Ip_MainFunctionBusOff_Privileged FlexCAN_Ip_MainFunctionRead FlexCAN_Ip_Deinit_Privileged FlexCAN_Ip_SetRxFifoGlobalMask_Privileged FlexCAN_Ip_SetRxIndividualMask_Privileged FlexCAN_Ip_ExitFreezeMode_Privileged FlexCAN_Ip_EnterFreezeMode_Privileged FlexCAN_Ip_SetRxMbGlobalMask_Privileged FlexCAN_Ip_SendBlocking FlexCAN_Busoff_Error_IRQHandler FlexCAN_Ip_GetControllerRxErrorCounter FlexCAN_Ip_GetControllerTxErrorCounter FlexCAN_Ip_GetErrorStatus FlexCAN_Ip_ClearErrorStatus FlexCAN_IRQHandler FlexCAN_Ip_GetTransferStatus FlexCAN_Ip_ConfigRemoteResponseMb FlexCAN_Ip_ConfigEnhancedRxFifo_Privileged FlexCAN_Ip_ConfigRxFifo_Privileged FlexCAN_Ip_RxFifoBlocking FlexCAN_Ip_RxFifo FlexCAN_Ip_ReceiveBlocking FlexCAN_Ip_Receive FlexCAN_Ip_ConfigRxMb FlexCAN_Ip_Send FlexCAN_Ip_Init_Privileged
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Marking externally visible variables:
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Reclaiming functions:
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Reclaiming variables:
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Clearing address taken flags:
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Symbol table:
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FLEXCAN_ClearMsgBuffIntCmd/162 (FLEXCAN_ClearMsgBuffIntCmd) @0704e7e0
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: FlexCAN_AbortRxTransfer/68 FlexCAN_Ip_AbortTransfer/116
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Calls:
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FlexCAN_SetErrIntCmd/161 (FlexCAN_SetErrIntCmd) @0704e620
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: FlexCAN_Ip_SetErrorInt_Privileged/115 FlexCAN_Ip_SetErrorInt_Privileged/115 FlexCAN_Ip_SetErrorInt_Privileged/115 FlexCAN_Ip_SetErrorInt_Privileged/115 FlexCAN_Ip_SetErrorInt_Privileged/115
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Calls:
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FlexCAN_DisableInterrupts/160 (FlexCAN_DisableInterrupts) @0704e380
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: FlexCAN_Ip_DisableInterrupts_Privileged/114
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Calls:
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FlexCAN_EnableInterrupts/159 (FlexCAN_EnableInterrupts) @0704e1c0
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: FlexCAN_Ip_EnableInterrupts_Privileged/113
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Calls:
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SchM_Exit_Can_CAN_EXCLUSIVE_AREA_17/158 (SchM_Exit_Can_CAN_EXCLUSIVE_AREA_17) @07039d20
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: FlexCAN_Ip_SetTxArbitrationStartDelay_Privileged/110
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Calls:
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SchM_Enter_Can_CAN_EXCLUSIVE_AREA_17/157 (SchM_Enter_Can_CAN_EXCLUSIVE_AREA_17) @07039c40
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: FlexCAN_Ip_SetTxArbitrationStartDelay_Privileged/110
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Calls:
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SchM_Exit_Can_CAN_EXCLUSIVE_AREA_16/156 (SchM_Exit_Can_CAN_EXCLUSIVE_AREA_16) @070398c0
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: FlexCAN_Ip_SetTDCOffset_Privileged/109
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Calls:
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SchM_Enter_Can_CAN_EXCLUSIVE_AREA_16/155 (SchM_Enter_Can_CAN_EXCLUSIVE_AREA_16) @070397e0
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: FlexCAN_Ip_SetTDCOffset_Privileged/109
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Calls:
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SchM_Exit_Can_CAN_EXCLUSIVE_AREA_15/154 (SchM_Exit_Can_CAN_EXCLUSIVE_AREA_15) @070392a0
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: FlexCAN_Ip_SetBitrateCbt_Privileged/107
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Calls:
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SchM_Enter_Can_CAN_EXCLUSIVE_AREA_15/153 (SchM_Enter_Can_CAN_EXCLUSIVE_AREA_15) @070391c0
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: FlexCAN_Ip_SetBitrateCbt_Privileged/107
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Calls:
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SchM_Exit_Can_CAN_EXCLUSIVE_AREA_14/152 (SchM_Exit_Can_CAN_EXCLUSIVE_AREA_14) @07025700
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: FlexCAN_Ip_SetBitrate_Privileged/102
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Calls:
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SchM_Enter_Can_CAN_EXCLUSIVE_AREA_14/151 (SchM_Enter_Can_CAN_EXCLUSIVE_AREA_14) @07025620
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: FlexCAN_Ip_SetBitrate_Privileged/102
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Calls:
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FlexCAN_GetMaxMbNum/150 (FlexCAN_GetMaxMbNum) @0700db60
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: FlexCAN_SetRegDefaultVal/49 FlexCAN_SetRegDefaultVal/49
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Calls:
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FlexCAN_ExitFreezeMode/149 (FlexCAN_ExitFreezeMode) @0700d540
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: FlexCAN_Ip_SetStartMode_Privileged/99 FlexCAN_Ip_ExitFreezeMode_Privileged/90
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Calls:
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FlexCAN_GetMsgBuffRegion/148 (FlexCAN_GetMsgBuffRegion) @0700d0e0
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: FlexCAN_AbortRxTransfer/68 FlexCAN_AbortRxTransfer/68 FlexCAN_AbortTxTransfer/67 FlexCAN_Ip_SendBlocking/87
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Calls:
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FlexCAN_GetMsgBuffTimestamp/147 (FlexCAN_GetMsgBuffTimestamp) @06fec380
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: FlexCAN_Ip_MainFunctionWrite/96 FlexCAN_IRQHandlerTxMB/62
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Calls:
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FlexCAN_SetEnhancedRxFifoFilter/146 (FlexCAN_SetEnhancedRxFifoFilter) @06fd2d20
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: FlexCAN_Ip_ConfigEnhancedRxFifo_Privileged/77
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Calls:
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FlexCAN_SetRxFifoFilter/145 (FlexCAN_SetRxFifoFilter) @06fd2a80
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: FlexCAN_Ip_ConfigRxFifo_Privileged/76
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Calls:
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FlexCAN_Enable/144 (FlexCAN_Enable) @06fd29a0
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: FlexCAN_Ip_SetListenOnlyMode_Privileged/119 FlexCAN_Ip_SetRxMb15Mask_Privileged/118 FlexCAN_Ip_SetRxMb14Mask_Privileged/117 FlexCAN_Ip_SetErrorInt_Privileged/115 FlexCAN_Ip_SetTxArbitrationStartDelay_Privileged/110 FlexCAN_Ip_SetTDCOffset_Privileged/109 FlexCAN_Ip_SetBitrateCbt_Privileged/107 FlexCAN_Ip_GetTDCValue_Privileged/106 FlexCAN_Ip_GetTDCFail_Privileged/105 FlexCAN_Ip_ClearTDCFail_Privileged/104 FlexCAN_Ip_SetBitrate_Privileged/102 FlexCAN_Ip_SetRxMaskType_Privileged/101 FlexCAN_Ip_SetRxFifoGlobalMask_Privileged/92 FlexCAN_Ip_SetRxIndividualMask_Privileged/91 FlexCAN_Ip_SetRxMbGlobalMask_Privileged/88 FlexCAN_Ip_ConfigEnhancedRxFifo_Privileged/77 FlexCAN_Ip_ConfigRxFifo_Privileged/76
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Calls:
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FlexCAN_ReadRxFifo/143 (FlexCAN_ReadRxFifo) @06fd2700
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: FlexCAN_IRQHandlerRxFIFO/63
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Calls:
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FlexCAN_ReadEnhancedRxFifo/142 (FlexCAN_ReadEnhancedRxFifo) @06fd21c0
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: FlexCAN_IRQHandlerEnhancedRxFIFO/66
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Calls:
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FlexCAN_IsEnhancedRxFifoAvailable/141 (FlexCAN_IsEnhancedRxFifoAvailable) @06fb97e0
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: FlexCAN_Ip_DisableInterrupts_Privileged/114 FlexCAN_Ip_EnableInterrupts_Privileged/113 FlexCAN_Ip_MainFunctionRead/94 FlexCAN_SetRegDefaultVal/49 FlexCAN_Ip_ConfigEnhancedRxFifo_Privileged/77 FlexCAN_CompleteRxMessageEnhancedFifoData/54 FlexCAN_Ip_RxFifoBlocking/75 FlexCAN_Ip_RxFifo/74
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Calls:
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FlexCAN_GetMsgBuff/140 (FlexCAN_GetMsgBuff) @06fb9540
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: FlexCAN_IRQHandlerTxMB/62 FlexCAN_IRQHandlerRxMB/61
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Calls:
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FlexCAN_LockRxMsgBuff/139 (FlexCAN_LockRxMsgBuff) @06fb9460
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: FlexCAN_IRQHandlerTxMB/62 FlexCAN_IRQHandlerRxMB/61
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Calls:
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OsIf_GetElapsed/138 (OsIf_GetElapsed) @06fb91c0
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: FlexCAN_AbortTxTransfer/67 FlexCAN_Ip_SendBlocking/87 FlexCAN_Ip_SendBlocking/87 FlexCAN_ProccessLegacyRxFIFO/57 FlexCAN_ProccessEnhancedRxFifo/56 FlexCAN_Ip_ReceiveBlocking/73
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Calls:
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OsIf_GetCounter/137 (OsIf_GetCounter) @06fb90e0
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: FlexCAN_AbortTxTransfer/67 FlexCAN_Ip_SendBlocking/87 FlexCAN_Ip_SendBlocking/87 FlexCAN_ProccessLegacyRxFIFO/57 FlexCAN_ProccessEnhancedRxFifo/56 FlexCAN_Ip_ReceiveBlocking/73
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Calls:
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OsIf_MicrosToTicks/136 (OsIf_MicrosToTicks) @06fb9000
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: FlexCAN_AbortTxTransfer/67 FlexCAN_Ip_SendBlocking/87 FlexCAN_Ip_SendBlocking/87 FlexCAN_ProccessLegacyRxFIFO/57 FlexCAN_ProccessEnhancedRxFifo/56 FlexCAN_Ip_ReceiveBlocking/73
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Calls:
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FlexCAN_SetRxMsgBuff/135 (FlexCAN_SetRxMsgBuff) @06fa1b60
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: FlexCAN_Ip_ConfigRxMb/71 FlexCAN_Ip_ConfigRxMb/71 FlexCAN_Ip_ConfigRxMb/71
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Calls:
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FlexCAN_SetTxMsgBuff/134 (FlexCAN_SetTxMsgBuff) @06fa18c0
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: FlexCAN_Ip_ConfigRemoteResponseMb/78 FlexCAN_StartSendData/59
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Calls:
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FlexCAN_IsMbOutOfRange/133 (FlexCAN_IsMbOutOfRange) @06fa17e0
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: FlexCAN_Ip_ConfigRemoteResponseMb/78 FlexCAN_StartRxMessageBufferData/58 FlexCAN_Ip_ConfigRxMb/71 FlexCAN_StartSendData/59
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Calls:
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FlexCAN_SetMsgBuffIntCmd/132 (FlexCAN_SetMsgBuffIntCmd) @06fa1540
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: FlexCAN_IRQHandlerTxMB/62 FlexCAN_IRQHandlerTxMB/62 FlexCAN_Ip_ConfigRemoteResponseMb/78 FlexCAN_CompleteRxMessageFifoData/80 FlexCAN_CompleteRxMessageFifoData/80 FlexCAN_CompleteRxMessageFifoData/80 FlexCAN_ProccessLegacyRxFIFO/57 FlexCAN_ProccessLegacyRxFIFO/57 FlexCAN_ProccessLegacyRxFIFO/57 FlexCAN_StartRxMessageFifoData/60 FlexCAN_StartRxMessageFifoData/60 FlexCAN_StartRxMessageFifoData/60 FlexCAN_IRQHandlerRxMB/61 FlexCAN_IRQHandlerRxMB/61 FlexCAN_Ip_ReceiveBlocking/73 FlexCAN_Ip_ReceiveBlocking/73 FlexCAN_Ip_Receive/72 FlexCAN_Ip_Send/70
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Calls:
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FlexCAN_EnableEnhancedRxFifo/131 (FlexCAN_EnableEnhancedRxFifo) @06656e00
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: FlexCAN_InitRxFifo/52
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Calls:
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FlexCAN_EnableRxFifo/130 (FlexCAN_EnableRxFifo) @06656d20
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: FlexCAN_InitRxFifo/52
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Calls:
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FlexCAN_SetMaxMsgBuffNum/129 (FlexCAN_SetMaxMsgBuffNum) @066567e0
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: FlexCAN_InitController/53
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Calls:
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FlexCAN_SetPayloadSize/128 (FlexCAN_SetPayloadSize) @06656700
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: FlexCAN_InitController/53
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Calls:
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FlexCAN_ConfigCtrlOptions/127 (FlexCAN_ConfigCtrlOptions) @06656620
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: FlexCAN_InitController/53
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Calls:
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FlexCAN_Init/126 (FlexCAN_Init) @06656540
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: FlexCAN_InitController/53
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Calls:
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FlexCAN_Disable/125 (FlexCAN_Disable) @06656460
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: FlexCAN_Ip_SetListenOnlyMode_Privileged/119 FlexCAN_Ip_SetRxMb15Mask_Privileged/118 FlexCAN_Ip_SetRxMb14Mask_Privileged/117 FlexCAN_Ip_SetErrorInt_Privileged/115 FlexCAN_Ip_SetTxArbitrationStartDelay_Privileged/110 FlexCAN_Ip_SetTDCOffset_Privileged/109 FlexCAN_Ip_SetBitrateCbt_Privileged/107 FlexCAN_Ip_GetTDCValue_Privileged/106 FlexCAN_Ip_GetTDCFail_Privileged/105 FlexCAN_Ip_ClearTDCFail_Privileged/104 FlexCAN_Ip_SetBitrate_Privileged/102 FlexCAN_Ip_SetRxMaskType_Privileged/101 FlexCAN_Ip_SetStopMode_Privileged/100 FlexCAN_Ip_Deinit_Privileged/93 FlexCAN_Ip_SetRxFifoGlobalMask_Privileged/92 FlexCAN_Ip_SetRxIndividualMask_Privileged/91 FlexCAN_Ip_SetRxMbGlobalMask_Privileged/88 FlexCAN_Ip_ConfigEnhancedRxFifo_Privileged/77 FlexCAN_Ip_ConfigRxFifo_Privileged/76 FlexCAN_InitController/53 FlexCAN_InitController/53 FlexCAN_InitController/53 FlexCAN_InitController/53
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Calls:
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FlexCAN_EnterFreezeMode/124 (FlexCAN_EnterFreezeMode) @066561c0
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: FlexCAN_Ip_SetStopMode_Privileged/100 FlexCAN_Ip_Deinit_Privileged/93 FlexCAN_Ip_EnterFreezeMode_Privileged/89 FlexCAN_InitController/53 FlexCAN_InitController/53 FlexCAN_InitController/53 FlexCAN_InitController/53 FlexCAN_Ip_Init_Privileged/69
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Calls:
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FlexCAN_SetOperationMode/123 (FlexCAN_SetOperationMode) @066560e0
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: FlexCAN_Ip_Init_Privileged/69
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Calls:
|
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SchM_Exit_Can_CAN_EXCLUSIVE_AREA_00/122 (SchM_Exit_Can_CAN_EXCLUSIVE_AREA_00) @06656000
|
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Type: function
|
|
Visibility: external public
|
|
References:
|
|
Referring:
|
|
Availability: not_available
|
|
Function flags: optimize_size
|
|
Called by: FlexCAN_InitController/53 FlexCAN_Ip_Init_Privileged/69 FlexCAN_Ip_Init_Privileged/69
|
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Calls:
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SchM_Enter_Can_CAN_EXCLUSIVE_AREA_00/121 (SchM_Enter_Can_CAN_EXCLUSIVE_AREA_00) @06f85e00
|
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Type: function
|
|
Visibility: external public
|
|
References:
|
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Referring:
|
|
Availability: not_available
|
|
Function flags: optimize_size
|
|
Called by: FlexCAN_InitController/53 FlexCAN_Ip_Init_Privileged/69 FlexCAN_Ip_Init_Privileged/69
|
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Calls:
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FlexCAN_Ip_GetListenOnlyMode/120 (FlexCAN_Ip_GetListenOnlyMode) @06f850e0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: g_Flexcan_Ip_aBase/50 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: body optimize_size
|
|
Called by:
|
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Calls: FlexCAN_IsListenOnlyModeEnabled/28
|
|
FlexCAN_Ip_SetListenOnlyMode_Privileged/119 (FlexCAN_Ip_SetListenOnlyMode_Privileged) @06f85d20
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: g_Flexcan_Ip_aBase/50 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: body optimize_size
|
|
Called by:
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Calls: FlexCAN_Disable/125 FlexCAN_SetListenOnlyMode/7 FlexCAN_IsFreezeMode/41 FlexCAN_Enable/144 FlexCAN_IsEnabled/4 DevAssert/0
|
|
FlexCAN_Ip_SetRxMb15Mask_Privileged/118 (FlexCAN_Ip_SetRxMb15Mask_Privileged) @06f85a80
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: g_Flexcan_Ip_aBase/50 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: body optimize_size
|
|
Called by:
|
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Calls: FlexCAN_Disable/125 FlexCAN_IsFreezeMode/41 FlexCAN_Enable/144 FlexCAN_IsEnabled/4 DevAssert/0
|
|
FlexCAN_Ip_SetRxMb14Mask_Privileged/117 (FlexCAN_Ip_SetRxMb14Mask_Privileged) @06f857e0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: g_Flexcan_Ip_aBase/50 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: body optimize_size
|
|
Called by:
|
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Calls: FlexCAN_Disable/125 FlexCAN_IsFreezeMode/41 FlexCAN_Enable/144 FlexCAN_IsEnabled/4 DevAssert/0
|
|
FlexCAN_Ip_AbortTransfer/116 (FlexCAN_Ip_AbortTransfer) @06f85540
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: g_Flexcan_Ip_aBase/50 (read)g_flexcan_Ip_StatePtr/51 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: body optimize_size
|
|
Called by:
|
|
Calls: FlexCAN_AbortRxTransfer/68 FlexCAN_AbortTxTransfer/67 FLEXCAN_ClearMsgBuffIntCmd/162 DevAssert/0 DevAssert/0
|
|
FlexCAN_Ip_SetErrorInt_Privileged/115 (FlexCAN_Ip_SetErrorInt_Privileged) @06f852a0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: g_Flexcan_Ip_aBase/50 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: body optimize_size
|
|
Called by:
|
|
Calls: FlexCAN_Disable/125 DevAssert/0 FlexCAN_SetErrIntCmd/161 FlexCAN_IsFreezeMode/41 FlexCAN_SetErrIntCmd/161 FlexCAN_IsFreezeMode/41 FlexCAN_SetErrIntCmd/161 FlexCAN_SetErrIntCmd/161 FlexCAN_SetErrIntCmd/161 FlexCAN_Enable/144 FlexCAN_IsEnabled/4 DevAssert/0
|
|
FlexCAN_Ip_DisableInterrupts_Privileged/114 (FlexCAN_Ip_DisableInterrupts_Privileged) @06f85000
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: g_Flexcan_Ip_aBase/50 (read)g_flexcan_Ip_StatePtr/51 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: body optimize_size
|
|
Called by:
|
|
Calls: FlexCAN_SetEnhancedRxFifoIntAll/45 FlexCAN_IsEnhancedRxFifoEnabled/44 FlexCAN_IsEnhancedRxFifoAvailable/141 FlexCAN_DisableInterrupts/160 FlexCAN_IsEnabled/4 DevAssert/0
|
|
FlexCAN_Ip_EnableInterrupts_Privileged/113 (FlexCAN_Ip_EnableInterrupts_Privileged) @06f78b60
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: g_Flexcan_Ip_aBase/50 (read)g_flexcan_Ip_StatePtr/51 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: body optimize_size
|
|
Called by:
|
|
Calls: FlexCAN_SetEnhancedRxFifoIntAll/45 FlexCAN_IsEnhancedRxFifoEnabled/44 FlexCAN_IsEnhancedRxFifoAvailable/141 FlexCAN_EnableInterrupts/159 FlexCAN_IsEnabled/4 DevAssert/0
|
|
FlexCAN_Ip_ClearBuffStatusFlag/112 (FlexCAN_Ip_ClearBuffStatusFlag) @06f78620
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: g_Flexcan_Ip_aBase/50 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: body optimize_size
|
|
Called by:
|
|
Calls: FlexCAN_ClearMsgBuffIntStatusFlag/9 FlexCAN_ClearEnhancedRxFifoIntStatusFlag/47 DevAssert/0
|
|
FlexCAN_Ip_GetBuffStatusFlag/111 (FlexCAN_Ip_GetBuffStatusFlag) @06f780e0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: g_Flexcan_Ip_aBase/50 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: body optimize_size
|
|
Called by:
|
|
Calls: FlexCAN_GetBuffStatusFlag/10 FlexCAN_GetEnhancedRxFIFOStatusFlag/46 DevAssert/0
|
|
FlexCAN_Ip_SetTxArbitrationStartDelay_Privileged/110 (FlexCAN_Ip_SetTxArbitrationStartDelay_Privileged) @06f78d20
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: g_Flexcan_Ip_aBase/50 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: body optimize_size
|
|
Called by:
|
|
Calls: FlexCAN_Disable/125 SchM_Exit_Can_CAN_EXCLUSIVE_AREA_17/158 FlexCAN_SetTxArbitrationStartDelay/42 SchM_Enter_Can_CAN_EXCLUSIVE_AREA_17/157 FlexCAN_IsFreezeMode/41 FlexCAN_Enable/144 FlexCAN_IsEnabled/4 DevAssert/0
|
|
FlexCAN_Ip_SetTDCOffset_Privileged/109 (FlexCAN_Ip_SetTDCOffset_Privileged) @06f78a80
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: g_Flexcan_Ip_aBase/50 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: body optimize_size
|
|
Called by:
|
|
Calls: FlexCAN_Disable/125 SchM_Exit_Can_CAN_EXCLUSIVE_AREA_16/156 FlexCAN_SetTDCOffset/2 FlexCAN_SetEnhancedTDCOffset/3 SchM_Enter_Can_CAN_EXCLUSIVE_AREA_16/155 FlexCAN_IsFreezeMode/41 FlexCAN_Enable/144 FlexCAN_IsEnabled/4 DevAssert/0
|
|
FlexCAN_Ip_GetBitrateFD/108 (FlexCAN_Ip_GetBitrateFD) @06f787e0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: g_Flexcan_Ip_aBase/50 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: body optimize_size
|
|
Called by:
|
|
Calls: FlexCAN_GetFDTimeSegments/21 FlexCAN_GetEnhancedDataTimeSegments/18 FlexCAN_IsEnhCbtEnabled/23 DevAssert/0 DevAssert/0
|
|
FlexCAN_Ip_SetBitrateCbt_Privileged/107 (FlexCAN_Ip_SetBitrateCbt_Privileged) @06f78540
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: g_Flexcan_Ip_aBase/50 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: body optimize_size
|
|
Called by:
|
|
Calls: FlexCAN_Disable/125 SchM_Exit_Can_CAN_EXCLUSIVE_AREA_15/154 FlexCAN_SetFDTimeSegments/12 FlexCAN_SetEnhancedDataTimeSegments/17 FlexCAN_SetFDEnabled/6 SchM_Enter_Can_CAN_EXCLUSIVE_AREA_15/153 FlexCAN_IsEnhCbtEnabled/23 FlexCAN_IsFreezeMode/41 FlexCAN_Enable/144 FlexCAN_IsFDEnabled/27 FlexCAN_IsEnabled/4 DevAssert/0 DevAssert/0
|
|
FlexCAN_Ip_GetTDCValue_Privileged/106 (FlexCAN_Ip_GetTDCValue_Privileged) @06f782a0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: g_Flexcan_Ip_aBase/50 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: body optimize_size
|
|
Called by:
|
|
Calls: FlexCAN_Disable/125 FlexCAN_IsEnhCbtEnabled/23 FlexCAN_Enable/144 FlexCAN_IsEnabled/4 DevAssert/0
|
|
FlexCAN_Ip_GetTDCFail_Privileged/105 (FlexCAN_Ip_GetTDCFail_Privileged) @06f78000
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: g_Flexcan_Ip_aBase/50 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: body optimize_size
|
|
Called by:
|
|
Calls: FlexCAN_Disable/125 FlexCAN_IsEnhCbtEnabled/23 FlexCAN_Enable/144 FlexCAN_IsEnabled/4 DevAssert/0
|
|
FlexCAN_Ip_ClearTDCFail_Privileged/104 (FlexCAN_Ip_ClearTDCFail_Privileged) @06f6bb60
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: g_Flexcan_Ip_aBase/50 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: body optimize_size
|
|
Called by:
|
|
Calls: FlexCAN_Disable/125 FlexCAN_IsEnhCbtEnabled/23 FlexCAN_Enable/144 FlexCAN_IsEnabled/4 DevAssert/0
|
|
FlexCAN_Ip_GetBitrate/103 (FlexCAN_Ip_GetBitrate) @06f6b620
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: g_Flexcan_Ip_aBase/50 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: body optimize_size
|
|
Called by:
|
|
Calls: FlexCAN_GetTimeSegments/20 FlexCAN_GetExtendedTimeSegments/19 FlexCAN_IsExCbtEnabled/22 FlexCAN_GetEnhancedNominalTimeSegments/16 FlexCAN_IsEnhCbtEnabled/23 DevAssert/0 DevAssert/0
|
|
FlexCAN_Ip_SetBitrate_Privileged/102 (FlexCAN_Ip_SetBitrate_Privileged) @06f6b0e0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: g_Flexcan_Ip_aBase/50 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: body optimize_size
|
|
Called by:
|
|
Calls: FlexCAN_Disable/125 SchM_Exit_Can_CAN_EXCLUSIVE_AREA_14/152 FlexCAN_SetTimeSegments/13 FlexCAN_SetExtendedTimeSegments/14 FlexCAN_IsExCbtEnabled/22 FlexCAN_SetEnhancedNominalTimeSegments/15 FlexCAN_EnhCbtEnable/25 SchM_Enter_Can_CAN_EXCLUSIVE_AREA_14/151 FlexCAN_IsFreezeMode/41 FlexCAN_Enable/144 FlexCAN_IsEnabled/4 DevAssert/0 DevAssert/0
|
|
FlexCAN_Ip_SetRxMaskType_Privileged/101 (FlexCAN_Ip_SetRxMaskType_Privileged) @06f6bd20
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: g_Flexcan_Ip_aBase/50 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: body optimize_size
|
|
Called by:
|
|
Calls: FlexCAN_Disable/125 FlexCAN_SetRxMaskType/43 FlexCAN_IsFreezeMode/41 FlexCAN_Enable/144 FlexCAN_IsEnabled/4 DevAssert/0
|
|
FlexCAN_Ip_SetStopMode_Privileged/100 (FlexCAN_Ip_SetStopMode_Privileged) @06f6ba80
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: g_Flexcan_Ip_aBase/50 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: body optimize_size
|
|
Called by:
|
|
Calls: FlexCAN_Disable/125 FlexCAN_EnterFreezeMode/124 DevAssert/0
|
|
FlexCAN_Ip_SetStartMode_Privileged/99 (FlexCAN_Ip_SetStartMode_Privileged) @06f6b7e0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: g_Flexcan_Ip_aBase/50 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: body optimize_size
|
|
Called by:
|
|
Calls: FlexCAN_ExitFreezeMode/149 DevAssert/0
|
|
FlexCAN_Ip_GetStartMode_Privileged/98 (FlexCAN_Ip_GetStartMode_Privileged) @06f6b540
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: g_Flexcan_Ip_aBase/50 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: body optimize_size
|
|
Called by:
|
|
Calls:
|
|
FlexCAN_Ip_GetStopMode_Privileged/97 (FlexCAN_Ip_GetStopMode_Privileged) @06f6b2a0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: g_Flexcan_Ip_aBase/50 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: body optimize_size
|
|
Called by:
|
|
Calls:
|
|
FlexCAN_Ip_MainFunctionWrite/96 (FlexCAN_Ip_MainFunctionWrite) @06f6b000
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: g_Flexcan_Ip_aBase/50 (read)g_flexcan_Ip_StatePtr/51 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: body optimize_size
|
|
Called by:
|
|
Calls: FlexCAN_ClearMsgBuffIntStatusFlag/9 FlexCAN_UnlockRxMsgBuff/8 FlexCAN_GetMsgBuffTimestamp/147 FlexCAN_GetBuffStatusFlag/10 DevAssert/0
|
|
FlexCAN_Ip_MainFunctionBusOff_Privileged/95 (FlexCAN_Ip_MainFunctionBusOff_Privileged) @06f5eb60
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: g_Flexcan_Ip_aBase/50 (read)g_flexcan_Ip_StatePtr/51 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: body optimize_size
|
|
Called by:
|
|
Calls: DevAssert/0
|
|
Indirect call
|
|
FlexCAN_Ip_MainFunctionRead/94 (FlexCAN_Ip_MainFunctionRead) @06f5e620
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: g_Flexcan_Ip_aBase/50 (read)g_flexcan_Ip_StatePtr/51 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: body optimize_size
|
|
Called by:
|
|
Calls: FlexCAN_IRQHandlerRxMB/61 FlexCAN_GetBuffStatusFlag/10 FlexCAN_IRQHandlerRxFIFO/63 FlexCAN_GetBuffStatusFlag/10 FlexCAN_IRQHandlerEnhancedRxFIFO/66 FlexCAN_GetEnhancedRxFIFOStatusFlag/46 FlexCAN_IsEnhancedRxFifoEnabled/44 FlexCAN_IsEnhancedRxFifoAvailable/141 DevAssert/0 DevAssert/0
|
|
FlexCAN_Ip_Deinit_Privileged/93 (FlexCAN_Ip_Deinit_Privileged) @06f5e0e0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: g_Flexcan_Ip_aBase/50 (read)g_flexcan_Ip_StatePtr/51 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: body optimize_size
|
|
Called by:
|
|
Calls: FlexCAN_Disable/125 FlexCAN_SetRegDefaultVal/49 FlexCAN_EnterFreezeMode/124 DevAssert/0
|
|
FlexCAN_Ip_SetRxFifoGlobalMask_Privileged/92 (FlexCAN_Ip_SetRxFifoGlobalMask_Privileged) @06f5ed20
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: g_Flexcan_Ip_aBase/50 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: body optimize_size
|
|
Called by:
|
|
Calls: FlexCAN_Disable/125 FlexCAN_SetRxFifoGlobalMask/1 FlexCAN_IsFreezeMode/41 FlexCAN_Enable/144 FlexCAN_IsEnabled/4 DevAssert/0
|
|
FlexCAN_Ip_SetRxIndividualMask_Privileged/91 (FlexCAN_Ip_SetRxIndividualMask_Privileged) @06f5ea80
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: g_Flexcan_Ip_aBase/50 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: body optimize_size
|
|
Called by:
|
|
Calls: FlexCAN_Disable/125 FlexCAN_SetRxIndividualMask/40 FlexCAN_IsFreezeMode/41 FlexCAN_Enable/144 FlexCAN_IsEnabled/4 DevAssert/0
|
|
FlexCAN_Ip_ExitFreezeMode_Privileged/90 (FlexCAN_Ip_ExitFreezeMode_Privileged) @06f5e7e0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: g_Flexcan_Ip_aBase/50 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: body optimize_size
|
|
Called by:
|
|
Calls: FlexCAN_ExitFreezeMode/149
|
|
FlexCAN_Ip_EnterFreezeMode_Privileged/89 (FlexCAN_Ip_EnterFreezeMode_Privileged) @06f5e540
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: g_Flexcan_Ip_aBase/50 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: body optimize_size
|
|
Called by:
|
|
Calls: FlexCAN_EnterFreezeMode/124
|
|
FlexCAN_Ip_SetRxMbGlobalMask_Privileged/88 (FlexCAN_Ip_SetRxMbGlobalMask_Privileged) @06f5e2a0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: g_Flexcan_Ip_aBase/50 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: body optimize_size
|
|
Called by:
|
|
Calls: FlexCAN_Disable/125 FlexCAN_SetRxMsgBuffGlobalMask/39 FlexCAN_IsFreezeMode/41 FlexCAN_Enable/144 FlexCAN_IsEnabled/4 DevAssert/0
|
|
FlexCAN_Ip_SendBlocking/87 (FlexCAN_Ip_SendBlocking) @06f5e000
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: g_Flexcan_Ip_aBase/50 (read)g_flexcan_Ip_StatePtr/51 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: body optimize_size
|
|
Called by:
|
|
Calls: FlexCAN_ClearMsgBuffIntStatusFlag/9 FlexCAN_GetBuffStatusFlag/10 OsIf_GetElapsed/138 OsIf_GetCounter/137 OsIf_MicrosToTicks/136 FlexCAN_GetMsgBuffRegion/148 FlexCAN_ClearMsgBuffIntStatusFlag/9 FlexCAN_GetBuffStatusFlag/10 OsIf_GetElapsed/138 FlexCAN_StartSendData/59 DevAssert/0 DevAssert/0 OsIf_MicrosToTicks/136 OsIf_GetCounter/137
|
|
FlexCAN_Busoff_Error_IRQHandler/86 (FlexCAN_Busoff_Error_IRQHandler) @06f4db60
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: g_Flexcan_Ip_aBase/50 (read)g_flexcan_Ip_StatePtr/51 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: body optimize_size
|
|
Called by:
|
|
Calls: DevAssert/0
|
|
Indirect call
|
|
Indirect call
|
|
Indirect call
|
|
Indirect call
|
|
Indirect call
|
|
FlexCAN_Ip_GetControllerRxErrorCounter/85 (FlexCAN_Ip_GetControllerRxErrorCounter) @06f4d620
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: g_Flexcan_Ip_aBase/50 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: body optimize_size
|
|
Called by:
|
|
Calls: DevAssert/0
|
|
FlexCAN_Ip_GetControllerTxErrorCounter/84 (FlexCAN_Ip_GetControllerTxErrorCounter) @06f4d0e0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: g_Flexcan_Ip_aBase/50 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: body optimize_size
|
|
Called by:
|
|
Calls: DevAssert/0
|
|
FlexCAN_Ip_GetErrorStatus/83 (FlexCAN_Ip_GetErrorStatus) @06f4dd20
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: g_Flexcan_Ip_aBase/50 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: body optimize_size
|
|
Called by:
|
|
Calls: DevAssert/0
|
|
FlexCAN_Ip_ClearErrorStatus/82 (FlexCAN_Ip_ClearErrorStatus) @06f4da80
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: g_Flexcan_Ip_aBase/50 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: body optimize_size
|
|
Called by:
|
|
Calls: DevAssert/0
|
|
FlexCAN_IRQHandler/81 (FlexCAN_IRQHandler) @06f4d7e0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: g_Flexcan_Ip_aBase/50 (read)g_flexcan_Ip_StatePtr/51 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: body optimize_size
|
|
Called by:
|
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Calls: FlexCAN_ClearEnhancedRxFifoIntStatusFlag/47 FlexCAN_ClearEnhancedRxFifoIntStatusFlag/47 FlexCAN_ClearEnhancedRxFifoIntStatusFlag/47 FlexCAN_ClearEnhancedRxFifoIntStatusFlag/47 FlexCAN_ClearMsgBuffIntStatusFlag/9 FlexCAN_ProcessSpuriousInterruptMB/64 FlexCAN_ProcessIRQHandlerEnhancedRxFIFO/65 FlexCAN_IsEnhancedRxFifoEnabled/44 FlexCAN_ClearMsgBuffIntStatusFlag/9 FlexCAN_GetMsgBuffIntStatusFlag/36 FlexCAN_IRQHandlerTxMB/62 FlexCAN_IRQHandlerRxMB/61 FlexCAN_IRQHandlerRxFIFO/63 FlexCAN_GetMsgBuffIntStatusFlag/36 FlexCAN_GetMsgBuffIntStatusFlag/36 DevAssert/0 DevAssert/0
|
|
FlexCAN_CompleteRxMessageFifoData/80 (FlexCAN_CompleteRxMessageFifoData) @06f4d540
|
|
Type: function definition analyzed
|
|
Visibility: prevailing_def_ironly
|
|
References: g_Flexcan_Ip_aBase/50 (read)g_flexcan_Ip_StatePtr/51 (read)
|
|
Referring:
|
|
Availability: local
|
|
Function flags: body local optimize_size
|
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Called by: FlexCAN_IRQHandlerRxFIFO/63
|
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Calls: FlexCAN_SetMsgBuffIntCmd/132 FlexCAN_SetMsgBuffIntCmd/132 FlexCAN_SetMsgBuffIntCmd/132 DevAssert/0
|
|
FlexCAN_Ip_GetTransferStatus/79 (FlexCAN_Ip_GetTransferStatus) @06f4d2a0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: g_flexcan_Ip_StatePtr/51 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: body optimize_size
|
|
Called by:
|
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Calls: DevAssert/0 DevAssert/0
|
|
FlexCAN_Ip_ConfigRemoteResponseMb/78 (FlexCAN_Ip_ConfigRemoteResponseMb) @06f4d000
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: g_Flexcan_Ip_aBase/50 (read)g_flexcan_Ip_StatePtr/51 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: body optimize_size
|
|
Called by:
|
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Calls: FlexCAN_SetMsgBuffIntCmd/132 FlexCAN_SetTxMsgBuff/134 FlexCAN_ClearMsgBuffIntStatusFlag/9 FlexCAN_IsMbOutOfRange/133 DevAssert/0 DevAssert/0
|
|
FlexCAN_Ip_ConfigEnhancedRxFifo_Privileged/77 (FlexCAN_Ip_ConfigEnhancedRxFifo_Privileged) @06f3db60
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: g_Flexcan_Ip_aBase/50 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: body optimize_size
|
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Called by:
|
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Calls: FlexCAN_Disable/125 FlexCAN_SetEnhancedRxFifoFilter/146 FlexCAN_IsFreezeMode/41 FlexCAN_Enable/144 DevAssert/0 DevAssert/0 FlexCAN_IsEnhancedRxFifoAvailable/141 DevAssert/0 FlexCAN_IsEnabled/4
|
|
FlexCAN_Ip_ConfigRxFifo_Privileged/76 (FlexCAN_Ip_ConfigRxFifo_Privileged) @06f3d620
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: g_Flexcan_Ip_aBase/50 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: body optimize_size
|
|
Called by:
|
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Calls: FlexCAN_Disable/125 FlexCAN_SetRxFifoFilter/145 FlexCAN_IsFreezeMode/41 FlexCAN_Enable/144 FlexCAN_IsEnabled/4 DevAssert/0
|
|
FlexCAN_Ip_RxFifoBlocking/75 (FlexCAN_Ip_RxFifoBlocking) @06f3d0e0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: g_Flexcan_Ip_aBase/50 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: body optimize_size
|
|
Called by:
|
|
Calls: FlexCAN_ProccessLegacyRxFIFO/57 FlexCAN_StartRxMessageFifoData/60 FlexCAN_ProccessLegacyRxFIFO/57 FlexCAN_StartRxMessageFifoData/60 FlexCAN_ProccessEnhancedRxFifo/56 FlexCAN_StartRxMessageEnhancedFifoData/55 FlexCAN_IsEnhancedRxFifoEnabled/44 FlexCAN_IsEnhancedRxFifoAvailable/141 DevAssert/0
|
|
FlexCAN_Ip_RxFifo/74 (FlexCAN_Ip_RxFifo) @06f3dd20
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: g_Flexcan_Ip_aBase/50 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: body optimize_size
|
|
Called by:
|
|
Calls: FlexCAN_StartRxMessageFifoData/60 FlexCAN_StartRxMessageFifoData/60 FlexCAN_StartRxMessageEnhancedFifoData/55 FlexCAN_IsEnhancedRxFifoEnabled/44 FlexCAN_IsEnhancedRxFifoAvailable/141 DevAssert/0
|
|
FlexCAN_Ip_ReceiveBlocking/73 (FlexCAN_Ip_ReceiveBlocking) @06f3da80
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: g_flexcan_Ip_StatePtr/51 (read)g_Flexcan_Ip_aBase/50 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: body optimize_size
|
|
Called by:
|
|
Calls: FlexCAN_SetMsgBuffIntCmd/132 OsIf_GetElapsed/138 FlexCAN_IRQHandlerRxMB/61 FlexCAN_GetBuffStatusFlag/10 OsIf_GetCounter/137 FlexCAN_SetMsgBuffIntCmd/132 FlexCAN_StartRxMessageBufferData/58 DevAssert/0 OsIf_MicrosToTicks/136
|
|
FlexCAN_Ip_Receive/72 (FlexCAN_Ip_Receive) @06f3d7e0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: g_Flexcan_Ip_aBase/50 (read)g_flexcan_Ip_StatePtr/51 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: body optimize_size
|
|
Called by:
|
|
Calls: FlexCAN_SetMsgBuffIntCmd/132 FlexCAN_StartRxMessageBufferData/58 DevAssert/0
|
|
FlexCAN_Ip_ConfigRxMb/71 (FlexCAN_Ip_ConfigRxMb) @06f3d540
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: g_Flexcan_Ip_aBase/50 (read)g_flexcan_Ip_StatePtr/51 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: body optimize_size
|
|
Called by:
|
|
Calls: FlexCAN_SetRxMsgBuff/135 FlexCAN_SetRxMsgBuff/135 FlexCAN_SetRxMsgBuff/135 FlexCAN_ClearMsgBuffIntStatusFlag/9 FlexCAN_IsMbOutOfRange/133 DevAssert/0 DevAssert/0
|
|
FlexCAN_Ip_Send/70 (FlexCAN_Ip_Send) @06f3d2a0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: g_Flexcan_Ip_aBase/50 (read)g_flexcan_Ip_StatePtr/51 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: body optimize_size
|
|
Called by:
|
|
Calls: FlexCAN_SetMsgBuffIntCmd/132 FlexCAN_StartSendData/59 FlexCAN_IsListenOnlyModeEnabled/28 DevAssert/0 DevAssert/0
|
|
FlexCAN_Ip_Init_Privileged/69 (FlexCAN_Ip_Init_Privileged) @06f3d000
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: g_Flexcan_Ip_aBase/50 (read)g_flexcan_Ip_StatePtr/51 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: body optimize_size
|
|
Called by:
|
|
Calls: FlexCAN_EnterFreezeMode/124 FlexCAN_SetOperationMode/123 SchM_Exit_Can_CAN_EXCLUSIVE_AREA_00/122 FlexCAN_SetTimeSegments/13 FlexCAN_SetFDTimeSegments/12 FlexCAN_SetExtendedTimeSegments/14 SchM_Enter_Can_CAN_EXCLUSIVE_AREA_00/121 SchM_Exit_Can_CAN_EXCLUSIVE_AREA_00/122 FlexCAN_SetEnhancedDataTimeSegments/17 FlexCAN_SetEnhancedNominalTimeSegments/15 SchM_Enter_Can_CAN_EXCLUSIVE_AREA_00/121 FlexCAN_EnableExtCbt/24 FlexCAN_InitController/53 DevAssert/0 DevAssert/0
|
|
FlexCAN_AbortRxTransfer/68 (FlexCAN_AbortRxTransfer) @06f22b60
|
|
Type: function definition analyzed
|
|
Visibility: prevailing_def_ironly
|
|
References: g_Flexcan_Ip_aBase/50 (read)g_flexcan_Ip_StatePtr/51 (read)
|
|
Referring:
|
|
Availability: local
|
|
Function flags: body local optimize_size
|
|
Called by: FlexCAN_Ip_AbortTransfer/116
|
|
Calls: FlexCAN_ClearMsgBuffIntStatusFlag/9 FlexCAN_GetMsgBuffRegion/148 FLEXCAN_ClearMsgBuffIntCmd/162 FlexCAN_GetMsgBuffRegion/148 RxFifoOcuppiedLastMsgBuff/29
|
|
FlexCAN_AbortTxTransfer/67 (FlexCAN_AbortTxTransfer) @06f22620
|
|
Type: function definition analyzed
|
|
Visibility: prevailing_def_ironly
|
|
References: g_Flexcan_Ip_aBase/50 (read)g_flexcan_Ip_StatePtr/51 (read)
|
|
Referring:
|
|
Availability: local
|
|
Function flags: body local optimize_size
|
|
Called by: FlexCAN_Ip_AbortTransfer/116
|
|
Calls: FlexCAN_ClearMsgBuffIntStatusFlag/9 FlexCAN_GetBuffStatusFlag/10 OsIf_GetElapsed/138 OsIf_GetCounter/137 OsIf_MicrosToTicks/136 FlexCAN_GetMsgBuffRegion/148
|
|
FlexCAN_IRQHandlerEnhancedRxFIFO/66 (FlexCAN_IRQHandlerEnhancedRxFIFO) @06f220e0
|
|
Type: function definition analyzed
|
|
Visibility: prevailing_def_ironly
|
|
References: g_Flexcan_Ip_aBase/50 (read)g_flexcan_Ip_StatePtr/51 (read)
|
|
Referring:
|
|
Availability: local
|
|
Function flags: body local optimize_size
|
|
Called by: FlexCAN_Ip_MainFunctionRead/94 FlexCAN_ProcessIRQHandlerEnhancedRxFIFO/65 FlexCAN_ProccessEnhancedRxFifo/56
|
|
Calls: FlexCAN_ClearEnhancedRxFifoIntStatusFlag/47 FlexCAN_ClearEnhancedRxFifoIntStatusFlag/47 FlexCAN_ClearEnhancedRxFifoIntStatusFlag/47 FlexCAN_CompleteRxMessageEnhancedFifoData/54 FlexCAN_ClearEnhancedRxFifoIntStatusFlag/47 FlexCAN_ClearEnhancedRxFifoIntStatusFlag/47 FlexCAN_ClearEnhancedRxFifoIntStatusFlag/47 FlexCAN_ReadEnhancedRxFifo/142
|
|
Indirect call
|
|
Indirect call
|
|
Indirect call
|
|
Indirect call
|
|
FlexCAN_ProcessIRQHandlerEnhancedRxFIFO/65 (FlexCAN_ProcessIRQHandlerEnhancedRxFIFO) @06f22d20
|
|
Type: function definition analyzed
|
|
Visibility: prevailing_def_ironly
|
|
References: g_Flexcan_Ip_aBase/50 (read)g_flexcan_Ip_StatePtr/51 (read)
|
|
Referring:
|
|
Availability: local
|
|
Function flags: body local optimize_size
|
|
Called by: FlexCAN_IRQHandler/81
|
|
Calls: FlexCAN_ClearEnhancedRxFifoIntStatusFlag/47 FlexCAN_IRQHandlerEnhancedRxFIFO/66 FlexCAN_GetEnhancedRxFIFOIntStatusFlag/48 FlexCAN_GetEnhancedRxFIFOStatusFlag/46
|
|
FlexCAN_ProcessSpuriousInterruptMB/64 (FlexCAN_ProcessSpuriousInterruptMB) @06f22a80
|
|
Type: function definition analyzed
|
|
Visibility: prevailing_def_ironly
|
|
References: g_Flexcan_Ip_aBase/50 (read)g_flexcan_Ip_StatePtr/51 (read)
|
|
Referring:
|
|
Availability: local
|
|
Function flags: body local optimize_size
|
|
Called by: FlexCAN_IRQHandler/81
|
|
Calls: FlexCAN_ClearMsgBuffIntStatusFlag/9 FlexCAN_GetBuffStatusImask/11 FlexCAN_GetBuffStatusFlag/10
|
|
FlexCAN_IRQHandlerRxFIFO/63 (FlexCAN_IRQHandlerRxFIFO) @06f227e0
|
|
Type: function definition analyzed
|
|
Visibility: prevailing_def_ironly
|
|
References: g_Flexcan_Ip_aBase/50 (read)g_flexcan_Ip_StatePtr/51 (read)
|
|
Referring:
|
|
Availability: local
|
|
Function flags: body local optimize_size
|
|
Called by: FlexCAN_Ip_MainFunctionRead/94 FlexCAN_IRQHandler/81 FlexCAN_ProccessLegacyRxFIFO/57
|
|
Calls: FlexCAN_ClearMsgBuffIntStatusFlag/9 FlexCAN_ClearMsgBuffIntStatusFlag/9 FlexCAN_CompleteRxMessageFifoData/80 FlexCAN_ClearMsgBuffIntStatusFlag/9 FlexCAN_ReadRxFifo/143
|
|
Indirect call
|
|
Indirect call
|
|
Indirect call
|
|
FlexCAN_IRQHandlerTxMB/62 (FlexCAN_IRQHandlerTxMB) @06f22540
|
|
Type: function definition analyzed
|
|
Visibility: prevailing_def_ironly
|
|
References: g_Flexcan_Ip_aBase/50 (read)g_flexcan_Ip_StatePtr/51 (read)
|
|
Referring:
|
|
Availability: local
|
|
Function flags: body local optimize_size
|
|
Called by: FlexCAN_IRQHandler/81
|
|
Calls: FlexCAN_SetMsgBuffIntCmd/132 FlexCAN_SetMsgBuffIntCmd/132 FlexCAN_ClearMsgBuffIntStatusFlag/9 FlexCAN_UnlockRxMsgBuff/8 FlexCAN_GetMsgBuffTimestamp/147 FlexCAN_ClearMsgBuffIntStatusFlag/9 FlexCAN_UnlockRxMsgBuff/8 FlexCAN_GetMsgBuff/140 FlexCAN_LockRxMsgBuff/139
|
|
Indirect call
|
|
FlexCAN_IRQHandlerRxMB/61 (FlexCAN_IRQHandlerRxMB) @06f222a0
|
|
Type: function definition analyzed
|
|
Visibility: prevailing_def_ironly
|
|
References: g_Flexcan_Ip_aBase/50 (read)g_flexcan_Ip_StatePtr/51 (read)
|
|
Referring:
|
|
Availability: local
|
|
Function flags: body local optimize_size
|
|
Called by: FlexCAN_Ip_MainFunctionRead/94 FlexCAN_IRQHandler/81 FlexCAN_Ip_ReceiveBlocking/73
|
|
Calls: FlexCAN_SetMsgBuffIntCmd/132 FlexCAN_SetMsgBuffIntCmd/132 FlexCAN_UnlockRxMsgBuff/8 FlexCAN_ClearMsgBuffIntStatusFlag/9 FlexCAN_GetMsgBuff/140 FlexCAN_LockRxMsgBuff/139
|
|
Indirect call
|
|
FlexCAN_StartRxMessageFifoData/60 (FlexCAN_StartRxMessageFifoData) @06f22000
|
|
Type: function definition analyzed
|
|
Visibility: prevailing_def_ironly
|
|
References: g_Flexcan_Ip_aBase/50 (read)g_flexcan_Ip_StatePtr/51 (read)
|
|
Referring:
|
|
Availability: local
|
|
Function flags: body local optimize_size
|
|
Called by: FlexCAN_Ip_RxFifoBlocking/75 FlexCAN_Ip_RxFifoBlocking/75 FlexCAN_Ip_RxFifo/74 FlexCAN_Ip_RxFifo/74
|
|
Calls: FlexCAN_SetMsgBuffIntCmd/132 FlexCAN_SetMsgBuffIntCmd/132 FlexCAN_SetMsgBuffIntCmd/132 DevAssert/0
|
|
FlexCAN_StartSendData/59 (FlexCAN_StartSendData) @06b82b60
|
|
Type: function definition analyzed
|
|
Visibility: prevailing_def_ironly
|
|
References: g_flexcan_Ip_StatePtr/51 (read)g_Flexcan_Ip_aBase/50 (read)
|
|
Referring:
|
|
Availability: local
|
|
Function flags: body local optimize_size
|
|
Called by: FlexCAN_Ip_SendBlocking/87 FlexCAN_Ip_Send/70
|
|
Calls: FlexCAN_SetTxMsgBuff/134 FlexCAN_ClearMsgBuffIntStatusFlag/9 FlexCAN_IsMbOutOfRange/133 DevAssert/0 DevAssert/0
|
|
FlexCAN_StartRxMessageBufferData/58 (FlexCAN_StartRxMessageBufferData) @06b82620
|
|
Type: function definition analyzed
|
|
Visibility: prevailing_def_ironly
|
|
References: g_Flexcan_Ip_aBase/50 (read)g_flexcan_Ip_StatePtr/51 (read)
|
|
Referring:
|
|
Availability: local
|
|
Function flags: body local optimize_size
|
|
Called by: FlexCAN_Ip_ReceiveBlocking/73 FlexCAN_Ip_Receive/72
|
|
Calls: FlexCAN_IsMbOutOfRange/133 DevAssert/0
|
|
FlexCAN_ProccessLegacyRxFIFO/57 (FlexCAN_ProccessLegacyRxFIFO) @06b820e0
|
|
Type: function definition analyzed
|
|
Visibility: prevailing_def_ironly
|
|
References: g_flexcan_Ip_StatePtr/51 (read)g_Flexcan_Ip_aBase/50 (read)
|
|
Referring:
|
|
Availability: local
|
|
Function flags: body local optimize_size
|
|
Called by: FlexCAN_Ip_RxFifoBlocking/75 FlexCAN_Ip_RxFifoBlocking/75
|
|
Calls: FlexCAN_SetMsgBuffIntCmd/132 FlexCAN_SetMsgBuffIntCmd/132 FlexCAN_SetMsgBuffIntCmd/132 OsIf_GetElapsed/138 FlexCAN_IRQHandlerRxFIFO/63 FlexCAN_GetBuffStatusFlag/10 OsIf_GetCounter/137 OsIf_MicrosToTicks/136
|
|
FlexCAN_ProccessEnhancedRxFifo/56 (FlexCAN_ProccessEnhancedRxFifo) @06b82d20
|
|
Type: function definition analyzed
|
|
Visibility: prevailing_def_ironly
|
|
References: g_flexcan_Ip_StatePtr/51 (read)g_Flexcan_Ip_aBase/50 (read)
|
|
Referring:
|
|
Availability: local
|
|
Function flags: body local optimize_size
|
|
Called by: FlexCAN_Ip_RxFifoBlocking/75
|
|
Calls: FlexCAN_SetEnhancedRxFifoIntAll/45 OsIf_GetElapsed/138 FlexCAN_IRQHandlerEnhancedRxFIFO/66 FlexCAN_GetEnhancedRxFIFOStatusFlag/46 OsIf_GetCounter/137 OsIf_MicrosToTicks/136
|
|
FlexCAN_StartRxMessageEnhancedFifoData/55 (FlexCAN_StartRxMessageEnhancedFifoData) @06b82a80
|
|
Type: function definition analyzed
|
|
Visibility: prevailing_def_ironly
|
|
References: g_Flexcan_Ip_aBase/50 (read)g_flexcan_Ip_StatePtr/51 (read)
|
|
Referring:
|
|
Availability: local
|
|
Function flags: body local optimize_size
|
|
Called by: FlexCAN_Ip_RxFifoBlocking/75 FlexCAN_Ip_RxFifo/74
|
|
Calls: FlexCAN_SetEnhancedRxFifoIntAll/45 DevAssert/0
|
|
FlexCAN_CompleteRxMessageEnhancedFifoData/54 (FlexCAN_CompleteRxMessageEnhancedFifoData) @06b827e0
|
|
Type: function definition analyzed
|
|
Visibility: prevailing_def_ironly
|
|
References: g_Flexcan_Ip_aBase/50 (read)g_flexcan_Ip_StatePtr/51 (read)
|
|
Referring:
|
|
Availability: local
|
|
Function flags: body local optimize_size
|
|
Called by: FlexCAN_IRQHandlerEnhancedRxFIFO/66
|
|
Calls: FlexCAN_SetEnhancedRxFifoIntAll/45 DevAssert/0 FlexCAN_IsEnhancedRxFifoAvailable/141 DevAssert/0
|
|
FlexCAN_InitController/53 (FlexCAN_InitController) @06b82540
|
|
Type: function definition analyzed
|
|
Visibility: prevailing_def_ironly
|
|
References:
|
|
Referring:
|
|
Availability: local
|
|
Function flags: body local optimize_size
|
|
Called by: FlexCAN_Ip_Init_Privileged/69
|
|
Calls: FlexCAN_Disable/125 FlexCAN_EnterFreezeMode/124 FlexCAN_SetMaxMsgBuffNum/129 FlexCAN_SetPayloadSize/128 FlexCAN_Disable/125 FlexCAN_EnterFreezeMode/124 FlexCAN_InitRxFifo/52 FlexCAN_SetSelfReception/26 FlexCAN_ConfigCtrlOptions/127 FlexCAN_SetFDEnabled/6 FlexCAN_DisableMemErrorDetection/5 FlexCAN_Disable/125 FlexCAN_EnterFreezeMode/124 FlexCAN_Init/126 SchM_Exit_Can_CAN_EXCLUSIVE_AREA_00/122 SchM_Enter_Can_CAN_EXCLUSIVE_AREA_00/121 FlexCAN_Disable/125 FlexCAN_EnterFreezeMode/124 FlexCAN_IsEnabled/4
|
|
FlexCAN_InitRxFifo/52 (FlexCAN_InitRxFifo) @06b822a0
|
|
Type: function definition analyzed
|
|
Visibility: prevailing_def_ironly
|
|
References:
|
|
Referring:
|
|
Availability: local
|
|
Function flags: body local optimize_size
|
|
Called by: FlexCAN_InitController/53
|
|
Calls: FlexCAN_EnableEnhancedRxFifo/131 FlexCAN_EnableRxFifo/130
|
|
g_flexcan_Ip_StatePtr/51 (g_flexcan_Ip_StatePtr) @06b7a630
|
|
Type: variable definition analyzed
|
|
Visibility: prevailing_def_ironly
|
|
References:
|
|
Referring: FlexCAN_Ip_Init_Privileged/69 (write)FlexCAN_Ip_Send/70 (read)FlexCAN_StartSendData/59 (read)FlexCAN_Ip_ConfigRxMb/71 (read)FlexCAN_Ip_Receive/72 (read)FlexCAN_StartRxMessageBufferData/58 (read)FlexCAN_Ip_ReceiveBlocking/73 (read)FlexCAN_IRQHandlerRxMB/61 (read)FlexCAN_StartRxMessageEnhancedFifoData/55 (read)FlexCAN_StartRxMessageFifoData/60 (read)FlexCAN_ProccessEnhancedRxFifo/56 (read)FlexCAN_IRQHandlerEnhancedRxFIFO/66 (read)FlexCAN_CompleteRxMessageEnhancedFifoData/54 (read)FlexCAN_ProccessLegacyRxFIFO/57 (read)FlexCAN_IRQHandlerRxFIFO/63 (read)FlexCAN_CompleteRxMessageFifoData/80 (read)FlexCAN_Ip_ConfigRemoteResponseMb/78 (read)FlexCAN_Ip_GetTransferStatus/79 (read)FlexCAN_IRQHandler/81 (read)FlexCAN_IRQHandlerTxMB/62 (read)FlexCAN_ProcessIRQHandlerEnhancedRxFIFO/65 (read)FlexCAN_ProcessSpuriousInterruptMB/64 (read)FlexCAN_Busoff_Error_IRQHandler/86 (read)FlexCAN_Ip_SendBlocking/87 (read)FlexCAN_Ip_Deinit_Privileged/93 (write)FlexCAN_Ip_MainFunctionRead/94 (read)FlexCAN_Ip_MainFunctionBusOff_Privileged/95 (read)FlexCAN_Ip_MainFunctionWrite/96 (read)FlexCAN_Ip_EnableInterrupts_Privileged/113 (read)FlexCAN_Ip_DisableInterrupts_Privileged/114 (read)FlexCAN_Ip_AbortTransfer/116 (read)FlexCAN_AbortTxTransfer/67 (read)FlexCAN_AbortRxTransfer/68 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
g_Flexcan_Ip_aBase/50 (g_Flexcan_Ip_aBase) @06b7a5a0
|
|
Type: variable definition analyzed
|
|
Visibility: prevailing_def_ironly
|
|
References:
|
|
Referring: FlexCAN_Ip_Init_Privileged/69 (read)FlexCAN_Ip_Send/70 (read)FlexCAN_StartSendData/59 (read)FlexCAN_Ip_ConfigRxMb/71 (read)FlexCAN_Ip_Receive/72 (read)FlexCAN_StartRxMessageBufferData/58 (read)FlexCAN_Ip_ReceiveBlocking/73 (read)FlexCAN_IRQHandlerRxMB/61 (read)FlexCAN_Ip_RxFifo/74 (read)FlexCAN_StartRxMessageEnhancedFifoData/55 (read)FlexCAN_StartRxMessageFifoData/60 (read)FlexCAN_Ip_RxFifoBlocking/75 (read)FlexCAN_ProccessEnhancedRxFifo/56 (read)FlexCAN_IRQHandlerEnhancedRxFIFO/66 (read)FlexCAN_CompleteRxMessageEnhancedFifoData/54 (read)FlexCAN_ProccessLegacyRxFIFO/57 (read)FlexCAN_IRQHandlerRxFIFO/63 (read)FlexCAN_CompleteRxMessageFifoData/80 (read)FlexCAN_Ip_ConfigRxFifo_Privileged/76 (read)FlexCAN_Ip_ConfigEnhancedRxFifo_Privileged/77 (read)FlexCAN_Ip_ConfigRemoteResponseMb/78 (read)FlexCAN_IRQHandler/81 (read)FlexCAN_IRQHandlerTxMB/62 (read)FlexCAN_ProcessIRQHandlerEnhancedRxFIFO/65 (read)FlexCAN_ProcessSpuriousInterruptMB/64 (read)FlexCAN_Ip_ClearErrorStatus/82 (read)FlexCAN_Ip_GetErrorStatus/83 (read)FlexCAN_Ip_GetControllerTxErrorCounter/84 (read)FlexCAN_Ip_GetControllerRxErrorCounter/85 (read)FlexCAN_Busoff_Error_IRQHandler/86 (read)FlexCAN_Ip_SendBlocking/87 (read)FlexCAN_Ip_SetRxMbGlobalMask_Privileged/88 (read)FlexCAN_Ip_EnterFreezeMode_Privileged/89 (read)FlexCAN_Ip_ExitFreezeMode_Privileged/90 (read)FlexCAN_Ip_SetRxIndividualMask_Privileged/91 (read)FlexCAN_Ip_SetRxFifoGlobalMask_Privileged/92 (read)FlexCAN_Ip_Deinit_Privileged/93 (read)FlexCAN_Ip_MainFunctionRead/94 (read)FlexCAN_Ip_MainFunctionBusOff_Privileged/95 (read)FlexCAN_Ip_MainFunctionWrite/96 (read)FlexCAN_Ip_GetStopMode_Privileged/97 (read)FlexCAN_Ip_GetStartMode_Privileged/98 (read)FlexCAN_Ip_SetStartMode_Privileged/99 (read)FlexCAN_Ip_SetStopMode_Privileged/100 (read)FlexCAN_Ip_SetRxMaskType_Privileged/101 (read)FlexCAN_Ip_SetBitrate_Privileged/102 (read)FlexCAN_Ip_GetBitrate/103 (read)FlexCAN_Ip_ClearTDCFail_Privileged/104 (read)FlexCAN_Ip_GetTDCFail_Privileged/105 (read)FlexCAN_Ip_GetTDCValue_Privileged/106 (read)FlexCAN_Ip_SetBitrateCbt_Privileged/107 (read)FlexCAN_Ip_GetBitrateFD/108 (read)FlexCAN_Ip_SetTDCOffset_Privileged/109 (read)FlexCAN_Ip_SetTxArbitrationStartDelay_Privileged/110 (read)FlexCAN_Ip_GetBuffStatusFlag/111 (read)FlexCAN_Ip_ClearBuffStatusFlag/112 (read)FlexCAN_Ip_EnableInterrupts_Privileged/113 (read)FlexCAN_Ip_DisableInterrupts_Privileged/114 (read)FlexCAN_Ip_SetErrorInt_Privileged/115 (read)FlexCAN_Ip_AbortTransfer/116 (read)FlexCAN_AbortTxTransfer/67 (read)FlexCAN_AbortRxTransfer/68 (read)FlexCAN_Ip_SetRxMb14Mask_Privileged/117 (read)FlexCAN_Ip_SetRxMb15Mask_Privileged/118 (read)FlexCAN_Ip_SetListenOnlyMode_Privileged/119 (read)FlexCAN_Ip_GetListenOnlyMode/120 (read)
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Availability: available
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Varpool flags: initialized read-only const-value-known
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FlexCAN_SetRegDefaultVal/49 (FlexCAN_SetRegDefaultVal) @06c409a0
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Type: function definition analyzed
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Visibility: prevailing_def_ironly
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References:
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Referring:
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Availability: local
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Function flags: body local optimize_size
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Called by: FlexCAN_Ip_Deinit_Privileged/93
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Calls: FlexCAN_GetMaxMbNum/150 FlexCAN_GetMaxMbNum/150 FlexCAN_IsEnhancedRxFifoAvailable/141
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FlexCAN_GetEnhancedRxFIFOIntStatusFlag/48 (FlexCAN_GetEnhancedRxFIFOIntStatusFlag) @06c3cee0
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Type: function definition analyzed
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Visibility: prevailing_def_ironly
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References:
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Referring:
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Availability: local
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Function flags: body local optimize_size
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Called by: FlexCAN_ProcessIRQHandlerEnhancedRxFIFO/65
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Calls:
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FlexCAN_ClearEnhancedRxFifoIntStatusFlag/47 (FlexCAN_ClearEnhancedRxFifoIntStatusFlag) @06c3cc40
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Type: function definition analyzed
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Visibility: prevailing_def_ironly
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References:
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Referring:
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Availability: local
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Function flags: body local optimize_size
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Called by: FlexCAN_Ip_ClearBuffStatusFlag/112 FlexCAN_ProcessIRQHandlerEnhancedRxFIFO/65 FlexCAN_IRQHandler/81 FlexCAN_IRQHandler/81 FlexCAN_IRQHandler/81 FlexCAN_IRQHandler/81 FlexCAN_IRQHandlerEnhancedRxFIFO/66 FlexCAN_IRQHandlerEnhancedRxFIFO/66 FlexCAN_IRQHandlerEnhancedRxFIFO/66 FlexCAN_IRQHandlerEnhancedRxFIFO/66 FlexCAN_IRQHandlerEnhancedRxFIFO/66 FlexCAN_IRQHandlerEnhancedRxFIFO/66
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Calls:
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FlexCAN_GetEnhancedRxFIFOStatusFlag/46 (FlexCAN_GetEnhancedRxFIFOStatusFlag) @06c3c9a0
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Type: function definition analyzed
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Visibility: prevailing_def_ironly
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References:
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Referring:
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Availability: local
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Function flags: body local optimize_size
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Called by: FlexCAN_Ip_GetBuffStatusFlag/111 FlexCAN_Ip_MainFunctionRead/94 FlexCAN_ProcessIRQHandlerEnhancedRxFIFO/65 FlexCAN_ProccessEnhancedRxFifo/56
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Calls:
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FlexCAN_SetEnhancedRxFifoIntAll/45 (FlexCAN_SetEnhancedRxFifoIntAll) @06c3c700
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Type: function definition analyzed
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Visibility: prevailing_def_ironly
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References:
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Referring:
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Availability: local
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Function flags: body local optimize_size
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Called by: FlexCAN_Ip_DisableInterrupts_Privileged/114 FlexCAN_Ip_EnableInterrupts_Privileged/113 FlexCAN_CompleteRxMessageEnhancedFifoData/54 FlexCAN_ProccessEnhancedRxFifo/56 FlexCAN_StartRxMessageEnhancedFifoData/55
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Calls:
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FlexCAN_IsEnhancedRxFifoEnabled/44 (FlexCAN_IsEnhancedRxFifoEnabled) @06c3c460
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Type: function definition analyzed
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Visibility: prevailing_def_ironly
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References:
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Referring:
|
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Availability: local
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Function flags: body local optimize_size
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Called by: FlexCAN_Ip_DisableInterrupts_Privileged/114 FlexCAN_Ip_EnableInterrupts_Privileged/113 FlexCAN_Ip_MainFunctionRead/94 FlexCAN_IRQHandler/81 FlexCAN_Ip_RxFifoBlocking/75 FlexCAN_Ip_RxFifo/74
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Calls:
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FlexCAN_SetRxMaskType/43 (FlexCAN_SetRxMaskType) @06c3c1c0
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Type: function definition analyzed
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Visibility: prevailing_def_ironly
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References:
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Referring:
|
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Availability: local
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Function flags: body local optimize_size
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Called by: FlexCAN_Ip_SetRxMaskType_Privileged/101
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Calls:
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FlexCAN_SetTxArbitrationStartDelay/42 (FlexCAN_SetTxArbitrationStartDelay) @06c38d20
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Type: function definition analyzed
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Visibility: prevailing_def_ironly
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References:
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Referring:
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Availability: local
|
|
Function flags: body local optimize_size
|
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Called by: FlexCAN_Ip_SetTxArbitrationStartDelay_Privileged/110
|
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Calls:
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FlexCAN_IsFreezeMode/41 (FlexCAN_IsFreezeMode) @06c389a0
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Type: function definition analyzed
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Visibility: prevailing_def_ironly
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References:
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Referring:
|
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Availability: local
|
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Function flags: body local optimize_size
|
|
Called by: FlexCAN_Ip_SetListenOnlyMode_Privileged/119 FlexCAN_Ip_SetRxMb15Mask_Privileged/118 FlexCAN_Ip_SetRxMb14Mask_Privileged/117 FlexCAN_Ip_SetErrorInt_Privileged/115 FlexCAN_Ip_SetErrorInt_Privileged/115 FlexCAN_Ip_SetTxArbitrationStartDelay_Privileged/110 FlexCAN_Ip_SetTDCOffset_Privileged/109 FlexCAN_Ip_SetBitrateCbt_Privileged/107 FlexCAN_Ip_SetBitrate_Privileged/102 FlexCAN_Ip_SetRxMaskType_Privileged/101 FlexCAN_Ip_SetRxFifoGlobalMask_Privileged/92 FlexCAN_Ip_SetRxIndividualMask_Privileged/91 FlexCAN_Ip_SetRxMbGlobalMask_Privileged/88 FlexCAN_Ip_ConfigEnhancedRxFifo_Privileged/77 FlexCAN_Ip_ConfigRxFifo_Privileged/76
|
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Calls:
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FlexCAN_SetRxIndividualMask/40 (FlexCAN_SetRxIndividualMask) @06c38700
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Type: function definition analyzed
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Visibility: prevailing_def_ironly
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References:
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Referring:
|
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Availability: local
|
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Function flags: body local optimize_size
|
|
Called by: FlexCAN_Ip_SetRxIndividualMask_Privileged/91
|
|
Calls:
|
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FlexCAN_SetRxMsgBuffGlobalMask/39 (FlexCAN_SetRxMsgBuffGlobalMask) @06c38460
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Type: function definition analyzed
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Visibility: prevailing_def_ironly
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References:
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Referring:
|
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Availability: local
|
|
Function flags: body local optimize_size
|
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Called by: FlexCAN_Ip_SetRxMbGlobalMask_Privileged/88
|
|
Calls:
|
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FlexCAN_GetMsgBuffIntStatusFlag/36 (FlexCAN_GetMsgBuffIntStatusFlag) @06c30c40
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Type: function definition analyzed
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Visibility: prevailing_def_ironly
|
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References:
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Referring:
|
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Availability: local
|
|
Function flags: body local optimize_size
|
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Called by: FlexCAN_IRQHandler/81 FlexCAN_IRQHandler/81 FlexCAN_IRQHandler/81
|
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Calls:
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RxFifoOcuppiedLastMsgBuff/29 (RxFifoOcuppiedLastMsgBuff) @06b722a0
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Type: function definition analyzed
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Visibility: prevailing_def_ironly
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References:
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Referring:
|
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Availability: local
|
|
Function flags: body local optimize_size
|
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Called by: FlexCAN_AbortRxTransfer/68
|
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Calls:
|
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FlexCAN_IsListenOnlyModeEnabled/28 (FlexCAN_IsListenOnlyModeEnabled) @06b72000
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Type: function definition analyzed
|
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Visibility: prevailing_def_ironly
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References:
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Referring:
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Availability: local
|
|
Function flags: body local optimize_size
|
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Called by: FlexCAN_Ip_GetListenOnlyMode/120 FlexCAN_Ip_Send/70
|
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Calls:
|
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FlexCAN_IsFDEnabled/27 (FlexCAN_IsFDEnabled) @06b70d20
|
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Type: function definition analyzed
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Visibility: prevailing_def_ironly
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References:
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Referring:
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Availability: local
|
|
Function flags: body local optimize_size
|
|
Called by: FlexCAN_Ip_SetBitrateCbt_Privileged/107
|
|
Calls:
|
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FlexCAN_SetSelfReception/26 (FlexCAN_SetSelfReception) @06b70a80
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Type: function definition analyzed
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Visibility: prevailing_def_ironly
|
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References:
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Referring:
|
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Availability: local
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Function flags: body local optimize_size
|
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Called by: FlexCAN_InitController/53
|
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Calls:
|
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FlexCAN_EnhCbtEnable/25 (FlexCAN_EnhCbtEnable) @06b70620
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Type: function definition analyzed
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Visibility: prevailing_def_ironly
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References:
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Referring:
|
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Availability: local
|
|
Function flags: body local optimize_size
|
|
Called by: FlexCAN_Ip_SetBitrate_Privileged/102
|
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Calls:
|
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FlexCAN_EnableExtCbt/24 (FlexCAN_EnableExtCbt) @06b702a0
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Type: function definition analyzed
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Visibility: prevailing_def_ironly
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References:
|
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Referring:
|
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Availability: local
|
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Function flags: body local optimize_size
|
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Called by: FlexCAN_Ip_Init_Privileged/69
|
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Calls:
|
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FlexCAN_IsEnhCbtEnabled/23 (FlexCAN_IsEnhCbtEnabled) @06b6aee0
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Type: function definition analyzed
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Visibility: prevailing_def_ironly
|
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References:
|
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Referring:
|
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Availability: local
|
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Function flags: body local optimize_size
|
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Called by: FlexCAN_Ip_GetBitrateFD/108 FlexCAN_Ip_SetBitrateCbt_Privileged/107 FlexCAN_Ip_GetTDCValue_Privileged/106 FlexCAN_Ip_GetTDCFail_Privileged/105 FlexCAN_Ip_ClearTDCFail_Privileged/104 FlexCAN_Ip_GetBitrate/103
|
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Calls:
|
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FlexCAN_IsExCbtEnabled/22 (FlexCAN_IsExCbtEnabled) @06b6ac40
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Type: function definition analyzed
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Visibility: prevailing_def_ironly
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References:
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Referring:
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Availability: local
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Function flags: body local optimize_size
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Called by: FlexCAN_Ip_GetBitrate/103 FlexCAN_Ip_SetBitrate_Privileged/102
|
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Calls:
|
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FlexCAN_GetFDTimeSegments/21 (FlexCAN_GetFDTimeSegments) @06b6a9a0
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Type: function definition analyzed
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Visibility: prevailing_def_ironly
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References:
|
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Referring:
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Availability: local
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Function flags: body local optimize_size
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Called by: FlexCAN_Ip_GetBitrateFD/108
|
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Calls:
|
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FlexCAN_GetTimeSegments/20 (FlexCAN_GetTimeSegments) @06b6a700
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Type: function definition analyzed
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Visibility: prevailing_def_ironly
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References:
|
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Referring:
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Availability: local
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Function flags: body local optimize_size
|
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Called by: FlexCAN_Ip_GetBitrate/103
|
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Calls:
|
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FlexCAN_GetExtendedTimeSegments/19 (FlexCAN_GetExtendedTimeSegments) @06b6a460
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Type: function definition analyzed
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Visibility: prevailing_def_ironly
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References:
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Referring:
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Availability: local
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Function flags: body local optimize_size
|
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Called by: FlexCAN_Ip_GetBitrate/103
|
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Calls:
|
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FlexCAN_GetEnhancedDataTimeSegments/18 (FlexCAN_GetEnhancedDataTimeSegments) @06b6a1c0
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Type: function definition analyzed
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Visibility: prevailing_def_ironly
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References:
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Referring:
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Availability: local
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Function flags: body local optimize_size
|
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Called by: FlexCAN_Ip_GetBitrateFD/108
|
|
Calls: DevAssert/0
|
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FlexCAN_SetEnhancedDataTimeSegments/17 (FlexCAN_SetEnhancedDataTimeSegments) @06af1ee0
|
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Type: function definition analyzed
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Visibility: prevailing_def_ironly
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References:
|
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Referring:
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Availability: local
|
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Function flags: body local optimize_size
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Called by: FlexCAN_Ip_SetBitrateCbt_Privileged/107 FlexCAN_Ip_Init_Privileged/69
|
|
Calls: DevAssert/0
|
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FlexCAN_GetEnhancedNominalTimeSegments/16 (FlexCAN_GetEnhancedNominalTimeSegments) @06af19a0
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Type: function definition analyzed
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Visibility: prevailing_def_ironly
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References:
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Referring:
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Availability: local
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Function flags: body local optimize_size
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Called by: FlexCAN_Ip_GetBitrate/103
|
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Calls:
|
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FlexCAN_SetEnhancedNominalTimeSegments/15 (FlexCAN_SetEnhancedNominalTimeSegments) @06af1700
|
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Type: function definition analyzed
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Visibility: prevailing_def_ironly
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References:
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Referring:
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Availability: local
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Function flags: body local optimize_size
|
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Called by: FlexCAN_Ip_SetBitrate_Privileged/102 FlexCAN_Ip_Init_Privileged/69
|
|
Calls: DevAssert/0
|
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FlexCAN_SetExtendedTimeSegments/14 (FlexCAN_SetExtendedTimeSegments) @06af11c0
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Type: function definition analyzed
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Visibility: prevailing_def_ironly
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References:
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Referring:
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Availability: local
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Function flags: body local optimize_size
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Called by: FlexCAN_Ip_SetBitrate_Privileged/102 FlexCAN_Ip_Init_Privileged/69
|
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Calls: DevAssert/0
|
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FlexCAN_SetTimeSegments/13 (FlexCAN_SetTimeSegments) @06aeca80
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Type: function definition analyzed
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Visibility: prevailing_def_ironly
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References:
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Referring:
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Availability: local
|
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Function flags: body local optimize_size
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Called by: FlexCAN_Ip_SetBitrate_Privileged/102 FlexCAN_Ip_Init_Privileged/69
|
|
Calls: DevAssert/0
|
|
FlexCAN_SetFDTimeSegments/12 (FlexCAN_SetFDTimeSegments) @06aec380
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Type: function definition analyzed
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Visibility: prevailing_def_ironly
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References:
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Referring:
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Availability: local
|
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Function flags: body local optimize_size
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Called by: FlexCAN_Ip_SetBitrateCbt_Privileged/107 FlexCAN_Ip_Init_Privileged/69
|
|
Calls: DevAssert/0
|
|
FlexCAN_GetBuffStatusImask/11 (FlexCAN_GetBuffStatusImask) @06ae6c40
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Type: function definition analyzed
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Visibility: prevailing_def_ironly
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References:
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Referring:
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Availability: local
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Function flags: body local optimize_size
|
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Called by: FlexCAN_ProcessSpuriousInterruptMB/64
|
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Calls:
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FlexCAN_GetBuffStatusFlag/10 (FlexCAN_GetBuffStatusFlag) @06ae69a0
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Type: function definition analyzed
|
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Visibility: prevailing_def_ironly
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References:
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Referring:
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Availability: local
|
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Function flags: body local optimize_size
|
|
Called by: FlexCAN_AbortTxTransfer/67 FlexCAN_Ip_GetBuffStatusFlag/111 FlexCAN_Ip_MainFunctionWrite/96 FlexCAN_Ip_MainFunctionRead/94 FlexCAN_Ip_MainFunctionRead/94 FlexCAN_Ip_SendBlocking/87 FlexCAN_Ip_SendBlocking/87 FlexCAN_ProcessSpuriousInterruptMB/64 FlexCAN_ProccessLegacyRxFIFO/57 FlexCAN_Ip_ReceiveBlocking/73
|
|
Calls:
|
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FlexCAN_ClearMsgBuffIntStatusFlag/9 (FlexCAN_ClearMsgBuffIntStatusFlag) @06ae6700
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Type: function definition analyzed
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Visibility: prevailing_def_ironly
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References:
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Referring:
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Availability: local
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Function flags: body local optimize_size
|
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Called by: FlexCAN_AbortRxTransfer/68 FlexCAN_AbortTxTransfer/67 FlexCAN_Ip_ClearBuffStatusFlag/112 FlexCAN_Ip_MainFunctionWrite/96 FlexCAN_Ip_SendBlocking/87 FlexCAN_Ip_SendBlocking/87 FlexCAN_ProcessSpuriousInterruptMB/64 FlexCAN_IRQHandlerTxMB/62 FlexCAN_IRQHandlerTxMB/62 FlexCAN_IRQHandler/81 FlexCAN_IRQHandler/81 FlexCAN_Ip_ConfigRemoteResponseMb/78 FlexCAN_IRQHandlerRxFIFO/63 FlexCAN_IRQHandlerRxFIFO/63 FlexCAN_IRQHandlerRxFIFO/63 FlexCAN_IRQHandlerRxMB/61 FlexCAN_Ip_ConfigRxMb/71 FlexCAN_StartSendData/59
|
|
Calls:
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FlexCAN_UnlockRxMsgBuff/8 (FlexCAN_UnlockRxMsgBuff) @06ae6460
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Type: function definition analyzed
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Visibility: prevailing_def_ironly
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References:
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Referring:
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Availability: local
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Function flags: body local optimize_size
|
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Called by: FlexCAN_Ip_MainFunctionWrite/96 FlexCAN_IRQHandlerTxMB/62 FlexCAN_IRQHandlerTxMB/62 FlexCAN_IRQHandlerRxMB/61
|
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Calls:
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FlexCAN_SetListenOnlyMode/7 (FlexCAN_SetListenOnlyMode) @06ae60e0
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Type: function definition analyzed
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Visibility: prevailing_def_ironly
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References:
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Referring:
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Availability: local
|
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Function flags: body local optimize_size
|
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Called by: FlexCAN_Ip_SetListenOnlyMode_Privileged/119
|
|
Calls:
|
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FlexCAN_SetFDEnabled/6 (FlexCAN_SetFDEnabled) @06ae4d20
|
|
Type: function definition analyzed
|
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Visibility: prevailing_def_ironly
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References:
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Referring:
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Availability: local
|
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Function flags: body local optimize_size
|
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Called by: FlexCAN_Ip_SetBitrateCbt_Privileged/107 FlexCAN_InitController/53
|
|
Calls:
|
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FlexCAN_DisableMemErrorDetection/5 (FlexCAN_DisableMemErrorDetection) @06ae48c0
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|
Type: function definition analyzed
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Visibility: prevailing_def_ironly
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References:
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Referring:
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Availability: local
|
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Function flags: body local optimize_size
|
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Called by: FlexCAN_InitController/53
|
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Calls:
|
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FlexCAN_IsEnabled/4 (FlexCAN_IsEnabled) @06ae41c0
|
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Type: function definition analyzed
|
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Visibility: prevailing_def_ironly
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References:
|
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Referring:
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Availability: local
|
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Function flags: body local optimize_size
|
|
Called by: FlexCAN_Ip_SetListenOnlyMode_Privileged/119 FlexCAN_Ip_SetRxMb15Mask_Privileged/118 FlexCAN_Ip_SetRxMb14Mask_Privileged/117 FlexCAN_Ip_SetErrorInt_Privileged/115 FlexCAN_Ip_DisableInterrupts_Privileged/114 FlexCAN_Ip_EnableInterrupts_Privileged/113 FlexCAN_Ip_SetTxArbitrationStartDelay_Privileged/110 FlexCAN_Ip_SetTDCOffset_Privileged/109 FlexCAN_Ip_SetBitrateCbt_Privileged/107 FlexCAN_Ip_GetTDCValue_Privileged/106 FlexCAN_Ip_GetTDCFail_Privileged/105 FlexCAN_Ip_ClearTDCFail_Privileged/104 FlexCAN_Ip_SetBitrate_Privileged/102 FlexCAN_Ip_SetRxMaskType_Privileged/101 FlexCAN_Ip_SetRxFifoGlobalMask_Privileged/92 FlexCAN_Ip_SetRxIndividualMask_Privileged/91 FlexCAN_Ip_SetRxMbGlobalMask_Privileged/88 FlexCAN_Ip_ConfigEnhancedRxFifo_Privileged/77 FlexCAN_Ip_ConfigRxFifo_Privileged/76 FlexCAN_InitController/53
|
|
Calls:
|
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FlexCAN_SetEnhancedTDCOffset/3 (FlexCAN_SetEnhancedTDCOffset) @06addc40
|
|
Type: function definition analyzed
|
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Visibility: prevailing_def_ironly
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References:
|
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Referring:
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Availability: local
|
|
Function flags: body local optimize_size
|
|
Called by: FlexCAN_Ip_SetTDCOffset_Privileged/109
|
|
Calls:
|
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FlexCAN_SetTDCOffset/2 (FlexCAN_SetTDCOffset) @06add8c0
|
|
Type: function definition analyzed
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Visibility: prevailing_def_ironly
|
|
References:
|
|
Referring:
|
|
Availability: local
|
|
Function flags: body local optimize_size
|
|
Called by: FlexCAN_Ip_SetTDCOffset_Privileged/109
|
|
Calls:
|
|
FlexCAN_SetRxFifoGlobalMask/1 (FlexCAN_SetRxFifoGlobalMask) @06add540
|
|
Type: function definition analyzed
|
|
Visibility: prevailing_def_ironly
|
|
References:
|
|
Referring:
|
|
Availability: local
|
|
Function flags: body local optimize_size
|
|
Called by: FlexCAN_Ip_SetRxFifoGlobalMask_Privileged/92
|
|
Calls:
|
|
DevAssert/0 (DevAssert) @06b28ee0
|
|
Type: function definition analyzed
|
|
Visibility: prevailing_def_ironly
|
|
References:
|
|
Referring:
|
|
Availability: local
|
|
Function flags: body local optimize_size
|
|
Called by: FlexCAN_Ip_SetListenOnlyMode_Privileged/119 FlexCAN_Ip_SetRxMb15Mask_Privileged/118 FlexCAN_Ip_SetRxMb14Mask_Privileged/117 FlexCAN_Ip_AbortTransfer/116 FlexCAN_Ip_AbortTransfer/116 FlexCAN_Ip_SetErrorInt_Privileged/115 FlexCAN_Ip_SetErrorInt_Privileged/115 FlexCAN_Ip_DisableInterrupts_Privileged/114 FlexCAN_Ip_EnableInterrupts_Privileged/113 FlexCAN_Ip_ClearBuffStatusFlag/112 FlexCAN_Ip_GetBuffStatusFlag/111 FlexCAN_Ip_SetTxArbitrationStartDelay_Privileged/110 FlexCAN_Ip_SetTDCOffset_Privileged/109 FlexCAN_GetEnhancedDataTimeSegments/18 FlexCAN_Ip_GetBitrateFD/108 FlexCAN_Ip_GetBitrateFD/108 FlexCAN_Ip_SetBitrateCbt_Privileged/107 FlexCAN_Ip_SetBitrateCbt_Privileged/107 FlexCAN_Ip_GetTDCValue_Privileged/106 FlexCAN_Ip_GetTDCFail_Privileged/105 FlexCAN_Ip_ClearTDCFail_Privileged/104 FlexCAN_Ip_GetBitrate/103 FlexCAN_Ip_GetBitrate/103 FlexCAN_Ip_SetBitrate_Privileged/102 FlexCAN_Ip_SetBitrate_Privileged/102 FlexCAN_Ip_SetRxMaskType_Privileged/101 FlexCAN_Ip_SetStopMode_Privileged/100 FlexCAN_Ip_SetStartMode_Privileged/99 FlexCAN_Ip_MainFunctionWrite/96 FlexCAN_Ip_MainFunctionBusOff_Privileged/95 FlexCAN_Ip_MainFunctionRead/94 FlexCAN_Ip_MainFunctionRead/94 FlexCAN_Ip_Deinit_Privileged/93 FlexCAN_Ip_SetRxFifoGlobalMask_Privileged/92 FlexCAN_Ip_SetRxIndividualMask_Privileged/91 FlexCAN_Ip_SetRxMbGlobalMask_Privileged/88 FlexCAN_Ip_SendBlocking/87 FlexCAN_Ip_SendBlocking/87 FlexCAN_Busoff_Error_IRQHandler/86 FlexCAN_Ip_GetControllerRxErrorCounter/85 FlexCAN_Ip_GetControllerTxErrorCounter/84 FlexCAN_Ip_GetErrorStatus/83 FlexCAN_Ip_ClearErrorStatus/82 FlexCAN_IRQHandler/81 FlexCAN_IRQHandler/81 FlexCAN_Ip_GetTransferStatus/79 FlexCAN_Ip_GetTransferStatus/79 FlexCAN_Ip_ConfigRemoteResponseMb/78 FlexCAN_Ip_ConfigRemoteResponseMb/78 FlexCAN_Ip_ConfigEnhancedRxFifo_Privileged/77 FlexCAN_Ip_ConfigEnhancedRxFifo_Privileged/77 FlexCAN_Ip_ConfigEnhancedRxFifo_Privileged/77 FlexCAN_Ip_ConfigRxFifo_Privileged/76 FlexCAN_CompleteRxMessageFifoData/80 FlexCAN_CompleteRxMessageEnhancedFifoData/54 FlexCAN_CompleteRxMessageEnhancedFifoData/54 FlexCAN_Ip_RxFifoBlocking/75 FlexCAN_StartRxMessageFifoData/60 FlexCAN_StartRxMessageEnhancedFifoData/55 FlexCAN_Ip_RxFifo/74 FlexCAN_Ip_ReceiveBlocking/73 FlexCAN_StartRxMessageBufferData/58 FlexCAN_Ip_Receive/72 FlexCAN_Ip_ConfigRxMb/71 FlexCAN_Ip_ConfigRxMb/71 FlexCAN_StartSendData/59 FlexCAN_StartSendData/59 FlexCAN_Ip_Send/70 FlexCAN_Ip_Send/70 FlexCAN_SetTimeSegments/13 FlexCAN_SetFDTimeSegments/12 FlexCAN_SetExtendedTimeSegments/14 FlexCAN_SetEnhancedDataTimeSegments/17 FlexCAN_SetEnhancedNominalTimeSegments/15 FlexCAN_Ip_Init_Privileged/69 FlexCAN_Ip_Init_Privileged/69
|
|
Calls:
|
|
FlexCAN_Ip_GetListenOnlyMode (uint8 instance)
|
|
{
|
|
const struct FLEXCAN_Type * base;
|
|
boolean D.6689;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) instance;
|
|
base = g_Flexcan_Ip_aBase[_1];
|
|
# DEBUG BEGIN_STMT
|
|
D.6689 = FlexCAN_IsListenOnlyModeEnabled (base);
|
|
return D.6689;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_Ip_SetListenOnlyMode_Privileged (uint8 instance, const boolean enable)
|
|
{
|
|
boolean freeze;
|
|
boolean disabled;
|
|
struct FLEXCAN_Type * pBase;
|
|
Flexcan_Ip_StatusType status;
|
|
Flexcan_Ip_StatusType result;
|
|
Flexcan_Ip_StatusType D.6683;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = instance <= 5;
|
|
DevAssert (_1);
|
|
# DEBUG BEGIN_STMT
|
|
result = 0;
|
|
# DEBUG BEGIN_STMT
|
|
status = 0;
|
|
# DEBUG BEGIN_STMT
|
|
_2 = (int) instance;
|
|
pBase = g_Flexcan_Ip_aBase[_2];
|
|
# DEBUG BEGIN_STMT
|
|
_3 = FlexCAN_IsEnabled (pBase);
|
|
_4 = (int) _3;
|
|
_5 = _4 != 0;
|
|
_6 = ~_5;
|
|
_7 = (int) _6;
|
|
disabled = (boolean) _7;
|
|
# DEBUG BEGIN_STMT
|
|
if (disabled != 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 4>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
result = FlexCAN_Enable (pBase);
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
freeze = FlexCAN_IsFreezeMode (pBase);
|
|
# DEBUG BEGIN_STMT
|
|
_8 = ~freeze;
|
|
if (_8 != 0)
|
|
goto <bb 5>; [INV]
|
|
else
|
|
goto <bb 7>; [INV]
|
|
|
|
<bb 5> :
|
|
if (result == 0)
|
|
goto <bb 6>; [INV]
|
|
else
|
|
goto <bb 7>; [INV]
|
|
|
|
<bb 6> :
|
|
# DEBUG BEGIN_STMT
|
|
result = 1;
|
|
|
|
<bb 7> :
|
|
# DEBUG BEGIN_STMT
|
|
if (result == 0)
|
|
goto <bb 8>; [INV]
|
|
else
|
|
goto <bb 9>; [INV]
|
|
|
|
<bb 8> :
|
|
# DEBUG BEGIN_STMT
|
|
FlexCAN_SetListenOnlyMode (pBase, enable);
|
|
|
|
<bb 9> :
|
|
# DEBUG BEGIN_STMT
|
|
if (disabled != 0)
|
|
goto <bb 10>; [INV]
|
|
else
|
|
goto <bb 12>; [INV]
|
|
|
|
<bb 10> :
|
|
# DEBUG BEGIN_STMT
|
|
status = FlexCAN_Disable (pBase);
|
|
# DEBUG BEGIN_STMT
|
|
if (status != 0)
|
|
goto <bb 11>; [INV]
|
|
else
|
|
goto <bb 12>; [INV]
|
|
|
|
<bb 11> :
|
|
# DEBUG BEGIN_STMT
|
|
result = status;
|
|
|
|
<bb 12> :
|
|
# DEBUG BEGIN_STMT
|
|
D.6683 = result;
|
|
return D.6683;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_Ip_SetRxMb15Mask_Privileged (uint8 instance, uint32 mask)
|
|
{
|
|
boolean disabled;
|
|
boolean freeze;
|
|
struct FLEXCAN_Type * pBase;
|
|
Flexcan_Ip_StatusType status;
|
|
Flexcan_Ip_StatusType result;
|
|
Flexcan_Ip_StatusType D.6669;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = instance <= 5;
|
|
DevAssert (_1);
|
|
# DEBUG BEGIN_STMT
|
|
result = 0;
|
|
# DEBUG BEGIN_STMT
|
|
status = 0;
|
|
# DEBUG BEGIN_STMT
|
|
_2 = (int) instance;
|
|
pBase = g_Flexcan_Ip_aBase[_2];
|
|
# DEBUG BEGIN_STMT
|
|
freeze = 0;
|
|
# DEBUG BEGIN_STMT
|
|
_3 = FlexCAN_IsEnabled (pBase);
|
|
_4 = (int) _3;
|
|
_5 = _4 != 0;
|
|
_6 = ~_5;
|
|
_7 = (int) _6;
|
|
disabled = (boolean) _7;
|
|
# DEBUG BEGIN_STMT
|
|
if (disabled != 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 4>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
result = FlexCAN_Enable (pBase);
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
freeze = FlexCAN_IsFreezeMode (pBase);
|
|
# DEBUG BEGIN_STMT
|
|
_8 = ~freeze;
|
|
if (_8 != 0)
|
|
goto <bb 5>; [INV]
|
|
else
|
|
goto <bb 7>; [INV]
|
|
|
|
<bb 5> :
|
|
if (result == 0)
|
|
goto <bb 6>; [INV]
|
|
else
|
|
goto <bb 7>; [INV]
|
|
|
|
<bb 6> :
|
|
# DEBUG BEGIN_STMT
|
|
result = 1;
|
|
|
|
<bb 7> :
|
|
# DEBUG BEGIN_STMT
|
|
if (result == 0)
|
|
goto <bb 8>; [INV]
|
|
else
|
|
goto <bb 9>; [INV]
|
|
|
|
<bb 8> :
|
|
# DEBUG BEGIN_STMT
|
|
pBase->RX15MASK = mask;
|
|
|
|
<bb 9> :
|
|
# DEBUG BEGIN_STMT
|
|
if (disabled != 0)
|
|
goto <bb 10>; [INV]
|
|
else
|
|
goto <bb 12>; [INV]
|
|
|
|
<bb 10> :
|
|
# DEBUG BEGIN_STMT
|
|
status = FlexCAN_Disable (pBase);
|
|
# DEBUG BEGIN_STMT
|
|
if (status != 0)
|
|
goto <bb 11>; [INV]
|
|
else
|
|
goto <bb 12>; [INV]
|
|
|
|
<bb 11> :
|
|
# DEBUG BEGIN_STMT
|
|
result = status;
|
|
|
|
<bb 12> :
|
|
# DEBUG BEGIN_STMT
|
|
D.6669 = result;
|
|
return D.6669;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_Ip_SetRxMb14Mask_Privileged (uint8 instance, uint32 mask)
|
|
{
|
|
boolean disabled;
|
|
boolean freeze;
|
|
struct FLEXCAN_Type * pBase;
|
|
Flexcan_Ip_StatusType status;
|
|
Flexcan_Ip_StatusType result;
|
|
Flexcan_Ip_StatusType D.6655;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = instance <= 5;
|
|
DevAssert (_1);
|
|
# DEBUG BEGIN_STMT
|
|
result = 0;
|
|
# DEBUG BEGIN_STMT
|
|
status = 0;
|
|
# DEBUG BEGIN_STMT
|
|
_2 = (int) instance;
|
|
pBase = g_Flexcan_Ip_aBase[_2];
|
|
# DEBUG BEGIN_STMT
|
|
freeze = 0;
|
|
# DEBUG BEGIN_STMT
|
|
_3 = FlexCAN_IsEnabled (pBase);
|
|
_4 = (int) _3;
|
|
_5 = _4 != 0;
|
|
_6 = ~_5;
|
|
_7 = (int) _6;
|
|
disabled = (boolean) _7;
|
|
# DEBUG BEGIN_STMT
|
|
if (disabled != 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 4>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
result = FlexCAN_Enable (pBase);
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
freeze = FlexCAN_IsFreezeMode (pBase);
|
|
# DEBUG BEGIN_STMT
|
|
_8 = ~freeze;
|
|
if (_8 != 0)
|
|
goto <bb 5>; [INV]
|
|
else
|
|
goto <bb 7>; [INV]
|
|
|
|
<bb 5> :
|
|
if (result == 0)
|
|
goto <bb 6>; [INV]
|
|
else
|
|
goto <bb 7>; [INV]
|
|
|
|
<bb 6> :
|
|
# DEBUG BEGIN_STMT
|
|
result = 1;
|
|
|
|
<bb 7> :
|
|
# DEBUG BEGIN_STMT
|
|
if (result == 0)
|
|
goto <bb 8>; [INV]
|
|
else
|
|
goto <bb 9>; [INV]
|
|
|
|
<bb 8> :
|
|
# DEBUG BEGIN_STMT
|
|
pBase->RX14MASK = mask;
|
|
|
|
<bb 9> :
|
|
# DEBUG BEGIN_STMT
|
|
if (disabled != 0)
|
|
goto <bb 10>; [INV]
|
|
else
|
|
goto <bb 12>; [INV]
|
|
|
|
<bb 10> :
|
|
# DEBUG BEGIN_STMT
|
|
status = FlexCAN_Disable (pBase);
|
|
# DEBUG BEGIN_STMT
|
|
if (status != 0)
|
|
goto <bb 11>; [INV]
|
|
else
|
|
goto <bb 12>; [INV]
|
|
|
|
<bb 11> :
|
|
# DEBUG BEGIN_STMT
|
|
result = status;
|
|
|
|
<bb 12> :
|
|
# DEBUG BEGIN_STMT
|
|
D.6655 = result;
|
|
return D.6655;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_Ip_AbortTransfer (uint8 u8Instance, uint8 mb_idx)
|
|
{
|
|
Flexcan_Ip_StatusType result;
|
|
const struct Flexcan_Ip_StateType * state;
|
|
struct FLEXCAN_Type * pBase;
|
|
Flexcan_Ip_StatusType D.6620;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = u8Instance <= 5;
|
|
DevAssert (_1);
|
|
# DEBUG BEGIN_STMT
|
|
_2 = mb_idx + 160;
|
|
_3 = _2 > 158;
|
|
DevAssert (_3);
|
|
# DEBUG BEGIN_STMT
|
|
_4 = (int) u8Instance;
|
|
pBase = g_Flexcan_Ip_aBase[_4];
|
|
# DEBUG BEGIN_STMT
|
|
_5 = (int) u8Instance;
|
|
state = g_flexcan_Ip_StatePtr[_5];
|
|
# DEBUG BEGIN_STMT
|
|
result = 0;
|
|
# DEBUG BEGIN_STMT
|
|
if (mb_idx <= 95)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 9>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
_6 = (int) mb_idx;
|
|
_7 = state->mbs[_6].state;
|
|
if (_7 == 0)
|
|
goto <bb 4>; [INV]
|
|
else
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
result = 5;
|
|
goto <bb 9>; [INV]
|
|
|
|
<bb 5> :
|
|
# DEBUG BEGIN_STMT
|
|
_8 = (long unsigned int) mb_idx;
|
|
_9 = state->isIntActive;
|
|
FLEXCAN_ClearMsgBuffIntCmd (pBase, u8Instance, _8, _9);
|
|
# DEBUG BEGIN_STMT
|
|
_10 = (int) mb_idx;
|
|
_11 = state->mbs[_10].state;
|
|
if (_11 == 2)
|
|
goto <bb 6>; [INV]
|
|
else
|
|
goto <bb 7>; [INV]
|
|
|
|
<bb 6> :
|
|
# DEBUG BEGIN_STMT
|
|
result = FlexCAN_AbortTxTransfer (u8Instance, mb_idx);
|
|
|
|
<bb 7> :
|
|
# DEBUG BEGIN_STMT
|
|
_12 = (int) mb_idx;
|
|
_13 = state->mbs[_12].state;
|
|
if (_13 == 1)
|
|
goto <bb 8>; [INV]
|
|
else
|
|
goto <bb 9>; [INV]
|
|
|
|
<bb 8> :
|
|
# DEBUG BEGIN_STMT
|
|
FlexCAN_AbortRxTransfer (u8Instance, mb_idx);
|
|
|
|
<bb 9> :
|
|
# DEBUG BEGIN_STMT
|
|
D.6620 = result;
|
|
return D.6620;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_Ip_SetErrorInt_Privileged (uint8 u8Instance, Flexcan_Ip_ErrorIntType type, boolean enable)
|
|
{
|
|
boolean disabled;
|
|
struct FLEXCAN_Type * pBase;
|
|
Flexcan_Ip_StatusType status;
|
|
Flexcan_Ip_StatusType result;
|
|
Flexcan_Ip_StatusType D.6609;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = u8Instance <= 5;
|
|
DevAssert (_1);
|
|
# DEBUG BEGIN_STMT
|
|
result = 0;
|
|
# DEBUG BEGIN_STMT
|
|
status = 0;
|
|
# DEBUG BEGIN_STMT
|
|
_2 = (int) u8Instance;
|
|
pBase = g_Flexcan_Ip_aBase[_2];
|
|
# DEBUG BEGIN_STMT
|
|
_3 = FlexCAN_IsEnabled (pBase);
|
|
_4 = (int) _3;
|
|
_5 = _4 != 0;
|
|
_6 = ~_5;
|
|
_7 = (int) _6;
|
|
disabled = (boolean) _7;
|
|
# DEBUG BEGIN_STMT
|
|
if (disabled != 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 4>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
result = FlexCAN_Enable (pBase);
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
if (result == 0)
|
|
goto <bb 5>; [INV]
|
|
else
|
|
goto <bb 16>; [INV]
|
|
|
|
<bb 5> :
|
|
# DEBUG BEGIN_STMT
|
|
_8 = (int) type;
|
|
switch (_8) <default: <L14> [INV], case 0: <L6> [INV], case 1: <L10> [INV], case 2: <L4> [INV], case 3: <L5> [INV], case 4: <L3> [INV]>
|
|
|
|
<bb 6> :
|
|
<L3>:
|
|
# DEBUG BEGIN_STMT
|
|
FlexCAN_SetErrIntCmd (pBase, 32768, enable);
|
|
# DEBUG BEGIN_STMT
|
|
goto <bb 16>; [INV]
|
|
|
|
<bb 7> :
|
|
<L4>:
|
|
# DEBUG BEGIN_STMT
|
|
FlexCAN_SetErrIntCmd (pBase, 16384, enable);
|
|
# DEBUG BEGIN_STMT
|
|
goto <bb 16>; [INV]
|
|
|
|
<bb 8> :
|
|
<L5>:
|
|
# DEBUG BEGIN_STMT
|
|
FlexCAN_SetErrIntCmd (pBase, 16385, enable);
|
|
# DEBUG BEGIN_STMT
|
|
goto <bb 16>; [INV]
|
|
|
|
<bb 9> :
|
|
<L6>:
|
|
# DEBUG BEGIN_STMT
|
|
_9 = FlexCAN_IsFreezeMode (pBase);
|
|
_10 = ~_9;
|
|
if (_10 != 0)
|
|
goto <bb 10>; [INV]
|
|
else
|
|
goto <bb 11>; [INV]
|
|
|
|
<bb 10> :
|
|
# DEBUG BEGIN_STMT
|
|
result = 1;
|
|
goto <bb 16>; [INV]
|
|
|
|
<bb 11> :
|
|
# DEBUG BEGIN_STMT
|
|
FlexCAN_SetErrIntCmd (pBase, 1024, enable);
|
|
goto <bb 16>; [INV]
|
|
|
|
<bb 12> :
|
|
<L10>:
|
|
# DEBUG BEGIN_STMT
|
|
_11 = FlexCAN_IsFreezeMode (pBase);
|
|
_12 = ~_11;
|
|
if (_12 != 0)
|
|
goto <bb 13>; [INV]
|
|
else
|
|
goto <bb 14>; [INV]
|
|
|
|
<bb 13> :
|
|
# DEBUG BEGIN_STMT
|
|
result = 1;
|
|
goto <bb 16>; [INV]
|
|
|
|
<bb 14> :
|
|
# DEBUG BEGIN_STMT
|
|
FlexCAN_SetErrIntCmd (pBase, 2048, enable);
|
|
goto <bb 16>; [INV]
|
|
|
|
<bb 15> :
|
|
<L14>:
|
|
# DEBUG BEGIN_STMT
|
|
DevAssert (0);
|
|
# DEBUG BEGIN_STMT
|
|
|
|
<bb 16> :
|
|
# DEBUG BEGIN_STMT
|
|
if (disabled != 0)
|
|
goto <bb 17>; [INV]
|
|
else
|
|
goto <bb 19>; [INV]
|
|
|
|
<bb 17> :
|
|
# DEBUG BEGIN_STMT
|
|
status = FlexCAN_Disable (pBase);
|
|
# DEBUG BEGIN_STMT
|
|
if (status != 0)
|
|
goto <bb 18>; [INV]
|
|
else
|
|
goto <bb 19>; [INV]
|
|
|
|
<bb 18> :
|
|
# DEBUG BEGIN_STMT
|
|
result = status;
|
|
|
|
<bb 19> :
|
|
# DEBUG BEGIN_STMT
|
|
D.6609 = result;
|
|
return D.6609;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_Ip_DisableInterrupts_Privileged (uint8 u8Instance)
|
|
{
|
|
struct Flexcan_Ip_StateType * state;
|
|
Flexcan_Ip_StatusType result;
|
|
struct FLEXCAN_Type * pBase;
|
|
Flexcan_Ip_StatusType D.6593;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) u8Instance;
|
|
pBase = g_Flexcan_Ip_aBase[_1];
|
|
# DEBUG BEGIN_STMT
|
|
result = 1;
|
|
# DEBUG BEGIN_STMT
|
|
_2 = (int) u8Instance;
|
|
state = g_flexcan_Ip_StatePtr[_2];
|
|
# DEBUG BEGIN_STMT
|
|
_3 = u8Instance <= 5;
|
|
DevAssert (_3);
|
|
# DEBUG BEGIN_STMT
|
|
_4 = FlexCAN_IsEnabled (pBase);
|
|
if (_4 != 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 7>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
FlexCAN_DisableInterrupts (pBase);
|
|
# DEBUG BEGIN_STMT
|
|
_5 = FlexCAN_IsEnhancedRxFifoAvailable (pBase);
|
|
if (_5 != 0)
|
|
goto <bb 4>; [INV]
|
|
else
|
|
goto <bb 6>; [INV]
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
_6 = FlexCAN_IsEnhancedRxFifoEnabled (pBase);
|
|
if (_6 != 0)
|
|
goto <bb 5>; [INV]
|
|
else
|
|
goto <bb 6>; [INV]
|
|
|
|
<bb 5> :
|
|
# DEBUG BEGIN_STMT
|
|
FlexCAN_SetEnhancedRxFifoIntAll (pBase, 0);
|
|
|
|
<bb 6> :
|
|
# DEBUG BEGIN_STMT
|
|
state->isIntActive = 0;
|
|
# DEBUG BEGIN_STMT
|
|
result = 0;
|
|
|
|
<bb 7> :
|
|
# DEBUG BEGIN_STMT
|
|
D.6593 = result;
|
|
return D.6593;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_Ip_EnableInterrupts_Privileged (uint8 u8Instance)
|
|
{
|
|
struct Flexcan_Ip_StateType * state;
|
|
Flexcan_Ip_StatusType result;
|
|
struct FLEXCAN_Type * pBase;
|
|
Flexcan_Ip_StatusType D.6585;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) u8Instance;
|
|
pBase = g_Flexcan_Ip_aBase[_1];
|
|
# DEBUG BEGIN_STMT
|
|
result = 1;
|
|
# DEBUG BEGIN_STMT
|
|
_2 = (int) u8Instance;
|
|
state = g_flexcan_Ip_StatePtr[_2];
|
|
# DEBUG BEGIN_STMT
|
|
_3 = u8Instance <= 5;
|
|
DevAssert (_3);
|
|
# DEBUG BEGIN_STMT
|
|
_4 = FlexCAN_IsEnabled (pBase);
|
|
if (_4 != 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 8>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
FlexCAN_EnableInterrupts (pBase, u8Instance);
|
|
# DEBUG BEGIN_STMT
|
|
_5 = state->enhancedFifoOutput.isPolling;
|
|
_6 = ~_5;
|
|
if (_6 != 0)
|
|
goto <bb 4>; [INV]
|
|
else
|
|
goto <bb 7>; [INV]
|
|
|
|
<bb 4> :
|
|
_7 = FlexCAN_IsEnhancedRxFifoAvailable (pBase);
|
|
if (_7 != 0)
|
|
goto <bb 5>; [INV]
|
|
else
|
|
goto <bb 7>; [INV]
|
|
|
|
<bb 5> :
|
|
# DEBUG BEGIN_STMT
|
|
_8 = FlexCAN_IsEnhancedRxFifoEnabled (pBase);
|
|
if (_8 != 0)
|
|
goto <bb 6>; [INV]
|
|
else
|
|
goto <bb 7>; [INV]
|
|
|
|
<bb 6> :
|
|
# DEBUG BEGIN_STMT
|
|
FlexCAN_SetEnhancedRxFifoIntAll (pBase, 1);
|
|
|
|
<bb 7> :
|
|
# DEBUG BEGIN_STMT
|
|
state->isIntActive = 1;
|
|
# DEBUG BEGIN_STMT
|
|
result = 0;
|
|
|
|
<bb 8> :
|
|
# DEBUG BEGIN_STMT
|
|
D.6585 = result;
|
|
return D.6585;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_Ip_ClearBuffStatusFlag (uint8 instance, uint8 msgBuffIdx)
|
|
{
|
|
struct FLEXCAN_Type * pBase;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = instance <= 5;
|
|
DevAssert (_1);
|
|
# DEBUG BEGIN_STMT
|
|
_2 = (int) instance;
|
|
pBase = g_Flexcan_Ip_aBase[_2];
|
|
# DEBUG BEGIN_STMT
|
|
if (msgBuffIdx == 255)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 4>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
FlexCAN_ClearEnhancedRxFifoIntStatusFlag (pBase, 30);
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
_3 = (long unsigned int) msgBuffIdx;
|
|
FlexCAN_ClearMsgBuffIntStatusFlag (pBase, _3);
|
|
|
|
<bb 5> :
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_Ip_GetBuffStatusFlag (uint8 instance, uint8 msgBuffIdx)
|
|
{
|
|
const struct FLEXCAN_Type * pBase;
|
|
boolean returnResult;
|
|
boolean D.6572;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
returnResult = 1;
|
|
# DEBUG BEGIN_STMT
|
|
_1 = instance <= 5;
|
|
DevAssert (_1);
|
|
# DEBUG BEGIN_STMT
|
|
_2 = (int) instance;
|
|
pBase = g_Flexcan_Ip_aBase[_2];
|
|
# DEBUG BEGIN_STMT
|
|
if (msgBuffIdx == 255)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 4>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
_3 = FlexCAN_GetEnhancedRxFIFOStatusFlag (pBase, 30);
|
|
returnResult = _3 == 1;
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
_4 = (long unsigned int) msgBuffIdx;
|
|
_5 = FlexCAN_GetBuffStatusFlag (pBase, _4);
|
|
returnResult = _5 == 1;
|
|
|
|
<bb 5> :
|
|
# DEBUG BEGIN_STMT
|
|
D.6572 = returnResult;
|
|
return D.6572;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_Ip_SetTxArbitrationStartDelay_Privileged (uint8 instance, uint8 value)
|
|
{
|
|
boolean freeze;
|
|
boolean disabled;
|
|
struct FLEXCAN_Type * pBase;
|
|
Flexcan_Ip_StatusType status;
|
|
Flexcan_Ip_StatusType result;
|
|
Flexcan_Ip_StatusType D.6567;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = instance <= 5;
|
|
DevAssert (_1);
|
|
# DEBUG BEGIN_STMT
|
|
result = 0;
|
|
# DEBUG BEGIN_STMT
|
|
status = 0;
|
|
# DEBUG BEGIN_STMT
|
|
_2 = (int) instance;
|
|
pBase = g_Flexcan_Ip_aBase[_2];
|
|
# DEBUG BEGIN_STMT
|
|
_3 = FlexCAN_IsEnabled (pBase);
|
|
_4 = (int) _3;
|
|
_5 = _4 != 0;
|
|
_6 = ~_5;
|
|
_7 = (int) _6;
|
|
disabled = (boolean) _7;
|
|
# DEBUG BEGIN_STMT
|
|
if (disabled != 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 4>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
result = FlexCAN_Enable (pBase);
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
freeze = FlexCAN_IsFreezeMode (pBase);
|
|
# DEBUG BEGIN_STMT
|
|
_8 = ~freeze;
|
|
if (_8 != 0)
|
|
goto <bb 5>; [INV]
|
|
else
|
|
goto <bb 7>; [INV]
|
|
|
|
<bb 5> :
|
|
if (result == 0)
|
|
goto <bb 6>; [INV]
|
|
else
|
|
goto <bb 7>; [INV]
|
|
|
|
<bb 6> :
|
|
# DEBUG BEGIN_STMT
|
|
result = 1;
|
|
|
|
<bb 7> :
|
|
# DEBUG BEGIN_STMT
|
|
if (result == 0)
|
|
goto <bb 8>; [INV]
|
|
else
|
|
goto <bb 9>; [INV]
|
|
|
|
<bb 8> :
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Enter_Can_CAN_EXCLUSIVE_AREA_17 ();
|
|
# DEBUG BEGIN_STMT
|
|
FlexCAN_SetTxArbitrationStartDelay (pBase, value);
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Exit_Can_CAN_EXCLUSIVE_AREA_17 ();
|
|
|
|
<bb 9> :
|
|
# DEBUG BEGIN_STMT
|
|
if (disabled != 0)
|
|
goto <bb 10>; [INV]
|
|
else
|
|
goto <bb 12>; [INV]
|
|
|
|
<bb 10> :
|
|
# DEBUG BEGIN_STMT
|
|
status = FlexCAN_Disable (pBase);
|
|
# DEBUG BEGIN_STMT
|
|
if (status != 0)
|
|
goto <bb 11>; [INV]
|
|
else
|
|
goto <bb 12>; [INV]
|
|
|
|
<bb 11> :
|
|
# DEBUG BEGIN_STMT
|
|
result = status;
|
|
|
|
<bb 12> :
|
|
# DEBUG BEGIN_STMT
|
|
D.6567 = result;
|
|
return D.6567;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_Ip_SetTDCOffset_Privileged (uint8 instance, boolean enable, uint8 offset)
|
|
{
|
|
boolean freeze;
|
|
boolean disabled;
|
|
struct FLEXCAN_Type * pBase;
|
|
Flexcan_Ip_StatusType status;
|
|
Flexcan_Ip_StatusType result;
|
|
Flexcan_Ip_StatusType D.6549;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = instance <= 5;
|
|
DevAssert (_1);
|
|
# DEBUG BEGIN_STMT
|
|
result = 0;
|
|
# DEBUG BEGIN_STMT
|
|
status = 0;
|
|
# DEBUG BEGIN_STMT
|
|
_2 = (int) instance;
|
|
pBase = g_Flexcan_Ip_aBase[_2];
|
|
# DEBUG BEGIN_STMT
|
|
_3 = FlexCAN_IsEnabled (pBase);
|
|
_4 = (int) _3;
|
|
_5 = _4 != 0;
|
|
_6 = ~_5;
|
|
_7 = (int) _6;
|
|
disabled = (boolean) _7;
|
|
# DEBUG BEGIN_STMT
|
|
if (disabled != 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 4>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
result = FlexCAN_Enable (pBase);
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
freeze = FlexCAN_IsFreezeMode (pBase);
|
|
# DEBUG BEGIN_STMT
|
|
_8 = ~freeze;
|
|
if (_8 != 0)
|
|
goto <bb 5>; [INV]
|
|
else
|
|
goto <bb 7>; [INV]
|
|
|
|
<bb 5> :
|
|
if (result == 0)
|
|
goto <bb 6>; [INV]
|
|
else
|
|
goto <bb 7>; [INV]
|
|
|
|
<bb 6> :
|
|
# DEBUG BEGIN_STMT
|
|
result = 1;
|
|
|
|
<bb 7> :
|
|
# DEBUG BEGIN_STMT
|
|
if (result == 0)
|
|
goto <bb 8>; [INV]
|
|
else
|
|
goto <bb 12>; [INV]
|
|
|
|
<bb 8> :
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Enter_Can_CAN_EXCLUSIVE_AREA_16 ();
|
|
# DEBUG BEGIN_STMT
|
|
_9 = pBase->CTRL2;
|
|
_10 = _9 & 8192;
|
|
if (_10 == 8192)
|
|
goto <bb 9>; [INV]
|
|
else
|
|
goto <bb 10>; [INV]
|
|
|
|
<bb 9> :
|
|
# DEBUG BEGIN_STMT
|
|
FlexCAN_SetEnhancedTDCOffset (pBase, enable, offset);
|
|
goto <bb 11>; [INV]
|
|
|
|
<bb 10> :
|
|
# DEBUG BEGIN_STMT
|
|
FlexCAN_SetTDCOffset (pBase, enable, offset);
|
|
|
|
<bb 11> :
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Exit_Can_CAN_EXCLUSIVE_AREA_16 ();
|
|
|
|
<bb 12> :
|
|
# DEBUG BEGIN_STMT
|
|
if (disabled != 0)
|
|
goto <bb 13>; [INV]
|
|
else
|
|
goto <bb 15>; [INV]
|
|
|
|
<bb 13> :
|
|
# DEBUG BEGIN_STMT
|
|
status = FlexCAN_Disable (pBase);
|
|
# DEBUG BEGIN_STMT
|
|
if (status != 0)
|
|
goto <bb 14>; [INV]
|
|
else
|
|
goto <bb 15>; [INV]
|
|
|
|
<bb 14> :
|
|
# DEBUG BEGIN_STMT
|
|
result = status;
|
|
|
|
<bb 15> :
|
|
# DEBUG BEGIN_STMT
|
|
D.6549 = result;
|
|
return D.6549;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_Ip_GetBitrateFD (uint8 instance, struct Flexcan_Ip_TimeSegmentType * bitrate)
|
|
{
|
|
boolean enhCbt;
|
|
const struct FLEXCAN_Type * pBase;
|
|
boolean D.6532;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = instance <= 5;
|
|
DevAssert (_1);
|
|
# DEBUG BEGIN_STMT
|
|
_2 = bitrate != 0B;
|
|
DevAssert (_2);
|
|
# DEBUG BEGIN_STMT
|
|
_3 = (int) instance;
|
|
pBase = g_Flexcan_Ip_aBase[_3];
|
|
# DEBUG BEGIN_STMT
|
|
enhCbt = FlexCAN_IsEnhCbtEnabled (pBase);
|
|
# DEBUG BEGIN_STMT
|
|
if (enhCbt != 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 4>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
FlexCAN_GetEnhancedDataTimeSegments (pBase, bitrate);
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
FlexCAN_GetFDTimeSegments (pBase, bitrate);
|
|
|
|
<bb 5> :
|
|
# DEBUG BEGIN_STMT
|
|
D.6532 = enhCbt;
|
|
return D.6532;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_Ip_SetBitrateCbt_Privileged (uint8 instance, const struct Flexcan_Ip_TimeSegmentType * bitrate, boolean bitRateSwitch)
|
|
{
|
|
boolean enhCbt;
|
|
boolean freeze;
|
|
boolean fd_enable;
|
|
boolean disabled;
|
|
struct FLEXCAN_Type * pBase;
|
|
Flexcan_Ip_StatusType status;
|
|
Flexcan_Ip_StatusType result;
|
|
Flexcan_Ip_StatusType D.6525;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = instance <= 5;
|
|
DevAssert (_1);
|
|
# DEBUG BEGIN_STMT
|
|
_2 = bitrate != 0B;
|
|
DevAssert (_2);
|
|
# DEBUG BEGIN_STMT
|
|
result = 0;
|
|
# DEBUG BEGIN_STMT
|
|
status = 0;
|
|
# DEBUG BEGIN_STMT
|
|
_3 = (int) instance;
|
|
pBase = g_Flexcan_Ip_aBase[_3];
|
|
# DEBUG BEGIN_STMT
|
|
_4 = FlexCAN_IsEnabled (pBase);
|
|
_5 = (int) _4;
|
|
_6 = _5 != 0;
|
|
_7 = ~_6;
|
|
_8 = (int) _7;
|
|
disabled = (boolean) _8;
|
|
# DEBUG BEGIN_STMT
|
|
fd_enable = FlexCAN_IsFDEnabled (pBase);
|
|
# DEBUG BEGIN_STMT
|
|
if (disabled != 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 4>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
result = FlexCAN_Enable (pBase);
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
freeze = FlexCAN_IsFreezeMode (pBase);
|
|
# DEBUG BEGIN_STMT
|
|
_9 = ~fd_enable;
|
|
if (_9 != 0)
|
|
goto <bb 7>; [INV]
|
|
else
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 5> :
|
|
_10 = ~freeze;
|
|
if (_10 != 0)
|
|
goto <bb 6>; [INV]
|
|
else
|
|
goto <bb 8>; [INV]
|
|
|
|
<bb 6> :
|
|
if (result == 0)
|
|
goto <bb 7>; [INV]
|
|
else
|
|
goto <bb 8>; [INV]
|
|
|
|
<bb 7> :
|
|
# DEBUG BEGIN_STMT
|
|
result = 1;
|
|
|
|
<bb 8> :
|
|
# DEBUG BEGIN_STMT
|
|
if (result == 0)
|
|
goto <bb 9>; [INV]
|
|
else
|
|
goto <bb 13>; [INV]
|
|
|
|
<bb 9> :
|
|
# DEBUG BEGIN_STMT
|
|
enhCbt = FlexCAN_IsEnhCbtEnabled (pBase);
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Enter_Can_CAN_EXCLUSIVE_AREA_15 ();
|
|
# DEBUG BEGIN_STMT
|
|
FlexCAN_SetFDEnabled (pBase, fd_enable, bitRateSwitch);
|
|
# DEBUG BEGIN_STMT
|
|
if (enhCbt != 0)
|
|
goto <bb 10>; [INV]
|
|
else
|
|
goto <bb 11>; [INV]
|
|
|
|
<bb 10> :
|
|
# DEBUG BEGIN_STMT
|
|
FlexCAN_SetEnhancedDataTimeSegments (pBase, bitrate);
|
|
goto <bb 12>; [INV]
|
|
|
|
<bb 11> :
|
|
# DEBUG BEGIN_STMT
|
|
FlexCAN_SetFDTimeSegments (pBase, bitrate);
|
|
|
|
<bb 12> :
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Exit_Can_CAN_EXCLUSIVE_AREA_15 ();
|
|
|
|
<bb 13> :
|
|
# DEBUG BEGIN_STMT
|
|
if (disabled != 0)
|
|
goto <bb 14>; [INV]
|
|
else
|
|
goto <bb 16>; [INV]
|
|
|
|
<bb 14> :
|
|
# DEBUG BEGIN_STMT
|
|
status = FlexCAN_Disable (pBase);
|
|
# DEBUG BEGIN_STMT
|
|
if (status != 0)
|
|
goto <bb 15>; [INV]
|
|
else
|
|
goto <bb 16>; [INV]
|
|
|
|
<bb 15> :
|
|
# DEBUG BEGIN_STMT
|
|
result = status;
|
|
|
|
<bb 16> :
|
|
# DEBUG BEGIN_STMT
|
|
D.6525 = result;
|
|
return D.6525;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_Ip_GetTDCValue_Privileged (uint8 u8Instance)
|
|
{
|
|
boolean disabled;
|
|
struct FLEXCAN_Type * pBase;
|
|
Flexcan_Ip_StatusType result;
|
|
uint8 value;
|
|
uint8 D.6508;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
value = 0;
|
|
# DEBUG BEGIN_STMT
|
|
result = 0;
|
|
# DEBUG BEGIN_STMT
|
|
_1 = u8Instance <= 5;
|
|
DevAssert (_1);
|
|
# DEBUG BEGIN_STMT
|
|
_2 = (int) u8Instance;
|
|
pBase = g_Flexcan_Ip_aBase[_2];
|
|
# DEBUG BEGIN_STMT
|
|
_3 = FlexCAN_IsEnabled (pBase);
|
|
_4 = (int) _3;
|
|
_5 = _4 != 0;
|
|
_6 = ~_5;
|
|
_7 = (int) _6;
|
|
disabled = (boolean) _7;
|
|
# DEBUG BEGIN_STMT
|
|
if (disabled != 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 4>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
result = FlexCAN_Enable (pBase);
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
if (result == 0)
|
|
goto <bb 5>; [INV]
|
|
else
|
|
goto <bb 8>; [INV]
|
|
|
|
<bb 5> :
|
|
# DEBUG BEGIN_STMT
|
|
_8 = FlexCAN_IsEnhCbtEnabled (pBase);
|
|
if (_8 != 0)
|
|
goto <bb 6>; [INV]
|
|
else
|
|
goto <bb 7>; [INV]
|
|
|
|
<bb 6> :
|
|
# DEBUG BEGIN_STMT
|
|
_9 = pBase->ETDC;
|
|
value = (uint8) _9;
|
|
goto <bb 8>; [INV]
|
|
|
|
<bb 7> :
|
|
# DEBUG BEGIN_STMT
|
|
_10 = pBase->FDCTRL;
|
|
_11 = (unsigned char) _10;
|
|
value = _11 & 63;
|
|
|
|
<bb 8> :
|
|
# DEBUG BEGIN_STMT
|
|
if (disabled != 0)
|
|
goto <bb 9>; [INV]
|
|
else
|
|
goto <bb 10>; [INV]
|
|
|
|
<bb 9> :
|
|
# DEBUG BEGIN_STMT
|
|
FlexCAN_Disable (pBase);
|
|
|
|
<bb 10> :
|
|
# DEBUG BEGIN_STMT
|
|
D.6508 = value;
|
|
return D.6508;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_Ip_GetTDCFail_Privileged (uint8 u8Instance)
|
|
{
|
|
boolean disabled;
|
|
struct FLEXCAN_Type * pBase;
|
|
Flexcan_Ip_StatusType result;
|
|
boolean value;
|
|
boolean D.6497;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
value = 0;
|
|
# DEBUG BEGIN_STMT
|
|
result = 0;
|
|
# DEBUG BEGIN_STMT
|
|
_1 = u8Instance <= 5;
|
|
DevAssert (_1);
|
|
# DEBUG BEGIN_STMT
|
|
_2 = (int) u8Instance;
|
|
pBase = g_Flexcan_Ip_aBase[_2];
|
|
# DEBUG BEGIN_STMT
|
|
_3 = FlexCAN_IsEnabled (pBase);
|
|
_4 = (int) _3;
|
|
_5 = _4 != 0;
|
|
_6 = ~_5;
|
|
_7 = (int) _6;
|
|
disabled = (boolean) _7;
|
|
# DEBUG BEGIN_STMT
|
|
if (disabled != 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 4>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
result = FlexCAN_Enable (pBase);
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
if (result == 0)
|
|
goto <bb 5>; [INV]
|
|
else
|
|
goto <bb 8>; [INV]
|
|
|
|
<bb 5> :
|
|
# DEBUG BEGIN_STMT
|
|
_8 = FlexCAN_IsEnhCbtEnabled (pBase);
|
|
if (_8 != 0)
|
|
goto <bb 6>; [INV]
|
|
else
|
|
goto <bb 7>; [INV]
|
|
|
|
<bb 6> :
|
|
# DEBUG BEGIN_STMT
|
|
_9 = pBase->ETDC;
|
|
_10 = _9 & 32768;
|
|
value = _10 == 32768;
|
|
goto <bb 8>; [INV]
|
|
|
|
<bb 7> :
|
|
# DEBUG BEGIN_STMT
|
|
_11 = pBase->FDCTRL;
|
|
_12 = _11 & 16384;
|
|
value = _12 == 16384;
|
|
|
|
<bb 8> :
|
|
# DEBUG BEGIN_STMT
|
|
if (disabled != 0)
|
|
goto <bb 9>; [INV]
|
|
else
|
|
goto <bb 10>; [INV]
|
|
|
|
<bb 9> :
|
|
# DEBUG BEGIN_STMT
|
|
FlexCAN_Disable (pBase);
|
|
|
|
<bb 10> :
|
|
# DEBUG BEGIN_STMT
|
|
D.6497 = value;
|
|
return D.6497;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_Ip_ClearTDCFail_Privileged (uint8 u8Instance)
|
|
{
|
|
boolean disabled;
|
|
struct FLEXCAN_Type * pBase;
|
|
Flexcan_Ip_StatusType result;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
result = 0;
|
|
# DEBUG BEGIN_STMT
|
|
_1 = u8Instance <= 5;
|
|
DevAssert (_1);
|
|
# DEBUG BEGIN_STMT
|
|
_2 = (int) u8Instance;
|
|
pBase = g_Flexcan_Ip_aBase[_2];
|
|
# DEBUG BEGIN_STMT
|
|
_3 = FlexCAN_IsEnabled (pBase);
|
|
_4 = (int) _3;
|
|
_5 = _4 != 0;
|
|
_6 = ~_5;
|
|
_7 = (int) _6;
|
|
disabled = (boolean) _7;
|
|
# DEBUG BEGIN_STMT
|
|
if (disabled != 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 4>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
result = FlexCAN_Enable (pBase);
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
if (result == 0)
|
|
goto <bb 5>; [INV]
|
|
else
|
|
goto <bb 8>; [INV]
|
|
|
|
<bb 5> :
|
|
# DEBUG BEGIN_STMT
|
|
_8 = FlexCAN_IsEnhCbtEnabled (pBase);
|
|
if (_8 != 0)
|
|
goto <bb 6>; [INV]
|
|
else
|
|
goto <bb 7>; [INV]
|
|
|
|
<bb 6> :
|
|
# DEBUG BEGIN_STMT
|
|
_9 = pBase->ETDC;
|
|
_10 = _9 | 32768;
|
|
pBase->ETDC = _10;
|
|
goto <bb 8>; [INV]
|
|
|
|
<bb 7> :
|
|
# DEBUG BEGIN_STMT
|
|
_11 = pBase->FDCTRL;
|
|
_12 = _11 | 16384;
|
|
pBase->FDCTRL = _12;
|
|
|
|
<bb 8> :
|
|
# DEBUG BEGIN_STMT
|
|
if (disabled != 0)
|
|
goto <bb 9>; [INV]
|
|
else
|
|
goto <bb 10>; [INV]
|
|
|
|
<bb 9> :
|
|
# DEBUG BEGIN_STMT
|
|
FlexCAN_Disable (pBase);
|
|
|
|
<bb 10> :
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_Ip_GetBitrate (uint8 instance, struct Flexcan_Ip_TimeSegmentType * bitrate)
|
|
{
|
|
boolean enhCbt;
|
|
const struct FLEXCAN_Type * pBase;
|
|
boolean D.6475;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = instance <= 5;
|
|
DevAssert (_1);
|
|
# DEBUG BEGIN_STMT
|
|
_2 = bitrate != 0B;
|
|
DevAssert (_2);
|
|
# DEBUG BEGIN_STMT
|
|
_3 = (int) instance;
|
|
pBase = g_Flexcan_Ip_aBase[_3];
|
|
# DEBUG BEGIN_STMT
|
|
enhCbt = 0;
|
|
# DEBUG BEGIN_STMT
|
|
enhCbt = FlexCAN_IsEnhCbtEnabled (pBase);
|
|
# DEBUG BEGIN_STMT
|
|
if (enhCbt != 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 4>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
FlexCAN_GetEnhancedNominalTimeSegments (pBase, bitrate);
|
|
goto <bb 7>; [INV]
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
_4 = FlexCAN_IsExCbtEnabled (pBase);
|
|
if (_4 != 0)
|
|
goto <bb 5>; [INV]
|
|
else
|
|
goto <bb 6>; [INV]
|
|
|
|
<bb 5> :
|
|
# DEBUG BEGIN_STMT
|
|
FlexCAN_GetExtendedTimeSegments (pBase, bitrate);
|
|
goto <bb 7>; [INV]
|
|
|
|
<bb 6> :
|
|
# DEBUG BEGIN_STMT
|
|
FlexCAN_GetTimeSegments (pBase, bitrate);
|
|
|
|
<bb 7> :
|
|
# DEBUG BEGIN_STMT
|
|
D.6475 = enhCbt;
|
|
return D.6475;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_Ip_SetBitrate_Privileged (uint8 instance, const struct Flexcan_Ip_TimeSegmentType * bitrate, boolean enhExt)
|
|
{
|
|
boolean freeze;
|
|
boolean disabled;
|
|
struct FLEXCAN_Type * pBase;
|
|
Flexcan_Ip_StatusType status;
|
|
Flexcan_Ip_StatusType result;
|
|
Flexcan_Ip_StatusType D.6461;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = instance <= 5;
|
|
DevAssert (_1);
|
|
# DEBUG BEGIN_STMT
|
|
_2 = bitrate != 0B;
|
|
DevAssert (_2);
|
|
# DEBUG BEGIN_STMT
|
|
result = 0;
|
|
# DEBUG BEGIN_STMT
|
|
status = 0;
|
|
# DEBUG BEGIN_STMT
|
|
_3 = (int) instance;
|
|
pBase = g_Flexcan_Ip_aBase[_3];
|
|
# DEBUG BEGIN_STMT
|
|
_4 = FlexCAN_IsEnabled (pBase);
|
|
_5 = (int) _4;
|
|
_6 = _5 != 0;
|
|
_7 = ~_6;
|
|
_8 = (int) _7;
|
|
disabled = (boolean) _8;
|
|
# DEBUG BEGIN_STMT
|
|
if (disabled != 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 4>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
result = FlexCAN_Enable (pBase);
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
freeze = FlexCAN_IsFreezeMode (pBase);
|
|
# DEBUG BEGIN_STMT
|
|
_9 = ~freeze;
|
|
if (_9 != 0)
|
|
goto <bb 5>; [INV]
|
|
else
|
|
goto <bb 7>; [INV]
|
|
|
|
<bb 5> :
|
|
if (result == 0)
|
|
goto <bb 6>; [INV]
|
|
else
|
|
goto <bb 7>; [INV]
|
|
|
|
<bb 6> :
|
|
# DEBUG BEGIN_STMT
|
|
result = 1;
|
|
|
|
<bb 7> :
|
|
# DEBUG BEGIN_STMT
|
|
if (result == 0)
|
|
goto <bb 8>; [INV]
|
|
else
|
|
goto <bb 14>; [INV]
|
|
|
|
<bb 8> :
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Enter_Can_CAN_EXCLUSIVE_AREA_14 ();
|
|
# DEBUG BEGIN_STMT
|
|
FlexCAN_EnhCbtEnable (pBase, enhExt);
|
|
# DEBUG BEGIN_STMT
|
|
if (enhExt != 0)
|
|
goto <bb 9>; [INV]
|
|
else
|
|
goto <bb 10>; [INV]
|
|
|
|
<bb 9> :
|
|
# DEBUG BEGIN_STMT
|
|
FlexCAN_SetEnhancedNominalTimeSegments (pBase, bitrate);
|
|
goto <bb 13>; [INV]
|
|
|
|
<bb 10> :
|
|
# DEBUG BEGIN_STMT
|
|
_10 = FlexCAN_IsExCbtEnabled (pBase);
|
|
if (_10 != 0)
|
|
goto <bb 11>; [INV]
|
|
else
|
|
goto <bb 12>; [INV]
|
|
|
|
<bb 11> :
|
|
# DEBUG BEGIN_STMT
|
|
FlexCAN_SetExtendedTimeSegments (pBase, bitrate);
|
|
goto <bb 13>; [INV]
|
|
|
|
<bb 12> :
|
|
# DEBUG BEGIN_STMT
|
|
FlexCAN_SetTimeSegments (pBase, bitrate);
|
|
|
|
<bb 13> :
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Exit_Can_CAN_EXCLUSIVE_AREA_14 ();
|
|
|
|
<bb 14> :
|
|
# DEBUG BEGIN_STMT
|
|
if (disabled != 0)
|
|
goto <bb 15>; [INV]
|
|
else
|
|
goto <bb 17>; [INV]
|
|
|
|
<bb 15> :
|
|
# DEBUG BEGIN_STMT
|
|
status = FlexCAN_Disable (pBase);
|
|
# DEBUG BEGIN_STMT
|
|
if (status != 0)
|
|
goto <bb 16>; [INV]
|
|
else
|
|
goto <bb 17>; [INV]
|
|
|
|
<bb 16> :
|
|
# DEBUG BEGIN_STMT
|
|
result = status;
|
|
|
|
<bb 17> :
|
|
# DEBUG BEGIN_STMT
|
|
D.6461 = result;
|
|
return D.6461;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_Ip_SetRxMaskType_Privileged (uint8 instance, Flexcan_Ip_RxMaskType type)
|
|
{
|
|
boolean freeze;
|
|
boolean disabled;
|
|
struct FLEXCAN_Type * pBase;
|
|
Flexcan_Ip_StatusType status;
|
|
Flexcan_Ip_StatusType result;
|
|
Flexcan_Ip_StatusType D.6438;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = instance <= 5;
|
|
DevAssert (_1);
|
|
# DEBUG BEGIN_STMT
|
|
result = 0;
|
|
# DEBUG BEGIN_STMT
|
|
status = 0;
|
|
# DEBUG BEGIN_STMT
|
|
_2 = (int) instance;
|
|
pBase = g_Flexcan_Ip_aBase[_2];
|
|
# DEBUG BEGIN_STMT
|
|
_3 = FlexCAN_IsEnabled (pBase);
|
|
_4 = (int) _3;
|
|
_5 = _4 != 0;
|
|
_6 = ~_5;
|
|
_7 = (int) _6;
|
|
disabled = (boolean) _7;
|
|
# DEBUG BEGIN_STMT
|
|
if (disabled != 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 4>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
result = FlexCAN_Enable (pBase);
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
freeze = FlexCAN_IsFreezeMode (pBase);
|
|
# DEBUG BEGIN_STMT
|
|
_8 = ~freeze;
|
|
if (_8 != 0)
|
|
goto <bb 5>; [INV]
|
|
else
|
|
goto <bb 7>; [INV]
|
|
|
|
<bb 5> :
|
|
if (result == 0)
|
|
goto <bb 6>; [INV]
|
|
else
|
|
goto <bb 7>; [INV]
|
|
|
|
<bb 6> :
|
|
# DEBUG BEGIN_STMT
|
|
result = 1;
|
|
|
|
<bb 7> :
|
|
# DEBUG BEGIN_STMT
|
|
if (result == 0)
|
|
goto <bb 8>; [INV]
|
|
else
|
|
goto <bb 9>; [INV]
|
|
|
|
<bb 8> :
|
|
# DEBUG BEGIN_STMT
|
|
FlexCAN_SetRxMaskType (pBase, type);
|
|
|
|
<bb 9> :
|
|
# DEBUG BEGIN_STMT
|
|
if (disabled != 0)
|
|
goto <bb 10>; [INV]
|
|
else
|
|
goto <bb 12>; [INV]
|
|
|
|
<bb 10> :
|
|
# DEBUG BEGIN_STMT
|
|
status = FlexCAN_Disable (pBase);
|
|
# DEBUG BEGIN_STMT
|
|
if (status != 0)
|
|
goto <bb 11>; [INV]
|
|
else
|
|
goto <bb 12>; [INV]
|
|
|
|
<bb 11> :
|
|
# DEBUG BEGIN_STMT
|
|
result = status;
|
|
|
|
<bb 12> :
|
|
# DEBUG BEGIN_STMT
|
|
D.6438 = result;
|
|
return D.6438;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_Ip_SetStopMode_Privileged (uint8 instance)
|
|
{
|
|
Flexcan_Ip_StatusType status;
|
|
struct FLEXCAN_Type * pBase;
|
|
Flexcan_Ip_StatusType D.6424;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = instance <= 5;
|
|
DevAssert (_1);
|
|
# DEBUG BEGIN_STMT
|
|
_2 = (int) instance;
|
|
pBase = g_Flexcan_Ip_aBase[_2];
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
status = FlexCAN_EnterFreezeMode (pBase);
|
|
# DEBUG BEGIN_STMT
|
|
if (status == 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 4>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
status = FlexCAN_Disable (pBase);
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
D.6424 = status;
|
|
return D.6424;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_Ip_SetStartMode_Privileged (uint8 instance)
|
|
{
|
|
struct FLEXCAN_Type * pBase;
|
|
Flexcan_Ip_StatusType D.6420;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = instance <= 5;
|
|
DevAssert (_1);
|
|
# DEBUG BEGIN_STMT
|
|
_2 = (int) instance;
|
|
pBase = g_Flexcan_Ip_aBase[_2];
|
|
# DEBUG BEGIN_STMT
|
|
_3 = pBase->MCR;
|
|
_4 = _3 & 2147483647;
|
|
pBase->MCR = _4;
|
|
# DEBUG BEGIN_STMT
|
|
D.6420 = FlexCAN_ExitFreezeMode (pBase);
|
|
return D.6420;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_Ip_GetStartMode_Privileged (uint8 instance)
|
|
{
|
|
const struct FLEXCAN_Type * base;
|
|
boolean D.6418;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) instance;
|
|
base = g_Flexcan_Ip_aBase[_1];
|
|
# DEBUG BEGIN_STMT
|
|
_2 = base->MCR;
|
|
_3 = _2 & 17825792;
|
|
D.6418 = _3 == 0;
|
|
return D.6418;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_Ip_GetStopMode_Privileged (uint8 instance)
|
|
{
|
|
const struct FLEXCAN_Type * base;
|
|
boolean D.6416;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) instance;
|
|
base = g_Flexcan_Ip_aBase[_1];
|
|
# DEBUG BEGIN_STMT
|
|
_2 = base->MCR;
|
|
_3 = _2 & 1048576;
|
|
D.6416 = _3 == 1048576;
|
|
return D.6416;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_Ip_MainFunctionWrite (uint8 instance, uint8 mb_idx)
|
|
{
|
|
struct Flexcan_Ip_StateType * state;
|
|
struct FLEXCAN_Type * base;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) instance;
|
|
base = g_Flexcan_Ip_aBase[_1];
|
|
# DEBUG BEGIN_STMT
|
|
_2 = (int) instance;
|
|
state = g_flexcan_Ip_StatePtr[_2];
|
|
# DEBUG BEGIN_STMT
|
|
_3 = instance <= 5;
|
|
DevAssert (_3);
|
|
# DEBUG BEGIN_STMT
|
|
_4 = (long unsigned int) mb_idx;
|
|
_5 = FlexCAN_GetBuffStatusFlag (base, _4);
|
|
if (_5 != 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 4>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
_6 = (long unsigned int) mb_idx;
|
|
_7 = (int) mb_idx;
|
|
_8 = FlexCAN_GetMsgBuffTimestamp (base, _6);
|
|
state->mbs[_7].time_stamp = _8;
|
|
# DEBUG BEGIN_STMT
|
|
FlexCAN_UnlockRxMsgBuff (base);
|
|
# DEBUG BEGIN_STMT
|
|
_9 = (long unsigned int) mb_idx;
|
|
FlexCAN_ClearMsgBuffIntStatusFlag (base, _9);
|
|
# DEBUG BEGIN_STMT
|
|
_10 = (int) mb_idx;
|
|
state->mbs[_10].state = 0;
|
|
|
|
<bb 4> :
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_Ip_MainFunctionBusOff_Privileged (uint8 instance)
|
|
{
|
|
uint32 u32ErrStatus;
|
|
const struct Flexcan_Ip_StateType * state;
|
|
struct FLEXCAN_Type * base;
|
|
Flexcan_Ip_StatusType eRetVal;
|
|
Flexcan_Ip_StatusType D.6412;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
eRetVal = 1;
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) instance;
|
|
base = g_Flexcan_Ip_aBase[_1];
|
|
# DEBUG BEGIN_STMT
|
|
_2 = (int) instance;
|
|
state = g_flexcan_Ip_StatePtr[_2];
|
|
# DEBUG BEGIN_STMT
|
|
u32ErrStatus = 0;
|
|
# DEBUG BEGIN_STMT
|
|
_3 = instance <= 5;
|
|
DevAssert (_3);
|
|
# DEBUG BEGIN_STMT
|
|
u32ErrStatus = base->ESR1;
|
|
# DEBUG BEGIN_STMT
|
|
_4 = u32ErrStatus & 4;
|
|
if (_4 != 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 6>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
_5 = state->error_callback;
|
|
if (_5 != 0B)
|
|
goto <bb 4>; [INV]
|
|
else
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
_6 = state->error_callback;
|
|
_6 (instance, 11, u32ErrStatus, state);
|
|
|
|
<bb 5> :
|
|
# DEBUG BEGIN_STMT
|
|
base->ESR1 = 4;
|
|
# DEBUG BEGIN_STMT
|
|
eRetVal = 0;
|
|
|
|
<bb 6> :
|
|
# DEBUG BEGIN_STMT
|
|
D.6412 = eRetVal;
|
|
return D.6412;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_Ip_MainFunctionRead (uint8 instance, uint8 mb_idx)
|
|
{
|
|
const struct Flexcan_Ip_StateType * state;
|
|
const struct FLEXCAN_Type * base;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) instance;
|
|
base = g_Flexcan_Ip_aBase[_1];
|
|
# DEBUG BEGIN_STMT
|
|
_2 = (int) instance;
|
|
state = g_flexcan_Ip_StatePtr[_2];
|
|
# DEBUG BEGIN_STMT
|
|
_3 = instance <= 5;
|
|
DevAssert (_3);
|
|
# DEBUG BEGIN_STMT
|
|
_4 = mb_idx + 160;
|
|
_5 = _4 > 158;
|
|
DevAssert (_5);
|
|
# DEBUG BEGIN_STMT
|
|
if (mb_idx == 255)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 7>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
_6 = FlexCAN_IsEnhancedRxFifoAvailable (base);
|
|
if (_6 != 0)
|
|
goto <bb 4>; [INV]
|
|
else
|
|
goto <bb 15>; [INV]
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
_7 = FlexCAN_IsEnhancedRxFifoEnabled (base);
|
|
if (_7 != 0)
|
|
goto <bb 5>; [INV]
|
|
else
|
|
goto <bb 15>; [INV]
|
|
|
|
<bb 5> :
|
|
# DEBUG BEGIN_STMT
|
|
_8 = FlexCAN_GetEnhancedRxFIFOStatusFlag (base, 28);
|
|
if (_8 != 0)
|
|
goto <bb 6>; [INV]
|
|
else
|
|
goto <bb 15>; [INV]
|
|
|
|
<bb 6> :
|
|
# DEBUG BEGIN_STMT
|
|
FlexCAN_IRQHandlerEnhancedRxFIFO (instance, 28);
|
|
goto <bb 15>; [INV]
|
|
|
|
<bb 7> :
|
|
# DEBUG BEGIN_STMT
|
|
_9 = state->bIsLegacyFifoEn;
|
|
if (_9 != 0)
|
|
goto <bb 8>; [INV]
|
|
else
|
|
goto <bb 12>; [INV]
|
|
|
|
<bb 8> :
|
|
if (mb_idx <= 7)
|
|
goto <bb 9>; [INV]
|
|
else
|
|
goto <bb 12>; [INV]
|
|
|
|
<bb 9> :
|
|
# DEBUG BEGIN_STMT
|
|
if (mb_idx == 0)
|
|
goto <bb 10>; [INV]
|
|
else
|
|
goto <bb 15>; [INV]
|
|
|
|
<bb 10> :
|
|
# DEBUG BEGIN_STMT
|
|
_10 = FlexCAN_GetBuffStatusFlag (base, 5);
|
|
if (_10 != 0)
|
|
goto <bb 11>; [INV]
|
|
else
|
|
goto <bb 15>; [INV]
|
|
|
|
<bb 11> :
|
|
# DEBUG BEGIN_STMT
|
|
FlexCAN_IRQHandlerRxFIFO (instance, 5);
|
|
goto <bb 15>; [INV]
|
|
|
|
<bb 12> :
|
|
# DEBUG BEGIN_STMT
|
|
_11 = (long unsigned int) mb_idx;
|
|
_12 = FlexCAN_GetBuffStatusFlag (base, _11);
|
|
if (_12 != 0)
|
|
goto <bb 13>; [INV]
|
|
else
|
|
goto <bb 15>; [INV]
|
|
|
|
<bb 13> :
|
|
# DEBUG BEGIN_STMT
|
|
_13 = (int) mb_idx;
|
|
_14 = state->mbs[_13].state;
|
|
if (_14 == 1)
|
|
goto <bb 14>; [INV]
|
|
else
|
|
goto <bb 15>; [INV]
|
|
|
|
<bb 14> :
|
|
# DEBUG BEGIN_STMT
|
|
_15 = (long unsigned int) mb_idx;
|
|
FlexCAN_IRQHandlerRxMB (instance, _15);
|
|
|
|
<bb 15> :
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_Ip_Deinit_Privileged (uint8 instance)
|
|
{
|
|
Flexcan_Ip_StatusType result;
|
|
struct FLEXCAN_Type * base;
|
|
Flexcan_Ip_StatusType D.6379;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) instance;
|
|
base = g_Flexcan_Ip_aBase[_1];
|
|
# DEBUG BEGIN_STMT
|
|
result = 1;
|
|
# DEBUG BEGIN_STMT
|
|
_2 = instance <= 5;
|
|
DevAssert (_2);
|
|
# DEBUG BEGIN_STMT
|
|
result = FlexCAN_EnterFreezeMode (base);
|
|
# DEBUG BEGIN_STMT
|
|
if (result == 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 4>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
FlexCAN_SetRegDefaultVal (base);
|
|
# DEBUG BEGIN_STMT
|
|
FlexCAN_Disable (base);
|
|
# DEBUG BEGIN_STMT
|
|
_3 = (int) instance;
|
|
g_flexcan_Ip_StatePtr[_3] = 0B;
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
D.6379 = result;
|
|
return D.6379;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_Ip_SetRxFifoGlobalMask_Privileged (uint8 instance, uint32 mask)
|
|
{
|
|
boolean freeze;
|
|
boolean disabled;
|
|
struct FLEXCAN_Type * pBase;
|
|
Flexcan_Ip_StatusType status;
|
|
Flexcan_Ip_StatusType result;
|
|
Flexcan_Ip_StatusType D.6375;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = instance <= 5;
|
|
DevAssert (_1);
|
|
# DEBUG BEGIN_STMT
|
|
result = 0;
|
|
# DEBUG BEGIN_STMT
|
|
status = 0;
|
|
# DEBUG BEGIN_STMT
|
|
_2 = (int) instance;
|
|
pBase = g_Flexcan_Ip_aBase[_2];
|
|
# DEBUG BEGIN_STMT
|
|
_3 = FlexCAN_IsEnabled (pBase);
|
|
_4 = (int) _3;
|
|
_5 = _4 != 0;
|
|
_6 = ~_5;
|
|
_7 = (int) _6;
|
|
disabled = (boolean) _7;
|
|
# DEBUG BEGIN_STMT
|
|
if (disabled != 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 4>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
result = FlexCAN_Enable (pBase);
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
freeze = FlexCAN_IsFreezeMode (pBase);
|
|
# DEBUG BEGIN_STMT
|
|
_8 = ~freeze;
|
|
if (_8 != 0)
|
|
goto <bb 5>; [INV]
|
|
else
|
|
goto <bb 7>; [INV]
|
|
|
|
<bb 5> :
|
|
if (result == 0)
|
|
goto <bb 6>; [INV]
|
|
else
|
|
goto <bb 7>; [INV]
|
|
|
|
<bb 6> :
|
|
# DEBUG BEGIN_STMT
|
|
result = 1;
|
|
|
|
<bb 7> :
|
|
# DEBUG BEGIN_STMT
|
|
if (result == 0)
|
|
goto <bb 8>; [INV]
|
|
else
|
|
goto <bb 9>; [INV]
|
|
|
|
<bb 8> :
|
|
# DEBUG BEGIN_STMT
|
|
FlexCAN_SetRxFifoGlobalMask (pBase, mask);
|
|
|
|
<bb 9> :
|
|
# DEBUG BEGIN_STMT
|
|
if (disabled != 0)
|
|
goto <bb 10>; [INV]
|
|
else
|
|
goto <bb 12>; [INV]
|
|
|
|
<bb 10> :
|
|
# DEBUG BEGIN_STMT
|
|
status = FlexCAN_Disable (pBase);
|
|
# DEBUG BEGIN_STMT
|
|
if (status != 0)
|
|
goto <bb 11>; [INV]
|
|
else
|
|
goto <bb 12>; [INV]
|
|
|
|
<bb 11> :
|
|
# DEBUG BEGIN_STMT
|
|
result = status;
|
|
|
|
<bb 12> :
|
|
# DEBUG BEGIN_STMT
|
|
D.6375 = result;
|
|
return D.6375;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_Ip_SetRxIndividualMask_Privileged (uint8 instance, uint8 mb_idx, uint32 mask)
|
|
{
|
|
boolean disabled;
|
|
boolean freeze;
|
|
struct FLEXCAN_Type * pBase;
|
|
Flexcan_Ip_StatusType status;
|
|
Flexcan_Ip_StatusType result;
|
|
Flexcan_Ip_StatusType D.6361;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
result = 0;
|
|
# DEBUG BEGIN_STMT
|
|
status = 0;
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) instance;
|
|
pBase = g_Flexcan_Ip_aBase[_1];
|
|
# DEBUG BEGIN_STMT
|
|
freeze = 0;
|
|
# DEBUG BEGIN_STMT
|
|
_2 = instance <= 5;
|
|
DevAssert (_2);
|
|
# DEBUG BEGIN_STMT
|
|
_3 = (long unsigned int) mb_idx;
|
|
_4 = pBase->MCR;
|
|
_5 = _4 & 127;
|
|
if (_3 > _5)
|
|
goto <bb 4>; [INV]
|
|
else
|
|
goto <bb 3>; [INV]
|
|
|
|
<bb 3> :
|
|
if (mb_idx > 95)
|
|
goto <bb 4>; [INV]
|
|
else
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
result = 4;
|
|
goto <bb 15>; [INV]
|
|
|
|
<bb 5> :
|
|
# DEBUG BEGIN_STMT
|
|
_6 = FlexCAN_IsEnabled (pBase);
|
|
_7 = (int) _6;
|
|
_8 = _7 != 0;
|
|
_9 = ~_8;
|
|
_10 = (int) _9;
|
|
disabled = (boolean) _10;
|
|
# DEBUG BEGIN_STMT
|
|
if (disabled != 0)
|
|
goto <bb 6>; [INV]
|
|
else
|
|
goto <bb 7>; [INV]
|
|
|
|
<bb 6> :
|
|
# DEBUG BEGIN_STMT
|
|
result = FlexCAN_Enable (pBase);
|
|
|
|
<bb 7> :
|
|
# DEBUG BEGIN_STMT
|
|
freeze = FlexCAN_IsFreezeMode (pBase);
|
|
# DEBUG BEGIN_STMT
|
|
_11 = ~freeze;
|
|
if (_11 != 0)
|
|
goto <bb 8>; [INV]
|
|
else
|
|
goto <bb 10>; [INV]
|
|
|
|
<bb 8> :
|
|
if (result == 0)
|
|
goto <bb 9>; [INV]
|
|
else
|
|
goto <bb 10>; [INV]
|
|
|
|
<bb 9> :
|
|
# DEBUG BEGIN_STMT
|
|
result = 1;
|
|
|
|
<bb 10> :
|
|
# DEBUG BEGIN_STMT
|
|
if (result == 0)
|
|
goto <bb 11>; [INV]
|
|
else
|
|
goto <bb 12>; [INV]
|
|
|
|
<bb 11> :
|
|
# DEBUG BEGIN_STMT
|
|
_12 = (long unsigned int) mb_idx;
|
|
FlexCAN_SetRxIndividualMask (pBase, _12, mask);
|
|
|
|
<bb 12> :
|
|
# DEBUG BEGIN_STMT
|
|
if (disabled != 0)
|
|
goto <bb 13>; [INV]
|
|
else
|
|
goto <bb 15>; [INV]
|
|
|
|
<bb 13> :
|
|
# DEBUG BEGIN_STMT
|
|
status = FlexCAN_Disable (pBase);
|
|
# DEBUG BEGIN_STMT
|
|
if (status != 0)
|
|
goto <bb 14>; [INV]
|
|
else
|
|
goto <bb 15>; [INV]
|
|
|
|
<bb 14> :
|
|
# DEBUG BEGIN_STMT
|
|
result = status;
|
|
|
|
<bb 15> :
|
|
# DEBUG BEGIN_STMT
|
|
D.6361 = result;
|
|
return D.6361;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_Ip_ExitFreezeMode_Privileged (uint8 instance)
|
|
{
|
|
struct FLEXCAN_Type * base;
|
|
Flexcan_Ip_StatusType D.6343;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) instance;
|
|
base = g_Flexcan_Ip_aBase[_1];
|
|
# DEBUG BEGIN_STMT
|
|
D.6343 = FlexCAN_ExitFreezeMode (base);
|
|
return D.6343;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_Ip_EnterFreezeMode_Privileged (uint8 instance)
|
|
{
|
|
struct FLEXCAN_Type * base;
|
|
Flexcan_Ip_StatusType D.6341;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) instance;
|
|
base = g_Flexcan_Ip_aBase[_1];
|
|
# DEBUG BEGIN_STMT
|
|
D.6341 = FlexCAN_EnterFreezeMode (base);
|
|
return D.6341;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_Ip_SetRxMbGlobalMask_Privileged (uint8 instance, uint32 mask)
|
|
{
|
|
boolean disabled;
|
|
boolean freeze;
|
|
struct FLEXCAN_Type * pBase;
|
|
Flexcan_Ip_StatusType status;
|
|
Flexcan_Ip_StatusType result;
|
|
Flexcan_Ip_StatusType D.6339;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
result = 0;
|
|
# DEBUG BEGIN_STMT
|
|
status = 0;
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) instance;
|
|
pBase = g_Flexcan_Ip_aBase[_1];
|
|
# DEBUG BEGIN_STMT
|
|
freeze = 0;
|
|
# DEBUG BEGIN_STMT
|
|
_2 = instance <= 5;
|
|
DevAssert (_2);
|
|
# DEBUG BEGIN_STMT
|
|
_3 = FlexCAN_IsEnabled (pBase);
|
|
_4 = (int) _3;
|
|
_5 = _4 != 0;
|
|
_6 = ~_5;
|
|
_7 = (int) _6;
|
|
disabled = (boolean) _7;
|
|
# DEBUG BEGIN_STMT
|
|
if (disabled != 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 4>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
result = FlexCAN_Enable (pBase);
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
freeze = FlexCAN_IsFreezeMode (pBase);
|
|
# DEBUG BEGIN_STMT
|
|
_8 = ~freeze;
|
|
if (_8 != 0)
|
|
goto <bb 5>; [INV]
|
|
else
|
|
goto <bb 7>; [INV]
|
|
|
|
<bb 5> :
|
|
if (result == 0)
|
|
goto <bb 6>; [INV]
|
|
else
|
|
goto <bb 7>; [INV]
|
|
|
|
<bb 6> :
|
|
# DEBUG BEGIN_STMT
|
|
result = 1;
|
|
|
|
<bb 7> :
|
|
# DEBUG BEGIN_STMT
|
|
if (result == 0)
|
|
goto <bb 8>; [INV]
|
|
else
|
|
goto <bb 9>; [INV]
|
|
|
|
<bb 8> :
|
|
# DEBUG BEGIN_STMT
|
|
FlexCAN_SetRxMsgBuffGlobalMask (pBase, mask);
|
|
|
|
<bb 9> :
|
|
# DEBUG BEGIN_STMT
|
|
if (disabled != 0)
|
|
goto <bb 10>; [INV]
|
|
else
|
|
goto <bb 12>; [INV]
|
|
|
|
<bb 10> :
|
|
# DEBUG BEGIN_STMT
|
|
status = FlexCAN_Disable (pBase);
|
|
# DEBUG BEGIN_STMT
|
|
if (status != 0)
|
|
goto <bb 11>; [INV]
|
|
else
|
|
goto <bb 12>; [INV]
|
|
|
|
<bb 11> :
|
|
# DEBUG BEGIN_STMT
|
|
result = status;
|
|
|
|
<bb 12> :
|
|
# DEBUG BEGIN_STMT
|
|
D.6339 = result;
|
|
return D.6339;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_Ip_SendBlocking (uint8 instance, uint8 mb_idx, const struct Flexcan_Ip_DataInfoType * tx_info, uint32 msg_id, const uint8 * mb_data, uint32 timeout_ms)
|
|
{
|
|
volatile uint32 * flexcan_mb;
|
|
uint32 flexcan_mb_config;
|
|
uint32 uS2Ticks;
|
|
uint32 mS2Ticks;
|
|
uint32 timeElapsed;
|
|
uint32 timeStart;
|
|
struct Flexcan_Ip_StateType * state;
|
|
struct FLEXCAN_Type * base;
|
|
Flexcan_Ip_StatusType result;
|
|
Flexcan_Ip_StatusType D.6324;
|
|
long unsigned int D.6317;
|
|
long unsigned int D.6310;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) instance;
|
|
base = g_Flexcan_Ip_aBase[_1];
|
|
# DEBUG BEGIN_STMT
|
|
_2 = (int) instance;
|
|
state = g_flexcan_Ip_StatePtr[_2];
|
|
# DEBUG BEGIN_STMT
|
|
_3 = OsIf_GetCounter (0);
|
|
timeStart = _3;
|
|
# DEBUG BEGIN_STMT
|
|
timeElapsed = 0;
|
|
# DEBUG BEGIN_STMT
|
|
_4 = timeout_ms * 1000;
|
|
mS2Ticks = OsIf_MicrosToTicks (_4, 0);
|
|
# DEBUG BEGIN_STMT
|
|
uS2Ticks = 0;
|
|
# DEBUG BEGIN_STMT
|
|
flexcan_mb_config = 0;
|
|
# DEBUG BEGIN_STMT
|
|
flexcan_mb = 0B;
|
|
# DEBUG BEGIN_STMT
|
|
_5 = instance <= 5;
|
|
DevAssert (_5);
|
|
# DEBUG BEGIN_STMT
|
|
_6 = tx_info != 0B;
|
|
DevAssert (_6);
|
|
# DEBUG BEGIN_STMT
|
|
result = FlexCAN_StartSendData (instance, mb_idx, tx_info, msg_id, mb_data);
|
|
# DEBUG BEGIN_STMT
|
|
if (result == 0)
|
|
goto <bb 5>; [INV]
|
|
else
|
|
goto <bb 17>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
D.6310 = OsIf_GetElapsed (&timeStart, 0);
|
|
timeElapsed = D.6310 + timeElapsed;
|
|
# DEBUG BEGIN_STMT
|
|
if (timeElapsed >= mS2Ticks)
|
|
goto <bb 4>; [INV]
|
|
else
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
result = 3;
|
|
# DEBUG BEGIN_STMT
|
|
goto <bb 6>; [INV]
|
|
|
|
<bb 5> :
|
|
# DEBUG BEGIN_STMT
|
|
_7 = (long unsigned int) mb_idx;
|
|
_8 = FlexCAN_GetBuffStatusFlag (base, _7);
|
|
if (_8 != 1)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 6>; [INV]
|
|
|
|
<bb 6> :
|
|
# DEBUG BEGIN_STMT
|
|
if (result == 3)
|
|
goto <bb 7>; [INV]
|
|
else
|
|
goto <bb 16>; [INV]
|
|
|
|
<bb 7> :
|
|
_9 = (int) mb_idx;
|
|
_10 = state->mbs[_9].state;
|
|
if (_10 != 0)
|
|
goto <bb 8>; [INV]
|
|
else
|
|
goto <bb 16>; [INV]
|
|
|
|
<bb 8> :
|
|
# DEBUG BEGIN_STMT
|
|
_11 = (long unsigned int) mb_idx;
|
|
FlexCAN_ClearMsgBuffIntStatusFlag (base, _11);
|
|
# DEBUG BEGIN_STMT
|
|
_12 = (long unsigned int) mb_idx;
|
|
flexcan_mb = FlexCAN_GetMsgBuffRegion (base, _12);
|
|
# DEBUG BEGIN_STMT
|
|
flexcan_mb_config = *flexcan_mb;
|
|
# DEBUG BEGIN_STMT
|
|
flexcan_mb_config = flexcan_mb_config & 4043309055;
|
|
# DEBUG BEGIN_STMT
|
|
flexcan_mb_config = flexcan_mb_config | 150994944;
|
|
# DEBUG BEGIN_STMT
|
|
*flexcan_mb = flexcan_mb_config;
|
|
# DEBUG BEGIN_STMT
|
|
uS2Ticks = OsIf_MicrosToTicks (100, 0);
|
|
# DEBUG BEGIN_STMT
|
|
_13 = OsIf_GetCounter (0);
|
|
timeStart = _13;
|
|
# DEBUG BEGIN_STMT
|
|
timeElapsed = 0;
|
|
# DEBUG BEGIN_STMT
|
|
goto <bb 11>; [INV]
|
|
|
|
<bb 9> :
|
|
# DEBUG BEGIN_STMT
|
|
D.6317 = OsIf_GetElapsed (&timeStart, 0);
|
|
timeElapsed = D.6317 + timeElapsed;
|
|
# DEBUG BEGIN_STMT
|
|
if (timeElapsed >= uS2Ticks)
|
|
goto <bb 10>; [INV]
|
|
else
|
|
goto <bb 11>; [INV]
|
|
|
|
<bb 10> :
|
|
# DEBUG BEGIN_STMT
|
|
result = 3;
|
|
# DEBUG BEGIN_STMT
|
|
goto <bb 12>; [INV]
|
|
|
|
<bb 11> :
|
|
# DEBUG BEGIN_STMT
|
|
_14 = (long unsigned int) mb_idx;
|
|
_15 = FlexCAN_GetBuffStatusFlag (base, _14);
|
|
if (_15 == 0)
|
|
goto <bb 9>; [INV]
|
|
else
|
|
goto <bb 12>; [INV]
|
|
|
|
<bb 12> :
|
|
# DEBUG BEGIN_STMT
|
|
flexcan_mb_config = *flexcan_mb;
|
|
# DEBUG BEGIN_STMT
|
|
_16 = flexcan_mb_config >> 24;
|
|
_17 = _16 & 15;
|
|
if (_17 == 8)
|
|
goto <bb 13>; [INV]
|
|
else
|
|
goto <bb 14>; [INV]
|
|
|
|
<bb 13> :
|
|
# DEBUG BEGIN_STMT
|
|
result = 0;
|
|
|
|
<bb 14> :
|
|
# DEBUG BEGIN_STMT
|
|
_18 = flexcan_mb_config >> 24;
|
|
_19 = _18 & 15;
|
|
if (_19 == 9)
|
|
goto <bb 15>; [INV]
|
|
else
|
|
goto <bb 16>; [INV]
|
|
|
|
<bb 15> :
|
|
# DEBUG BEGIN_STMT
|
|
result = 3;
|
|
|
|
<bb 16> :
|
|
# DEBUG BEGIN_STMT
|
|
_20 = (long unsigned int) mb_idx;
|
|
FlexCAN_ClearMsgBuffIntStatusFlag (base, _20);
|
|
# DEBUG BEGIN_STMT
|
|
_21 = (int) mb_idx;
|
|
state->mbs[_21].state = 0;
|
|
|
|
<bb 17> :
|
|
# DEBUG BEGIN_STMT
|
|
D.6324 = result;
|
|
timeStart = {CLOBBER};
|
|
return D.6324;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_Busoff_Error_IRQHandler (uint8 instance)
|
|
{
|
|
boolean isSpuriousInt;
|
|
uint32 u32ErrStatus;
|
|
const struct Flexcan_Ip_StateType * state;
|
|
struct FLEXCAN_Type * pBase;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) instance;
|
|
pBase = g_Flexcan_Ip_aBase[_1];
|
|
# DEBUG BEGIN_STMT
|
|
_2 = (int) instance;
|
|
state = g_flexcan_Ip_StatePtr[_2];
|
|
# DEBUG BEGIN_STMT
|
|
u32ErrStatus = 0;
|
|
# DEBUG BEGIN_STMT
|
|
isSpuriousInt = 1;
|
|
# DEBUG BEGIN_STMT
|
|
_3 = instance <= 5;
|
|
DevAssert (_3);
|
|
# DEBUG BEGIN_STMT
|
|
if (state != 0B)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 28>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
u32ErrStatus = pBase->ESR1;
|
|
# DEBUG BEGIN_STMT
|
|
_4 = u32ErrStatus & 2;
|
|
if (_4 != 0)
|
|
goto <bb 4>; [INV]
|
|
else
|
|
goto <bb 8>; [INV]
|
|
|
|
<bb 4> :
|
|
_5 = pBase->CTRL1;
|
|
_6 = _5 & 16384;
|
|
if (_6 != 0)
|
|
goto <bb 5>; [INV]
|
|
else
|
|
goto <bb 8>; [INV]
|
|
|
|
<bb 5> :
|
|
# DEBUG BEGIN_STMT
|
|
pBase->ESR1 = 2;
|
|
# DEBUG BEGIN_STMT
|
|
_7 = state->error_callback;
|
|
if (_7 != 0B)
|
|
goto <bb 6>; [INV]
|
|
else
|
|
goto <bb 7>; [INV]
|
|
|
|
<bb 6> :
|
|
# DEBUG BEGIN_STMT
|
|
_8 = state->error_callback;
|
|
_8 (instance, 9, u32ErrStatus, state);
|
|
# DEBUG BEGIN_STMT
|
|
u32ErrStatus = pBase->ESR1;
|
|
|
|
<bb 7> :
|
|
# DEBUG BEGIN_STMT
|
|
isSpuriousInt = 0;
|
|
|
|
<bb 8> :
|
|
# DEBUG BEGIN_STMT
|
|
_9 = u32ErrStatus & 1048576;
|
|
if (_9 != 0)
|
|
goto <bb 9>; [INV]
|
|
else
|
|
goto <bb 13>; [INV]
|
|
|
|
<bb 9> :
|
|
_10 = pBase->CTRL2;
|
|
_11 = (signed int) _10;
|
|
if (_11 < 0)
|
|
goto <bb 10>; [INV]
|
|
else
|
|
goto <bb 13>; [INV]
|
|
|
|
<bb 10> :
|
|
# DEBUG BEGIN_STMT
|
|
pBase->ESR1 = 1048576;
|
|
# DEBUG BEGIN_STMT
|
|
_12 = state->error_callback;
|
|
if (_12 != 0B)
|
|
goto <bb 11>; [INV]
|
|
else
|
|
goto <bb 12>; [INV]
|
|
|
|
<bb 11> :
|
|
# DEBUG BEGIN_STMT
|
|
_13 = state->error_callback;
|
|
_13 (instance, 10, u32ErrStatus, state);
|
|
# DEBUG BEGIN_STMT
|
|
u32ErrStatus = pBase->ESR1;
|
|
|
|
<bb 12> :
|
|
# DEBUG BEGIN_STMT
|
|
isSpuriousInt = 0;
|
|
|
|
<bb 13> :
|
|
# DEBUG BEGIN_STMT
|
|
_14 = u32ErrStatus & 131072;
|
|
if (_14 != 0)
|
|
goto <bb 14>; [INV]
|
|
else
|
|
goto <bb 18>; [INV]
|
|
|
|
<bb 14> :
|
|
_15 = pBase->CTRL1;
|
|
_16 = _15 & 2048;
|
|
if (_16 != 0)
|
|
goto <bb 15>; [INV]
|
|
else
|
|
goto <bb 18>; [INV]
|
|
|
|
<bb 15> :
|
|
# DEBUG BEGIN_STMT
|
|
pBase->ESR1 = 131072;
|
|
# DEBUG BEGIN_STMT
|
|
_17 = state->error_callback;
|
|
if (_17 != 0B)
|
|
goto <bb 16>; [INV]
|
|
else
|
|
goto <bb 17>; [INV]
|
|
|
|
<bb 16> :
|
|
# DEBUG BEGIN_STMT
|
|
_18 = state->error_callback;
|
|
_18 (instance, 13, u32ErrStatus, state);
|
|
# DEBUG BEGIN_STMT
|
|
u32ErrStatus = pBase->ESR1;
|
|
|
|
<bb 17> :
|
|
# DEBUG BEGIN_STMT
|
|
isSpuriousInt = 0;
|
|
|
|
<bb 18> :
|
|
# DEBUG BEGIN_STMT
|
|
_19 = u32ErrStatus & 65536;
|
|
if (_19 != 0)
|
|
goto <bb 19>; [INV]
|
|
else
|
|
goto <bb 23>; [INV]
|
|
|
|
<bb 19> :
|
|
_20 = pBase->CTRL1;
|
|
_21 = _20 & 1024;
|
|
if (_21 != 0)
|
|
goto <bb 20>; [INV]
|
|
else
|
|
goto <bb 23>; [INV]
|
|
|
|
<bb 20> :
|
|
# DEBUG BEGIN_STMT
|
|
pBase->ESR1 = 65536;
|
|
# DEBUG BEGIN_STMT
|
|
_22 = state->error_callback;
|
|
if (_22 != 0B)
|
|
goto <bb 21>; [INV]
|
|
else
|
|
goto <bb 22>; [INV]
|
|
|
|
<bb 21> :
|
|
# DEBUG BEGIN_STMT
|
|
_23 = state->error_callback;
|
|
_23 (instance, 12, u32ErrStatus, state);
|
|
# DEBUG BEGIN_STMT
|
|
u32ErrStatus = pBase->ESR1;
|
|
|
|
<bb 22> :
|
|
# DEBUG BEGIN_STMT
|
|
isSpuriousInt = 0;
|
|
|
|
<bb 23> :
|
|
# DEBUG BEGIN_STMT
|
|
_24 = u32ErrStatus & 4;
|
|
if (_24 != 0)
|
|
goto <bb 24>; [INV]
|
|
else
|
|
goto <bb 28>; [INV]
|
|
|
|
<bb 24> :
|
|
_25 = pBase->CTRL1;
|
|
_26 = _25 & 32768;
|
|
if (_26 != 0)
|
|
goto <bb 25>; [INV]
|
|
else
|
|
goto <bb 28>; [INV]
|
|
|
|
<bb 25> :
|
|
# DEBUG BEGIN_STMT
|
|
pBase->ESR1 = 4;
|
|
# DEBUG BEGIN_STMT
|
|
_27 = state->error_callback;
|
|
if (_27 != 0B)
|
|
goto <bb 26>; [INV]
|
|
else
|
|
goto <bb 27>; [INV]
|
|
|
|
<bb 26> :
|
|
# DEBUG BEGIN_STMT
|
|
_28 = state->error_callback;
|
|
_28 (instance, 11, u32ErrStatus, state);
|
|
|
|
<bb 27> :
|
|
# DEBUG BEGIN_STMT
|
|
isSpuriousInt = 0;
|
|
|
|
<bb 28> :
|
|
# DEBUG BEGIN_STMT
|
|
if (isSpuriousInt != 0)
|
|
goto <bb 29>; [INV]
|
|
else
|
|
goto <bb 30>; [INV]
|
|
|
|
<bb 29> :
|
|
# DEBUG BEGIN_STMT
|
|
pBase->ESR1 = 3866630;
|
|
|
|
<bb 30> :
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_Ip_GetControllerRxErrorCounter (uint8 instance)
|
|
{
|
|
const struct FLEXCAN_Type * base;
|
|
uint8 D.6272;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) instance;
|
|
base = g_Flexcan_Ip_aBase[_1];
|
|
# DEBUG BEGIN_STMT
|
|
_2 = instance <= 5;
|
|
DevAssert (_2);
|
|
# DEBUG BEGIN_STMT
|
|
_3 = base->ECR;
|
|
_4 = _3 >> 8;
|
|
D.6272 = (uint8) _4;
|
|
return D.6272;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_Ip_GetControllerTxErrorCounter (uint8 instance)
|
|
{
|
|
const struct FLEXCAN_Type * base;
|
|
uint8 D.6270;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) instance;
|
|
base = g_Flexcan_Ip_aBase[_1];
|
|
# DEBUG BEGIN_STMT
|
|
_2 = instance <= 5;
|
|
DevAssert (_2);
|
|
# DEBUG BEGIN_STMT
|
|
_3 = base->ECR;
|
|
D.6270 = (uint8) _3;
|
|
return D.6270;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_Ip_GetErrorStatus (uint8 instance)
|
|
{
|
|
const struct FLEXCAN_Type * base;
|
|
uint32 D.6268;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) instance;
|
|
base = g_Flexcan_Ip_aBase[_1];
|
|
# DEBUG BEGIN_STMT
|
|
_2 = instance <= 5;
|
|
DevAssert (_2);
|
|
# DEBUG BEGIN_STMT
|
|
D.6268 = base->ESR1;
|
|
return D.6268;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_Ip_ClearErrorStatus (uint8 instance, uint32 error)
|
|
{
|
|
struct FLEXCAN_Type * base;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) instance;
|
|
base = g_Flexcan_Ip_aBase[_1];
|
|
# DEBUG BEGIN_STMT
|
|
_2 = instance <= 5;
|
|
DevAssert (_2);
|
|
# DEBUG BEGIN_STMT
|
|
base->ESR1 = error;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_IRQHandler (uint8 instance, uint32 startMbIdx, uint32 endMbIdx, boolean bEnhancedFifoExisted)
|
|
{
|
|
uint32 mb_idx;
|
|
boolean bIsSpuriousInt;
|
|
const struct Flexcan_Ip_StateType * state;
|
|
struct FLEXCAN_Type * base;
|
|
uint32 flag_reg;
|
|
uint32 u32MbHandle;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
u32MbHandle = 0;
|
|
# DEBUG BEGIN_STMT
|
|
flag_reg = 0;
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) instance;
|
|
base = g_Flexcan_Ip_aBase[_1];
|
|
# DEBUG BEGIN_STMT
|
|
_2 = (int) instance;
|
|
state = g_flexcan_Ip_StatePtr[_2];
|
|
# DEBUG BEGIN_STMT
|
|
bIsSpuriousInt = 1;
|
|
# DEBUG BEGIN_STMT
|
|
mb_idx = endMbIdx;
|
|
# DEBUG BEGIN_STMT
|
|
_3 = instance <= 5;
|
|
DevAssert (_3);
|
|
# DEBUG BEGIN_STMT
|
|
_4 = endMbIdx <= 95;
|
|
DevAssert (_4);
|
|
# DEBUG BEGIN_STMT
|
|
if (state != 0B)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 24>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
_5 = FlexCAN_GetMsgBuffIntStatusFlag (base, mb_idx);
|
|
flag_reg = (uint32) _5;
|
|
# DEBUG BEGIN_STMT
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
mb_idx = mb_idx + 4294967295;
|
|
# DEBUG BEGIN_STMT
|
|
_6 = FlexCAN_GetMsgBuffIntStatusFlag (base, mb_idx);
|
|
flag_reg = (uint32) _6;
|
|
|
|
<bb 5> :
|
|
# DEBUG BEGIN_STMT
|
|
if (flag_reg == 0)
|
|
goto <bb 6>; [INV]
|
|
else
|
|
goto <bb 7>; [INV]
|
|
|
|
<bb 6> :
|
|
if (mb_idx > startMbIdx)
|
|
goto <bb 4>; [INV]
|
|
else
|
|
goto <bb 7>; [INV]
|
|
|
|
<bb 7> :
|
|
# DEBUG BEGIN_STMT
|
|
if (flag_reg != 0)
|
|
goto <bb 8>; [INV]
|
|
else
|
|
goto <bb 18>; [INV]
|
|
|
|
<bb 8> :
|
|
# DEBUG BEGIN_STMT
|
|
bIsSpuriousInt = 0;
|
|
# DEBUG BEGIN_STMT
|
|
u32MbHandle = mb_idx;
|
|
# DEBUG BEGIN_STMT
|
|
_7 = state->bIsLegacyFifoEn;
|
|
if (_7 != 0)
|
|
goto <bb 9>; [INV]
|
|
else
|
|
goto <bb 11>; [INV]
|
|
|
|
<bb 9> :
|
|
if (mb_idx <= 7)
|
|
goto <bb 10>; [INV]
|
|
else
|
|
goto <bb 11>; [INV]
|
|
|
|
<bb 10> :
|
|
# DEBUG BEGIN_STMT
|
|
FlexCAN_IRQHandlerRxFIFO (instance, mb_idx);
|
|
# DEBUG BEGIN_STMT
|
|
u32MbHandle = 0;
|
|
goto <bb 13>; [INV]
|
|
|
|
<bb 11> :
|
|
# DEBUG BEGIN_STMT
|
|
_8 = state->mbs[u32MbHandle].state;
|
|
if (_8 == 1)
|
|
goto <bb 12>; [INV]
|
|
else
|
|
goto <bb 13>; [INV]
|
|
|
|
<bb 12> :
|
|
# DEBUG BEGIN_STMT
|
|
FlexCAN_IRQHandlerRxMB (instance, mb_idx);
|
|
|
|
<bb 13> :
|
|
# DEBUG BEGIN_STMT
|
|
_9 = state->mbs[u32MbHandle].state;
|
|
if (_9 == 2)
|
|
goto <bb 14>; [INV]
|
|
else
|
|
goto <bb 15>; [INV]
|
|
|
|
<bb 14> :
|
|
# DEBUG BEGIN_STMT
|
|
FlexCAN_IRQHandlerTxMB (instance, mb_idx);
|
|
|
|
<bb 15> :
|
|
# DEBUG BEGIN_STMT
|
|
_10 = FlexCAN_GetMsgBuffIntStatusFlag (base, mb_idx);
|
|
if (_10 != 0)
|
|
goto <bb 16>; [INV]
|
|
else
|
|
goto <bb 18>; [INV]
|
|
|
|
<bb 16> :
|
|
# DEBUG BEGIN_STMT
|
|
_11 = state->mbs[u32MbHandle].state;
|
|
if (_11 == 0)
|
|
goto <bb 17>; [INV]
|
|
else
|
|
goto <bb 18>; [INV]
|
|
|
|
<bb 17> :
|
|
# DEBUG BEGIN_STMT
|
|
FlexCAN_ClearMsgBuffIntStatusFlag (base, mb_idx);
|
|
|
|
<bb 18> :
|
|
# DEBUG BEGIN_STMT
|
|
if (bEnhancedFifoExisted != 0)
|
|
goto <bb 19>; [INV]
|
|
else
|
|
goto <bb 22>; [INV]
|
|
|
|
<bb 19> :
|
|
# DEBUG BEGIN_STMT
|
|
_12 = FlexCAN_IsEnhancedRxFifoEnabled (base);
|
|
if (_12 != 0)
|
|
goto <bb 20>; [INV]
|
|
else
|
|
goto <bb 22>; [INV]
|
|
|
|
<bb 20> :
|
|
_13 = state->transferType;
|
|
if (_13 == 0)
|
|
goto <bb 21>; [INV]
|
|
else
|
|
goto <bb 22>; [INV]
|
|
|
|
<bb 21> :
|
|
# DEBUG BEGIN_STMT
|
|
bIsSpuriousInt = FlexCAN_ProcessIRQHandlerEnhancedRxFIFO (instance, bIsSpuriousInt);
|
|
|
|
<bb 22> :
|
|
# DEBUG BEGIN_STMT
|
|
if (bIsSpuriousInt != 0)
|
|
goto <bb 23>; [INV]
|
|
else
|
|
goto <bb 29>; [INV]
|
|
|
|
<bb 23> :
|
|
# DEBUG BEGIN_STMT
|
|
FlexCAN_ProcessSpuriousInterruptMB (instance, startMbIdx, endMbIdx);
|
|
goto <bb 29>; [INV]
|
|
|
|
<bb 24> :
|
|
# DEBUG BEGIN_STMT
|
|
mb_idx = startMbIdx;
|
|
goto <bb 26>; [INV]
|
|
|
|
<bb 25> :
|
|
# DEBUG BEGIN_STMT
|
|
FlexCAN_ClearMsgBuffIntStatusFlag (base, mb_idx);
|
|
# DEBUG BEGIN_STMT
|
|
mb_idx = mb_idx + 1;
|
|
|
|
<bb 26> :
|
|
# DEBUG BEGIN_STMT
|
|
if (mb_idx <= endMbIdx)
|
|
goto <bb 25>; [INV]
|
|
else
|
|
goto <bb 27>; [INV]
|
|
|
|
<bb 27> :
|
|
# DEBUG BEGIN_STMT
|
|
if (bEnhancedFifoExisted != 0)
|
|
goto <bb 28>; [INV]
|
|
else
|
|
goto <bb 29>; [INV]
|
|
|
|
<bb 28> :
|
|
# DEBUG BEGIN_STMT
|
|
FlexCAN_ClearEnhancedRxFifoIntStatusFlag (base, 28);
|
|
# DEBUG BEGIN_STMT
|
|
FlexCAN_ClearEnhancedRxFifoIntStatusFlag (base, 29);
|
|
# DEBUG BEGIN_STMT
|
|
FlexCAN_ClearEnhancedRxFifoIntStatusFlag (base, 30);
|
|
# DEBUG BEGIN_STMT
|
|
FlexCAN_ClearEnhancedRxFifoIntStatusFlag (base, 31);
|
|
|
|
<bb 29> :
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_CompleteRxMessageFifoData (uint8 instance)
|
|
{
|
|
struct Flexcan_Ip_StateType * state;
|
|
struct FLEXCAN_Type * base;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) instance;
|
|
base = g_Flexcan_Ip_aBase[_1];
|
|
# DEBUG BEGIN_STMT
|
|
_2 = (int) instance;
|
|
state = g_flexcan_Ip_StatePtr[_2];
|
|
# DEBUG BEGIN_STMT
|
|
_3 = instance <= 5;
|
|
DevAssert (_3);
|
|
# DEBUG BEGIN_STMT
|
|
_4 = state->transferType;
|
|
if (_4 == 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 4>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
_5 = state->isIntActive;
|
|
FlexCAN_SetMsgBuffIntCmd (base, instance, 5, 0, _5);
|
|
# DEBUG BEGIN_STMT
|
|
_6 = state->isIntActive;
|
|
FlexCAN_SetMsgBuffIntCmd (base, instance, 6, 0, _6);
|
|
# DEBUG BEGIN_STMT
|
|
_7 = state->isIntActive;
|
|
FlexCAN_SetMsgBuffIntCmd (base, instance, 7, 0, _7);
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
state->mbs[0].pMBmessage = 0B;
|
|
# DEBUG BEGIN_STMT
|
|
state->mbs[0].state = 0;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_Ip_GetTransferStatus (uint8 instance, uint8 mb_idx)
|
|
{
|
|
Flexcan_Ip_StatusType status;
|
|
const struct Flexcan_Ip_StateType * state;
|
|
Flexcan_Ip_StatusType D.6174;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) instance;
|
|
state = g_flexcan_Ip_StatePtr[_1];
|
|
# DEBUG BEGIN_STMT
|
|
status = 1;
|
|
# DEBUG BEGIN_STMT
|
|
_2 = instance <= 5;
|
|
DevAssert (_2);
|
|
# DEBUG BEGIN_STMT
|
|
_3 = mb_idx + 160;
|
|
_4 = _3 > 158;
|
|
DevAssert (_4);
|
|
# DEBUG BEGIN_STMT
|
|
if (mb_idx <= 95)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 6>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
_5 = (int) mb_idx;
|
|
_6 = state->mbs[_5].state;
|
|
if (_6 == 0)
|
|
goto <bb 4>; [INV]
|
|
else
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
status = 0;
|
|
goto <bb 9>; [INV]
|
|
|
|
<bb 5> :
|
|
# DEBUG BEGIN_STMT
|
|
status = 2;
|
|
goto <bb 9>; [INV]
|
|
|
|
<bb 6> :
|
|
# DEBUG BEGIN_STMT
|
|
_7 = state->enhancedFifoOutput.state;
|
|
if (_7 == 0)
|
|
goto <bb 7>; [INV]
|
|
else
|
|
goto <bb 8>; [INV]
|
|
|
|
<bb 7> :
|
|
# DEBUG BEGIN_STMT
|
|
status = 0;
|
|
goto <bb 9>; [INV]
|
|
|
|
<bb 8> :
|
|
# DEBUG BEGIN_STMT
|
|
status = 2;
|
|
|
|
<bb 9> :
|
|
# DEBUG BEGIN_STMT
|
|
D.6174 = status;
|
|
return D.6174;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_Ip_ConfigRemoteResponseMb (uint8 instance, uint8 mb_idx, const struct Flexcan_Ip_DataInfoType * tx_info, uint32 msg_id, const uint8 * mb_data)
|
|
{
|
|
const struct Flexcan_Ip_StateType * const state;
|
|
struct FLEXCAN_Type * pBase;
|
|
struct Flexcan_Ip_MsbuffCodeStatusType cs;
|
|
Flexcan_Ip_StatusType result;
|
|
Flexcan_Ip_StatusType D.6162;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
result = 0;
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) instance;
|
|
pBase = g_Flexcan_Ip_aBase[_1];
|
|
# DEBUG BEGIN_STMT
|
|
_2 = (int) instance;
|
|
state = g_flexcan_Ip_StatePtr[_2];
|
|
# DEBUG BEGIN_STMT
|
|
_3 = instance <= 5;
|
|
DevAssert (_3);
|
|
# DEBUG BEGIN_STMT
|
|
_4 = tx_info != 0B;
|
|
DevAssert (_4);
|
|
# DEBUG BEGIN_STMT
|
|
_5 = state->bIsLegacyFifoEn;
|
|
_6 = state->u32MaxMbNum;
|
|
_7 = FlexCAN_IsMbOutOfRange (pBase, mb_idx, _5, _6);
|
|
if (_7 != 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 4>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
result = 4;
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
if (result == 0)
|
|
goto <bb 5>; [INV]
|
|
else
|
|
goto <bb 7>; [INV]
|
|
|
|
<bb 5> :
|
|
# DEBUG BEGIN_STMT
|
|
_8 = tx_info->data_length;
|
|
cs.dataLen = _8;
|
|
# DEBUG BEGIN_STMT
|
|
_9 = tx_info->msg_id_type;
|
|
cs.msgIdType = _9;
|
|
# DEBUG BEGIN_STMT
|
|
cs.code = 10;
|
|
# DEBUG BEGIN_STMT
|
|
cs.fd_enable = 0;
|
|
# DEBUG BEGIN_STMT
|
|
_10 = (long unsigned int) mb_idx;
|
|
FlexCAN_ClearMsgBuffIntStatusFlag (pBase, _10);
|
|
# DEBUG BEGIN_STMT
|
|
_11 = (long unsigned int) mb_idx;
|
|
_12 = tx_info->is_remote;
|
|
FlexCAN_SetTxMsgBuff (pBase, _11, &cs, msg_id, mb_data, _12);
|
|
# DEBUG BEGIN_STMT
|
|
_13 = tx_info->is_polling;
|
|
_14 = ~_13;
|
|
if (_14 != 0)
|
|
goto <bb 6>; [INV]
|
|
else
|
|
goto <bb 7>; [INV]
|
|
|
|
<bb 6> :
|
|
# DEBUG BEGIN_STMT
|
|
_15 = (long unsigned int) mb_idx;
|
|
_16 = state->isIntActive;
|
|
result = FlexCAN_SetMsgBuffIntCmd (pBase, instance, _15, 1, _16);
|
|
|
|
<bb 7> :
|
|
# DEBUG BEGIN_STMT
|
|
D.6162 = result;
|
|
cs = {CLOBBER};
|
|
return D.6162;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_Ip_ConfigEnhancedRxFifo_Privileged (uint8 instance, const struct Flexcan_Ip_EnhancedIdTableType * id_filter_table)
|
|
{
|
|
boolean freeze;
|
|
boolean disabled;
|
|
struct FLEXCAN_Type * pBase;
|
|
Flexcan_Ip_StatusType status;
|
|
Flexcan_Ip_StatusType result;
|
|
Flexcan_Ip_StatusType D.6154;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
result = 0;
|
|
# DEBUG BEGIN_STMT
|
|
status = 0;
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) instance;
|
|
pBase = g_Flexcan_Ip_aBase[_1];
|
|
# DEBUG BEGIN_STMT
|
|
_2 = FlexCAN_IsEnabled (pBase);
|
|
_3 = (int) _2;
|
|
_4 = _3 != 0;
|
|
_5 = ~_4;
|
|
_6 = (int) _5;
|
|
disabled = (boolean) _6;
|
|
# DEBUG BEGIN_STMT
|
|
_7 = instance <= 5;
|
|
DevAssert (_7);
|
|
# DEBUG BEGIN_STMT
|
|
_8 = FlexCAN_IsEnhancedRxFifoAvailable (pBase);
|
|
DevAssert (_8);
|
|
# DEBUG BEGIN_STMT
|
|
_9 = id_filter_table != 0B;
|
|
DevAssert (_9);
|
|
# DEBUG BEGIN_STMT
|
|
if (disabled != 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 4>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
result = FlexCAN_Enable (pBase);
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
freeze = FlexCAN_IsFreezeMode (pBase);
|
|
# DEBUG BEGIN_STMT
|
|
_10 = ~freeze;
|
|
if (_10 != 0)
|
|
goto <bb 5>; [INV]
|
|
else
|
|
goto <bb 7>; [INV]
|
|
|
|
<bb 5> :
|
|
if (result == 0)
|
|
goto <bb 6>; [INV]
|
|
else
|
|
goto <bb 7>; [INV]
|
|
|
|
<bb 6> :
|
|
# DEBUG BEGIN_STMT
|
|
result = 1;
|
|
|
|
<bb 7> :
|
|
# DEBUG BEGIN_STMT
|
|
if (result == 0)
|
|
goto <bb 8>; [INV]
|
|
else
|
|
goto <bb 9>; [INV]
|
|
|
|
<bb 8> :
|
|
# DEBUG BEGIN_STMT
|
|
FlexCAN_SetEnhancedRxFifoFilter (pBase, id_filter_table);
|
|
|
|
<bb 9> :
|
|
# DEBUG BEGIN_STMT
|
|
if (disabled != 0)
|
|
goto <bb 10>; [INV]
|
|
else
|
|
goto <bb 12>; [INV]
|
|
|
|
<bb 10> :
|
|
# DEBUG BEGIN_STMT
|
|
status = FlexCAN_Disable (pBase);
|
|
# DEBUG BEGIN_STMT
|
|
if (status != 0)
|
|
goto <bb 11>; [INV]
|
|
else
|
|
goto <bb 12>; [INV]
|
|
|
|
<bb 11> :
|
|
# DEBUG BEGIN_STMT
|
|
result = status;
|
|
|
|
<bb 12> :
|
|
# DEBUG BEGIN_STMT
|
|
D.6154 = result;
|
|
return D.6154;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_Ip_ConfigRxFifo_Privileged (uint8 instance, Flexcan_Ip_RxFifoIdElementFormatType id_format, const struct Flexcan_Ip_IdTableType * id_filter_table)
|
|
{
|
|
boolean freeze;
|
|
boolean disabled;
|
|
struct FLEXCAN_Type * pBase;
|
|
Flexcan_Ip_StatusType status;
|
|
Flexcan_Ip_StatusType result;
|
|
Flexcan_Ip_StatusType D.6138;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = instance <= 5;
|
|
DevAssert (_1);
|
|
# DEBUG BEGIN_STMT
|
|
result = 0;
|
|
# DEBUG BEGIN_STMT
|
|
status = 0;
|
|
# DEBUG BEGIN_STMT
|
|
_2 = (int) instance;
|
|
pBase = g_Flexcan_Ip_aBase[_2];
|
|
# DEBUG BEGIN_STMT
|
|
_3 = FlexCAN_IsEnabled (pBase);
|
|
_4 = (int) _3;
|
|
_5 = _4 != 0;
|
|
_6 = ~_5;
|
|
_7 = (int) _6;
|
|
disabled = (boolean) _7;
|
|
# DEBUG BEGIN_STMT
|
|
if (disabled != 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 4>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
result = FlexCAN_Enable (pBase);
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
freeze = FlexCAN_IsFreezeMode (pBase);
|
|
# DEBUG BEGIN_STMT
|
|
_8 = ~freeze;
|
|
if (_8 != 0)
|
|
goto <bb 5>; [INV]
|
|
else
|
|
goto <bb 7>; [INV]
|
|
|
|
<bb 5> :
|
|
if (result == 0)
|
|
goto <bb 6>; [INV]
|
|
else
|
|
goto <bb 7>; [INV]
|
|
|
|
<bb 6> :
|
|
# DEBUG BEGIN_STMT
|
|
result = 1;
|
|
|
|
<bb 7> :
|
|
# DEBUG BEGIN_STMT
|
|
if (result == 0)
|
|
goto <bb 8>; [INV]
|
|
else
|
|
goto <bb 9>; [INV]
|
|
|
|
<bb 8> :
|
|
# DEBUG BEGIN_STMT
|
|
FlexCAN_SetRxFifoFilter (pBase, id_format, id_filter_table);
|
|
|
|
<bb 9> :
|
|
# DEBUG BEGIN_STMT
|
|
if (disabled != 0)
|
|
goto <bb 10>; [INV]
|
|
else
|
|
goto <bb 12>; [INV]
|
|
|
|
<bb 10> :
|
|
# DEBUG BEGIN_STMT
|
|
status = FlexCAN_Disable (pBase);
|
|
# DEBUG BEGIN_STMT
|
|
if (status != 0)
|
|
goto <bb 11>; [INV]
|
|
else
|
|
goto <bb 12>; [INV]
|
|
|
|
<bb 11> :
|
|
# DEBUG BEGIN_STMT
|
|
result = status;
|
|
|
|
<bb 12> :
|
|
# DEBUG BEGIN_STMT
|
|
D.6138 = result;
|
|
return D.6138;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_Ip_RxFifoBlocking (uint8 instance, struct Flexcan_Ip_MsgBuffType * data, uint32 timeout)
|
|
{
|
|
const struct FLEXCAN_Type * base;
|
|
Flexcan_Ip_StatusType result;
|
|
Flexcan_Ip_StatusType D.6062;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
result = 0;
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) instance;
|
|
base = g_Flexcan_Ip_aBase[_1];
|
|
# DEBUG BEGIN_STMT
|
|
_2 = instance <= 5;
|
|
DevAssert (_2);
|
|
# DEBUG BEGIN_STMT
|
|
_3 = FlexCAN_IsEnhancedRxFifoAvailable (base);
|
|
if (_3 != 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 8>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
_4 = FlexCAN_IsEnhancedRxFifoEnabled (base);
|
|
if (_4 != 0)
|
|
goto <bb 4>; [INV]
|
|
else
|
|
goto <bb 6>; [INV]
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
result = FlexCAN_StartRxMessageEnhancedFifoData (instance, data);
|
|
# DEBUG BEGIN_STMT
|
|
if (result == 0)
|
|
goto <bb 5>; [INV]
|
|
else
|
|
goto <bb 10>; [INV]
|
|
|
|
<bb 5> :
|
|
# DEBUG BEGIN_STMT
|
|
result = FlexCAN_ProccessEnhancedRxFifo (instance, timeout);
|
|
goto <bb 10>; [INV]
|
|
|
|
<bb 6> :
|
|
# DEBUG BEGIN_STMT
|
|
result = FlexCAN_StartRxMessageFifoData (instance, data);
|
|
# DEBUG BEGIN_STMT
|
|
if (result == 0)
|
|
goto <bb 7>; [INV]
|
|
else
|
|
goto <bb 10>; [INV]
|
|
|
|
<bb 7> :
|
|
# DEBUG BEGIN_STMT
|
|
result = FlexCAN_ProccessLegacyRxFIFO (instance, timeout);
|
|
goto <bb 10>; [INV]
|
|
|
|
<bb 8> :
|
|
# DEBUG BEGIN_STMT
|
|
result = FlexCAN_StartRxMessageFifoData (instance, data);
|
|
# DEBUG BEGIN_STMT
|
|
if (result == 0)
|
|
goto <bb 9>; [INV]
|
|
else
|
|
goto <bb 10>; [INV]
|
|
|
|
<bb 9> :
|
|
# DEBUG BEGIN_STMT
|
|
result = FlexCAN_ProccessLegacyRxFIFO (instance, timeout);
|
|
|
|
<bb 10> :
|
|
# DEBUG BEGIN_STMT
|
|
D.6062 = result;
|
|
return D.6062;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_Ip_RxFifo (uint8 instance, struct Flexcan_Ip_MsgBuffType * data)
|
|
{
|
|
const struct FLEXCAN_Type * base;
|
|
Flexcan_Ip_StatusType result;
|
|
Flexcan_Ip_StatusType D.6020;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
result = 0;
|
|
# DEBUG BEGIN_STMT
|
|
_1 = instance <= 5;
|
|
DevAssert (_1);
|
|
# DEBUG BEGIN_STMT
|
|
_2 = (int) instance;
|
|
base = g_Flexcan_Ip_aBase[_2];
|
|
# DEBUG BEGIN_STMT
|
|
_3 = FlexCAN_IsEnhancedRxFifoAvailable (base);
|
|
if (_3 != 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 6>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
_4 = FlexCAN_IsEnhancedRxFifoEnabled (base);
|
|
if (_4 != 0)
|
|
goto <bb 4>; [INV]
|
|
else
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
result = FlexCAN_StartRxMessageEnhancedFifoData (instance, data);
|
|
goto <bb 7>; [INV]
|
|
|
|
<bb 5> :
|
|
# DEBUG BEGIN_STMT
|
|
result = FlexCAN_StartRxMessageFifoData (instance, data);
|
|
goto <bb 7>; [INV]
|
|
|
|
<bb 6> :
|
|
# DEBUG BEGIN_STMT
|
|
result = FlexCAN_StartRxMessageFifoData (instance, data);
|
|
|
|
<bb 7> :
|
|
# DEBUG BEGIN_STMT
|
|
D.6020 = result;
|
|
return D.6020;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_Ip_ReceiveBlocking (uint8 instance, uint8 mb_idx, struct Flexcan_Ip_MsgBuffType * data, boolean isPolling, uint32 u32TimeoutMs)
|
|
{
|
|
struct FLEXCAN_Type * base;
|
|
struct Flexcan_Ip_StateType * state;
|
|
uint32 mS2Ticks;
|
|
uint32 timeElapsed;
|
|
uint32 timeStart;
|
|
Flexcan_Ip_StatusType result;
|
|
Flexcan_Ip_StatusType D.5986;
|
|
long unsigned int D.5972;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
timeStart = 0;
|
|
# DEBUG BEGIN_STMT
|
|
timeElapsed = 0;
|
|
# DEBUG BEGIN_STMT
|
|
_1 = u32TimeoutMs * 1000;
|
|
mS2Ticks = OsIf_MicrosToTicks (_1, 0);
|
|
# DEBUG BEGIN_STMT
|
|
_2 = instance <= 5;
|
|
DevAssert (_2);
|
|
# DEBUG BEGIN_STMT
|
|
_3 = (int) instance;
|
|
state = g_flexcan_Ip_StatePtr[_3];
|
|
# DEBUG BEGIN_STMT
|
|
_4 = (int) instance;
|
|
base = g_Flexcan_Ip_aBase[_4];
|
|
# DEBUG BEGIN_STMT
|
|
result = FlexCAN_StartRxMessageBufferData (instance, mb_idx, data, isPolling);
|
|
# DEBUG BEGIN_STMT
|
|
if (result == 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 3> :
|
|
_5 = ~isPolling;
|
|
if (_5 != 0)
|
|
goto <bb 4>; [INV]
|
|
else
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
_6 = (long unsigned int) mb_idx;
|
|
_7 = state->isIntActive;
|
|
result = FlexCAN_SetMsgBuffIntCmd (base, instance, _6, 1, _7);
|
|
|
|
<bb 5> :
|
|
# DEBUG BEGIN_STMT
|
|
if (result == 0)
|
|
goto <bb 6>; [INV]
|
|
else
|
|
goto <bb 13>; [INV]
|
|
|
|
<bb 6> :
|
|
# DEBUG BEGIN_STMT
|
|
_8 = OsIf_GetCounter (0);
|
|
timeStart = _8;
|
|
# DEBUG BEGIN_STMT
|
|
goto <bb 12>; [INV]
|
|
|
|
<bb 7> :
|
|
# DEBUG BEGIN_STMT
|
|
if (isPolling != 0)
|
|
goto <bb 8>; [INV]
|
|
else
|
|
goto <bb 10>; [INV]
|
|
|
|
<bb 8> :
|
|
# DEBUG BEGIN_STMT
|
|
_9 = (long unsigned int) mb_idx;
|
|
_10 = FlexCAN_GetBuffStatusFlag (base, _9);
|
|
if (_10 != 0)
|
|
goto <bb 9>; [INV]
|
|
else
|
|
goto <bb 10>; [INV]
|
|
|
|
<bb 9> :
|
|
# DEBUG BEGIN_STMT
|
|
_11 = (long unsigned int) mb_idx;
|
|
FlexCAN_IRQHandlerRxMB (instance, _11);
|
|
|
|
<bb 10> :
|
|
# DEBUG BEGIN_STMT
|
|
D.5972 = OsIf_GetElapsed (&timeStart, 0);
|
|
timeElapsed = D.5972 + timeElapsed;
|
|
# DEBUG BEGIN_STMT
|
|
if (timeElapsed >= mS2Ticks)
|
|
goto <bb 11>; [INV]
|
|
else
|
|
goto <bb 12>; [INV]
|
|
|
|
<bb 11> :
|
|
# DEBUG BEGIN_STMT
|
|
result = 3;
|
|
# DEBUG BEGIN_STMT
|
|
goto <bb 13>; [INV]
|
|
|
|
<bb 12> :
|
|
# DEBUG BEGIN_STMT
|
|
_12 = (int) mb_idx;
|
|
_13 = state->mbs[_12].state;
|
|
if (_13 == 1)
|
|
goto <bb 7>; [INV]
|
|
else
|
|
goto <bb 13>; [INV]
|
|
|
|
<bb 13> :
|
|
# DEBUG BEGIN_STMT
|
|
if (result == 3)
|
|
goto <bb 14>; [INV]
|
|
else
|
|
goto <bb 16>; [INV]
|
|
|
|
<bb 14> :
|
|
_14 = ~isPolling;
|
|
if (_14 != 0)
|
|
goto <bb 15>; [INV]
|
|
else
|
|
goto <bb 16>; [INV]
|
|
|
|
<bb 15> :
|
|
# DEBUG BEGIN_STMT
|
|
_15 = (long unsigned int) mb_idx;
|
|
_16 = state->isIntActive;
|
|
FlexCAN_SetMsgBuffIntCmd (base, instance, _15, 0, _16);
|
|
|
|
<bb 16> :
|
|
# DEBUG BEGIN_STMT
|
|
if (result != 4)
|
|
goto <bb 17>; [INV]
|
|
else
|
|
goto <bb 21>; [INV]
|
|
|
|
<bb 17> :
|
|
if (result != 2)
|
|
goto <bb 18>; [INV]
|
|
else
|
|
goto <bb 21>; [INV]
|
|
|
|
<bb 18> :
|
|
# DEBUG BEGIN_STMT
|
|
_17 = (int) mb_idx;
|
|
_18 = state->mbs[_17].state;
|
|
if (_18 == 0)
|
|
goto <bb 19>; [INV]
|
|
else
|
|
goto <bb 20>; [INV]
|
|
|
|
<bb 19> :
|
|
# DEBUG BEGIN_STMT
|
|
result = 0;
|
|
goto <bb 21>; [INV]
|
|
|
|
<bb 20> :
|
|
# DEBUG BEGIN_STMT
|
|
_19 = (int) mb_idx;
|
|
state->mbs[_19].state = 0;
|
|
# DEBUG BEGIN_STMT
|
|
result = 3;
|
|
|
|
<bb 21> :
|
|
# DEBUG BEGIN_STMT
|
|
D.5986 = result;
|
|
timeStart = {CLOBBER};
|
|
return D.5986;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_Ip_Receive (uint8 instance, uint8 mb_idx, struct Flexcan_Ip_MsgBuffType * data, boolean isPolling)
|
|
{
|
|
const struct Flexcan_Ip_StateType * state;
|
|
struct FLEXCAN_Type * base;
|
|
Flexcan_Ip_StatusType result;
|
|
Flexcan_Ip_StatusType D.5952;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) instance;
|
|
base = g_Flexcan_Ip_aBase[_1];
|
|
# DEBUG BEGIN_STMT
|
|
_2 = (int) instance;
|
|
state = g_flexcan_Ip_StatePtr[_2];
|
|
# DEBUG BEGIN_STMT
|
|
_3 = instance <= 5;
|
|
DevAssert (_3);
|
|
# DEBUG BEGIN_STMT
|
|
result = FlexCAN_StartRxMessageBufferData (instance, mb_idx, data, isPolling);
|
|
# DEBUG BEGIN_STMT
|
|
if (result == 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 3> :
|
|
_4 = ~isPolling;
|
|
if (_4 != 0)
|
|
goto <bb 4>; [INV]
|
|
else
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
_5 = (long unsigned int) mb_idx;
|
|
_6 = state->isIntActive;
|
|
result = FlexCAN_SetMsgBuffIntCmd (base, instance, _5, 1, _6);
|
|
|
|
<bb 5> :
|
|
# DEBUG BEGIN_STMT
|
|
D.5952 = result;
|
|
return D.5952;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_Ip_ConfigRxMb (uint8 instance, uint8 mb_idx, const struct Flexcan_Ip_DataInfoType * rx_info, uint32 msg_id)
|
|
{
|
|
const struct Flexcan_Ip_StateType * state;
|
|
struct FLEXCAN_Type * base;
|
|
struct Flexcan_Ip_MsbuffCodeStatusType cs;
|
|
Flexcan_Ip_StatusType eResult;
|
|
Flexcan_Ip_StatusType D.5945;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
eResult = 0;
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) instance;
|
|
base = g_Flexcan_Ip_aBase[_1];
|
|
# DEBUG BEGIN_STMT
|
|
_2 = (int) instance;
|
|
state = g_flexcan_Ip_StatePtr[_2];
|
|
# DEBUG BEGIN_STMT
|
|
_3 = instance <= 5;
|
|
DevAssert (_3);
|
|
# DEBUG BEGIN_STMT
|
|
_4 = rx_info != 0B;
|
|
DevAssert (_4);
|
|
# DEBUG BEGIN_STMT
|
|
_5 = state->bIsLegacyFifoEn;
|
|
_6 = state->u32MaxMbNum;
|
|
_7 = FlexCAN_IsMbOutOfRange (base, mb_idx, _5, _6);
|
|
if (_7 != 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 4>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
eResult = 4;
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
_8 = (long unsigned int) mb_idx;
|
|
FlexCAN_ClearMsgBuffIntStatusFlag (base, _8);
|
|
# DEBUG BEGIN_STMT
|
|
_9 = rx_info->data_length;
|
|
cs.dataLen = _9;
|
|
# DEBUG BEGIN_STMT
|
|
_10 = rx_info->msg_id_type;
|
|
cs.msgIdType = _10;
|
|
# DEBUG BEGIN_STMT
|
|
_11 = rx_info->fd_enable;
|
|
cs.fd_enable = _11;
|
|
# DEBUG BEGIN_STMT
|
|
cs.code = 15;
|
|
# DEBUG BEGIN_STMT
|
|
_12 = (long unsigned int) mb_idx;
|
|
FlexCAN_SetRxMsgBuff (base, _12, &cs, msg_id);
|
|
# DEBUG BEGIN_STMT
|
|
cs.code = 0;
|
|
# DEBUG BEGIN_STMT
|
|
_13 = (long unsigned int) mb_idx;
|
|
FlexCAN_SetRxMsgBuff (base, _13, &cs, msg_id);
|
|
# DEBUG BEGIN_STMT
|
|
cs.code = 4;
|
|
# DEBUG BEGIN_STMT
|
|
_14 = (long unsigned int) mb_idx;
|
|
FlexCAN_SetRxMsgBuff (base, _14, &cs, msg_id);
|
|
|
|
<bb 5> :
|
|
# DEBUG BEGIN_STMT
|
|
D.5945 = eResult;
|
|
cs = {CLOBBER};
|
|
return D.5945;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_Ip_Send (uint8 instance, uint8 mb_idx, const struct Flexcan_Ip_DataInfoType * tx_info, uint32 msg_id, const uint8 * mb_data)
|
|
{
|
|
const struct Flexcan_Ip_StateType * state;
|
|
struct FLEXCAN_Type * base;
|
|
Flexcan_Ip_StatusType result;
|
|
Flexcan_Ip_StatusType D.5917;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
result = 1;
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) instance;
|
|
base = g_Flexcan_Ip_aBase[_1];
|
|
# DEBUG BEGIN_STMT
|
|
_2 = (int) instance;
|
|
state = g_flexcan_Ip_StatePtr[_2];
|
|
# DEBUG BEGIN_STMT
|
|
_3 = instance <= 5;
|
|
DevAssert (_3);
|
|
# DEBUG BEGIN_STMT
|
|
_4 = tx_info != 0B;
|
|
DevAssert (_4);
|
|
# DEBUG BEGIN_STMT
|
|
_5 = FlexCAN_IsListenOnlyModeEnabled (base);
|
|
_6 = ~_5;
|
|
if (_6 != 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 6>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
result = FlexCAN_StartSendData (instance, mb_idx, tx_info, msg_id, mb_data);
|
|
# DEBUG BEGIN_STMT
|
|
if (result == 0)
|
|
goto <bb 4>; [INV]
|
|
else
|
|
goto <bb 6>; [INV]
|
|
|
|
<bb 4> :
|
|
_7 = tx_info->is_polling;
|
|
_8 = ~_7;
|
|
if (_8 != 0)
|
|
goto <bb 5>; [INV]
|
|
else
|
|
goto <bb 6>; [INV]
|
|
|
|
<bb 5> :
|
|
# DEBUG BEGIN_STMT
|
|
_9 = (long unsigned int) mb_idx;
|
|
_10 = state->isIntActive;
|
|
result = FlexCAN_SetMsgBuffIntCmd (base, instance, _9, 1, _10);
|
|
|
|
<bb 6> :
|
|
# DEBUG BEGIN_STMT
|
|
D.5917 = result;
|
|
return D.5917;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_Ip_Init_Privileged (uint8 Flexcan_Ip_u8Instance, struct Flexcan_Ip_StateType * Flexcan_Ip_pState, const struct Flexcan_Ip_ConfigType * Flexcan_Ip_pData)
|
|
{
|
|
uint32 i;
|
|
struct FLEXCAN_Type * pBase;
|
|
Flexcan_Ip_StatusType eResult;
|
|
Flexcan_Ip_StatusType D.5862;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
eResult = 0;
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) Flexcan_Ip_u8Instance;
|
|
pBase = g_Flexcan_Ip_aBase[_1];
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
_2 = Flexcan_Ip_u8Instance <= 5;
|
|
DevAssert (_2);
|
|
# DEBUG BEGIN_STMT
|
|
_3 = Flexcan_Ip_pData != 0B;
|
|
DevAssert (_3);
|
|
# DEBUG BEGIN_STMT
|
|
eResult = FlexCAN_InitController (pBase, Flexcan_Ip_pData);
|
|
# DEBUG BEGIN_STMT
|
|
if (eResult == 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 16>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
_4 = Flexcan_Ip_pData->fd_enable;
|
|
FlexCAN_EnableExtCbt (pBase, _4);
|
|
# DEBUG BEGIN_STMT
|
|
_5 = Flexcan_Ip_pData->enhCbtEnable;
|
|
if (_5 != 0)
|
|
goto <bb 4>; [INV]
|
|
else
|
|
goto <bb 7>; [INV]
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Enter_Can_CAN_EXCLUSIVE_AREA_00 ();
|
|
# DEBUG BEGIN_STMT
|
|
_6 = pBase->CTRL2;
|
|
_7 = _6 | 8192;
|
|
pBase->CTRL2 = _7;
|
|
# DEBUG BEGIN_STMT
|
|
_8 = &Flexcan_Ip_pData->bitrate;
|
|
FlexCAN_SetEnhancedNominalTimeSegments (pBase, _8);
|
|
# DEBUG BEGIN_STMT
|
|
_9 = Flexcan_Ip_pData->fd_enable;
|
|
if (_9 != 0)
|
|
goto <bb 5>; [INV]
|
|
else
|
|
goto <bb 6>; [INV]
|
|
|
|
<bb 5> :
|
|
# DEBUG BEGIN_STMT
|
|
_10 = &Flexcan_Ip_pData->bitrate_cbt;
|
|
FlexCAN_SetEnhancedDataTimeSegments (pBase, _10);
|
|
|
|
<bb 6> :
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Exit_Can_CAN_EXCLUSIVE_AREA_00 ();
|
|
goto <bb 11>; [INV]
|
|
|
|
<bb 7> :
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Enter_Can_CAN_EXCLUSIVE_AREA_00 ();
|
|
# DEBUG BEGIN_STMT
|
|
_11 = pBase->CTRL2;
|
|
_12 = _11 & 4294959103;
|
|
pBase->CTRL2 = _12;
|
|
# DEBUG BEGIN_STMT
|
|
_13 = Flexcan_Ip_pData->fd_enable;
|
|
if (_13 != 0)
|
|
goto <bb 8>; [INV]
|
|
else
|
|
goto <bb 9>; [INV]
|
|
|
|
<bb 8> :
|
|
# DEBUG BEGIN_STMT
|
|
_14 = &Flexcan_Ip_pData->bitrate;
|
|
FlexCAN_SetExtendedTimeSegments (pBase, _14);
|
|
# DEBUG BEGIN_STMT
|
|
_15 = &Flexcan_Ip_pData->bitrate_cbt;
|
|
FlexCAN_SetFDTimeSegments (pBase, _15);
|
|
goto <bb 10>; [INV]
|
|
|
|
<bb 9> :
|
|
# DEBUG BEGIN_STMT
|
|
_16 = &Flexcan_Ip_pData->bitrate;
|
|
FlexCAN_SetTimeSegments (pBase, _16);
|
|
|
|
<bb 10> :
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Exit_Can_CAN_EXCLUSIVE_AREA_00 ();
|
|
|
|
<bb 11> :
|
|
# DEBUG BEGIN_STMT
|
|
_17 = Flexcan_Ip_pData->flexcanMode;
|
|
FlexCAN_SetOperationMode (pBase, _17);
|
|
# DEBUG BEGIN_STMT
|
|
eResult = FlexCAN_EnterFreezeMode (pBase);
|
|
# DEBUG BEGIN_STMT
|
|
if (eResult == 0)
|
|
goto <bb 12>; [INV]
|
|
else
|
|
goto <bb 16>; [INV]
|
|
|
|
<bb 12> :
|
|
# DEBUG BEGIN_STMT
|
|
i = 0;
|
|
goto <bb 14>; [INV]
|
|
|
|
<bb 13> :
|
|
# DEBUG BEGIN_STMT
|
|
Flexcan_Ip_pState->mbs[i].isPolling = 1;
|
|
# DEBUG BEGIN_STMT
|
|
Flexcan_Ip_pState->mbs[i].pMBmessage = 0B;
|
|
# DEBUG BEGIN_STMT
|
|
Flexcan_Ip_pState->mbs[i].state = 0;
|
|
# DEBUG BEGIN_STMT
|
|
Flexcan_Ip_pState->mbs[i].time_stamp = 0;
|
|
# DEBUG BEGIN_STMT
|
|
i = i + 1;
|
|
|
|
<bb 14> :
|
|
# DEBUG BEGIN_STMT
|
|
if (i <= 95)
|
|
goto <bb 13>; [INV]
|
|
else
|
|
goto <bb 15>; [INV]
|
|
|
|
<bb 15> :
|
|
# DEBUG BEGIN_STMT
|
|
Flexcan_Ip_pState->enhancedFifoOutput.isPolling = 1;
|
|
# DEBUG BEGIN_STMT
|
|
Flexcan_Ip_pState->enhancedFifoOutput.state = 0;
|
|
# DEBUG BEGIN_STMT
|
|
_18 = Flexcan_Ip_pData->transfer_type;
|
|
Flexcan_Ip_pState->transferType = _18;
|
|
# DEBUG BEGIN_STMT
|
|
_19 = Flexcan_Ip_pData->Callback;
|
|
Flexcan_Ip_pState->callback = _19;
|
|
# DEBUG BEGIN_STMT
|
|
Flexcan_Ip_pState->callbackParam = 0B;
|
|
# DEBUG BEGIN_STMT
|
|
_20 = Flexcan_Ip_pData->ErrorCallback;
|
|
Flexcan_Ip_pState->error_callback = _20;
|
|
# DEBUG BEGIN_STMT
|
|
Flexcan_Ip_pState->errorCallbackParam = 0B;
|
|
# DEBUG BEGIN_STMT
|
|
_21 = Flexcan_Ip_pData->is_rx_fifo_needed;
|
|
Flexcan_Ip_pState->bIsLegacyFifoEn = _21;
|
|
# DEBUG BEGIN_STMT
|
|
_22 = Flexcan_Ip_pData->max_num_mb;
|
|
Flexcan_Ip_pState->u32MaxMbNum = _22;
|
|
# DEBUG BEGIN_STMT
|
|
Flexcan_Ip_pState->isIntActive = 1;
|
|
# DEBUG BEGIN_STMT
|
|
_23 = (int) Flexcan_Ip_u8Instance;
|
|
g_flexcan_Ip_StatePtr[_23] = Flexcan_Ip_pState;
|
|
|
|
<bb 16> :
|
|
# DEBUG BEGIN_STMT
|
|
D.5862 = eResult;
|
|
return D.5862;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_AbortRxTransfer (uint8 u8Instance, uint8 mb_idx)
|
|
{
|
|
volatile uint32 * flexcan_mb;
|
|
uint32 flexcan_mb_config;
|
|
uint32 val2;
|
|
uint32 val1;
|
|
struct Flexcan_Ip_StateType * state;
|
|
struct FLEXCAN_Type * pBase;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) u8Instance;
|
|
pBase = g_Flexcan_Ip_aBase[_1];
|
|
# DEBUG BEGIN_STMT
|
|
_2 = (int) u8Instance;
|
|
state = g_flexcan_Ip_StatePtr[_2];
|
|
# DEBUG BEGIN_STMT
|
|
val1 = 0;
|
|
# DEBUG BEGIN_STMT
|
|
val2 = 0;
|
|
# DEBUG BEGIN_STMT
|
|
flexcan_mb_config = 0;
|
|
# DEBUG BEGIN_STMT
|
|
flexcan_mb = 0B;
|
|
# DEBUG BEGIN_STMT
|
|
_3 = (int) mb_idx;
|
|
state->mbs[_3].state = 0;
|
|
# DEBUG BEGIN_STMT
|
|
_4 = state->bIsLegacyFifoEn;
|
|
if (_4 != 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 7>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
_5 = pBase->CTRL2;
|
|
_6 = _5 >> 24;
|
|
val1 = _6 & 15;
|
|
# DEBUG BEGIN_STMT
|
|
val2 = RxFifoOcuppiedLastMsgBuff (val1);
|
|
# DEBUG BEGIN_STMT
|
|
_7 = (long unsigned int) mb_idx;
|
|
if (val2 < _7)
|
|
goto <bb 4>; [INV]
|
|
else
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
_8 = (long unsigned int) mb_idx;
|
|
flexcan_mb = FlexCAN_GetMsgBuffRegion (pBase, _8);
|
|
# DEBUG BEGIN_STMT
|
|
flexcan_mb_config = *flexcan_mb;
|
|
# DEBUG BEGIN_STMT
|
|
flexcan_mb_config = flexcan_mb_config & 4043309055;
|
|
# DEBUG BEGIN_STMT
|
|
flexcan_mb_config = flexcan_mb_config;
|
|
# DEBUG BEGIN_STMT
|
|
*flexcan_mb = flexcan_mb_config;
|
|
# DEBUG BEGIN_STMT
|
|
flexcan_mb_config = flexcan_mb_config & 4043309055;
|
|
# DEBUG BEGIN_STMT
|
|
flexcan_mb_config = flexcan_mb_config | 67108864;
|
|
# DEBUG BEGIN_STMT
|
|
*flexcan_mb = flexcan_mb_config;
|
|
|
|
<bb 5> :
|
|
# DEBUG BEGIN_STMT
|
|
if (mb_idx == 0)
|
|
goto <bb 6>; [INV]
|
|
else
|
|
goto <bb 8>; [INV]
|
|
|
|
<bb 6> :
|
|
# DEBUG BEGIN_STMT
|
|
_9 = state->isIntActive;
|
|
FLEXCAN_ClearMsgBuffIntCmd (pBase, u8Instance, 5, _9);
|
|
goto <bb 8>; [INV]
|
|
|
|
<bb 7> :
|
|
# DEBUG BEGIN_STMT
|
|
_10 = (long unsigned int) mb_idx;
|
|
flexcan_mb = FlexCAN_GetMsgBuffRegion (pBase, _10);
|
|
# DEBUG BEGIN_STMT
|
|
flexcan_mb_config = *flexcan_mb;
|
|
# DEBUG BEGIN_STMT
|
|
flexcan_mb_config = flexcan_mb_config & 4043309055;
|
|
# DEBUG BEGIN_STMT
|
|
flexcan_mb_config = flexcan_mb_config;
|
|
# DEBUG BEGIN_STMT
|
|
*flexcan_mb = flexcan_mb_config;
|
|
# DEBUG BEGIN_STMT
|
|
flexcan_mb_config = flexcan_mb_config & 4043309055;
|
|
# DEBUG BEGIN_STMT
|
|
flexcan_mb_config = flexcan_mb_config | 67108864;
|
|
# DEBUG BEGIN_STMT
|
|
*flexcan_mb = flexcan_mb_config;
|
|
|
|
<bb 8> :
|
|
# DEBUG BEGIN_STMT
|
|
_11 = (long unsigned int) mb_idx;
|
|
FlexCAN_ClearMsgBuffIntStatusFlag (pBase, _11);
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_AbortTxTransfer (uint8 u8Instance, uint8 mb_idx)
|
|
{
|
|
volatile uint32 * flexcan_mb;
|
|
uint32 uS2Ticks;
|
|
uint32 flexcan_mb_config;
|
|
uint32 timeElapsed;
|
|
uint32 timeStart;
|
|
Flexcan_Ip_StatusType result;
|
|
struct Flexcan_Ip_StateType * state;
|
|
struct FLEXCAN_Type * pBase;
|
|
Flexcan_Ip_StatusType D.6631;
|
|
long unsigned int D.6622;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) u8Instance;
|
|
pBase = g_Flexcan_Ip_aBase[_1];
|
|
# DEBUG BEGIN_STMT
|
|
_2 = (int) u8Instance;
|
|
state = g_flexcan_Ip_StatePtr[_2];
|
|
# DEBUG BEGIN_STMT
|
|
result = 0;
|
|
# DEBUG BEGIN_STMT
|
|
timeStart = 0;
|
|
# DEBUG BEGIN_STMT
|
|
timeElapsed = 0;
|
|
# DEBUG BEGIN_STMT
|
|
flexcan_mb_config = 0;
|
|
# DEBUG BEGIN_STMT
|
|
uS2Ticks = 0;
|
|
# DEBUG BEGIN_STMT
|
|
flexcan_mb = 0B;
|
|
# DEBUG BEGIN_STMT
|
|
_3 = (long unsigned int) mb_idx;
|
|
flexcan_mb = FlexCAN_GetMsgBuffRegion (pBase, _3);
|
|
# DEBUG BEGIN_STMT
|
|
flexcan_mb_config = *flexcan_mb;
|
|
# DEBUG BEGIN_STMT
|
|
flexcan_mb_config = flexcan_mb_config & 4043309055;
|
|
# DEBUG BEGIN_STMT
|
|
flexcan_mb_config = flexcan_mb_config | 150994944;
|
|
# DEBUG BEGIN_STMT
|
|
*flexcan_mb = flexcan_mb_config;
|
|
# DEBUG BEGIN_STMT
|
|
uS2Ticks = OsIf_MicrosToTicks (100, 0);
|
|
# DEBUG BEGIN_STMT
|
|
_4 = OsIf_GetCounter (0);
|
|
timeStart = _4;
|
|
# DEBUG BEGIN_STMT
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
D.6622 = OsIf_GetElapsed (&timeStart, 0);
|
|
timeElapsed = D.6622 + timeElapsed;
|
|
# DEBUG BEGIN_STMT
|
|
if (timeElapsed >= uS2Ticks)
|
|
goto <bb 4>; [INV]
|
|
else
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
result = 3;
|
|
# DEBUG BEGIN_STMT
|
|
goto <bb 6>; [INV]
|
|
|
|
<bb 5> :
|
|
# DEBUG BEGIN_STMT
|
|
_5 = (long unsigned int) mb_idx;
|
|
_6 = FlexCAN_GetBuffStatusFlag (pBase, _5);
|
|
if (_6 == 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 6>; [INV]
|
|
|
|
<bb 6> :
|
|
# DEBUG BEGIN_STMT
|
|
if (result != 3)
|
|
goto <bb 7>; [INV]
|
|
else
|
|
goto <bb 11>; [INV]
|
|
|
|
<bb 7> :
|
|
# DEBUG BEGIN_STMT
|
|
flexcan_mb_config = *flexcan_mb;
|
|
# DEBUG BEGIN_STMT
|
|
_7 = flexcan_mb_config >> 24;
|
|
_8 = _7 & 15;
|
|
if (_8 == 8)
|
|
goto <bb 8>; [INV]
|
|
else
|
|
goto <bb 9>; [INV]
|
|
|
|
<bb 8> :
|
|
# DEBUG BEGIN_STMT
|
|
result = 5;
|
|
|
|
<bb 9> :
|
|
# DEBUG BEGIN_STMT
|
|
_9 = flexcan_mb_config >> 24;
|
|
_10 = _9 & 15;
|
|
if (_10 == 9)
|
|
goto <bb 10>; [INV]
|
|
else
|
|
goto <bb 11>; [INV]
|
|
|
|
<bb 10> :
|
|
# DEBUG BEGIN_STMT
|
|
result = 0;
|
|
|
|
<bb 11> :
|
|
# DEBUG BEGIN_STMT
|
|
_11 = (long unsigned int) mb_idx;
|
|
FlexCAN_ClearMsgBuffIntStatusFlag (pBase, _11);
|
|
# DEBUG BEGIN_STMT
|
|
_12 = (int) mb_idx;
|
|
state->mbs[_12].state = 0;
|
|
# DEBUG BEGIN_STMT
|
|
D.6631 = result;
|
|
timeStart = {CLOBBER};
|
|
return D.6631;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_IRQHandlerEnhancedRxFIFO (uint8 instance, uint32 intType)
|
|
{
|
|
struct Flexcan_Ip_MsgBuffType data;
|
|
struct Flexcan_Ip_StateType * state;
|
|
struct FLEXCAN_Type * base;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) instance;
|
|
base = g_Flexcan_Ip_aBase[_1];
|
|
# DEBUG BEGIN_STMT
|
|
_2 = (int) instance;
|
|
state = g_flexcan_Ip_StatePtr[_2];
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
switch (intType) <default: <L20> [INV], case 28: <L0> [INV], case 29: <L9> [INV], case 30: <L12> [INV], case 31: <L15> [INV]>
|
|
|
|
<bb 3> :
|
|
<L0>:
|
|
# DEBUG BEGIN_STMT
|
|
_3 = state->enhancedFifoOutput.state;
|
|
if (_3 == 1)
|
|
goto <bb 4>; [INV]
|
|
else
|
|
goto <bb 16>; [INV]
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
_4 = state->enhancedFifoOutput.pMBmessage;
|
|
if (_4 == 0B)
|
|
goto <bb 5>; [INV]
|
|
else
|
|
goto <bb 6>; [INV]
|
|
|
|
<bb 5> :
|
|
# DEBUG BEGIN_STMT
|
|
state->enhancedFifoOutput.pMBmessage = &data;
|
|
|
|
<bb 6> :
|
|
# DEBUG BEGIN_STMT
|
|
_5 = state->enhancedFifoOutput.pMBmessage;
|
|
FlexCAN_ReadEnhancedRxFifo (base, _5);
|
|
# DEBUG BEGIN_STMT
|
|
FlexCAN_ClearEnhancedRxFifoIntStatusFlag (base, intType);
|
|
# DEBUG BEGIN_STMT
|
|
FlexCAN_ClearEnhancedRxFifoIntStatusFlag (base, 29);
|
|
# DEBUG BEGIN_STMT
|
|
FlexCAN_ClearEnhancedRxFifoIntStatusFlag (base, 30);
|
|
# DEBUG BEGIN_STMT
|
|
state->enhancedFifoOutput.state = 0;
|
|
# DEBUG BEGIN_STMT
|
|
_6 = state->callback;
|
|
if (_6 != 0B)
|
|
goto <bb 7>; [INV]
|
|
else
|
|
goto <bb 8>; [INV]
|
|
|
|
<bb 7> :
|
|
# DEBUG BEGIN_STMT
|
|
_7 = state->callback;
|
|
_7 (instance, 5, 255, state);
|
|
|
|
<bb 8> :
|
|
# DEBUG BEGIN_STMT
|
|
_8 = state->enhancedFifoOutput.state;
|
|
if (_8 == 0)
|
|
goto <bb 9>; [INV]
|
|
else
|
|
goto <bb 16>; [INV]
|
|
|
|
<bb 9> :
|
|
# DEBUG BEGIN_STMT
|
|
FlexCAN_CompleteRxMessageEnhancedFifoData (instance);
|
|
goto <bb 16>; [INV]
|
|
|
|
<bb 10> :
|
|
<L9>:
|
|
# DEBUG BEGIN_STMT
|
|
FlexCAN_ClearEnhancedRxFifoIntStatusFlag (base, intType);
|
|
# DEBUG BEGIN_STMT
|
|
_9 = state->callback;
|
|
if (_9 != 0B)
|
|
goto <bb 11>; [INV]
|
|
else
|
|
goto <bb 16>; [INV]
|
|
|
|
<bb 11> :
|
|
# DEBUG BEGIN_STMT
|
|
_10 = state->callback;
|
|
_10 (instance, 6, 255, state);
|
|
goto <bb 16>; [INV]
|
|
|
|
<bb 12> :
|
|
<L12>:
|
|
# DEBUG BEGIN_STMT
|
|
FlexCAN_ClearEnhancedRxFifoIntStatusFlag (base, intType);
|
|
# DEBUG BEGIN_STMT
|
|
_11 = state->callback;
|
|
if (_11 != 0B)
|
|
goto <bb 13>; [INV]
|
|
else
|
|
goto <bb 16>; [INV]
|
|
|
|
<bb 13> :
|
|
# DEBUG BEGIN_STMT
|
|
_12 = state->callback;
|
|
_12 (instance, 7, 255, state);
|
|
goto <bb 16>; [INV]
|
|
|
|
<bb 14> :
|
|
<L15>:
|
|
# DEBUG BEGIN_STMT
|
|
FlexCAN_ClearEnhancedRxFifoIntStatusFlag (base, intType);
|
|
# DEBUG BEGIN_STMT
|
|
_13 = state->callback;
|
|
if (_13 != 0B)
|
|
goto <bb 15>; [INV]
|
|
else
|
|
goto <bb 16>; [INV]
|
|
|
|
<bb 15> :
|
|
# DEBUG BEGIN_STMT
|
|
_14 = state->callback;
|
|
_14 (instance, 8, 255, state);
|
|
|
|
<bb 16> :
|
|
<L20>:
|
|
data = {CLOBBER};
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_ProcessIRQHandlerEnhancedRxFIFO (uint8 u8Instance, boolean bIsSpuriousIntPrevious)
|
|
{
|
|
boolean bIsSpuriousInt;
|
|
uint32 u32intType;
|
|
const struct Flexcan_Ip_StateType * state;
|
|
struct FLEXCAN_Type * base;
|
|
boolean D.6241;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) u8Instance;
|
|
base = g_Flexcan_Ip_aBase[_1];
|
|
# DEBUG BEGIN_STMT
|
|
_2 = (int) u8Instance;
|
|
state = g_flexcan_Ip_StatePtr[_2];
|
|
# DEBUG BEGIN_STMT
|
|
u32intType = 0;
|
|
# DEBUG BEGIN_STMT
|
|
bIsSpuriousInt = bIsSpuriousIntPrevious;
|
|
# DEBUG BEGIN_STMT
|
|
u32intType = 31;
|
|
goto <bb 10>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
_3 = FlexCAN_GetEnhancedRxFIFOStatusFlag (base, u32intType);
|
|
if (_3 != 0)
|
|
goto <bb 4>; [INV]
|
|
else
|
|
goto <bb 9>; [INV]
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
_4 = FlexCAN_GetEnhancedRxFIFOIntStatusFlag (base, u32intType);
|
|
if (_4 != 0)
|
|
goto <bb 5>; [INV]
|
|
else
|
|
goto <bb 6>; [INV]
|
|
|
|
<bb 5> :
|
|
# DEBUG BEGIN_STMT
|
|
FlexCAN_IRQHandlerEnhancedRxFIFO (u8Instance, u32intType);
|
|
# DEBUG BEGIN_STMT
|
|
bIsSpuriousInt = 0;
|
|
goto <bb 9>; [INV]
|
|
|
|
<bb 6> :
|
|
# DEBUG BEGIN_STMT
|
|
if (bIsSpuriousInt != 0)
|
|
goto <bb 7>; [INV]
|
|
else
|
|
goto <bb 9>; [INV]
|
|
|
|
<bb 7> :
|
|
_5 = state->enhancedFifoOutput.isPolling;
|
|
_6 = ~_5;
|
|
if (_6 != 0)
|
|
goto <bb 8>; [INV]
|
|
else
|
|
goto <bb 9>; [INV]
|
|
|
|
<bb 8> :
|
|
# DEBUG BEGIN_STMT
|
|
FlexCAN_ClearEnhancedRxFifoIntStatusFlag (base, u32intType);
|
|
|
|
<bb 9> :
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
u32intType = u32intType + 4294967295;
|
|
|
|
<bb 10> :
|
|
# DEBUG BEGIN_STMT
|
|
if (u32intType > 27)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 11>; [INV]
|
|
|
|
<bb 11> :
|
|
# DEBUG BEGIN_STMT
|
|
D.6241 = bIsSpuriousInt;
|
|
return D.6241;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_ProcessSpuriousInterruptMB (uint8 instance, uint32 startMbIdx, uint32 endMbIdx)
|
|
{
|
|
uint32 u32MbHandle;
|
|
uint32 mb_idx;
|
|
struct Flexcan_Ip_StateType * state;
|
|
struct FLEXCAN_Type * base;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) instance;
|
|
base = g_Flexcan_Ip_aBase[_1];
|
|
# DEBUG BEGIN_STMT
|
|
_2 = (int) instance;
|
|
state = g_flexcan_Ip_StatePtr[_2];
|
|
# DEBUG BEGIN_STMT
|
|
mb_idx = 0;
|
|
# DEBUG BEGIN_STMT
|
|
u32MbHandle = 0;
|
|
# DEBUG BEGIN_STMT
|
|
mb_idx = startMbIdx;
|
|
goto <bb 12>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
_3 = FlexCAN_GetBuffStatusFlag (base, mb_idx);
|
|
if (_3 != 0)
|
|
goto <bb 4>; [INV]
|
|
else
|
|
goto <bb 11>; [INV]
|
|
|
|
<bb 4> :
|
|
_4 = FlexCAN_GetBuffStatusImask (base, mb_idx);
|
|
if (_4 == 0)
|
|
goto <bb 5>; [INV]
|
|
else
|
|
goto <bb 11>; [INV]
|
|
|
|
<bb 5> :
|
|
# DEBUG BEGIN_STMT
|
|
u32MbHandle = mb_idx;
|
|
# DEBUG BEGIN_STMT
|
|
_5 = state->bIsLegacyFifoEn;
|
|
if (_5 != 0)
|
|
goto <bb 6>; [INV]
|
|
else
|
|
goto <bb 8>; [INV]
|
|
|
|
<bb 6> :
|
|
if (mb_idx <= 7)
|
|
goto <bb 7>; [INV]
|
|
else
|
|
goto <bb 8>; [INV]
|
|
|
|
<bb 7> :
|
|
# DEBUG BEGIN_STMT
|
|
u32MbHandle = 0;
|
|
|
|
<bb 8> :
|
|
# DEBUG BEGIN_STMT
|
|
_6 = state->mbs[u32MbHandle].isPolling;
|
|
_7 = ~_6;
|
|
if (_7 != 0)
|
|
goto <bb 9>; [INV]
|
|
else
|
|
goto <bb 11>; [INV]
|
|
|
|
<bb 9> :
|
|
# DEBUG BEGIN_STMT
|
|
FlexCAN_ClearMsgBuffIntStatusFlag (base, mb_idx);
|
|
# DEBUG BEGIN_STMT
|
|
_8 = state->mbs[u32MbHandle].state;
|
|
if (_8 == 2)
|
|
goto <bb 10>; [INV]
|
|
else
|
|
goto <bb 11>; [INV]
|
|
|
|
<bb 10> :
|
|
# DEBUG BEGIN_STMT
|
|
state->mbs[u32MbHandle].state = 0;
|
|
# DEBUG BEGIN_STMT
|
|
state->mbs[u32MbHandle].isPolling = 1;
|
|
|
|
<bb 11> :
|
|
# DEBUG BEGIN_STMT
|
|
mb_idx = mb_idx + 1;
|
|
|
|
<bb 12> :
|
|
# DEBUG BEGIN_STMT
|
|
if (mb_idx <= endMbIdx)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 13>; [INV]
|
|
|
|
<bb 13> :
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_IRQHandlerRxFIFO (uint8 instance, uint32 mb_idx)
|
|
{
|
|
struct Flexcan_Ip_MsgBuffType data;
|
|
struct Flexcan_Ip_StateType * state;
|
|
struct FLEXCAN_Type * base;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) instance;
|
|
base = g_Flexcan_Ip_aBase[_1];
|
|
# DEBUG BEGIN_STMT
|
|
_2 = (int) instance;
|
|
state = g_flexcan_Ip_StatePtr[_2];
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
_3 = state->mbs[0].pMBmessage;
|
|
if (_3 == 0B)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 4>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
state->mbs[0].pMBmessage = &data;
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
switch (mb_idx) <default: <L17> [INV], case 5: <L2> [INV], case 6: <L9> [INV], case 7: <L12> [INV]>
|
|
|
|
<bb 5> :
|
|
<L2>:
|
|
# DEBUG BEGIN_STMT
|
|
_4 = state->mbs[0].state;
|
|
if (_4 == 1)
|
|
goto <bb 6>; [INV]
|
|
else
|
|
goto <bb 14>; [INV]
|
|
|
|
<bb 6> :
|
|
# DEBUG BEGIN_STMT
|
|
_5 = state->mbs[0].pMBmessage;
|
|
FlexCAN_ReadRxFifo (base, _5);
|
|
# DEBUG BEGIN_STMT
|
|
FlexCAN_ClearMsgBuffIntStatusFlag (base, mb_idx);
|
|
# DEBUG BEGIN_STMT
|
|
state->mbs[0].state = 0;
|
|
# DEBUG BEGIN_STMT
|
|
_6 = state->callback;
|
|
if (_6 != 0B)
|
|
goto <bb 7>; [INV]
|
|
else
|
|
goto <bb 8>; [INV]
|
|
|
|
<bb 7> :
|
|
# DEBUG BEGIN_STMT
|
|
_7 = state->callback;
|
|
_7 (instance, 1, 0, state);
|
|
|
|
<bb 8> :
|
|
# DEBUG BEGIN_STMT
|
|
_8 = state->mbs[0].state;
|
|
if (_8 == 0)
|
|
goto <bb 9>; [INV]
|
|
else
|
|
goto <bb 14>; [INV]
|
|
|
|
<bb 9> :
|
|
# DEBUG BEGIN_STMT
|
|
state->mbs[0].isPolling = 1;
|
|
# DEBUG BEGIN_STMT
|
|
FlexCAN_CompleteRxMessageFifoData (instance);
|
|
goto <bb 14>; [INV]
|
|
|
|
<bb 10> :
|
|
<L9>:
|
|
# DEBUG BEGIN_STMT
|
|
FlexCAN_ClearMsgBuffIntStatusFlag (base, mb_idx);
|
|
# DEBUG BEGIN_STMT
|
|
_9 = state->callback;
|
|
if (_9 != 0B)
|
|
goto <bb 11>; [INV]
|
|
else
|
|
goto <bb 14>; [INV]
|
|
|
|
<bb 11> :
|
|
# DEBUG BEGIN_STMT
|
|
_10 = state->callback;
|
|
_10 (instance, 2, 0, state);
|
|
goto <bb 14>; [INV]
|
|
|
|
<bb 12> :
|
|
<L12>:
|
|
# DEBUG BEGIN_STMT
|
|
FlexCAN_ClearMsgBuffIntStatusFlag (base, mb_idx);
|
|
# DEBUG BEGIN_STMT
|
|
_11 = state->callback;
|
|
if (_11 != 0B)
|
|
goto <bb 13>; [INV]
|
|
else
|
|
goto <bb 14>; [INV]
|
|
|
|
<bb 13> :
|
|
# DEBUG BEGIN_STMT
|
|
_12 = state->callback;
|
|
_12 (instance, 3, 0, state);
|
|
|
|
<bb 14> :
|
|
<L17>:
|
|
data = {CLOBBER};
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_IRQHandlerTxMB (uint8 u8Instance, uint32 u32MbIdx)
|
|
{
|
|
boolean bCurrentIntStat;
|
|
struct Flexcan_Ip_MsgBuffType mb;
|
|
struct Flexcan_Ip_StateType * pState;
|
|
struct FLEXCAN_Type * pBase;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) u8Instance;
|
|
pBase = g_Flexcan_Ip_aBase[_1];
|
|
# DEBUG BEGIN_STMT
|
|
_2 = (int) u8Instance;
|
|
pState = g_flexcan_Ip_StatePtr[_2];
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
bCurrentIntStat = 0;
|
|
# DEBUG BEGIN_STMT
|
|
_3 = pState->mbs[u32MbIdx].isRemote;
|
|
if (_3 != 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
FlexCAN_LockRxMsgBuff (pBase, u32MbIdx);
|
|
# DEBUG BEGIN_STMT
|
|
FlexCAN_GetMsgBuff (pBase, u32MbIdx, &mb);
|
|
# DEBUG BEGIN_STMT
|
|
FlexCAN_UnlockRxMsgBuff (pBase);
|
|
# DEBUG BEGIN_STMT
|
|
_4 = mb.time_stamp;
|
|
pState->mbs[u32MbIdx].time_stamp = _4;
|
|
# DEBUG BEGIN_STMT
|
|
_5 = mb.cs;
|
|
_6 = _5 >> 24;
|
|
_7 = _6 & 15;
|
|
if (_7 == 4)
|
|
goto <bb 4>; [INV]
|
|
else
|
|
goto <bb 6>; [INV]
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
FlexCAN_ClearMsgBuffIntStatusFlag (pBase, u32MbIdx);
|
|
goto <bb 6>; [INV]
|
|
|
|
<bb 5> :
|
|
# DEBUG BEGIN_STMT
|
|
_8 = FlexCAN_GetMsgBuffTimestamp (pBase, u32MbIdx);
|
|
pState->mbs[u32MbIdx].time_stamp = _8;
|
|
# DEBUG BEGIN_STMT
|
|
FlexCAN_UnlockRxMsgBuff (pBase);
|
|
# DEBUG BEGIN_STMT
|
|
FlexCAN_ClearMsgBuffIntStatusFlag (pBase, u32MbIdx);
|
|
|
|
<bb 6> :
|
|
# DEBUG BEGIN_STMT
|
|
pState->mbs[u32MbIdx].state = 0;
|
|
# DEBUG BEGIN_STMT
|
|
bCurrentIntStat = pState->mbs[u32MbIdx].isPolling;
|
|
# DEBUG BEGIN_STMT
|
|
_9 = pState->callback;
|
|
if (_9 != 0B)
|
|
goto <bb 7>; [INV]
|
|
else
|
|
goto <bb 8>; [INV]
|
|
|
|
<bb 7> :
|
|
# DEBUG BEGIN_STMT
|
|
_10 = pState->callback;
|
|
_10 (u8Instance, 4, u32MbIdx, pState);
|
|
|
|
<bb 8> :
|
|
# DEBUG BEGIN_STMT
|
|
_11 = pState->mbs[u32MbIdx].state;
|
|
if (_11 == 0)
|
|
goto <bb 9>; [INV]
|
|
else
|
|
goto <bb 11>; [INV]
|
|
|
|
<bb 9> :
|
|
_12 = pState->mbs[u32MbIdx].isPolling;
|
|
_13 = ~_12;
|
|
if (_13 != 0)
|
|
goto <bb 10>; [INV]
|
|
else
|
|
goto <bb 11>; [INV]
|
|
|
|
<bb 10> :
|
|
# DEBUG BEGIN_STMT
|
|
pState->mbs[u32MbIdx].isPolling = 1;
|
|
# DEBUG BEGIN_STMT
|
|
_14 = pState->isIntActive;
|
|
FlexCAN_SetMsgBuffIntCmd (pBase, u8Instance, u32MbIdx, 0, _14);
|
|
goto <bb 14>; [INV]
|
|
|
|
<bb 11> :
|
|
# DEBUG BEGIN_STMT
|
|
_15 = ~bCurrentIntStat;
|
|
if (_15 != 0)
|
|
goto <bb 12>; [INV]
|
|
else
|
|
goto <bb 14>; [INV]
|
|
|
|
<bb 12> :
|
|
_16 = pState->mbs[u32MbIdx].isPolling;
|
|
if (_16 != 0)
|
|
goto <bb 13>; [INV]
|
|
else
|
|
goto <bb 14>; [INV]
|
|
|
|
<bb 13> :
|
|
# DEBUG BEGIN_STMT
|
|
_17 = pState->isIntActive;
|
|
FlexCAN_SetMsgBuffIntCmd (pBase, u8Instance, u32MbIdx, 0, _17);
|
|
|
|
<bb 14> :
|
|
# DEBUG BEGIN_STMT
|
|
mb = {CLOBBER};
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_IRQHandlerRxMB (uint8 instance, uint32 mb_idx)
|
|
{
|
|
boolean bCurrentIntStat;
|
|
struct Flexcan_Ip_MsgBuffType data;
|
|
struct Flexcan_Ip_StateType * state;
|
|
struct FLEXCAN_Type * base;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) instance;
|
|
base = g_Flexcan_Ip_aBase[_1];
|
|
# DEBUG BEGIN_STMT
|
|
_2 = (int) instance;
|
|
state = g_flexcan_Ip_StatePtr[_2];
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
bCurrentIntStat = 0;
|
|
# DEBUG BEGIN_STMT
|
|
_3 = state->mbs[mb_idx].pMBmessage;
|
|
if (_3 == 0B)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 4>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
state->mbs[mb_idx].pMBmessage = &data;
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
FlexCAN_LockRxMsgBuff (base, mb_idx);
|
|
# DEBUG BEGIN_STMT
|
|
_4 = state->mbs[mb_idx].pMBmessage;
|
|
FlexCAN_GetMsgBuff (base, mb_idx, _4);
|
|
# DEBUG BEGIN_STMT
|
|
FlexCAN_ClearMsgBuffIntStatusFlag (base, mb_idx);
|
|
# DEBUG BEGIN_STMT
|
|
FlexCAN_UnlockRxMsgBuff (base);
|
|
# DEBUG BEGIN_STMT
|
|
state->mbs[mb_idx].state = 0;
|
|
# DEBUG BEGIN_STMT
|
|
bCurrentIntStat = state->mbs[mb_idx].isPolling;
|
|
# DEBUG BEGIN_STMT
|
|
_5 = state->callback;
|
|
if (_5 != 0B)
|
|
goto <bb 5>; [INV]
|
|
else
|
|
goto <bb 6>; [INV]
|
|
|
|
<bb 5> :
|
|
# DEBUG BEGIN_STMT
|
|
_6 = state->callback;
|
|
_6 (instance, 0, mb_idx, state);
|
|
|
|
<bb 6> :
|
|
# DEBUG BEGIN_STMT
|
|
_7 = state->mbs[mb_idx].state;
|
|
if (_7 == 0)
|
|
goto <bb 7>; [INV]
|
|
else
|
|
goto <bb 9>; [INV]
|
|
|
|
<bb 7> :
|
|
_8 = state->mbs[mb_idx].isPolling;
|
|
_9 = ~_8;
|
|
if (_9 != 0)
|
|
goto <bb 8>; [INV]
|
|
else
|
|
goto <bb 9>; [INV]
|
|
|
|
<bb 8> :
|
|
# DEBUG BEGIN_STMT
|
|
state->mbs[mb_idx].isPolling = 1;
|
|
# DEBUG BEGIN_STMT
|
|
_10 = state->isIntActive;
|
|
FlexCAN_SetMsgBuffIntCmd (base, instance, mb_idx, 0, _10);
|
|
goto <bb 12>; [INV]
|
|
|
|
<bb 9> :
|
|
# DEBUG BEGIN_STMT
|
|
_11 = ~bCurrentIntStat;
|
|
if (_11 != 0)
|
|
goto <bb 10>; [INV]
|
|
else
|
|
goto <bb 12>; [INV]
|
|
|
|
<bb 10> :
|
|
_12 = state->mbs[mb_idx].isPolling;
|
|
if (_12 != 0)
|
|
goto <bb 11>; [INV]
|
|
else
|
|
goto <bb 12>; [INV]
|
|
|
|
<bb 11> :
|
|
# DEBUG BEGIN_STMT
|
|
_13 = state->isIntActive;
|
|
FlexCAN_SetMsgBuffIntCmd (base, instance, mb_idx, 0, _13);
|
|
|
|
<bb 12> :
|
|
# DEBUG BEGIN_STMT
|
|
data = {CLOBBER};
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_StartRxMessageFifoData (uint8 instance, struct Flexcan_Ip_MsgBuffType * data)
|
|
{
|
|
Flexcan_Ip_StatusType eResult;
|
|
struct Flexcan_Ip_StateType * state;
|
|
struct FLEXCAN_Type * base;
|
|
Flexcan_Ip_StatusType D.6048;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
base = 0B;
|
|
# DEBUG BEGIN_STMT
|
|
state = 0B;
|
|
# DEBUG BEGIN_STMT
|
|
eResult = 0;
|
|
# DEBUG BEGIN_STMT
|
|
_1 = instance <= 5;
|
|
DevAssert (_1);
|
|
# DEBUG BEGIN_STMT
|
|
_2 = (int) instance;
|
|
base = g_Flexcan_Ip_aBase[_2];
|
|
# DEBUG BEGIN_STMT
|
|
_3 = (int) instance;
|
|
state = g_flexcan_Ip_StatePtr[_3];
|
|
# DEBUG BEGIN_STMT
|
|
_4 = state->bIsLegacyFifoEn;
|
|
_5 = ~_4;
|
|
if (_5 != 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 4>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
eResult = 1;
|
|
goto <bb 10>; [INV]
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
_6 = state->mbs[0].state;
|
|
if (_6 != 0)
|
|
goto <bb 5>; [INV]
|
|
else
|
|
goto <bb 6>; [INV]
|
|
|
|
<bb 5> :
|
|
# DEBUG BEGIN_STMT
|
|
eResult = 2;
|
|
goto <bb 10>; [INV]
|
|
|
|
<bb 6> :
|
|
# DEBUG BEGIN_STMT
|
|
state->mbs[0].state = 1;
|
|
# DEBUG BEGIN_STMT
|
|
_7 = state->transferType;
|
|
if (_7 == 1)
|
|
goto <bb 7>; [INV]
|
|
else
|
|
goto <bb 8>; [INV]
|
|
|
|
<bb 7> :
|
|
# DEBUG BEGIN_STMT
|
|
state->mbs[0].isPolling = 1;
|
|
|
|
<bb 8> :
|
|
# DEBUG BEGIN_STMT
|
|
state->mbs[0].pMBmessage = data;
|
|
# DEBUG BEGIN_STMT
|
|
_8 = state->transferType;
|
|
if (_8 == 0)
|
|
goto <bb 9>; [INV]
|
|
else
|
|
goto <bb 10>; [INV]
|
|
|
|
<bb 9> :
|
|
# DEBUG BEGIN_STMT
|
|
state->mbs[0].isPolling = 0;
|
|
# DEBUG BEGIN_STMT
|
|
_9 = state->isIntActive;
|
|
FlexCAN_SetMsgBuffIntCmd (base, instance, 6, 1, _9);
|
|
# DEBUG BEGIN_STMT
|
|
_10 = state->isIntActive;
|
|
FlexCAN_SetMsgBuffIntCmd (base, instance, 7, 1, _10);
|
|
# DEBUG BEGIN_STMT
|
|
_11 = state->isIntActive;
|
|
FlexCAN_SetMsgBuffIntCmd (base, instance, 5, 1, _11);
|
|
|
|
<bb 10> :
|
|
# DEBUG BEGIN_STMT
|
|
D.6048 = eResult;
|
|
return D.6048;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_StartSendData (uint8 Flexcan_Ip_u8Instance, uint8 mb_idx, const struct Flexcan_Ip_DataInfoType * tx_info, uint32 msg_id, const uint8 * mb_data)
|
|
{
|
|
struct FLEXCAN_Type * base;
|
|
struct Flexcan_Ip_StateType * state;
|
|
struct Flexcan_Ip_MsbuffCodeStatusType cs;
|
|
Flexcan_Ip_StatusType eResult;
|
|
Flexcan_Ip_StatusType D.5930;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
eResult = 0;
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) Flexcan_Ip_u8Instance;
|
|
state = g_flexcan_Ip_StatePtr[_1];
|
|
# DEBUG BEGIN_STMT
|
|
_2 = (int) Flexcan_Ip_u8Instance;
|
|
base = g_Flexcan_Ip_aBase[_2];
|
|
# DEBUG BEGIN_STMT
|
|
_3 = Flexcan_Ip_u8Instance <= 5;
|
|
DevAssert (_3);
|
|
# DEBUG BEGIN_STMT
|
|
_4 = tx_info != 0B;
|
|
DevAssert (_4);
|
|
# DEBUG BEGIN_STMT
|
|
_5 = state->bIsLegacyFifoEn;
|
|
_6 = state->u32MaxMbNum;
|
|
_7 = FlexCAN_IsMbOutOfRange (base, mb_idx, _5, _6);
|
|
if (_7 != 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 4>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
eResult = 4;
|
|
goto <bb 10>; [INV]
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
_8 = (int) mb_idx;
|
|
_9 = state->mbs[_8].state;
|
|
if (_9 != 0)
|
|
goto <bb 5>; [INV]
|
|
else
|
|
goto <bb 6>; [INV]
|
|
|
|
<bb 5> :
|
|
# DEBUG BEGIN_STMT
|
|
eResult = 2;
|
|
goto <bb 10>; [INV]
|
|
|
|
<bb 6> :
|
|
# DEBUG BEGIN_STMT
|
|
_10 = (long unsigned int) mb_idx;
|
|
FlexCAN_ClearMsgBuffIntStatusFlag (base, _10);
|
|
# DEBUG BEGIN_STMT
|
|
_11 = (int) mb_idx;
|
|
state->mbs[_11].state = 2;
|
|
# DEBUG BEGIN_STMT
|
|
_12 = (int) mb_idx;
|
|
state->mbs[_12].time_stamp = 0;
|
|
# DEBUG BEGIN_STMT
|
|
_13 = (int) mb_idx;
|
|
_14 = tx_info->is_polling;
|
|
state->mbs[_13].isPolling = _14;
|
|
# DEBUG BEGIN_STMT
|
|
_15 = (int) mb_idx;
|
|
_16 = tx_info->is_remote;
|
|
state->mbs[_15].isRemote = _16;
|
|
# DEBUG BEGIN_STMT
|
|
_17 = tx_info->data_length;
|
|
cs.dataLen = _17;
|
|
# DEBUG BEGIN_STMT
|
|
_18 = tx_info->msg_id_type;
|
|
cs.msgIdType = _18;
|
|
# DEBUG BEGIN_STMT
|
|
_19 = tx_info->fd_enable;
|
|
cs.fd_enable = _19;
|
|
# DEBUG BEGIN_STMT
|
|
_20 = tx_info->fd_padding;
|
|
cs.fd_padding = _20;
|
|
# DEBUG BEGIN_STMT
|
|
_21 = tx_info->enable_brs;
|
|
cs.enable_brs = _21;
|
|
# DEBUG BEGIN_STMT
|
|
_22 = tx_info->is_remote;
|
|
if (_22 != 0)
|
|
goto <bb 7>; [INV]
|
|
else
|
|
goto <bb 8>; [INV]
|
|
|
|
<bb 7> :
|
|
# DEBUG BEGIN_STMT
|
|
cs.code = 28;
|
|
goto <bb 9>; [INV]
|
|
|
|
<bb 8> :
|
|
# DEBUG BEGIN_STMT
|
|
cs.code = 12;
|
|
|
|
<bb 9> :
|
|
# DEBUG BEGIN_STMT
|
|
_23 = (long unsigned int) mb_idx;
|
|
FlexCAN_SetTxMsgBuff (base, _23, &cs, msg_id, mb_data, 0);
|
|
|
|
<bb 10> :
|
|
# DEBUG BEGIN_STMT
|
|
D.5930 = eResult;
|
|
cs = {CLOBBER};
|
|
return D.5930;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_StartRxMessageBufferData (uint8 instance, uint8 mb_idx, struct Flexcan_Ip_MsgBuffType * data, boolean isPolling)
|
|
{
|
|
struct Flexcan_Ip_StateType * state;
|
|
const struct FLEXCAN_Type * base;
|
|
Flexcan_Ip_StatusType result;
|
|
Flexcan_Ip_StatusType D.5960;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
result = 0;
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) instance;
|
|
base = g_Flexcan_Ip_aBase[_1];
|
|
# DEBUG BEGIN_STMT
|
|
_2 = (int) instance;
|
|
state = g_flexcan_Ip_StatePtr[_2];
|
|
# DEBUG BEGIN_STMT
|
|
_3 = instance <= 5;
|
|
DevAssert (_3);
|
|
# DEBUG BEGIN_STMT
|
|
_4 = state->bIsLegacyFifoEn;
|
|
_5 = state->u32MaxMbNum;
|
|
_6 = FlexCAN_IsMbOutOfRange (base, mb_idx, _4, _5);
|
|
if (_6 != 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 4>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
result = 4;
|
|
goto <bb 7>; [INV]
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
_7 = (int) mb_idx;
|
|
_8 = state->mbs[_7].state;
|
|
if (_8 != 0)
|
|
goto <bb 5>; [INV]
|
|
else
|
|
goto <bb 6>; [INV]
|
|
|
|
<bb 5> :
|
|
# DEBUG BEGIN_STMT
|
|
result = 2;
|
|
goto <bb 7>; [INV]
|
|
|
|
<bb 6> :
|
|
# DEBUG BEGIN_STMT
|
|
_9 = (int) mb_idx;
|
|
state->mbs[_9].state = 1;
|
|
# DEBUG BEGIN_STMT
|
|
_10 = (int) mb_idx;
|
|
state->mbs[_10].pMBmessage = data;
|
|
# DEBUG BEGIN_STMT
|
|
_11 = (int) mb_idx;
|
|
state->mbs[_11].isPolling = isPolling;
|
|
|
|
<bb 7> :
|
|
# DEBUG BEGIN_STMT
|
|
D.5960 = result;
|
|
return D.5960;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_ProccessLegacyRxFIFO (uint8 u8Instance, uint32 u32TimeoutMs)
|
|
{
|
|
uint32 u32intType;
|
|
uint32 mS2Ticks;
|
|
uint32 timeElapsed;
|
|
uint32 timeStart;
|
|
struct FLEXCAN_Type * pBase;
|
|
struct Flexcan_Ip_StateType * pState;
|
|
Flexcan_Ip_StatusType eResult;
|
|
Flexcan_Ip_StatusType D.6108;
|
|
long unsigned int D.6101;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
eResult = 0;
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) u8Instance;
|
|
pState = g_flexcan_Ip_StatePtr[_1];
|
|
# DEBUG BEGIN_STMT
|
|
_2 = (int) u8Instance;
|
|
pBase = g_Flexcan_Ip_aBase[_2];
|
|
# DEBUG BEGIN_STMT
|
|
timeStart = 0;
|
|
# DEBUG BEGIN_STMT
|
|
timeElapsed = 0;
|
|
# DEBUG BEGIN_STMT
|
|
_3 = u32TimeoutMs * 1000;
|
|
mS2Ticks = OsIf_MicrosToTicks (_3, 0);
|
|
# DEBUG BEGIN_STMT
|
|
u32intType = 0;
|
|
# DEBUG BEGIN_STMT
|
|
_4 = OsIf_GetCounter (0);
|
|
timeStart = _4;
|
|
# DEBUG BEGIN_STMT
|
|
goto <bb 11>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
_5 = pState->transferType;
|
|
if (_5 == 1)
|
|
goto <bb 4>; [INV]
|
|
else
|
|
goto <bb 9>; [INV]
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
u32intType = 7;
|
|
goto <bb 8>; [INV]
|
|
|
|
<bb 5> :
|
|
# DEBUG BEGIN_STMT
|
|
_6 = FlexCAN_GetBuffStatusFlag (pBase, u32intType);
|
|
if (_6 != 0)
|
|
goto <bb 6>; [INV]
|
|
else
|
|
goto <bb 7>; [INV]
|
|
|
|
<bb 6> :
|
|
# DEBUG BEGIN_STMT
|
|
FlexCAN_IRQHandlerRxFIFO (u8Instance, u32intType);
|
|
|
|
<bb 7> :
|
|
# DEBUG BEGIN_STMT
|
|
u32intType = u32intType + 4294967295;
|
|
|
|
<bb 8> :
|
|
# DEBUG BEGIN_STMT
|
|
if (u32intType > 4)
|
|
goto <bb 5>; [INV]
|
|
else
|
|
goto <bb 9>; [INV]
|
|
|
|
<bb 9> :
|
|
# DEBUG BEGIN_STMT
|
|
D.6101 = OsIf_GetElapsed (&timeStart, 0);
|
|
timeElapsed = D.6101 + timeElapsed;
|
|
# DEBUG BEGIN_STMT
|
|
if (timeElapsed >= mS2Ticks)
|
|
goto <bb 10>; [INV]
|
|
else
|
|
goto <bb 11>; [INV]
|
|
|
|
<bb 10> :
|
|
# DEBUG BEGIN_STMT
|
|
eResult = 3;
|
|
# DEBUG BEGIN_STMT
|
|
goto <bb 12>; [INV]
|
|
|
|
<bb 11> :
|
|
# DEBUG BEGIN_STMT
|
|
_7 = pState->mbs[0].state;
|
|
if (_7 == 1)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 12>; [INV]
|
|
|
|
<bb 12> :
|
|
# DEBUG BEGIN_STMT
|
|
if (eResult == 3)
|
|
goto <bb 13>; [INV]
|
|
else
|
|
goto <bb 15>; [INV]
|
|
|
|
<bb 13> :
|
|
_8 = pState->transferType;
|
|
if (_8 != 1)
|
|
goto <bb 14>; [INV]
|
|
else
|
|
goto <bb 15>; [INV]
|
|
|
|
<bb 14> :
|
|
# DEBUG BEGIN_STMT
|
|
_9 = pState->isIntActive;
|
|
FlexCAN_SetMsgBuffIntCmd (pBase, u8Instance, 5, 0, _9);
|
|
# DEBUG BEGIN_STMT
|
|
_10 = pState->isIntActive;
|
|
FlexCAN_SetMsgBuffIntCmd (pBase, u8Instance, 6, 0, _10);
|
|
# DEBUG BEGIN_STMT
|
|
_11 = pState->isIntActive;
|
|
FlexCAN_SetMsgBuffIntCmd (pBase, u8Instance, 7, 0, _11);
|
|
|
|
<bb 15> :
|
|
# DEBUG BEGIN_STMT
|
|
_12 = pState->mbs[0].state;
|
|
_13 = (int) _12;
|
|
switch (_13) <default: <L18> [INV], case 0: <L17> [INV], case 1: <L16> [INV]>
|
|
|
|
<bb 16> :
|
|
<L16>:
|
|
# DEBUG BEGIN_STMT
|
|
pState->mbs[0].state = 0;
|
|
# DEBUG BEGIN_STMT
|
|
goto <bb 19>; [INV]
|
|
|
|
<bb 17> :
|
|
<L17>:
|
|
# DEBUG BEGIN_STMT
|
|
eResult = 0;
|
|
# DEBUG BEGIN_STMT
|
|
goto <bb 19>; [INV]
|
|
|
|
<bb 18> :
|
|
<L18>:
|
|
# DEBUG BEGIN_STMT
|
|
eResult = 1;
|
|
# DEBUG BEGIN_STMT
|
|
|
|
<bb 19> :
|
|
# DEBUG BEGIN_STMT
|
|
D.6108 = eResult;
|
|
timeStart = {CLOBBER};
|
|
return D.6108;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_ProccessEnhancedRxFifo (uint8 u8Instance, uint32 u32TimeoutMs)
|
|
{
|
|
uint32 u32intType;
|
|
uint32 mS2Ticks;
|
|
uint32 timeElapsed;
|
|
uint32 timeStart;
|
|
struct FLEXCAN_Type * pBase;
|
|
struct Flexcan_Ip_StateType * pState;
|
|
Flexcan_Ip_StatusType eResult;
|
|
Flexcan_Ip_StatusType D.6075;
|
|
long unsigned int D.6068;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
eResult = 0;
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) u8Instance;
|
|
pState = g_flexcan_Ip_StatePtr[_1];
|
|
# DEBUG BEGIN_STMT
|
|
_2 = (int) u8Instance;
|
|
pBase = g_Flexcan_Ip_aBase[_2];
|
|
# DEBUG BEGIN_STMT
|
|
timeStart = 0;
|
|
# DEBUG BEGIN_STMT
|
|
timeElapsed = 0;
|
|
# DEBUG BEGIN_STMT
|
|
_3 = u32TimeoutMs * 1000;
|
|
mS2Ticks = OsIf_MicrosToTicks (_3, 0);
|
|
# DEBUG BEGIN_STMT
|
|
u32intType = 0;
|
|
# DEBUG BEGIN_STMT
|
|
_4 = OsIf_GetCounter (0);
|
|
timeStart = _4;
|
|
# DEBUG BEGIN_STMT
|
|
goto <bb 11>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
_5 = pState->transferType;
|
|
if (_5 == 1)
|
|
goto <bb 4>; [INV]
|
|
else
|
|
goto <bb 9>; [INV]
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
u32intType = 31;
|
|
goto <bb 8>; [INV]
|
|
|
|
<bb 5> :
|
|
# DEBUG BEGIN_STMT
|
|
_6 = FlexCAN_GetEnhancedRxFIFOStatusFlag (pBase, u32intType);
|
|
if (_6 != 0)
|
|
goto <bb 6>; [INV]
|
|
else
|
|
goto <bb 7>; [INV]
|
|
|
|
<bb 6> :
|
|
# DEBUG BEGIN_STMT
|
|
FlexCAN_IRQHandlerEnhancedRxFIFO (u8Instance, u32intType);
|
|
|
|
<bb 7> :
|
|
# DEBUG BEGIN_STMT
|
|
u32intType = u32intType + 4294967295;
|
|
|
|
<bb 8> :
|
|
# DEBUG BEGIN_STMT
|
|
if (u32intType > 27)
|
|
goto <bb 5>; [INV]
|
|
else
|
|
goto <bb 9>; [INV]
|
|
|
|
<bb 9> :
|
|
# DEBUG BEGIN_STMT
|
|
D.6068 = OsIf_GetElapsed (&timeStart, 0);
|
|
timeElapsed = D.6068 + timeElapsed;
|
|
# DEBUG BEGIN_STMT
|
|
if (timeElapsed >= mS2Ticks)
|
|
goto <bb 10>; [INV]
|
|
else
|
|
goto <bb 11>; [INV]
|
|
|
|
<bb 10> :
|
|
# DEBUG BEGIN_STMT
|
|
eResult = 3;
|
|
# DEBUG BEGIN_STMT
|
|
goto <bb 12>; [INV]
|
|
|
|
<bb 11> :
|
|
# DEBUG BEGIN_STMT
|
|
_7 = pState->enhancedFifoOutput.state;
|
|
if (_7 == 1)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 12>; [INV]
|
|
|
|
<bb 12> :
|
|
# DEBUG BEGIN_STMT
|
|
if (eResult == 3)
|
|
goto <bb 13>; [INV]
|
|
else
|
|
goto <bb 15>; [INV]
|
|
|
|
<bb 13> :
|
|
_8 = pState->transferType;
|
|
if (_8 != 1)
|
|
goto <bb 14>; [INV]
|
|
else
|
|
goto <bb 15>; [INV]
|
|
|
|
<bb 14> :
|
|
# DEBUG BEGIN_STMT
|
|
FlexCAN_SetEnhancedRxFifoIntAll (pBase, 0);
|
|
|
|
<bb 15> :
|
|
# DEBUG BEGIN_STMT
|
|
_9 = pState->enhancedFifoOutput.state;
|
|
_10 = (int) _9;
|
|
switch (_10) <default: <L18> [INV], case 0: <L17> [INV], case 1: <L16> [INV]>
|
|
|
|
<bb 16> :
|
|
<L16>:
|
|
# DEBUG BEGIN_STMT
|
|
pState->enhancedFifoOutput.state = 0;
|
|
# DEBUG BEGIN_STMT
|
|
goto <bb 19>; [INV]
|
|
|
|
<bb 17> :
|
|
<L17>:
|
|
# DEBUG BEGIN_STMT
|
|
eResult = 0;
|
|
# DEBUG BEGIN_STMT
|
|
goto <bb 19>; [INV]
|
|
|
|
<bb 18> :
|
|
<L18>:
|
|
# DEBUG BEGIN_STMT
|
|
eResult = 1;
|
|
# DEBUG BEGIN_STMT
|
|
|
|
<bb 19> :
|
|
# DEBUG BEGIN_STMT
|
|
D.6075 = eResult;
|
|
timeStart = {CLOBBER};
|
|
return D.6075;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_StartRxMessageEnhancedFifoData (uint8 instance, struct Flexcan_Ip_MsgBuffType * data)
|
|
{
|
|
Flexcan_Ip_StatusType eResult;
|
|
struct Flexcan_Ip_StateType * state;
|
|
struct FLEXCAN_Type * base;
|
|
Flexcan_Ip_StatusType D.6033;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) instance;
|
|
base = g_Flexcan_Ip_aBase[_1];
|
|
# DEBUG BEGIN_STMT
|
|
_2 = (int) instance;
|
|
state = g_flexcan_Ip_StatePtr[_2];
|
|
# DEBUG BEGIN_STMT
|
|
eResult = 0;
|
|
# DEBUG BEGIN_STMT
|
|
_3 = instance <= 5;
|
|
DevAssert (_3);
|
|
# DEBUG BEGIN_STMT
|
|
_4 = state->enhancedFifoOutput.state;
|
|
if (_4 == 1)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 4>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
eResult = 2;
|
|
goto <bb 9>; [INV]
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
state->enhancedFifoOutput.state = 1;
|
|
# DEBUG BEGIN_STMT
|
|
state->enhancedFifoOutput.pMBmessage = data;
|
|
# DEBUG BEGIN_STMT
|
|
_5 = state->transferType;
|
|
if (_5 == 0)
|
|
goto <bb 5>; [INV]
|
|
else
|
|
goto <bb 7>; [INV]
|
|
|
|
<bb 5> :
|
|
# DEBUG BEGIN_STMT
|
|
state->enhancedFifoOutput.isPolling = 0;
|
|
# DEBUG BEGIN_STMT
|
|
_6 = state->isIntActive;
|
|
if (_6 != 0)
|
|
goto <bb 6>; [INV]
|
|
else
|
|
goto <bb 7>; [INV]
|
|
|
|
<bb 6> :
|
|
# DEBUG BEGIN_STMT
|
|
FlexCAN_SetEnhancedRxFifoIntAll (base, 1);
|
|
|
|
<bb 7> :
|
|
# DEBUG BEGIN_STMT
|
|
_7 = state->transferType;
|
|
if (_7 == 1)
|
|
goto <bb 8>; [INV]
|
|
else
|
|
goto <bb 9>; [INV]
|
|
|
|
<bb 8> :
|
|
# DEBUG BEGIN_STMT
|
|
state->enhancedFifoOutput.isPolling = 1;
|
|
|
|
<bb 9> :
|
|
# DEBUG BEGIN_STMT
|
|
D.6033 = eResult;
|
|
return D.6033;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_CompleteRxMessageEnhancedFifoData (uint8 instance)
|
|
{
|
|
struct Flexcan_Ip_StateType * state;
|
|
struct FLEXCAN_Type * base;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) instance;
|
|
base = g_Flexcan_Ip_aBase[_1];
|
|
# DEBUG BEGIN_STMT
|
|
_2 = (int) instance;
|
|
state = g_flexcan_Ip_StatePtr[_2];
|
|
# DEBUG BEGIN_STMT
|
|
_3 = instance <= 5;
|
|
DevAssert (_3);
|
|
# DEBUG BEGIN_STMT
|
|
_4 = FlexCAN_IsEnhancedRxFifoAvailable (base);
|
|
DevAssert (_4);
|
|
# DEBUG BEGIN_STMT
|
|
_5 = state->enhancedFifoOutput.isPolling;
|
|
_6 = ~_5;
|
|
if (_6 != 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 4>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
state->enhancedFifoOutput.isPolling = 1;
|
|
# DEBUG BEGIN_STMT
|
|
FlexCAN_SetEnhancedRxFifoIntAll (base, 0);
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
state->enhancedFifoOutput.pMBmessage = 0B;
|
|
# DEBUG BEGIN_STMT
|
|
state->enhancedFifoOutput.state = 0;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_InitController (struct FLEXCAN_Type * pBase, const struct Flexcan_Ip_ConfigType * Flexcan_Ip_pData)
|
|
{
|
|
Flexcan_Ip_StatusType eResult;
|
|
Flexcan_Ip_StatusType D.5883;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
eResult = 0;
|
|
# DEBUG BEGIN_STMT
|
|
_1 = FlexCAN_IsEnabled (pBase);
|
|
if (_1 != 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
eResult = FlexCAN_EnterFreezeMode (pBase);
|
|
# DEBUG BEGIN_STMT
|
|
if (eResult == 0)
|
|
goto <bb 4>; [INV]
|
|
else
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
eResult = FlexCAN_Disable (pBase);
|
|
|
|
<bb 5> :
|
|
# DEBUG BEGIN_STMT
|
|
if (eResult == 0)
|
|
goto <bb 6>; [INV]
|
|
else
|
|
goto <bb 14>; [INV]
|
|
|
|
<bb 6> :
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Enter_Can_CAN_EXCLUSIVE_AREA_00 ();
|
|
# DEBUG BEGIN_STMT
|
|
_2 = pBase->MCR;
|
|
_3 = _2 & 2147483647;
|
|
pBase->MCR = _3;
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Exit_Can_CAN_EXCLUSIVE_AREA_00 ();
|
|
# DEBUG BEGIN_STMT
|
|
eResult = FlexCAN_Init (pBase);
|
|
# DEBUG BEGIN_STMT
|
|
if (eResult != 0)
|
|
goto <bb 7>; [INV]
|
|
else
|
|
goto <bb 8>; [INV]
|
|
|
|
<bb 7> :
|
|
# DEBUG BEGIN_STMT
|
|
FlexCAN_EnterFreezeMode (pBase);
|
|
# DEBUG BEGIN_STMT
|
|
FlexCAN_Disable (pBase);
|
|
goto <bb 14>; [INV]
|
|
|
|
<bb 8> :
|
|
# DEBUG BEGIN_STMT
|
|
FlexCAN_DisableMemErrorDetection (pBase);
|
|
# DEBUG BEGIN_STMT
|
|
_4 = Flexcan_Ip_pData->fd_enable;
|
|
_5 = Flexcan_Ip_pData->bitRateSwitch;
|
|
FlexCAN_SetFDEnabled (pBase, _4, _5);
|
|
# DEBUG BEGIN_STMT
|
|
_6 = Flexcan_Ip_pData->ctrlOptions;
|
|
FlexCAN_ConfigCtrlOptions (pBase, _6);
|
|
# DEBUG BEGIN_STMT
|
|
_7 = Flexcan_Ip_pData->flexcanMode;
|
|
if (_7 != 2)
|
|
goto <bb 9>; [INV]
|
|
else
|
|
goto <bb 10>; [INV]
|
|
|
|
<bb 9> :
|
|
# DEBUG BEGIN_STMT
|
|
FlexCAN_SetSelfReception (pBase, 0);
|
|
|
|
<bb 10> :
|
|
# DEBUG BEGIN_STMT
|
|
eResult = FlexCAN_InitRxFifo (pBase, Flexcan_Ip_pData);
|
|
# DEBUG BEGIN_STMT
|
|
if (eResult != 0)
|
|
goto <bb 11>; [INV]
|
|
else
|
|
goto <bb 12>; [INV]
|
|
|
|
<bb 11> :
|
|
# DEBUG BEGIN_STMT
|
|
FlexCAN_EnterFreezeMode (pBase);
|
|
# DEBUG BEGIN_STMT
|
|
FlexCAN_Disable (pBase);
|
|
goto <bb 14>; [INV]
|
|
|
|
<bb 12> :
|
|
# DEBUG BEGIN_STMT
|
|
_8 = &Flexcan_Ip_pData->payload;
|
|
FlexCAN_SetPayloadSize (pBase, _8);
|
|
# DEBUG BEGIN_STMT
|
|
_9 = Flexcan_Ip_pData->max_num_mb;
|
|
eResult = FlexCAN_SetMaxMsgBuffNum (pBase, _9);
|
|
# DEBUG BEGIN_STMT
|
|
if (eResult != 0)
|
|
goto <bb 13>; [INV]
|
|
else
|
|
goto <bb 14>; [INV]
|
|
|
|
<bb 13> :
|
|
# DEBUG BEGIN_STMT
|
|
FlexCAN_EnterFreezeMode (pBase);
|
|
# DEBUG BEGIN_STMT
|
|
FlexCAN_Disable (pBase);
|
|
|
|
<bb 14> :
|
|
# DEBUG BEGIN_STMT
|
|
D.5883 = eResult;
|
|
return D.5883;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_InitRxFifo (struct FLEXCAN_Type * pBase, const struct Flexcan_Ip_ConfigType * Flexcan_Ip_pData)
|
|
{
|
|
Flexcan_Ip_StatusType eResult;
|
|
Flexcan_Ip_StatusType D.5905;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
eResult = 0;
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Flexcan_Ip_pData->is_rx_fifo_needed;
|
|
if (_1 != 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 4>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
_2 = Flexcan_Ip_pData->num_id_filters;
|
|
_3 = (long unsigned int) _2;
|
|
eResult = FlexCAN_EnableRxFifo (pBase, _3);
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
if (eResult == 0)
|
|
goto <bb 5>; [INV]
|
|
else
|
|
goto <bb 7>; [INV]
|
|
|
|
<bb 5> :
|
|
_4 = Flexcan_Ip_pData->is_enhanced_rx_fifo_needed;
|
|
if (_4 != 0)
|
|
goto <bb 6>; [INV]
|
|
else
|
|
goto <bb 7>; [INV]
|
|
|
|
<bb 6> :
|
|
# DEBUG BEGIN_STMT
|
|
_5 = Flexcan_Ip_pData->num_enhanced_std_id_filters;
|
|
_6 = Flexcan_Ip_pData->num_enhanced_ext_id_filters;
|
|
_7 = Flexcan_Ip_pData->num_enhanced_watermark;
|
|
eResult = FlexCAN_EnableEnhancedRxFifo (pBase, _5, _6, _7);
|
|
|
|
<bb 7> :
|
|
# DEBUG BEGIN_STMT
|
|
D.5905 = eResult;
|
|
return D.5905;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_SetRegDefaultVal (struct FLEXCAN_Type * base)
|
|
{
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = FlexCAN_IsEnhancedRxFifoAvailable (base);
|
|
if (_1 != 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 4>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
base->ERFSR = 4160749568;
|
|
# DEBUG BEGIN_STMT
|
|
base->ERFIER = 0;
|
|
# DEBUG BEGIN_STMT
|
|
base->ERFCR = 0;
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
base->FDCBT = 0;
|
|
# DEBUG BEGIN_STMT
|
|
base->FDCTRL = 2147500288;
|
|
# DEBUG BEGIN_STMT
|
|
base->ERRSR = 851981;
|
|
# DEBUG BEGIN_STMT
|
|
base->ERRIPPR = 0;
|
|
# DEBUG BEGIN_STMT
|
|
base->ERRIDPR = 0;
|
|
# DEBUG BEGIN_STMT
|
|
base->ERRIAR = 0;
|
|
# DEBUG BEGIN_STMT
|
|
_2 = base->CTRL2;
|
|
_3 = _2 | 536870912;
|
|
base->CTRL2 = _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 = base->MECR;
|
|
_5 = _4 & 2147483647;
|
|
base->MECR = _5;
|
|
# DEBUG BEGIN_STMT
|
|
base->MECR = 786560;
|
|
# DEBUG BEGIN_STMT
|
|
_6 = base->MECR;
|
|
_7 = _6 | 2147483648;
|
|
base->MECR = _7;
|
|
# DEBUG BEGIN_STMT
|
|
_8 = base->CTRL2;
|
|
_9 = _8 & 3758096383;
|
|
base->CTRL2 = _9;
|
|
# DEBUG BEGIN_STMT
|
|
_10 = FlexCAN_GetMaxMbNum (base);
|
|
if (_10 > 64)
|
|
goto <bb 5>; [INV]
|
|
else
|
|
goto <bb 6>; [INV]
|
|
|
|
<bb 5> :
|
|
# DEBUG BEGIN_STMT
|
|
base->IFLAG3 = 4294967295;
|
|
# DEBUG BEGIN_STMT
|
|
base->IMASK3 = 0;
|
|
|
|
<bb 6> :
|
|
# DEBUG BEGIN_STMT
|
|
_11 = FlexCAN_GetMaxMbNum (base);
|
|
if (_11 > 32)
|
|
goto <bb 7>; [INV]
|
|
else
|
|
goto <bb 8>; [INV]
|
|
|
|
<bb 7> :
|
|
# DEBUG BEGIN_STMT
|
|
base->IFLAG2 = 4294967295;
|
|
# DEBUG BEGIN_STMT
|
|
base->IMASK2 = 0;
|
|
|
|
<bb 8> :
|
|
# DEBUG BEGIN_STMT
|
|
base->IFLAG1 = 4294967295;
|
|
# DEBUG BEGIN_STMT
|
|
base->IMASK1 = 0;
|
|
# DEBUG BEGIN_STMT
|
|
base->CBT = 0;
|
|
# DEBUG BEGIN_STMT
|
|
base->CTRL2 = 1048576;
|
|
# DEBUG BEGIN_STMT
|
|
base->ESR1 = 241670;
|
|
# DEBUG BEGIN_STMT
|
|
base->ECR = 0;
|
|
# DEBUG BEGIN_STMT
|
|
base->TIMER = 0;
|
|
# DEBUG BEGIN_STMT
|
|
base->CTRL1 = 0;
|
|
# DEBUG BEGIN_STMT
|
|
base->EPRS = 0;
|
|
# DEBUG BEGIN_STMT
|
|
base->ENCBT = 0;
|
|
# DEBUG BEGIN_STMT
|
|
base->EDCBT = 0;
|
|
# DEBUG BEGIN_STMT
|
|
base->ETDC = 0;
|
|
# DEBUG BEGIN_STMT
|
|
base->MCR = 3633315855;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_GetEnhancedRxFIFOIntStatusFlag (const struct FLEXCAN_Type * base, uint32 intFlag)
|
|
{
|
|
uint8 D.6243;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = base->ERFIER;
|
|
_2 = (unsigned char) intFlag;
|
|
_3 = (int) _2;
|
|
_4 = _3 & 31;
|
|
_5 = 1 << _4;
|
|
_6 = _1 & _5;
|
|
_7 = (unsigned char) intFlag;
|
|
_8 = (int) _7;
|
|
_9 = _8 & 31;
|
|
_10 = _6 >> _9;
|
|
D.6243 = (uint8) _10;
|
|
return D.6243;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_ClearEnhancedRxFifoIntStatusFlag (struct FLEXCAN_Type * base, uint32 intFlag)
|
|
{
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = 1 << intFlag;
|
|
base->ERFSR = _1;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_GetEnhancedRxFIFOStatusFlag (const struct FLEXCAN_Type * base, uint32 intFlag)
|
|
{
|
|
uint8 D.6078;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = base->ERFSR;
|
|
_2 = (unsigned char) intFlag;
|
|
_3 = (int) _2;
|
|
_4 = _3 & 31;
|
|
_5 = 1 << _4;
|
|
_6 = _1 & _5;
|
|
_7 = (unsigned char) intFlag;
|
|
_8 = (int) _7;
|
|
_9 = _8 & 31;
|
|
_10 = _6 >> _9;
|
|
D.6078 = (uint8) _10;
|
|
return D.6078;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_SetEnhancedRxFifoIntAll (struct FLEXCAN_Type * base, boolean enable)
|
|
{
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
if (enable != 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 4>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = base->ERFIER;
|
|
_2 = _1 | 4026531840;
|
|
base->ERFIER = _2;
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
_3 = base->ERFIER;
|
|
_4 = _3 & 268435455;
|
|
base->ERFIER = _4;
|
|
|
|
<bb 5> :
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_IsEnhancedRxFifoEnabled (const struct FLEXCAN_Type * base)
|
|
{
|
|
boolean D.6022;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = base->ERFCR;
|
|
_2 = (signed int) _1;
|
|
D.6022 = _2 < 0;
|
|
return D.6022;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_SetRxMaskType (struct FLEXCAN_Type * base, Flexcan_Ip_RxMaskType type)
|
|
{
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
if (type == 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 4>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = base->MCR;
|
|
_2 = _1 & 4294901759;
|
|
base->MCR = _2;
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
_3 = base->MCR;
|
|
_4 = _3 | 65536;
|
|
base->MCR = _4;
|
|
|
|
<bb 5> :
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_SetTxArbitrationStartDelay (struct FLEXCAN_Type * base, uint8 tasd)
|
|
{
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = base->CTRL2;
|
|
_2 = _1 & 4278714367;
|
|
_3 = (long unsigned int) tasd;
|
|
_4 = _3 << 19;
|
|
_5 = _4 & 16252928;
|
|
_6 = _2 | _5;
|
|
base->CTRL2 = _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_IsFreezeMode (const struct FLEXCAN_Type * base)
|
|
{
|
|
boolean D.6140;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = base->MCR;
|
|
_2 = _1 & 16777216;
|
|
D.6140 = _2 != 0;
|
|
return D.6140;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_SetRxIndividualMask (struct FLEXCAN_Type * base, uint32 msgBuffIdx, uint32 mask)
|
|
{
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
base->RXIMR[msgBuffIdx] = mask;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_SetRxMsgBuffGlobalMask (struct FLEXCAN_Type * base, uint32 Mask)
|
|
{
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
base->RXMGMASK = Mask;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_GetMsgBuffIntStatusFlag (const struct FLEXCAN_Type * base, uint32 msgBuffIdx)
|
|
{
|
|
uint32 mask;
|
|
uint8 flag;
|
|
uint8 D.6229;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
flag = 0;
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
if (msgBuffIdx <= 31)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 4>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
mask = base->IMASK1;
|
|
# DEBUG BEGIN_STMT
|
|
_1 = base->IFLAG1;
|
|
_2 = mask & _1;
|
|
_3 = msgBuffIdx & 31;
|
|
_4 = _2 >> _3;
|
|
_5 = (unsigned char) _4;
|
|
flag = _5 & 1;
|
|
goto <bb 8>; [INV]
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
if (msgBuffIdx <= 63)
|
|
goto <bb 5>; [INV]
|
|
else
|
|
goto <bb 6>; [INV]
|
|
|
|
<bb 5> :
|
|
# DEBUG BEGIN_STMT
|
|
mask = base->IMASK2;
|
|
# DEBUG BEGIN_STMT
|
|
_6 = base->IFLAG2;
|
|
_7 = mask & _6;
|
|
_8 = msgBuffIdx & 31;
|
|
_9 = _7 >> _8;
|
|
_10 = (unsigned char) _9;
|
|
flag = _10 & 1;
|
|
goto <bb 8>; [INV]
|
|
|
|
<bb 6> :
|
|
# DEBUG BEGIN_STMT
|
|
if (msgBuffIdx <= 95)
|
|
goto <bb 7>; [INV]
|
|
else
|
|
goto <bb 8>; [INV]
|
|
|
|
<bb 7> :
|
|
# DEBUG BEGIN_STMT
|
|
mask = base->IMASK3;
|
|
# DEBUG BEGIN_STMT
|
|
_11 = base->IFLAG3;
|
|
_12 = mask & _11;
|
|
_13 = msgBuffIdx & 31;
|
|
_14 = _12 >> _13;
|
|
_15 = (unsigned char) _14;
|
|
flag = _15 & 1;
|
|
|
|
<bb 8> :
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
D.6229 = flag;
|
|
return D.6229;
|
|
|
|
}
|
|
|
|
|
|
RxFifoOcuppiedLastMsgBuff (uint32 x)
|
|
{
|
|
uint32 D.6641;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = x + 1;
|
|
_2 = _1 * 8;
|
|
_3 = _2 / 4;
|
|
D.6641 = _3 + 5;
|
|
return D.6641;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_IsListenOnlyModeEnabled (const struct FLEXCAN_Type * base)
|
|
{
|
|
boolean D.5919;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = base->CTRL1;
|
|
_2 = _1 & 8;
|
|
D.5919 = _2 != 0;
|
|
return D.5919;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_IsFDEnabled (const struct FLEXCAN_Type * base)
|
|
{
|
|
boolean D.6527;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = base->MCR;
|
|
_2 = _1 & 2048;
|
|
D.6527 = _2 != 0;
|
|
return D.6527;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_SetSelfReception (struct FLEXCAN_Type * base, boolean enable)
|
|
{
|
|
long unsigned int iftmp.3;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = base->MCR;
|
|
_2 = _1 & 4294836223;
|
|
if (enable != 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 4>; [INV]
|
|
|
|
<bb 3> :
|
|
iftmp.3 = 0;
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 4> :
|
|
iftmp.3 = 131072;
|
|
|
|
<bb 5> :
|
|
_3 = iftmp.3 | _2;
|
|
base->MCR = _3;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_EnhCbtEnable (struct FLEXCAN_Type * base, boolean enableCBT)
|
|
{
|
|
long unsigned int iftmp.6;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = base->CTRL2;
|
|
_2 = _1 & 4294959103;
|
|
if (enableCBT != 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 4>; [INV]
|
|
|
|
<bb 3> :
|
|
iftmp.6 = 8192;
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 4> :
|
|
iftmp.6 = 0;
|
|
|
|
<bb 5> :
|
|
_3 = iftmp.6 | _2;
|
|
base->CTRL2 = _3;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_EnableExtCbt (struct FLEXCAN_Type * base, boolean enableCBT)
|
|
{
|
|
long unsigned int iftmp.4;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = base->CBT;
|
|
_2 = _1 & 2147483647;
|
|
if (enableCBT != 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 4>; [INV]
|
|
|
|
<bb 3> :
|
|
iftmp.4 = 2147483648;
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 4> :
|
|
iftmp.4 = 0;
|
|
|
|
<bb 5> :
|
|
_3 = iftmp.4 | _2;
|
|
base->CBT = _3;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_IsEnhCbtEnabled (const struct FLEXCAN_Type * pBase)
|
|
{
|
|
boolean D.6477;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = pBase->CTRL2;
|
|
_2 = _1 & 8192;
|
|
D.6477 = _2 != 0;
|
|
return D.6477;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_IsExCbtEnabled (const struct FLEXCAN_Type * pBase)
|
|
{
|
|
boolean D.6467;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = pBase->CBT;
|
|
_2 = (signed int) _1;
|
|
D.6467 = _2 < 0;
|
|
return D.6467;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_GetFDTimeSegments (const struct FLEXCAN_Type * base, struct Flexcan_Ip_TimeSegmentType * timeSeg)
|
|
{
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = base->FDCBT;
|
|
_2 = _1 >> 20;
|
|
_3 = _2 & 1023;
|
|
timeSeg->preDivider = _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 = base->FDCBT;
|
|
_5 = _4 >> 10;
|
|
_6 = _5 & 31;
|
|
timeSeg->propSeg = _6;
|
|
# DEBUG BEGIN_STMT
|
|
_7 = base->FDCBT;
|
|
_8 = _7 >> 5;
|
|
_9 = _8 & 7;
|
|
timeSeg->phaseSeg1 = _9;
|
|
# DEBUG BEGIN_STMT
|
|
_10 = base->FDCBT;
|
|
_11 = _10 & 7;
|
|
timeSeg->phaseSeg2 = _11;
|
|
# DEBUG BEGIN_STMT
|
|
_12 = base->FDCBT;
|
|
_13 = _12 >> 16;
|
|
_14 = _13 & 7;
|
|
timeSeg->rJumpwidth = _14;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_GetTimeSegments (const struct FLEXCAN_Type * base, struct Flexcan_Ip_TimeSegmentType * timeSeg)
|
|
{
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = base->CTRL1;
|
|
_2 = _1 >> 24;
|
|
_3 = _2 & 255;
|
|
timeSeg->preDivider = _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 = base->CTRL1;
|
|
_5 = _4 & 7;
|
|
timeSeg->propSeg = _5;
|
|
# DEBUG BEGIN_STMT
|
|
_6 = base->CTRL1;
|
|
_7 = _6 >> 19;
|
|
_8 = _7 & 7;
|
|
timeSeg->phaseSeg1 = _8;
|
|
# DEBUG BEGIN_STMT
|
|
_9 = base->CTRL1;
|
|
_10 = _9 >> 16;
|
|
_11 = _10 & 7;
|
|
timeSeg->phaseSeg2 = _11;
|
|
# DEBUG BEGIN_STMT
|
|
_12 = base->CTRL1;
|
|
_13 = _12 >> 22;
|
|
_14 = _13 & 3;
|
|
timeSeg->rJumpwidth = _14;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_GetExtendedTimeSegments (const struct FLEXCAN_Type * base, struct Flexcan_Ip_TimeSegmentType * timeSeg)
|
|
{
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = base->CBT;
|
|
_2 = _1 >> 21;
|
|
_3 = _2 & 1023;
|
|
timeSeg->preDivider = _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 = base->CBT;
|
|
_5 = _4 >> 10;
|
|
_6 = _5 & 63;
|
|
timeSeg->propSeg = _6;
|
|
# DEBUG BEGIN_STMT
|
|
_7 = base->CBT;
|
|
_8 = _7 >> 5;
|
|
_9 = _8 & 31;
|
|
timeSeg->phaseSeg1 = _9;
|
|
# DEBUG BEGIN_STMT
|
|
_10 = base->CBT;
|
|
_11 = _10 & 31;
|
|
timeSeg->phaseSeg2 = _11;
|
|
# DEBUG BEGIN_STMT
|
|
_12 = base->CBT;
|
|
_13 = _12 >> 16;
|
|
_14 = _13 & 31;
|
|
timeSeg->rJumpwidth = _14;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_GetEnhancedDataTimeSegments (const struct FLEXCAN_Type * base, struct Flexcan_Ip_TimeSegmentType * timeSeg)
|
|
{
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = timeSeg != 0B;
|
|
DevAssert (_1);
|
|
# DEBUG BEGIN_STMT
|
|
timeSeg->propSeg = 0;
|
|
# DEBUG BEGIN_STMT
|
|
_2 = base->EDCBT;
|
|
_3 = _2 & 31;
|
|
timeSeg->phaseSeg1 = _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 = base->EDCBT;
|
|
_5 = _4 >> 12;
|
|
_6 = _5 & 15;
|
|
timeSeg->phaseSeg2 = _6;
|
|
# DEBUG BEGIN_STMT
|
|
_7 = base->EDCBT;
|
|
_8 = _7 >> 22;
|
|
_9 = _8 & 15;
|
|
timeSeg->rJumpwidth = _9;
|
|
# DEBUG BEGIN_STMT
|
|
_10 = base->EPRS;
|
|
_11 = _10 >> 16;
|
|
_12 = _11 & 1023;
|
|
timeSeg->preDivider = _12;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_SetEnhancedDataTimeSegments (struct FLEXCAN_Type * base, const struct Flexcan_Ip_TimeSegmentType * timeSeg)
|
|
{
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = timeSeg != 0B;
|
|
DevAssert (_1);
|
|
# DEBUG BEGIN_STMT
|
|
_2 = base->EDCBT;
|
|
_3 = _2 & 4231991264;
|
|
base->EDCBT = _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 = base->EDCBT;
|
|
_5 = timeSeg->phaseSeg1;
|
|
_6 = timeSeg->propSeg;
|
|
_7 = _5 + _6;
|
|
_8 = _7 & 31;
|
|
_9 = timeSeg->phaseSeg2;
|
|
_10 = _9 << 12;
|
|
_11 = _10 & 65535;
|
|
_12 = _8 | _11;
|
|
_13 = timeSeg->rJumpwidth;
|
|
_14 = _13 << 22;
|
|
_15 = _14 & 62914560;
|
|
_16 = _12 | _15;
|
|
_17 = _4 | _16;
|
|
base->EDCBT = _17;
|
|
# DEBUG BEGIN_STMT
|
|
_18 = base->EPRS;
|
|
_19 = _18 & 4227923967;
|
|
base->EPRS = _19;
|
|
# DEBUG BEGIN_STMT
|
|
_20 = base->EPRS;
|
|
_21 = timeSeg->preDivider;
|
|
_22 = _21 << 16;
|
|
_23 = _22 & 67043328;
|
|
_24 = _20 | _23;
|
|
base->EPRS = _24;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_GetEnhancedNominalTimeSegments (const struct FLEXCAN_Type * base, struct Flexcan_Ip_TimeSegmentType * timeSeg)
|
|
{
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
timeSeg->propSeg = 0;
|
|
# DEBUG BEGIN_STMT
|
|
_1 = base->EPRS;
|
|
_2 = _1 & 1023;
|
|
timeSeg->preDivider = _2;
|
|
# DEBUG BEGIN_STMT
|
|
_3 = base->ENCBT;
|
|
_4 = _3 & 255;
|
|
timeSeg->phaseSeg1 = _4;
|
|
# DEBUG BEGIN_STMT
|
|
_5 = base->ENCBT;
|
|
_6 = _5 >> 12;
|
|
_7 = _6 & 127;
|
|
timeSeg->phaseSeg2 = _7;
|
|
# DEBUG BEGIN_STMT
|
|
_8 = base->ENCBT;
|
|
_9 = _8 >> 22;
|
|
_10 = _9 & 127;
|
|
timeSeg->rJumpwidth = _10;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_SetEnhancedNominalTimeSegments (struct FLEXCAN_Type * base, const struct Flexcan_Ip_TimeSegmentType * timeSeg)
|
|
{
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = timeSeg != 0B;
|
|
DevAssert (_1);
|
|
# DEBUG BEGIN_STMT
|
|
_2 = base->ENCBT;
|
|
_3 = _2 & 3761770240;
|
|
base->ENCBT = _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 = base->ENCBT;
|
|
_5 = timeSeg->phaseSeg1;
|
|
_6 = timeSeg->propSeg;
|
|
_7 = _5 + _6;
|
|
_8 = _7 + 1;
|
|
_9 = _8 & 255;
|
|
_10 = timeSeg->phaseSeg2;
|
|
_11 = _10 << 12;
|
|
_12 = _11 & 520192;
|
|
_13 = _9 | _12;
|
|
_14 = timeSeg->rJumpwidth;
|
|
_15 = _14 << 22;
|
|
_16 = _15 & 532676608;
|
|
_17 = _13 | _16;
|
|
_18 = _4 | _17;
|
|
base->ENCBT = _18;
|
|
# DEBUG BEGIN_STMT
|
|
_19 = base->EPRS;
|
|
_20 = _19 & 4294966272;
|
|
base->EPRS = _20;
|
|
# DEBUG BEGIN_STMT
|
|
_21 = base->EPRS;
|
|
_22 = timeSeg->preDivider;
|
|
_23 = _22 & 1023;
|
|
_24 = _21 | _23;
|
|
base->EPRS = _24;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_SetExtendedTimeSegments (struct FLEXCAN_Type * base, const struct Flexcan_Ip_TimeSegmentType * timeSeg)
|
|
{
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = timeSeg != 0B;
|
|
DevAssert (_1);
|
|
# DEBUG BEGIN_STMT
|
|
_2 = base->CBT;
|
|
_3 = _2 & 2147483648;
|
|
base->CBT = _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 = base->CBT;
|
|
_5 = timeSeg->propSeg;
|
|
_6 = _5 << 10;
|
|
_7 = _6 & 65535;
|
|
_8 = timeSeg->phaseSeg2;
|
|
_9 = _8 & 31;
|
|
_10 = _7 | _9;
|
|
_11 = timeSeg->phaseSeg1;
|
|
_12 = _11 << 5;
|
|
_13 = _12 & 992;
|
|
_14 = _10 | _13;
|
|
_15 = timeSeg->preDivider;
|
|
_16 = _15 << 21;
|
|
_17 = _16 & 2145386496;
|
|
_18 = _14 | _17;
|
|
_19 = timeSeg->rJumpwidth;
|
|
_20 = _19 << 16;
|
|
_21 = _20 & 2031616;
|
|
_22 = _18 | _21;
|
|
_23 = _4 | _22;
|
|
base->CBT = _23;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_SetTimeSegments (struct FLEXCAN_Type * base, const struct Flexcan_Ip_TimeSegmentType * timeSeg)
|
|
{
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = timeSeg != 0B;
|
|
DevAssert (_1);
|
|
# DEBUG BEGIN_STMT
|
|
_2 = base->CTRL1;
|
|
_3 = _2 & 65528;
|
|
base->CTRL1 = _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 = base->CTRL1;
|
|
_5 = timeSeg->propSeg;
|
|
_6 = _5 & 7;
|
|
_7 = timeSeg->phaseSeg2;
|
|
_8 = _7 << 16;
|
|
_9 = _8 & 458752;
|
|
_10 = _6 | _9;
|
|
_11 = timeSeg->phaseSeg1;
|
|
_12 = _11 << 19;
|
|
_13 = _12 & 3670016;
|
|
_14 = _10 | _13;
|
|
_15 = timeSeg->preDivider;
|
|
_16 = _15 << 24;
|
|
_17 = _14 | _16;
|
|
_18 = timeSeg->rJumpwidth;
|
|
_19 = _18 << 22;
|
|
_20 = _19 & 12582912;
|
|
_21 = _17 | _20;
|
|
_22 = _4 | _21;
|
|
base->CTRL1 = _22;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_SetFDTimeSegments (struct FLEXCAN_Type * base, const struct Flexcan_Ip_TimeSegmentType * timeSeg)
|
|
{
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = timeSeg != 0B;
|
|
DevAssert (_1);
|
|
# DEBUG BEGIN_STMT
|
|
_2 = base->FDCBT;
|
|
_3 = _2 & 3221783320;
|
|
base->FDCBT = _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 = base->FDCBT;
|
|
_5 = timeSeg->propSeg;
|
|
_6 = _5 << 10;
|
|
_7 = _6 & 31744;
|
|
_8 = timeSeg->phaseSeg2;
|
|
_9 = _8 & 7;
|
|
_10 = _7 | _9;
|
|
_11 = timeSeg->phaseSeg1;
|
|
_12 = _11 << 5;
|
|
_13 = _12 & 255;
|
|
_14 = _10 | _13;
|
|
_15 = timeSeg->preDivider;
|
|
_16 = _15 << 20;
|
|
_17 = _16 & 1072693248;
|
|
_18 = _14 | _17;
|
|
_19 = timeSeg->rJumpwidth;
|
|
_20 = _19 << 16;
|
|
_21 = _20 & 458752;
|
|
_22 = _18 | _21;
|
|
_23 = _4 | _22;
|
|
base->FDCBT = _23;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_GetBuffStatusImask (const struct FLEXCAN_Type * base, uint32 msgBuffIdx)
|
|
{
|
|
uint32 u32Imask;
|
|
uint8 D.6266;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
u32Imask = 0;
|
|
# DEBUG BEGIN_STMT
|
|
if (msgBuffIdx <= 31)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 4>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = base->IMASK1;
|
|
_2 = msgBuffIdx & 31;
|
|
_3 = 1 << _2;
|
|
_4 = _1 & _3;
|
|
_5 = msgBuffIdx & 31;
|
|
u32Imask = _4 >> _5;
|
|
goto <bb 8>; [INV]
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
if (msgBuffIdx <= 63)
|
|
goto <bb 5>; [INV]
|
|
else
|
|
goto <bb 6>; [INV]
|
|
|
|
<bb 5> :
|
|
# DEBUG BEGIN_STMT
|
|
_6 = base->IMASK2;
|
|
_7 = msgBuffIdx & 31;
|
|
_8 = 1 << _7;
|
|
_9 = _6 & _8;
|
|
_10 = msgBuffIdx & 31;
|
|
u32Imask = _9 >> _10;
|
|
goto <bb 8>; [INV]
|
|
|
|
<bb 6> :
|
|
# DEBUG BEGIN_STMT
|
|
if (msgBuffIdx <= 95)
|
|
goto <bb 7>; [INV]
|
|
else
|
|
goto <bb 8>; [INV]
|
|
|
|
<bb 7> :
|
|
# DEBUG BEGIN_STMT
|
|
_11 = base->IMASK3;
|
|
_12 = msgBuffIdx & 31;
|
|
_13 = 1 << _12;
|
|
_14 = _11 & _13;
|
|
_15 = msgBuffIdx & 31;
|
|
u32Imask = _14 >> _15;
|
|
|
|
<bb 8> :
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
D.6266 = (uint8) u32Imask;
|
|
return D.6266;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_GetBuffStatusFlag (const struct FLEXCAN_Type * base, uint32 msgBuffIdx)
|
|
{
|
|
uint32 flag;
|
|
uint8 D.5998;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
flag = 0;
|
|
# DEBUG BEGIN_STMT
|
|
if (msgBuffIdx <= 31)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 4>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = base->IFLAG1;
|
|
_2 = msgBuffIdx & 31;
|
|
_3 = 1 << _2;
|
|
_4 = _1 & _3;
|
|
_5 = msgBuffIdx & 31;
|
|
flag = _4 >> _5;
|
|
goto <bb 8>; [INV]
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
if (msgBuffIdx <= 63)
|
|
goto <bb 5>; [INV]
|
|
else
|
|
goto <bb 6>; [INV]
|
|
|
|
<bb 5> :
|
|
# DEBUG BEGIN_STMT
|
|
_6 = base->IFLAG2;
|
|
_7 = msgBuffIdx & 31;
|
|
_8 = 1 << _7;
|
|
_9 = _6 & _8;
|
|
_10 = msgBuffIdx & 31;
|
|
flag = _9 >> _10;
|
|
goto <bb 8>; [INV]
|
|
|
|
<bb 6> :
|
|
# DEBUG BEGIN_STMT
|
|
if (msgBuffIdx <= 95)
|
|
goto <bb 7>; [INV]
|
|
else
|
|
goto <bb 8>; [INV]
|
|
|
|
<bb 7> :
|
|
# DEBUG BEGIN_STMT
|
|
_11 = base->IFLAG3;
|
|
_12 = msgBuffIdx & 31;
|
|
_13 = 1 << _12;
|
|
_14 = _11 & _13;
|
|
_15 = msgBuffIdx & 31;
|
|
flag = _14 >> _15;
|
|
|
|
<bb 8> :
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
D.5998 = (uint8) flag;
|
|
return D.5998;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_ClearMsgBuffIntStatusFlag (struct FLEXCAN_Type * base, uint32 msgBuffIdx)
|
|
{
|
|
uint32 flag;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = msgBuffIdx & 31;
|
|
flag = 1 << _1;
|
|
# DEBUG BEGIN_STMT
|
|
if (msgBuffIdx <= 31)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 4>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
base->IFLAG1 = flag;
|
|
goto <bb 8>; [INV]
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
if (msgBuffIdx <= 63)
|
|
goto <bb 5>; [INV]
|
|
else
|
|
goto <bb 6>; [INV]
|
|
|
|
<bb 5> :
|
|
# DEBUG BEGIN_STMT
|
|
base->IFLAG2 = flag;
|
|
goto <bb 8>; [INV]
|
|
|
|
<bb 6> :
|
|
# DEBUG BEGIN_STMT
|
|
if (msgBuffIdx <= 95)
|
|
goto <bb 7>; [INV]
|
|
else
|
|
goto <bb 8>; [INV]
|
|
|
|
<bb 7> :
|
|
# DEBUG BEGIN_STMT
|
|
base->IFLAG3 = flag;
|
|
|
|
<bb 8> :
|
|
# DEBUG BEGIN_STMT
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_UnlockRxMsgBuff (const struct FLEXCAN_Type * base)
|
|
{
|
|
long unsigned int vol.5;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
vol.5 = base->TIMER;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_SetListenOnlyMode (struct FLEXCAN_Type * base, boolean enableListenOnly)
|
|
{
|
|
long unsigned int iftmp.7;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = base->CTRL1;
|
|
_2 = _1 & 4294967287;
|
|
if (enableListenOnly != 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 4>; [INV]
|
|
|
|
<bb 3> :
|
|
iftmp.7 = 8;
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 4> :
|
|
iftmp.7 = 0;
|
|
|
|
<bb 5> :
|
|
_3 = iftmp.7 | _2;
|
|
base->CTRL1 = _3;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_SetFDEnabled (struct FLEXCAN_Type * base, boolean enableFD, boolean enableBRS)
|
|
{
|
|
long unsigned int iftmp.2;
|
|
long unsigned int iftmp.1;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = base->MCR;
|
|
_2 = _1 & 4294965247;
|
|
if (enableFD != 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 4>; [INV]
|
|
|
|
<bb 3> :
|
|
iftmp.1 = 2048;
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 4> :
|
|
iftmp.1 = 0;
|
|
|
|
<bb 5> :
|
|
_3 = iftmp.1 | _2;
|
|
base->MCR = _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 = base->FDCTRL;
|
|
_5 = _4 & 2147483647;
|
|
if (enableBRS != 0)
|
|
goto <bb 6>; [INV]
|
|
else
|
|
goto <bb 7>; [INV]
|
|
|
|
<bb 6> :
|
|
iftmp.2 = 2147483648;
|
|
goto <bb 8>; [INV]
|
|
|
|
<bb 7> :
|
|
iftmp.2 = 0;
|
|
|
|
<bb 8> :
|
|
_6 = iftmp.2 | _5;
|
|
base->FDCTRL = _6;
|
|
# DEBUG BEGIN_STMT
|
|
_7 = base->FDCTRL;
|
|
_8 = _7 & 4294926591;
|
|
base->FDCTRL = _8;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_DisableMemErrorDetection (struct FLEXCAN_Type * base)
|
|
{
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = base->CTRL2;
|
|
_2 = _1 | 536870912;
|
|
base->CTRL2 = _2;
|
|
# DEBUG BEGIN_STMT
|
|
base->MECR = 0;
|
|
# DEBUG BEGIN_STMT
|
|
base->MECR = 0;
|
|
# DEBUG BEGIN_STMT
|
|
_3 = base->MECR;
|
|
_4 = _3 | 256;
|
|
base->MECR = _4;
|
|
# DEBUG BEGIN_STMT
|
|
_5 = base->CTRL2;
|
|
base->CTRL2 = _5;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_IsEnabled (const struct FLEXCAN_Type * pBase)
|
|
{
|
|
boolean D.5885;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = pBase->MCR;
|
|
_2 = (signed int) _1;
|
|
D.5885 = _2 >= 0;
|
|
return D.5885;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_SetEnhancedTDCOffset (struct FLEXCAN_Type * base, boolean enable, uint8 offset)
|
|
{
|
|
uint32 tmp;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
tmp = base->ETDC;
|
|
# DEBUG BEGIN_STMT
|
|
tmp = tmp & 2139160575;
|
|
# DEBUG BEGIN_STMT
|
|
if (enable != 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 4>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
tmp = tmp | 2147483648;
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (long unsigned int) offset;
|
|
_2 = _1 << 16;
|
|
_3 = _2 & 8323072;
|
|
tmp = tmp | _3;
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
base->ETDC = tmp;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_SetTDCOffset (struct FLEXCAN_Type * base, boolean enable, uint8 offset)
|
|
{
|
|
uint32 tmp;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
tmp = base->FDCTRL;
|
|
# DEBUG BEGIN_STMT
|
|
tmp = tmp & 4294926591;
|
|
# DEBUG BEGIN_STMT
|
|
if (enable != 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 4>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
tmp = tmp | 32768;
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (long unsigned int) offset;
|
|
_2 = _1 << 8;
|
|
_3 = _2 & 7936;
|
|
tmp = tmp | _3;
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
base->FDCTRL = tmp;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
FlexCAN_SetRxFifoGlobalMask (struct FLEXCAN_Type * base, uint32 Mask)
|
|
{
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
base->RXFGMASK = Mask;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
DevAssert (volatile boolean x)
|
|
{
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
x.0_1 = x;
|
|
if (x.0_1 != 0)
|
|
goto <bb 4>; [INV]
|
|
else
|
|
goto <bb 3>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
goto <bb 3>; [INV]
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
return;
|
|
|
|
}
|
|
|
|
|