mirror of
https://github.com/Dev-KATECH/ADM.git
synced 2026-05-17 09:53:59 +09:00
582 lines
12 KiB
Plaintext
582 lines
12 KiB
Plaintext
Flexio_Mcl_Ip_ClearPinStatus (struct FLEXIO_Type * baseAddr, uint8 pin)
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{
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long unsigned int _1;
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int _2;
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unsigned int _3;
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long unsigned int _4;
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unsigned int _9;
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<bb 2> [local count: 1073741824]:
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# DEBUG BEGIN_STMT
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_1 ={v} baseAddr_6(D)->PINSTAT;
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_2 = (int) pin_7(D);
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_3 = 1 << _2;
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_9 = _3 & 255;
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_4 = _1 | _9;
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baseAddr_6(D)->PINSTAT ={v} _4;
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return;
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}
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Flexio_Mcl_Ip_SetTimerDMARequest (struct FLEXIO_Type * baseAddr, uint8 requestMask, boolean enable)
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{
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uint32 tmp;
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long unsigned int _1;
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long unsigned int _2;
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long unsigned int _3;
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<bb 2> [local count: 1073741824]:
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# DEBUG BEGIN_STMT
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# DEBUG BEGIN_STMT
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SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_46 ();
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# DEBUG BEGIN_STMT
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tmp_8 ={v} baseAddr_7(D)->TIMERSDEN;
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# DEBUG tmp => tmp_8
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# DEBUG BEGIN_STMT
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if (enable_9(D) != 0)
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goto <bb 3>; [50.00%]
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else
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goto <bb 4>; [50.00%]
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<bb 3> [local count: 536870913]:
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# DEBUG BEGIN_STMT
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_1 = (long unsigned int) requestMask_10(D);
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tmp_12 = _1 | tmp_8;
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# DEBUG tmp => tmp_12
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goto <bb 5>; [100.00%]
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<bb 4> [local count: 536870913]:
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# DEBUG BEGIN_STMT
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_2 = (long unsigned int) requestMask_10(D);
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_3 = ~_2;
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tmp_11 = _3 & tmp_8;
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# DEBUG tmp => tmp_11
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<bb 5> [local count: 1073741824]:
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# tmp_4 = PHI <tmp_12(3), tmp_11(4)>
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# DEBUG tmp => tmp_4
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# DEBUG BEGIN_STMT
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baseAddr_7(D)->TIMERSDEN ={v} tmp_4;
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# DEBUG BEGIN_STMT
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SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_46 ();
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return;
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}
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Flexio_Mcl_Ip_Init (struct FLEXIO_Type * baseAddr)
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{
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<bb 2> [local count: 1073741824]:
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# DEBUG BEGIN_STMT
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Flexio_Mcl_Ip_SetSoftwareReset (baseAddr_2(D), 1);
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# DEBUG BEGIN_STMT
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baseAddr_2(D)->CTRL ={v} 0;
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return;
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}
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Flexio_Mcl_Ip_SetTimerInterrupt (struct FLEXIO_Type * baseAddr, uint8 interruptMask, boolean enable)
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{
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uint32 tmp;
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long unsigned int _1;
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long unsigned int _2;
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long unsigned int _3;
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<bb 2> [local count: 1073741824]:
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# DEBUG BEGIN_STMT
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# DEBUG BEGIN_STMT
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SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_45 ();
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# DEBUG BEGIN_STMT
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tmp_8 ={v} baseAddr_7(D)->TIMIEN;
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# DEBUG tmp => tmp_8
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# DEBUG BEGIN_STMT
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if (enable_9(D) != 0)
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goto <bb 3>; [50.00%]
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else
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goto <bb 4>; [50.00%]
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<bb 3> [local count: 536870913]:
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# DEBUG BEGIN_STMT
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_1 = (long unsigned int) interruptMask_10(D);
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tmp_12 = _1 | tmp_8;
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# DEBUG tmp => tmp_12
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goto <bb 5>; [100.00%]
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<bb 4> [local count: 536870913]:
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# DEBUG BEGIN_STMT
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_2 = (long unsigned int) interruptMask_10(D);
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_3 = ~_2;
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tmp_11 = _3 & tmp_8;
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# DEBUG tmp => tmp_11
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<bb 5> [local count: 1073741824]:
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# tmp_4 = PHI <tmp_12(3), tmp_11(4)>
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# DEBUG tmp => tmp_4
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# DEBUG BEGIN_STMT
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baseAddr_7(D)->TIMIEN ={v} tmp_4;
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# DEBUG BEGIN_STMT
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SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_45 ();
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return;
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}
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Flexio_Mcl_Ip_GetAllTimerInterrupt (const struct FLEXIO_Type * baseAddr)
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{
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uint32 _3;
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<bb 2> [local count: 1073741824]:
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# DEBUG BEGIN_STMT
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_3 ={v} baseAddr_2(D)->TIMIEN;
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return _3;
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}
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Flexio_Mcl_Ip_SetShifterDMARequest (struct FLEXIO_Type * baseAddr, uint8 requestMask, boolean enable)
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{
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uint32 tmp;
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long unsigned int _1;
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long unsigned int _2;
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long unsigned int _3;
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<bb 2> [local count: 1073741824]:
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# DEBUG BEGIN_STMT
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# DEBUG BEGIN_STMT
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SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_44 ();
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# DEBUG BEGIN_STMT
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tmp_8 ={v} baseAddr_7(D)->SHIFTSDEN;
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# DEBUG tmp => tmp_8
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# DEBUG BEGIN_STMT
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if (enable_9(D) != 0)
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goto <bb 3>; [50.00%]
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else
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goto <bb 4>; [50.00%]
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<bb 3> [local count: 536870913]:
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# DEBUG BEGIN_STMT
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_1 = (long unsigned int) requestMask_10(D);
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tmp_12 = _1 | tmp_8;
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# DEBUG tmp => tmp_12
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goto <bb 5>; [100.00%]
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<bb 4> [local count: 536870913]:
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# DEBUG BEGIN_STMT
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_2 = (long unsigned int) requestMask_10(D);
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_3 = ~_2;
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tmp_11 = _3 & tmp_8;
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# DEBUG tmp => tmp_11
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<bb 5> [local count: 1073741824]:
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# tmp_4 = PHI <tmp_12(3), tmp_11(4)>
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# DEBUG tmp => tmp_4
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# DEBUG BEGIN_STMT
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baseAddr_7(D)->SHIFTSDEN ={v} tmp_4;
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# DEBUG BEGIN_STMT
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SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_44 ();
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return;
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}
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Flexio_Mcl_Ip_GetAllPinsInterrupt (const struct FLEXIO_Type * baseAddr)
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{
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uint32 _3;
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<bb 2> [local count: 1073741824]:
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# DEBUG BEGIN_STMT
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_3 ={v} baseAddr_2(D)->PINIEN;
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return _3;
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}
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Flexio_Mcl_Ip_GetAllPinsStatus (const struct FLEXIO_Type * baseAddr)
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{
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uint32 _3;
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<bb 2> [local count: 1073741824]:
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# DEBUG BEGIN_STMT
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_3 ={v} baseAddr_2(D)->PINSTAT;
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return _3;
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}
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Flexio_Mcl_Ip_SetShifterInterrupt (struct FLEXIO_Type * baseAddr, uint8 interruptMask, boolean enable)
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{
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uint32 tmp;
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long unsigned int _1;
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long unsigned int _2;
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long unsigned int _3;
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<bb 2> [local count: 1073741824]:
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# DEBUG BEGIN_STMT
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# DEBUG BEGIN_STMT
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SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_43 ();
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# DEBUG BEGIN_STMT
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tmp_8 ={v} baseAddr_7(D)->SHIFTSIEN;
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# DEBUG tmp => tmp_8
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# DEBUG BEGIN_STMT
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if (enable_9(D) != 0)
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goto <bb 3>; [50.00%]
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else
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goto <bb 4>; [50.00%]
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<bb 3> [local count: 536870913]:
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# DEBUG BEGIN_STMT
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_1 = (long unsigned int) interruptMask_10(D);
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tmp_12 = _1 | tmp_8;
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# DEBUG tmp => tmp_12
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goto <bb 5>; [100.00%]
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<bb 4> [local count: 536870913]:
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# DEBUG BEGIN_STMT
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_2 = (long unsigned int) interruptMask_10(D);
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_3 = ~_2;
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tmp_11 = _3 & tmp_8;
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# DEBUG tmp => tmp_11
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<bb 5> [local count: 1073741824]:
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# tmp_4 = PHI <tmp_12(3), tmp_11(4)>
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# DEBUG tmp => tmp_4
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# DEBUG BEGIN_STMT
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baseAddr_7(D)->SHIFTSIEN ={v} tmp_4;
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# DEBUG BEGIN_STMT
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SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_43 ();
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return;
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}
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Flexio_Mcl_Ip_SetShifterErrorInterrupt (struct FLEXIO_Type * baseAddr, uint8 interruptMask, boolean enable)
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{
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uint32 tmp;
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long unsigned int _1;
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long unsigned int _2;
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long unsigned int _3;
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<bb 2> [local count: 1073741824]:
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# DEBUG BEGIN_STMT
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# DEBUG BEGIN_STMT
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SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_42 ();
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# DEBUG BEGIN_STMT
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tmp_8 ={v} baseAddr_7(D)->SHIFTEIEN;
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# DEBUG tmp => tmp_8
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# DEBUG BEGIN_STMT
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if (enable_9(D) != 0)
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goto <bb 3>; [50.00%]
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else
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goto <bb 4>; [50.00%]
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<bb 3> [local count: 536870913]:
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# DEBUG BEGIN_STMT
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_1 = (long unsigned int) interruptMask_10(D);
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tmp_12 = _1 | tmp_8;
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# DEBUG tmp => tmp_12
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goto <bb 5>; [100.00%]
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<bb 4> [local count: 536870913]:
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# DEBUG BEGIN_STMT
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_2 = (long unsigned int) interruptMask_10(D);
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_3 = ~_2;
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tmp_11 = _3 & tmp_8;
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# DEBUG tmp => tmp_11
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<bb 5> [local count: 1073741824]:
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# tmp_4 = PHI <tmp_12(3), tmp_11(4)>
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# DEBUG tmp => tmp_4
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# DEBUG BEGIN_STMT
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baseAddr_7(D)->SHIFTEIEN ={v} tmp_4;
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# DEBUG BEGIN_STMT
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SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_42 ();
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return;
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}
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Flexio_Mcl_Ip_GetAllShifterErrorInterrupt (const struct FLEXIO_Type * baseAddr)
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{
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uint32 _3;
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<bb 2> [local count: 1073741824]:
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# DEBUG BEGIN_STMT
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_3 ={v} baseAddr_2(D)->SHIFTEIEN;
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return _3;
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}
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Flexio_Mcl_Ip_GetAllShifterInterrupt (const struct FLEXIO_Type * baseAddr)
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{
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uint32 _3;
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<bb 2> [local count: 1073741824]:
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# DEBUG BEGIN_STMT
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_3 ={v} baseAddr_2(D)->SHIFTSIEN;
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return _3;
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}
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Flexio_Mcl_Ip_ClearTimerStatus (struct FLEXIO_Type * baseAddr, uint8 timer)
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{
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int _1;
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long unsigned int _2;
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<bb 2> [local count: 1073741824]:
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# DEBUG BEGIN_STMT
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_1 = (int) timer_3(D);
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_2 = 1 << _1;
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baseAddr_5(D)->TIMSTAT ={v} _2;
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return;
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}
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Flexio_Mcl_Ip_GetAllTimerStatus (const struct FLEXIO_Type * baseAddr)
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{
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uint32 _3;
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<bb 2> [local count: 1073741824]:
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# DEBUG BEGIN_STMT
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_3 ={v} baseAddr_2(D)->TIMSTAT;
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return _3;
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}
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Flexio_Mcl_Ip_GetTimerInterruptEnable (const struct FLEXIO_Type * baseAddr, uint8 timer)
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{
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long unsigned int _1;
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int _2;
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long unsigned int _3;
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boolean _7;
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<bb 2> [local count: 1073741824]:
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# DEBUG BEGIN_STMT
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_1 ={v} baseAddr_5(D)->TIMIEN;
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_2 = (int) timer_6(D);
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_3 = _1 >> _2;
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_7 = (boolean) _3;
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return _7;
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}
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Flexio_Mcl_Ip_GetTimerStatus (const struct FLEXIO_Type * baseAddr, uint8 timer)
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{
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long unsigned int _1;
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int _2;
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long unsigned int _3;
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boolean _7;
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<bb 2> [local count: 1073741824]:
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# DEBUG BEGIN_STMT
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_1 ={v} baseAddr_5(D)->TIMSTAT;
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_2 = (int) timer_6(D);
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_3 = _1 >> _2;
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_7 = (boolean) _3;
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return _7;
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}
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Flexio_Mcl_Ip_ClearShifterErrorStatus (struct FLEXIO_Type * baseAddr, uint8 shifter)
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{
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int _1;
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long unsigned int _2;
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<bb 2> [local count: 1073741824]:
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# DEBUG BEGIN_STMT
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_1 = (int) shifter_3(D);
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_2 = 1 << _1;
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baseAddr_5(D)->SHIFTERR ={v} _2;
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return;
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}
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Flexio_Mcl_Ip_GetAllShifterErrorStatus (const struct FLEXIO_Type * baseAddr)
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{
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uint32 _3;
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<bb 2> [local count: 1073741824]:
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# DEBUG BEGIN_STMT
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_3 ={v} baseAddr_2(D)->SHIFTERR;
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return _3;
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}
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Flexio_Mcl_Ip_GetShifterErrorStatus (const struct FLEXIO_Type * baseAddr, uint8 shifter)
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{
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long unsigned int _1;
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int _2;
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long unsigned int _3;
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boolean _7;
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<bb 2> [local count: 1073741824]:
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# DEBUG BEGIN_STMT
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_1 ={v} baseAddr_5(D)->SHIFTERR;
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_2 = (int) shifter_6(D);
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_3 = _1 >> _2;
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_7 = (boolean) _3;
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return _7;
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}
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Flexio_Mcl_Ip_ClearShifterStatus (struct FLEXIO_Type * baseAddr, uint8 shifter)
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{
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int _1;
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long unsigned int _2;
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<bb 2> [local count: 1073741824]:
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# DEBUG BEGIN_STMT
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_1 = (int) shifter_3(D);
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_2 = 1 << _1;
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baseAddr_5(D)->SHIFTSTAT ={v} _2;
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return;
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}
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Flexio_Mcl_Ip_GetAllShifterStatus (const struct FLEXIO_Type * baseAddr)
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{
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uint32 _3;
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<bb 2> [local count: 1073741824]:
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# DEBUG BEGIN_STMT
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_3 ={v} baseAddr_2(D)->SHIFTSTAT;
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return _3;
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}
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Flexio_Mcl_Ip_GetShifterStatus (const struct FLEXIO_Type * baseAddr, uint8 shifter)
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{
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long unsigned int _1;
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int _2;
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long unsigned int _3;
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boolean _7;
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<bb 2> [local count: 1073741824]:
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# DEBUG BEGIN_STMT
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_1 ={v} baseAddr_5(D)->SHIFTSTAT;
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_2 = (int) shifter_6(D);
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_3 = _1 >> _2;
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_7 = (boolean) _3;
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return _7;
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}
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Flexio_Mcl_Ip_SetEnable (struct FLEXIO_Type * baseAddr, boolean enable)
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{
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uint32 regValue;
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long unsigned int iftmp.2_1;
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<bb 2> [local count: 1073741824]:
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# DEBUG BEGIN_STMT
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SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_41 ();
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# DEBUG BEGIN_STMT
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regValue_5 ={v} baseAddr_4(D)->CTRL;
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# DEBUG regValue => regValue_5
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# DEBUG BEGIN_STMT
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regValue_6 = regValue_5 & 4294967294;
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# DEBUG regValue => regValue_6
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# DEBUG BEGIN_STMT
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if (enable_7(D) != 0)
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goto <bb 4>; [50.00%]
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else
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goto <bb 3>; [50.00%]
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<bb 3> [local count: 536870913]:
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<bb 4> [local count: 1073741824]:
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# iftmp.2_1 = PHI <1(2), 0(3)>
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regValue_8 = iftmp.2_1 | regValue_6;
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# DEBUG regValue => regValue_8
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# DEBUG BEGIN_STMT
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baseAddr_4(D)->CTRL ={v} regValue_8;
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# DEBUG BEGIN_STMT
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SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_41 ();
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return;
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}
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Flexio_Mcl_Ip_SetDebugEnable (struct FLEXIO_Type * baseAddr, boolean enable)
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{
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uint32 regValue;
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long unsigned int iftmp.1_1;
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<bb 2> [local count: 1073741824]:
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# DEBUG BEGIN_STMT
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SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_40 ();
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# DEBUG BEGIN_STMT
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regValue_5 ={v} baseAddr_4(D)->CTRL;
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# DEBUG regValue => regValue_5
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# DEBUG BEGIN_STMT
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regValue_6 = regValue_5 & 3221225471;
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# DEBUG regValue => regValue_6
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# DEBUG BEGIN_STMT
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if (enable_7(D) != 0)
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goto <bb 4>; [50.00%]
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else
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goto <bb 3>; [50.00%]
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|
|
<bb 3> [local count: 536870913]:
|
|
|
|
<bb 4> [local count: 1073741824]:
|
|
# iftmp.1_1 = PHI <1073741824(2), 0(3)>
|
|
regValue_8 = iftmp.1_1 | regValue_6;
|
|
# DEBUG regValue => regValue_8
|
|
# DEBUG BEGIN_STMT
|
|
baseAddr_4(D)->CTRL ={v} regValue_8;
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_40 ();
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Flexio_Mcl_Ip_SetSoftwareReset (struct FLEXIO_Type * baseAddr, boolean enable)
|
|
{
|
|
uint32 regValue;
|
|
long unsigned int iftmp.0_1;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_39 ();
|
|
# DEBUG BEGIN_STMT
|
|
regValue_5 ={v} baseAddr_4(D)->CTRL;
|
|
# DEBUG regValue => regValue_5
|
|
# DEBUG BEGIN_STMT
|
|
regValue_6 = regValue_5 & 4294967293;
|
|
# DEBUG regValue => regValue_6
|
|
# DEBUG BEGIN_STMT
|
|
if (enable_7(D) != 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 3>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
|
|
<bb 4> [local count: 1073741824]:
|
|
# iftmp.0_1 = PHI <2(2), 0(3)>
|
|
regValue_8 = iftmp.0_1 | regValue_6;
|
|
# DEBUG regValue => regValue_8
|
|
# DEBUG BEGIN_STMT
|
|
baseAddr_4(D)->CTRL ={v} regValue_8;
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_39 ();
|
|
return;
|
|
|
|
}
|
|
|
|
|