mirror of
https://github.com/Dev-KATECH/ADM.git
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8827 lines
303 KiB
Plaintext
8827 lines
303 KiB
Plaintext
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Marking local functions:
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Marking externally visible functions: SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_73 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_73 SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_72 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_72 SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_71 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_71 SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_70 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_70 SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_69 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_69 SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_68 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_68 SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_67 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_67 SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_66 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_66 SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_65 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_65 SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_64 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_64 SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_63 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_63 SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_62 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_62 SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_61 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_61 SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_60 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_60 SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_59 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_59 SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_58 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_58 SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_57 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_57 SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_56 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_56 SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_55 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_55 SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_54 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_54 SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_50 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_50 SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_49 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_49 SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_48 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_48 SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_47 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_47 SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_46 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_46 SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_45 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_45 SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_44 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_44 SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_43 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_43 SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_42 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_42 SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_41 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_41 SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_40 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_40 SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_39 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_39 SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_38 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_38 SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_37 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_37 SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_36 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_36 SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_35 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_35 SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_34 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_34 SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_33 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_33 SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_32 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_32 SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_31 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_31 SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_30 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_30 SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_29 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_29 SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_28 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_28 SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_27 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_27 SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_26 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_26 SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_25 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_25 SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_24 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_24 SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_23 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_23 SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_22 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_22 SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_21 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_21 SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_20 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_20 SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_19 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_19 SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_18 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_18 SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_17 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_17 SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_16 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_16 SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_15 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_15 SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_14 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_14 SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_13 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_13 SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_12 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_12 SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_11 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_11 SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_10 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_10 SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_05 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_05 SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_04 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_04 SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_03 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_03 SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_02 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_02 SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_01 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_01 SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_00 SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_00 Adc_schm_read_msr
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Marking externally visible variables:
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Clearing variable flags:
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Reclaiming functions:
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Reclaiming variables:
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Clearing address taken flags:
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Symbol table:
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Sys_GetCoreID/269 (Sys_GetCoreID) @06b36000
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_73/268 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_73/267 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_72/266 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_72/265 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_71/264 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_71/263 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_70/262 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_70/261 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_69/260 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_69/259 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_68/258 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_68/257 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_67/256 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_67/255 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_66/254 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_66/253 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_65/252 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_65/251 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_64/250 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_64/249 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_63/248 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_63/247 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_62/246 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_62/245 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_61/244 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_61/243 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_60/242 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_60/241 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_59/240 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_59/239 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_58/238 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_58/237 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_57/236 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_57/235 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_56/234 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_56/233 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_55/232 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_55/231 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_54/230 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_54/229 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_50/228 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_50/227 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_49/226 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_49/225 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_48/224 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_48/223 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_47/222 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_47/221 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_46/220 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_46/219 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_45/218 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_45/217 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_44/216 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_44/215 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_43/214 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_43/213 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_42/212 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_42/211 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_41/210 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_41/209 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_40/208 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_40/207 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_39/206 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_39/205 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_38/204 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_38/203 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_37/202 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_37/201 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_36/200 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_36/199 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_35/198 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_35/197 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_34/196 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_34/195 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_33/194 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_33/193 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_32/192 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_32/191 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_31/190 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_31/189 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_30/188 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_30/187 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_29/186 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_29/185 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_28/184 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_28/183 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_27/182 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_27/181 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_26/180 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_26/179 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_25/178 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_25/177 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_24/176 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_24/175 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_23/174 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_23/173 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_22/172 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_22/171 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_21/170 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_21/169 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_20/168 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_20/167 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_19/166 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_19/165 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_18/164 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_18/163 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_17/162 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_17/161 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_16/160 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_16/159 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_15/158 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_15/157 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_14/156 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_14/155 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_13/154 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_13/153 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_12/152 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_12/151 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_11/150 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_11/149 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_10/148 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_10/147 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_05/146 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_05/145 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_04/144 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_04/143 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_03/142 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_03/141 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_02/140 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_02/139 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_01/138 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_01/137 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_00/136 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_00/135 (1073741824 (estimated locally),1.00 per call)
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Calls:
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SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_73/268 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_73) @06b2e0e0
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Type: function definition analyzed
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Visibility: externally_visible public
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References: reentry_guard_ADC_EXCLUSIVE_AREA_73/133 (read)reentry_guard_ADC_EXCLUSIVE_AREA_73/133 (write)msr_ADC_EXCLUSIVE_AREA_73/132 (read)reentry_guard_ADC_EXCLUSIVE_AREA_73/133 (read)
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Referring:
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Availability: available
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Function flags: count:1073741824 (estimated locally) body optimize_size
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Called by:
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Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
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SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_73/267 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_73) @06b2ed20
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Type: function definition analyzed
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Visibility: externally_visible public
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References: reentry_guard_ADC_EXCLUSIVE_AREA_73/133 (read)msr_ADC_EXCLUSIVE_AREA_73/132 (write)msr_ADC_EXCLUSIVE_AREA_73/132 (read)reentry_guard_ADC_EXCLUSIVE_AREA_73/133 (read)reentry_guard_ADC_EXCLUSIVE_AREA_73/133 (write)
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Referring:
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Availability: available
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Function flags: count:1073741824 (estimated locally) body optimize_size
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Called by:
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Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
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SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_72/266 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_72) @06b2ea80
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_72/131 (read)reentry_guard_ADC_EXCLUSIVE_AREA_72/131 (write)msr_ADC_EXCLUSIVE_AREA_72/130 (read)reentry_guard_ADC_EXCLUSIVE_AREA_72/131 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_72/265 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_72) @06b2e7e0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_72/131 (read)msr_ADC_EXCLUSIVE_AREA_72/130 (write)msr_ADC_EXCLUSIVE_AREA_72/130 (read)reentry_guard_ADC_EXCLUSIVE_AREA_72/131 (read)reentry_guard_ADC_EXCLUSIVE_AREA_72/131 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_71/264 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_71) @06b2e540
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_71/129 (read)reentry_guard_ADC_EXCLUSIVE_AREA_71/129 (write)msr_ADC_EXCLUSIVE_AREA_71/128 (read)reentry_guard_ADC_EXCLUSIVE_AREA_71/129 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_71/263 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_71) @06b2e2a0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_71/129 (read)msr_ADC_EXCLUSIVE_AREA_71/128 (write)msr_ADC_EXCLUSIVE_AREA_71/128 (read)reentry_guard_ADC_EXCLUSIVE_AREA_71/129 (read)reentry_guard_ADC_EXCLUSIVE_AREA_71/129 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_70/262 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_70) @06b2e000
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_70/127 (read)reentry_guard_ADC_EXCLUSIVE_AREA_70/127 (write)msr_ADC_EXCLUSIVE_AREA_70/126 (read)reentry_guard_ADC_EXCLUSIVE_AREA_70/127 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_70/261 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_70) @06b27b60
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_70/127 (read)msr_ADC_EXCLUSIVE_AREA_70/126 (write)msr_ADC_EXCLUSIVE_AREA_70/126 (read)reentry_guard_ADC_EXCLUSIVE_AREA_70/127 (read)reentry_guard_ADC_EXCLUSIVE_AREA_70/127 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_69/260 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_69) @06b27620
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_69/125 (read)reentry_guard_ADC_EXCLUSIVE_AREA_69/125 (write)msr_ADC_EXCLUSIVE_AREA_69/124 (read)reentry_guard_ADC_EXCLUSIVE_AREA_69/125 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_69/259 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_69) @06b270e0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_69/125 (read)msr_ADC_EXCLUSIVE_AREA_69/124 (write)msr_ADC_EXCLUSIVE_AREA_69/124 (read)reentry_guard_ADC_EXCLUSIVE_AREA_69/125 (read)reentry_guard_ADC_EXCLUSIVE_AREA_69/125 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_68/258 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_68) @06b27d20
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_68/123 (read)reentry_guard_ADC_EXCLUSIVE_AREA_68/123 (write)msr_ADC_EXCLUSIVE_AREA_68/122 (read)reentry_guard_ADC_EXCLUSIVE_AREA_68/123 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_68/257 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_68) @06b27a80
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_68/123 (read)msr_ADC_EXCLUSIVE_AREA_68/122 (write)msr_ADC_EXCLUSIVE_AREA_68/122 (read)reentry_guard_ADC_EXCLUSIVE_AREA_68/123 (read)reentry_guard_ADC_EXCLUSIVE_AREA_68/123 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_67/256 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_67) @06b277e0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_67/121 (read)reentry_guard_ADC_EXCLUSIVE_AREA_67/121 (write)msr_ADC_EXCLUSIVE_AREA_67/120 (read)reentry_guard_ADC_EXCLUSIVE_AREA_67/121 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_67/255 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_67) @06b27540
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_67/121 (read)msr_ADC_EXCLUSIVE_AREA_67/120 (write)msr_ADC_EXCLUSIVE_AREA_67/120 (read)reentry_guard_ADC_EXCLUSIVE_AREA_67/121 (read)reentry_guard_ADC_EXCLUSIVE_AREA_67/121 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_66/254 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_66) @06b272a0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_66/119 (read)reentry_guard_ADC_EXCLUSIVE_AREA_66/119 (write)msr_ADC_EXCLUSIVE_AREA_66/118 (read)reentry_guard_ADC_EXCLUSIVE_AREA_66/119 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_66/253 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_66) @06b27000
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_66/119 (read)msr_ADC_EXCLUSIVE_AREA_66/118 (write)msr_ADC_EXCLUSIVE_AREA_66/118 (read)reentry_guard_ADC_EXCLUSIVE_AREA_66/119 (read)reentry_guard_ADC_EXCLUSIVE_AREA_66/119 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_65/252 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_65) @06ab8b60
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_65/117 (read)reentry_guard_ADC_EXCLUSIVE_AREA_65/117 (write)msr_ADC_EXCLUSIVE_AREA_65/116 (read)reentry_guard_ADC_EXCLUSIVE_AREA_65/117 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_65/251 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_65) @06ab8620
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_65/117 (read)msr_ADC_EXCLUSIVE_AREA_65/116 (write)msr_ADC_EXCLUSIVE_AREA_65/116 (read)reentry_guard_ADC_EXCLUSIVE_AREA_65/117 (read)reentry_guard_ADC_EXCLUSIVE_AREA_65/117 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_64/250 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_64) @06ab80e0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_64/115 (read)reentry_guard_ADC_EXCLUSIVE_AREA_64/115 (write)msr_ADC_EXCLUSIVE_AREA_64/114 (read)reentry_guard_ADC_EXCLUSIVE_AREA_64/115 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_64/249 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_64) @06ab8d20
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_64/115 (read)msr_ADC_EXCLUSIVE_AREA_64/114 (write)msr_ADC_EXCLUSIVE_AREA_64/114 (read)reentry_guard_ADC_EXCLUSIVE_AREA_64/115 (read)reentry_guard_ADC_EXCLUSIVE_AREA_64/115 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_63/248 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_63) @06ab8a80
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_63/113 (read)reentry_guard_ADC_EXCLUSIVE_AREA_63/113 (write)msr_ADC_EXCLUSIVE_AREA_63/112 (read)reentry_guard_ADC_EXCLUSIVE_AREA_63/113 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_63/247 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_63) @06ab87e0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_63/113 (read)msr_ADC_EXCLUSIVE_AREA_63/112 (write)msr_ADC_EXCLUSIVE_AREA_63/112 (read)reentry_guard_ADC_EXCLUSIVE_AREA_63/113 (read)reentry_guard_ADC_EXCLUSIVE_AREA_63/113 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_62/246 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_62) @06ab8540
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_62/111 (read)reentry_guard_ADC_EXCLUSIVE_AREA_62/111 (write)msr_ADC_EXCLUSIVE_AREA_62/110 (read)reentry_guard_ADC_EXCLUSIVE_AREA_62/111 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_62/245 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_62) @06ab82a0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_62/111 (read)msr_ADC_EXCLUSIVE_AREA_62/110 (write)msr_ADC_EXCLUSIVE_AREA_62/110 (read)reentry_guard_ADC_EXCLUSIVE_AREA_62/111 (read)reentry_guard_ADC_EXCLUSIVE_AREA_62/111 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_61/244 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_61) @06ab8000
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_61/109 (read)reentry_guard_ADC_EXCLUSIVE_AREA_61/109 (write)msr_ADC_EXCLUSIVE_AREA_61/108 (read)reentry_guard_ADC_EXCLUSIVE_AREA_61/109 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_61/243 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_61) @06ab0b60
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_61/109 (read)msr_ADC_EXCLUSIVE_AREA_61/108 (write)msr_ADC_EXCLUSIVE_AREA_61/108 (read)reentry_guard_ADC_EXCLUSIVE_AREA_61/109 (read)reentry_guard_ADC_EXCLUSIVE_AREA_61/109 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_60/242 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_60) @06ab0620
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_60/107 (read)reentry_guard_ADC_EXCLUSIVE_AREA_60/107 (write)msr_ADC_EXCLUSIVE_AREA_60/106 (read)reentry_guard_ADC_EXCLUSIVE_AREA_60/107 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_60/241 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_60) @06ab00e0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_60/107 (read)msr_ADC_EXCLUSIVE_AREA_60/106 (write)msr_ADC_EXCLUSIVE_AREA_60/106 (read)reentry_guard_ADC_EXCLUSIVE_AREA_60/107 (read)reentry_guard_ADC_EXCLUSIVE_AREA_60/107 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_59/240 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_59) @06ab0d20
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_59/105 (read)reentry_guard_ADC_EXCLUSIVE_AREA_59/105 (write)msr_ADC_EXCLUSIVE_AREA_59/104 (read)reentry_guard_ADC_EXCLUSIVE_AREA_59/105 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_59/239 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_59) @06ab0a80
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_59/105 (read)msr_ADC_EXCLUSIVE_AREA_59/104 (write)msr_ADC_EXCLUSIVE_AREA_59/104 (read)reentry_guard_ADC_EXCLUSIVE_AREA_59/105 (read)reentry_guard_ADC_EXCLUSIVE_AREA_59/105 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_58/238 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_58) @06ab07e0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_58/103 (read)reentry_guard_ADC_EXCLUSIVE_AREA_58/103 (write)msr_ADC_EXCLUSIVE_AREA_58/102 (read)reentry_guard_ADC_EXCLUSIVE_AREA_58/103 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_58/237 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_58) @06ab0540
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_58/103 (read)msr_ADC_EXCLUSIVE_AREA_58/102 (write)msr_ADC_EXCLUSIVE_AREA_58/102 (read)reentry_guard_ADC_EXCLUSIVE_AREA_58/103 (read)reentry_guard_ADC_EXCLUSIVE_AREA_58/103 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_57/236 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_57) @06ab02a0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_57/101 (read)reentry_guard_ADC_EXCLUSIVE_AREA_57/101 (write)msr_ADC_EXCLUSIVE_AREA_57/100 (read)reentry_guard_ADC_EXCLUSIVE_AREA_57/101 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_57/235 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_57) @06ab0000
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_57/101 (read)msr_ADC_EXCLUSIVE_AREA_57/100 (write)msr_ADC_EXCLUSIVE_AREA_57/100 (read)reentry_guard_ADC_EXCLUSIVE_AREA_57/101 (read)reentry_guard_ADC_EXCLUSIVE_AREA_57/101 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_56/234 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_56) @06aa6b60
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_56/99 (read)reentry_guard_ADC_EXCLUSIVE_AREA_56/99 (write)msr_ADC_EXCLUSIVE_AREA_56/98 (read)reentry_guard_ADC_EXCLUSIVE_AREA_56/99 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_56/233 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_56) @06aa6620
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_56/99 (read)msr_ADC_EXCLUSIVE_AREA_56/98 (write)msr_ADC_EXCLUSIVE_AREA_56/98 (read)reentry_guard_ADC_EXCLUSIVE_AREA_56/99 (read)reentry_guard_ADC_EXCLUSIVE_AREA_56/99 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_55/232 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_55) @06aa60e0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_55/97 (read)reentry_guard_ADC_EXCLUSIVE_AREA_55/97 (write)msr_ADC_EXCLUSIVE_AREA_55/96 (read)reentry_guard_ADC_EXCLUSIVE_AREA_55/97 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_55/231 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_55) @06aa6d20
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_55/97 (read)msr_ADC_EXCLUSIVE_AREA_55/96 (write)msr_ADC_EXCLUSIVE_AREA_55/96 (read)reentry_guard_ADC_EXCLUSIVE_AREA_55/97 (read)reentry_guard_ADC_EXCLUSIVE_AREA_55/97 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_54/230 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_54) @06aa6a80
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_54/95 (read)reentry_guard_ADC_EXCLUSIVE_AREA_54/95 (write)msr_ADC_EXCLUSIVE_AREA_54/94 (read)reentry_guard_ADC_EXCLUSIVE_AREA_54/95 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_54/229 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_54) @06aa67e0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_54/95 (read)msr_ADC_EXCLUSIVE_AREA_54/94 (write)msr_ADC_EXCLUSIVE_AREA_54/94 (read)reentry_guard_ADC_EXCLUSIVE_AREA_54/95 (read)reentry_guard_ADC_EXCLUSIVE_AREA_54/95 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_50/228 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_50) @06aa6540
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_50/93 (read)reentry_guard_ADC_EXCLUSIVE_AREA_50/93 (write)msr_ADC_EXCLUSIVE_AREA_50/92 (read)reentry_guard_ADC_EXCLUSIVE_AREA_50/93 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_50/227 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_50) @06aa62a0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_50/93 (read)msr_ADC_EXCLUSIVE_AREA_50/92 (write)msr_ADC_EXCLUSIVE_AREA_50/92 (read)reentry_guard_ADC_EXCLUSIVE_AREA_50/93 (read)reentry_guard_ADC_EXCLUSIVE_AREA_50/93 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_49/226 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_49) @06aa6000
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_49/91 (read)reentry_guard_ADC_EXCLUSIVE_AREA_49/91 (write)msr_ADC_EXCLUSIVE_AREA_49/90 (read)reentry_guard_ADC_EXCLUSIVE_AREA_49/91 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_49/225 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_49) @06aa0b60
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_49/91 (read)msr_ADC_EXCLUSIVE_AREA_49/90 (write)msr_ADC_EXCLUSIVE_AREA_49/90 (read)reentry_guard_ADC_EXCLUSIVE_AREA_49/91 (read)reentry_guard_ADC_EXCLUSIVE_AREA_49/91 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_48/224 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_48) @06aa0620
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_48/89 (read)reentry_guard_ADC_EXCLUSIVE_AREA_48/89 (write)msr_ADC_EXCLUSIVE_AREA_48/88 (read)reentry_guard_ADC_EXCLUSIVE_AREA_48/89 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_48/223 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_48) @06aa00e0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_48/89 (read)msr_ADC_EXCLUSIVE_AREA_48/88 (write)msr_ADC_EXCLUSIVE_AREA_48/88 (read)reentry_guard_ADC_EXCLUSIVE_AREA_48/89 (read)reentry_guard_ADC_EXCLUSIVE_AREA_48/89 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_47/222 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_47) @06aa0d20
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_47/87 (read)reentry_guard_ADC_EXCLUSIVE_AREA_47/87 (write)msr_ADC_EXCLUSIVE_AREA_47/86 (read)reentry_guard_ADC_EXCLUSIVE_AREA_47/87 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_47/221 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_47) @06aa0a80
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_47/87 (read)msr_ADC_EXCLUSIVE_AREA_47/86 (write)msr_ADC_EXCLUSIVE_AREA_47/86 (read)reentry_guard_ADC_EXCLUSIVE_AREA_47/87 (read)reentry_guard_ADC_EXCLUSIVE_AREA_47/87 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_46/220 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_46) @06aa07e0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_46/85 (read)reentry_guard_ADC_EXCLUSIVE_AREA_46/85 (write)msr_ADC_EXCLUSIVE_AREA_46/84 (read)reentry_guard_ADC_EXCLUSIVE_AREA_46/85 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_46/219 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_46) @06aa0540
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_46/85 (read)msr_ADC_EXCLUSIVE_AREA_46/84 (write)msr_ADC_EXCLUSIVE_AREA_46/84 (read)reentry_guard_ADC_EXCLUSIVE_AREA_46/85 (read)reentry_guard_ADC_EXCLUSIVE_AREA_46/85 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_45/218 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_45) @06aa02a0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_45/83 (read)reentry_guard_ADC_EXCLUSIVE_AREA_45/83 (write)msr_ADC_EXCLUSIVE_AREA_45/82 (read)reentry_guard_ADC_EXCLUSIVE_AREA_45/83 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_45/217 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_45) @06aa0000
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_45/83 (read)msr_ADC_EXCLUSIVE_AREA_45/82 (write)msr_ADC_EXCLUSIVE_AREA_45/82 (read)reentry_guard_ADC_EXCLUSIVE_AREA_45/83 (read)reentry_guard_ADC_EXCLUSIVE_AREA_45/83 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_44/216 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_44) @06a97b60
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_44/81 (read)reentry_guard_ADC_EXCLUSIVE_AREA_44/81 (write)msr_ADC_EXCLUSIVE_AREA_44/80 (read)reentry_guard_ADC_EXCLUSIVE_AREA_44/81 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_44/215 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_44) @06a97620
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_44/81 (read)msr_ADC_EXCLUSIVE_AREA_44/80 (write)msr_ADC_EXCLUSIVE_AREA_44/80 (read)reentry_guard_ADC_EXCLUSIVE_AREA_44/81 (read)reentry_guard_ADC_EXCLUSIVE_AREA_44/81 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_43/214 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_43) @06a970e0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_43/79 (read)reentry_guard_ADC_EXCLUSIVE_AREA_43/79 (write)msr_ADC_EXCLUSIVE_AREA_43/78 (read)reentry_guard_ADC_EXCLUSIVE_AREA_43/79 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_43/213 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_43) @06a97d20
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_43/79 (read)msr_ADC_EXCLUSIVE_AREA_43/78 (write)msr_ADC_EXCLUSIVE_AREA_43/78 (read)reentry_guard_ADC_EXCLUSIVE_AREA_43/79 (read)reentry_guard_ADC_EXCLUSIVE_AREA_43/79 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_42/212 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_42) @06a97a80
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_42/77 (read)reentry_guard_ADC_EXCLUSIVE_AREA_42/77 (write)msr_ADC_EXCLUSIVE_AREA_42/76 (read)reentry_guard_ADC_EXCLUSIVE_AREA_42/77 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_42/211 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_42) @06a977e0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_42/77 (read)msr_ADC_EXCLUSIVE_AREA_42/76 (write)msr_ADC_EXCLUSIVE_AREA_42/76 (read)reentry_guard_ADC_EXCLUSIVE_AREA_42/77 (read)reentry_guard_ADC_EXCLUSIVE_AREA_42/77 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_41/210 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_41) @06a97540
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_41/75 (read)reentry_guard_ADC_EXCLUSIVE_AREA_41/75 (write)msr_ADC_EXCLUSIVE_AREA_41/74 (read)reentry_guard_ADC_EXCLUSIVE_AREA_41/75 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_41/209 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_41) @06a972a0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_41/75 (read)msr_ADC_EXCLUSIVE_AREA_41/74 (write)msr_ADC_EXCLUSIVE_AREA_41/74 (read)reentry_guard_ADC_EXCLUSIVE_AREA_41/75 (read)reentry_guard_ADC_EXCLUSIVE_AREA_41/75 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_40/208 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_40) @06a97000
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_40/73 (read)reentry_guard_ADC_EXCLUSIVE_AREA_40/73 (write)msr_ADC_EXCLUSIVE_AREA_40/72 (read)reentry_guard_ADC_EXCLUSIVE_AREA_40/73 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_40/207 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_40) @06a92b60
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_40/73 (read)msr_ADC_EXCLUSIVE_AREA_40/72 (write)msr_ADC_EXCLUSIVE_AREA_40/72 (read)reentry_guard_ADC_EXCLUSIVE_AREA_40/73 (read)reentry_guard_ADC_EXCLUSIVE_AREA_40/73 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_39/206 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_39) @06a92620
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_39/71 (read)reentry_guard_ADC_EXCLUSIVE_AREA_39/71 (write)msr_ADC_EXCLUSIVE_AREA_39/70 (read)reentry_guard_ADC_EXCLUSIVE_AREA_39/71 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_39/205 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_39) @06a920e0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_39/71 (read)msr_ADC_EXCLUSIVE_AREA_39/70 (write)msr_ADC_EXCLUSIVE_AREA_39/70 (read)reentry_guard_ADC_EXCLUSIVE_AREA_39/71 (read)reentry_guard_ADC_EXCLUSIVE_AREA_39/71 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_38/204 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_38) @06a92d20
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_38/69 (read)reentry_guard_ADC_EXCLUSIVE_AREA_38/69 (write)msr_ADC_EXCLUSIVE_AREA_38/68 (read)reentry_guard_ADC_EXCLUSIVE_AREA_38/69 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_38/203 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_38) @06a92a80
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_38/69 (read)msr_ADC_EXCLUSIVE_AREA_38/68 (write)msr_ADC_EXCLUSIVE_AREA_38/68 (read)reentry_guard_ADC_EXCLUSIVE_AREA_38/69 (read)reentry_guard_ADC_EXCLUSIVE_AREA_38/69 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_37/202 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_37) @06a927e0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_37/67 (read)reentry_guard_ADC_EXCLUSIVE_AREA_37/67 (write)msr_ADC_EXCLUSIVE_AREA_37/66 (read)reentry_guard_ADC_EXCLUSIVE_AREA_37/67 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_37/201 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_37) @06a92540
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_37/67 (read)msr_ADC_EXCLUSIVE_AREA_37/66 (write)msr_ADC_EXCLUSIVE_AREA_37/66 (read)reentry_guard_ADC_EXCLUSIVE_AREA_37/67 (read)reentry_guard_ADC_EXCLUSIVE_AREA_37/67 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_36/200 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_36) @06a922a0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_36/65 (read)reentry_guard_ADC_EXCLUSIVE_AREA_36/65 (write)msr_ADC_EXCLUSIVE_AREA_36/64 (read)reentry_guard_ADC_EXCLUSIVE_AREA_36/65 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_36/199 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_36) @06a92000
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_36/65 (read)msr_ADC_EXCLUSIVE_AREA_36/64 (write)msr_ADC_EXCLUSIVE_AREA_36/64 (read)reentry_guard_ADC_EXCLUSIVE_AREA_36/65 (read)reentry_guard_ADC_EXCLUSIVE_AREA_36/65 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_35/198 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_35) @06a89b60
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_35/63 (read)reentry_guard_ADC_EXCLUSIVE_AREA_35/63 (write)msr_ADC_EXCLUSIVE_AREA_35/62 (read)reentry_guard_ADC_EXCLUSIVE_AREA_35/63 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_35/197 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_35) @06a89620
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_35/63 (read)msr_ADC_EXCLUSIVE_AREA_35/62 (write)msr_ADC_EXCLUSIVE_AREA_35/62 (read)reentry_guard_ADC_EXCLUSIVE_AREA_35/63 (read)reentry_guard_ADC_EXCLUSIVE_AREA_35/63 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_34/196 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_34) @06a890e0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_34/61 (read)reentry_guard_ADC_EXCLUSIVE_AREA_34/61 (write)msr_ADC_EXCLUSIVE_AREA_34/60 (read)reentry_guard_ADC_EXCLUSIVE_AREA_34/61 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_34/195 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_34) @06a89d20
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_34/61 (read)msr_ADC_EXCLUSIVE_AREA_34/60 (write)msr_ADC_EXCLUSIVE_AREA_34/60 (read)reentry_guard_ADC_EXCLUSIVE_AREA_34/61 (read)reentry_guard_ADC_EXCLUSIVE_AREA_34/61 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_33/194 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_33) @06a89a80
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_33/59 (read)reentry_guard_ADC_EXCLUSIVE_AREA_33/59 (write)msr_ADC_EXCLUSIVE_AREA_33/58 (read)reentry_guard_ADC_EXCLUSIVE_AREA_33/59 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_33/193 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_33) @06a897e0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_33/59 (read)msr_ADC_EXCLUSIVE_AREA_33/58 (write)msr_ADC_EXCLUSIVE_AREA_33/58 (read)reentry_guard_ADC_EXCLUSIVE_AREA_33/59 (read)reentry_guard_ADC_EXCLUSIVE_AREA_33/59 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_32/192 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_32) @06a89540
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_32/57 (read)reentry_guard_ADC_EXCLUSIVE_AREA_32/57 (write)msr_ADC_EXCLUSIVE_AREA_32/56 (read)reentry_guard_ADC_EXCLUSIVE_AREA_32/57 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_32/191 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_32) @06a892a0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_32/57 (read)msr_ADC_EXCLUSIVE_AREA_32/56 (write)msr_ADC_EXCLUSIVE_AREA_32/56 (read)reentry_guard_ADC_EXCLUSIVE_AREA_32/57 (read)reentry_guard_ADC_EXCLUSIVE_AREA_32/57 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_31/190 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_31) @06a89000
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_31/55 (read)reentry_guard_ADC_EXCLUSIVE_AREA_31/55 (write)msr_ADC_EXCLUSIVE_AREA_31/54 (read)reentry_guard_ADC_EXCLUSIVE_AREA_31/55 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_31/189 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_31) @06a80b60
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_31/55 (read)msr_ADC_EXCLUSIVE_AREA_31/54 (write)msr_ADC_EXCLUSIVE_AREA_31/54 (read)reentry_guard_ADC_EXCLUSIVE_AREA_31/55 (read)reentry_guard_ADC_EXCLUSIVE_AREA_31/55 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_30/188 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_30) @06a80620
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_30/53 (read)reentry_guard_ADC_EXCLUSIVE_AREA_30/53 (write)msr_ADC_EXCLUSIVE_AREA_30/52 (read)reentry_guard_ADC_EXCLUSIVE_AREA_30/53 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_30/187 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_30) @06a800e0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_30/53 (read)msr_ADC_EXCLUSIVE_AREA_30/52 (write)msr_ADC_EXCLUSIVE_AREA_30/52 (read)reentry_guard_ADC_EXCLUSIVE_AREA_30/53 (read)reentry_guard_ADC_EXCLUSIVE_AREA_30/53 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_29/186 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_29) @06a80d20
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_29/51 (read)reentry_guard_ADC_EXCLUSIVE_AREA_29/51 (write)msr_ADC_EXCLUSIVE_AREA_29/50 (read)reentry_guard_ADC_EXCLUSIVE_AREA_29/51 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_29/185 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_29) @06a80a80
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_29/51 (read)msr_ADC_EXCLUSIVE_AREA_29/50 (write)msr_ADC_EXCLUSIVE_AREA_29/50 (read)reentry_guard_ADC_EXCLUSIVE_AREA_29/51 (read)reentry_guard_ADC_EXCLUSIVE_AREA_29/51 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_28/184 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_28) @06a807e0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_28/49 (read)reentry_guard_ADC_EXCLUSIVE_AREA_28/49 (write)msr_ADC_EXCLUSIVE_AREA_28/48 (read)reentry_guard_ADC_EXCLUSIVE_AREA_28/49 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_28/183 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_28) @06a80540
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_28/49 (read)msr_ADC_EXCLUSIVE_AREA_28/48 (write)msr_ADC_EXCLUSIVE_AREA_28/48 (read)reentry_guard_ADC_EXCLUSIVE_AREA_28/49 (read)reentry_guard_ADC_EXCLUSIVE_AREA_28/49 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_27/182 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_27) @06a802a0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_27/47 (read)reentry_guard_ADC_EXCLUSIVE_AREA_27/47 (write)msr_ADC_EXCLUSIVE_AREA_27/46 (read)reentry_guard_ADC_EXCLUSIVE_AREA_27/47 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_27/181 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_27) @06a80000
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_27/47 (read)msr_ADC_EXCLUSIVE_AREA_27/46 (write)msr_ADC_EXCLUSIVE_AREA_27/46 (read)reentry_guard_ADC_EXCLUSIVE_AREA_27/47 (read)reentry_guard_ADC_EXCLUSIVE_AREA_27/47 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_26/180 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_26) @06a78b60
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_26/45 (read)reentry_guard_ADC_EXCLUSIVE_AREA_26/45 (write)msr_ADC_EXCLUSIVE_AREA_26/44 (read)reentry_guard_ADC_EXCLUSIVE_AREA_26/45 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_26/179 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_26) @06a78620
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_26/45 (read)msr_ADC_EXCLUSIVE_AREA_26/44 (write)msr_ADC_EXCLUSIVE_AREA_26/44 (read)reentry_guard_ADC_EXCLUSIVE_AREA_26/45 (read)reentry_guard_ADC_EXCLUSIVE_AREA_26/45 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_25/178 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_25) @06a780e0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_25/43 (read)reentry_guard_ADC_EXCLUSIVE_AREA_25/43 (write)msr_ADC_EXCLUSIVE_AREA_25/42 (read)reentry_guard_ADC_EXCLUSIVE_AREA_25/43 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_25/177 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_25) @06a78d20
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_25/43 (read)msr_ADC_EXCLUSIVE_AREA_25/42 (write)msr_ADC_EXCLUSIVE_AREA_25/42 (read)reentry_guard_ADC_EXCLUSIVE_AREA_25/43 (read)reentry_guard_ADC_EXCLUSIVE_AREA_25/43 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_24/176 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_24) @06a78a80
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_24/41 (read)reentry_guard_ADC_EXCLUSIVE_AREA_24/41 (write)msr_ADC_EXCLUSIVE_AREA_24/40 (read)reentry_guard_ADC_EXCLUSIVE_AREA_24/41 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_24/175 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_24) @06a787e0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_24/41 (read)msr_ADC_EXCLUSIVE_AREA_24/40 (write)msr_ADC_EXCLUSIVE_AREA_24/40 (read)reentry_guard_ADC_EXCLUSIVE_AREA_24/41 (read)reentry_guard_ADC_EXCLUSIVE_AREA_24/41 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_23/174 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_23) @06a78540
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_23/39 (read)reentry_guard_ADC_EXCLUSIVE_AREA_23/39 (write)msr_ADC_EXCLUSIVE_AREA_23/38 (read)reentry_guard_ADC_EXCLUSIVE_AREA_23/39 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_23/173 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_23) @06a782a0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_23/39 (read)msr_ADC_EXCLUSIVE_AREA_23/38 (write)msr_ADC_EXCLUSIVE_AREA_23/38 (read)reentry_guard_ADC_EXCLUSIVE_AREA_23/39 (read)reentry_guard_ADC_EXCLUSIVE_AREA_23/39 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_22/172 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_22) @06a78000
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_22/37 (read)reentry_guard_ADC_EXCLUSIVE_AREA_22/37 (write)msr_ADC_EXCLUSIVE_AREA_22/36 (read)reentry_guard_ADC_EXCLUSIVE_AREA_22/37 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_22/171 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_22) @06a72b60
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_22/37 (read)msr_ADC_EXCLUSIVE_AREA_22/36 (write)msr_ADC_EXCLUSIVE_AREA_22/36 (read)reentry_guard_ADC_EXCLUSIVE_AREA_22/37 (read)reentry_guard_ADC_EXCLUSIVE_AREA_22/37 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_21/170 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_21) @06a72620
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_21/35 (read)reentry_guard_ADC_EXCLUSIVE_AREA_21/35 (write)msr_ADC_EXCLUSIVE_AREA_21/34 (read)reentry_guard_ADC_EXCLUSIVE_AREA_21/35 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_21/169 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_21) @06a720e0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_21/35 (read)msr_ADC_EXCLUSIVE_AREA_21/34 (write)msr_ADC_EXCLUSIVE_AREA_21/34 (read)reentry_guard_ADC_EXCLUSIVE_AREA_21/35 (read)reentry_guard_ADC_EXCLUSIVE_AREA_21/35 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_20/168 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_20) @06a72d20
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_20/33 (read)reentry_guard_ADC_EXCLUSIVE_AREA_20/33 (write)msr_ADC_EXCLUSIVE_AREA_20/32 (read)reentry_guard_ADC_EXCLUSIVE_AREA_20/33 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_20/167 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_20) @06a72a80
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_20/33 (read)msr_ADC_EXCLUSIVE_AREA_20/32 (write)msr_ADC_EXCLUSIVE_AREA_20/32 (read)reentry_guard_ADC_EXCLUSIVE_AREA_20/33 (read)reentry_guard_ADC_EXCLUSIVE_AREA_20/33 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_19/166 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_19) @06a727e0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_19/31 (read)reentry_guard_ADC_EXCLUSIVE_AREA_19/31 (write)msr_ADC_EXCLUSIVE_AREA_19/30 (read)reentry_guard_ADC_EXCLUSIVE_AREA_19/31 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_19/165 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_19) @06a72540
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_19/31 (read)msr_ADC_EXCLUSIVE_AREA_19/30 (write)msr_ADC_EXCLUSIVE_AREA_19/30 (read)reentry_guard_ADC_EXCLUSIVE_AREA_19/31 (read)reentry_guard_ADC_EXCLUSIVE_AREA_19/31 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_18/164 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_18) @06a722a0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_18/29 (read)reentry_guard_ADC_EXCLUSIVE_AREA_18/29 (write)msr_ADC_EXCLUSIVE_AREA_18/28 (read)reentry_guard_ADC_EXCLUSIVE_AREA_18/29 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_18/163 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_18) @06a72000
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_18/29 (read)msr_ADC_EXCLUSIVE_AREA_18/28 (write)msr_ADC_EXCLUSIVE_AREA_18/28 (read)reentry_guard_ADC_EXCLUSIVE_AREA_18/29 (read)reentry_guard_ADC_EXCLUSIVE_AREA_18/29 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_17/162 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_17) @06a69b60
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_17/27 (read)reentry_guard_ADC_EXCLUSIVE_AREA_17/27 (write)msr_ADC_EXCLUSIVE_AREA_17/26 (read)reentry_guard_ADC_EXCLUSIVE_AREA_17/27 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_17/161 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_17) @06a69620
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_17/27 (read)msr_ADC_EXCLUSIVE_AREA_17/26 (write)msr_ADC_EXCLUSIVE_AREA_17/26 (read)reentry_guard_ADC_EXCLUSIVE_AREA_17/27 (read)reentry_guard_ADC_EXCLUSIVE_AREA_17/27 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_16/160 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_16) @06a690e0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_16/25 (read)reentry_guard_ADC_EXCLUSIVE_AREA_16/25 (write)msr_ADC_EXCLUSIVE_AREA_16/24 (read)reentry_guard_ADC_EXCLUSIVE_AREA_16/25 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_16/159 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_16) @06a69d20
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_16/25 (read)msr_ADC_EXCLUSIVE_AREA_16/24 (write)msr_ADC_EXCLUSIVE_AREA_16/24 (read)reentry_guard_ADC_EXCLUSIVE_AREA_16/25 (read)reentry_guard_ADC_EXCLUSIVE_AREA_16/25 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_15/158 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_15) @06a69a80
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_15/23 (read)reentry_guard_ADC_EXCLUSIVE_AREA_15/23 (write)msr_ADC_EXCLUSIVE_AREA_15/22 (read)reentry_guard_ADC_EXCLUSIVE_AREA_15/23 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_15/157 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_15) @06a697e0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_15/23 (read)msr_ADC_EXCLUSIVE_AREA_15/22 (write)msr_ADC_EXCLUSIVE_AREA_15/22 (read)reentry_guard_ADC_EXCLUSIVE_AREA_15/23 (read)reentry_guard_ADC_EXCLUSIVE_AREA_15/23 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_14/156 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_14) @06a69540
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_14/21 (read)reentry_guard_ADC_EXCLUSIVE_AREA_14/21 (write)msr_ADC_EXCLUSIVE_AREA_14/20 (read)reentry_guard_ADC_EXCLUSIVE_AREA_14/21 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_14/155 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_14) @06a692a0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_14/21 (read)msr_ADC_EXCLUSIVE_AREA_14/20 (write)msr_ADC_EXCLUSIVE_AREA_14/20 (read)reentry_guard_ADC_EXCLUSIVE_AREA_14/21 (read)reentry_guard_ADC_EXCLUSIVE_AREA_14/21 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_13/154 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_13) @06a69000
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_13/19 (read)reentry_guard_ADC_EXCLUSIVE_AREA_13/19 (write)msr_ADC_EXCLUSIVE_AREA_13/18 (read)reentry_guard_ADC_EXCLUSIVE_AREA_13/19 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_13/153 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_13) @06a62b60
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_13/19 (read)msr_ADC_EXCLUSIVE_AREA_13/18 (write)msr_ADC_EXCLUSIVE_AREA_13/18 (read)reentry_guard_ADC_EXCLUSIVE_AREA_13/19 (read)reentry_guard_ADC_EXCLUSIVE_AREA_13/19 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_12/152 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_12) @06a62620
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_12/17 (read)reentry_guard_ADC_EXCLUSIVE_AREA_12/17 (write)msr_ADC_EXCLUSIVE_AREA_12/16 (read)reentry_guard_ADC_EXCLUSIVE_AREA_12/17 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_12/151 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_12) @06a620e0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_12/17 (read)msr_ADC_EXCLUSIVE_AREA_12/16 (write)msr_ADC_EXCLUSIVE_AREA_12/16 (read)reentry_guard_ADC_EXCLUSIVE_AREA_12/17 (read)reentry_guard_ADC_EXCLUSIVE_AREA_12/17 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_11/150 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_11) @06a62d20
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_11/15 (read)reentry_guard_ADC_EXCLUSIVE_AREA_11/15 (write)msr_ADC_EXCLUSIVE_AREA_11/14 (read)reentry_guard_ADC_EXCLUSIVE_AREA_11/15 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_11/149 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_11) @06a62a80
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_11/15 (read)msr_ADC_EXCLUSIVE_AREA_11/14 (write)msr_ADC_EXCLUSIVE_AREA_11/14 (read)reentry_guard_ADC_EXCLUSIVE_AREA_11/15 (read)reentry_guard_ADC_EXCLUSIVE_AREA_11/15 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_10/148 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_10) @06a627e0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_10/13 (read)reentry_guard_ADC_EXCLUSIVE_AREA_10/13 (write)msr_ADC_EXCLUSIVE_AREA_10/12 (read)reentry_guard_ADC_EXCLUSIVE_AREA_10/13 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_10/147 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_10) @06a62540
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_10/13 (read)msr_ADC_EXCLUSIVE_AREA_10/12 (write)msr_ADC_EXCLUSIVE_AREA_10/12 (read)reentry_guard_ADC_EXCLUSIVE_AREA_10/13 (read)reentry_guard_ADC_EXCLUSIVE_AREA_10/13 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_05/146 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_05) @06a622a0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_05/11 (read)reentry_guard_ADC_EXCLUSIVE_AREA_05/11 (write)msr_ADC_EXCLUSIVE_AREA_05/10 (read)reentry_guard_ADC_EXCLUSIVE_AREA_05/11 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_05/145 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_05) @06a62000
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_05/11 (read)msr_ADC_EXCLUSIVE_AREA_05/10 (write)msr_ADC_EXCLUSIVE_AREA_05/10 (read)reentry_guard_ADC_EXCLUSIVE_AREA_05/11 (read)reentry_guard_ADC_EXCLUSIVE_AREA_05/11 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_04/144 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_04) @069cdb60
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_04/9 (read)reentry_guard_ADC_EXCLUSIVE_AREA_04/9 (write)msr_ADC_EXCLUSIVE_AREA_04/8 (read)reentry_guard_ADC_EXCLUSIVE_AREA_04/9 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_04/143 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_04) @069cd620
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_04/9 (read)msr_ADC_EXCLUSIVE_AREA_04/8 (write)msr_ADC_EXCLUSIVE_AREA_04/8 (read)reentry_guard_ADC_EXCLUSIVE_AREA_04/9 (read)reentry_guard_ADC_EXCLUSIVE_AREA_04/9 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_03/142 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_03) @069cd0e0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_03/7 (read)reentry_guard_ADC_EXCLUSIVE_AREA_03/7 (write)msr_ADC_EXCLUSIVE_AREA_03/6 (read)reentry_guard_ADC_EXCLUSIVE_AREA_03/7 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_03/141 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_03) @069cdd20
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_03/7 (read)msr_ADC_EXCLUSIVE_AREA_03/6 (write)msr_ADC_EXCLUSIVE_AREA_03/6 (read)reentry_guard_ADC_EXCLUSIVE_AREA_03/7 (read)reentry_guard_ADC_EXCLUSIVE_AREA_03/7 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_02/140 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_02) @069cda80
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_02/5 (read)reentry_guard_ADC_EXCLUSIVE_AREA_02/5 (write)msr_ADC_EXCLUSIVE_AREA_02/4 (read)reentry_guard_ADC_EXCLUSIVE_AREA_02/5 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_02/139 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_02) @069cd7e0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_02/5 (read)msr_ADC_EXCLUSIVE_AREA_02/4 (write)msr_ADC_EXCLUSIVE_AREA_02/4 (read)reentry_guard_ADC_EXCLUSIVE_AREA_02/5 (read)reentry_guard_ADC_EXCLUSIVE_AREA_02/5 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_01/138 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_01) @069cd540
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_01/3 (read)reentry_guard_ADC_EXCLUSIVE_AREA_01/3 (write)msr_ADC_EXCLUSIVE_AREA_01/2 (read)reentry_guard_ADC_EXCLUSIVE_AREA_01/3 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_01/137 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_01) @069cd2a0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_01/3 (read)msr_ADC_EXCLUSIVE_AREA_01/2 (write)msr_ADC_EXCLUSIVE_AREA_01/2 (read)reentry_guard_ADC_EXCLUSIVE_AREA_01/3 (read)reentry_guard_ADC_EXCLUSIVE_AREA_01/3 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_00/136 (SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_00) @069cd000
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_00/1 (read)reentry_guard_ADC_EXCLUSIVE_AREA_00/1 (write)msr_ADC_EXCLUSIVE_AREA_00/0 (read)reentry_guard_ADC_EXCLUSIVE_AREA_00/1 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_00/135 (SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_00) @069c8b60
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_ADC_EXCLUSIVE_AREA_00/1 (read)msr_ADC_EXCLUSIVE_AREA_00/0 (write)msr_ADC_EXCLUSIVE_AREA_00/0 (read)reentry_guard_ADC_EXCLUSIVE_AREA_00/1 (read)reentry_guard_ADC_EXCLUSIVE_AREA_00/1 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/269 (1073741824 (estimated locally),1.00 per call)
|
|
Adc_schm_read_msr/134 (Adc_schm_read_msr) @069c8d20
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References:
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls:
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_73/133 (reentry_guard_ADC_EXCLUSIVE_AREA_73) @069c9360
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_73/267 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_73/267 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_73/267 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_73/268 (read)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_73/268 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_73/268 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_ADC_EXCLUSIVE_AREA_73/132 (msr_ADC_EXCLUSIVE_AREA_73) @069c92d0
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_73/267 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_73/267 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_73/268 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_72/131 (reentry_guard_ADC_EXCLUSIVE_AREA_72) @069c9240
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_72/265 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_72/265 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_72/265 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_72/266 (read)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_72/266 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_72/266 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_ADC_EXCLUSIVE_AREA_72/130 (msr_ADC_EXCLUSIVE_AREA_72) @069c91b0
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_72/265 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_72/265 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_72/266 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_71/129 (reentry_guard_ADC_EXCLUSIVE_AREA_71) @069c9120
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_71/263 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_71/263 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_71/263 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_71/264 (read)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_71/264 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_71/264 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_ADC_EXCLUSIVE_AREA_71/128 (msr_ADC_EXCLUSIVE_AREA_71) @069c9090
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_71/263 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_71/263 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_71/264 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_70/127 (reentry_guard_ADC_EXCLUSIVE_AREA_70) @069c9000
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_70/261 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_70/261 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_70/261 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_70/262 (read)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_70/262 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_70/262 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_ADC_EXCLUSIVE_AREA_70/126 (msr_ADC_EXCLUSIVE_AREA_70) @069c4f30
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_70/261 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_70/261 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_70/262 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_69/125 (reentry_guard_ADC_EXCLUSIVE_AREA_69) @069c4ea0
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_69/259 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_69/259 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_69/259 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_69/260 (read)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_69/260 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_69/260 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_ADC_EXCLUSIVE_AREA_69/124 (msr_ADC_EXCLUSIVE_AREA_69) @069c4e10
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_69/259 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_69/259 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_69/260 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_68/123 (reentry_guard_ADC_EXCLUSIVE_AREA_68) @069c4d80
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_68/257 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_68/257 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_68/257 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_68/258 (read)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_68/258 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_68/258 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_ADC_EXCLUSIVE_AREA_68/122 (msr_ADC_EXCLUSIVE_AREA_68) @069c4cf0
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_68/257 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_68/257 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_68/258 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_67/121 (reentry_guard_ADC_EXCLUSIVE_AREA_67) @069c4c60
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_67/255 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_67/255 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_67/255 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_67/256 (read)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_67/256 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_67/256 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_ADC_EXCLUSIVE_AREA_67/120 (msr_ADC_EXCLUSIVE_AREA_67) @069c4bd0
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_67/255 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_67/255 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_67/256 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_66/119 (reentry_guard_ADC_EXCLUSIVE_AREA_66) @069c4b40
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_66/253 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_66/253 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_66/253 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_66/254 (read)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_66/254 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_66/254 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_ADC_EXCLUSIVE_AREA_66/118 (msr_ADC_EXCLUSIVE_AREA_66) @069c4ab0
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_66/253 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_66/253 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_66/254 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_65/117 (reentry_guard_ADC_EXCLUSIVE_AREA_65) @069c4a20
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_65/251 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_65/251 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_65/251 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_65/252 (read)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_65/252 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_65/252 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_ADC_EXCLUSIVE_AREA_65/116 (msr_ADC_EXCLUSIVE_AREA_65) @069c4990
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_65/251 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_65/251 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_65/252 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_64/115 (reentry_guard_ADC_EXCLUSIVE_AREA_64) @069c4900
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_64/249 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_64/249 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_64/249 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_64/250 (read)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_64/250 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_64/250 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_ADC_EXCLUSIVE_AREA_64/114 (msr_ADC_EXCLUSIVE_AREA_64) @069c4870
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_64/249 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_64/249 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_64/250 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_63/113 (reentry_guard_ADC_EXCLUSIVE_AREA_63) @069c47e0
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_63/247 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_63/247 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_63/247 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_63/248 (read)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_63/248 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_63/248 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_ADC_EXCLUSIVE_AREA_63/112 (msr_ADC_EXCLUSIVE_AREA_63) @069c4750
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_63/247 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_63/247 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_63/248 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_62/111 (reentry_guard_ADC_EXCLUSIVE_AREA_62) @069c46c0
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_62/245 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_62/245 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_62/245 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_62/246 (read)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_62/246 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_62/246 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_ADC_EXCLUSIVE_AREA_62/110 (msr_ADC_EXCLUSIVE_AREA_62) @069c4630
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_62/245 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_62/245 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_62/246 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_61/109 (reentry_guard_ADC_EXCLUSIVE_AREA_61) @069c45a0
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_61/243 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_61/243 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_61/243 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_61/244 (read)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_61/244 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_61/244 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_ADC_EXCLUSIVE_AREA_61/108 (msr_ADC_EXCLUSIVE_AREA_61) @069c4510
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_61/243 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_61/243 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_61/244 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_60/107 (reentry_guard_ADC_EXCLUSIVE_AREA_60) @069c4480
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_60/241 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_60/241 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_60/241 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_60/242 (read)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_60/242 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_60/242 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_ADC_EXCLUSIVE_AREA_60/106 (msr_ADC_EXCLUSIVE_AREA_60) @069c43f0
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_60/241 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_60/241 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_60/242 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_59/105 (reentry_guard_ADC_EXCLUSIVE_AREA_59) @069c4360
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_59/239 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_59/239 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_59/239 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_59/240 (read)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_59/240 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_59/240 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_ADC_EXCLUSIVE_AREA_59/104 (msr_ADC_EXCLUSIVE_AREA_59) @069c42d0
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_59/239 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_59/239 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_59/240 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_58/103 (reentry_guard_ADC_EXCLUSIVE_AREA_58) @069c4240
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_58/237 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_58/237 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_58/237 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_58/238 (read)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_58/238 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_58/238 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_ADC_EXCLUSIVE_AREA_58/102 (msr_ADC_EXCLUSIVE_AREA_58) @069c41b0
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_58/237 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_58/237 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_58/238 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_57/101 (reentry_guard_ADC_EXCLUSIVE_AREA_57) @069c4120
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_57/235 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_57/235 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_57/235 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_57/236 (read)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_57/236 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_57/236 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_ADC_EXCLUSIVE_AREA_57/100 (msr_ADC_EXCLUSIVE_AREA_57) @069c4090
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_57/235 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_57/235 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_57/236 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_56/99 (reentry_guard_ADC_EXCLUSIVE_AREA_56) @069c4000
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_56/233 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_56/233 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_56/233 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_56/234 (read)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_56/234 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_56/234 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_ADC_EXCLUSIVE_AREA_56/98 (msr_ADC_EXCLUSIVE_AREA_56) @069bef30
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_56/233 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_56/233 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_56/234 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_55/97 (reentry_guard_ADC_EXCLUSIVE_AREA_55) @069beea0
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_55/231 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_55/231 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_55/231 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_55/232 (read)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_55/232 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_55/232 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_ADC_EXCLUSIVE_AREA_55/96 (msr_ADC_EXCLUSIVE_AREA_55) @069bee10
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_55/231 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_55/231 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_55/232 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_54/95 (reentry_guard_ADC_EXCLUSIVE_AREA_54) @069bed80
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_54/229 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_54/229 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_54/229 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_54/230 (read)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_54/230 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_54/230 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_ADC_EXCLUSIVE_AREA_54/94 (msr_ADC_EXCLUSIVE_AREA_54) @069becf0
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_54/229 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_54/229 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_54/230 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_50/93 (reentry_guard_ADC_EXCLUSIVE_AREA_50) @069bec60
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_50/227 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_50/227 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_50/227 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_50/228 (read)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_50/228 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_50/228 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_ADC_EXCLUSIVE_AREA_50/92 (msr_ADC_EXCLUSIVE_AREA_50) @069bebd0
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_50/227 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_50/227 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_50/228 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_49/91 (reentry_guard_ADC_EXCLUSIVE_AREA_49) @069beb40
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_49/225 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_49/225 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_49/225 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_49/226 (read)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_49/226 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_49/226 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_ADC_EXCLUSIVE_AREA_49/90 (msr_ADC_EXCLUSIVE_AREA_49) @069beab0
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_49/225 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_49/225 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_49/226 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_48/89 (reentry_guard_ADC_EXCLUSIVE_AREA_48) @069bea20
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_48/223 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_48/223 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_48/223 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_48/224 (read)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_48/224 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_48/224 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_ADC_EXCLUSIVE_AREA_48/88 (msr_ADC_EXCLUSIVE_AREA_48) @069be990
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_48/223 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_48/223 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_48/224 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_47/87 (reentry_guard_ADC_EXCLUSIVE_AREA_47) @069be900
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_47/221 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_47/221 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_47/221 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_47/222 (read)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_47/222 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_47/222 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_ADC_EXCLUSIVE_AREA_47/86 (msr_ADC_EXCLUSIVE_AREA_47) @069be870
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_47/221 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_47/221 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_47/222 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_46/85 (reentry_guard_ADC_EXCLUSIVE_AREA_46) @069be7e0
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_46/219 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_46/219 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_46/219 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_46/220 (read)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_46/220 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_46/220 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_ADC_EXCLUSIVE_AREA_46/84 (msr_ADC_EXCLUSIVE_AREA_46) @069be750
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_46/219 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_46/219 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_46/220 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_45/83 (reentry_guard_ADC_EXCLUSIVE_AREA_45) @069be6c0
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_45/217 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_45/217 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_45/217 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_45/218 (read)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_45/218 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_45/218 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_ADC_EXCLUSIVE_AREA_45/82 (msr_ADC_EXCLUSIVE_AREA_45) @069be630
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_45/217 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_45/217 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_45/218 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_44/81 (reentry_guard_ADC_EXCLUSIVE_AREA_44) @069be5a0
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_44/215 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_44/215 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_44/215 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_44/216 (read)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_44/216 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_44/216 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_ADC_EXCLUSIVE_AREA_44/80 (msr_ADC_EXCLUSIVE_AREA_44) @069be510
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_44/215 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_44/215 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_44/216 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_43/79 (reentry_guard_ADC_EXCLUSIVE_AREA_43) @069be480
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_43/213 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_43/213 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_43/213 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_43/214 (read)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_43/214 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_43/214 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_ADC_EXCLUSIVE_AREA_43/78 (msr_ADC_EXCLUSIVE_AREA_43) @069be3f0
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_43/213 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_43/213 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_43/214 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_42/77 (reentry_guard_ADC_EXCLUSIVE_AREA_42) @069be360
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_42/211 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_42/211 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_42/211 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_42/212 (read)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_42/212 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_42/212 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_ADC_EXCLUSIVE_AREA_42/76 (msr_ADC_EXCLUSIVE_AREA_42) @069be2d0
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_42/211 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_42/211 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_42/212 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_41/75 (reentry_guard_ADC_EXCLUSIVE_AREA_41) @069be240
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_41/209 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_41/209 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_41/209 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_41/210 (read)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_41/210 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_41/210 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_ADC_EXCLUSIVE_AREA_41/74 (msr_ADC_EXCLUSIVE_AREA_41) @069be1b0
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_41/209 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_41/209 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_41/210 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_40/73 (reentry_guard_ADC_EXCLUSIVE_AREA_40) @069be120
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_40/207 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_40/207 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_40/207 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_40/208 (read)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_40/208 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_40/208 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_ADC_EXCLUSIVE_AREA_40/72 (msr_ADC_EXCLUSIVE_AREA_40) @069be090
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_40/207 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_40/207 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_40/208 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_39/71 (reentry_guard_ADC_EXCLUSIVE_AREA_39) @069be000
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_39/205 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_39/205 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_39/205 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_39/206 (read)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_39/206 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_39/206 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_ADC_EXCLUSIVE_AREA_39/70 (msr_ADC_EXCLUSIVE_AREA_39) @069bbf30
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_39/205 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_39/205 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_39/206 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_38/69 (reentry_guard_ADC_EXCLUSIVE_AREA_38) @069bbea0
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_38/203 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_38/203 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_38/203 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_38/204 (read)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_38/204 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_38/204 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_ADC_EXCLUSIVE_AREA_38/68 (msr_ADC_EXCLUSIVE_AREA_38) @069bbe10
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_38/203 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_38/203 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_38/204 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_37/67 (reentry_guard_ADC_EXCLUSIVE_AREA_37) @069bbd80
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_37/201 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_37/201 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_37/201 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_37/202 (read)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_37/202 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_37/202 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_ADC_EXCLUSIVE_AREA_37/66 (msr_ADC_EXCLUSIVE_AREA_37) @069bbcf0
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_37/201 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_37/201 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_37/202 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_36/65 (reentry_guard_ADC_EXCLUSIVE_AREA_36) @069bbc60
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_36/199 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_36/199 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_36/199 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_36/200 (read)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_36/200 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_36/200 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_ADC_EXCLUSIVE_AREA_36/64 (msr_ADC_EXCLUSIVE_AREA_36) @069bbbd0
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_36/199 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_36/199 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_36/200 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_35/63 (reentry_guard_ADC_EXCLUSIVE_AREA_35) @069bbb40
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_35/197 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_35/197 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_35/197 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_35/198 (read)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_35/198 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_35/198 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_ADC_EXCLUSIVE_AREA_35/62 (msr_ADC_EXCLUSIVE_AREA_35) @069bbab0
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_35/197 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_35/197 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_35/198 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_34/61 (reentry_guard_ADC_EXCLUSIVE_AREA_34) @069bba20
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_34/195 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_34/195 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_34/195 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_34/196 (read)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_34/196 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_34/196 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_ADC_EXCLUSIVE_AREA_34/60 (msr_ADC_EXCLUSIVE_AREA_34) @069bb990
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_34/195 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_34/195 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_34/196 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_33/59 (reentry_guard_ADC_EXCLUSIVE_AREA_33) @069bb900
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_33/193 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_33/193 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_33/193 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_33/194 (read)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_33/194 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_33/194 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_ADC_EXCLUSIVE_AREA_33/58 (msr_ADC_EXCLUSIVE_AREA_33) @069bb870
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_33/193 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_33/193 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_33/194 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_32/57 (reentry_guard_ADC_EXCLUSIVE_AREA_32) @069bb7e0
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_32/191 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_32/191 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_32/191 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_32/192 (read)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_32/192 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_32/192 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_ADC_EXCLUSIVE_AREA_32/56 (msr_ADC_EXCLUSIVE_AREA_32) @069bb750
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_32/191 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_32/191 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_32/192 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_31/55 (reentry_guard_ADC_EXCLUSIVE_AREA_31) @069bb6c0
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_31/189 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_31/189 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_31/189 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_31/190 (read)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_31/190 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_31/190 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_ADC_EXCLUSIVE_AREA_31/54 (msr_ADC_EXCLUSIVE_AREA_31) @069bb630
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_31/189 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_31/189 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_31/190 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_30/53 (reentry_guard_ADC_EXCLUSIVE_AREA_30) @069bb5a0
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_30/187 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_30/187 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_30/187 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_30/188 (read)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_30/188 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_30/188 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_ADC_EXCLUSIVE_AREA_30/52 (msr_ADC_EXCLUSIVE_AREA_30) @069bb510
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_30/187 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_30/187 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_30/188 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_29/51 (reentry_guard_ADC_EXCLUSIVE_AREA_29) @069bb480
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_29/185 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_29/185 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_29/185 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_29/186 (read)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_29/186 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_29/186 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_ADC_EXCLUSIVE_AREA_29/50 (msr_ADC_EXCLUSIVE_AREA_29) @069bb3f0
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_29/185 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_29/185 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_29/186 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_28/49 (reentry_guard_ADC_EXCLUSIVE_AREA_28) @069bb360
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_28/183 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_28/183 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_28/183 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_28/184 (read)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_28/184 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_28/184 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_ADC_EXCLUSIVE_AREA_28/48 (msr_ADC_EXCLUSIVE_AREA_28) @069bb2d0
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_28/183 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_28/183 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_28/184 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_27/47 (reentry_guard_ADC_EXCLUSIVE_AREA_27) @069bb240
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_27/181 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_27/181 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_27/181 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_27/182 (read)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_27/182 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_27/182 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_ADC_EXCLUSIVE_AREA_27/46 (msr_ADC_EXCLUSIVE_AREA_27) @069bb1b0
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_27/181 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_27/181 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_27/182 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_26/45 (reentry_guard_ADC_EXCLUSIVE_AREA_26) @069bb120
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_26/179 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_26/179 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_26/179 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_26/180 (read)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_26/180 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_26/180 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_ADC_EXCLUSIVE_AREA_26/44 (msr_ADC_EXCLUSIVE_AREA_26) @069bb090
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_26/179 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_26/179 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_26/180 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_25/43 (reentry_guard_ADC_EXCLUSIVE_AREA_25) @069bb000
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_25/177 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_25/177 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_25/177 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_25/178 (read)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_25/178 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_25/178 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_ADC_EXCLUSIVE_AREA_25/42 (msr_ADC_EXCLUSIVE_AREA_25) @069b6f30
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_25/177 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_25/177 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_25/178 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_24/41 (reentry_guard_ADC_EXCLUSIVE_AREA_24) @069b6ea0
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_24/175 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_24/175 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_24/175 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_24/176 (read)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_24/176 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_24/176 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_ADC_EXCLUSIVE_AREA_24/40 (msr_ADC_EXCLUSIVE_AREA_24) @069b6e10
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_24/175 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_24/175 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_24/176 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_23/39 (reentry_guard_ADC_EXCLUSIVE_AREA_23) @069b6d80
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_23/173 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_23/173 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_23/173 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_23/174 (read)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_23/174 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_23/174 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_ADC_EXCLUSIVE_AREA_23/38 (msr_ADC_EXCLUSIVE_AREA_23) @069b6cf0
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_23/173 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_23/173 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_23/174 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_22/37 (reentry_guard_ADC_EXCLUSIVE_AREA_22) @069b6c60
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_22/171 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_22/171 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_22/171 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_22/172 (read)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_22/172 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_22/172 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_ADC_EXCLUSIVE_AREA_22/36 (msr_ADC_EXCLUSIVE_AREA_22) @069b6bd0
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_22/171 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_22/171 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_22/172 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_21/35 (reentry_guard_ADC_EXCLUSIVE_AREA_21) @069b6b40
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_21/169 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_21/169 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_21/169 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_21/170 (read)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_21/170 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_21/170 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_ADC_EXCLUSIVE_AREA_21/34 (msr_ADC_EXCLUSIVE_AREA_21) @069b6ab0
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_21/169 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_21/169 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_21/170 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_20/33 (reentry_guard_ADC_EXCLUSIVE_AREA_20) @069b6a20
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_20/167 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_20/167 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_20/167 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_20/168 (read)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_20/168 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_20/168 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_ADC_EXCLUSIVE_AREA_20/32 (msr_ADC_EXCLUSIVE_AREA_20) @069b6990
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_20/167 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_20/167 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_20/168 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_19/31 (reentry_guard_ADC_EXCLUSIVE_AREA_19) @069b6900
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_19/165 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_19/165 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_19/165 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_19/166 (read)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_19/166 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_19/166 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_ADC_EXCLUSIVE_AREA_19/30 (msr_ADC_EXCLUSIVE_AREA_19) @069b6870
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_19/165 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_19/165 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_19/166 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_18/29 (reentry_guard_ADC_EXCLUSIVE_AREA_18) @069b67e0
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_18/163 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_18/163 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_18/163 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_18/164 (read)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_18/164 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_18/164 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_ADC_EXCLUSIVE_AREA_18/28 (msr_ADC_EXCLUSIVE_AREA_18) @069b6750
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_18/163 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_18/163 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_18/164 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_17/27 (reentry_guard_ADC_EXCLUSIVE_AREA_17) @069b66c0
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_17/161 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_17/161 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_17/161 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_17/162 (read)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_17/162 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_17/162 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_ADC_EXCLUSIVE_AREA_17/26 (msr_ADC_EXCLUSIVE_AREA_17) @069b6630
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_17/161 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_17/161 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_17/162 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_16/25 (reentry_guard_ADC_EXCLUSIVE_AREA_16) @069b65a0
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_16/159 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_16/159 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_16/159 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_16/160 (read)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_16/160 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_16/160 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_ADC_EXCLUSIVE_AREA_16/24 (msr_ADC_EXCLUSIVE_AREA_16) @069b6510
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_16/159 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_16/159 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_16/160 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_15/23 (reentry_guard_ADC_EXCLUSIVE_AREA_15) @069b6480
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_15/157 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_15/157 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_15/157 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_15/158 (read)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_15/158 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_15/158 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_ADC_EXCLUSIVE_AREA_15/22 (msr_ADC_EXCLUSIVE_AREA_15) @069b63f0
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_15/157 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_15/157 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_15/158 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_14/21 (reentry_guard_ADC_EXCLUSIVE_AREA_14) @069b6360
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_14/155 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_14/155 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_14/155 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_14/156 (read)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_14/156 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_14/156 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_ADC_EXCLUSIVE_AREA_14/20 (msr_ADC_EXCLUSIVE_AREA_14) @069b62d0
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_14/155 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_14/155 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_14/156 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_13/19 (reentry_guard_ADC_EXCLUSIVE_AREA_13) @069b6240
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_13/153 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_13/153 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_13/153 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_13/154 (read)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_13/154 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_13/154 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_ADC_EXCLUSIVE_AREA_13/18 (msr_ADC_EXCLUSIVE_AREA_13) @069b61b0
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_13/153 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_13/153 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_13/154 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_12/17 (reentry_guard_ADC_EXCLUSIVE_AREA_12) @069b6120
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_12/151 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_12/151 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_12/151 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_12/152 (read)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_12/152 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_12/152 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_ADC_EXCLUSIVE_AREA_12/16 (msr_ADC_EXCLUSIVE_AREA_12) @069b6090
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_12/151 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_12/151 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_12/152 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_11/15 (reentry_guard_ADC_EXCLUSIVE_AREA_11) @069b6000
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_11/149 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_11/149 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_11/149 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_11/150 (read)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_11/150 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_11/150 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_ADC_EXCLUSIVE_AREA_11/14 (msr_ADC_EXCLUSIVE_AREA_11) @0696ff30
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_11/149 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_11/149 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_11/150 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_10/13 (reentry_guard_ADC_EXCLUSIVE_AREA_10) @0696fea0
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_10/147 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_10/147 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_10/147 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_10/148 (read)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_10/148 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_10/148 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_ADC_EXCLUSIVE_AREA_10/12 (msr_ADC_EXCLUSIVE_AREA_10) @0696fe10
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_10/147 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_10/147 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_10/148 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_05/11 (reentry_guard_ADC_EXCLUSIVE_AREA_05) @0696fd80
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_05/145 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_05/145 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_05/145 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_05/146 (read)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_05/146 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_05/146 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_ADC_EXCLUSIVE_AREA_05/10 (msr_ADC_EXCLUSIVE_AREA_05) @0696fcf0
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_05/145 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_05/145 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_05/146 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_04/9 (reentry_guard_ADC_EXCLUSIVE_AREA_04) @0696fc60
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_04/143 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_04/143 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_04/143 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_04/144 (read)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_04/144 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_04/144 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_ADC_EXCLUSIVE_AREA_04/8 (msr_ADC_EXCLUSIVE_AREA_04) @0696fbd0
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_04/143 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_04/143 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_04/144 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_03/7 (reentry_guard_ADC_EXCLUSIVE_AREA_03) @0696fb40
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_03/141 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_03/141 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_03/141 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_03/142 (read)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_03/142 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_03/142 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_ADC_EXCLUSIVE_AREA_03/6 (msr_ADC_EXCLUSIVE_AREA_03) @0696fab0
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_03/141 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_03/141 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_03/142 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_02/5 (reentry_guard_ADC_EXCLUSIVE_AREA_02) @0696fa20
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_02/139 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_02/139 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_02/139 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_02/140 (read)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_02/140 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_02/140 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_ADC_EXCLUSIVE_AREA_02/4 (msr_ADC_EXCLUSIVE_AREA_02) @0696f990
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_02/139 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_02/139 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_02/140 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_01/3 (reentry_guard_ADC_EXCLUSIVE_AREA_01) @0696f900
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_01/137 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_01/137 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_01/137 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_01/138 (read)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_01/138 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_01/138 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_ADC_EXCLUSIVE_AREA_01/2 (msr_ADC_EXCLUSIVE_AREA_01) @0696f870
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_01/137 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_01/137 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_01/138 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_00/1 (reentry_guard_ADC_EXCLUSIVE_AREA_00) @0696f7e0
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_00/135 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_00/135 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_00/135 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_00/136 (read)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_00/136 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_00/136 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_ADC_EXCLUSIVE_AREA_00/0 (msr_ADC_EXCLUSIVE_AREA_00) @0696f750
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_00/135 (read)SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_00/135 (write)SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_00/136 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_73 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_73[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_73[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_ADC_EXCLUSIVE_AREA_73[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_73[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_73 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_73[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Adc_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_ADC_EXCLUSIVE_AREA_73[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_ADC_EXCLUSIVE_AREA_73[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_73[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_73[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_72 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_72[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_72[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_ADC_EXCLUSIVE_AREA_72[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_72[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_72 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_72[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Adc_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_ADC_EXCLUSIVE_AREA_72[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_ADC_EXCLUSIVE_AREA_72[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_72[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_72[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_71 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_71[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_71[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_ADC_EXCLUSIVE_AREA_71[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_71[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_71 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_71[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Adc_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_ADC_EXCLUSIVE_AREA_71[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_ADC_EXCLUSIVE_AREA_71[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_71[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_71[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_70 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_70[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_70[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_ADC_EXCLUSIVE_AREA_70[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_70[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_70 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_70[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Adc_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_ADC_EXCLUSIVE_AREA_70[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_ADC_EXCLUSIVE_AREA_70[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_70[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_70[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_69 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_69[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_69[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_ADC_EXCLUSIVE_AREA_69[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_69[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_69 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_69[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Adc_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_ADC_EXCLUSIVE_AREA_69[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_ADC_EXCLUSIVE_AREA_69[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_69[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_69[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_68 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_68[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_68[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_ADC_EXCLUSIVE_AREA_68[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_68[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_68 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_68[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Adc_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_ADC_EXCLUSIVE_AREA_68[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_ADC_EXCLUSIVE_AREA_68[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_68[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_68[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_67 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_67[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_67[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_ADC_EXCLUSIVE_AREA_67[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_67[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_67 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_67[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Adc_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_ADC_EXCLUSIVE_AREA_67[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_ADC_EXCLUSIVE_AREA_67[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_67[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_67[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_66 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_66[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_66[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_ADC_EXCLUSIVE_AREA_66[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_66[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_66 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_66[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Adc_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_ADC_EXCLUSIVE_AREA_66[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_ADC_EXCLUSIVE_AREA_66[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_66[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_66[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_65 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_65[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_65[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_ADC_EXCLUSIVE_AREA_65[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_65[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_65 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_65[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Adc_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_ADC_EXCLUSIVE_AREA_65[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_ADC_EXCLUSIVE_AREA_65[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_65[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_65[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_64 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_64[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_64[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_ADC_EXCLUSIVE_AREA_64[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_64[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_64 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_64[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Adc_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_ADC_EXCLUSIVE_AREA_64[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_ADC_EXCLUSIVE_AREA_64[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_64[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_64[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_63 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_63[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_63[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_ADC_EXCLUSIVE_AREA_63[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_63[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_63 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_63[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Adc_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_ADC_EXCLUSIVE_AREA_63[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_ADC_EXCLUSIVE_AREA_63[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_63[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_63[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_62 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_62[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_62[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_ADC_EXCLUSIVE_AREA_62[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_62[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_62 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_62[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Adc_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_ADC_EXCLUSIVE_AREA_62[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_ADC_EXCLUSIVE_AREA_62[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_62[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_62[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_61 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_61[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_61[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_ADC_EXCLUSIVE_AREA_61[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_61[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_61 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_61[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Adc_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_ADC_EXCLUSIVE_AREA_61[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_ADC_EXCLUSIVE_AREA_61[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_61[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_61[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_60 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_60[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_60[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_ADC_EXCLUSIVE_AREA_60[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_60[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_60 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_60[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Adc_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_ADC_EXCLUSIVE_AREA_60[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_ADC_EXCLUSIVE_AREA_60[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_60[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_60[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_59 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_59[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_59[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_ADC_EXCLUSIVE_AREA_59[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_59[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_59 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_59[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Adc_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_ADC_EXCLUSIVE_AREA_59[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_ADC_EXCLUSIVE_AREA_59[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_59[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_59[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_58 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_58[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_58[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_ADC_EXCLUSIVE_AREA_58[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_58[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_58 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_58[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Adc_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_ADC_EXCLUSIVE_AREA_58[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_ADC_EXCLUSIVE_AREA_58[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_58[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_58[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_57 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_57[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_57[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_ADC_EXCLUSIVE_AREA_57[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_57[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_57 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_57[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Adc_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_ADC_EXCLUSIVE_AREA_57[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_ADC_EXCLUSIVE_AREA_57[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_57[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_57[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_56 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_56[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_56[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_ADC_EXCLUSIVE_AREA_56[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_56[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_56 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_56[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Adc_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_ADC_EXCLUSIVE_AREA_56[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_ADC_EXCLUSIVE_AREA_56[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_56[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_56[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_55 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_55[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_55[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_ADC_EXCLUSIVE_AREA_55[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_55[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_55 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_55[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Adc_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_ADC_EXCLUSIVE_AREA_55[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_ADC_EXCLUSIVE_AREA_55[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_55[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_55[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_54 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_54[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_54[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_ADC_EXCLUSIVE_AREA_54[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_54[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_54 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_54[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Adc_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_ADC_EXCLUSIVE_AREA_54[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_ADC_EXCLUSIVE_AREA_54[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_54[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_54[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_50 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_50[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_50[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_ADC_EXCLUSIVE_AREA_50[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_50[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_50 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_50[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Adc_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_ADC_EXCLUSIVE_AREA_50[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_ADC_EXCLUSIVE_AREA_50[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_50[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_50[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_49 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_49[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_49[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_ADC_EXCLUSIVE_AREA_49[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_49[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_49 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_49[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Adc_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_ADC_EXCLUSIVE_AREA_49[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_ADC_EXCLUSIVE_AREA_49[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_49[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_49[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_48 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_48[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_48[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_ADC_EXCLUSIVE_AREA_48[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_48[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_48 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_48[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Adc_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_ADC_EXCLUSIVE_AREA_48[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_ADC_EXCLUSIVE_AREA_48[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_48[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_48[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_47 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_47[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_47[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_ADC_EXCLUSIVE_AREA_47[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_47[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_47 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_47[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Adc_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_ADC_EXCLUSIVE_AREA_47[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_ADC_EXCLUSIVE_AREA_47[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_47[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_47[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_46 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_46[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_46[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_ADC_EXCLUSIVE_AREA_46[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_46[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_46 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_46[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Adc_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_ADC_EXCLUSIVE_AREA_46[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_ADC_EXCLUSIVE_AREA_46[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_46[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_46[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_45 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_45[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_45[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_ADC_EXCLUSIVE_AREA_45[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_45[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_45 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_45[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Adc_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_ADC_EXCLUSIVE_AREA_45[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_ADC_EXCLUSIVE_AREA_45[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_45[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_45[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_44 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_44[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_44[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_ADC_EXCLUSIVE_AREA_44[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_44[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_44 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_44[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Adc_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_ADC_EXCLUSIVE_AREA_44[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_ADC_EXCLUSIVE_AREA_44[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_44[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_44[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_43 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_43[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_43[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_ADC_EXCLUSIVE_AREA_43[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_43[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_43 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_43[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Adc_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_ADC_EXCLUSIVE_AREA_43[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_ADC_EXCLUSIVE_AREA_43[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_43[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_43[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_42 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_42[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_42[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_ADC_EXCLUSIVE_AREA_42[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_42[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_42 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_42[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Adc_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_ADC_EXCLUSIVE_AREA_42[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_ADC_EXCLUSIVE_AREA_42[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_42[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_42[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_41 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_41[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_41[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_ADC_EXCLUSIVE_AREA_41[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_41[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_41 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_41[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Adc_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_ADC_EXCLUSIVE_AREA_41[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_ADC_EXCLUSIVE_AREA_41[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_41[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_41[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_40 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_40[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_40[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_ADC_EXCLUSIVE_AREA_40[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_40[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_40 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_40[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Adc_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_ADC_EXCLUSIVE_AREA_40[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_ADC_EXCLUSIVE_AREA_40[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_40[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_40[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_39 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_39[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_39[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_ADC_EXCLUSIVE_AREA_39[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_39[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_39 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_39[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Adc_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_ADC_EXCLUSIVE_AREA_39[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_ADC_EXCLUSIVE_AREA_39[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_39[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_39[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_38 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_38[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_38[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_ADC_EXCLUSIVE_AREA_38[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_38[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_38 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_38[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Adc_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_ADC_EXCLUSIVE_AREA_38[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_ADC_EXCLUSIVE_AREA_38[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_38[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_38[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_37 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_37[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_37[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_ADC_EXCLUSIVE_AREA_37[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_37[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_37 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_37[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Adc_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_ADC_EXCLUSIVE_AREA_37[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_ADC_EXCLUSIVE_AREA_37[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_37[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_37[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_36 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_36[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_36[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_ADC_EXCLUSIVE_AREA_36[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_36[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_36 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_36[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Adc_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_ADC_EXCLUSIVE_AREA_36[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_ADC_EXCLUSIVE_AREA_36[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_36[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_36[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_35 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_35[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_35[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_ADC_EXCLUSIVE_AREA_35[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_35[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_35 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_35[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Adc_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_ADC_EXCLUSIVE_AREA_35[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_ADC_EXCLUSIVE_AREA_35[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_35[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_35[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_34 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_34[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_34[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_ADC_EXCLUSIVE_AREA_34[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_34[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_34 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_34[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Adc_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_ADC_EXCLUSIVE_AREA_34[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_ADC_EXCLUSIVE_AREA_34[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_34[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_34[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_33 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_33[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_33[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_ADC_EXCLUSIVE_AREA_33[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_33[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_33 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_33[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Adc_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_ADC_EXCLUSIVE_AREA_33[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_ADC_EXCLUSIVE_AREA_33[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_33[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_33[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_32 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_32[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_32[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_ADC_EXCLUSIVE_AREA_32[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_32[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_32 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_32[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Adc_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_ADC_EXCLUSIVE_AREA_32[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_ADC_EXCLUSIVE_AREA_32[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_32[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_32[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_31 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_31[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_31[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_ADC_EXCLUSIVE_AREA_31[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_31[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_31 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_31[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Adc_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_ADC_EXCLUSIVE_AREA_31[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_ADC_EXCLUSIVE_AREA_31[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_31[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_31[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_30 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_30[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_30[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_ADC_EXCLUSIVE_AREA_30[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_30[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_30 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_30[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Adc_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_ADC_EXCLUSIVE_AREA_30[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_ADC_EXCLUSIVE_AREA_30[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_30[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_30[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_29 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_29[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_29[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_ADC_EXCLUSIVE_AREA_29[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_29[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_29 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_29[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Adc_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_ADC_EXCLUSIVE_AREA_29[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_ADC_EXCLUSIVE_AREA_29[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_29[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_29[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_28 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_28[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_28[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_ADC_EXCLUSIVE_AREA_28[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_28[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_28 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_28[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Adc_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_ADC_EXCLUSIVE_AREA_28[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_ADC_EXCLUSIVE_AREA_28[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_28[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_28[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_27 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_27[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_27[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_ADC_EXCLUSIVE_AREA_27[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_27[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_27 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_27[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Adc_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_ADC_EXCLUSIVE_AREA_27[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_ADC_EXCLUSIVE_AREA_27[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_27[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_27[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_26 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_26[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_26[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_ADC_EXCLUSIVE_AREA_26[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_26[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_26 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_26[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Adc_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_ADC_EXCLUSIVE_AREA_26[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_ADC_EXCLUSIVE_AREA_26[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_26[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_26[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_25 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_25[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_25[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_ADC_EXCLUSIVE_AREA_25[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_25[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_25 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_25[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Adc_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_ADC_EXCLUSIVE_AREA_25[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_ADC_EXCLUSIVE_AREA_25[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_25[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_25[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_24 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_24[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_24[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_ADC_EXCLUSIVE_AREA_24[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_24[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_24 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_24[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Adc_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_ADC_EXCLUSIVE_AREA_24[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_ADC_EXCLUSIVE_AREA_24[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_24[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_24[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_23 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_23[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_23[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_ADC_EXCLUSIVE_AREA_23[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_23[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_23 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_23[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Adc_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_ADC_EXCLUSIVE_AREA_23[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_ADC_EXCLUSIVE_AREA_23[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_23[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_23[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_22 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_22[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_22[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_ADC_EXCLUSIVE_AREA_22[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_22[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_22 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_22[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Adc_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_ADC_EXCLUSIVE_AREA_22[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_ADC_EXCLUSIVE_AREA_22[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_22[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_22[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_21 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_21[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_21[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_ADC_EXCLUSIVE_AREA_21[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_21[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_21 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_21[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Adc_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_ADC_EXCLUSIVE_AREA_21[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_ADC_EXCLUSIVE_AREA_21[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_21[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_21[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_20 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_20[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_20[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_ADC_EXCLUSIVE_AREA_20[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_20[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_20 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_20[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Adc_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_ADC_EXCLUSIVE_AREA_20[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_ADC_EXCLUSIVE_AREA_20[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_20[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_20[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_19 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_19[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_19[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_ADC_EXCLUSIVE_AREA_19[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_19[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_19 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_19[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Adc_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_ADC_EXCLUSIVE_AREA_19[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_ADC_EXCLUSIVE_AREA_19[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_19[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_19[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_18 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_18[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_18[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_ADC_EXCLUSIVE_AREA_18[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_18[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_18 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_18[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Adc_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_ADC_EXCLUSIVE_AREA_18[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_ADC_EXCLUSIVE_AREA_18[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_18[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_18[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_17 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_17[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_17[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_ADC_EXCLUSIVE_AREA_17[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_17[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_17 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_17[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Adc_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_ADC_EXCLUSIVE_AREA_17[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_ADC_EXCLUSIVE_AREA_17[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_17[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_17[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_16 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_16[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_16[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_ADC_EXCLUSIVE_AREA_16[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_16[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_16 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_16[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Adc_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_ADC_EXCLUSIVE_AREA_16[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_ADC_EXCLUSIVE_AREA_16[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_16[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_16[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_15 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_15[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_15[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_ADC_EXCLUSIVE_AREA_15[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_15[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_15 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_15[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Adc_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_ADC_EXCLUSIVE_AREA_15[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_ADC_EXCLUSIVE_AREA_15[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_15[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_15[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_14 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_14[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_14[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_ADC_EXCLUSIVE_AREA_14[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_14[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_14 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_14[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Adc_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_ADC_EXCLUSIVE_AREA_14[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_ADC_EXCLUSIVE_AREA_14[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_14[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_14[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_13 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_13[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_13[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_ADC_EXCLUSIVE_AREA_13[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_13[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_13 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_13[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Adc_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_ADC_EXCLUSIVE_AREA_13[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_ADC_EXCLUSIVE_AREA_13[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_13[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_13[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_12 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_12[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_12[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_ADC_EXCLUSIVE_AREA_12[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_12[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_12 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_12[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Adc_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_ADC_EXCLUSIVE_AREA_12[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_ADC_EXCLUSIVE_AREA_12[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_12[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_12[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_11 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_11[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_11[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_ADC_EXCLUSIVE_AREA_11[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_11[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_11 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_11[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Adc_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_ADC_EXCLUSIVE_AREA_11[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_ADC_EXCLUSIVE_AREA_11[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_11[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_11[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_10 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_10[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_10[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_ADC_EXCLUSIVE_AREA_10[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_10[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_10 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_10[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Adc_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_ADC_EXCLUSIVE_AREA_10[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_ADC_EXCLUSIVE_AREA_10[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_10[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_10[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_05 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_05[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_05[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_ADC_EXCLUSIVE_AREA_05[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_05[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_05 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_05[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Adc_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_ADC_EXCLUSIVE_AREA_05[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_ADC_EXCLUSIVE_AREA_05[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_05[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_05[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_04 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_04[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_04[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_ADC_EXCLUSIVE_AREA_04[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_04[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_04 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_04[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Adc_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_ADC_EXCLUSIVE_AREA_04[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_ADC_EXCLUSIVE_AREA_04[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_04[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_04[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_03 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_03[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_03[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_ADC_EXCLUSIVE_AREA_03[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_03[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_03 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_03[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Adc_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_ADC_EXCLUSIVE_AREA_03[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_ADC_EXCLUSIVE_AREA_03[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_03[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_03[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_02 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_02[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_02[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_ADC_EXCLUSIVE_AREA_02[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_02[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_02 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_02[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Adc_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_ADC_EXCLUSIVE_AREA_02[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_ADC_EXCLUSIVE_AREA_02[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_02[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_02[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_01 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_01[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_01[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_ADC_EXCLUSIVE_AREA_01[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_01[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_01 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_01[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Adc_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_ADC_EXCLUSIVE_AREA_01[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_ADC_EXCLUSIVE_AREA_01[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_01[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_01[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_00 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_00[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_00[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_ADC_EXCLUSIVE_AREA_00[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_00[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_00 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_00[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Adc_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_ADC_EXCLUSIVE_AREA_00[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_ADC_EXCLUSIVE_AREA_00[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_ADC_EXCLUSIVE_AREA_00[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_ADC_EXCLUSIVE_AREA_00[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Adc_schm_read_msr ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_1);
|
|
# DEBUG reg_tmp => reg_tmp_1
|
|
# DEBUG BEGIN_STMT
|
|
return reg_tmp_1;
|
|
|
|
}
|
|
|
|
|