mirror of
https://github.com/Dev-KATECH/ADM.git
synced 2026-05-17 01:43:59 +09:00
1217 lines
32 KiB
Plaintext
1217 lines
32 KiB
Plaintext
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Marking local functions: Flexio_Pwm_Ip_PinOverrideNeeded Flexio_Pwm_Ip_SetLowerValue Flexio_Pwm_Ip_SetUpperValue Flexio_Pwm_Ip_SetTimerPrescaler Flexio_Pwm_Ip_SetTimerInitMode Flexio_Pwm_Ip_SetTimerMode Flexio_Pwm_Ip_SetTimerPinPolarity Flexio_Pwm_Ip_SetTimerPin Flexio_Pwm_Ip_SetTimerPinOutput Flexio_Pwm_Ip_GetPinOverride Flexio_Pwm_Ip_ConfigurePinOverride Flexio_Pwm_Ip_SetPinLevel Flexio_Pwm_Ip_ConfigurePinFallingEdge Flexio_Pwm_Ip_ConfigurePinRisingEdge Flexio_Pwm_Ip_ConfigurePinIrq Flexio_Pwm_Ip_ClearPinFlag Flexio_Pwm_Ip_GetPinState
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Marking externally visible functions: Flexio_Pwm_Ip_UpdateInterruptMode Flexio_Pwm_Ip_GetOutputState Flexio_Pwm_Ip_UpdatePeriodDuty Flexio_Pwm_Ip_ForceOuputLevel Flexio_Pwm_Ip_UpdateClockPrescaler Flexio_Pwm_Ip_DeInitChannel Flexio_Pwm_Ip_InitChannel
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Marking externally visible variables: pinIrqMask timerIrqMask Flexio_Pwm_Ip_aState Flexio_Pwm_Ip_aBasePtr
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Reclaiming functions:
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Reclaiming variables:
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Clearing address taken flags:
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Symbol table:
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Flexio_Mcl_Ip_SetTimerInterrupt/34 (Flexio_Mcl_Ip_SetTimerInterrupt) @05d37460
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: Flexio_Pwm_Ip_UpdateInterruptMode/32 Flexio_Pwm_Ip_UpdateInterruptMode/32
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Calls:
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Flexio_Mcl_Ip_ClearTimerStatus/33 (Flexio_Mcl_Ip_ClearTimerStatus) @05e4fe00
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Type: function
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Visibility: external public
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References:
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Referring:
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Availability: not_available
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Function flags: optimize_size
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Called by: Flexio_Pwm_Ip_UpdateInterruptMode/32 Flexio_Pwm_Ip_ForceOuputLevel/29
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Calls:
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Flexio_Pwm_Ip_UpdateInterruptMode/32 (Flexio_Pwm_Ip_UpdateInterruptMode) @05ce29a0
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Type: function definition analyzed
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Visibility: externally_visible public
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References: Flexio_Pwm_Ip_aState/22 (read)timerIrqMask/23 (read)timerIrqMask/23 (write)pinIrqMask/24 (read)pinIrqMask/24 (write)pinIrqMask/24 (read)pinIrqMask/24 (write)pinIrqMask/24 (read)pinIrqMask/24 (write)timerIrqMask/23 (read)timerIrqMask/23 (write)
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Referring:
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Availability: available
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Function flags: body optimize_size
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Called by: Flexio_Pwm_Ip_DeInitChannel/27 Flexio_Pwm_Ip_InitChannel/26
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Calls: Flexio_Mcl_Ip_SetTimerInterrupt/34 Flexio_Pwm_Ip_ConfigurePinIrq/5 Flexio_Pwm_Ip_ConfigurePinFallingEdge/7 Flexio_Pwm_Ip_ConfigurePinIrq/5 Flexio_Pwm_Ip_ConfigurePinRisingEdge/6 Flexio_Pwm_Ip_ConfigurePinIrq/5 Flexio_Pwm_Ip_ConfigurePinFallingEdge/7 Flexio_Pwm_Ip_ConfigurePinRisingEdge/6 Flexio_Mcl_Ip_SetTimerInterrupt/34 Flexio_Pwm_Ip_ClearPinFlag/4 Flexio_Mcl_Ip_ClearTimerStatus/33
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Flexio_Pwm_Ip_GetOutputState/31 (Flexio_Pwm_Ip_GetOutputState) @05ce2460
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Type: function definition analyzed
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Visibility: externally_visible public
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References: Flexio_Pwm_Ip_aState/22 (read)
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Referring:
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Availability: available
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Function flags: body optimize_size
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Called by:
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Calls: Flexio_Pwm_Ip_GetPinState/1
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Flexio_Pwm_Ip_UpdatePeriodDuty/30 (Flexio_Pwm_Ip_UpdatePeriodDuty) @05ce2e00
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Type: function definition analyzed
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Visibility: externally_visible public
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References: Flexio_Pwm_Ip_aState/22 (read)
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Referring:
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Availability: available
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Function flags: body optimize_size
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Called by:
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Calls: Flexio_Pwm_Ip_SetUpperValue/17 Flexio_Pwm_Ip_SetLowerValue/18 Flexio_Pwm_Ip_PinOverrideNeeded/25 Flexio_Pwm_Ip_ConfigurePinOverride/9 Flexio_Pwm_Ip_SetTimerMode/14 Flexio_Pwm_Ip_SetTimerInitMode/15 Flexio_Pwm_Ip_SetTimerMode/14 Flexio_Pwm_Ip_SetTimerInitMode/15 Flexio_Pwm_Ip_GetPinOverride/10
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Flexio_Pwm_Ip_ForceOuputLevel/29 (Flexio_Pwm_Ip_ForceOuputLevel) @05ce2b60
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Type: function definition analyzed
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Visibility: externally_visible public
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References: Flexio_Pwm_Ip_aState/22 (read)
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Referring:
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Availability: available
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Function flags: body optimize_size
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Called by: Flexio_Pwm_Ip_PinOverrideNeeded/25 Flexio_Pwm_Ip_PinOverrideNeeded/25 Flexio_Pwm_Ip_PinOverrideNeeded/25 Flexio_Pwm_Ip_PinOverrideNeeded/25
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Calls: Flexio_Pwm_Ip_SetTimerMode/14 Flexio_Pwm_Ip_ClearPinFlag/4 Flexio_Mcl_Ip_ClearTimerStatus/33 Flexio_Pwm_Ip_ConfigurePinOverride/9 Flexio_Pwm_Ip_SetPinLevel/8
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Flexio_Pwm_Ip_UpdateClockPrescaler/28 (Flexio_Pwm_Ip_UpdateClockPrescaler) @05ce28c0
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Type: function definition analyzed
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Visibility: externally_visible public
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References: Flexio_Pwm_Ip_aState/22 (read)
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Referring:
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Availability: available
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Function flags: body optimize_size
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Called by:
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Calls: Flexio_Pwm_Ip_SetTimerPrescaler/16
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Flexio_Pwm_Ip_DeInitChannel/27 (Flexio_Pwm_Ip_DeInitChannel) @05ce2620
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Type: function definition analyzed
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Visibility: externally_visible public
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References: Flexio_Pwm_Ip_aState/22 (read)Flexio_Pwm_Ip_aState/22 (write)
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Referring:
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Availability: available
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Function flags: body optimize_size
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Called by:
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Calls: Flexio_Pwm_Ip_SetPinLevel/8 Flexio_Pwm_Ip_ConfigurePinOverride/9 Flexio_Pwm_Ip_SetLowerValue/18 Flexio_Pwm_Ip_SetUpperValue/17 Flexio_Pwm_Ip_SetTimerPrescaler/16 Flexio_Pwm_Ip_SetTimerInitMode/15 Flexio_Pwm_Ip_SetTimerPinOutput/11 Flexio_Pwm_Ip_SetTimerPin/12 Flexio_Pwm_Ip_SetTimerPinPolarity/13 Flexio_Pwm_Ip_UpdateInterruptMode/32 Flexio_Pwm_Ip_SetTimerMode/14
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Flexio_Pwm_Ip_InitChannel/26 (Flexio_Pwm_Ip_InitChannel) @05ce2380
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Type: function definition analyzed
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Visibility: externally_visible public
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References: Flexio_Pwm_Ip_aState/22 (write)
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Referring:
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Availability: available
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Function flags: body optimize_size
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Called by:
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Calls: Flexio_Pwm_Ip_SetTimerMode/14 Flexio_Pwm_Ip_SetTimerMode/14 Flexio_Pwm_Ip_SetUpperValue/17 Flexio_Pwm_Ip_SetLowerValue/18 Flexio_Pwm_Ip_PinOverrideNeeded/25 Flexio_Pwm_Ip_UpdateInterruptMode/32 Flexio_Pwm_Ip_SetTimerPinPolarity/13 Flexio_Pwm_Ip_SetTimerPin/12 Flexio_Pwm_Ip_SetTimerPinOutput/11 Flexio_Pwm_Ip_SetTimerPrescaler/16 Flexio_Pwm_Ip_SetTimerInitMode/15 Flexio_Pwm_Ip_SetTimerInitMode/15 Flexio_Pwm_Ip_SetTimerMode/14
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Flexio_Pwm_Ip_PinOverrideNeeded/25 (Flexio_Pwm_Ip_PinOverrideNeeded) @05ce20e0
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Type: function definition analyzed
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Visibility: prevailing_def_ironly
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References: Flexio_Pwm_Ip_aState/22 (read)Flexio_Pwm_Ip_aState/22 (read)
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Referring:
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Availability: local
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Function flags: body local optimize_size
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Called by: Flexio_Pwm_Ip_UpdatePeriodDuty/30 Flexio_Pwm_Ip_InitChannel/26
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Calls: Flexio_Pwm_Ip_ForceOuputLevel/29 Flexio_Pwm_Ip_ForceOuputLevel/29 Flexio_Pwm_Ip_ForceOuputLevel/29 Flexio_Pwm_Ip_ForceOuputLevel/29
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pinIrqMask/24 (pinIrqMask) @05cdc990
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Type: variable definition analyzed
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Visibility: force_output externally_visible public
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References:
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Referring: Flexio_Pwm_Ip_UpdateInterruptMode/32 (read)Flexio_Pwm_Ip_UpdateInterruptMode/32 (write)Flexio_Pwm_Ip_UpdateInterruptMode/32 (read)Flexio_Pwm_Ip_UpdateInterruptMode/32 (write)Flexio_Pwm_Ip_UpdateInterruptMode/32 (read)Flexio_Pwm_Ip_UpdateInterruptMode/32 (write)
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Availability: available
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Varpool flags: initialized
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timerIrqMask/23 (timerIrqMask) @05cdc900
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Type: variable definition analyzed
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Visibility: force_output externally_visible public
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References:
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Referring: Flexio_Pwm_Ip_UpdateInterruptMode/32 (read)Flexio_Pwm_Ip_UpdateInterruptMode/32 (write)Flexio_Pwm_Ip_UpdateInterruptMode/32 (read)Flexio_Pwm_Ip_UpdateInterruptMode/32 (write)
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Availability: available
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Varpool flags: initialized
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Flexio_Pwm_Ip_aState/22 (Flexio_Pwm_Ip_aState) @05cdc870
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Type: variable definition analyzed
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Visibility: externally_visible public
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References:
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Referring: Flexio_Pwm_Ip_InitChannel/26 (write)Flexio_Pwm_Ip_PinOverrideNeeded/25 (read)Flexio_Pwm_Ip_PinOverrideNeeded/25 (read)Flexio_Pwm_Ip_DeInitChannel/27 (read)Flexio_Pwm_Ip_DeInitChannel/27 (write)Flexio_Pwm_Ip_UpdateClockPrescaler/28 (read)Flexio_Pwm_Ip_ForceOuputLevel/29 (read)Flexio_Pwm_Ip_UpdatePeriodDuty/30 (read)Flexio_Pwm_Ip_GetOutputState/31 (read)Flexio_Pwm_Ip_UpdateInterruptMode/32 (read)
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Availability: available
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Varpool flags: initialized
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Flexio_Pwm_Ip_aBasePtr/21 (Flexio_Pwm_Ip_aBasePtr) @05cdc798
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Type: variable definition analyzed
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Visibility: externally_visible public
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References:
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Referring:
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Availability: available
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Varpool flags: initialized read-only const-value-known
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Flexio_Pwm_Ip_SetLowerValue/18 (Flexio_Pwm_Ip_SetLowerValue) @05cc1620
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Type: function definition analyzed
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Visibility: prevailing_def_ironly
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References:
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Referring:
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Availability: local
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Function flags: body local optimize_size
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Called by: Flexio_Pwm_Ip_UpdatePeriodDuty/30 Flexio_Pwm_Ip_DeInitChannel/27 Flexio_Pwm_Ip_InitChannel/26
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Calls:
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Flexio_Pwm_Ip_SetUpperValue/17 (Flexio_Pwm_Ip_SetUpperValue) @05cc12a0
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Type: function definition analyzed
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Visibility: prevailing_def_ironly
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References:
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Referring:
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Availability: local
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Function flags: body local optimize_size
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Called by: Flexio_Pwm_Ip_UpdatePeriodDuty/30 Flexio_Pwm_Ip_DeInitChannel/27 Flexio_Pwm_Ip_InitChannel/26
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Calls:
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Flexio_Pwm_Ip_SetTimerPrescaler/16 (Flexio_Pwm_Ip_SetTimerPrescaler) @05c8cee0
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Type: function definition analyzed
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Visibility: prevailing_def_ironly
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References:
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Referring:
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Availability: local
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Function flags: body local optimize_size
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Called by: Flexio_Pwm_Ip_UpdateClockPrescaler/28 Flexio_Pwm_Ip_DeInitChannel/27 Flexio_Pwm_Ip_InitChannel/26
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Calls:
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Flexio_Pwm_Ip_SetTimerInitMode/15 (Flexio_Pwm_Ip_SetTimerInitMode) @05c8cb60
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Type: function definition analyzed
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Visibility: prevailing_def_ironly
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References:
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Referring:
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Availability: local
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Function flags: body local optimize_size
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Called by: Flexio_Pwm_Ip_UpdatePeriodDuty/30 Flexio_Pwm_Ip_UpdatePeriodDuty/30 Flexio_Pwm_Ip_DeInitChannel/27 Flexio_Pwm_Ip_InitChannel/26 Flexio_Pwm_Ip_InitChannel/26
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Calls:
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Flexio_Pwm_Ip_SetTimerMode/14 (Flexio_Pwm_Ip_SetTimerMode) @05c8c7e0
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Type: function definition analyzed
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Visibility: prevailing_def_ironly
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References:
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Referring:
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Availability: local
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Function flags: body local optimize_size
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Called by: Flexio_Pwm_Ip_UpdatePeriodDuty/30 Flexio_Pwm_Ip_UpdatePeriodDuty/30 Flexio_Pwm_Ip_ForceOuputLevel/29 Flexio_Pwm_Ip_DeInitChannel/27 Flexio_Pwm_Ip_InitChannel/26 Flexio_Pwm_Ip_InitChannel/26 Flexio_Pwm_Ip_InitChannel/26
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Calls:
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Flexio_Pwm_Ip_SetTimerPinPolarity/13 (Flexio_Pwm_Ip_SetTimerPinPolarity) @05c8c460
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Type: function definition analyzed
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Visibility: prevailing_def_ironly
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References:
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Referring:
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Availability: local
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Function flags: body local optimize_size
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Called by: Flexio_Pwm_Ip_DeInitChannel/27 Flexio_Pwm_Ip_InitChannel/26
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Calls:
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Flexio_Pwm_Ip_SetTimerPin/12 (Flexio_Pwm_Ip_SetTimerPin) @05c8c0e0
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Type: function definition analyzed
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Visibility: prevailing_def_ironly
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References:
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Referring:
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Availability: local
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Function flags: body local optimize_size
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Called by: Flexio_Pwm_Ip_DeInitChannel/27 Flexio_Pwm_Ip_InitChannel/26
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Calls:
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Flexio_Pwm_Ip_SetTimerPinOutput/11 (Flexio_Pwm_Ip_SetTimerPinOutput) @05c87d20
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Type: function definition analyzed
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Visibility: prevailing_def_ironly
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References:
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Referring:
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Availability: local
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Function flags: body local optimize_size
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Called by: Flexio_Pwm_Ip_DeInitChannel/27 Flexio_Pwm_Ip_InitChannel/26
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Calls:
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Flexio_Pwm_Ip_GetPinOverride/10 (Flexio_Pwm_Ip_GetPinOverride) @05c879a0
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Type: function definition analyzed
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Visibility: prevailing_def_ironly
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References:
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Referring:
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Availability: local
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Function flags: body local optimize_size
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Called by: Flexio_Pwm_Ip_UpdatePeriodDuty/30
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Calls:
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Flexio_Pwm_Ip_ConfigurePinOverride/9 (Flexio_Pwm_Ip_ConfigurePinOverride) @05c87700
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Type: function definition analyzed
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Visibility: prevailing_def_ironly
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References:
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Referring:
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Availability: local
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Function flags: body local optimize_size
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Called by: Flexio_Pwm_Ip_UpdatePeriodDuty/30 Flexio_Pwm_Ip_ForceOuputLevel/29 Flexio_Pwm_Ip_DeInitChannel/27
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Calls:
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Flexio_Pwm_Ip_SetPinLevel/8 (Flexio_Pwm_Ip_SetPinLevel) @05c87460
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Type: function definition analyzed
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Visibility: prevailing_def_ironly
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References:
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Referring:
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Availability: local
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Function flags: body local optimize_size
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Called by: Flexio_Pwm_Ip_ForceOuputLevel/29 Flexio_Pwm_Ip_DeInitChannel/27
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Calls:
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Flexio_Pwm_Ip_ConfigurePinFallingEdge/7 (Flexio_Pwm_Ip_ConfigurePinFallingEdge) @05c871c0
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Type: function definition analyzed
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Visibility: prevailing_def_ironly
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References:
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Referring:
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Availability: local
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Function flags: body local optimize_size
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Called by: Flexio_Pwm_Ip_UpdateInterruptMode/32 Flexio_Pwm_Ip_UpdateInterruptMode/32
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Calls:
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Flexio_Pwm_Ip_ConfigurePinRisingEdge/6 (Flexio_Pwm_Ip_ConfigurePinRisingEdge) @05c7fee0
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Type: function definition analyzed
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Visibility: prevailing_def_ironly
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References:
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Referring:
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Availability: local
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Function flags: body local optimize_size
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Called by: Flexio_Pwm_Ip_UpdateInterruptMode/32 Flexio_Pwm_Ip_UpdateInterruptMode/32
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Calls:
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Flexio_Pwm_Ip_ConfigurePinIrq/5 (Flexio_Pwm_Ip_ConfigurePinIrq) @05c7fc40
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Type: function definition analyzed
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Visibility: prevailing_def_ironly
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References:
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Referring:
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Availability: local
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Function flags: body local optimize_size
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Called by: Flexio_Pwm_Ip_UpdateInterruptMode/32 Flexio_Pwm_Ip_UpdateInterruptMode/32 Flexio_Pwm_Ip_UpdateInterruptMode/32
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Calls:
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Flexio_Pwm_Ip_ClearPinFlag/4 (Flexio_Pwm_Ip_ClearPinFlag) @05c7f9a0
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Type: function definition analyzed
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Visibility: prevailing_def_ironly
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References:
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Referring:
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Availability: local
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Function flags: body local optimize_size
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Called by: Flexio_Pwm_Ip_UpdateInterruptMode/32 Flexio_Pwm_Ip_ForceOuputLevel/29
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Calls:
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Flexio_Pwm_Ip_GetPinState/1 (Flexio_Pwm_Ip_GetPinState) @05c7f0e0
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Type: function definition analyzed
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Visibility: prevailing_def_ironly
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References:
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Referring:
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Availability: local
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Function flags: body local optimize_size
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Called by: Flexio_Pwm_Ip_GetOutputState/31
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Calls:
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Flexio_Pwm_Ip_UpdateInterruptMode (uint8 instanceId, uint8 channel, Flexio_Pwm_Ip_InterruptType irqMode)
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{
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Flexio_Pwm_Ip_StatusType retStatus;
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const struct Flexio_Pwm_Ip_ChannelConfigType * const userCfg;
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struct Flexio_Pwm_Ip_HwAddrType * const base;
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Flexio_Pwm_Ip_StatusType D.4784;
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<bb 2> :
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# DEBUG BEGIN_STMT
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_1 = (int) instanceId;
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base = 1077035008B;
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# DEBUG BEGIN_STMT
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_2 = (int) channel;
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userCfg = Flexio_Pwm_Ip_aState[_2];
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# DEBUG BEGIN_STMT
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retStatus = 0;
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# DEBUG BEGIN_STMT
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_3 = userCfg->timerId;
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Flexio_Mcl_Ip_ClearTimerStatus (base, _3);
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# DEBUG BEGIN_STMT
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_4 = userCfg->pinId;
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Flexio_Pwm_Ip_ClearPinFlag (base, _4);
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# DEBUG BEGIN_STMT
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_5 = userCfg->timerId;
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_6 = (int) _5;
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_7 = 1 << _6;
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_8 = (signed char) _7;
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_9 = ~_8;
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timerIrqMask.2_10 = timerIrqMask;
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timerIrqMask.3_11 = (signed char) timerIrqMask.2_10;
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_12 = _9 & timerIrqMask.3_11;
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_13 = (unsigned char) _12;
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timerIrqMask = _13;
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# DEBUG BEGIN_STMT
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_14 = userCfg->pinId;
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_15 = (int) _14;
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_16 = 1 << _15;
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_17 = ~_16;
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pinIrqMask.4_18 = pinIrqMask;
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_19 = _17 & pinIrqMask.4_18;
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pinIrqMask = _19;
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# DEBUG BEGIN_STMT
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_20 = userCfg->timerId;
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_21 = (int) _20;
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_22 = 1 << _21;
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_23 = (unsigned char) _22;
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Flexio_Mcl_Ip_SetTimerInterrupt (base, _23, 0);
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# DEBUG BEGIN_STMT
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_24 = userCfg->pinId;
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Flexio_Pwm_Ip_ConfigurePinRisingEdge (base, _24, 0);
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# DEBUG BEGIN_STMT
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_25 = userCfg->pinId;
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Flexio_Pwm_Ip_ConfigurePinFallingEdge (base, _25, 0);
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# DEBUG BEGIN_STMT
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_26 = userCfg->pinId;
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Flexio_Pwm_Ip_ConfigurePinIrq (base, _26, 0);
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# DEBUG BEGIN_STMT
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if (irqMode == 1)
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goto <bb 4>; [INV]
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else
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goto <bb 3>; [INV]
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<bb 3> :
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if (irqMode == 3)
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goto <bb 4>; [INV]
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else
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goto <bb 6>; [INV]
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<bb 4> :
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# DEBUG BEGIN_STMT
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_27 = userCfg->pinId;
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Flexio_Pwm_Ip_ConfigurePinRisingEdge (base, _27, 1);
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# DEBUG BEGIN_STMT
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_28 = userCfg->callback.cbFunction;
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if (_28 != 0B)
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goto <bb 5>; [INV]
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else
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goto <bb 6>; [INV]
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<bb 5> :
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# DEBUG BEGIN_STMT
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_29 = userCfg->pinId;
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Flexio_Pwm_Ip_ConfigurePinIrq (base, _29, 1);
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# DEBUG BEGIN_STMT
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_30 = userCfg->pinId;
|
|
_31 = (int) _30;
|
|
_32 = 1 << _31;
|
|
pinIrqMask.5_33 = pinIrqMask;
|
|
_34 = _32 | pinIrqMask.5_33;
|
|
pinIrqMask = _34;
|
|
|
|
<bb 6> :
|
|
# DEBUG BEGIN_STMT
|
|
_35 = irqMode + 254;
|
|
if (_35 <= 1)
|
|
goto <bb 7>; [INV]
|
|
else
|
|
goto <bb 9>; [INV]
|
|
|
|
<bb 7> :
|
|
# DEBUG BEGIN_STMT
|
|
_36 = userCfg->pinId;
|
|
Flexio_Pwm_Ip_ConfigurePinFallingEdge (base, _36, 1);
|
|
# DEBUG BEGIN_STMT
|
|
_37 = userCfg->callback.cbFunction;
|
|
if (_37 != 0B)
|
|
goto <bb 8>; [INV]
|
|
else
|
|
goto <bb 9>; [INV]
|
|
|
|
<bb 8> :
|
|
# DEBUG BEGIN_STMT
|
|
_38 = userCfg->pinId;
|
|
Flexio_Pwm_Ip_ConfigurePinIrq (base, _38, 1);
|
|
# DEBUG BEGIN_STMT
|
|
_39 = userCfg->pinId;
|
|
_40 = (int) _39;
|
|
_41 = 1 << _40;
|
|
pinIrqMask.6_42 = pinIrqMask;
|
|
_43 = _41 | pinIrqMask.6_42;
|
|
pinIrqMask = _43;
|
|
|
|
<bb 9> :
|
|
# DEBUG BEGIN_STMT
|
|
if (irqMode == 4)
|
|
goto <bb 10>; [INV]
|
|
else
|
|
goto <bb 11>; [INV]
|
|
|
|
<bb 10> :
|
|
# DEBUG BEGIN_STMT
|
|
_44 = userCfg->timerId;
|
|
_45 = (int) _44;
|
|
_46 = 1 << _45;
|
|
_47 = (unsigned char) _46;
|
|
Flexio_Mcl_Ip_SetTimerInterrupt (base, _47, 1);
|
|
# DEBUG BEGIN_STMT
|
|
_48 = userCfg->timerId;
|
|
_49 = (int) _48;
|
|
_50 = 1 << _49;
|
|
_51 = (unsigned char) _50;
|
|
timerIrqMask.7_52 = timerIrqMask;
|
|
_53 = _51 | timerIrqMask.7_52;
|
|
timerIrqMask = _53;
|
|
|
|
<bb 11> :
|
|
# DEBUG BEGIN_STMT
|
|
D.4784 = retStatus;
|
|
return D.4784;
|
|
|
|
}
|
|
|
|
|
|
Flexio_Pwm_Ip_GetOutputState (uint8 instanceId, uint8 channel)
|
|
{
|
|
const struct Flexio_Pwm_Ip_ChannelConfigType * const userCfg;
|
|
const struct Flexio_Pwm_Ip_HwAddrType * const base;
|
|
boolean D.4769;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) instanceId;
|
|
base = 1077035008B;
|
|
# DEBUG BEGIN_STMT
|
|
_2 = (int) channel;
|
|
userCfg = Flexio_Pwm_Ip_aState[_2];
|
|
# DEBUG BEGIN_STMT
|
|
_3 = userCfg->pinId;
|
|
D.4769 = Flexio_Pwm_Ip_GetPinState (base, _3);
|
|
return D.4769;
|
|
|
|
}
|
|
|
|
|
|
Flexio_Pwm_Ip_UpdatePeriodDuty (uint8 instanceId, uint8 channel, uint16 period, uint16 dutyCycle)
|
|
{
|
|
Flexio_Pwm_Ip_StatusType retStatus;
|
|
const struct Flexio_Pwm_Ip_ChannelConfigType * const userCfg;
|
|
struct Flexio_Pwm_Ip_HwAddrType * const base;
|
|
Flexio_Pwm_Ip_StatusType D.4765;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) instanceId;
|
|
base = 1077035008B;
|
|
# DEBUG BEGIN_STMT
|
|
_2 = (int) channel;
|
|
userCfg = Flexio_Pwm_Ip_aState[_2];
|
|
# DEBUG BEGIN_STMT
|
|
retStatus = 0;
|
|
# DEBUG BEGIN_STMT
|
|
if (retStatus == 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 10>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
_3 = userCfg->pinId;
|
|
_4 = Flexio_Pwm_Ip_GetPinOverride (base, _3);
|
|
if (_4 != 0)
|
|
goto <bb 4>; [INV]
|
|
else
|
|
goto <bb 8>; [INV]
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
_5 = userCfg->polarity;
|
|
if (_5 == 0)
|
|
goto <bb 5>; [INV]
|
|
else
|
|
goto <bb 6>; [INV]
|
|
|
|
<bb 5> :
|
|
# DEBUG BEGIN_STMT
|
|
Flexio_Pwm_Ip_SetTimerInitMode (base, channel, 0);
|
|
# DEBUG BEGIN_STMT
|
|
Flexio_Pwm_Ip_SetTimerMode (base, channel, 2);
|
|
goto <bb 7>; [INV]
|
|
|
|
<bb 6> :
|
|
# DEBUG BEGIN_STMT
|
|
Flexio_Pwm_Ip_SetTimerInitMode (base, channel, 1);
|
|
# DEBUG BEGIN_STMT
|
|
Flexio_Pwm_Ip_SetTimerMode (base, channel, 6);
|
|
|
|
<bb 7> :
|
|
# DEBUG BEGIN_STMT
|
|
_6 = userCfg->pinId;
|
|
Flexio_Pwm_Ip_ConfigurePinOverride (base, _6, 0);
|
|
|
|
<bb 8> :
|
|
# DEBUG BEGIN_STMT
|
|
_7 = Flexio_Pwm_Ip_PinOverrideNeeded (instanceId, channel, period, dutyCycle);
|
|
_8 = ~_7;
|
|
if (_8 != 0)
|
|
goto <bb 9>; [INV]
|
|
else
|
|
goto <bb 10>; [INV]
|
|
|
|
<bb 9> :
|
|
# DEBUG BEGIN_STMT
|
|
_9 = (unsigned char) dutyCycle;
|
|
_10 = _9 + 255;
|
|
Flexio_Pwm_Ip_SetLowerValue (base, channel, _10);
|
|
# DEBUG BEGIN_STMT
|
|
_11 = (unsigned char) period;
|
|
_12 = (unsigned char) dutyCycle;
|
|
_13 = _11 - _12;
|
|
_14 = _13 + 255;
|
|
Flexio_Pwm_Ip_SetUpperValue (base, channel, _14);
|
|
|
|
<bb 10> :
|
|
# DEBUG BEGIN_STMT
|
|
D.4765 = retStatus;
|
|
return D.4765;
|
|
|
|
}
|
|
|
|
|
|
Flexio_Pwm_Ip_ForceOuputLevel (uint8 instanceId, uint8 channel, boolean level)
|
|
{
|
|
Flexio_Pwm_Ip_StatusType retStatus;
|
|
const struct Flexio_Pwm_Ip_ChannelConfigType * const userCfg;
|
|
struct Flexio_Pwm_Ip_HwAddrType * const base;
|
|
Flexio_Pwm_Ip_StatusType D.4754;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) instanceId;
|
|
base = 1077035008B;
|
|
# DEBUG BEGIN_STMT
|
|
_2 = (int) channel;
|
|
userCfg = Flexio_Pwm_Ip_aState[_2];
|
|
# DEBUG BEGIN_STMT
|
|
retStatus = 0;
|
|
# DEBUG BEGIN_STMT
|
|
if (retStatus == 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 4>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
_3 = userCfg->pinId;
|
|
Flexio_Pwm_Ip_SetPinLevel (base, _3, level);
|
|
# DEBUG BEGIN_STMT
|
|
_4 = userCfg->pinId;
|
|
Flexio_Pwm_Ip_ConfigurePinOverride (base, _4, 1);
|
|
# DEBUG BEGIN_STMT
|
|
_5 = userCfg->timerId;
|
|
Flexio_Mcl_Ip_ClearTimerStatus (base, _5);
|
|
# DEBUG BEGIN_STMT
|
|
_6 = userCfg->pinId;
|
|
Flexio_Pwm_Ip_ClearPinFlag (base, _6);
|
|
# DEBUG BEGIN_STMT
|
|
_7 = userCfg->timerId;
|
|
Flexio_Pwm_Ip_SetTimerMode (base, _7, 0);
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
D.4754 = retStatus;
|
|
return D.4754;
|
|
|
|
}
|
|
|
|
|
|
Flexio_Pwm_Ip_UpdateClockPrescaler (uint8 instanceId, uint8 channel, Flexio_Pwm_Ip_ClockPrescalerType prescaler)
|
|
{
|
|
Flexio_Pwm_Ip_StatusType retStatus;
|
|
const struct Flexio_Pwm_Ip_ChannelConfigType * const userCfg;
|
|
struct Flexio_Pwm_Ip_HwAddrType * const base;
|
|
Flexio_Pwm_Ip_StatusType D.4750;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) instanceId;
|
|
base = 1077035008B;
|
|
# DEBUG BEGIN_STMT
|
|
_2 = (int) channel;
|
|
userCfg = Flexio_Pwm_Ip_aState[_2];
|
|
# DEBUG BEGIN_STMT
|
|
retStatus = 0;
|
|
# DEBUG BEGIN_STMT
|
|
if (retStatus == 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 4>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
_3 = userCfg->timerId;
|
|
Flexio_Pwm_Ip_SetTimerPrescaler (base, _3, prescaler);
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
D.4750 = retStatus;
|
|
return D.4750;
|
|
|
|
}
|
|
|
|
|
|
Flexio_Pwm_Ip_DeInitChannel (uint8 instanceId, uint8 channel)
|
|
{
|
|
Flexio_Pwm_Ip_StatusType retStatus;
|
|
const struct Flexio_Pwm_Ip_ChannelConfigType * const userCfg;
|
|
struct Flexio_Pwm_Ip_HwAddrType * const base;
|
|
Flexio_Pwm_Ip_StatusType D.4738;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) instanceId;
|
|
base = 1077035008B;
|
|
# DEBUG BEGIN_STMT
|
|
_2 = (int) channel;
|
|
userCfg = Flexio_Pwm_Ip_aState[_2];
|
|
# DEBUG BEGIN_STMT
|
|
retStatus = 0;
|
|
# DEBUG BEGIN_STMT
|
|
if (retStatus == 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 4>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
_3 = userCfg->timerId;
|
|
Flexio_Pwm_Ip_SetTimerMode (base, _3, 0);
|
|
# DEBUG BEGIN_STMT
|
|
retStatus = Flexio_Pwm_Ip_UpdateInterruptMode (instanceId, channel, 0);
|
|
# DEBUG BEGIN_STMT
|
|
_4 = userCfg->timerId;
|
|
Flexio_Pwm_Ip_SetTimerPinPolarity (base, _4, 0);
|
|
# DEBUG BEGIN_STMT
|
|
_5 = userCfg->timerId;
|
|
Flexio_Pwm_Ip_SetTimerPin (base, _5, 0);
|
|
# DEBUG BEGIN_STMT
|
|
_6 = userCfg->timerId;
|
|
Flexio_Pwm_Ip_SetTimerPinOutput (base, _6, 0);
|
|
# DEBUG BEGIN_STMT
|
|
_7 = userCfg->timerId;
|
|
Flexio_Pwm_Ip_SetTimerInitMode (base, _7, 0);
|
|
# DEBUG BEGIN_STMT
|
|
_8 = userCfg->timerId;
|
|
Flexio_Pwm_Ip_SetTimerPrescaler (base, _8, 0);
|
|
# DEBUG BEGIN_STMT
|
|
_9 = userCfg->timerId;
|
|
Flexio_Pwm_Ip_SetUpperValue (base, _9, 0);
|
|
# DEBUG BEGIN_STMT
|
|
_10 = userCfg->timerId;
|
|
Flexio_Pwm_Ip_SetLowerValue (base, _10, 0);
|
|
# DEBUG BEGIN_STMT
|
|
_11 = userCfg->pinId;
|
|
Flexio_Pwm_Ip_ConfigurePinOverride (base, _11, 0);
|
|
# DEBUG BEGIN_STMT
|
|
_12 = userCfg->pinId;
|
|
Flexio_Pwm_Ip_SetPinLevel (base, _12, 0);
|
|
# DEBUG BEGIN_STMT
|
|
_13 = userCfg->timerId;
|
|
_14 = (int) _13;
|
|
Flexio_Pwm_Ip_aState[_14] = 0B;
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
D.4738 = retStatus;
|
|
return D.4738;
|
|
|
|
}
|
|
|
|
|
|
Flexio_Pwm_Ip_InitChannel (uint8 instanceId, const struct Flexio_Pwm_Ip_ChannelConfigType * const userCfg)
|
|
{
|
|
Flexio_Pwm_Ip_StatusType retStatus;
|
|
struct Flexio_Pwm_Ip_HwAddrType * const base;
|
|
Flexio_Pwm_Ip_StatusType D.4719;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) instanceId;
|
|
base = 1077035008B;
|
|
# DEBUG BEGIN_STMT
|
|
retStatus = 0;
|
|
# DEBUG BEGIN_STMT
|
|
_2 = userCfg->timerId;
|
|
_3 = (int) _2;
|
|
Flexio_Pwm_Ip_aState[_3] = userCfg;
|
|
# DEBUG BEGIN_STMT
|
|
_4 = userCfg->timerId;
|
|
Flexio_Pwm_Ip_SetTimerMode (base, _4, 0);
|
|
# DEBUG BEGIN_STMT
|
|
_5 = userCfg->polarity;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 4>; [INV]
|
|
|
|
<bb 3> :
|
|
# DEBUG BEGIN_STMT
|
|
_6 = userCfg->timerId;
|
|
Flexio_Pwm_Ip_SetTimerInitMode (base, _6, 0);
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
_7 = userCfg->timerId;
|
|
Flexio_Pwm_Ip_SetTimerInitMode (base, _7, 1);
|
|
|
|
<bb 5> :
|
|
# DEBUG BEGIN_STMT
|
|
_8 = userCfg->timerId;
|
|
_9 = userCfg->prescaler;
|
|
Flexio_Pwm_Ip_SetTimerPrescaler (base, _8, _9);
|
|
# DEBUG BEGIN_STMT
|
|
_10 = userCfg->timerId;
|
|
Flexio_Pwm_Ip_SetTimerPinOutput (base, _10, 3);
|
|
# DEBUG BEGIN_STMT
|
|
_11 = userCfg->timerId;
|
|
_12 = userCfg->pinId;
|
|
Flexio_Pwm_Ip_SetTimerPin (base, _11, _12);
|
|
# DEBUG BEGIN_STMT
|
|
_13 = userCfg->timerId;
|
|
Flexio_Pwm_Ip_SetTimerPinPolarity (base, _13, 0);
|
|
# DEBUG BEGIN_STMT
|
|
_14 = userCfg->timerId;
|
|
retStatus = Flexio_Pwm_Ip_UpdateInterruptMode (instanceId, _14, 0);
|
|
# DEBUG BEGIN_STMT
|
|
_15 = userCfg->timerId;
|
|
_16 = userCfg->period;
|
|
_17 = userCfg->dutyCycle;
|
|
_18 = Flexio_Pwm_Ip_PinOverrideNeeded (instanceId, _15, _16, _17);
|
|
_19 = ~_18;
|
|
if (_19 != 0)
|
|
goto <bb 6>; [INV]
|
|
else
|
|
goto <bb 9>; [INV]
|
|
|
|
<bb 6> :
|
|
# DEBUG BEGIN_STMT
|
|
_20 = userCfg->timerId;
|
|
_21 = userCfg->dutyCycle;
|
|
_22 = (unsigned char) _21;
|
|
_23 = _22 + 255;
|
|
Flexio_Pwm_Ip_SetLowerValue (base, _20, _23);
|
|
# DEBUG BEGIN_STMT
|
|
_24 = userCfg->timerId;
|
|
_25 = userCfg->period;
|
|
_26 = (unsigned char) _25;
|
|
_27 = userCfg->dutyCycle;
|
|
_28 = (unsigned char) _27;
|
|
_29 = _26 - _28;
|
|
_30 = _29 + 255;
|
|
Flexio_Pwm_Ip_SetUpperValue (base, _24, _30);
|
|
# DEBUG BEGIN_STMT
|
|
_31 = userCfg->polarity;
|
|
if (_31 == 0)
|
|
goto <bb 7>; [INV]
|
|
else
|
|
goto <bb 8>; [INV]
|
|
|
|
<bb 7> :
|
|
# DEBUG BEGIN_STMT
|
|
_32 = userCfg->timerId;
|
|
Flexio_Pwm_Ip_SetTimerMode (base, _32, 2);
|
|
goto <bb 9>; [INV]
|
|
|
|
<bb 8> :
|
|
# DEBUG BEGIN_STMT
|
|
_33 = userCfg->timerId;
|
|
Flexio_Pwm_Ip_SetTimerMode (base, _33, 6);
|
|
|
|
<bb 9> :
|
|
# DEBUG BEGIN_STMT
|
|
D.4719 = retStatus;
|
|
return D.4719;
|
|
|
|
}
|
|
|
|
|
|
Flexio_Pwm_Ip_PinOverrideNeeded (uint8 instanceId, uint8 channel, uint16 period, uint16 dutyCycle)
|
|
{
|
|
Flexio_Pwm_Ip_StatusType status;
|
|
boolean retStatus;
|
|
boolean D.4734;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
retStatus = 1;
|
|
# DEBUG BEGIN_STMT
|
|
status = 0;
|
|
# DEBUG BEGIN_STMT
|
|
if (dutyCycle == 0)
|
|
goto <bb 4>; [INV]
|
|
else
|
|
goto <bb 3>; [INV]
|
|
|
|
<bb 3> :
|
|
if (period == 0)
|
|
goto <bb 4>; [INV]
|
|
else
|
|
goto <bb 7>; [INV]
|
|
|
|
<bb 4> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) channel;
|
|
_2 = Flexio_Pwm_Ip_aState[_1];
|
|
_3 = _2->polarity;
|
|
if (_3 == 0)
|
|
goto <bb 5>; [INV]
|
|
else
|
|
goto <bb 6>; [INV]
|
|
|
|
<bb 5> :
|
|
# DEBUG BEGIN_STMT
|
|
status = Flexio_Pwm_Ip_ForceOuputLevel (instanceId, channel, 0);
|
|
goto <bb 12>; [INV]
|
|
|
|
<bb 6> :
|
|
# DEBUG BEGIN_STMT
|
|
status = Flexio_Pwm_Ip_ForceOuputLevel (instanceId, channel, 1);
|
|
goto <bb 12>; [INV]
|
|
|
|
<bb 7> :
|
|
# DEBUG BEGIN_STMT
|
|
if (dutyCycle == period)
|
|
goto <bb 8>; [INV]
|
|
else
|
|
goto <bb 11>; [INV]
|
|
|
|
<bb 8> :
|
|
# DEBUG BEGIN_STMT
|
|
_4 = (int) channel;
|
|
_5 = Flexio_Pwm_Ip_aState[_4];
|
|
_6 = _5->polarity;
|
|
if (_6 == 0)
|
|
goto <bb 9>; [INV]
|
|
else
|
|
goto <bb 10>; [INV]
|
|
|
|
<bb 9> :
|
|
# DEBUG BEGIN_STMT
|
|
status = Flexio_Pwm_Ip_ForceOuputLevel (instanceId, channel, 1);
|
|
goto <bb 12>; [INV]
|
|
|
|
<bb 10> :
|
|
# DEBUG BEGIN_STMT
|
|
status = Flexio_Pwm_Ip_ForceOuputLevel (instanceId, channel, 0);
|
|
goto <bb 12>; [INV]
|
|
|
|
<bb 11> :
|
|
# DEBUG BEGIN_STMT
|
|
retStatus = 0;
|
|
|
|
<bb 12> :
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
D.4734 = retStatus;
|
|
return D.4734;
|
|
|
|
}
|
|
|
|
|
|
Flexio_Pwm_Ip_SetLowerValue (struct Flexio_Pwm_Ip_HwAddrType * base, uint8 timer, uint8 value)
|
|
{
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) timer;
|
|
_2 = base->TIMCMP[_1];
|
|
_3 = _2 & 4294967040;
|
|
_4 = (long unsigned int) value;
|
|
_5 = (int) timer;
|
|
_6 = _3 | _4;
|
|
base->TIMCMP[_5] = _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Flexio_Pwm_Ip_SetUpperValue (struct Flexio_Pwm_Ip_HwAddrType * base, uint8 timer, uint8 value)
|
|
{
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) timer;
|
|
_2 = base->TIMCMP[_1];
|
|
_3 = _2 & 4294902015;
|
|
_4 = (long unsigned int) value;
|
|
_5 = _4 << 8;
|
|
_6 = _5 & 65535;
|
|
_7 = (int) timer;
|
|
_8 = _3 | _6;
|
|
base->TIMCMP[_7] = _8;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Flexio_Pwm_Ip_SetTimerPrescaler (struct Flexio_Pwm_Ip_HwAddrType * base, uint8 timer, Flexio_Pwm_Ip_ClockPrescalerType prescaler)
|
|
{
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) timer;
|
|
_2 = base->TIMCFG[_1];
|
|
_3 = _2 & 4287627263;
|
|
_4 = (long unsigned int) prescaler;
|
|
_5 = _4 << 20;
|
|
_6 = _5 & 7340032;
|
|
_7 = (int) timer;
|
|
_8 = _3 | _6;
|
|
base->TIMCFG[_7] = _8;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Flexio_Pwm_Ip_SetTimerInitMode (struct Flexio_Pwm_Ip_HwAddrType * base, uint8 timer, Flexio_Pwm_Ip_TimerInitType timerInitOut)
|
|
{
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) timer;
|
|
_2 = base->TIMCFG[_1];
|
|
_3 = _2 & 4244635647;
|
|
_4 = (long unsigned int) timerInitOut;
|
|
_5 = _4 << 24;
|
|
_6 = _5 & 50331648;
|
|
_7 = (int) timer;
|
|
_8 = _3 | _6;
|
|
base->TIMCFG[_7] = _8;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Flexio_Pwm_Ip_SetTimerMode (struct Flexio_Pwm_Ip_HwAddrType * base, uint8 timer, Flexio_Pwm_Ip_TimerModeType timerMode)
|
|
{
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) timer;
|
|
_2 = base->TIMCTL[_1];
|
|
_3 = _2 & 4294967288;
|
|
_4 = (long unsigned int) timerMode;
|
|
_5 = _4 & 7;
|
|
_6 = (int) timer;
|
|
_7 = _3 | _5;
|
|
base->TIMCTL[_6] = _7;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Flexio_Pwm_Ip_SetTimerPinPolarity (struct Flexio_Pwm_Ip_HwAddrType * base, uint8 timer, Flexio_Pwm_Ip_PolarityType polarity)
|
|
{
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) timer;
|
|
_2 = base->TIMCTL[_1];
|
|
_3 = _2 & 4294967167;
|
|
_4 = (long unsigned int) polarity;
|
|
_5 = _4 << 7;
|
|
_6 = _5 & 255;
|
|
_7 = (int) timer;
|
|
_8 = _3 | _6;
|
|
base->TIMCTL[_7] = _8;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Flexio_Pwm_Ip_SetTimerPin (struct Flexio_Pwm_Ip_HwAddrType * base, uint8 timer, uint8 pin)
|
|
{
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) timer;
|
|
_2 = base->TIMCTL[_1];
|
|
_3 = _2 & 4294959359;
|
|
_4 = (long unsigned int) pin;
|
|
_5 = _4 << 8;
|
|
_6 = _5 & 7936;
|
|
_7 = (int) timer;
|
|
_8 = _3 | _6;
|
|
base->TIMCTL[_7] = _8;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Flexio_Pwm_Ip_SetTimerPinOutput (struct Flexio_Pwm_Ip_HwAddrType * base, uint8 timer, Flexio_Pwm_Ip_TimerPinType pinMode)
|
|
{
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) timer;
|
|
_2 = base->TIMCTL[_1];
|
|
_3 = _2 & 4294770687;
|
|
_4 = (long unsigned int) pinMode;
|
|
_5 = _4 << 16;
|
|
_6 = _5 & 196608;
|
|
_7 = (int) timer;
|
|
_8 = _3 | _6;
|
|
base->TIMCTL[_7] = _8;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Flexio_Pwm_Ip_GetPinOverride (const struct Flexio_Pwm_Ip_HwAddrType * const base, uint8 pin)
|
|
{
|
|
boolean D.4767;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = base->PINOUTE;
|
|
_2 = (int) pin;
|
|
_3 = _1 >> _2;
|
|
_4 = _3 & 1;
|
|
D.4767 = _4 != 0;
|
|
return D.4767;
|
|
|
|
}
|
|
|
|
|
|
Flexio_Pwm_Ip_ConfigurePinOverride (struct Flexio_Pwm_Ip_HwAddrType * base, uint8 pin, boolean enabled)
|
|
{
|
|
long unsigned int iftmp.0;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = base->PINOUTE;
|
|
_2 = (int) pin;
|
|
_3 = 1 << _2;
|
|
_4 = ~_3;
|
|
_5 = _1 & _4;
|
|
if (enabled != 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 4>; [INV]
|
|
|
|
<bb 3> :
|
|
iftmp.0 = 1;
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 4> :
|
|
iftmp.0 = 0;
|
|
|
|
<bb 5> :
|
|
_6 = (int) pin;
|
|
_7 = iftmp.0 << _6;
|
|
_8 = _5 | _7;
|
|
base->PINOUTE = _8;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Flexio_Pwm_Ip_SetPinLevel (struct Flexio_Pwm_Ip_HwAddrType * base, uint8 pin, boolean level)
|
|
{
|
|
long unsigned int iftmp.1;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = base->PINOUTD;
|
|
_2 = (int) pin;
|
|
_3 = 1 << _2;
|
|
_4 = ~_3;
|
|
_5 = _1 & _4;
|
|
if (level != 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 4>; [INV]
|
|
|
|
<bb 3> :
|
|
iftmp.1 = 1;
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 4> :
|
|
iftmp.1 = 0;
|
|
|
|
<bb 5> :
|
|
_6 = (int) pin;
|
|
_7 = iftmp.1 << _6;
|
|
_8 = _5 | _7;
|
|
base->PINOUTD = _8;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Flexio_Pwm_Ip_ConfigurePinFallingEdge (struct Flexio_Pwm_Ip_HwAddrType * base, uint8 pin, boolean enabled)
|
|
{
|
|
long unsigned int iftmp.11;
|
|
long unsigned int vol.10;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
vol.10 = base->PINFEN;
|
|
if (enabled != 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 4>; [INV]
|
|
|
|
<bb 3> :
|
|
iftmp.11 = 1;
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 4> :
|
|
iftmp.11 = 0;
|
|
|
|
<bb 5> :
|
|
_1 = (int) pin;
|
|
_2 = iftmp.11 << _1;
|
|
base->PINFEN = _2;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Flexio_Pwm_Ip_ConfigurePinRisingEdge (struct Flexio_Pwm_Ip_HwAddrType * base, uint8 pin, boolean enabled)
|
|
{
|
|
long unsigned int iftmp.9;
|
|
long unsigned int vol.8;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
vol.8 = base->PINREN;
|
|
if (enabled != 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 4>; [INV]
|
|
|
|
<bb 3> :
|
|
iftmp.9 = 1;
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 4> :
|
|
iftmp.9 = 0;
|
|
|
|
<bb 5> :
|
|
_1 = (int) pin;
|
|
_2 = iftmp.9 << _1;
|
|
base->PINREN = _2;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Flexio_Pwm_Ip_ConfigurePinIrq (struct Flexio_Pwm_Ip_HwAddrType * base, uint8 pin, boolean enabled)
|
|
{
|
|
long unsigned int iftmp.13;
|
|
long unsigned int vol.12;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
vol.12 = base->PINIEN;
|
|
if (enabled != 0)
|
|
goto <bb 3>; [INV]
|
|
else
|
|
goto <bb 4>; [INV]
|
|
|
|
<bb 3> :
|
|
iftmp.13 = 1;
|
|
goto <bb 5>; [INV]
|
|
|
|
<bb 4> :
|
|
iftmp.13 = 0;
|
|
|
|
<bb 5> :
|
|
_1 = (int) pin;
|
|
_2 = iftmp.13 << _1;
|
|
base->PINIEN = _2;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Flexio_Pwm_Ip_ClearPinFlag (struct Flexio_Pwm_Ip_HwAddrType * base, uint8 pin)
|
|
{
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) pin;
|
|
_2 = 1 << _1;
|
|
base->PINSTAT = _2;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Flexio_Pwm_Ip_GetPinState (const struct Flexio_Pwm_Ip_HwAddrType * const base, uint8 pin)
|
|
{
|
|
boolean D.4771;
|
|
|
|
<bb 2> :
|
|
# DEBUG BEGIN_STMT
|
|
_1 = base->PIN;
|
|
_2 = (int) pin;
|
|
_3 = _1 >> _2;
|
|
_4 = _3 & 1;
|
|
D.4771 = _4 == 1;
|
|
return D.4771;
|
|
|
|
}
|
|
|
|
|