mirror of
https://github.com/Dev-KATECH/ADM.git
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544 lines
17 KiB
C
544 lines
17 KiB
C
/*==================================================================================================
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* Project : RTD AUTOSAR 4.4
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* Platform : CORTEXM
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* Peripheral :
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* Dependencies : none
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*
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* Autosar Version : 4.4.0
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* Autosar Revision : ASR_REL_4_4_REV_0000
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* Autosar Conf.Variant :
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* SW Version : 0.9.0
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* Build Version : S32K3_RTD_0_9_0__ASR_REL_4_4_REV_0000_20210326
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*
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* (c) Copyright 2020 - 2021 NXP Semiconductors
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* All Rights Reserved.
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*
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* NXP Confidential. This software is owned or controlled by NXP and may only be
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* used strictly in accordance with the applicable license terms. By expressly
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* accepting such terms or by downloading, installing, activating and/or otherwise
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* using the software, you are agreeing that you have read, and that you agree to
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* comply with and are bound by, such license terms. If you do not agree to be
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* bound by the applicable license terms, then you may not retain, install,
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* activate or otherwise use the software.
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==================================================================================================*/
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/**
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* @file Clock_Ip_IntOsc.c
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* @version 0.9.0
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*
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* @brief CLOCK driver implementations.
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* @details CLOCK driver implementations.
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*
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* @addtogroup CLOCK_DRIVER Clock Ip Driver
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* @{
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*/
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/**
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* @page misra_violations MISRA-C:2012 violations
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*
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* @section Clock_Ip_IntOsc_c_REF_1
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* Violates MISRA 2012 Advisory Rule 20.1, #include directives should only be preceded by preprocessor
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* directives or comments. AUTOSAR imposes the specification of the sections in which certain parts
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* of the driver must be placed.
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*
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* @section Clock_Ip_IntOsc_c_REF_2
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* Violates MISRA 2012 Advisory Rule 4.8, This file includes the definition
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* of types but does not use it. Header is common for all files
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*
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*/
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#include "Clock_Ip_Private.h"
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/*==================================================================================================
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SOURCE FILE VERSION INFORMATION
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==================================================================================================*/
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#define CLOCK_IP_INTOSC_VENDOR_ID_C 43
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#define CLOCK_IP_INTOSC_AR_RELEASE_MAJOR_VERSION_C 4
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#define CLOCK_IP_INTOSC_AR_RELEASE_MINOR_VERSION_C 4
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#define CLOCK_IP_INTOSC_AR_RELEASE_REVISION_VERSION_C 0
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#define CLOCK_IP_INTOSC_SW_MAJOR_VERSION_C 0
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#define CLOCK_IP_INTOSC_SW_MINOR_VERSION_C 9
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#define CLOCK_IP_INTOSC_SW_PATCH_VERSION_C 0
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/*==================================================================================================
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* FILE VERSION CHECKS
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==================================================================================================*/
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/* Check if Clock_Ip_IntOsc.c file and Clock_Ip_Private.h file are of the same vendor */
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#if (CLOCK_IP_INTOSC_VENDOR_ID_C != CLOCK_IP_PRIVATE_VENDOR_ID)
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#error "Clock_Ip_IntOsc.c and Clock_Ip_Private.h have different vendor ids"
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#endif
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/* Check if Clock_Ip_IntOsc.c file and Clock_Ip_Private.h file are of the same Autosar version */
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#if ((CLOCK_IP_INTOSC_AR_RELEASE_MAJOR_VERSION_C != CLOCK_IP_PRIVATE_AR_RELEASE_MAJOR_VERSION) || \
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(CLOCK_IP_INTOSC_AR_RELEASE_MINOR_VERSION_C != CLOCK_IP_PRIVATE_AR_RELEASE_MINOR_VERSION) || \
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(CLOCK_IP_INTOSC_AR_RELEASE_REVISION_VERSION_C != CLOCK_IP_PRIVATE_AR_RELEASE_REVISION_VERSION) \
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)
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#error "AutoSar Version Numbers of Clock_Ip_IntOsc.c and Clock_Ip_Private.h are different"
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#endif
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/* Check if Clock_Ip_IntOsc.c file and Clock_Ip_Private.h file are of the same Software version */
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#if ((CLOCK_IP_INTOSC_SW_MAJOR_VERSION_C != CLOCK_IP_PRIVATE_SW_MAJOR_VERSION) || \
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(CLOCK_IP_INTOSC_SW_MINOR_VERSION_C != CLOCK_IP_PRIVATE_SW_MINOR_VERSION) || \
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(CLOCK_IP_INTOSC_SW_PATCH_VERSION_C != CLOCK_IP_PRIVATE_SW_PATCH_VERSION) \
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)
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#error "Software Version Numbers of Clock_Ip_IntOsc.c and Clock_Ip_Private.h are different"
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#endif
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/* Clock start section code */
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#define MCU_START_SEC_CODE
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/**
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* @violates @ref Clock_Ip_IntOsc_c_REF_1 #include directives should only be preceded by preprocessor
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* directives or comments.
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*/
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#include "Mcu_MemMap.h"
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static void InternalOscillatorEmpty(Clock_Ip_IrcoscConfigType const* config);
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#ifdef FIRC_STDBY_ENABLE
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static void FircStdbyEnable(Clock_Ip_IrcoscConfigType const* config);
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#endif
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#ifdef SIRC_STDBY_ENABLE
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static void SircStdbyEnable(Clock_Ip_IrcoscConfigType const* config);
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#endif
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#ifdef SIRC_ENABLE
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static status_t SircEnable(Clock_Ip_IrcoscConfigType const* config);
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#endif
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#ifdef SIRC_VLP_ENABLE
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static SircVlpEnable(Clock_Ip_IrcoscConfigType const* config);
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#endif
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#ifdef SIRC_STOP_ENABLE
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static SircStopEnable(Clock_Ip_IrcoscConfigType const* config);
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#endif
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#ifdef FIRC_ENABLE
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static status_t FIRCEnable(Clock_Ip_IrcoscConfigType const* config);
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#endif
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#ifdef FIRC_VLP_ENABLE
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static FIRCVlpEnable(Clock_Ip_IrcoscConfigType const* config);
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#endif
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#ifdef FIRC_STOP_ENABLE
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static FIRCStopEnable(Clock_Ip_IrcoscConfigType const* config);
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#endif
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/* Clock stop section code */
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#define MCU_STOP_SEC_CODE
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/**
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* @violates @ref Clock_Ip_IntOsc_c_REF_1 #include directives should only be preceded by preprocessor
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* directives or comments.
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*/
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#include "Mcu_MemMap.h"
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/* Clock start constant section data */
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#define MCU_START_SEC_CONST_UNSPECIFIED
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/**
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* @violates @ref Clock_Ip_IntOsc_c_REF_1 #include directives should only be preceded by preprocessor
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* directives or comments.
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*/
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#include "Mcu_MemMap.h"
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const intOscCallback intOscCallbacks[IRCOSC_CALLBACKS_COUNT] =
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{
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{
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InternalOscillatorEmpty, /* Set */
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},
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#ifdef FIRC_STDBY_ENABLE
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{
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FircStdbyEnable, /* Set */
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},
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#endif
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#ifdef SIRC_STDBY_ENABLE
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{
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SircStdbyEnable, /* Set */
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},
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#endif
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#ifdef SIRC_ENABLE
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{
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SircEnable, /* Set */
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},
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#endif
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#ifdef SIRC_VLP_ENABLE
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{
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SircVlpEnable, /* Set */
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},
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#endif
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#ifdef SIRC_STOP_ENABLE
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{
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SircStopEnable, /* Set */
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},
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#endif
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#ifdef FIRC_ENABLE
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{
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FIRCEnable, /* Set */
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},
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#endif
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#ifdef FIRC_VLP_ENABLE
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{
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FIRCVlpEnable, /* Set */
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},
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#endif
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#ifdef FIRC_STOP_ENABLE
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{
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FIRCStopEnable, /* Set */
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},
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#endif
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};
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/* Clock stop constant section data */
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#define MCU_STOP_SEC_CONST_UNSPECIFIED
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/**
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* @violates @ref Clock_Ip_IntOsc_c_REF_1 #include directives should only be preceded by preprocessor
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* directives or comments.
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*/
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#include "Mcu_MemMap.h"
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/* Clock start section code */
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#define MCU_START_SEC_CODE
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/**
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* @violates @ref Clock_Ip_IntOsc_c_REF_1 #include directives should only be preceded by preprocessor
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* directives or comments.
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*/
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#include "Mcu_MemMap.h"
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static void InternalOscillatorEmpty(Clock_Ip_IrcoscConfigType const* config)
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{
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(void)config;
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/* No implementation */
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}
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#ifdef FIRC_STDBY_ENABLE
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static void FircStdbyEnable(Clock_Ip_IrcoscConfigType const* config)
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{
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if (config->enable != 0U)
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{
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FIRC->STDBY_ENABLE |= FIRC_STDBY_ENABLE_STDBY_EN_MASK;
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/* Update Clock state for FIRC_STANDBY_CLK to enable */
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UpdateClockState(config->name, ENABLED_CLOCK);
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}
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else
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{
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FIRC->STDBY_ENABLE &= ~FIRC_STDBY_ENABLE_STDBY_EN_MASK;
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/* Update Clock state for FIRC_STANDBY_CLK to disable */
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UpdateClockState(config->name, DISABLED_CLOCK);
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}
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}
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#endif
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#ifdef SIRC_STDBY_ENABLE
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static void SircStdbyEnable(Clock_Ip_IrcoscConfigType const* config)
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{
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if (config->enable != 0U)
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{
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SIRC->MISCELLANEOUS_IN |= SIRC_MISCELLANEOUS_IN_STANDBY_ENABLE_MASK;
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/* Update Clock state for SIRC_STANDBY_CLK to enable */
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UpdateClockState(config->name, ENABLED_CLOCK);
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}
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else
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{
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SIRC->MISCELLANEOUS_IN &= ~SIRC_MISCELLANEOUS_IN_STANDBY_ENABLE_MASK;
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/* Update Clock state for SIRC_STANDBY_CLK to disable */
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UpdateClockState(config->name, DISABLED_CLOCK);
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}
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}
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#endif
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#ifdef SIRC_ENABLE
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static status_t SircEnable(Clock_Ip_IrcoscConfigType const* config)
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{
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uint32 instance = clockFeatures[config->name][CLOCK_MODULE_INSTANCE];
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boolean TimeoutOccurred = FALSE;
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uint32 StartTime;
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uint32 ElapsedTime;
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uint32 TimeoutTicks;
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uint32 IrcoscStatus;
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Clock_Ip_IrcoscConfigType sircConfig;
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(void)instance;
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/* TODO config = NULL ??*/
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if (config == NULL)
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{
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config.name = FIRC_CLK;
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config.range = 1U; /* 8MHz */
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config.enable = 1U; /* enabled */
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}
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/* Clear LK bit field */
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SCG->SIRCCSR &= (uint32)(~(SCG_SIRCCSR_LK_MASK));
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/* Disable clock */
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SCG->SIRCCSR &= (uint32)(~(SCG_SIRCCSR_SIRCEN_MASK));
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/* Configure SIRC. */
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if (config->enable)
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{
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/* Step frequency range. */
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SCG->SIRCCFG = SCG_SIRCCFG_RANGE(config->range);
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/* Enable clock. */
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SCG->SIRCCSR |= SCG_SIRCCSR_SIRCEN(1U);
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ClockStartTimeout(&StartTime, &ElapsedTime, &TimeoutTicks, CLOCK_TIMEOUT_VALUE_US);
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/* Wait until ircosc is locked */
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do
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{
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Clock_Ip_TimeDelay();
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IrcoscStatus = (((SCG->SIRCCSR & SCG_SIRCCSR_SIRCVLD_MASK) >> SCG_SIRCCSR_SIRCVLD_SHIFT));
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TimeoutOccurred = ClockTimeoutExpired(&StartTime, &ElapsedTime, TimeoutTicks);
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}
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while ((IrcoscStatus == 0U) && (FALSE == TimeoutOccurred));
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if (FALSE == TimeoutOccurred)
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{
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UpdateClockState(config->name, ENABLED_CLOCK);
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}
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else
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{
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/* Report timeout error */
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ReportClockErrors(CLOCK_IP_REPORT_TIMEOUT_ERROR, config->name);
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}
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}
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return status;
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}
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#endif
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#ifdef SIRC_VLP_ENABLE
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static SircVlpEnable(Clock_Ip_IrcoscConfigType const* config)
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{
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/* Clear LK bit field */
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SCG->SIRCCSR &= (uint32)(~(SCG_SIRCCSR_LK_MASK));
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/* Disable clock */
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SCG->SIRCCSR &= (uint32)(~(SCG_SIRCCSR_SIRCLPEN_MASK));
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/* Configure SIRC. */
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if (config->enable)
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{
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/* Enable clock in VLP mode */
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SCG->SIRCCSR |= SCG_SIRCCSR_SIRCLPEN(1U);
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}
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}
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#endif
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#ifdef SIRC_STOP_ENABLE
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static SircStopEnable(Clock_Ip_IrcoscConfigType const* config)
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{
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/* Clear LK bit field */
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SCG->SIRCCSR &= (uint32)(~(SCG_SIRCCSR_LK_MASK));
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/* Disable clock */
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SCG->SIRCCSR &= (uint32)(~(SCG_SIRCCSR_SIRCSTEN_MASK));
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/* Configure SIRC. */
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if (config->enable)
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{
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/* Enable clock in STOP mode */
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SCG->SIRCCSR |= SCG_SIRCCSR_SIRCSTEN(1U);
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}
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}
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#endif
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#ifdef FIRC_ENABLE
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static status_t FIRCEnable(Clock_Ip_IrcoscConfigType const* config)
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{
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uint32 instance = clockFeatures[config->name][CLOCK_MODULE_INSTANCE];
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boolean TimeoutOccurred = FALSE;
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uint32 StartTime;
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uint32 ElapsedTime;
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uint32 TimeoutTicks;
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uint32 IrcoscStatus;
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(void)instance;
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/* Clear LK bit field */
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SCG->FIRCCSR &= (uint32)(~(SCG_FIRCCSR_LK_MASK));
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/* Check that FIRC is used by system clock) */
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if ((SCG->FIRCSCR & SCG_FIRCCSR_FIRCSEL_MASK) != 0U)
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{
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/* Check whether FIRC is already configured as required */
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if (((config->range != (SCG->FIRCCFG & SCG_FIRCCFG_RANGE_MASK) >> SCG_FIRCCFG_RANGE_SHIFT) ||
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(config->regulator != SCG_FIRCCSR_FIRCREGOFF((regulator) ? 0UL : 1UL)))
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{
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/* Enable SIRC if it is disabled. */
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if ((SCG->SIRCCSR & SCG_SIRCCSR_SIRCEN_MASK) == 0U)
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{
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SircEnable(NULL_PTR);
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}
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/* Switch to SIRC */
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uint32 regValue = scg->RCCR;
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regValue &= ~SCG_RCCR_SCS_MASK;
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regValue |= (SIRC_CLK_SOURCE << SCG_RCCR_SCS_SHIFT);
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scg->RCCR = regValue;
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timeut = 10U;
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while ((((SCG->CSR & SCG_CSR_SCS_MASK) >> SCG_CSR_SCS_SHIFT) != ((uint32_t)SIRC_clock_source)) && (timeout > 0U));
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if (timeout == 0U)
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{
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retValue = STATUS_TIMEOUT;
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}
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/* Disable clock */
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SCG->FIRCCSR &= (uint32)(~(SCG_FIRCCSR_FIRCEN_MASK));
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/* Configure FIRC. */
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if (config->enable)
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{
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/* Step frequency range. */
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SCG->FIRCCFG = SCG_FIRCCFG_RANGE(config->range) | SCG_FIRCCSR_FIRCREGOFF((config->regulator) ? 0UL : 1UL);
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/* Enable clock. */
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SCG->FIRCCSR |= SCG_FIRCCSR_FIRCEN(1U);
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ClockStartTimeout(&StartTime, &ElapsedTime, &TimeoutTicks, CLOCK_TIMEOUT_VALUE_US);
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/* Wait until ircosc is locked */
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do
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{
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Clock_Ip_TimeDelay();
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IrcoscStatus = (((SCG->FIRCCSR & SCG_FIRCCSR_FIRCVLD_MASK) >> SCG_FIRCCSR_FIRCVLD_SHIFT));
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TimeoutOccurred = ClockTimeoutExpired(&StartTime, &ElapsedTime, TimeoutTicks);
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}
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while ((IrcoscStatus == 0U) && (FALSE == TimeoutOccurred));
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if (FALSE == TimeoutOccurred)
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{
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UpdateClockState(config->name, ENABLED_CLOCK);
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}
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else
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{
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/* Report timeout error */
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ReportClockErrors(CLOCK_IP_REPORT_TIMEOUT_ERROR, config->name);
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}
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/* Switch back to FIRC */
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uint32 regValue = scg->RCCR;
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regValue &= ~SCG_RCCR_SCS_MASK;
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regValue |= (FIRC_CLK_SOURCE << SCG_RCCR_SCS_SHIFT);
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scg->RCCR = regValue;
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timeut = 10U;
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while ((((SCG->CSR & SCG_CSR_SCS_MASK) >> SCG_CSR_SCS_SHIFT) != ((uint32_t)SIRC_clock_source)) && (timeout > 0U));
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if (timeout == 0U)
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{
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retValue = STATUS_TIMEOUT;
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}
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}
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else
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{
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UpdateClockState(config->name, DISABLED_CLOCK);
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}
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}
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else
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{
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/* Firc is used as system clock source and is configured as required */
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UpdateClockState(config->name, ENABLED_CLOCK);
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}
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}
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else
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{
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/* Configure FIRC. */
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/* Disable clock */
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SCG->FIRCCSR &= (uint32)(~(SCG_FIRCCSR_FIRCEN_MASK));
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if (config->enable)
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{
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/* Step frequency range. */
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SCG->FIRCCFG = SCG_FIRCCFG_RANGE(config->range) | SCG_FIRCCSR_FIRCREGOFF((config->regulator) ? 0UL : 1UL);
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/* Enable clock. */
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SCG->FIRCCSR |= SCG_FIRCCSR_FIRCEN(1U);
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ClockStartTimeout(&StartTime, &ElapsedTime, &TimeoutTicks, CLOCK_TIMEOUT_VALUE_US);
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/* Wait until ircosc is locked */
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do
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{
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Clock_Ip_TimeDelay();
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IrcoscStatus = (((SCG->FIRCCSR & SCG_FIRCCSR_FIRCVLD_MASK) >> SCG_FIRCCSR_FIRCVLD_SHIFT));
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TimeoutOccurred = ClockTimeoutExpired(&StartTime, &ElapsedTime, TimeoutTicks);
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}
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while ((IrcoscStatus == 0U) && (FALSE == TimeoutOccurred));
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if (FALSE == TimeoutOccurred)
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{
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UpdateClockState(config->name, ENABLED_CLOCK);
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}
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else
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{
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/* Report timeout error */
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ReportClockErrors(CLOCK_IP_REPORT_TIMEOUT_ERROR, config->name);
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}
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}
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else
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{
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UpdateClockState(config->name, DISABLED_CLOCK);
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}
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}
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return status;
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}
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#endif
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#ifdef FIRC_VLP_ENABLE
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static FIRCVlpEnable(Clock_Ip_IrcoscConfigType const* config)
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{
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/* Clear LK bit field */
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SCG->FIRCCSR &= (uint32)(~(SCG_FIRCCSR_LK_MASK));
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/* Disable clock */
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SCG->FIRCCSR &= (uint32)(~(SCG_FIRCCSR_FIRCLPEN_MASK));
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|
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/* Configure FIRC. */
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if (config->enable)
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{
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/* Enable clock in VLP mode */
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SCG->FIRCCSR |= SCG_FIRCCSR_FIRCLPEN(1U);
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}
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}
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#endif
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#ifdef FIRC_STOP_ENABLE
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static FIRCStopEnable(Clock_Ip_IrcoscConfigType const* config)
|
|
{
|
|
/* Clear LK bit field */
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|
SCG->FIRCCSR &= (uint32)(~(SCG_FIRCCSR_LK_MASK));
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|
|
|
/* Disable clock */
|
|
SCG->FIRCCSR &= (uint32)(~(SCG_FIRCCSR_FIRCSTEN_MASK));
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|
|
|
/* Configure FIRC. */
|
|
if (config->enable)
|
|
{
|
|
/* Enable clock in STOP mode */
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|
SCG->FIRCCSR |= SCG_FIRCCSR_FIRCSTEN(1U);
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|
}
|
|
}
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|
#endif
|
|
|
|
/* Clock stop section code */
|
|
#define MCU_STOP_SEC_CODE
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|
/**
|
|
* @violates @ref Clock_Ip_IntOsc_c_REF_1 #include directives should only be preceded by preprocessor
|
|
* directives or comments.
|
|
*/
|
|
#include "Mcu_MemMap.h"
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|
|
|
/*! @}*/
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|
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/*******************************************************************************
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|
* EOF
|
|
******************************************************************************/
|