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1 line
95 KiB
JavaScript
1 line
95 KiB
JavaScript
var dataJson = {"arch":{"ispc":true,"isunix":false,"ismac":false},"build":"ADM_Integrated_Logic","ref":false,"files":[{"name":"ert_main.c","type":"source","group":"main","path":"C:\\Users\\MSI\\Documents\\WorkSpace\\git\\ADM\\[ADM] Integrated Logic\\ADM_Integrated_Logic_ert_rtw","tag":"","groupDisplay":"Main file","code":"/*\r\n * Academic License - for use in teaching, academic research, and meeting\r\n * course requirements at degree granting institutions only. Not for\r\n * government, commercial, or other organizational use.\r\n *\r\n * File: ert_main.c\r\n *\r\n * Code generated for Simulink model 'ADM_Integrated_Logic'.\r\n *\r\n * Model version : 14.109\r\n * Simulink Coder version : 24.2 (R2024b) 21-Jun-2024\r\n * C/C++ source code generated on : Tue Jan 6 11:24:27 2026\r\n *\r\n * Target selection: ert.tlc\r\n * Embedded hardware selection: NXP->Cortex-M4\r\n * Code generation objectives:\r\n * 1. Execution efficiency\r\n * 2. RAM efficiency\r\n * 3. Debugging\r\n * Validation result: Not run\r\n */\r\n\r\n#include <stddef.h>\r\n#include <stdio.h> /* This example main program uses printf/fflush */\r\n#include \"ADM_Integrated_Logic.h\" /* Model header file */\r\n\r\n/*\r\n * Associating rt_OneStep with a real-time clock or interrupt service routine\r\n * is what makes the generated code \"real-time\". The function rt_OneStep is\r\n * always associated with the base rate of the model. Subrates are managed\r\n * by the base rate from inside the generated code. Enabling/disabling\r\n * interrupts and floating point context switches are target specific. This\r\n * example code indicates where these should take place relative to executing\r\n * the generated code step function. Overrun behavior should be tailored to\r\n * your application needs. This example simply sets an error status in the\r\n * real-time model and returns from rt_OneStep.\r\n */\r\nvoid rt_OneStep(void);\r\nvoid rt_OneStep(void)\r\n{\r\n static bool OverrunFlag = false;\r\n\r\n /* Disable interrupts here */\r\n\r\n /* Check for overrun */\r\n if (OverrunFlag) {\r\n rtmSetErrorStatus(ADM_Integrated_Logic_M, \"Overrun\");\r\n return;\r\n }\r\n\r\n OverrunFlag = true;\r\n\r\n /* Save FPU context here (if necessary) */\r\n /* Re-enable timer or interrupt here */\r\n /* Set model inputs here */\r\n\r\n /* Step the model */\r\n ADM_Integrated_Logic_step();\r\n\r\n /* Get model outputs here */\r\n\r\n /* Indicate task complete */\r\n OverrunFlag = false;\r\n\r\n /* Disable interrupts here */\r\n /* Restore FPU context here (if necessary) */\r\n /* Enable interrupts here */\r\n}\r\n\r\n/*\r\n * The example main function illustrates what is required by your\r\n * application code to initialize, execute, and terminate the generated code.\r\n * Attaching rt_OneStep to a real-time clock is target specific. This example\r\n * illustrates how you do this relative to initializing the model.\r\n */\r\nint main(int argc, const char *argv[])\r\n{\r\n /* Unused arguments */\r\n (void)(argc);\r\n (void)(argv);\r\n\r\n /* Initialize model */\r\n ADM_Integrated_Logic_initialize();\r\n\r\n /* Attach rt_OneStep to a timer or interrupt service routine with\r\n * period 0.002 seconds (base rate of the model) here.\r\n * The call syntax for rt_OneStep is\r\n *\r\n * rt_OneStep();\r\n */\r\n printf(\"Warning: The simulation will run forever. \"\r\n \"Generated ERT main won't simulate model step behavior. \"\r\n \"To change this behavior select the 'MAT-file logging' option.\\n\");\r\n fflush((NULL));\r\n while (rtmGetErrorStatus(ADM_Integrated_Logic_M) == (NULL)) {\r\n /* Perform application tasks here */\r\n }\r\n\r\n return 0;\r\n}\r\n\r\n/*\r\n * File trailer for generated code.\r\n *\r\n * [EOF]\r\n */\r\n"},{"name":"ADM_Integrated_Logic.c","type":"source","group":"model","path":"C:\\Users\\MSI\\Documents\\WorkSpace\\git\\ADM\\[ADM] Integrated Logic\\ADM_Integrated_Logic_ert_rtw","tag":"","groupDisplay":"Model files","code":"/*\r\n * Academic License - for use in teaching, academic research, and meeting\r\n * course requirements at degree granting institutions only. Not for\r\n * government, commercial, or other organizational use.\r\n *\r\n * File: ADM_Integrated_Logic.c\r\n *\r\n * Code generated for Simulink model 'ADM_Integrated_Logic'.\r\n *\r\n * Model version : 14.109\r\n * Simulink Coder version : 24.2 (R2024b) 21-Jun-2024\r\n * C/C++ source code generated on : Tue Jan 6 11:24:27 2026\r\n *\r\n * Target selection: ert.tlc\r\n * Embedded hardware selection: NXP->Cortex-M4\r\n * Code generation objectives:\r\n * 1. Execution efficiency\r\n * 2. RAM efficiency\r\n * 3. Debugging\r\n * Validation result: Not run\r\n */\r\n\r\n#include \"ADM_Integrated_Logic.h\"\r\n#include <stdint.h>\r\n#include <math.h>\r\n#include <stdbool.h>\r\n#include <stddef.h>\r\n\r\n/* Named constants for Chart: '<S11>/Chart' */\r\n#define IN_HAC_OFF ((uint8_t)1U)\r\n#define IN_HAC_ON ((uint8_t)2U)\r\n#define NumBitsPerChar 8U\r\n\r\n/* Block signals and states (default storage) */\r\nDW_ADM_Integrated_Logic_T ADM_Integrated_Logic_DW;\r\n\r\n/* External inputs (root inport signals with default storage) */\r\nExtU_ADM_Integrated_Logic_T ADM_Integrated_Logic_U;\r\n\r\n/* External outputs (root outports fed by signals with default storage) */\r\nExtY_ADM_Integrated_Logic_T ADM_Integrated_Logic_Y;\r\n\r\n/* Real-time model */\r\nstatic RT_MODEL_ADM_Integrated_Logic_T ADM_Integrated_Logic_M_;\r\nRT_MODEL_ADM_Integrated_Logic_T *const ADM_Integrated_Logic_M =\r\n &ADM_Integrated_Logic_M_;\r\nstatic void ADM_Integrated_Lo_Calculate_F_R(double rtu_C_r, double rtu_W, double\r\n rtu_theta, double *rty_F_R);\r\nstatic void ADM_Integrated_Lo_Calculate_F_c(double rtu_W, double rtu_theta,\r\n double *rty_F_c);\r\nstatic void ADM_Integrated__MATLABFunction1(double rtu_u, double *rty_y);\r\nstatic void ADM_Integrated__MATLABFunction2(double rtu_u, double *rty_y);\r\n\r\n#define NOT_USING_NONFINITE_LITERALS 1\r\n\r\nextern double rtInf;\r\nextern double rtMinusInf;\r\nextern double rtNaN;\r\nextern float rtInfF;\r\nextern float rtMinusInfF;\r\nextern float rtNaNF;\r\nstatic void rt_InitInfAndNaN(size_t realSize);\r\nstatic bool rtIsInf(double value);\r\nstatic bool rtIsInfF(float value);\r\nstatic bool rtIsNaN(double value);\r\nstatic bool rtIsNaNF(float value);\r\ntypedef struct {\r\n struct {\r\n uint32_t wordH;\r\n uint32_t wordL;\r\n } words;\r\n} BigEndianIEEEDouble;\r\n\r\ntypedef struct {\r\n struct {\r\n uint32_t wordL;\r\n uint32_t wordH;\r\n } words;\r\n} LittleEndianIEEEDouble;\r\n\r\ntypedef struct {\r\n union {\r\n float wordLreal;\r\n uint32_t wordLuint;\r\n } wordL;\r\n} IEEESingle;\r\n\r\ndouble rtInf;\r\ndouble rtMinusInf;\r\ndouble rtNaN;\r\nfloat rtInfF;\r\nfloat rtMinusInfF;\r\nfloat rtNaNF;\r\nstatic double rtGetInf(void);\r\nstatic float rtGetInfF(void);\r\nstatic double rtGetMinusInf(void);\r\nstatic float rtGetMinusInfF(void);\r\nstatic double rtGetNaN(void);\r\nstatic float rtGetNaNF(void);\r\n\r\n/*\r\n * Initialize the rtInf, rtMinusInf, and rtNaN needed by the\r\n * generated code. NaN is initialized as non-signaling. Assumes IEEE.\r\n */\r\nstatic void rt_InitInfAndNaN(size_t realSize)\r\n{\r\n (void) (realSize);\r\n rtNaN = rtGetNaN();\r\n rtNaNF = rtGetNaNF();\r\n rtInf = rtGetInf();\r\n rtInfF = rtGetInfF();\r\n rtMinusInf = rtGetMinusInf();\r\n rtMinusInfF = rtGetMinusInfF();\r\n}\r\n\r\n/* Test if value is infinite */\r\nstatic bool rtIsInf(double value)\r\n{\r\n return (bool)((value==rtInf || value==rtMinusInf) ? 1U : 0U);\r\n}\r\n\r\n/* Test if single-precision value is infinite */\r\nstatic bool rtIsInfF(float value)\r\n{\r\n return (bool)(((value)==rtInfF || (value)==rtMinusInfF) ? 1U : 0U);\r\n}\r\n\r\n/* Test if value is not a number */\r\nstatic bool rtIsNaN(double value)\r\n{\r\n bool result = (bool) 0;\r\n size_t bitsPerReal = sizeof(double) * (NumBitsPerChar);\r\n if (bitsPerReal == 32U) {\r\n result = rtIsNaNF((float)value);\r\n } else {\r\n union {\r\n LittleEndianIEEEDouble bitVal;\r\n double fltVal;\r\n } tmpVal;\r\n\r\n tmpVal.fltVal = value;\r\n result = (bool)((tmpVal.bitVal.words.wordH & 0x7FF00000) == 0x7FF00000 &&\r\n ( (tmpVal.bitVal.words.wordH & 0x000FFFFF) != 0 ||\r\n (tmpVal.bitVal.words.wordL != 0) ));\r\n }\r\n\r\n return result;\r\n}\r\n\r\n/* Test if single-precision value is not a number */\r\nstatic bool rtIsNaNF(float value)\r\n{\r\n IEEESingle tmp;\r\n tmp.wordL.wordLreal = value;\r\n return (bool)( (tmp.wordL.wordLuint & 0x7F800000) == 0x7F800000 &&\r\n (tmp.wordL.wordLuint & 0x007FFFFF) != 0 );\r\n}\r\n\r\n/*\r\n * Initialize rtInf needed by the generated code.\r\n * Inf is initialized as non-signaling. Assumes IEEE.\r\n */\r\nstatic double rtGetInf(void)\r\n{\r\n size_t bitsPerReal = sizeof(double) * (NumBitsPerChar);\r\n double inf = 0.0;\r\n if (bitsPerReal == 32U) {\r\n inf = rtGetInfF();\r\n } else {\r\n union {\r\n LittleEndianIEEEDouble bitVal;\r\n double fltVal;\r\n } tmpVal;\r\n\r\n tmpVal.bitVal.words.wordH = 0x7FF00000U;\r\n tmpVal.bitVal.words.wordL = 0x00000000U;\r\n inf = tmpVal.fltVal;\r\n }\r\n\r\n return inf;\r\n}\r\n\r\n/*\r\n * Initialize rtInfF needed by the generated code.\r\n * Inf is initialized as non-signaling. Assumes IEEE.\r\n */\r\nstatic float rtGetInfF(void)\r\n{\r\n IEEESingle infF;\r\n infF.wordL.wordLuint = 0x7F800000U;\r\n return infF.wordL.wordLreal;\r\n}\r\n\r\n/*\r\n * Initialize rtMinusInf needed by the generated code.\r\n * Inf is initialized as non-signaling. Assumes IEEE.\r\n */\r\nstatic double rtGetMinusInf(void)\r\n{\r\n size_t bitsPerReal = sizeof(double) * (NumBitsPerChar);\r\n double minf = 0.0;\r\n if (bitsPerReal == 32U) {\r\n minf = rtGetMinusInfF();\r\n } else {\r\n union {\r\n LittleEndianIEEEDouble bitVal;\r\n double fltVal;\r\n } tmpVal;\r\n\r\n tmpVal.bitVal.words.wordH = 0xFFF00000U;\r\n tmpVal.bitVal.words.wordL = 0x00000000U;\r\n minf = tmpVal.fltVal;\r\n }\r\n\r\n return minf;\r\n}\r\n\r\n/*\r\n * Initialize rtMinusInfF needed by the generated code.\r\n * Inf is initialized as non-signaling. Assumes IEEE.\r\n */\r\nstatic float rtGetMinusInfF(void)\r\n{\r\n IEEESingle minfF;\r\n minfF.wordL.wordLuint = 0xFF800000U;\r\n return minfF.wordL.wordLreal;\r\n}\r\n\r\n/*\r\n * Initialize rtNaN needed by the generated code.\r\n * NaN is initialized as non-signaling. Assumes IEEE.\r\n */\r\nstatic double rtGetNaN(void)\r\n{\r\n size_t bitsPerReal = sizeof(double) * (NumBitsPerChar);\r\n double nan = 0.0;\r\n if (bitsPerReal == 32U) {\r\n nan = rtGetNaNF();\r\n } else {\r\n union {\r\n LittleEndianIEEEDouble bitVal;\r\n double fltVal;\r\n } tmpVal;\r\n\r\n tmpVal.bitVal.words.wordH = 0xFFF80000U;\r\n tmpVal.bitVal.words.wordL = 0x00000000U;\r\n nan = tmpVal.fltVal;\r\n }\r\n\r\n return nan;\r\n}\r\n\r\n/*\r\n * Initialize rtNaNF needed by the generated code.\r\n * NaN is initialized as non-signaling. Assumes IEEE.\r\n */\r\nstatic float rtGetNaNF(void)\r\n{\r\n IEEESingle nanF = { { 0.0F } };\r\n\r\n nanF.wordL.wordLuint = 0xFFC00000U;\r\n return nanF.wordL.wordLreal;\r\n}\r\n\r\n/*\r\n * Output and update for atomic system:\r\n * '<S41>/Calculate_F_R'\r\n * '<S63>/Calculate_F_R'\r\n */\r\nstatic void ADM_Integrated_Lo_Calculate_F_R(double rtu_C_r, double rtu_W, double\r\n rtu_theta, double *rty_F_R)\r\n{\r\n *rty_F_R = rtu_C_r * rtu_W * cos(rtu_theta);\r\n}\r\n\r\n/*\r\n * Output and update for atomic system:\r\n * '<S41>/Calculate_F_c'\r\n * '<S63>/Calculate_F_c'\r\n * '<S63>/Calculate_F_c1'\r\n */\r\nstatic void ADM_Integrated_Lo_Calculate_F_c(double rtu_W, double rtu_theta,\r\n double *rty_F_c)\r\n{\r\n *rty_F_c = rtu_W * sin(rtu_theta);\r\n}\r\n\r\n/*\r\n * Output and update for atomic system:\r\n * '<S1>/MATLAB Function1'\r\n * '<S1>/MATLAB Function5'\r\n */\r\nstatic void ADM_Integrated__MATLABFunction1(double rtu_u, double *rty_y)\r\n{\r\n *rty_y = rtu_u;\r\n if (rtu_u < 140.0) {\r\n *rty_y = 140.0;\r\n }\r\n}\r\n\r\n/*\r\n * Output and update for atomic system:\r\n * '<S1>/MATLAB Function2'\r\n * '<S1>/MATLAB Function6'\r\n */\r\nstatic void ADM_Integrated__MATLABFunction2(double rtu_u, double *rty_y)\r\n{\r\n *rty_y = rtu_u;\r\n if (rtu_u > -140.0) {\r\n *rty_y = -140.0;\r\n }\r\n}\r\n\r\n/* Model step function */\r\nvoid ADM_Integrated_Logic_step(void)\r\n{\r\n double tmp[9];\r\n double x_hat_pred[3];\r\n double tmp_0[2];\r\n double tmp_1[2];\r\n double DiscreteTransferFcn;\r\n double e_off;\r\n double rtb_AccFlag;\r\n double rtb_Add;\r\n double rtb_Add3;\r\n double rtb_Brake_Control;\r\n double rtb_Brake_Torque_Cmd;\r\n double rtb_Desired_Torque;\r\n double rtb_Error_m;\r\n double rtb_Gain_c;\r\n double rtb_Integrator_1;\r\n double rtb_Memory;\r\n double rtb_Pitch_Angle;\r\n double rtb_Product1;\r\n double rtb_Product1_h;\r\n double rtb_Product1_k3;\r\n double rtb_Product1_m;\r\n double rtb_Product1_pd;\r\n double rtb_Product2_a;\r\n double rtb_Product_h;\r\n double rtb_Saturation;\r\n double rtb_Sum1_aj;\r\n double rtb_Sum1_i2;\r\n double rtb_Sum1_lm;\r\n double rtb_Sum1_o1;\r\n double rtb_Sum1_p;\r\n double rtb_Switch2_k;\r\n double rtb_TSamp;\r\n double rtb_Target_RPM;\r\n double rtb_Vx_Cmd_R;\r\n double rtb_dVx;\r\n double rtb_y;\r\n double rtb_y_k;\r\n int32_t i;\r\n bool rtb_Compare_l;\r\n bool rtb_Compare_p;\r\n static const int8_t a[6] = { 1, 0, 0, 1, 0, 0 };\r\n\r\n static const double b_a[6] = { 0.2997, 0.0, -0.0842, 0.01, 0.9981, 0.0 };\r\n\r\n /* Product: '<S13>/Product1' incorporates:\r\n * Constant: '<S13>/Constant'\r\n * Gain: '<S13>/gain'\r\n * Inport: '<Root>/GV_IMU_AX_Val'\r\n * Product: '<S13>/Product11'\r\n * Sum: '<S13>/Sum1'\r\n * Sum: '<S13>/Sum2'\r\n * Sum: '<S13>/Sum3'\r\n * Sum: '<S13>/Sum4'\r\n * UnitDelay: '<S13>/d'\r\n * UnitDelay: '<S13>/d1'\r\n */\r\n rtb_Product1 = ((ADM_Integrated_Logic_U.GV_IMU_AX_Val +\r\n ADM_Integrated_Logic_DW.d1_DSTATE) * 0.002 +\r\n 0.63461977236758138 * ADM_Integrated_Logic_DW.d_DSTATE) /\r\n 0.63861977236758138;\r\n\r\n /* MATLAB Function: '<S1>/MATLAB Function' incorporates:\r\n * Constant: '<S1>/Constant1'\r\n * Constant: '<S1>/Constant2'\r\n */\r\n tmp[0] = 1.0;\r\n tmp[3] = 0.002;\r\n tmp[6] = -0.019620000000000002;\r\n tmp[1] = 0.0;\r\n tmp[2] = 0.0;\r\n tmp[4] = 1.0;\r\n tmp[5] = 0.0;\r\n tmp[7] = 0.0;\r\n tmp[8] = 1.0;\r\n rtb_Pitch_Angle = ADM_Integrated_Logic_DW.x_hat[1];\r\n rtb_AccFlag = ADM_Integrated_Logic_DW.x_hat[0];\r\n rtb_Vx_Cmd_R = ADM_Integrated_Logic_DW.x_hat[2];\r\n for (i = 0; i < 3; i++) {\r\n x_hat_pred[i] = (tmp[i + 3] * rtb_Pitch_Angle + tmp[i] * rtb_AccFlag) +\r\n tmp[i + 6] * rtb_Vx_Cmd_R;\r\n }\r\n\r\n /* SignalConversion generated from: '<S14>/ SFunction ' incorporates:\r\n * Inport: '<Root>/GV_Vx_Fbk'\r\n * MATLAB Function: '<S1>/MATLAB Function'\r\n */\r\n tmp_0[0] = ADM_Integrated_Logic_U.GV_Vx_Fbk;\r\n tmp_0[1] = rtb_Product1;\r\n\r\n /* MATLAB Function: '<S1>/MATLAB Function' */\r\n rtb_Pitch_Angle = x_hat_pred[1];\r\n rtb_AccFlag = x_hat_pred[0];\r\n rtb_Vx_Cmd_R = x_hat_pred[2];\r\n for (i = 0; i < 2; i++) {\r\n tmp_1[i] = tmp_0[i] - (((double)a[i + 2] * rtb_Pitch_Angle + (double)a[i] *\r\n rtb_AccFlag) + 0.0 * rtb_Vx_Cmd_R);\r\n }\r\n\r\n rtb_Add = tmp_1[1];\r\n rtb_Pitch_Angle = tmp_1[0];\r\n for (i = 0; i < 3; i++) {\r\n ADM_Integrated_Logic_DW.x_hat[i] = (b_a[i + 3] * rtb_Add + b_a[i] *\r\n rtb_Pitch_Angle) + x_hat_pred[i];\r\n }\r\n\r\n /* RelationalOperator: '<S5>/Compare' incorporates:\r\n * Constant: '<S5>/Constant'\r\n * Inport: '<Root>/GV_Drive_Mode'\r\n */\r\n rtb_Compare_l = (ADM_Integrated_Logic_U.GV_Drive_Mode == 2.0);\r\n\r\n /* MATLAB Function: '<S25>/Vx_OutPut_Function' incorporates:\r\n * Constant: '<S78>/Constant'\r\n * Inport: '<Root>/GV_BrakeTorqueCommand'\r\n * Inport: '<Root>/GV_Vx_Command'\r\n * Inport: '<Root>/GV_Vx_Limit'\r\n * RelationalOperator: '<S78>/Compare'\r\n */\r\n if (!(ADM_Integrated_Logic_U.GV_BrakeTorqueCommand >= 50.0)) {\r\n if (ADM_Integrated_Logic_U.GV_Vx_Limit <=\r\n ADM_Integrated_Logic_U.GV_Vx_Command) {\r\n rtb_Add = ADM_Integrated_Logic_U.GV_Vx_Limit;\r\n } else {\r\n rtb_Add = ADM_Integrated_Logic_U.GV_Vx_Command;\r\n }\r\n } else {\r\n rtb_Add = 0.0;\r\n }\r\n\r\n /* Product: '<S25>/Product' incorporates:\r\n * MATLAB Function: '<S25>/Vx_OutPut_Function'\r\n * Switch: '<S25>/Switch'\r\n */\r\n rtb_Pitch_Angle = rtb_Add * (double)!rtb_Compare_l;\r\n\r\n /* RateLimiter: '<S25>/Input_Vx_RateLimiter' */\r\n rtb_AccFlag = rtb_Pitch_Angle - ADM_Integrated_Logic_DW.PrevY;\r\n if (rtb_AccFlag > 0.004) {\r\n rtb_Vx_Cmd_R = ADM_Integrated_Logic_DW.PrevY + 0.004;\r\n } else if (rtb_AccFlag < -0.008) {\r\n rtb_Vx_Cmd_R = ADM_Integrated_Logic_DW.PrevY - 0.008;\r\n } else {\r\n rtb_Vx_Cmd_R = rtb_Pitch_Angle;\r\n }\r\n\r\n ADM_Integrated_Logic_DW.PrevY = rtb_Vx_Cmd_R;\r\n\r\n /* End of RateLimiter: '<S25>/Input_Vx_RateLimiter' */\r\n\r\n /* Saturate: '<S11>/Pitch_Saturation' incorporates:\r\n * DiscreteIntegrator: '<S11>/Integrator_2'\r\n */\r\n if (ADM_Integrated_Logic_DW.Integrator_2_DSTATE > 8.0) {\r\n rtb_Pitch_Angle = 8.0;\r\n } else if (ADM_Integrated_Logic_DW.Integrator_2_DSTATE < -8.0) {\r\n rtb_Pitch_Angle = -8.0;\r\n } else {\r\n rtb_Pitch_Angle = ADM_Integrated_Logic_DW.Integrator_2_DSTATE;\r\n }\r\n\r\n /* End of Saturate: '<S11>/Pitch_Saturation' */\r\n\r\n /* Delay: '<S70>/Delay' */\r\n if (ADM_Integrated_Logic_DW.icLoad) {\r\n ADM_Integrated_Logic_DW.Delay_DSTATE = rtb_Pitch_Angle;\r\n }\r\n\r\n /* Product: '<S70>/delta rise limit' incorporates:\r\n * Constant: '<S11>/Angle_Upper'\r\n * SampleTimeMath: '<S70>/sample time'\r\n *\r\n * About '<S70>/sample time':\r\n * y = K where K = ( w * Ts )\r\n * */\r\n rtb_Product2_a = 0.002;\r\n\r\n /* Sum: '<S70>/Difference Inputs1' incorporates:\r\n * Delay: '<S70>/Delay'\r\n *\r\n * Block description for '<S70>/Difference Inputs1':\r\n *\r\n * Add in CPU\r\n */\r\n rtb_Pitch_Angle -= ADM_Integrated_Logic_DW.Delay_DSTATE;\r\n\r\n /* Switch: '<S75>/Switch2' incorporates:\r\n * RelationalOperator: '<S75>/LowerRelop1'\r\n */\r\n if (!(rtb_Pitch_Angle > 0.002)) {\r\n /* Switch: '<S75>/Switch' incorporates:\r\n * RelationalOperator: '<S75>/UpperRelop'\r\n */\r\n if (rtb_Pitch_Angle < -0.002) {\r\n rtb_Product2_a = -0.002;\r\n } else {\r\n rtb_Product2_a = rtb_Pitch_Angle;\r\n }\r\n\r\n /* End of Switch: '<S75>/Switch' */\r\n }\r\n\r\n /* End of Switch: '<S75>/Switch2' */\r\n\r\n /* Sum: '<S70>/Difference Inputs2' incorporates:\r\n * Delay: '<S70>/Delay'\r\n *\r\n * Block description for '<S70>/Difference Inputs2':\r\n *\r\n * Add in CPU\r\n */\r\n rtb_Pitch_Angle = rtb_Product2_a + ADM_Integrated_Logic_DW.Delay_DSTATE;\r\n\r\n /* MATLAB Function: '<S63>/Calculate_F_c' incorporates:\r\n * Gain: '<S63>/Gain'\r\n */\r\n ADM_Integrated_Lo_Calculate_F_c(ADM_Integrated_Logic_ConstB.W_value_m,\r\n 0.017453292519943295 * rtb_Pitch_Angle, &rtb_Product2_a);\r\n\r\n /* MATLAB Function: '<S63>/Calculate_F_R' incorporates:\r\n * Gain: '<S63>/Gain1'\r\n */\r\n ADM_Integrated_Lo_Calculate_F_R(ADM_Integrated_Logic_ConstB.Multiply1_i,\r\n ADM_Integrated_Logic_ConstB.Multiply2_f, 0.017453292519943295 *\r\n rtb_Pitch_Angle, &rtb_Integrator_1);\r\n\r\n /* Gain: '<S63>/Gain2' incorporates:\r\n * Constant: '<S63>/Radius'\r\n * Gain: '<S63>/Rolling_Gain'\r\n * Product: '<S63>/Multiply3'\r\n * Sum: '<S63>/Required_Brake_Cal'\r\n */\r\n rtb_Saturation = (0.0 * rtb_Integrator_1 + rtb_Product2_a) * 0.292 *\r\n 0.083822296730930432;\r\n\r\n /* Saturate: '<S63>/Saturation' */\r\n if (rtb_Saturation > 60.0) {\r\n rtb_Saturation = 60.0;\r\n } else if (rtb_Saturation < 0.0) {\r\n rtb_Saturation = 0.0;\r\n }\r\n\r\n /* End of Saturate: '<S63>/Saturation' */\r\n\r\n /* Delay: '<S69>/Delay' */\r\n if (ADM_Integrated_Logic_DW.icLoad_e) {\r\n ADM_Integrated_Logic_DW.Delay_DSTATE_i = rtb_Saturation;\r\n }\r\n\r\n /* Product: '<S69>/delta rise limit' incorporates:\r\n * Constant: '<S11>/Upper_Torq'\r\n * SampleTimeMath: '<S69>/sample time'\r\n *\r\n * About '<S69>/sample time':\r\n * y = K where K = ( w * Ts )\r\n * */\r\n rtb_Product2_a = 0.016;\r\n\r\n /* Sum: '<S69>/Difference Inputs1' incorporates:\r\n * Delay: '<S69>/Delay'\r\n *\r\n * Block description for '<S69>/Difference Inputs1':\r\n *\r\n * Add in CPU\r\n */\r\n rtb_Saturation -= ADM_Integrated_Logic_DW.Delay_DSTATE_i;\r\n\r\n /* Switch: '<S74>/Switch2' incorporates:\r\n * RelationalOperator: '<S74>/LowerRelop1'\r\n */\r\n if (!(rtb_Saturation > 0.016)) {\r\n /* Switch: '<S74>/Switch' incorporates:\r\n * RelationalOperator: '<S74>/UpperRelop'\r\n */\r\n if (rtb_Saturation < -0.16) {\r\n rtb_Product2_a = -0.16;\r\n } else {\r\n rtb_Product2_a = rtb_Saturation;\r\n }\r\n\r\n /* End of Switch: '<S74>/Switch' */\r\n }\r\n\r\n /* End of Switch: '<S74>/Switch2' */\r\n\r\n /* Sum: '<S69>/Difference Inputs2' incorporates:\r\n * Delay: '<S69>/Delay'\r\n *\r\n * Block description for '<S69>/Difference Inputs2':\r\n *\r\n * Add in CPU\r\n */\r\n rtb_Saturation = rtb_Product2_a + ADM_Integrated_Logic_DW.Delay_DSTATE_i;\r\n\r\n /* Gain: '<S11>/Grade_GAIN' */\r\n rtb_Desired_Torque = 0.8 * rtb_Saturation;\r\n\r\n /* RelationalOperator: '<S59>/Compare' incorporates:\r\n * Constant: '<S59>/Constant'\r\n * Inport: '<Root>/GV_BrakeTorqueCommand'\r\n */\r\n rtb_Compare_p = (ADM_Integrated_Logic_U.GV_BrakeTorqueCommand >= 100.0);\r\n\r\n /* Delay: '<S10>/Memory' */\r\n rtb_Memory = ADM_Integrated_Logic_DW.Memory_DSTATE;\r\n\r\n /* MATLAB Function: '<S10>/Gear_FUNCTION1' incorporates:\r\n * Inport: '<Root>/GV_VCU_GearSelStat'\r\n * Inport: '<Root>/GV_Vx_Fbk'\r\n */\r\n if (ADM_Integrated_Logic_U.GV_VCU_GearSelStat == 0.0) {\r\n if ((ADM_Integrated_Logic_U.GV_Vx_Fbk <= 0.0) && rtb_Compare_p) {\r\n rtb_Memory = 0.0;\r\n }\r\n } else {\r\n switch ((int32_t)rtb_Memory) {\r\n case 0:\r\n if ((ADM_Integrated_Logic_U.GV_Vx_Fbk <= 0.0) &&\r\n ((ADM_Integrated_Logic_U.GV_VCU_GearSelStat == 1.0) ||\r\n (ADM_Integrated_Logic_U.GV_VCU_GearSelStat == 3.0) ||\r\n (ADM_Integrated_Logic_U.GV_VCU_GearSelStat == 2.0))) {\r\n rtb_Memory = 2.0;\r\n }\r\n break;\r\n\r\n case 1:\r\n if (ADM_Integrated_Logic_U.GV_VCU_GearSelStat == 2.0) {\r\n rtb_Memory = 2.0;\r\n }\r\n break;\r\n\r\n case 2:\r\n if ((ADM_Integrated_Logic_U.GV_Vx_Fbk <= 0.0) && rtb_Compare_p) {\r\n if (ADM_Integrated_Logic_U.GV_VCU_GearSelStat == 1.0) {\r\n rtb_Memory = 1.0;\r\n } else if (ADM_Integrated_Logic_U.GV_VCU_GearSelStat == 3.0) {\r\n rtb_Memory = 3.0;\r\n }\r\n }\r\n break;\r\n\r\n case 3:\r\n if (ADM_Integrated_Logic_U.GV_VCU_GearSelStat == 2.0) {\r\n rtb_Memory = 2.0;\r\n }\r\n break;\r\n }\r\n }\r\n\r\n /* End of MATLAB Function: '<S10>/Gear_FUNCTION1' */\r\n\r\n /* Chart: '<S11>/Chart' incorporates:\r\n * Constant: '<S11>/Constant'\r\n * Constant: '<S11>/Constant1'\r\n * Inport: '<Root>/GV_MCU_RPM'\r\n */\r\n if (ADM_Integrated_Logic_DW.is_active_c6_ADM_Integrated_Log == 0) {\r\n ADM_Integrated_Logic_DW.is_active_c6_ADM_Integrated_Log = 1U;\r\n ADM_Integrated_Logic_DW.is_c6_ADM_Integrated_Logic = IN_HAC_OFF;\r\n } else if (ADM_Integrated_Logic_DW.is_c6_ADM_Integrated_Logic == IN_HAC_OFF) {\r\n if (ADM_Integrated_Logic_U.GV_MCU_RPM < -50.0) {\r\n ADM_Integrated_Logic_DW.is_c6_ADM_Integrated_Logic = IN_HAC_ON;\r\n } else {\r\n /* Outport: '<Root>/Debug_HAC_RPM_Decision' */\r\n ADM_Integrated_Logic_Y.Debug_HAC_RPM_Decision = 0.0;\r\n }\r\n\r\n /* case IN_HAC_ON: */\r\n } else if (ADM_Integrated_Logic_U.GV_MCU_RPM > 150.0) {\r\n ADM_Integrated_Logic_DW.is_c6_ADM_Integrated_Logic = IN_HAC_OFF;\r\n } else {\r\n /* Outport: '<Root>/Debug_HAC_RPM_Decision' */\r\n ADM_Integrated_Logic_Y.Debug_HAC_RPM_Decision = 1.0;\r\n }\r\n\r\n /* End of Chart: '<S11>/Chart' */\r\n\r\n /* MATLAB Function: '<S11>/HAC_OFF_OK_Func' */\r\n rtb_Brake_Torque_Cmd = 0.0;\r\n\r\n /* Outport: '<Root>/Debug_HAC_FLAG' incorporates:\r\n * MATLAB Function: '<S11>/HAC_OFF_OK_Func'\r\n */\r\n ADM_Integrated_Logic_Y.Debug_HAC_FLAG = 0.0;\r\n\r\n /* MATLAB Function: '<S11>/HAC_OFF_OK_Func' incorporates:\r\n * Constant: '<S11>/Accel_Cmd '\r\n * Constant: '<S11>/Brake_Cmd'\r\n * Constant: '<S11>/Gear_D'\r\n * Inport: '<Root>/GV_BrakeTorqueCommand'\r\n * Inport: '<Root>/GV_MCU_EstTrq'\r\n * Outport: '<Root>/Debug_HAC_RPM_Decision'\r\n * RelationalOperator: '<S11>/Relational Operator'\r\n * RelationalOperator: '<S11>/Relational Operator1'\r\n * RelationalOperator: '<S11>/Relational Operator2'\r\n * Sum: '<S11>/HAC_Flags_Add'\r\n */\r\n if (((double)(((ADM_Integrated_Logic_U.GV_BrakeTorqueCommand <= 20.0) +\r\n (rtb_Vx_Cmd_R <= 2.0)) + (rtb_Memory == 3.0)) + 1.0) +\r\n ADM_Integrated_Logic_Y.Debug_HAC_RPM_Decision >= 5.0) {\r\n if (ADM_Integrated_Logic_DW.HAC_ON_FLAG == 0.0) {\r\n ADM_Integrated_Logic_DW.HAC_ON_Timer = 0.0;\r\n }\r\n\r\n ADM_Integrated_Logic_DW.HAC_ON_FLAG = 1.0;\r\n rtb_Brake_Torque_Cmd = 1000.0;\r\n ADM_Integrated_Logic_DW.Smoothed_Torque = 1000.0;\r\n if (ADM_Integrated_Logic_DW.HAC_ON_Timer < 3.0) {\r\n ADM_Integrated_Logic_DW.HAC_Desired_Torque = rtb_Desired_Torque;\r\n ADM_Integrated_Logic_DW.HAC_ON_Timer += 0.005;\r\n }\r\n\r\n /* Outport: '<Root>/Debug_HAC_FLAG' */\r\n ADM_Integrated_Logic_Y.Debug_HAC_FLAG = 1.0;\r\n } else if (ADM_Integrated_Logic_DW.HAC_ON_FLAG == 1.0) {\r\n if (ADM_Integrated_Logic_U.GV_MCU_EstTrq >=\r\n ADM_Integrated_Logic_DW.HAC_Desired_Torque) {\r\n ADM_Integrated_Logic_DW.Smoothed_Torque -= 0.05 *\r\n ADM_Integrated_Logic_DW.Smoothed_Torque;\r\n if (ADM_Integrated_Logic_DW.Smoothed_Torque < 0.01) {\r\n ADM_Integrated_Logic_DW.Smoothed_Torque = 0.0;\r\n ADM_Integrated_Logic_DW.HAC_ON_FLAG = 0.0;\r\n ADM_Integrated_Logic_DW.HAC_Desired_Torque = 0.0;\r\n ADM_Integrated_Logic_DW.HAC_ON_Timer = 0.0;\r\n }\r\n\r\n rtb_Brake_Torque_Cmd = ADM_Integrated_Logic_DW.Smoothed_Torque;\r\n } else {\r\n rtb_Brake_Torque_Cmd = 1000.0;\r\n ADM_Integrated_Logic_DW.Smoothed_Torque = 1000.0;\r\n\r\n /* Outport: '<Root>/Debug_HAC_FLAG' */\r\n ADM_Integrated_Logic_Y.Debug_HAC_FLAG = 1.0;\r\n }\r\n }\r\n\r\n /* MATLAB Function: '<S28>/MATLAB Function' incorporates:\r\n * Inport: '<Root>/GV_Vx_Fbk'\r\n */\r\n if (fabs(ADM_Integrated_Logic_U.GV_Vx_Fbk) < 0.1) {\r\n rtb_AccFlag = 0.0;\r\n } else {\r\n rtb_AccFlag = 1.0;\r\n }\r\n\r\n /* End of MATLAB Function: '<S28>/MATLAB Function' */\r\n\r\n /* Product: '<S28>/Product2' incorporates:\r\n * Constant: '<S1>/Constant3'\r\n * Product: '<S28>/Product'\r\n * Product: '<S28>/Product1'\r\n * Sum: '<S28>/Subtract'\r\n */\r\n rtb_Product2_a = (0.0 - rtb_Product1 * 1500.0) * rtb_AccFlag;\r\n\r\n /* SampleTimeMath: '<S31>/TSamp'\r\n *\r\n * About '<S31>/TSamp':\r\n * y = u * K where K = 1 / ( w * Ts )\r\n * */\r\n rtb_TSamp = rtb_Product2_a * 500.0;\r\n\r\n /* Sum: '<S28>/Subtract1' incorporates:\r\n * Constant: '<S1>/Constant10'\r\n * Constant: '<S1>/Constant11'\r\n * Constant: '<S1>/Constant13'\r\n * DiscreteIntegrator: '<S28>/Discrete-Time Integrator'\r\n * Product: '<S28>/D controller'\r\n * Product: '<S28>/I controller'\r\n * Product: '<S28>/P controller'\r\n * Sum: '<S31>/Diff'\r\n * UnitDelay: '<S31>/UD'\r\n *\r\n * Block description for '<S31>/Diff':\r\n *\r\n * Add in CPU\r\n *\r\n * Block description for '<S31>/UD':\r\n *\r\n * Store in Global RAM\r\n */\r\n rtb_y = (0.07 * rtb_Product2_a +\r\n ADM_Integrated_Logic_DW.DiscreteTimeIntegrator_DSTATE * 0.2) +\r\n (rtb_TSamp - ADM_Integrated_Logic_DW.UD_DSTATE) * 0.0;\r\n\r\n /* Saturate: '<S28>/Saturation' */\r\n if (rtb_y > 3525.0) {\r\n rtb_y_k = 3525.0;\r\n } else if (rtb_y < -2500.0) {\r\n rtb_y_k = -2500.0;\r\n } else {\r\n rtb_y_k = rtb_y;\r\n }\r\n\r\n /* End of Saturate: '<S28>/Saturation' */\r\n\r\n /* Product: '<S28>/Product3' */\r\n rtb_Switch2_k = rtb_AccFlag * rtb_y_k;\r\n\r\n /* RateLimiter: '<S3>/Rate Limiter' */\r\n rtb_AccFlag = rtb_Switch2_k - ADM_Integrated_Logic_DW.PrevY_b;\r\n if (rtb_AccFlag > 2.0) {\r\n rtb_Switch2_k = ADM_Integrated_Logic_DW.PrevY_b + 2.0;\r\n } else if (rtb_AccFlag < -2.0) {\r\n rtb_Switch2_k = ADM_Integrated_Logic_DW.PrevY_b - 2.0;\r\n }\r\n\r\n ADM_Integrated_Logic_DW.PrevY_b = rtb_Switch2_k;\r\n\r\n /* End of RateLimiter: '<S3>/Rate Limiter' */\r\n\r\n /* Product: '<S3>/Product' incorporates:\r\n * MATLAB Function: '<S3>/MATLAB Function1'\r\n */\r\n rtb_Product_h = (double)(rtb_Memory == 3.0) * rtb_Switch2_k;\r\n\r\n /* MATLAB Function: '<S3>/MATLAB Function' */\r\n if (!(rtb_Product_h >= 0.0)) {\r\n rtb_Product_h = 0.0;\r\n }\r\n\r\n /* End of MATLAB Function: '<S3>/MATLAB Function' */\r\n\r\n /* DiscreteTransferFcn: '<S1>/Discrete Transfer Fcn' */\r\n DiscreteTransferFcn = 0.0625 *\r\n ADM_Integrated_Logic_DW.DiscreteTransferFcn_states;\r\n\r\n /* MATLAB Function: '<S6>/MATLAB Function' incorporates:\r\n * Inport: '<Root>/GV_Vx_Fbk'\r\n */\r\n if (!ADM_Integrated_Logic_DW.x_f_not_empty) {\r\n ADM_Integrated_Logic_DW.x_f_not_empty = true;\r\n ADM_Integrated_Logic_DW.x_f.contents = ADM_Integrated_Logic_U.GV_Vx_Fbk;\r\n ADM_Integrated_Logic_DW.y_prev = 0.0;\r\n }\r\n\r\n ADM_Integrated_Logic_DW.x_f.contents += (ADM_Integrated_Logic_U.GV_Vx_Fbk -\r\n ADM_Integrated_Logic_DW.x_f.contents) * 0.024390243902439025;\r\n if (!ADM_Integrated_Logic_DW.xf_p_not_empty) {\r\n ADM_Integrated_Logic_DW.xf_p = ADM_Integrated_Logic_DW.x_f.contents;\r\n ADM_Integrated_Logic_DW.xf_p_not_empty = true;\r\n }\r\n\r\n rtb_AccFlag = ADM_Integrated_Logic_DW.xf_p;\r\n ADM_Integrated_Logic_DW.xf_p = ADM_Integrated_Logic_DW.x_f.contents;\r\n rtb_dVx = (ADM_Integrated_Logic_DW.x_f.contents - rtb_AccFlag) / 0.002 +\r\n 0.90483741803595952 * ADM_Integrated_Logic_DW.y_prev;\r\n ADM_Integrated_Logic_DW.y_prev = rtb_dVx;\r\n\r\n /* End of MATLAB Function: '<S6>/MATLAB Function' */\r\n\r\n /* Gain: '<S6>/Brake_GAIN' */\r\n rtb_Integrator_1 = -80.0 * DiscreteTransferFcn;\r\n\r\n /* MATLAB Function: '<S6>/GearCondition_Brake' */\r\n if (rtb_Memory == 1.0) {\r\n i = -1;\r\n } else {\r\n i = (rtb_Memory == 3.0);\r\n }\r\n\r\n /* Saturate: '<S6>/Saturation' */\r\n if (rtb_Integrator_1 > 1000.0) {\r\n rtb_Integrator_1 = 1000.0;\r\n } else if (rtb_Integrator_1 < 0.0) {\r\n rtb_Integrator_1 = 0.0;\r\n }\r\n\r\n /* Product: '<S6>/Multiply2' incorporates:\r\n * MATLAB Function: '<S6>/GearCondition_Brake'\r\n * Saturate: '<S6>/Saturation'\r\n */\r\n rtb_Switch2_k = (double)i * rtb_Integrator_1;\r\n\r\n /* RateLimiter: '<S6>/Brake_Out_RateLimiter' */\r\n rtb_AccFlag = rtb_Switch2_k - ADM_Integrated_Logic_DW.PrevY_o;\r\n if (rtb_AccFlag > 3.0) {\r\n rtb_Switch2_k = ADM_Integrated_Logic_DW.PrevY_o + 3.0;\r\n } else if (rtb_AccFlag < -3.0) {\r\n rtb_Switch2_k = ADM_Integrated_Logic_DW.PrevY_o - 3.0;\r\n }\r\n\r\n ADM_Integrated_Logic_DW.PrevY_o = rtb_Switch2_k;\r\n\r\n /* End of RateLimiter: '<S6>/Brake_Out_RateLimiter' */\r\n\r\n /* Saturate: '<S6>/Brake_Saturation' */\r\n if (rtb_Switch2_k > 1000.0) {\r\n rtb_Brake_Control = 1000.0;\r\n } else if (rtb_Switch2_k < 0.0) {\r\n rtb_Brake_Control = 0.0;\r\n } else {\r\n rtb_Brake_Control = rtb_Switch2_k;\r\n }\r\n\r\n /* End of Saturate: '<S6>/Brake_Saturation' */\r\n\r\n /* MATLAB Function: '<S6>/Target_RPM' */\r\n if (rtb_Memory == 0.0) {\r\n i = 0;\r\n } else if (rtb_Memory == 2.0) {\r\n i = 0;\r\n } else if (rtb_Memory == 1.0) {\r\n i = -1;\r\n } else {\r\n i = (rtb_Memory == 3.0);\r\n }\r\n\r\n rtb_Target_RPM = rtb_Vx_Cmd_R * 1000.0 / 3600.0 * 11.93 * 60.0 /\r\n 1.7013672006633955 * (double)i;\r\n\r\n /* End of MATLAB Function: '<S6>/Target_RPM' */\r\n\r\n /* RateLimiter: '<S6>/TargetSpd_RateLimiter' */\r\n rtb_AccFlag = rtb_Target_RPM - ADM_Integrated_Logic_DW.PrevY_a;\r\n if (rtb_AccFlag > 0.4) {\r\n rtb_AccFlag = ADM_Integrated_Logic_DW.PrevY_a + 0.4;\r\n } else if (rtb_AccFlag < -0.8) {\r\n rtb_AccFlag = ADM_Integrated_Logic_DW.PrevY_a - 0.8;\r\n } else {\r\n rtb_AccFlag = rtb_Target_RPM;\r\n }\r\n\r\n ADM_Integrated_Logic_DW.PrevY_a = rtb_AccFlag;\r\n\r\n /* End of RateLimiter: '<S6>/TargetSpd_RateLimiter' */\r\n\r\n /* Product: '<S38>/Product1' incorporates:\r\n * Constant: '<S38>/Constant'\r\n * Gain: '<S38>/gain'\r\n * Product: '<S38>/Product11'\r\n * Sum: '<S38>/Sum1'\r\n * Sum: '<S38>/Sum2'\r\n * Sum: '<S38>/Sum3'\r\n * Sum: '<S38>/Sum4'\r\n * UnitDelay: '<S38>/d'\r\n * UnitDelay: '<S38>/d1'\r\n */\r\n rtb_Target_RPM = ((rtb_AccFlag + ADM_Integrated_Logic_DW.d1_DSTATE_c) * 0.002\r\n + 0.1041032953945969 * ADM_Integrated_Logic_DW.d_DSTATE_l) /\r\n 0.1081032953945969;\r\n\r\n /* Sum: '<S51>/Sum1' incorporates:\r\n * Gain: '<S51>/gain'\r\n * Sum: '<S51>/Sum2'\r\n * UnitDelay: '<S51>/d'\r\n * UnitDelay: '<S51>/d1'\r\n */\r\n rtb_Sum1_i2 = (rtb_Target_RPM - ADM_Integrated_Logic_DW.d_DSTATE_i) * 1000.0 -\r\n ADM_Integrated_Logic_DW.d1_DSTATE_p;\r\n\r\n /* Sum: '<S52>/Sum1' incorporates:\r\n * Gain: '<S52>/gain'\r\n * Sum: '<S52>/Sum2'\r\n * UnitDelay: '<S52>/d'\r\n * UnitDelay: '<S52>/d1'\r\n */\r\n rtb_Sum1_o1 = (rtb_Sum1_i2 - ADM_Integrated_Logic_DW.d_DSTATE_c) * 1000.0 -\r\n ADM_Integrated_Logic_DW.d1_DSTATE_h;\r\n\r\n /* Sum: '<S53>/Sum1' incorporates:\r\n * Gain: '<S53>/gain'\r\n * Sum: '<S53>/Sum2'\r\n * UnitDelay: '<S53>/d'\r\n * UnitDelay: '<S53>/d1'\r\n */\r\n rtb_Sum1_lm = (rtb_Sum1_o1 - ADM_Integrated_Logic_DW.d_DSTATE_d) * 1000.0 -\r\n ADM_Integrated_Logic_DW.d1_DSTATE_l;\r\n\r\n /* Gain: '<S49>/Gain' incorporates:\r\n * Constant: '<S49>/Constant3'\r\n * Constant: '<S49>/Constant4'\r\n * Constant: '<S49>/Constant5'\r\n * Product: '<S49>/Product'\r\n * Product: '<S49>/Product1'\r\n * Product: '<S49>/Product2'\r\n * Sum: '<S49>/Add5'\r\n */\r\n rtb_Gain_c = (((156.8 * rtb_Target_RPM + 212.8 * rtb_Sum1_i2) + 21.8 *\r\n rtb_Sum1_o1) + rtb_Sum1_lm) * 9.44822373393802E-6;\r\n\r\n /* Product: '<S55>/Product1' incorporates:\r\n * Constant: '<S55>/Constant1'\r\n * Constant: '<S55>/Constant2'\r\n * Delay: '<S55>/Delay'\r\n * Delay: '<S55>/Delay1'\r\n * Delay: '<S55>/Delay2'\r\n * Delay: '<S55>/Delay3'\r\n * Gain: '<S55>/gain1'\r\n * Gain: '<S55>/gain3'\r\n * Product: '<S55>/x(n), x(n-1), x(n-2)'\r\n * Product: '<S55>/y(n-1)'\r\n * Product: '<S55>/y(n-2)'\r\n * Sum: '<S55>/Sum1'\r\n * Sum: '<S55>/Sum2'\r\n * Sum: '<S55>/Sum3'\r\n * Sum: '<S55>/Sum4'\r\n * Sum: '<S55>/Sum5'\r\n * Sum: '<S55>/Sum6'\r\n */\r\n rtb_Product1_pd = ((((2.0 * ADM_Integrated_Logic_DW.Delay1_DSTATE + rtb_Gain_c)\r\n + ADM_Integrated_Logic_DW.Delay_DSTATE_c[0]) *\r\n 0.39478417604357435 - -7.2104316479128512 *\r\n ADM_Integrated_Logic_DW.Delay2_DSTATE) -\r\n 2.6178993711731877 * ADM_Integrated_Logic_DW.Delay3_DSTATE\r\n [0]) / 6.1716689809139611;\r\n\r\n /* Product: '<S54>/Product1' incorporates:\r\n * Constant: '<S54>/Constant'\r\n * Gain: '<S54>/gain'\r\n * Product: '<S54>/Product11'\r\n * Sum: '<S54>/Sum1'\r\n * Sum: '<S54>/Sum2'\r\n * Sum: '<S54>/Sum3'\r\n * Sum: '<S54>/Sum4'\r\n * UnitDelay: '<S54>/d'\r\n * UnitDelay: '<S54>/d1'\r\n */\r\n rtb_Product1_m = ((rtb_Product1_pd + ADM_Integrated_Logic_DW.d1_DSTATE_e) *\r\n 0.002 + 0.00861032953945969 *\r\n ADM_Integrated_Logic_DW.d_DSTATE_ij) / 0.01261032953945969;\r\n\r\n /* Sum: '<S6>/Subtract' incorporates:\r\n * Inport: '<Root>/GV_MCU_RPM'\r\n * MultiPortSwitch: '<S48>/Multiport Switch1'\r\n */\r\n rtb_Error_m = rtb_Target_RPM - ADM_Integrated_Logic_U.GV_MCU_RPM;\r\n\r\n /* Saturate: '<S6>/Error_Saturation' incorporates:\r\n * MultiPortSwitch: '<S48>/Multiport Switch1'\r\n */\r\n if (rtb_Error_m > 2000.0) {\r\n rtb_Error_m = 2000.0;\r\n } else if (rtb_Error_m < -2000.0) {\r\n rtb_Error_m = -2000.0;\r\n }\r\n\r\n /* End of Saturate: '<S6>/Error_Saturation' */\r\n\r\n /* DeadZone: '<S35>/Dead Zone' incorporates:\r\n * MultiPortSwitch: '<S48>/Multiport Switch1'\r\n */\r\n if (rtb_Error_m > 50.0) {\r\n rtb_Add = rtb_Error_m - 50.0;\r\n } else if (rtb_Error_m >= -50.0) {\r\n rtb_Add = 0.0;\r\n } else {\r\n rtb_Add = rtb_Error_m - -50.0;\r\n }\r\n\r\n /* Sum: '<S43>/Sum1' incorporates:\r\n * Gain: '<S43>/gain'\r\n * Sum: '<S43>/Sum2'\r\n * UnitDelay: '<S43>/d'\r\n * UnitDelay: '<S43>/d1'\r\n */\r\n rtb_Error_m = (rtb_Target_RPM - ADM_Integrated_Logic_DW.d_DSTATE_ir) * 1000.0\r\n - ADM_Integrated_Logic_DW.d1_DSTATE_o;\r\n\r\n /* Sum: '<S44>/Sum1' incorporates:\r\n * Gain: '<S44>/gain'\r\n * Sum: '<S44>/Sum2'\r\n * UnitDelay: '<S44>/d'\r\n * UnitDelay: '<S44>/d1'\r\n */\r\n rtb_Sum1_aj = (rtb_Error_m - ADM_Integrated_Logic_DW.d_DSTATE_m) * 1000.0 -\r\n ADM_Integrated_Logic_DW.d1_DSTATE_hm;\r\n\r\n /* Sum: '<S45>/Sum1' incorporates:\r\n * Gain: '<S45>/gain'\r\n * Sum: '<S45>/Sum2'\r\n * UnitDelay: '<S45>/d'\r\n * UnitDelay: '<S45>/d1'\r\n */\r\n rtb_Sum1_p = (rtb_Sum1_aj - ADM_Integrated_Logic_DW.d_DSTATE_mw) * 1000.0 -\r\n ADM_Integrated_Logic_DW.d1_DSTATE_g;\r\n\r\n /* Sum: '<S33>/Add3' incorporates:\r\n * Constant: '<S33>/Constant3'\r\n * Constant: '<S33>/Constant4'\r\n * Constant: '<S33>/Constant5'\r\n * Gain: '<S33>/Gain'\r\n * Memory: '<S6>/Memory'\r\n * Product: '<S33>/Product2'\r\n * Product: '<S33>/Product3'\r\n * Product: '<S33>/Product4'\r\n * Sum: '<S33>/Add2'\r\n */\r\n rtb_Add3 = (((156.8 * rtb_Target_RPM + 212.8 * rtb_Error_m) + 21.8 *\r\n rtb_Sum1_aj) + rtb_Sum1_p) * 9.44822373393802E-6 -\r\n ADM_Integrated_Logic_DW.Memory_PreviousInput;\r\n\r\n /* Product: '<S46>/Product1' incorporates:\r\n * Constant: '<S46>/Constant'\r\n * Gain: '<S46>/gain'\r\n * Product: '<S46>/Product11'\r\n * Sum: '<S46>/Sum1'\r\n * Sum: '<S46>/Sum2'\r\n * Sum: '<S46>/Sum3'\r\n * Sum: '<S46>/Sum4'\r\n * UnitDelay: '<S46>/d'\r\n * UnitDelay: '<S46>/d1'\r\n */\r\n rtb_Product1_k3 = ((rtb_Add3 + ADM_Integrated_Logic_DW.d1_DSTATE_ej) * 0.002 +\r\n 0.029830988618379066 * ADM_Integrated_Logic_DW.d_DSTATE_j) /\r\n 0.03383098861837907;\r\n\r\n /* Product: '<S47>/Product1' incorporates:\r\n * Constant: '<S47>/Constant1'\r\n * Constant: '<S47>/Constant2'\r\n * Delay: '<S47>/Delay'\r\n * Delay: '<S47>/Delay1'\r\n * Delay: '<S47>/Delay2'\r\n * Delay: '<S47>/Delay3'\r\n * Gain: '<S47>/gain1'\r\n * Gain: '<S47>/gain3'\r\n * Product: '<S47>/x(n), x(n-1), x(n-2)'\r\n * Product: '<S47>/y(n-1)'\r\n * Product: '<S47>/y(n-2)'\r\n * Sum: '<S47>/Sum1'\r\n * Sum: '<S47>/Sum2'\r\n * Sum: '<S47>/Sum3'\r\n * Sum: '<S47>/Sum4'\r\n * Sum: '<S47>/Sum5'\r\n * Sum: '<S47>/Sum6'\r\n */\r\n rtb_Product1_h = ((((2.0 * ADM_Integrated_Logic_DW.Delay1_DSTATE_c +\r\n rtb_Product1_k3) +\r\n ADM_Integrated_Logic_DW.Delay_DSTATE_p[0]) *\r\n 0.00035530575843921691 - -7.9992893884831213 *\r\n ADM_Integrated_Logic_DW.Delay2_DSTATE_n) -\r\n 3.9470487616123275 *\r\n ADM_Integrated_Logic_DW.Delay3_DSTATE_h[0]) /\r\n 4.0536618499045511;\r\n\r\n /* MATLAB Function: '<S6>/DOB_Gain' incorporates:\r\n * Inport: '<Root>/GV_Vx_Fbk'\r\n */\r\n if (ADM_Integrated_Logic_U.GV_Vx_Fbk < 5.0) {\r\n rtb_Switch2_k = 0.0;\r\n } else {\r\n rtb_Switch2_k = (ADM_Integrated_Logic_U.GV_Vx_Fbk - 5.0) * 0.2;\r\n }\r\n\r\n if (rtb_Switch2_k >= 1.0) {\r\n rtb_Switch2_k = 1.0;\r\n }\r\n\r\n /* End of MATLAB Function: '<S6>/DOB_Gain' */\r\n\r\n /* Product: '<S6>/Product1' incorporates:\r\n * Constant: '<S6>/DOBFlag'\r\n * Product: '<S6>/Product'\r\n */\r\n rtb_Integrator_1 = -(rtb_Product1_h * 0.9);\r\n\r\n /* Saturate: '<S6>/DOB_Saturation' */\r\n if (rtb_Integrator_1 > 30.0) {\r\n rtb_Integrator_1 = 30.0;\r\n } else if (rtb_Integrator_1 < -30.0) {\r\n rtb_Integrator_1 = -30.0;\r\n }\r\n\r\n /* Sum: '<S6>/Subtract2' incorporates:\r\n * DeadZone: '<S35>/Dead Zone'\r\n * MultiPortSwitch: '<S48>/Multiport Switch1'\r\n * Product: '<S50>/Product'\r\n * Product: '<S6>/Multiply1'\r\n * Saturate: '<S6>/DOB_Saturation'\r\n * Sum: '<S35>/Add'\r\n */\r\n rtb_Integrator_1 = (rtb_Add * 0.044648264844923756 + rtb_Product1_m) +\r\n rtb_Integrator_1 * rtb_Switch2_k;\r\n\r\n /* Saturate: '<S6>/Torq_Saturation' */\r\n if (rtb_Integrator_1 > 80.0) {\r\n rtb_Add = 80.0;\r\n } else if (rtb_Integrator_1 < -80.0) {\r\n rtb_Add = -80.0;\r\n } else {\r\n rtb_Add = rtb_Integrator_1;\r\n }\r\n\r\n /* End of Saturate: '<S6>/Torq_Saturation' */\r\n\r\n /* MATLAB Function: '<S41>/Calculate_F_c' incorporates:\r\n * Gain: '<S41>/Gain'\r\n * Inport: '<Root>/GV_SP_Slope'\r\n */\r\n ADM_Integrated_Lo_Calculate_F_c(ADM_Integrated_Logic_ConstB.W_value,\r\n 0.017453292519943295 * ADM_Integrated_Logic_U.GV_SP_Slope, &rtb_Switch2_k);\r\n\r\n /* MATLAB Function: '<S41>/Calculate_F_R' incorporates:\r\n * Gain: '<S41>/Gain1'\r\n * Inport: '<Root>/GV_SP_Slope'\r\n */\r\n ADM_Integrated_Lo_Calculate_F_R(ADM_Integrated_Logic_ConstB.Multiply1,\r\n ADM_Integrated_Logic_ConstB.Multiply2, 0.017453292519943295 *\r\n ADM_Integrated_Logic_U.GV_SP_Slope, &rtb_Integrator_1);\r\n\r\n /* MATLAB Function: '<S6>/Mode_and_blend' incorporates:\r\n * Constant: '<S6>/Constant2'\r\n * Constant: '<S6>/Constant4'\r\n * Constant: '<S6>/Constant5'\r\n * Constant: '<S6>/Constant6'\r\n * Constant: '<S6>/Constant7'\r\n * Constant: '<S6>/Constant8'\r\n */\r\n ADM_Integrated_Logic_DW.t_hold += 0.002;\r\n switch (ADM_Integrated_Logic_DW.st) {\r\n case 1:\r\n e_off = 0.08;\r\n break;\r\n\r\n case 2:\r\n e_off = -0.08;\r\n break;\r\n\r\n default:\r\n e_off = 0.0;\r\n break;\r\n }\r\n\r\n rtb_dVx = (tanh((DiscreteTransferFcn + e_off) * 5.0 + 0.02 * rtb_dVx) + 1.0) *\r\n 0.5 + 0.05;\r\n if (!(rtb_dVx >= 0.0)) {\r\n rtb_dVx = 0.0;\r\n }\r\n\r\n if (!(rtb_dVx <= 1.0)) {\r\n rtb_dVx = 1.0;\r\n }\r\n\r\n if ((rtb_dVx > 0.75) && (ADM_Integrated_Logic_DW.t_hold >= 0.06)) {\r\n ADM_Integrated_Logic_DW.st = 1;\r\n ADM_Integrated_Logic_DW.t_hold = 0.0;\r\n } else if ((rtb_dVx < 0.25) && (ADM_Integrated_Logic_DW.t_hold >= 0.06)) {\r\n ADM_Integrated_Logic_DW.st = 2;\r\n ADM_Integrated_Logic_DW.t_hold = 0.0;\r\n } else if (ADM_Integrated_Logic_DW.t_hold >= 0.06) {\r\n ADM_Integrated_Logic_DW.st = 0;\r\n }\r\n\r\n ADM_Integrated_Logic_DW.w += (rtb_dVx - ADM_Integrated_Logic_DW.w) *\r\n 0.033333333333333333;\r\n rtb_dVx = fabs(DiscreteTransferFcn) / 0.4;\r\n if ((rtb_dVx <= 0.0) || rtIsNaN(rtb_dVx)) {\r\n rtb_dVx = 0.0;\r\n }\r\n\r\n if (rtb_dVx >= 1.0) {\r\n rtb_dVx = 1.0;\r\n }\r\n\r\n /* Gain: '<S41>/Gain2' incorporates:\r\n * Constant: '<S41>/Radius'\r\n * Gain: '<S41>/Rolling_Gain'\r\n * Product: '<S41>/Multiply3'\r\n * Sum: '<S41>/Required_Brake_Cal'\r\n */\r\n rtb_Integrator_1 = (0.0 * rtb_Integrator_1 + rtb_Switch2_k) * 0.292 *\r\n 0.083822296730930432;\r\n\r\n /* MATLAB Function: '<S6>/Gear_pos_out' */\r\n if (rtb_Memory == 0.0) {\r\n i = 0;\r\n } else if (rtb_Memory == 2.0) {\r\n i = 0;\r\n } else if (rtb_Memory == 1.0) {\r\n i = -1;\r\n } else {\r\n i = (rtb_Memory == 3.0);\r\n }\r\n\r\n /* Saturate: '<S41>/Saturation' */\r\n if (rtb_Integrator_1 > 60.0) {\r\n rtb_Integrator_1 = 60.0;\r\n } else if (rtb_Integrator_1 < 0.0) {\r\n rtb_Integrator_1 = 0.0;\r\n }\r\n\r\n /* Product: '<S6>/Multiply' incorporates:\r\n * Constant: '<S6>/Constant10'\r\n * Inport: '<Root>/GV_SP_AngleCompensationFlag'\r\n * MATLAB Function: '<S6>/Gear_pos_out'\r\n * Product: '<S6>/Product3'\r\n * Product: '<S6>/Product4'\r\n * RelationalOperator: '<S6>/Relational Operator1'\r\n * Saturate: '<S41>/Saturation'\r\n * Sum: '<S6>/Add'\r\n */\r\n rtb_Integrator_1 = ((double)\r\n (ADM_Integrated_Logic_U.GV_SP_AngleCompensationFlag ?\r\n rtb_Vx_Cmd_R >= 1.0 : 0) * rtb_Integrator_1 + rtb_Add) *\r\n (double)i;\r\n\r\n /* MATLAB Function: '<S6>/Mode_and_blend' incorporates:\r\n * Constant: '<S6>/Constant9'\r\n */\r\n if (!(rtb_Integrator_1 >= 0.0)) {\r\n rtb_Integrator_1 = 0.0;\r\n }\r\n\r\n DiscreteTransferFcn = rtb_Integrator_1 * ADM_Integrated_Logic_DW.w * rtb_dVx;\r\n if (!(rtb_Brake_Control >= 0.0)) {\r\n rtb_Brake_Control = 0.0;\r\n }\r\n\r\n rtb_Switch2_k = (1.0 - ADM_Integrated_Logic_DW.w) * rtb_Brake_Control *\r\n rtb_dVx;\r\n if ((DiscreteTransferFcn > 0.0) && (rtb_Switch2_k > 0.0)) {\r\n if (DiscreteTransferFcn > rtb_Switch2_k) {\r\n rtb_Switch2_k *= 0.6;\r\n } else {\r\n DiscreteTransferFcn *= 0.6;\r\n }\r\n }\r\n\r\n if (DiscreteTransferFcn < 0.3) {\r\n DiscreteTransferFcn = 0.0;\r\n }\r\n\r\n if (rtb_Switch2_k < 0.3) {\r\n rtb_Switch2_k = 0.0;\r\n }\r\n\r\n /* MATLAB Function: '<S1>/Emergency_Brake_Func' incorporates:\r\n * Inport: '<Root>/GV_Vx_Fbk'\r\n * MATLAB Function: '<S6>/Mode_and_blend'\r\n * Sum: '<S1>/Add'\r\n */\r\n if (rtb_Compare_l) {\r\n rtb_Brake_Control = ADM_Integrated_Logic_U.GV_Vx_Fbk * 100.0;\r\n } else {\r\n rtb_Brake_Control = rtb_Brake_Torque_Cmd + rtb_Switch2_k;\r\n }\r\n\r\n /* Saturate: '<S1>/Brake_Saturation' incorporates:\r\n * MATLAB Function: '<S1>/Emergency_Brake_Func'\r\n */\r\n if (rtb_Brake_Control > 2500.0) {\r\n rtb_Brake_Control = 2500.0;\r\n } else if (rtb_Brake_Control < 0.0) {\r\n rtb_Brake_Control = 0.0;\r\n }\r\n\r\n /* End of Saturate: '<S1>/Brake_Saturation' */\r\n\r\n /* Outputs for Enabled SubSystem: '<S1>/Enabled Subsystem' incorporates:\r\n * EnablePort: '<S9>/Enable'\r\n */\r\n /* MATLAB Function: '<S1>/MATLAB Function4' incorporates:\r\n * Inport: '<Root>/GV_Drive_ACC_Cmd'\r\n * Inport: '<Root>/GV_MCU_EstTrq'\r\n * Inport: '<Root>/GV_Vx_Fbk'\r\n * MATLAB Function: '<S1>/IDB_Fault_Injection'\r\n */\r\n if (((rtb_Vx_Cmd_R >= 1.0) || (ADM_Integrated_Logic_U.GV_Drive_ACC_Cmd >= 0.01))\r\n && (ADM_Integrated_Logic_U.GV_MCU_EstTrq >= 10.0) && (rtb_Product1 >= 0.2)\r\n && (ADM_Integrated_Logic_U.GV_Vx_Fbk >= 1.5) && (rtb_Brake_Control <= 10.0))\r\n {\r\n /* MATLAB Function: '<S9>/MATLAB Function' incorporates:\r\n * Constant: '<S1>/Constant9'\r\n * Inport: '<Root>/GV_IMU_AZ_Val'\r\n * MATLAB Function: '<S1>/MATLAB Function'\r\n */\r\n ADM_Integrated_Logic_DW.M = ADM_Integrated_Logic_U.GV_MCU_EstTrq / ((0.01 *\r\n ADM_Integrated_Logic_U.GV_IMU_AZ_Val + ADM_Integrated_Logic_DW.x_hat[1]) *\r\n 0.022698910310142498);\r\n\r\n /* MATLAB Function: '<S1>/MATLAB Function3' */\r\n if ((ADM_Integrated_Logic_DW.M > 500.0) && (ADM_Integrated_Logic_DW.M <\r\n 2000.0)) {\r\n if (fabs(ADM_Integrated_Logic_DW.M -\r\n ADM_Integrated_Logic_DW.currentEstMass) /\r\n ADM_Integrated_Logic_DW.currentEstMass < 0.2) {\r\n rtb_Integrator_1 = ADM_Integrated_Logic_DW.currentEstMass;\r\n ADM_Integrated_Logic_DW.currentEstMass = 0.98 *\r\n ADM_Integrated_Logic_DW.currentEstMass + 0.02 *\r\n ADM_Integrated_Logic_DW.M;\r\n ADM_Integrated_Logic_DW.isConverged = ((fabs\r\n (ADM_Integrated_Logic_DW.currentEstMass - rtb_Integrator_1) < 5.0) ||\r\n ADM_Integrated_Logic_DW.isConverged);\r\n if (ADM_Integrated_Logic_DW.isConverged) {\r\n /* Outport: '<Root>/GV_VCU_EstMassFlag' */\r\n ADM_Integrated_Logic_Y.GV_VCU_EstMassFlag = 2.0;\r\n } else {\r\n /* Outport: '<Root>/GV_VCU_EstMassFlag' */\r\n ADM_Integrated_Logic_Y.GV_VCU_EstMassFlag = 1.0;\r\n }\r\n } else {\r\n ADM_Integrated_Logic_DW.isConverged = false;\r\n\r\n /* Outport: '<Root>/GV_VCU_EstMassFlag' */\r\n ADM_Integrated_Logic_Y.GV_VCU_EstMassFlag = 1.0;\r\n }\r\n } else {\r\n ADM_Integrated_Logic_DW.isConverged = false;\r\n\r\n /* Outport: '<Root>/GV_VCU_EstMassFlag' */\r\n ADM_Integrated_Logic_Y.GV_VCU_EstMassFlag = 1.0;\r\n }\r\n } else {\r\n /* MATLAB Function: '<S1>/MATLAB Function3' */\r\n ADM_Integrated_Logic_DW.isConverged = false;\r\n\r\n /* Outport: '<Root>/GV_VCU_EstMassFlag' incorporates:\r\n * MATLAB Function: '<S1>/MATLAB Function3'\r\n */\r\n ADM_Integrated_Logic_Y.GV_VCU_EstMassFlag = 0.0;\r\n }\r\n\r\n /* End of MATLAB Function: '<S1>/MATLAB Function4' */\r\n /* End of Outputs for SubSystem: '<S1>/Enabled Subsystem' */\r\n\r\n /* Outport: '<Root>/GV_VCU_EstMass' incorporates:\r\n * MATLAB Function: '<S1>/MATLAB Function3'\r\n */\r\n ADM_Integrated_Logic_Y.GV_VCU_EstMass = ADM_Integrated_Logic_DW.currentEstMass;\r\n\r\n /* Outport: '<Root>/GV_Brake_Command' incorporates:\r\n * MATLAB Function: '<S1>/IDB_Fault_Injection'\r\n */\r\n ADM_Integrated_Logic_Y.GV_Brake_Command = rtb_Brake_Control;\r\n\r\n /* Outport: '<Root>/Target_IDB_Out' incorporates:\r\n * MATLAB Function: '<S1>/IDB_Fault_Injection'\r\n */\r\n ADM_Integrated_Logic_Y.Target_IDB_Out = rtb_Brake_Control;\r\n\r\n /* MATLAB Function: '<S1>/Emergency_Motor_Func' incorporates:\r\n * Inport: '<Root>/GV_IDB_ECU_Fault_Flag'\r\n * Inport: '<Root>/GV_RCU_ECU_Fault_Flag'\r\n * Inport: '<Root>/GV_Vx_Fbk'\r\n * MATLAB Function: '<S6>/Mode_and_blend'\r\n * Saturate: '<S1>/Saturation'\r\n */\r\n if (rtb_Compare_l) {\r\n if ((ADM_Integrated_Logic_U.GV_IDB_ECU_Fault_Flag == 1.0) &&\r\n (ADM_Integrated_Logic_U.GV_RCU_ECU_Fault_Flag == 1.0)) {\r\n if (ADM_Integrated_Logic_U.GV_Vx_Fbk / 3.6 > 0.5) {\r\n DiscreteTransferFcn = -80.0;\r\n } else {\r\n DiscreteTransferFcn = 0.0;\r\n }\r\n } else {\r\n DiscreteTransferFcn = 0.0;\r\n }\r\n } else if (DiscreteTransferFcn > 80.0) {\r\n /* Saturate: '<S1>/Saturation' */\r\n DiscreteTransferFcn = 80.0;\r\n }\r\n\r\n /* End of MATLAB Function: '<S1>/Emergency_Motor_Func' */\r\n\r\n /* MATLAB Function: '<S1>/MCU_Fault_Injection' incorporates:\r\n * Inport: '<Root>/GV_MCU_Actuator_Fault_Flag'\r\n */\r\n if (ADM_Integrated_Logic_U.GV_MCU_Actuator_Fault_Flag == 1.0) {\r\n /* Outport: '<Root>/GV_Motor_Torque_Cmd' */\r\n ADM_Integrated_Logic_Y.GV_Motor_Torque_Cmd = 0.0;\r\n } else {\r\n /* Outport: '<Root>/GV_Motor_Torque_Cmd' */\r\n ADM_Integrated_Logic_Y.GV_Motor_Torque_Cmd = DiscreteTransferFcn;\r\n }\r\n\r\n /* Outport: '<Root>/Target_MCU_Out' incorporates:\r\n * MATLAB Function: '<S1>/MCU_Fault_Injection'\r\n */\r\n ADM_Integrated_Logic_Y.Target_MCU_Out = DiscreteTransferFcn;\r\n\r\n /* Outport: '<Root>/Debug_AccControl_TorqueCmd' incorporates:\r\n * Constant: '<S3>/Constant'\r\n * Constant: '<S3>/Constant1'\r\n * Product: '<S3>/Product1'\r\n * Product: '<S3>/Product2'\r\n */\r\n ADM_Integrated_Logic_Y.Debug_AccControl_TorqueCmd = rtb_Product_h * 0.270798 /\r\n 11.93;\r\n\r\n /* Outport: '<Root>/Debug_CC_Brake_Output' incorporates:\r\n * MATLAB Function: '<S6>/Mode_and_blend'\r\n */\r\n ADM_Integrated_Logic_Y.Debug_CC_Brake_Output = rtb_Switch2_k;\r\n\r\n /* Sum: '<S28>/Sum' */\r\n DiscreteTransferFcn = rtb_y - rtb_y_k;\r\n\r\n /* Outport: '<Root>/Debug_HAC_Brake_Output' */\r\n ADM_Integrated_Logic_Y.Debug_HAC_Brake_Output = rtb_Brake_Torque_Cmd;\r\n\r\n /* Outport: '<Root>/GV_Gear_Postion_Out' */\r\n ADM_Integrated_Logic_Y.GV_Gear_Postion_Out = rtb_Memory;\r\n\r\n /* Outport: '<Root>/GV_Hill_Torque_Assist' */\r\n ADM_Integrated_Logic_Y.GV_Hill_Torque_Assist = rtb_Desired_Torque;\r\n\r\n /* Outport: '<Root>/Debug_HAC_Pitch_angle' */\r\n ADM_Integrated_Logic_Y.Debug_HAC_Pitch_angle = rtb_Pitch_Angle;\r\n\r\n /* MATLAB Function: '<S63>/Calculate_F_c1' incorporates:\r\n * Gain: '<S63>/Gain3'\r\n */\r\n ADM_Integrated_Lo_Calculate_F_c(ADM_Integrated_Logic_ConstB.W_Value_for_Brake,\r\n 0.017453292519943295 * rtb_Pitch_Angle, &rtb_y_k);\r\n\r\n /* Product: '<S64>/Product1' incorporates:\r\n * Constant: '<S64>/Constant'\r\n * Gain: '<S64>/gain'\r\n * Inport: '<Root>/GV_IMU_AX_Val'\r\n * Product: '<S64>/Product11'\r\n * Sum: '<S64>/Sum1'\r\n * Sum: '<S64>/Sum2'\r\n * Sum: '<S64>/Sum3'\r\n * Sum: '<S64>/Sum4'\r\n * UnitDelay: '<S64>/d'\r\n * UnitDelay: '<S64>/d1'\r\n */\r\n rtb_Desired_Torque = ((ADM_Integrated_Logic_U.GV_IMU_AX_Val +\r\n ADM_Integrated_Logic_DW.d1_DSTATE_ob) * 0.002 + 0.061661977236758134 *\r\n ADM_Integrated_Logic_DW.d_DSTATE_e) /\r\n 0.065661977236758137;\r\n\r\n /* Product: '<S65>/Product1' incorporates:\r\n * Constant: '<S65>/Constant'\r\n * Gain: '<S65>/gain'\r\n * Inport: '<Root>/GV_IMU_AY_Val'\r\n * Product: '<S65>/Product11'\r\n * Sum: '<S65>/Sum1'\r\n * Sum: '<S65>/Sum2'\r\n * Sum: '<S65>/Sum3'\r\n * Sum: '<S65>/Sum4'\r\n * UnitDelay: '<S65>/d'\r\n * UnitDelay: '<S65>/d1'\r\n */\r\n rtb_Brake_Torque_Cmd = ((ADM_Integrated_Logic_U.GV_IMU_AY_Val +\r\n ADM_Integrated_Logic_DW.d1_DSTATE_i) * 0.002 + 0.061661977236758134 *\r\n ADM_Integrated_Logic_DW.d_DSTATE_p) / 0.065661977236758137;\r\n\r\n /* Product: '<S66>/Product1' incorporates:\r\n * Constant: '<S66>/Constant'\r\n * Gain: '<S66>/gain'\r\n * Inport: '<Root>/GV_IMU_AZ_Val'\r\n * Product: '<S66>/Product11'\r\n * Sum: '<S66>/Sum1'\r\n * Sum: '<S66>/Sum2'\r\n * Sum: '<S66>/Sum3'\r\n * Sum: '<S66>/Sum4'\r\n * UnitDelay: '<S66>/d'\r\n * UnitDelay: '<S66>/d1'\r\n */\r\n rtb_Product_h = ((ADM_Integrated_Logic_U.GV_IMU_AZ_Val +\r\n ADM_Integrated_Logic_DW.d1_DSTATE_o1) * 0.002 +\r\n 0.061661977236758134 * ADM_Integrated_Logic_DW.d_DSTATE_n) /\r\n 0.065661977236758137;\r\n\r\n /* MATLAB Function: '<S11>/Pitch_calculate' */\r\n rtb_y_k = sqrt(rtb_Brake_Torque_Cmd * rtb_Brake_Torque_Cmd + rtb_Product_h *\r\n rtb_Product_h);\r\n if (!(rtb_y_k == 0.0)) {\r\n rtb_y_k = atan(rtb_Desired_Torque / rtb_y_k);\r\n }\r\n\r\n /* Sum: '<S11>/Sum' incorporates:\r\n * DiscreteIntegrator: '<S11>/Integrator_2'\r\n * MATLAB Function: '<S11>/Pitch_calculate'\r\n */\r\n rtb_Brake_Control = ADM_Integrated_Logic_DW.Integrator_2_DSTATE - rtb_y_k *\r\n 57.295779513082323;\r\n\r\n /* Gain: '<S67>/gain1' incorporates:\r\n * Constant: '<S67>/Constant1'\r\n * Product: '<S67>/Product2'\r\n */\r\n rtb_Switch2_k = 0.063661977236758135;\r\n\r\n /* Product: '<S67>/Product1' incorporates:\r\n * Constant: '<S67>/Constant'\r\n * Gain: '<S67>/gain'\r\n * Inport: '<Root>/GV_IMU_PitchRtVal'\r\n * Product: '<S67>/Product11'\r\n * Sum: '<S67>/Sum1'\r\n * Sum: '<S67>/Sum2'\r\n * Sum: '<S67>/Sum3'\r\n * Sum: '<S67>/Sum4'\r\n * UnitDelay: '<S67>/d'\r\n * UnitDelay: '<S67>/d1'\r\n */\r\n rtb_Integrator_1 = ((ADM_Integrated_Logic_U.GV_IMU_PitchRtVal +\r\n ADM_Integrated_Logic_DW.d1_DSTATE_a) * 0.002 +\r\n 0.061661977236758134 * ADM_Integrated_Logic_DW.d_DSTATE_d1)\r\n / 0.065661977236758137;\r\n\r\n /* Sum: '<S1>/Add2' incorporates:\r\n * Inport: '<Root>/GV_Vx_Fbk'\r\n */\r\n rtb_Vx_Cmd_R -= ADM_Integrated_Logic_U.GV_Vx_Fbk;\r\n\r\n /* Sum: '<S1>/Add1' incorporates:\r\n * Constant: '<S1>/Constant'\r\n * Gain: '<S1>/Gain1'\r\n * Inport: '<Root>/GV_Vx_Fbk'\r\n * Sum: '<S1>/Add3'\r\n */\r\n e_off = 400.0 - 6.5 * ADM_Integrated_Logic_U.GV_Vx_Fbk;\r\n\r\n /* MATLAB Function: '<S1>/MATLAB Function1' incorporates:\r\n * Sum: '<S1>/Add1'\r\n */\r\n ADM_Integrated__MATLABFunction1(e_off, &rtb_Switch2_k);\r\n\r\n /* Product: '<S23>/delta rise limit' incorporates:\r\n * SampleTimeMath: '<S23>/sample time'\r\n *\r\n * About '<S23>/sample time':\r\n * y = K where K = ( w * Ts )\r\n * */\r\n rtb_Switch2_k *= 0.002;\r\n\r\n /* Delay: '<S23>/Delay' incorporates:\r\n * Inport: '<Root>/GV_RWA_RackAngleCommand'\r\n */\r\n if (ADM_Integrated_Logic_DW.icLoad_l) {\r\n ADM_Integrated_Logic_DW.Delay_DSTATE_c4 =\r\n ADM_Integrated_Logic_U.GV_RWA_RackAngleCommand;\r\n }\r\n\r\n /* Sum: '<S23>/Difference Inputs1' incorporates:\r\n * Delay: '<S23>/Delay'\r\n * Inport: '<Root>/GV_RWA_RackAngleCommand'\r\n *\r\n * Block description for '<S23>/Difference Inputs1':\r\n *\r\n * Add in CPU\r\n */\r\n rtb_y_k = ADM_Integrated_Logic_U.GV_RWA_RackAngleCommand -\r\n ADM_Integrated_Logic_DW.Delay_DSTATE_c4;\r\n\r\n /* MATLAB Function: '<S1>/MATLAB Function2' incorporates:\r\n * Gain: '<S1>/Gain3'\r\n * Sum: '<S1>/Add1'\r\n */\r\n ADM_Integrated__MATLABFunction2(-e_off, &rtb_y);\r\n\r\n /* Switch: '<S76>/Switch2' incorporates:\r\n * RelationalOperator: '<S76>/LowerRelop1'\r\n */\r\n if (!(rtb_y_k > rtb_Switch2_k)) {\r\n /* Product: '<S23>/delta fall limit' incorporates:\r\n * SampleTimeMath: '<S23>/sample time'\r\n *\r\n * About '<S23>/sample time':\r\n * y = K where K = ( w * Ts )\r\n * */\r\n rtb_y *= 0.002;\r\n\r\n /* Switch: '<S76>/Switch' incorporates:\r\n * RelationalOperator: '<S76>/UpperRelop'\r\n */\r\n if (rtb_y_k < rtb_y) {\r\n rtb_Switch2_k = rtb_y;\r\n } else {\r\n rtb_Switch2_k = rtb_y_k;\r\n }\r\n\r\n /* End of Switch: '<S76>/Switch' */\r\n }\r\n\r\n /* End of Switch: '<S76>/Switch2' */\r\n\r\n /* Sum: '<S23>/Difference Inputs2' incorporates:\r\n * Delay: '<S23>/Delay'\r\n *\r\n * Block description for '<S23>/Difference Inputs2':\r\n *\r\n * Add in CPU\r\n */\r\n rtb_y = rtb_Switch2_k + ADM_Integrated_Logic_DW.Delay_DSTATE_c4;\r\n\r\n /* Outport: '<Root>/GV_Master_Rack_Angle_Cmd' incorporates:\r\n * MATLAB Function: '<S1>/RWA_Actuator_Fault_Injection'\r\n */\r\n ADM_Integrated_Logic_Y.GV_Master_Rack_Angle_Cmd = rtb_y;\r\n\r\n /* Outport: '<Root>/Target_RWA_Out' incorporates:\r\n * MATLAB Function: '<S1>/RWA_Actuator_Fault_Injection'\r\n */\r\n ADM_Integrated_Logic_Y.Target_RWA_Out = rtb_y;\r\n\r\n /* MATLAB Function: '<S1>/MATLAB Function5' */\r\n ADM_Integrated__MATLABFunction1(e_off, &rtb_Switch2_k);\r\n\r\n /* Product: '<S24>/delta rise limit' incorporates:\r\n * SampleTimeMath: '<S24>/sample time'\r\n *\r\n * About '<S24>/sample time':\r\n * y = K where K = ( w * Ts )\r\n * */\r\n rtb_Switch2_k *= 0.002;\r\n\r\n /* Delay: '<S24>/Delay' incorporates:\r\n * Inport: '<Root>/GV_RWS_RackAngleCommand'\r\n */\r\n if (ADM_Integrated_Logic_DW.icLoad_d) {\r\n ADM_Integrated_Logic_DW.Delay_DSTATE_i1 =\r\n ADM_Integrated_Logic_U.GV_RWS_RackAngleCommand;\r\n }\r\n\r\n /* Sum: '<S24>/Difference Inputs1' incorporates:\r\n * Delay: '<S24>/Delay'\r\n * Inport: '<Root>/GV_RWS_RackAngleCommand'\r\n *\r\n * Block description for '<S24>/Difference Inputs1':\r\n *\r\n * Add in CPU\r\n */\r\n rtb_dVx = ADM_Integrated_Logic_U.GV_RWS_RackAngleCommand -\r\n ADM_Integrated_Logic_DW.Delay_DSTATE_i1;\r\n\r\n /* MATLAB Function: '<S1>/MATLAB Function6' incorporates:\r\n * Gain: '<S1>/Gain5'\r\n */\r\n ADM_Integrated__MATLABFunction2(-e_off, &rtb_y_k);\r\n\r\n /* Switch: '<S77>/Switch2' incorporates:\r\n * RelationalOperator: '<S77>/LowerRelop1'\r\n */\r\n if (!(rtb_dVx > rtb_Switch2_k)) {\r\n /* Product: '<S24>/delta fall limit' incorporates:\r\n * SampleTimeMath: '<S24>/sample time'\r\n *\r\n * About '<S24>/sample time':\r\n * y = K where K = ( w * Ts )\r\n * */\r\n rtb_y_k *= 0.002;\r\n\r\n /* Switch: '<S77>/Switch' incorporates:\r\n * RelationalOperator: '<S77>/UpperRelop'\r\n */\r\n if (rtb_dVx < rtb_y_k) {\r\n rtb_Switch2_k = rtb_y_k;\r\n } else {\r\n rtb_Switch2_k = rtb_dVx;\r\n }\r\n\r\n /* End of Switch: '<S77>/Switch' */\r\n }\r\n\r\n /* End of Switch: '<S77>/Switch2' */\r\n\r\n /* Sum: '<S24>/Difference Inputs2' incorporates:\r\n * Delay: '<S24>/Delay'\r\n *\r\n * Block description for '<S24>/Difference Inputs2':\r\n *\r\n * Add in CPU\r\n */\r\n rtb_y_k = rtb_Switch2_k + ADM_Integrated_Logic_DW.Delay_DSTATE_i1;\r\n\r\n /* Outport: '<Root>/GV_RWS_RackAngleCmd1' */\r\n ADM_Integrated_Logic_Y.GV_RWS_RackAngleCmd1 = rtb_y_k;\r\n\r\n /* Outport: '<Root>/Act_Fault_Exist' incorporates:\r\n * MATLAB Function: '<S1>/Actuator_Fault_Decision'\r\n */\r\n ADM_Integrated_Logic_Y.Act_Fault_Exist = 0.0;\r\n\r\n /* MATLAB Function: '<S1>/Actuator_Fault_Decision' incorporates:\r\n * Inport: '<Root>/GV_ACU_ECU_Fault_Flag'\r\n * Inport: '<Root>/GV_ACU_ECU_Fault_Flag1'\r\n * Inport: '<Root>/GV_ACU_ECU_Fault_Flag2'\r\n * Inport: '<Root>/GV_ACU_ECU_Fault_Flag3'\r\n * Inport: '<Root>/GV_ACU_Fault_Flag'\r\n * Inport: '<Root>/GV_Drive_Mode'\r\n * Inport: '<Root>/GV_IDB_ECU_Fault_Flag'\r\n * Inport: '<Root>/GV_MCU_Actuator_Fault_Flag'\r\n * Inport: '<Root>/GV_RCU_ECU_Fault_Flag'\r\n * Inport: '<Root>/GV_RWA1_ECU_Fault_Flag'\r\n * Inport: '<Root>/GV_RWA2_ECU_Fault_Flag'\r\n * Inport: '<Root>/GV_RWA_Actuator_Fault'\r\n */\r\n if ((ADM_Integrated_Logic_U.GV_ACU_Fault_Flag == 1.0) ||\r\n (ADM_Integrated_Logic_U.GV_MCU_Actuator_Fault_Flag == 1.0) ||\r\n (ADM_Integrated_Logic_U.GV_RWA_Actuator_Fault == 1.0)) {\r\n /* Outport: '<Root>/Act_Fault_Exist' */\r\n ADM_Integrated_Logic_Y.Act_Fault_Exist = 1.0;\r\n }\r\n\r\n if (((ADM_Integrated_Logic_U.GV_ACU_ECU_Fault_Flag == 1.0) ||\r\n (ADM_Integrated_Logic_U.GV_ACU_ECU_Fault_Flag1 == 1.0) ||\r\n (ADM_Integrated_Logic_U.GV_ACU_ECU_Fault_Flag2 == 1.0) ||\r\n (ADM_Integrated_Logic_U.GV_ACU_ECU_Fault_Flag3 == 1.0)) &&\r\n ((ADM_Integrated_Logic_U.GV_Drive_Mode == 0.0) ||\r\n (ADM_Integrated_Logic_U.GV_Drive_Mode == 2.0))) {\r\n /* Outport: '<Root>/Act_Fault_Exist' */\r\n ADM_Integrated_Logic_Y.Act_Fault_Exist = 1.0;\r\n }\r\n\r\n if ((ADM_Integrated_Logic_U.GV_IDB_ECU_Fault_Flag == 1.0) ||\r\n (ADM_Integrated_Logic_U.GV_RCU_ECU_Fault_Flag == 1.0)) {\r\n /* Outport: '<Root>/Act_Fault_Exist' */\r\n ADM_Integrated_Logic_Y.Act_Fault_Exist = 1.0;\r\n } else if ((ADM_Integrated_Logic_U.GV_RWA1_ECU_Fault_Flag == 1.0) &&\r\n (ADM_Integrated_Logic_U.GV_RWA2_ECU_Fault_Flag == 1.0)) {\r\n /* Outport: '<Root>/Act_Fault_Exist' */\r\n ADM_Integrated_Logic_Y.Act_Fault_Exist = 1.0;\r\n }\r\n\r\n /* Update for UnitDelay: '<S13>/d1' incorporates:\r\n * Inport: '<Root>/GV_IMU_AX_Val'\r\n */\r\n ADM_Integrated_Logic_DW.d1_DSTATE = ADM_Integrated_Logic_U.GV_IMU_AX_Val;\r\n\r\n /* Update for UnitDelay: '<S13>/d' */\r\n ADM_Integrated_Logic_DW.d_DSTATE = rtb_Product1;\r\n\r\n /* Update for DiscreteIntegrator: '<S11>/Integrator_2' incorporates:\r\n * Constant: '<S11>/I_gain'\r\n * Constant: '<S11>/P_gain'\r\n * DiscreteIntegrator: '<S11>/Integrator_1'\r\n * Product: '<S11>/Product'\r\n * Product: '<S11>/Product1'\r\n * Sum: '<S11>/Sum1'\r\n * Sum: '<S11>/Sum2'\r\n */\r\n ADM_Integrated_Logic_DW.Integrator_2_DSTATE += (rtb_Integrator_1 -\r\n (ADM_Integrated_Logic_DW.Integrator_1_DSTATE * 5.0 + rtb_Brake_Control *\r\n 100.0)) * 0.002;\r\n\r\n /* Update for Delay: '<S70>/Delay' */\r\n ADM_Integrated_Logic_DW.icLoad = false;\r\n ADM_Integrated_Logic_DW.Delay_DSTATE = rtb_Pitch_Angle;\r\n\r\n /* Update for Delay: '<S69>/Delay' */\r\n ADM_Integrated_Logic_DW.icLoad_e = false;\r\n ADM_Integrated_Logic_DW.Delay_DSTATE_i = rtb_Saturation;\r\n\r\n /* Update for Delay: '<S10>/Memory' */\r\n ADM_Integrated_Logic_DW.Memory_DSTATE = rtb_Memory;\r\n\r\n /* Update for DiscreteIntegrator: '<S28>/Discrete-Time Integrator' incorporates:\r\n * Memory: '<S28>/Memory'\r\n * Sum: '<S28>/Sum1'\r\n */\r\n ADM_Integrated_Logic_DW.DiscreteTimeIntegrator_DSTATE += (rtb_Product2_a -\r\n ADM_Integrated_Logic_DW.Memory_PreviousInput_f) * 0.002;\r\n\r\n /* Update for UnitDelay: '<S31>/UD'\r\n *\r\n * Block description for '<S31>/UD':\r\n *\r\n * Store in Global RAM\r\n */\r\n ADM_Integrated_Logic_DW.UD_DSTATE = rtb_TSamp;\r\n\r\n /* Update for DiscreteTransferFcn: '<S1>/Discrete Transfer Fcn' */\r\n ADM_Integrated_Logic_DW.DiscreteTransferFcn_states = rtb_Vx_Cmd_R - -0.9375 *\r\n ADM_Integrated_Logic_DW.DiscreteTransferFcn_states;\r\n\r\n /* Update for UnitDelay: '<S38>/d1' */\r\n ADM_Integrated_Logic_DW.d1_DSTATE_c = rtb_AccFlag;\r\n\r\n /* Update for UnitDelay: '<S38>/d' */\r\n ADM_Integrated_Logic_DW.d_DSTATE_l = rtb_Target_RPM;\r\n\r\n /* Update for UnitDelay: '<S51>/d' */\r\n ADM_Integrated_Logic_DW.d_DSTATE_i = rtb_Target_RPM;\r\n\r\n /* Update for UnitDelay: '<S51>/d1' */\r\n ADM_Integrated_Logic_DW.d1_DSTATE_p = rtb_Sum1_i2;\r\n\r\n /* Update for UnitDelay: '<S52>/d' */\r\n ADM_Integrated_Logic_DW.d_DSTATE_c = rtb_Sum1_i2;\r\n\r\n /* Update for UnitDelay: '<S52>/d1' */\r\n ADM_Integrated_Logic_DW.d1_DSTATE_h = rtb_Sum1_o1;\r\n\r\n /* Update for UnitDelay: '<S53>/d' */\r\n ADM_Integrated_Logic_DW.d_DSTATE_d = rtb_Sum1_o1;\r\n\r\n /* Update for UnitDelay: '<S53>/d1' */\r\n ADM_Integrated_Logic_DW.d1_DSTATE_l = rtb_Sum1_lm;\r\n\r\n /* Update for Delay: '<S55>/Delay1' */\r\n ADM_Integrated_Logic_DW.Delay1_DSTATE = rtb_Gain_c;\r\n\r\n /* Update for Delay: '<S55>/Delay' */\r\n ADM_Integrated_Logic_DW.Delay_DSTATE_c[0] =\r\n ADM_Integrated_Logic_DW.Delay_DSTATE_c[1];\r\n ADM_Integrated_Logic_DW.Delay_DSTATE_c[1] = rtb_Gain_c;\r\n\r\n /* Update for Delay: '<S55>/Delay2' */\r\n ADM_Integrated_Logic_DW.Delay2_DSTATE = rtb_Product1_pd;\r\n\r\n /* Update for Delay: '<S55>/Delay3' */\r\n ADM_Integrated_Logic_DW.Delay3_DSTATE[0] =\r\n ADM_Integrated_Logic_DW.Delay3_DSTATE[1];\r\n ADM_Integrated_Logic_DW.Delay3_DSTATE[1] = rtb_Product1_pd;\r\n\r\n /* Update for UnitDelay: '<S54>/d1' */\r\n ADM_Integrated_Logic_DW.d1_DSTATE_e = rtb_Product1_pd;\r\n\r\n /* Update for UnitDelay: '<S54>/d' */\r\n ADM_Integrated_Logic_DW.d_DSTATE_ij = rtb_Product1_m;\r\n\r\n /* Update for Memory: '<S6>/Memory' */\r\n ADM_Integrated_Logic_DW.Memory_PreviousInput = rtb_Add;\r\n\r\n /* Update for UnitDelay: '<S43>/d' */\r\n ADM_Integrated_Logic_DW.d_DSTATE_ir = rtb_Target_RPM;\r\n\r\n /* Update for UnitDelay: '<S43>/d1' */\r\n ADM_Integrated_Logic_DW.d1_DSTATE_o = rtb_Error_m;\r\n\r\n /* Update for UnitDelay: '<S44>/d' */\r\n ADM_Integrated_Logic_DW.d_DSTATE_m = rtb_Error_m;\r\n\r\n /* Update for UnitDelay: '<S44>/d1' */\r\n ADM_Integrated_Logic_DW.d1_DSTATE_hm = rtb_Sum1_aj;\r\n\r\n /* Update for UnitDelay: '<S45>/d' */\r\n ADM_Integrated_Logic_DW.d_DSTATE_mw = rtb_Sum1_aj;\r\n\r\n /* Update for UnitDelay: '<S45>/d1' */\r\n ADM_Integrated_Logic_DW.d1_DSTATE_g = rtb_Sum1_p;\r\n\r\n /* Update for UnitDelay: '<S46>/d1' */\r\n ADM_Integrated_Logic_DW.d1_DSTATE_ej = rtb_Add3;\r\n\r\n /* Update for UnitDelay: '<S46>/d' */\r\n ADM_Integrated_Logic_DW.d_DSTATE_j = rtb_Product1_k3;\r\n\r\n /* Update for Delay: '<S47>/Delay1' */\r\n ADM_Integrated_Logic_DW.Delay1_DSTATE_c = rtb_Product1_k3;\r\n\r\n /* Update for Delay: '<S47>/Delay' */\r\n ADM_Integrated_Logic_DW.Delay_DSTATE_p[0] =\r\n ADM_Integrated_Logic_DW.Delay_DSTATE_p[1];\r\n ADM_Integrated_Logic_DW.Delay_DSTATE_p[1] = rtb_Product1_k3;\r\n\r\n /* Update for Delay: '<S47>/Delay2' */\r\n ADM_Integrated_Logic_DW.Delay2_DSTATE_n = rtb_Product1_h;\r\n\r\n /* Update for Delay: '<S47>/Delay3' */\r\n ADM_Integrated_Logic_DW.Delay3_DSTATE_h[0] =\r\n ADM_Integrated_Logic_DW.Delay3_DSTATE_h[1];\r\n ADM_Integrated_Logic_DW.Delay3_DSTATE_h[1] = rtb_Product1_h;\r\n\r\n /* Update for Memory: '<S28>/Memory' */\r\n ADM_Integrated_Logic_DW.Memory_PreviousInput_f = DiscreteTransferFcn;\r\n\r\n /* Update for UnitDelay: '<S64>/d1' incorporates:\r\n * Inport: '<Root>/GV_IMU_AX_Val'\r\n */\r\n ADM_Integrated_Logic_DW.d1_DSTATE_ob = ADM_Integrated_Logic_U.GV_IMU_AX_Val;\r\n\r\n /* Update for UnitDelay: '<S64>/d' */\r\n ADM_Integrated_Logic_DW.d_DSTATE_e = rtb_Desired_Torque;\r\n\r\n /* Update for UnitDelay: '<S65>/d1' incorporates:\r\n * Inport: '<Root>/GV_IMU_AY_Val'\r\n */\r\n ADM_Integrated_Logic_DW.d1_DSTATE_i = ADM_Integrated_Logic_U.GV_IMU_AY_Val;\r\n\r\n /* Update for UnitDelay: '<S65>/d' */\r\n ADM_Integrated_Logic_DW.d_DSTATE_p = rtb_Brake_Torque_Cmd;\r\n\r\n /* Update for UnitDelay: '<S66>/d1' incorporates:\r\n * Inport: '<Root>/GV_IMU_AZ_Val'\r\n */\r\n ADM_Integrated_Logic_DW.d1_DSTATE_o1 = ADM_Integrated_Logic_U.GV_IMU_AZ_Val;\r\n\r\n /* Update for UnitDelay: '<S66>/d' */\r\n ADM_Integrated_Logic_DW.d_DSTATE_n = rtb_Product_h;\r\n\r\n /* Update for DiscreteIntegrator: '<S11>/Integrator_1' */\r\n ADM_Integrated_Logic_DW.Integrator_1_DSTATE += 0.002 * rtb_Brake_Control;\r\n\r\n /* Update for UnitDelay: '<S67>/d1' incorporates:\r\n * Inport: '<Root>/GV_IMU_PitchRtVal'\r\n */\r\n ADM_Integrated_Logic_DW.d1_DSTATE_a = ADM_Integrated_Logic_U.GV_IMU_PitchRtVal;\r\n\r\n /* Update for UnitDelay: '<S67>/d' */\r\n ADM_Integrated_Logic_DW.d_DSTATE_d1 = rtb_Integrator_1;\r\n\r\n /* Update for Delay: '<S23>/Delay' */\r\n ADM_Integrated_Logic_DW.icLoad_l = false;\r\n ADM_Integrated_Logic_DW.Delay_DSTATE_c4 = rtb_y;\r\n\r\n /* Update for Delay: '<S24>/Delay' */\r\n ADM_Integrated_Logic_DW.icLoad_d = false;\r\n ADM_Integrated_Logic_DW.Delay_DSTATE_i1 = rtb_y_k;\r\n}\r\n\r\n/* Model initialize function */\r\nvoid ADM_Integrated_Logic_initialize(void)\r\n{\r\n /* Registration code */\r\n\r\n /* initialize non-finites */\r\n rt_InitInfAndNaN(sizeof(double));\r\n\r\n /* InitializeConditions for Delay: '<S70>/Delay' */\r\n ADM_Integrated_Logic_DW.icLoad = true;\r\n\r\n /* InitializeConditions for Delay: '<S69>/Delay' */\r\n ADM_Integrated_Logic_DW.icLoad_e = true;\r\n\r\n /* InitializeConditions for Delay: '<S23>/Delay' */\r\n ADM_Integrated_Logic_DW.icLoad_l = true;\r\n\r\n /* InitializeConditions for Delay: '<S24>/Delay' */\r\n ADM_Integrated_Logic_DW.icLoad_d = true;\r\n\r\n /* SystemInitialize for MATLAB Function: '<S6>/Mode_and_blend' */\r\n ADM_Integrated_Logic_DW.t_hold = 1.0E+9;\r\n ADM_Integrated_Logic_DW.w = 0.5;\r\n\r\n /* SystemInitialize for MATLAB Function: '<S1>/MATLAB Function3' */\r\n ADM_Integrated_Logic_DW.currentEstMass = 1500.0;\r\n}\r\n\r\n/*\r\n * File trailer for generated code.\r\n *\r\n * [EOF]\r\n */\r\n"},{"name":"ADM_Integrated_Logic.h","type":"header","group":"model","path":"C:\\Users\\MSI\\Documents\\WorkSpace\\git\\ADM\\[ADM] Integrated Logic\\ADM_Integrated_Logic_ert_rtw","tag":"","groupDisplay":"Model files","code":"/*\r\n * Academic License - for use in teaching, academic research, and meeting\r\n * course requirements at degree granting institutions only. Not for\r\n * government, commercial, or other organizational use.\r\n *\r\n * File: ADM_Integrated_Logic.h\r\n *\r\n * Code generated for Simulink model 'ADM_Integrated_Logic'.\r\n *\r\n * Model version : 14.109\r\n * Simulink Coder version : 24.2 (R2024b) 21-Jun-2024\r\n * C/C++ source code generated on : Tue Jan 6 11:24:27 2026\r\n *\r\n * Target selection: ert.tlc\r\n * Embedded hardware selection: NXP->Cortex-M4\r\n * Code generation objectives:\r\n * 1. Execution efficiency\r\n * 2. RAM efficiency\r\n * 3. Debugging\r\n * Validation result: Not run\r\n */\r\n\r\n#ifndef ADM_Integrated_Logic_h_\r\n#define ADM_Integrated_Logic_h_\r\n#ifndef ADM_Integrated_Logic_COMMON_INCLUDES_\r\n#define ADM_Integrated_Logic_COMMON_INCLUDES_\r\n#include <stdbool.h>\r\n#include <stdint.h>\r\n#endif /* ADM_Integrated_Logic_COMMON_INCLUDES_ */\r\n\r\n/* Macros for accessing real-time model data structure */\r\n#ifndef rtmGetErrorStatus\r\n#define rtmGetErrorStatus(rtm) ((rtm)->errorStatus)\r\n#endif\r\n\r\n#ifndef rtmSetErrorStatus\r\n#define rtmSetErrorStatus(rtm, val) ((rtm)->errorStatus = (val))\r\n#endif\r\n\r\n/* Forward declaration for rtModel */\r\ntypedef struct tag_RTM_ADM_Integrated_Logic_T RT_MODEL_ADM_Integrated_Logic_T;\r\n\r\n/* Custom Type definition for MATLAB Function: '<S6>/MATLAB Function' */\r\n#ifndef struct_tag_xcYeCJdFq6nf9S1uc4osUB\r\n#define struct_tag_xcYeCJdFq6nf9S1uc4osUB\r\n\r\nstruct tag_xcYeCJdFq6nf9S1uc4osUB\r\n{\r\n double contents;\r\n};\r\n\r\n#endif /* struct_tag_xcYeCJdFq6nf9S1uc4osUB */\r\n\r\n#ifndef typedef_captured_var_ADM_Integrated_L_T\r\n#define typedef_captured_var_ADM_Integrated_L_T\r\n\r\ntypedef struct tag_xcYeCJdFq6nf9S1uc4osUB captured_var_ADM_Integrated_L_T;\r\n\r\n#endif /* typedef_captured_var_ADM_Integrated_L_T */\r\n\r\n/* Block signals and states (default storage) for system '<Root>' */\r\ntypedef struct {\r\n captured_var_ADM_Integrated_L_T x_f; /* '<S6>/MATLAB Function' */\r\n double Delay_DSTATE_c[2]; /* '<S55>/Delay' */\r\n double Delay3_DSTATE[2]; /* '<S55>/Delay3' */\r\n double Delay_DSTATE_p[2]; /* '<S47>/Delay' */\r\n double Delay3_DSTATE_h[2]; /* '<S47>/Delay3' */\r\n double x_hat[3]; /* '<S1>/MATLAB Function' */\r\n double M; /* '<S9>/MATLAB Function' */\r\n double d1_DSTATE; /* '<S13>/d1' */\r\n double d_DSTATE; /* '<S13>/d' */\r\n double Integrator_2_DSTATE; /* '<S11>/Integrator_2' */\r\n double Delay_DSTATE; /* '<S70>/Delay' */\r\n double Delay_DSTATE_i; /* '<S69>/Delay' */\r\n double Memory_DSTATE; /* '<S10>/Memory' */\r\n double DiscreteTimeIntegrator_DSTATE;/* '<S28>/Discrete-Time Integrator' */\r\n double UD_DSTATE; /* '<S31>/UD' */\r\n double DiscreteTransferFcn_states; /* '<S1>/Discrete Transfer Fcn' */\r\n double d1_DSTATE_c; /* '<S38>/d1' */\r\n double d_DSTATE_l; /* '<S38>/d' */\r\n double d_DSTATE_i; /* '<S51>/d' */\r\n double d1_DSTATE_p; /* '<S51>/d1' */\r\n double d_DSTATE_c; /* '<S52>/d' */\r\n double d1_DSTATE_h; /* '<S52>/d1' */\r\n double d_DSTATE_d; /* '<S53>/d' */\r\n double d1_DSTATE_l; /* '<S53>/d1' */\r\n double Delay1_DSTATE; /* '<S55>/Delay1' */\r\n double Delay2_DSTATE; /* '<S55>/Delay2' */\r\n double d1_DSTATE_e; /* '<S54>/d1' */\r\n double d_DSTATE_ij; /* '<S54>/d' */\r\n double d_DSTATE_ir; /* '<S43>/d' */\r\n double d1_DSTATE_o; /* '<S43>/d1' */\r\n double d_DSTATE_m; /* '<S44>/d' */\r\n double d1_DSTATE_hm; /* '<S44>/d1' */\r\n double d_DSTATE_mw; /* '<S45>/d' */\r\n double d1_DSTATE_g; /* '<S45>/d1' */\r\n double d1_DSTATE_ej; /* '<S46>/d1' */\r\n double d_DSTATE_j; /* '<S46>/d' */\r\n double Delay1_DSTATE_c; /* '<S47>/Delay1' */\r\n double Delay2_DSTATE_n; /* '<S47>/Delay2' */\r\n double d1_DSTATE_ob; /* '<S64>/d1' */\r\n double d_DSTATE_e; /* '<S64>/d' */\r\n double d1_DSTATE_i; /* '<S65>/d1' */\r\n double d_DSTATE_p; /* '<S65>/d' */\r\n double d1_DSTATE_o1; /* '<S66>/d1' */\r\n double d_DSTATE_n; /* '<S66>/d' */\r\n double Integrator_1_DSTATE; /* '<S11>/Integrator_1' */\r\n double d1_DSTATE_a; /* '<S67>/d1' */\r\n double d_DSTATE_d1; /* '<S67>/d' */\r\n double Delay_DSTATE_c4; /* '<S23>/Delay' */\r\n double Delay_DSTATE_i1; /* '<S24>/Delay' */\r\n double PrevY; /* '<S25>/Input_Vx_RateLimiter' */\r\n double PrevY_b; /* '<S3>/Rate Limiter' */\r\n double PrevY_o; /* '<S6>/Brake_Out_RateLimiter' */\r\n double PrevY_a; /* '<S6>/TargetSpd_RateLimiter' */\r\n double Memory_PreviousInput; /* '<S6>/Memory' */\r\n double Memory_PreviousInput_f; /* '<S28>/Memory' */\r\n double currentEstMass; /* '<S1>/MATLAB Function3' */\r\n double HAC_ON_FLAG; /* '<S11>/HAC_OFF_OK_Func' */\r\n double Smoothed_Torque; /* '<S11>/HAC_OFF_OK_Func' */\r\n double HAC_Desired_Torque; /* '<S11>/HAC_OFF_OK_Func' */\r\n double HAC_ON_Timer; /* '<S11>/HAC_OFF_OK_Func' */\r\n double t_hold; /* '<S6>/Mode_and_blend' */\r\n double w; /* '<S6>/Mode_and_blend' */\r\n double y_prev; /* '<S6>/MATLAB Function' */\r\n double xf_p; /* '<S6>/MATLAB Function' */\r\n int8_t st; /* '<S6>/Mode_and_blend' */\r\n uint8_t is_active_c6_ADM_Integrated_Log;/* '<S11>/Chart' */\r\n uint8_t is_c6_ADM_Integrated_Logic; /* '<S11>/Chart' */\r\n bool icLoad; /* '<S70>/Delay' */\r\n bool icLoad_e; /* '<S69>/Delay' */\r\n bool icLoad_l; /* '<S23>/Delay' */\r\n bool icLoad_d; /* '<S24>/Delay' */\r\n bool isConverged; /* '<S1>/MATLAB Function3' */\r\n bool x_f_not_empty; /* '<S6>/MATLAB Function' */\r\n bool xf_p_not_empty; /* '<S6>/MATLAB Function' */\r\n} DW_ADM_Integrated_Logic_T;\r\n\r\n/* Invariant block signals (default storage) */\r\ntypedef struct {\r\n const double Multiply1; /* '<S41>/Multiply1' */\r\n const double Multiply2; /* '<S41>/Multiply2' */\r\n const double W_value; /* '<S41>/Multiply' */\r\n const double Multiply1_i; /* '<S63>/Multiply1' */\r\n const double Multiply2_f; /* '<S63>/Multiply2' */\r\n const double W_value_m; /* '<S63>/Multiply' */\r\n const double W_Value_for_Brake; /* '<S63>/Multiply4' */\r\n} ConstB_ADM_Integrated_Logic_T;\r\n\r\n/* External inputs (root inport signals with default storage) */\r\ntypedef struct {\r\n double GV_MCU_RPM; /* '<Root>/GV_MCU_RPM' */\r\n double GV_BrakeTorqueCommand; /* '<Root>/GV_BrakeTorqueCommand' */\r\n double GV_IMU_AX_Val; /* '<Root>/GV_IMU_AX_Val' */\r\n double GV_IMU_AY_Val; /* '<Root>/GV_IMU_AY_Val' */\r\n double GV_IMU_AZ_Val; /* '<Root>/GV_IMU_AZ_Val' */\r\n double GV_IMU_PitchRtVal; /* '<Root>/GV_IMU_PitchRtVal' */\r\n double GV_Vx_Command; /* '<Root>/GV_Vx_Command' */\r\n double GV_VCU_GearSelStat; /* '<Root>/GV_VCU_GearSelStat' */\r\n double GV_MCU_EstTrq; /* '<Root>/GV_MCU_EstTrq' */\r\n double GV_Vx_Limit; /* '<Root>/GV_Vx_Limit' */\r\n double GV_Vx_Fbk; /* '<Root>/GV_Vx_Fbk' */\r\n double GV_RWA_RackAngleCommand; /* '<Root>/GV_RWA_RackAngleCommand' */\r\n double GV_RWS_RackAngleCommand; /* '<Root>/GV_RWS_RackAngleCommand' */\r\n double GV_Drive_Mode; /* '<Root>/GV_Drive_Mode' */\r\n double GV_ACU_Fault_Flag; /* '<Root>/GV_ACU_Fault_Flag' */\r\n double GV_MCU_Actuator_Fault_Flag; /* '<Root>/GV_MCU_Actuator_Fault_Flag' */\r\n double GV_IDB_ECU_Fault_Flag; /* '<Root>/GV_IDB_ECU_Fault_Flag' */\r\n double GV_RCU_ECU_Fault_Flag; /* '<Root>/GV_RCU_ECU_Fault_Flag' */\r\n double GV_RWA1_ECU_Fault_Flag; /* '<Root>/GV_RWA1_ECU_Fault_Flag' */\r\n double GV_RWA2_ECU_Fault_Flag; /* '<Root>/GV_RWA2_ECU_Fault_Flag' */\r\n double GV_RWA_Actuator_Fault; /* '<Root>/GV_RWA_Actuator_Fault' */\r\n double GV_ACU_ECU_Fault_Flag; /* '<Root>/GV_ACU_ECU_Fault_Flag' */\r\n double GV_ACU_ECU_Fault_Flag1; /* '<Root>/GV_ACU_ECU_Fault_Flag1' */\r\n double GV_ACU_ECU_Fault_Flag2; /* '<Root>/GV_ACU_ECU_Fault_Flag2' */\r\n double GV_ACU_ECU_Fault_Flag3; /* '<Root>/GV_ACU_ECU_Fault_Flag3' */\r\n double GV_Drive_ACC_Cmd; /* '<Root>/GV_Drive_ACC_Cmd' */\r\n double GV_VCU_AccControlFlag; /* '<Root>/GV_VCU_AccControlFlag' */\r\n double GV_VCU_Acc_Limit; /* '<Root>/GV_VCU_Acc_Limit' */\r\n double GV_SP_Slope; /* '<Root>/GV_SP_Slope' */\r\n bool GV_SP_AngleCompensationFlag; /* '<Root>/GV_SP_AngleCompensationFlag' */\r\n} ExtU_ADM_Integrated_Logic_T;\r\n\r\n/* External outputs (root outports fed by signals with default storage) */\r\ntypedef struct {\r\n double GV_Brake_Command; /* '<Root>/GV_Brake_Command' */\r\n double GV_Master_Rack_Angle_Cmd; /* '<Root>/GV_Master_Rack_Angle_Cmd' */\r\n double GV_Hill_Torque_Assist; /* '<Root>/GV_Hill_Torque_Assist' */\r\n double GV_Motor_Torque_Cmd; /* '<Root>/GV_Motor_Torque_Cmd' */\r\n double Debug_HAC_FLAG; /* '<Root>/Debug_HAC_FLAG' */\r\n double Debug_HAC_RPM_Decision; /* '<Root>/Debug_HAC_RPM_Decision' */\r\n double Debug_HAC_Pitch_angle; /* '<Root>/Debug_HAC_Pitch_angle' */\r\n double Debug_HAC_Brake_Output; /* '<Root>/Debug_HAC_Brake_Output' */\r\n double Debug_CC_Brake_Output; /* '<Root>/Debug_CC_Brake_Output' */\r\n double Debug_AccControl_TorqueCmd; /* '<Root>/Debug_AccControl_TorqueCmd' */\r\n double GV_RWS_RackAngleCmd1; /* '<Root>/GV_RWS_RackAngleCmd1' */\r\n double GV_Speed_Limit; /* '<Root>/GV_Speed_Limit' */\r\n double GV_Gear_Postion_Out; /* '<Root>/GV_Gear_Postion_Out' */\r\n double Act_Fault_Exist; /* '<Root>/Act_Fault_Exist' */\r\n double Target_RWA_Out; /* '<Root>/Target_RWA_Out' */\r\n double Target_IDB_Out; /* '<Root>/Target_IDB_Out' */\r\n double Target_MCU_Out; /* '<Root>/Target_MCU_Out' */\r\n double GV_VCU_EstMass; /* '<Root>/GV_VCU_EstMass' */\r\n double GV_VCU_EstMassFlag; /* '<Root>/GV_VCU_EstMassFlag' */\r\n} ExtY_ADM_Integrated_Logic_T;\r\n\r\n/* Real-time Model Data Structure */\r\nstruct tag_RTM_ADM_Integrated_Logic_T {\r\n const char * volatile errorStatus;\r\n};\r\n\r\n/* Block signals and states (default storage) */\r\nextern DW_ADM_Integrated_Logic_T ADM_Integrated_Logic_DW;\r\n\r\n/* External inputs (root inport signals with default storage) */\r\nextern ExtU_ADM_Integrated_Logic_T ADM_Integrated_Logic_U;\r\n\r\n/* External outputs (root outports fed by signals with default storage) */\r\nextern ExtY_ADM_Integrated_Logic_T ADM_Integrated_Logic_Y;\r\nextern const ConstB_ADM_Integrated_Logic_T ADM_Integrated_Logic_ConstB;/* constant block i/o */\r\n\r\n/* Model entry point functions */\r\nextern void ADM_Integrated_Logic_initialize(void);\r\nextern void ADM_Integrated_Logic_step(void);\r\n\r\n/* Real-time Model object */\r\nextern RT_MODEL_ADM_Integrated_Logic_T *const ADM_Integrated_Logic_M;\r\n\r\n/*-\r\n * These blocks were eliminated from the model due to optimizations:\r\n *\r\n * Block '<S2>/Fault' : Unused code path elimination\r\n * Block '<S2>/Input_Acc_RateLimiter' : Unused code path elimination\r\n * Block '<S2>/Non_Fault' : Unused code path elimination\r\n * Block '<S2>/Product' : Unused code path elimination\r\n * Block '<S27>/Data Type Duplicate' : Unused code path elimination\r\n * Block '<S27>/Data Type Propagation' : Unused code path elimination\r\n * Block '<S2>/Switch' : Unused code path elimination\r\n * Block '<S31>/Data Type Duplicate' : Unused code path elimination\r\n * Block '<S35>/BW_PI' : Unused code path elimination\r\n * Block '<S35>/Constant1' : Unused code path elimination\r\n * Block '<S35>/Constant16' : Unused code path elimination\r\n * Block '<S35>/Constant17' : Unused code path elimination\r\n * Block '<S35>/Constant2' : Unused code path elimination\r\n * Block '<S63>/Brake_Saturation' : Unused code path elimination\r\n * Block '<S63>/Multiply5' : Unused code path elimination\r\n * Block '<S63>/Radius1' : Unused code path elimination\r\n * Block '<S69>/FixPt Data Type Duplicate' : Unused code path elimination\r\n * Block '<S74>/Data Type Duplicate' : Unused code path elimination\r\n * Block '<S74>/Data Type Propagation' : Unused code path elimination\r\n * Block '<S70>/FixPt Data Type Duplicate' : Unused code path elimination\r\n * Block '<S75>/Data Type Duplicate' : Unused code path elimination\r\n * Block '<S75>/Data Type Propagation' : Unused code path elimination\r\n * Block '<S11>/Scope2' : Unused code path elimination\r\n * Block '<S23>/FixPt Data Type Duplicate' : Unused code path elimination\r\n * Block '<S76>/Data Type Duplicate' : Unused code path elimination\r\n * Block '<S76>/Data Type Propagation' : Unused code path elimination\r\n * Block '<S24>/FixPt Data Type Duplicate' : Unused code path elimination\r\n * Block '<S77>/Data Type Duplicate' : Unused code path elimination\r\n * Block '<S77>/Data Type Propagation' : Unused code path elimination\r\n * Block '<S6>/ControlFlag' : Eliminated nontunable gain of 1\r\n * Block '<S35>/FBGain' : Eliminated nontunable gain of 1\r\n * Block '<S49>/FFGain' : Eliminated nontunable gain of 1\r\n * Block '<S1>/Data Type Conversion1' : Eliminate redundant data type conversion\r\n * Block '<S1>/Data Type Conversion3' : Eliminate redundant data type conversion\r\n * Block '<S63>/HAC_Gain' : Eliminated nontunable gain of 1\r\n * Block '<S69>/Zero-Order Hold' : Eliminated since input and output rates are identical\r\n * Block '<S70>/Zero-Order Hold' : Eliminated since input and output rates are identical\r\n * Block '<S23>/Zero-Order Hold' : Eliminated since input and output rates are identical\r\n * Block '<S24>/Zero-Order Hold' : Eliminated since input and output rates are identical\r\n * Block '<S1>/Constant5' : Unused code path elimination\r\n */\r\n\r\n/*-\r\n * The generated code includes comments that allow you to trace directly\r\n * back to the appropriate location in the model. The basic format\r\n * is <system>/block_name, where system is the system number (uniquely\r\n * assigned by Simulink) and block_name is the name of the block.\r\n *\r\n * Use the MATLAB hilite_system command to trace the generated code back\r\n * to the model. For example,\r\n *\r\n * hilite_system('<S3>') - opens system 3\r\n * hilite_system('<S3>/Kp') - opens and selects block Kp which resides in S3\r\n *\r\n * Here is the system hierarchy for this model\r\n *\r\n * '<Root>' : 'ADM_Integrated_Logic'\r\n * '<S1>' : 'ADM_Integrated_Logic/Delivery_Mobility'\r\n * '<S2>' : 'ADM_Integrated_Logic/Delivery_Mobility/Acc_Logic'\r\n * '<S3>' : 'ADM_Integrated_Logic/Delivery_Mobility/Acceleration_Control'\r\n * '<S4>' : 'ADM_Integrated_Logic/Delivery_Mobility/Actuator_Fault_Decision'\r\n * '<S5>' : 'ADM_Integrated_Logic/Delivery_Mobility/Compare To Constant'\r\n * '<S6>' : 'ADM_Integrated_Logic/Delivery_Mobility/Cruise_Control1'\r\n * '<S7>' : 'ADM_Integrated_Logic/Delivery_Mobility/Emergency_Brake_Func'\r\n * '<S8>' : 'ADM_Integrated_Logic/Delivery_Mobility/Emergency_Motor_Func'\r\n * '<S9>' : 'ADM_Integrated_Logic/Delivery_Mobility/Enabled Subsystem'\r\n * '<S10>' : 'ADM_Integrated_Logic/Delivery_Mobility/Gear_Position'\r\n * '<S11>' : 'ADM_Integrated_Logic/Delivery_Mobility/HAC_Logic1'\r\n * '<S12>' : 'ADM_Integrated_Logic/Delivery_Mobility/IDB_Fault_Injection'\r\n * '<S13>' : 'ADM_Integrated_Logic/Delivery_Mobility/LPFM5'\r\n * '<S14>' : 'ADM_Integrated_Logic/Delivery_Mobility/MATLAB Function'\r\n * '<S15>' : 'ADM_Integrated_Logic/Delivery_Mobility/MATLAB Function1'\r\n * '<S16>' : 'ADM_Integrated_Logic/Delivery_Mobility/MATLAB Function2'\r\n * '<S17>' : 'ADM_Integrated_Logic/Delivery_Mobility/MATLAB Function3'\r\n * '<S18>' : 'ADM_Integrated_Logic/Delivery_Mobility/MATLAB Function4'\r\n * '<S19>' : 'ADM_Integrated_Logic/Delivery_Mobility/MATLAB Function5'\r\n * '<S20>' : 'ADM_Integrated_Logic/Delivery_Mobility/MATLAB Function6'\r\n * '<S21>' : 'ADM_Integrated_Logic/Delivery_Mobility/MCU_Fault_Injection'\r\n * '<S22>' : 'ADM_Integrated_Logic/Delivery_Mobility/RWA_Actuator_Fault_Injection'\r\n * '<S23>' : 'ADM_Integrated_Logic/Delivery_Mobility/Rate Limiter Dynamic'\r\n * '<S24>' : 'ADM_Integrated_Logic/Delivery_Mobility/Rate Limiter Dynamic1'\r\n * '<S25>' : 'ADM_Integrated_Logic/Delivery_Mobility/Vx_Logic'\r\n * '<S26>' : 'ADM_Integrated_Logic/Delivery_Mobility/Acc_Logic/Acc_OutPut_Function'\r\n * '<S27>' : 'ADM_Integrated_Logic/Delivery_Mobility/Acc_Logic/Saturation Dynamic'\r\n * '<S28>' : 'ADM_Integrated_Logic/Delivery_Mobility/Acceleration_Control/Controller'\r\n * '<S29>' : 'ADM_Integrated_Logic/Delivery_Mobility/Acceleration_Control/MATLAB Function'\r\n * '<S30>' : 'ADM_Integrated_Logic/Delivery_Mobility/Acceleration_Control/MATLAB Function1'\r\n * '<S31>' : 'ADM_Integrated_Logic/Delivery_Mobility/Acceleration_Control/Controller/Discrete Derivative'\r\n * '<S32>' : 'ADM_Integrated_Logic/Delivery_Mobility/Acceleration_Control/Controller/MATLAB Function'\r\n * '<S33>' : 'ADM_Integrated_Logic/Delivery_Mobility/Cruise_Control1/DOB'\r\n * '<S34>' : 'ADM_Integrated_Logic/Delivery_Mobility/Cruise_Control1/DOB_Gain'\r\n * '<S35>' : 'ADM_Integrated_Logic/Delivery_Mobility/Cruise_Control1/FF_PID_Controller'\r\n * '<S36>' : 'ADM_Integrated_Logic/Delivery_Mobility/Cruise_Control1/GearCondition_Brake'\r\n * '<S37>' : 'ADM_Integrated_Logic/Delivery_Mobility/Cruise_Control1/Gear_pos_out'\r\n * '<S38>' : 'ADM_Integrated_Logic/Delivery_Mobility/Cruise_Control1/LPFM'\r\n * '<S39>' : 'ADM_Integrated_Logic/Delivery_Mobility/Cruise_Control1/MATLAB Function'\r\n * '<S40>' : 'ADM_Integrated_Logic/Delivery_Mobility/Cruise_Control1/Mode_and_blend'\r\n * '<S41>' : 'ADM_Integrated_Logic/Delivery_Mobility/Cruise_Control1/Required_Torque1'\r\n * '<S42>' : 'ADM_Integrated_Logic/Delivery_Mobility/Cruise_Control1/Target_RPM'\r\n * '<S43>' : 'ADM_Integrated_Logic/Delivery_Mobility/Cruise_Control1/DOB/Dot3'\r\n * '<S44>' : 'ADM_Integrated_Logic/Delivery_Mobility/Cruise_Control1/DOB/Dot4'\r\n * '<S45>' : 'ADM_Integrated_Logic/Delivery_Mobility/Cruise_Control1/DOB/Dot5'\r\n * '<S46>' : 'ADM_Integrated_Logic/Delivery_Mobility/Cruise_Control1/DOB/LPFM'\r\n * '<S47>' : 'ADM_Integrated_Logic/Delivery_Mobility/Cruise_Control1/DOB/Second order LPF'\r\n * '<S48>' : 'ADM_Integrated_Logic/Delivery_Mobility/Cruise_Control1/FF_PID_Controller/FB'\r\n * '<S49>' : 'ADM_Integrated_Logic/Delivery_Mobility/Cruise_Control1/FF_PID_Controller/FF'\r\n * '<S50>' : 'ADM_Integrated_Logic/Delivery_Mobility/Cruise_Control1/FF_PID_Controller/FB/P'\r\n * '<S51>' : 'ADM_Integrated_Logic/Delivery_Mobility/Cruise_Control1/FF_PID_Controller/FF/Dot'\r\n * '<S52>' : 'ADM_Integrated_Logic/Delivery_Mobility/Cruise_Control1/FF_PID_Controller/FF/Dot2'\r\n * '<S53>' : 'ADM_Integrated_Logic/Delivery_Mobility/Cruise_Control1/FF_PID_Controller/FF/Dot3'\r\n * '<S54>' : 'ADM_Integrated_Logic/Delivery_Mobility/Cruise_Control1/FF_PID_Controller/FF/LPFM'\r\n * '<S55>' : 'ADM_Integrated_Logic/Delivery_Mobility/Cruise_Control1/FF_PID_Controller/FF/Second order LPF'\r\n * '<S56>' : 'ADM_Integrated_Logic/Delivery_Mobility/Cruise_Control1/Required_Torque1/Calculate_F_R'\r\n * '<S57>' : 'ADM_Integrated_Logic/Delivery_Mobility/Cruise_Control1/Required_Torque1/Calculate_F_c'\r\n * '<S58>' : 'ADM_Integrated_Logic/Delivery_Mobility/Enabled Subsystem/MATLAB Function'\r\n * '<S59>' : 'ADM_Integrated_Logic/Delivery_Mobility/Gear_Position/Compare To Constant'\r\n * '<S60>' : 'ADM_Integrated_Logic/Delivery_Mobility/Gear_Position/Gear_FUNCTION1'\r\n * '<S61>' : 'ADM_Integrated_Logic/Delivery_Mobility/HAC_Logic1/Chart'\r\n * '<S62>' : 'ADM_Integrated_Logic/Delivery_Mobility/HAC_Logic1/HAC_OFF_OK_Func'\r\n * '<S63>' : 'ADM_Integrated_Logic/Delivery_Mobility/HAC_Logic1/Hill_Required_Torque2'\r\n * '<S64>' : 'ADM_Integrated_Logic/Delivery_Mobility/HAC_Logic1/LPFM'\r\n * '<S65>' : 'ADM_Integrated_Logic/Delivery_Mobility/HAC_Logic1/LPFM1'\r\n * '<S66>' : 'ADM_Integrated_Logic/Delivery_Mobility/HAC_Logic1/LPFM2'\r\n * '<S67>' : 'ADM_Integrated_Logic/Delivery_Mobility/HAC_Logic1/LPFM3'\r\n * '<S68>' : 'ADM_Integrated_Logic/Delivery_Mobility/HAC_Logic1/Pitch_calculate'\r\n * '<S69>' : 'ADM_Integrated_Logic/Delivery_Mobility/HAC_Logic1/Rate Limiter Dynamic'\r\n * '<S70>' : 'ADM_Integrated_Logic/Delivery_Mobility/HAC_Logic1/Rate Limiter Dynamic1'\r\n * '<S71>' : 'ADM_Integrated_Logic/Delivery_Mobility/HAC_Logic1/Hill_Required_Torque2/Calculate_F_R'\r\n * '<S72>' : 'ADM_Integrated_Logic/Delivery_Mobility/HAC_Logic1/Hill_Required_Torque2/Calculate_F_c'\r\n * '<S73>' : 'ADM_Integrated_Logic/Delivery_Mobility/HAC_Logic1/Hill_Required_Torque2/Calculate_F_c1'\r\n * '<S74>' : 'ADM_Integrated_Logic/Delivery_Mobility/HAC_Logic1/Rate Limiter Dynamic/Saturation Dynamic'\r\n * '<S75>' : 'ADM_Integrated_Logic/Delivery_Mobility/HAC_Logic1/Rate Limiter Dynamic1/Saturation Dynamic'\r\n * '<S76>' : 'ADM_Integrated_Logic/Delivery_Mobility/Rate Limiter Dynamic/Saturation Dynamic'\r\n * '<S77>' : 'ADM_Integrated_Logic/Delivery_Mobility/Rate Limiter Dynamic1/Saturation Dynamic'\r\n * '<S78>' : 'ADM_Integrated_Logic/Delivery_Mobility/Vx_Logic/Compare To Constant'\r\n * '<S79>' : 'ADM_Integrated_Logic/Delivery_Mobility/Vx_Logic/Vx_OutPut_Function'\r\n */\r\n\r\n/*-\r\n * Requirements for '<Root>': ADM_Integrated_Logic\r\n\r\n */\r\n#endif /* ADM_Integrated_Logic_h_ */\r\n\r\n/*\r\n * File trailer for generated code.\r\n *\r\n * [EOF]\r\n */\r\n"},{"name":"ADM_Integrated_Logic_data.c","type":"source","group":"data","path":"C:\\Users\\MSI\\Documents\\WorkSpace\\git\\ADM\\[ADM] Integrated Logic\\ADM_Integrated_Logic_ert_rtw","tag":"","groupDisplay":"Data files","code":"/*\r\n * Academic License - for use in teaching, academic research, and meeting\r\n * course requirements at degree granting institutions only. Not for\r\n * government, commercial, or other organizational use.\r\n *\r\n * File: ADM_Integrated_Logic_data.c\r\n *\r\n * Code generated for Simulink model 'ADM_Integrated_Logic'.\r\n *\r\n * Model version : 14.109\r\n * Simulink Coder version : 24.2 (R2024b) 21-Jun-2024\r\n * C/C++ source code generated on : Tue Jan 6 11:24:27 2026\r\n *\r\n * Target selection: ert.tlc\r\n * Embedded hardware selection: NXP->Cortex-M4\r\n * Code generation objectives:\r\n * 1. Execution efficiency\r\n * 2. RAM efficiency\r\n * 3. Debugging\r\n * Validation result: Not run\r\n */\r\n\r\n#include \"ADM_Integrated_Logic.h\"\r\n\r\n/* Invariant block signals (default storage) */\r\nconst ConstB_ADM_Integrated_Logic_T ADM_Integrated_Logic_ConstB = {\r\n 0.034246575342465758, /* '<S41>/Multiply1' */\r\n 12753.0, /* '<S41>/Multiply2' */\r\n 12753.0, /* '<S41>/Multiply' */\r\n 0.034246575342465758, /* '<S63>/Multiply1' */\r\n 12753.0, /* '<S63>/Multiply2' */\r\n 12753.0, /* '<S63>/Multiply' */\r\n 12753.0 /* '<S63>/Multiply4' */\r\n};\r\n\r\n/*\r\n * File trailer for generated code.\r\n *\r\n * [EOF]\r\n */\r\n"}],"coverage":[{"id":"SimulinkCoverage","name":"Simulink Coverage","files":[]},{"id":"Bullseye","name":"Bullseye Coverage","files":[]},{"id":"LDRA","name":"LDRA Testbed","files":[]}],"features":{"annotation":false,"coverage":true,"profiling":true,"tooltip":true,"coverageTooltip":true,"showJustificationLinks":true,"useMWTable":false,"showProfilingInfo":true,"showTaskSummary":true,"showProtectedV2Report":true}}; |