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1 line
68 KiB
JavaScript
1 line
68 KiB
JavaScript
var dataJson = {"arch":{"ispc":true,"isunix":false,"ismac":false},"build":"ADM_Integrated_Logic","ref":false,"files":[{"name":"ert_main.c","type":"source","group":"main","path":"K:\\!사업\\배송모빌리티\\25-06-19-목 통합 로직\\ADM_Integrated_Logic_ert_rtw","tag":"","groupDisplay":"Main file","code":"/*\r\n * Academic License - for use in teaching, academic research, and meeting\r\n * course requirements at degree granting institutions only. Not for\r\n * government, commercial, or other organizational use.\r\n *\r\n * File: ert_main.c\r\n *\r\n * Code generated for Simulink model 'ADM_Integrated_Logic'.\r\n *\r\n * Model version : 11.39\r\n * Simulink Coder version : 24.1 (R2024a) 19-Nov-2023\r\n * C/C++ source code generated on : Thu Jun 19 19:37:54 2025\r\n *\r\n * Target selection: ert.tlc\r\n * Embedded hardware selection: NXP->Cortex-M4\r\n * Code generation objectives:\r\n * 1. Execution efficiency\r\n * 2. RAM efficiency\r\n * 3. Debugging\r\n * Validation result: Not run\r\n */\r\n\r\n#include <stddef.h>\r\n#include <stdio.h> /* This example main program uses printf/fflush */\r\n#include \"ADM_Integrated_Logic.h\" /* Model header file */\r\n\r\n/*\r\n * Associating rt_OneStep with a real-time clock or interrupt service routine\r\n * is what makes the generated code \"real-time\". The function rt_OneStep is\r\n * always associated with the base rate of the model. Subrates are managed\r\n * by the base rate from inside the generated code. Enabling/disabling\r\n * interrupts and floating point context switches are target specific. This\r\n * example code indicates where these should take place relative to executing\r\n * the generated code step function. Overrun behavior should be tailored to\r\n * your application needs. This example simply sets an error status in the\r\n * real-time model and returns from rt_OneStep.\r\n */\r\nvoid rt_OneStep(void);\r\nvoid rt_OneStep(void)\r\n{\r\n static bool OverrunFlag = false;\r\n\r\n /* Disable interrupts here */\r\n\r\n /* Check for overrun */\r\n if (OverrunFlag) {\r\n rtmSetErrorStatus(ADM_Integrated_Logic_M, \"Overrun\");\r\n return;\r\n }\r\n\r\n OverrunFlag = true;\r\n\r\n /* Save FPU context here (if necessary) */\r\n /* Re-enable timer or interrupt here */\r\n /* Set model inputs here */\r\n\r\n /* Step the model */\r\n ADM_Integrated_Logic_step();\r\n\r\n /* Get model outputs here */\r\n\r\n /* Indicate task complete */\r\n OverrunFlag = false;\r\n\r\n /* Disable interrupts here */\r\n /* Restore FPU context here (if necessary) */\r\n /* Enable interrupts here */\r\n}\r\n\r\n/*\r\n * The example main function illustrates what is required by your\r\n * application code to initialize, execute, and terminate the generated code.\r\n * Attaching rt_OneStep to a real-time clock is target specific. This example\r\n * illustrates how you do this relative to initializing the model.\r\n */\r\nint main(int argc, const char *argv[])\r\n{\r\n /* Unused arguments */\r\n (void)(argc);\r\n (void)(argv);\r\n\r\n /* Initialize model */\r\n ADM_Integrated_Logic_initialize();\r\n\r\n /* Attach rt_OneStep to a timer or interrupt service routine with\r\n * period 0.002 seconds (base rate of the model) here.\r\n * The call syntax for rt_OneStep is\r\n *\r\n * rt_OneStep();\r\n */\r\n printf(\"Warning: The simulation will run forever. \"\r\n \"Generated ERT main won't simulate model step behavior. \"\r\n \"To change this behavior select the 'MAT-file logging' option.\\n\");\r\n fflush((NULL));\r\n while (rtmGetErrorStatus(ADM_Integrated_Logic_M) == (NULL)) {\r\n /* Perform application tasks here */\r\n }\r\n\r\n return 0;\r\n}\r\n\r\n/*\r\n * File trailer for generated code.\r\n *\r\n * [EOF]\r\n */\r\n"},{"name":"ADM_Integrated_Logic.c","type":"source","group":"model","path":"K:\\!사업\\배송모빌리티\\25-06-19-목 통합 로직\\ADM_Integrated_Logic_ert_rtw","tag":"","groupDisplay":"Model files","code":"/*\r\n * Academic License - for use in teaching, academic research, and meeting\r\n * course requirements at degree granting institutions only. Not for\r\n * government, commercial, or other organizational use.\r\n *\r\n * File: ADM_Integrated_Logic.c\r\n *\r\n * Code generated for Simulink model 'ADM_Integrated_Logic'.\r\n *\r\n * Model version : 11.39\r\n * Simulink Coder version : 24.1 (R2024a) 19-Nov-2023\r\n * C/C++ source code generated on : Thu Jun 19 19:37:54 2025\r\n *\r\n * Target selection: ert.tlc\r\n * Embedded hardware selection: NXP->Cortex-M4\r\n * Code generation objectives:\r\n * 1. Execution efficiency\r\n * 2. RAM efficiency\r\n * 3. Debugging\r\n * Validation result: Not run\r\n */\r\n\r\n#include \"ADM_Integrated_Logic.h\"\r\n#include <stdint.h>\r\n#include <math.h>\r\n#include <stdbool.h>\r\n\r\n/* Named constants for Chart: '<S8>/Chart' */\r\n#define IN_HAC_OFF ((uint8_t)1U)\r\n#define IN_HAC_ON ((uint8_t)2U)\r\n\r\n/* Block signals and states (default storage) */\r\nDW_ADM_Integrated_Logic_T ADM_Integrated_Logic_DW;\r\n\r\n/* External inputs (root inport signals with default storage) */\r\nExtU_ADM_Integrated_Logic_T ADM_Integrated_Logic_U;\r\n\r\n/* External outputs (root outports fed by signals with default storage) */\r\nExtY_ADM_Integrated_Logic_T ADM_Integrated_Logic_Y;\r\n\r\n/* Real-time model */\r\nstatic RT_MODEL_ADM_Integrated_Logic_T ADM_Integrated_Logic_M_;\r\nRT_MODEL_ADM_Integrated_Logic_T *const ADM_Integrated_Logic_M =\r\n &ADM_Integrated_Logic_M_;\r\nstatic void ADM_Integrated_Lo_Calculate_F_c(double rtu_W, double rtu_theta,\r\n double *rty_F_c);\r\nstatic void ADM_Integrated__MATLABFunction1(double rtu_u, double *rty_y);\r\nstatic void ADM_Integrated__MATLABFunction2(double rtu_u, double *rty_y);\r\n\r\n/*\r\n * Output and update for atomic system:\r\n * '<S43>/Calculate_F_c'\r\n * '<S43>/Calculate_F_c1'\r\n */\r\nstatic void ADM_Integrated_Lo_Calculate_F_c(double rtu_W, double rtu_theta,\r\n double *rty_F_c)\r\n{\r\n *rty_F_c = rtu_W * sin(rtu_theta);\r\n}\r\n\r\n/*\r\n * Output and update for atomic system:\r\n * '<S1>/MATLAB Function1'\r\n * '<S1>/MATLAB Function5'\r\n */\r\nstatic void ADM_Integrated__MATLABFunction1(double rtu_u, double *rty_y)\r\n{\r\n *rty_y = rtu_u;\r\n if (rtu_u < 140.0) {\r\n *rty_y = 140.0;\r\n }\r\n}\r\n\r\n/*\r\n * Output and update for atomic system:\r\n * '<S1>/MATLAB Function2'\r\n * '<S1>/MATLAB Function6'\r\n */\r\nstatic void ADM_Integrated__MATLABFunction2(double rtu_u, double *rty_y)\r\n{\r\n *rty_y = rtu_u;\r\n if (rtu_u > -140.0) {\r\n *rty_y = -140.0;\r\n }\r\n}\r\n\r\n/* Model step function */\r\nvoid ADM_Integrated_Logic_step(void)\r\n{\r\n double rtb_Add1;\r\n double rtb_Add3;\r\n double rtb_Add_e;\r\n double rtb_Brake_Saturation;\r\n double rtb_Brake_Torque_Cmd;\r\n double rtb_Error_m;\r\n double rtb_Gain_c;\r\n double rtb_Integrator_1;\r\n double rtb_Memory;\r\n double rtb_Product1_ee;\r\n double rtb_Product1_h;\r\n double rtb_Product1_j;\r\n double rtb_Product1_kq;\r\n double rtb_Product1_m;\r\n double rtb_Sum1_aj;\r\n double rtb_Sum1_i2;\r\n double rtb_Sum1_lm;\r\n double rtb_Sum1_o1;\r\n double rtb_Sum1_p;\r\n double rtb_Switch2;\r\n double rtb_TargetSpd_RateLimiter;\r\n double rtb_Target_RPM;\r\n double rtb_UkYk1;\r\n double rtb_UkYk1_a;\r\n double rtb_Vx_Cmd_R;\r\n double rtb_Yk1_e;\r\n double rtb_deltafalllimit_m;\r\n double rtb_y;\r\n double rtb_y_n;\r\n double u0;\r\n int32_t tmp;\r\n bool rtb_Compare;\r\n bool rtb_Compare_d;\r\n\r\n /* RelationalOperator: '<S3>/Compare' incorporates:\r\n * Constant: '<S3>/Constant'\r\n * Inport: '<Root>/GV_Operation_Mode'\r\n */\r\n rtb_Compare = (ADM_Integrated_Logic_U.GV_Operation_Mode == 2.0);\r\n\r\n /* MATLAB Function: '<S18>/Vx_OutPut_Function' incorporates:\r\n * Constant: '<S58>/Constant'\r\n * Inport: '<Root>/GV_BrakeTorqueCommand'\r\n * Inport: '<Root>/GV_Vx_Command'\r\n * Inport: '<Root>/GV_Vx_Limit'\r\n * RelationalOperator: '<S58>/Compare'\r\n */\r\n if (!(ADM_Integrated_Logic_U.GV_BrakeTorqueCommand >= 50.0)) {\r\n if (ADM_Integrated_Logic_U.GV_Vx_Limit <=\r\n ADM_Integrated_Logic_U.GV_Vx_Command) {\r\n rtb_Add_e = ADM_Integrated_Logic_U.GV_Vx_Limit;\r\n } else {\r\n rtb_Add_e = ADM_Integrated_Logic_U.GV_Vx_Command;\r\n }\r\n } else {\r\n rtb_Add_e = 0.0;\r\n }\r\n\r\n /* Product: '<S18>/Product' incorporates:\r\n * MATLAB Function: '<S18>/Vx_OutPut_Function'\r\n * Switch: '<S18>/Switch'\r\n */\r\n rtb_y_n = rtb_Add_e * (double)!rtb_Compare;\r\n\r\n /* RateLimiter: '<S18>/Input_Vx_RateLimiter' */\r\n rtb_TargetSpd_RateLimiter = rtb_y_n - ADM_Integrated_Logic_DW.PrevY;\r\n if (rtb_TargetSpd_RateLimiter > 0.004) {\r\n rtb_Vx_Cmd_R = ADM_Integrated_Logic_DW.PrevY + 0.004;\r\n } else if (rtb_TargetSpd_RateLimiter < -0.008) {\r\n rtb_Vx_Cmd_R = ADM_Integrated_Logic_DW.PrevY - 0.008;\r\n } else {\r\n rtb_Vx_Cmd_R = rtb_y_n;\r\n }\r\n\r\n ADM_Integrated_Logic_DW.PrevY = rtb_Vx_Cmd_R;\r\n\r\n /* End of RateLimiter: '<S18>/Input_Vx_RateLimiter' */\r\n\r\n /* RelationalOperator: '<S39>/Compare' incorporates:\r\n * Constant: '<S39>/Constant'\r\n * Inport: '<Root>/GV_BrakeTorqueCommand'\r\n */\r\n rtb_Compare_d = (ADM_Integrated_Logic_U.GV_BrakeTorqueCommand >= 100.0);\r\n\r\n /* Delay: '<S7>/Memory' */\r\n rtb_Memory = ADM_Integrated_Logic_DW.Memory_DSTATE;\r\n\r\n /* MATLAB Function: '<S7>/Gear_FUNCTION1' incorporates:\r\n * Inport: '<Root>/GV_VCU_GearSelStat'\r\n * Inport: '<Root>/GV_Vx_Fbk'\r\n */\r\n if (ADM_Integrated_Logic_U.GV_VCU_GearSelStat == 0.0) {\r\n if ((ADM_Integrated_Logic_U.GV_Vx_Fbk <= 0.0) && rtb_Compare_d) {\r\n rtb_Memory = 0.0;\r\n }\r\n } else {\r\n switch ((int32_t)rtb_Memory) {\r\n case 0:\r\n if ((ADM_Integrated_Logic_U.GV_Vx_Fbk <= 0.0) &&\r\n ((ADM_Integrated_Logic_U.GV_VCU_GearSelStat == 1.0) ||\r\n (ADM_Integrated_Logic_U.GV_VCU_GearSelStat == 3.0) ||\r\n (ADM_Integrated_Logic_U.GV_VCU_GearSelStat == 2.0))) {\r\n rtb_Memory = 2.0;\r\n }\r\n break;\r\n\r\n case 1:\r\n if (ADM_Integrated_Logic_U.GV_VCU_GearSelStat == 2.0) {\r\n rtb_Memory = 2.0;\r\n }\r\n break;\r\n\r\n case 2:\r\n if ((ADM_Integrated_Logic_U.GV_Vx_Fbk <= 0.0) && rtb_Compare_d) {\r\n if (ADM_Integrated_Logic_U.GV_VCU_GearSelStat == 1.0) {\r\n rtb_Memory = 1.0;\r\n } else if (ADM_Integrated_Logic_U.GV_VCU_GearSelStat == 3.0) {\r\n rtb_Memory = 3.0;\r\n }\r\n }\r\n break;\r\n\r\n case 3:\r\n if (ADM_Integrated_Logic_U.GV_VCU_GearSelStat == 2.0) {\r\n rtb_Memory = 2.0;\r\n }\r\n break;\r\n }\r\n }\r\n\r\n /* End of MATLAB Function: '<S7>/Gear_FUNCTION1' */\r\n\r\n /* Chart: '<S8>/Chart' incorporates:\r\n * Constant: '<S8>/Constant'\r\n * Constant: '<S8>/Constant1'\r\n * Inport: '<Root>/GV_MCU_RPM'\r\n */\r\n if (ADM_Integrated_Logic_DW.is_active_c6_ADM_Integrated_Log == 0U) {\r\n ADM_Integrated_Logic_DW.is_active_c6_ADM_Integrated_Log = 1U;\r\n ADM_Integrated_Logic_DW.is_c6_ADM_Integrated_Logic = IN_HAC_OFF;\r\n } else if (ADM_Integrated_Logic_DW.is_c6_ADM_Integrated_Logic == IN_HAC_OFF) {\r\n if (ADM_Integrated_Logic_U.GV_MCU_RPM < -50.0) {\r\n ADM_Integrated_Logic_DW.is_c6_ADM_Integrated_Logic = IN_HAC_ON;\r\n } else {\r\n /* Outport: '<Root>/Debug_HAC_RPM_Decision' */\r\n ADM_Integrated_Logic_Y.Debug_HAC_RPM_Decision = 0.0;\r\n }\r\n\r\n /* case IN_HAC_ON: */\r\n } else if (ADM_Integrated_Logic_U.GV_MCU_RPM > 150.0) {\r\n ADM_Integrated_Logic_DW.is_c6_ADM_Integrated_Logic = IN_HAC_OFF;\r\n } else {\r\n /* Outport: '<Root>/Debug_HAC_RPM_Decision' */\r\n ADM_Integrated_Logic_Y.Debug_HAC_RPM_Decision = 1.0;\r\n }\r\n\r\n /* End of Chart: '<S8>/Chart' */\r\n\r\n /* Product: '<S49>/delta rise limit' incorporates:\r\n * Constant: '<S8>/Upper_Torq'\r\n * SampleTimeMath: '<S49>/sample time'\r\n *\r\n * About '<S49>/sample time':\r\n * y = K where K = ( w * Ts )\r\n * */\r\n rtb_y_n = 0.016;\r\n\r\n /* UnitDelay: '<S50>/Delay Input2'\r\n *\r\n * Block description for '<S50>/Delay Input2':\r\n *\r\n * Store in Global RAM\r\n */\r\n rtb_Yk1_e = ADM_Integrated_Logic_DW.DelayInput2_DSTATE_m;\r\n\r\n /* Product: '<S50>/delta rise limit' incorporates:\r\n * SampleTimeMath: '<S50>/sample time'\r\n *\r\n * About '<S50>/sample time':\r\n * y = K where K = ( w * Ts )\r\n * */\r\n rtb_Integrator_1 = 0.002;\r\n\r\n /* Saturate: '<S8>/Pitch_Saturation' incorporates:\r\n * DiscreteIntegrator: '<S8>/Integrator_2'\r\n */\r\n if (ADM_Integrated_Logic_DW.Integrator_2_DSTATE > 10.0) {\r\n rtb_Add_e = 10.0;\r\n } else if (ADM_Integrated_Logic_DW.Integrator_2_DSTATE < -10.0) {\r\n rtb_Add_e = -10.0;\r\n } else {\r\n rtb_Add_e = ADM_Integrated_Logic_DW.Integrator_2_DSTATE;\r\n }\r\n\r\n /* Sum: '<S50>/Difference Inputs1' incorporates:\r\n * Saturate: '<S8>/Pitch_Saturation'\r\n *\r\n * Block description for '<S50>/Difference Inputs1':\r\n *\r\n * Add in CPU\r\n */\r\n rtb_UkYk1 = rtb_Add_e - rtb_Yk1_e;\r\n\r\n /* Switch: '<S55>/Switch2' incorporates:\r\n * RelationalOperator: '<S55>/LowerRelop1'\r\n */\r\n if (!(rtb_UkYk1 > 0.002)) {\r\n /* Switch: '<S55>/Switch' incorporates:\r\n * RelationalOperator: '<S55>/UpperRelop'\r\n */\r\n if (rtb_UkYk1 < -0.002) {\r\n rtb_Integrator_1 = -0.002;\r\n } else {\r\n rtb_Integrator_1 = rtb_UkYk1;\r\n }\r\n\r\n /* End of Switch: '<S55>/Switch' */\r\n }\r\n\r\n /* End of Switch: '<S55>/Switch2' */\r\n\r\n /* Sum: '<S50>/Difference Inputs2'\r\n *\r\n * Block description for '<S50>/Difference Inputs2':\r\n *\r\n * Add in CPU\r\n */\r\n rtb_Yk1_e += rtb_Integrator_1;\r\n\r\n /* MATLAB Function: '<S43>/Calculate_F_c' incorporates:\r\n * Gain: '<S43>/Gain'\r\n */\r\n ADM_Integrated_Lo_Calculate_F_c(ADM_Integrated_Logic_ConstB.W_value,\r\n 0.017453292519943295 * rtb_Yk1_e, &rtb_UkYk1);\r\n\r\n /* Gain: '<S43>/Gain2' incorporates:\r\n * Constant: '<S43>/Radius'\r\n * Gain: '<S43>/Gain1'\r\n * Gain: '<S43>/Rolling_Gain'\r\n * MATLAB Function: '<S43>/Calculate_F_R'\r\n * Product: '<S43>/Multiply3'\r\n * Sum: '<S43>/Required_Brake_Cal'\r\n */\r\n rtb_Integrator_1 = (cos(0.017453292519943295 * rtb_Yk1_e) * 436.7465753424658 *\r\n 0.0 + rtb_UkYk1) * 0.292 * 0.083822296730930432;\r\n\r\n /* Saturate: '<S43>/Saturation' */\r\n if (rtb_Integrator_1 > 60.0) {\r\n rtb_Integrator_1 = 60.0;\r\n } else if (rtb_Integrator_1 < 0.0) {\r\n rtb_Integrator_1 = 0.0;\r\n }\r\n\r\n /* Sum: '<S49>/Difference Inputs1' incorporates:\r\n * Saturate: '<S43>/Saturation'\r\n * UnitDelay: '<S49>/Delay Input2'\r\n *\r\n * Block description for '<S49>/Difference Inputs1':\r\n *\r\n * Add in CPU\r\n *\r\n * Block description for '<S49>/Delay Input2':\r\n *\r\n * Store in Global RAM\r\n */\r\n rtb_UkYk1 = rtb_Integrator_1 - ADM_Integrated_Logic_DW.DelayInput2_DSTATE;\r\n\r\n /* Switch: '<S54>/Switch2' incorporates:\r\n * RelationalOperator: '<S54>/LowerRelop1'\r\n */\r\n if (!(rtb_UkYk1 > 0.016)) {\r\n /* Switch: '<S54>/Switch' incorporates:\r\n * RelationalOperator: '<S54>/UpperRelop'\r\n */\r\n if (rtb_UkYk1 < -0.16) {\r\n rtb_y_n = -0.16;\r\n } else {\r\n rtb_y_n = rtb_UkYk1;\r\n }\r\n\r\n /* End of Switch: '<S54>/Switch' */\r\n }\r\n\r\n /* End of Switch: '<S54>/Switch2' */\r\n\r\n /* Sum: '<S49>/Difference Inputs2' incorporates:\r\n * UnitDelay: '<S49>/Delay Input2'\r\n *\r\n * Block description for '<S49>/Difference Inputs2':\r\n *\r\n * Add in CPU\r\n *\r\n * Block description for '<S49>/Delay Input2':\r\n *\r\n * Store in Global RAM\r\n */\r\n rtb_UkYk1 = rtb_y_n + ADM_Integrated_Logic_DW.DelayInput2_DSTATE;\r\n\r\n /* Gain: '<S8>/Grade_GAIN' */\r\n rtb_deltafalllimit_m = 0.8 * rtb_UkYk1;\r\n\r\n /* MATLAB Function: '<S8>/HAC_OFF_OK_Func' */\r\n rtb_Brake_Torque_Cmd = 0.0;\r\n\r\n /* Outport: '<Root>/Debug_HAC_FLAG' incorporates:\r\n * MATLAB Function: '<S8>/HAC_OFF_OK_Func'\r\n */\r\n ADM_Integrated_Logic_Y.Debug_HAC_FLAG = 0.0;\r\n\r\n /* MATLAB Function: '<S8>/HAC_OFF_OK_Func' incorporates:\r\n * Constant: '<S8>/Accel_Cmd '\r\n * Constant: '<S8>/Brake_Cmd'\r\n * Constant: '<S8>/Gear_D'\r\n * Inport: '<Root>/GV_BrakeTorqueCommand'\r\n * Inport: '<Root>/GV_MCU_EstTrq'\r\n * Outport: '<Root>/Debug_HAC_RPM_Decision'\r\n * RelationalOperator: '<S8>/Relational Operator'\r\n * RelationalOperator: '<S8>/Relational Operator1'\r\n * RelationalOperator: '<S8>/Relational Operator2'\r\n * Sum: '<S8>/HAC_Flags_Add'\r\n */\r\n if ((double)(((ADM_Integrated_Logic_U.GV_BrakeTorqueCommand <= 20.0) +\r\n (rtb_Vx_Cmd_R <= 2.0)) + (rtb_Memory == 3.0)) +\r\n ADM_Integrated_Logic_Y.Debug_HAC_RPM_Decision >= 4.0) {\r\n if (ADM_Integrated_Logic_DW.HAC_ON_FLAG == 0.0) {\r\n ADM_Integrated_Logic_DW.HAC_ON_Timer = 0.0;\r\n }\r\n\r\n ADM_Integrated_Logic_DW.HAC_ON_FLAG = 1.0;\r\n rtb_Brake_Torque_Cmd = 1000.0;\r\n ADM_Integrated_Logic_DW.Smoothed_Torque = 1000.0;\r\n if (ADM_Integrated_Logic_DW.HAC_ON_Timer < 3.0) {\r\n ADM_Integrated_Logic_DW.HAC_Desired_Torque = rtb_deltafalllimit_m;\r\n ADM_Integrated_Logic_DW.HAC_ON_Timer += 0.005;\r\n }\r\n\r\n /* Outport: '<Root>/Debug_HAC_FLAG' */\r\n ADM_Integrated_Logic_Y.Debug_HAC_FLAG = 1.0;\r\n } else if (ADM_Integrated_Logic_DW.HAC_ON_FLAG == 1.0) {\r\n if (ADM_Integrated_Logic_U.GV_MCU_EstTrq >=\r\n ADM_Integrated_Logic_DW.HAC_Desired_Torque) {\r\n ADM_Integrated_Logic_DW.Smoothed_Torque -= 0.05 *\r\n ADM_Integrated_Logic_DW.Smoothed_Torque;\r\n if (ADM_Integrated_Logic_DW.Smoothed_Torque < 0.01) {\r\n ADM_Integrated_Logic_DW.Smoothed_Torque = 0.0;\r\n ADM_Integrated_Logic_DW.HAC_ON_FLAG = 0.0;\r\n ADM_Integrated_Logic_DW.HAC_Desired_Torque = 0.0;\r\n ADM_Integrated_Logic_DW.HAC_ON_Timer = 0.0;\r\n }\r\n\r\n rtb_Brake_Torque_Cmd = ADM_Integrated_Logic_DW.Smoothed_Torque;\r\n } else {\r\n rtb_Brake_Torque_Cmd = 1000.0;\r\n ADM_Integrated_Logic_DW.Smoothed_Torque = 1000.0;\r\n\r\n /* Outport: '<Root>/Debug_HAC_FLAG' */\r\n ADM_Integrated_Logic_Y.Debug_HAC_FLAG = 1.0;\r\n }\r\n }\r\n\r\n /* Gain: '<S4>/Brake_GAIN' incorporates:\r\n * DiscreteTransferFcn: '<S1>/Discrete Transfer Fcn'\r\n */\r\n u0 = 0.0625 * ADM_Integrated_Logic_DW.DiscreteTransferFcn_states * -80.0;\r\n\r\n /* MATLAB Function: '<S4>/GearCondition_Brake' */\r\n if (rtb_Memory == 1.0) {\r\n tmp = -1;\r\n } else {\r\n tmp = (rtb_Memory == 3.0);\r\n }\r\n\r\n /* Saturate: '<S4>/Saturation' */\r\n if (u0 > 1000.0) {\r\n u0 = 1000.0;\r\n } else if (u0 < 0.0) {\r\n u0 = 0.0;\r\n }\r\n\r\n /* Product: '<S4>/Multiply2' incorporates:\r\n * MATLAB Function: '<S4>/GearCondition_Brake'\r\n * Saturate: '<S4>/Saturation'\r\n */\r\n rtb_Integrator_1 = (double)tmp * u0;\r\n\r\n /* RateLimiter: '<S4>/Brake_Out_RateLimiter' */\r\n rtb_TargetSpd_RateLimiter = rtb_Integrator_1 - ADM_Integrated_Logic_DW.PrevY_o;\r\n if (rtb_TargetSpd_RateLimiter > 3.0) {\r\n rtb_Integrator_1 = ADM_Integrated_Logic_DW.PrevY_o + 3.0;\r\n } else if (rtb_TargetSpd_RateLimiter < -3.0) {\r\n rtb_Integrator_1 = ADM_Integrated_Logic_DW.PrevY_o - 3.0;\r\n }\r\n\r\n ADM_Integrated_Logic_DW.PrevY_o = rtb_Integrator_1;\r\n\r\n /* End of RateLimiter: '<S4>/Brake_Out_RateLimiter' */\r\n\r\n /* Saturate: '<S4>/Brake_Saturation' */\r\n if (rtb_Integrator_1 > 1000.0) {\r\n rtb_Integrator_1 = 1000.0;\r\n } else if (rtb_Integrator_1 < 0.0) {\r\n rtb_Integrator_1 = 0.0;\r\n }\r\n\r\n /* End of Saturate: '<S4>/Brake_Saturation' */\r\n\r\n /* MATLAB Function: '<S1>/Emergency_Brake_Func' incorporates:\r\n * Inport: '<Root>/GV_Vx_Fbk'\r\n * Sum: '<S1>/Add'\r\n */\r\n if (rtb_Compare) {\r\n rtb_Brake_Saturation = ADM_Integrated_Logic_U.GV_Vx_Fbk * 100.0;\r\n } else {\r\n rtb_Brake_Saturation = rtb_Brake_Torque_Cmd + rtb_Integrator_1;\r\n }\r\n\r\n /* Saturate: '<S1>/Brake_Saturation' incorporates:\r\n * MATLAB Function: '<S1>/Emergency_Brake_Func'\r\n */\r\n if (rtb_Brake_Saturation > 1500.0) {\r\n rtb_Brake_Saturation = 1500.0;\r\n } else if (rtb_Brake_Saturation < 0.0) {\r\n rtb_Brake_Saturation = 0.0;\r\n }\r\n\r\n /* End of Saturate: '<S1>/Brake_Saturation' */\r\n\r\n /* MATLAB Function: '<S1>/IDB_Fault_Injection' incorporates:\r\n * Inport: '<Root>/GV_RC_IDB_Fault'\r\n * Inport: '<Root>/IDB_ECU_FAULT_FLAG'\r\n * Inport: '<Root>/RCU_ECU_FAULT_FLAG'\r\n */\r\n if ((ADM_Integrated_Logic_U.GV_RC_IDB_Fault == 1.0) ||\r\n ((ADM_Integrated_Logic_U.IDB_ECU_FAULT_FLAG == 1.0) &&\r\n (ADM_Integrated_Logic_U.RCU_ECU_FAULT_FLAG == 1.0))) {\r\n /* Outport: '<Root>/GV_Brake_Command' */\r\n ADM_Integrated_Logic_Y.GV_Brake_Command = 0.0;\r\n } else {\r\n /* Outport: '<Root>/GV_Brake_Command' */\r\n ADM_Integrated_Logic_Y.GV_Brake_Command = rtb_Brake_Saturation;\r\n }\r\n\r\n /* Outport: '<Root>/Target_IDB_Out' incorporates:\r\n * MATLAB Function: '<S1>/IDB_Fault_Injection'\r\n */\r\n ADM_Integrated_Logic_Y.Target_IDB_Out = rtb_Brake_Saturation;\r\n\r\n /* Outport: '<Root>/Debug_CC_Brake_Output' */\r\n ADM_Integrated_Logic_Y.Debug_CC_Brake_Output = rtb_Integrator_1;\r\n\r\n /* Outport: '<Root>/Debug_HAC_Brake_Output' */\r\n ADM_Integrated_Logic_Y.Debug_HAC_Brake_Output = rtb_Brake_Torque_Cmd;\r\n\r\n /* Outport: '<Root>/GV_Hill_Torque_Assist' */\r\n ADM_Integrated_Logic_Y.GV_Hill_Torque_Assist = rtb_deltafalllimit_m;\r\n\r\n /* Outport: '<Root>/Debug_HAC_Pitch_angle' */\r\n ADM_Integrated_Logic_Y.Debug_HAC_Pitch_angle = rtb_Yk1_e;\r\n\r\n /* MATLAB Function: '<S43>/Calculate_F_c1' incorporates:\r\n * Gain: '<S43>/Gain3'\r\n */\r\n ADM_Integrated_Lo_Calculate_F_c(ADM_Integrated_Logic_ConstB.W_Value_for_Brake,\r\n 0.017453292519943295 * rtb_Yk1_e, &rtb_deltafalllimit_m);\r\n\r\n /* Product: '<S44>/Product1' incorporates:\r\n * Constant: '<S44>/Constant'\r\n * Gain: '<S44>/gain'\r\n * Inport: '<Root>/GV_IMU_AX_Val'\r\n * Product: '<S44>/Product11'\r\n * Sum: '<S44>/Sum1'\r\n * Sum: '<S44>/Sum2'\r\n * Sum: '<S44>/Sum3'\r\n * Sum: '<S44>/Sum4'\r\n * UnitDelay: '<S44>/d'\r\n * UnitDelay: '<S44>/d1'\r\n */\r\n rtb_deltafalllimit_m = ((ADM_Integrated_Logic_U.GV_IMU_AX_Val +\r\n ADM_Integrated_Logic_DW.d1_DSTATE) * 0.002 + 0.061661977236758134 *\r\n ADM_Integrated_Logic_DW.d_DSTATE) / 0.065661977236758137;\r\n\r\n /* Product: '<S45>/Product1' incorporates:\r\n * Constant: '<S45>/Constant'\r\n * Gain: '<S45>/gain'\r\n * Inport: '<Root>/GV_IMU_AY_Val'\r\n * Product: '<S45>/Product11'\r\n * Sum: '<S45>/Sum1'\r\n * Sum: '<S45>/Sum2'\r\n * Sum: '<S45>/Sum3'\r\n * Sum: '<S45>/Sum4'\r\n * UnitDelay: '<S45>/d'\r\n * UnitDelay: '<S45>/d1'\r\n */\r\n rtb_Brake_Torque_Cmd = ((ADM_Integrated_Logic_U.GV_IMU_AY_Val +\r\n ADM_Integrated_Logic_DW.d1_DSTATE_i) * 0.002 + 0.061661977236758134 *\r\n ADM_Integrated_Logic_DW.d_DSTATE_p) / 0.065661977236758137;\r\n\r\n /* Product: '<S46>/Product1' incorporates:\r\n * Constant: '<S46>/Constant'\r\n * Gain: '<S46>/gain'\r\n * Inport: '<Root>/GV_IMU_AZ_Val'\r\n * Product: '<S46>/Product11'\r\n * Sum: '<S46>/Sum1'\r\n * Sum: '<S46>/Sum2'\r\n * Sum: '<S46>/Sum3'\r\n * Sum: '<S46>/Sum4'\r\n * UnitDelay: '<S46>/d'\r\n * UnitDelay: '<S46>/d1'\r\n */\r\n rtb_Integrator_1 = ((ADM_Integrated_Logic_U.GV_IMU_AZ_Val +\r\n ADM_Integrated_Logic_DW.d1_DSTATE_o) * 0.002 +\r\n 0.061661977236758134 * ADM_Integrated_Logic_DW.d_DSTATE_n)\r\n / 0.065661977236758137;\r\n\r\n /* MATLAB Function: '<S8>/Pitch_calculate' */\r\n rtb_Brake_Saturation = sqrt(rtb_Brake_Torque_Cmd * rtb_Brake_Torque_Cmd +\r\n rtb_Integrator_1 * rtb_Integrator_1);\r\n if (!(rtb_Brake_Saturation == 0.0)) {\r\n rtb_Brake_Saturation = atan(rtb_deltafalllimit_m / rtb_Brake_Saturation);\r\n }\r\n\r\n /* Sum: '<S8>/Sum' incorporates:\r\n * DiscreteIntegrator: '<S8>/Integrator_2'\r\n * MATLAB Function: '<S8>/Pitch_calculate'\r\n */\r\n rtb_Brake_Saturation = ADM_Integrated_Logic_DW.Integrator_2_DSTATE -\r\n rtb_Brake_Saturation * 57.295779513082323;\r\n\r\n /* Product: '<S47>/Product1' incorporates:\r\n * Constant: '<S47>/Constant'\r\n * Gain: '<S47>/gain'\r\n * Inport: '<Root>/GV_IMU_PitchRtVal'\r\n * Product: '<S47>/Product11'\r\n * Sum: '<S47>/Sum1'\r\n * Sum: '<S47>/Sum2'\r\n * Sum: '<S47>/Sum3'\r\n * Sum: '<S47>/Sum4'\r\n * UnitDelay: '<S47>/d'\r\n * UnitDelay: '<S47>/d1'\r\n */\r\n rtb_Product1_m = ((ADM_Integrated_Logic_U.GV_IMU_PitchRtVal +\r\n ADM_Integrated_Logic_DW.d1_DSTATE_a) * 0.002 +\r\n 0.061661977236758134 * ADM_Integrated_Logic_DW.d_DSTATE_d) /\r\n 0.065661977236758137;\r\n\r\n /* MATLAB Function: '<S4>/Target_RPM' */\r\n if (rtb_Memory == 0.0) {\r\n tmp = 0;\r\n } else if (rtb_Memory == 2.0) {\r\n tmp = 0;\r\n } else if (rtb_Memory == 1.0) {\r\n tmp = -1;\r\n } else {\r\n tmp = (rtb_Memory == 3.0);\r\n }\r\n\r\n rtb_Target_RPM = rtb_Vx_Cmd_R * 1000.0 / 3600.0 * 11.93 * 60.0 /\r\n 1.7013672006633955 * (double)tmp;\r\n\r\n /* End of MATLAB Function: '<S4>/Target_RPM' */\r\n\r\n /* RateLimiter: '<S4>/TargetSpd_RateLimiter' */\r\n rtb_TargetSpd_RateLimiter = rtb_Target_RPM - ADM_Integrated_Logic_DW.PrevY_a;\r\n if (rtb_TargetSpd_RateLimiter > 0.4) {\r\n rtb_TargetSpd_RateLimiter = ADM_Integrated_Logic_DW.PrevY_a + 0.4;\r\n } else if (rtb_TargetSpd_RateLimiter < -0.8) {\r\n rtb_TargetSpd_RateLimiter = ADM_Integrated_Logic_DW.PrevY_a - 0.8;\r\n } else {\r\n rtb_TargetSpd_RateLimiter = rtb_Target_RPM;\r\n }\r\n\r\n ADM_Integrated_Logic_DW.PrevY_a = rtb_TargetSpd_RateLimiter;\r\n\r\n /* End of RateLimiter: '<S4>/TargetSpd_RateLimiter' */\r\n\r\n /* Product: '<S24>/Product1' incorporates:\r\n * Constant: '<S24>/Constant'\r\n * Gain: '<S24>/gain'\r\n * Product: '<S24>/Product11'\r\n * Sum: '<S24>/Sum1'\r\n * Sum: '<S24>/Sum2'\r\n * Sum: '<S24>/Sum3'\r\n * Sum: '<S24>/Sum4'\r\n * UnitDelay: '<S24>/d'\r\n * UnitDelay: '<S24>/d1'\r\n */\r\n rtb_Target_RPM = ((rtb_TargetSpd_RateLimiter +\r\n ADM_Integrated_Logic_DW.d1_DSTATE_c) * 0.002 +\r\n 0.1041032953945969 * ADM_Integrated_Logic_DW.d_DSTATE_l) /\r\n 0.1081032953945969;\r\n\r\n /* Sum: '<S34>/Sum1' incorporates:\r\n * Gain: '<S34>/gain'\r\n * Sum: '<S34>/Sum2'\r\n * UnitDelay: '<S34>/d'\r\n * UnitDelay: '<S34>/d1'\r\n */\r\n rtb_Sum1_i2 = (rtb_Target_RPM - ADM_Integrated_Logic_DW.d_DSTATE_i) * 1000.0 -\r\n ADM_Integrated_Logic_DW.d1_DSTATE_p;\r\n\r\n /* Sum: '<S35>/Sum1' incorporates:\r\n * Gain: '<S35>/gain'\r\n * Sum: '<S35>/Sum2'\r\n * UnitDelay: '<S35>/d'\r\n * UnitDelay: '<S35>/d1'\r\n */\r\n rtb_Sum1_o1 = (rtb_Sum1_i2 - ADM_Integrated_Logic_DW.d_DSTATE_c) * 1000.0 -\r\n ADM_Integrated_Logic_DW.d1_DSTATE_h;\r\n\r\n /* Sum: '<S36>/Sum1' incorporates:\r\n * Gain: '<S36>/gain'\r\n * Sum: '<S36>/Sum2'\r\n * UnitDelay: '<S36>/d'\r\n * UnitDelay: '<S36>/d1'\r\n */\r\n rtb_Sum1_lm = (rtb_Sum1_o1 - ADM_Integrated_Logic_DW.d_DSTATE_db) * 1000.0 -\r\n ADM_Integrated_Logic_DW.d1_DSTATE_l;\r\n\r\n /* Gain: '<S32>/Gain' incorporates:\r\n * Constant: '<S32>/Constant3'\r\n * Constant: '<S32>/Constant4'\r\n * Constant: '<S32>/Constant5'\r\n * Product: '<S32>/Product'\r\n * Product: '<S32>/Product1'\r\n * Product: '<S32>/Product2'\r\n * Sum: '<S32>/Add5'\r\n */\r\n rtb_Gain_c = (((156.8 * rtb_Target_RPM + 212.8 * rtb_Sum1_i2) + 21.8 *\r\n rtb_Sum1_o1) + rtb_Sum1_lm) * 9.44822373393802E-6;\r\n\r\n /* Product: '<S38>/Product1' incorporates:\r\n * Constant: '<S38>/Constant1'\r\n * Constant: '<S38>/Constant2'\r\n * Delay: '<S38>/Delay'\r\n * Delay: '<S38>/Delay1'\r\n * Delay: '<S38>/Delay2'\r\n * Delay: '<S38>/Delay3'\r\n * Gain: '<S38>/gain1'\r\n * Gain: '<S38>/gain3'\r\n * Product: '<S38>/x(n), x(n-1), x(n-2)'\r\n * Product: '<S38>/y(n-1)'\r\n * Product: '<S38>/y(n-2)'\r\n * Sum: '<S38>/Sum1'\r\n * Sum: '<S38>/Sum2'\r\n * Sum: '<S38>/Sum3'\r\n * Sum: '<S38>/Sum4'\r\n * Sum: '<S38>/Sum5'\r\n * Sum: '<S38>/Sum6'\r\n */\r\n rtb_Product1_j = ((((2.0 * ADM_Integrated_Logic_DW.Delay1_DSTATE + rtb_Gain_c)\r\n + ADM_Integrated_Logic_DW.Delay_DSTATE[0]) *\r\n 0.39478417604357435 - -7.2104316479128512 *\r\n ADM_Integrated_Logic_DW.Delay2_DSTATE) - 2.6178993711731877\r\n * ADM_Integrated_Logic_DW.Delay3_DSTATE[0]) /\r\n 6.1716689809139611;\r\n\r\n /* Product: '<S37>/Product1' incorporates:\r\n * Constant: '<S37>/Constant'\r\n * Gain: '<S37>/gain'\r\n * Product: '<S37>/Product11'\r\n * Sum: '<S37>/Sum1'\r\n * Sum: '<S37>/Sum2'\r\n * Sum: '<S37>/Sum3'\r\n * Sum: '<S37>/Sum4'\r\n * UnitDelay: '<S37>/d'\r\n * UnitDelay: '<S37>/d1'\r\n */\r\n rtb_Product1_ee = ((rtb_Product1_j + ADM_Integrated_Logic_DW.d1_DSTATE_e) *\r\n 0.002 + 0.00861032953945969 *\r\n ADM_Integrated_Logic_DW.d_DSTATE_ij) / 0.01261032953945969;\r\n\r\n /* Sum: '<S4>/Subtract' incorporates:\r\n * Inport: '<Root>/GV_MCU_RPM'\r\n * MultiPortSwitch: '<S31>/Multiport Switch1'\r\n */\r\n rtb_Error_m = rtb_Target_RPM - ADM_Integrated_Logic_U.GV_MCU_RPM;\r\n\r\n /* Saturate: '<S4>/Error_Saturation' incorporates:\r\n * MultiPortSwitch: '<S31>/Multiport Switch1'\r\n */\r\n if (rtb_Error_m > 2000.0) {\r\n rtb_Error_m = 2000.0;\r\n } else if (rtb_Error_m < -2000.0) {\r\n rtb_Error_m = -2000.0;\r\n }\r\n\r\n /* End of Saturate: '<S4>/Error_Saturation' */\r\n\r\n /* DeadZone: '<S21>/Dead Zone' incorporates:\r\n * MultiPortSwitch: '<S31>/Multiport Switch1'\r\n */\r\n if (rtb_Error_m > 50.0) {\r\n rtb_Add_e = rtb_Error_m - 50.0;\r\n } else if (rtb_Error_m >= -50.0) {\r\n rtb_Add_e = 0.0;\r\n } else {\r\n rtb_Add_e = rtb_Error_m - -50.0;\r\n }\r\n\r\n /* Sum: '<S26>/Sum1' incorporates:\r\n * Gain: '<S26>/gain'\r\n * Sum: '<S26>/Sum2'\r\n * UnitDelay: '<S26>/d'\r\n * UnitDelay: '<S26>/d1'\r\n */\r\n rtb_Error_m = (rtb_Target_RPM - ADM_Integrated_Logic_DW.d_DSTATE_ir) * 1000.0\r\n - ADM_Integrated_Logic_DW.d1_DSTATE_of;\r\n\r\n /* Sum: '<S27>/Sum1' incorporates:\r\n * Gain: '<S27>/gain'\r\n * Sum: '<S27>/Sum2'\r\n * UnitDelay: '<S27>/d'\r\n * UnitDelay: '<S27>/d1'\r\n */\r\n rtb_Sum1_aj = (rtb_Error_m - ADM_Integrated_Logic_DW.d_DSTATE_m) * 1000.0 -\r\n ADM_Integrated_Logic_DW.d1_DSTATE_hm;\r\n\r\n /* Sum: '<S28>/Sum1' incorporates:\r\n * Gain: '<S28>/gain'\r\n * Sum: '<S28>/Sum2'\r\n * UnitDelay: '<S28>/d'\r\n * UnitDelay: '<S28>/d1'\r\n */\r\n rtb_Sum1_p = (rtb_Sum1_aj - ADM_Integrated_Logic_DW.d_DSTATE_mw) * 1000.0 -\r\n ADM_Integrated_Logic_DW.d1_DSTATE_g;\r\n\r\n /* Sum: '<S19>/Add3' incorporates:\r\n * Constant: '<S19>/Constant3'\r\n * Constant: '<S19>/Constant4'\r\n * Constant: '<S19>/Constant5'\r\n * Gain: '<S19>/Gain'\r\n * Memory: '<S4>/Memory'\r\n * Product: '<S19>/Product2'\r\n * Product: '<S19>/Product3'\r\n * Product: '<S19>/Product4'\r\n * Sum: '<S19>/Add2'\r\n */\r\n rtb_Add3 = (((156.8 * rtb_Target_RPM + 212.8 * rtb_Error_m) + 21.8 *\r\n rtb_Sum1_aj) + rtb_Sum1_p) * 9.44822373393802E-6 -\r\n ADM_Integrated_Logic_DW.Memory_PreviousInput;\r\n\r\n /* Product: '<S29>/Product1' incorporates:\r\n * Constant: '<S29>/Constant'\r\n * Gain: '<S29>/gain'\r\n * Product: '<S29>/Product11'\r\n * Sum: '<S29>/Sum1'\r\n * Sum: '<S29>/Sum2'\r\n * Sum: '<S29>/Sum3'\r\n * Sum: '<S29>/Sum4'\r\n * UnitDelay: '<S29>/d'\r\n * UnitDelay: '<S29>/d1'\r\n */\r\n rtb_Product1_h = ((rtb_Add3 + ADM_Integrated_Logic_DW.d1_DSTATE_ej) * 0.002 +\r\n 0.029830988618379066 * ADM_Integrated_Logic_DW.d_DSTATE_j) /\r\n 0.03383098861837907;\r\n\r\n /* Product: '<S30>/Product1' incorporates:\r\n * Constant: '<S30>/Constant1'\r\n * Constant: '<S30>/Constant2'\r\n * Delay: '<S30>/Delay'\r\n * Delay: '<S30>/Delay1'\r\n * Delay: '<S30>/Delay2'\r\n * Delay: '<S30>/Delay3'\r\n * Gain: '<S30>/gain1'\r\n * Gain: '<S30>/gain3'\r\n * Product: '<S30>/x(n), x(n-1), x(n-2)'\r\n * Product: '<S30>/y(n-1)'\r\n * Product: '<S30>/y(n-2)'\r\n * Sum: '<S30>/Sum1'\r\n * Sum: '<S30>/Sum2'\r\n * Sum: '<S30>/Sum3'\r\n * Sum: '<S30>/Sum4'\r\n * Sum: '<S30>/Sum5'\r\n * Sum: '<S30>/Sum6'\r\n */\r\n rtb_Product1_kq = ((((2.0 * ADM_Integrated_Logic_DW.Delay1_DSTATE_c +\r\n rtb_Product1_h) +\r\n ADM_Integrated_Logic_DW.Delay_DSTATE_p[0]) *\r\n 0.00035530575843921691 - -7.9992893884831213 *\r\n ADM_Integrated_Logic_DW.Delay2_DSTATE_n) -\r\n 3.9470487616123275 *\r\n ADM_Integrated_Logic_DW.Delay3_DSTATE_h[0]) /\r\n 4.0536618499045511;\r\n\r\n /* MATLAB Function: '<S4>/DOB_Gain' incorporates:\r\n * Inport: '<Root>/GV_Vx_Fbk'\r\n */\r\n if (ADM_Integrated_Logic_U.GV_Vx_Fbk < 5.0) {\r\n rtb_y_n = 0.0;\r\n } else {\r\n rtb_y_n = (ADM_Integrated_Logic_U.GV_Vx_Fbk - 5.0) * 0.2;\r\n }\r\n\r\n if (rtb_y_n >= 1.0) {\r\n rtb_y_n = 1.0;\r\n }\r\n\r\n /* End of MATLAB Function: '<S4>/DOB_Gain' */\r\n\r\n /* Product: '<S4>/Product1' incorporates:\r\n * Constant: '<S4>/DOBFlag'\r\n * Product: '<S4>/Product'\r\n */\r\n u0 = -(rtb_Product1_kq * 0.9);\r\n\r\n /* Saturate: '<S4>/DOB_Saturation' */\r\n if (u0 > 30.0) {\r\n u0 = 30.0;\r\n } else if (u0 < -30.0) {\r\n u0 = -30.0;\r\n }\r\n\r\n /* Sum: '<S4>/Subtract2' incorporates:\r\n * DeadZone: '<S21>/Dead Zone'\r\n * MultiPortSwitch: '<S31>/Multiport Switch1'\r\n * Product: '<S33>/Product'\r\n * Product: '<S4>/Multiply1'\r\n * Saturate: '<S4>/DOB_Saturation'\r\n * Sum: '<S21>/Add'\r\n */\r\n rtb_Add_e = (rtb_Add_e * 0.044648264844923756 + rtb_Product1_ee) + u0 *\r\n rtb_y_n;\r\n\r\n /* Saturate: '<S4>/Torq_Saturation' */\r\n if (rtb_Add_e > 80.0) {\r\n rtb_Add_e = 80.0;\r\n } else if (rtb_Add_e < -80.0) {\r\n rtb_Add_e = -80.0;\r\n }\r\n\r\n /* End of Saturate: '<S4>/Torq_Saturation' */\r\n\r\n /* MATLAB Function: '<S1>/Emergency_Motor_Func' incorporates:\r\n * Inport: '<Root>/GV_RC_IDB_Fault'\r\n * Inport: '<Root>/GV_Vx_Fbk'\r\n * Inport: '<Root>/IDB_ECU_FAULT_FLAG'\r\n * Inport: '<Root>/RCU_ECU_FAULT_FLAG'\r\n * MATLAB Function: '<S4>/Gear_pos_out'\r\n * Product: '<S4>/Multiply'\r\n */\r\n if (rtb_Compare) {\r\n if ((ADM_Integrated_Logic_U.GV_RC_IDB_Fault == 1.0) ||\r\n ((ADM_Integrated_Logic_U.IDB_ECU_FAULT_FLAG == 1.0) &&\r\n (ADM_Integrated_Logic_U.RCU_ECU_FAULT_FLAG == 1.0))) {\r\n if (ADM_Integrated_Logic_U.GV_Vx_Fbk / 3.6 > 0.5) {\r\n rtb_y_n = -80.0;\r\n } else {\r\n rtb_y_n = 0.0;\r\n }\r\n } else {\r\n rtb_y_n = 0.0;\r\n }\r\n } else {\r\n if (rtb_Memory == 0.0) {\r\n /* MATLAB Function: '<S4>/Gear_pos_out' */\r\n tmp = 0;\r\n } else if (rtb_Memory == 2.0) {\r\n /* MATLAB Function: '<S4>/Gear_pos_out' */\r\n tmp = 0;\r\n } else if (rtb_Memory == 1.0) {\r\n /* MATLAB Function: '<S4>/Gear_pos_out' */\r\n tmp = -1;\r\n } else {\r\n /* MATLAB Function: '<S4>/Gear_pos_out' */\r\n tmp = (rtb_Memory == 3.0);\r\n }\r\n\r\n rtb_y_n = (double)tmp * rtb_Add_e;\r\n }\r\n\r\n /* End of MATLAB Function: '<S1>/Emergency_Motor_Func' */\r\n\r\n /* MATLAB Function: '<S1>/MCU_Fault_Injection' incorporates:\r\n * Inport: '<Root>/GV_RC_MCU_Fault'\r\n */\r\n if (ADM_Integrated_Logic_U.GV_RC_MCU_Fault == 1.0) {\r\n /* Outport: '<Root>/GV_Motor_Torque_Cmd' */\r\n ADM_Integrated_Logic_Y.GV_Motor_Torque_Cmd = 0.0;\r\n } else {\r\n /* Outport: '<Root>/GV_Motor_Torque_Cmd' */\r\n ADM_Integrated_Logic_Y.GV_Motor_Torque_Cmd = rtb_y_n;\r\n }\r\n\r\n /* Outport: '<Root>/Target_MCU_Out' incorporates:\r\n * MATLAB Function: '<S1>/MCU_Fault_Injection'\r\n */\r\n ADM_Integrated_Logic_Y.Target_MCU_Out = rtb_y_n;\r\n\r\n /* Outport: '<Root>/GV_Gear_Postion_Out' */\r\n ADM_Integrated_Logic_Y.GV_Gear_Postion_Out = rtb_Memory;\r\n\r\n /* Sum: '<S1>/Add2' incorporates:\r\n * Inport: '<Root>/GV_Vx_Fbk'\r\n */\r\n rtb_Vx_Cmd_R -= ADM_Integrated_Logic_U.GV_Vx_Fbk;\r\n\r\n /* Sum: '<S1>/Add1' incorporates:\r\n * Constant: '<S1>/Constant'\r\n * Gain: '<S1>/Gain1'\r\n * Inport: '<Root>/GV_Vx_Fbk'\r\n * Sum: '<S1>/Add3'\r\n */\r\n u0 = 400.0 - 6.5 * ADM_Integrated_Logic_U.GV_Vx_Fbk;\r\n\r\n /* MATLAB Function: '<S1>/MATLAB Function1' incorporates:\r\n * Sum: '<S1>/Add1'\r\n */\r\n ADM_Integrated__MATLABFunction1(u0, &rtb_y);\r\n\r\n /* Product: '<S16>/delta rise limit' incorporates:\r\n * SampleTimeMath: '<S16>/sample time'\r\n *\r\n * About '<S16>/sample time':\r\n * y = K where K = ( w * Ts )\r\n * */\r\n rtb_Switch2 = rtb_y * 0.002;\r\n\r\n /* Sum: '<S16>/Difference Inputs1' incorporates:\r\n * Inport: '<Root>/GV_RWA_RackAngleCommand'\r\n * UnitDelay: '<S16>/Delay Input2'\r\n *\r\n * Block description for '<S16>/Difference Inputs1':\r\n *\r\n * Add in CPU\r\n *\r\n * Block description for '<S16>/Delay Input2':\r\n *\r\n * Store in Global RAM\r\n */\r\n rtb_y_n = ADM_Integrated_Logic_U.GV_RWA_RackAngleCommand -\r\n ADM_Integrated_Logic_DW.DelayInput2_DSTATE_c;\r\n\r\n /* MATLAB Function: '<S1>/MATLAB Function2' incorporates:\r\n * Gain: '<S1>/Gain3'\r\n * Sum: '<S1>/Add1'\r\n */\r\n ADM_Integrated__MATLABFunction2(-u0, &rtb_y);\r\n\r\n /* Switch: '<S56>/Switch2' incorporates:\r\n * RelationalOperator: '<S56>/LowerRelop1'\r\n */\r\n if (!(rtb_y_n > rtb_Switch2)) {\r\n /* Product: '<S16>/delta fall limit' incorporates:\r\n * SampleTimeMath: '<S16>/sample time'\r\n *\r\n * About '<S16>/sample time':\r\n * y = K where K = ( w * Ts )\r\n * */\r\n rtb_Switch2 = rtb_y * 0.002;\r\n\r\n /* Switch: '<S56>/Switch' incorporates:\r\n * RelationalOperator: '<S56>/UpperRelop'\r\n */\r\n if (!(rtb_y_n < rtb_Switch2)) {\r\n rtb_Switch2 = rtb_y_n;\r\n }\r\n\r\n /* End of Switch: '<S56>/Switch' */\r\n }\r\n\r\n /* End of Switch: '<S56>/Switch2' */\r\n\r\n /* Sum: '<S16>/Difference Inputs2' incorporates:\r\n * UnitDelay: '<S16>/Delay Input2'\r\n *\r\n * Block description for '<S16>/Difference Inputs2':\r\n *\r\n * Add in CPU\r\n *\r\n * Block description for '<S16>/Delay Input2':\r\n *\r\n * Store in Global RAM\r\n */\r\n rtb_Add1 = rtb_Switch2 + ADM_Integrated_Logic_DW.DelayInput2_DSTATE_c;\r\n\r\n /* MATLAB Function: '<S1>/RWA_Actuator_Fault_Injection' incorporates:\r\n * Inport: '<Root>/GV_RC_RWA1_2_FAULT'\r\n * Inport: '<Root>/RWA2_ECU_FAULT_FLAG'\r\n * Inport: '<Root>/RWA_ECU_FAULT_FLAG'\r\n */\r\n if ((ADM_Integrated_Logic_U.GV_RC_RWA1_2_FAULT == 1.0) ||\r\n ((ADM_Integrated_Logic_U.RWA_ECU_FAULT_FLAG == 1.0) &&\r\n (ADM_Integrated_Logic_U.RWA2_ECU_FAULT_FLAG == 1.0))) {\r\n /* Outport: '<Root>/GV_Master_Rack_Angle_Cmd' */\r\n ADM_Integrated_Logic_Y.GV_Master_Rack_Angle_Cmd = 0.0;\r\n } else {\r\n /* Outport: '<Root>/GV_Master_Rack_Angle_Cmd' */\r\n ADM_Integrated_Logic_Y.GV_Master_Rack_Angle_Cmd = rtb_Add1;\r\n }\r\n\r\n /* Outport: '<Root>/Target_RWA_Out' incorporates:\r\n * MATLAB Function: '<S1>/RWA_Actuator_Fault_Injection'\r\n */\r\n ADM_Integrated_Logic_Y.Target_RWA_Out = rtb_Add1;\r\n\r\n /* MATLAB Function: '<S1>/MATLAB Function5' */\r\n ADM_Integrated__MATLABFunction1(u0, &rtb_Switch2);\r\n\r\n /* Product: '<S17>/delta rise limit' incorporates:\r\n * SampleTimeMath: '<S17>/sample time'\r\n *\r\n * About '<S17>/sample time':\r\n * y = K where K = ( w * Ts )\r\n * */\r\n rtb_Switch2 *= 0.002;\r\n\r\n /* UnitDelay: '<S17>/Delay Input2'\r\n *\r\n * Block description for '<S17>/Delay Input2':\r\n *\r\n * Store in Global RAM\r\n */\r\n rtb_y = ADM_Integrated_Logic_DW.DelayInput2_DSTATE_i;\r\n\r\n /* Sum: '<S17>/Difference Inputs1' incorporates:\r\n * Inport: '<Root>/GV_RWS_RackAngleCommand'\r\n *\r\n * Block description for '<S17>/Difference Inputs1':\r\n *\r\n * Add in CPU\r\n */\r\n rtb_UkYk1_a = ADM_Integrated_Logic_U.GV_RWS_RackAngleCommand - rtb_y;\r\n\r\n /* MATLAB Function: '<S1>/MATLAB Function6' incorporates:\r\n * Gain: '<S1>/Gain5'\r\n */\r\n ADM_Integrated__MATLABFunction2(-u0, &rtb_y_n);\r\n\r\n /* Switch: '<S57>/Switch2' incorporates:\r\n * RelationalOperator: '<S57>/LowerRelop1'\r\n */\r\n if (!(rtb_UkYk1_a > rtb_Switch2)) {\r\n /* Product: '<S17>/delta fall limit' incorporates:\r\n * SampleTimeMath: '<S17>/sample time'\r\n *\r\n * About '<S17>/sample time':\r\n * y = K where K = ( w * Ts )\r\n * */\r\n rtb_y_n *= 0.002;\r\n\r\n /* Switch: '<S57>/Switch' incorporates:\r\n * RelationalOperator: '<S57>/UpperRelop'\r\n */\r\n if (rtb_UkYk1_a < rtb_y_n) {\r\n rtb_Switch2 = rtb_y_n;\r\n } else {\r\n rtb_Switch2 = rtb_UkYk1_a;\r\n }\r\n\r\n /* End of Switch: '<S57>/Switch' */\r\n }\r\n\r\n /* End of Switch: '<S57>/Switch2' */\r\n\r\n /* Sum: '<S17>/Difference Inputs2'\r\n *\r\n * Block description for '<S17>/Difference Inputs2':\r\n *\r\n * Add in CPU\r\n */\r\n rtb_y_n = rtb_Switch2 + rtb_y;\r\n\r\n /* Outport: '<Root>/GV_RWS_RackAngleCmd1' */\r\n ADM_Integrated_Logic_Y.GV_RWS_RackAngleCmd1 = rtb_y_n;\r\n\r\n /* Outport: '<Root>/Act_Fault_Exist' incorporates:\r\n * MATLAB Function: '<S1>/Actuator_Fault_Decision'\r\n */\r\n ADM_Integrated_Logic_Y.Act_Fault_Exist = 0.0;\r\n\r\n /* MATLAB Function: '<S1>/Actuator_Fault_Decision' incorporates:\r\n * Inport: '<Root>/GV_RC_IDB_Fault'\r\n * Inport: '<Root>/GV_RC_MCU_Fault'\r\n * Inport: '<Root>/GV_RC_RWA1_2_FAULT'\r\n * Inport: '<Root>/IDB_ECU_FAULT_FLAG'\r\n * Inport: '<Root>/RCU_ECU_FAULT_FLAG'\r\n * Inport: '<Root>/RWA2_ECU_FAULT_FLAG'\r\n * Inport: '<Root>/RWA_ECU_FAULT_FLAG'\r\n */\r\n if ((ADM_Integrated_Logic_U.GV_RC_MCU_Fault == 1.0) ||\r\n (ADM_Integrated_Logic_U.GV_RC_RWA1_2_FAULT == 1.0) ||\r\n (ADM_Integrated_Logic_U.GV_RC_IDB_Fault == 1.0)) {\r\n /* Outport: '<Root>/Act_Fault_Exist' */\r\n ADM_Integrated_Logic_Y.Act_Fault_Exist = 1.0;\r\n }\r\n\r\n if ((ADM_Integrated_Logic_U.IDB_ECU_FAULT_FLAG == 1.0) ||\r\n (ADM_Integrated_Logic_U.RCU_ECU_FAULT_FLAG == 1.0)) {\r\n /* Outport: '<Root>/Act_Fault_Exist' */\r\n ADM_Integrated_Logic_Y.Act_Fault_Exist = 1.0;\r\n } else if ((ADM_Integrated_Logic_U.RWA_ECU_FAULT_FLAG == 1.0) &&\r\n (ADM_Integrated_Logic_U.RWA2_ECU_FAULT_FLAG == 1.0)) {\r\n /* Outport: '<Root>/Act_Fault_Exist' */\r\n ADM_Integrated_Logic_Y.Act_Fault_Exist = 1.0;\r\n }\r\n\r\n /* Update for Delay: '<S7>/Memory' */\r\n ADM_Integrated_Logic_DW.Memory_DSTATE = rtb_Memory;\r\n\r\n /* Update for UnitDelay: '<S49>/Delay Input2'\r\n *\r\n * Block description for '<S49>/Delay Input2':\r\n *\r\n * Store in Global RAM\r\n */\r\n ADM_Integrated_Logic_DW.DelayInput2_DSTATE = rtb_UkYk1;\r\n\r\n /* Update for UnitDelay: '<S50>/Delay Input2'\r\n *\r\n * Block description for '<S50>/Delay Input2':\r\n *\r\n * Store in Global RAM\r\n */\r\n ADM_Integrated_Logic_DW.DelayInput2_DSTATE_m = rtb_Yk1_e;\r\n\r\n /* Update for DiscreteIntegrator: '<S8>/Integrator_2' incorporates:\r\n * Constant: '<S8>/I_gain'\r\n * Constant: '<S8>/P_gain'\r\n * DiscreteIntegrator: '<S8>/Integrator_1'\r\n * Product: '<S8>/Product'\r\n * Product: '<S8>/Product1'\r\n * Sum: '<S8>/Sum1'\r\n * Sum: '<S8>/Sum2'\r\n */\r\n ADM_Integrated_Logic_DW.Integrator_2_DSTATE += (rtb_Product1_m -\r\n (ADM_Integrated_Logic_DW.Integrator_1_DSTATE * 5.0 + rtb_Brake_Saturation *\r\n 100.0)) * 0.002;\r\n\r\n /* Update for DiscreteTransferFcn: '<S1>/Discrete Transfer Fcn' */\r\n ADM_Integrated_Logic_DW.DiscreteTransferFcn_states = rtb_Vx_Cmd_R - -0.9375 *\r\n ADM_Integrated_Logic_DW.DiscreteTransferFcn_states;\r\n\r\n /* Update for UnitDelay: '<S44>/d1' incorporates:\r\n * Inport: '<Root>/GV_IMU_AX_Val'\r\n */\r\n ADM_Integrated_Logic_DW.d1_DSTATE = ADM_Integrated_Logic_U.GV_IMU_AX_Val;\r\n\r\n /* Update for UnitDelay: '<S44>/d' */\r\n ADM_Integrated_Logic_DW.d_DSTATE = rtb_deltafalllimit_m;\r\n\r\n /* Update for UnitDelay: '<S45>/d1' incorporates:\r\n * Inport: '<Root>/GV_IMU_AY_Val'\r\n */\r\n ADM_Integrated_Logic_DW.d1_DSTATE_i = ADM_Integrated_Logic_U.GV_IMU_AY_Val;\r\n\r\n /* Update for UnitDelay: '<S45>/d' */\r\n ADM_Integrated_Logic_DW.d_DSTATE_p = rtb_Brake_Torque_Cmd;\r\n\r\n /* Update for UnitDelay: '<S46>/d1' incorporates:\r\n * Inport: '<Root>/GV_IMU_AZ_Val'\r\n */\r\n ADM_Integrated_Logic_DW.d1_DSTATE_o = ADM_Integrated_Logic_U.GV_IMU_AZ_Val;\r\n\r\n /* Update for UnitDelay: '<S46>/d' */\r\n ADM_Integrated_Logic_DW.d_DSTATE_n = rtb_Integrator_1;\r\n\r\n /* Update for DiscreteIntegrator: '<S8>/Integrator_1' */\r\n ADM_Integrated_Logic_DW.Integrator_1_DSTATE += 0.002 * rtb_Brake_Saturation;\r\n\r\n /* Update for UnitDelay: '<S47>/d1' incorporates:\r\n * Inport: '<Root>/GV_IMU_PitchRtVal'\r\n */\r\n ADM_Integrated_Logic_DW.d1_DSTATE_a = ADM_Integrated_Logic_U.GV_IMU_PitchRtVal;\r\n\r\n /* Update for UnitDelay: '<S47>/d' */\r\n ADM_Integrated_Logic_DW.d_DSTATE_d = rtb_Product1_m;\r\n\r\n /* Update for UnitDelay: '<S24>/d1' */\r\n ADM_Integrated_Logic_DW.d1_DSTATE_c = rtb_TargetSpd_RateLimiter;\r\n\r\n /* Update for UnitDelay: '<S24>/d' */\r\n ADM_Integrated_Logic_DW.d_DSTATE_l = rtb_Target_RPM;\r\n\r\n /* Update for UnitDelay: '<S34>/d' */\r\n ADM_Integrated_Logic_DW.d_DSTATE_i = rtb_Target_RPM;\r\n\r\n /* Update for UnitDelay: '<S34>/d1' */\r\n ADM_Integrated_Logic_DW.d1_DSTATE_p = rtb_Sum1_i2;\r\n\r\n /* Update for UnitDelay: '<S35>/d' */\r\n ADM_Integrated_Logic_DW.d_DSTATE_c = rtb_Sum1_i2;\r\n\r\n /* Update for UnitDelay: '<S35>/d1' */\r\n ADM_Integrated_Logic_DW.d1_DSTATE_h = rtb_Sum1_o1;\r\n\r\n /* Update for UnitDelay: '<S36>/d' */\r\n ADM_Integrated_Logic_DW.d_DSTATE_db = rtb_Sum1_o1;\r\n\r\n /* Update for UnitDelay: '<S36>/d1' */\r\n ADM_Integrated_Logic_DW.d1_DSTATE_l = rtb_Sum1_lm;\r\n\r\n /* Update for Delay: '<S38>/Delay1' */\r\n ADM_Integrated_Logic_DW.Delay1_DSTATE = rtb_Gain_c;\r\n\r\n /* Update for Delay: '<S38>/Delay' */\r\n ADM_Integrated_Logic_DW.Delay_DSTATE[0] =\r\n ADM_Integrated_Logic_DW.Delay_DSTATE[1];\r\n ADM_Integrated_Logic_DW.Delay_DSTATE[1] = rtb_Gain_c;\r\n\r\n /* Update for Delay: '<S38>/Delay2' */\r\n ADM_Integrated_Logic_DW.Delay2_DSTATE = rtb_Product1_j;\r\n\r\n /* Update for Delay: '<S38>/Delay3' */\r\n ADM_Integrated_Logic_DW.Delay3_DSTATE[0] =\r\n ADM_Integrated_Logic_DW.Delay3_DSTATE[1];\r\n ADM_Integrated_Logic_DW.Delay3_DSTATE[1] = rtb_Product1_j;\r\n\r\n /* Update for UnitDelay: '<S37>/d1' */\r\n ADM_Integrated_Logic_DW.d1_DSTATE_e = rtb_Product1_j;\r\n\r\n /* Update for UnitDelay: '<S37>/d' */\r\n ADM_Integrated_Logic_DW.d_DSTATE_ij = rtb_Product1_ee;\r\n\r\n /* Update for Memory: '<S4>/Memory' */\r\n ADM_Integrated_Logic_DW.Memory_PreviousInput = rtb_Add_e;\r\n\r\n /* Update for UnitDelay: '<S26>/d' */\r\n ADM_Integrated_Logic_DW.d_DSTATE_ir = rtb_Target_RPM;\r\n\r\n /* Update for UnitDelay: '<S26>/d1' */\r\n ADM_Integrated_Logic_DW.d1_DSTATE_of = rtb_Error_m;\r\n\r\n /* Update for UnitDelay: '<S27>/d' */\r\n ADM_Integrated_Logic_DW.d_DSTATE_m = rtb_Error_m;\r\n\r\n /* Update for UnitDelay: '<S27>/d1' */\r\n ADM_Integrated_Logic_DW.d1_DSTATE_hm = rtb_Sum1_aj;\r\n\r\n /* Update for UnitDelay: '<S28>/d' */\r\n ADM_Integrated_Logic_DW.d_DSTATE_mw = rtb_Sum1_aj;\r\n\r\n /* Update for UnitDelay: '<S28>/d1' */\r\n ADM_Integrated_Logic_DW.d1_DSTATE_g = rtb_Sum1_p;\r\n\r\n /* Update for UnitDelay: '<S29>/d1' */\r\n ADM_Integrated_Logic_DW.d1_DSTATE_ej = rtb_Add3;\r\n\r\n /* Update for UnitDelay: '<S29>/d' */\r\n ADM_Integrated_Logic_DW.d_DSTATE_j = rtb_Product1_h;\r\n\r\n /* Update for Delay: '<S30>/Delay1' */\r\n ADM_Integrated_Logic_DW.Delay1_DSTATE_c = rtb_Product1_h;\r\n\r\n /* Update for Delay: '<S30>/Delay' */\r\n ADM_Integrated_Logic_DW.Delay_DSTATE_p[0] =\r\n ADM_Integrated_Logic_DW.Delay_DSTATE_p[1];\r\n ADM_Integrated_Logic_DW.Delay_DSTATE_p[1] = rtb_Product1_h;\r\n\r\n /* Update for Delay: '<S30>/Delay2' */\r\n ADM_Integrated_Logic_DW.Delay2_DSTATE_n = rtb_Product1_kq;\r\n\r\n /* Update for Delay: '<S30>/Delay3' */\r\n ADM_Integrated_Logic_DW.Delay3_DSTATE_h[0] =\r\n ADM_Integrated_Logic_DW.Delay3_DSTATE_h[1];\r\n ADM_Integrated_Logic_DW.Delay3_DSTATE_h[1] = rtb_Product1_kq;\r\n\r\n /* Update for UnitDelay: '<S16>/Delay Input2'\r\n *\r\n * Block description for '<S16>/Delay Input2':\r\n *\r\n * Store in Global RAM\r\n */\r\n ADM_Integrated_Logic_DW.DelayInput2_DSTATE_c = rtb_Add1;\r\n\r\n /* Update for UnitDelay: '<S17>/Delay Input2'\r\n *\r\n * Block description for '<S17>/Delay Input2':\r\n *\r\n * Store in Global RAM\r\n */\r\n ADM_Integrated_Logic_DW.DelayInput2_DSTATE_i = rtb_y_n;\r\n}\r\n\r\n/* Model initialize function */\r\nvoid ADM_Integrated_Logic_initialize(void)\r\n{\r\n /* (no initialization code required) */\r\n}\r\n\r\n/*\r\n * File trailer for generated code.\r\n *\r\n * [EOF]\r\n */\r\n"},{"name":"ADM_Integrated_Logic.h","type":"header","group":"model","path":"K:\\!사업\\배송모빌리티\\25-06-19-목 통합 로직\\ADM_Integrated_Logic_ert_rtw","tag":"","groupDisplay":"Model files","code":"/*\r\n * Academic License - for use in teaching, academic research, and meeting\r\n * course requirements at degree granting institutions only. Not for\r\n * government, commercial, or other organizational use.\r\n *\r\n * File: ADM_Integrated_Logic.h\r\n *\r\n * Code generated for Simulink model 'ADM_Integrated_Logic'.\r\n *\r\n * Model version : 11.39\r\n * Simulink Coder version : 24.1 (R2024a) 19-Nov-2023\r\n * C/C++ source code generated on : Thu Jun 19 19:37:54 2025\r\n *\r\n * Target selection: ert.tlc\r\n * Embedded hardware selection: NXP->Cortex-M4\r\n * Code generation objectives:\r\n * 1. Execution efficiency\r\n * 2. RAM efficiency\r\n * 3. Debugging\r\n * Validation result: Not run\r\n */\r\n\r\n#ifndef ADM_Integrated_Logic_h_\r\n#define ADM_Integrated_Logic_h_\r\n#ifndef ADM_Integrated_Logic_COMMON_INCLUDES_\r\n#define ADM_Integrated_Logic_COMMON_INCLUDES_\r\n#include <stdbool.h>\r\n#include <stdint.h>\r\n#endif /* ADM_Integrated_Logic_COMMON_INCLUDES_ */\r\n\r\n/* Macros for accessing real-time model data structure */\r\n#ifndef rtmGetErrorStatus\r\n#define rtmGetErrorStatus(rtm) ((rtm)->errorStatus)\r\n#endif\r\n\r\n#ifndef rtmSetErrorStatus\r\n#define rtmSetErrorStatus(rtm, val) ((rtm)->errorStatus = (val))\r\n#endif\r\n\r\n/* Forward declaration for rtModel */\r\ntypedef struct tag_RTM_ADM_Integrated_Logic_T RT_MODEL_ADM_Integrated_Logic_T;\r\n\r\n/* Block signals and states (default storage) for system '<Root>' */\r\ntypedef struct {\r\n double Delay_DSTATE[2]; /* '<S38>/Delay' */\r\n double Delay3_DSTATE[2]; /* '<S38>/Delay3' */\r\n double Delay_DSTATE_p[2]; /* '<S30>/Delay' */\r\n double Delay3_DSTATE_h[2]; /* '<S30>/Delay3' */\r\n double Memory_DSTATE; /* '<S7>/Memory' */\r\n double DelayInput2_DSTATE; /* '<S49>/Delay Input2' */\r\n double DelayInput2_DSTATE_m; /* '<S50>/Delay Input2' */\r\n double Integrator_2_DSTATE; /* '<S8>/Integrator_2' */\r\n double DiscreteTransferFcn_states; /* '<S1>/Discrete Transfer Fcn' */\r\n double d1_DSTATE; /* '<S44>/d1' */\r\n double d_DSTATE; /* '<S44>/d' */\r\n double d1_DSTATE_i; /* '<S45>/d1' */\r\n double d_DSTATE_p; /* '<S45>/d' */\r\n double d1_DSTATE_o; /* '<S46>/d1' */\r\n double d_DSTATE_n; /* '<S46>/d' */\r\n double Integrator_1_DSTATE; /* '<S8>/Integrator_1' */\r\n double d1_DSTATE_a; /* '<S47>/d1' */\r\n double d_DSTATE_d; /* '<S47>/d' */\r\n double d1_DSTATE_c; /* '<S24>/d1' */\r\n double d_DSTATE_l; /* '<S24>/d' */\r\n double d_DSTATE_i; /* '<S34>/d' */\r\n double d1_DSTATE_p; /* '<S34>/d1' */\r\n double d_DSTATE_c; /* '<S35>/d' */\r\n double d1_DSTATE_h; /* '<S35>/d1' */\r\n double d_DSTATE_db; /* '<S36>/d' */\r\n double d1_DSTATE_l; /* '<S36>/d1' */\r\n double Delay1_DSTATE; /* '<S38>/Delay1' */\r\n double Delay2_DSTATE; /* '<S38>/Delay2' */\r\n double d1_DSTATE_e; /* '<S37>/d1' */\r\n double d_DSTATE_ij; /* '<S37>/d' */\r\n double d_DSTATE_ir; /* '<S26>/d' */\r\n double d1_DSTATE_of; /* '<S26>/d1' */\r\n double d_DSTATE_m; /* '<S27>/d' */\r\n double d1_DSTATE_hm; /* '<S27>/d1' */\r\n double d_DSTATE_mw; /* '<S28>/d' */\r\n double d1_DSTATE_g; /* '<S28>/d1' */\r\n double d1_DSTATE_ej; /* '<S29>/d1' */\r\n double d_DSTATE_j; /* '<S29>/d' */\r\n double Delay1_DSTATE_c; /* '<S30>/Delay1' */\r\n double Delay2_DSTATE_n; /* '<S30>/Delay2' */\r\n double DelayInput2_DSTATE_c; /* '<S16>/Delay Input2' */\r\n double DelayInput2_DSTATE_i; /* '<S17>/Delay Input2' */\r\n double PrevY; /* '<S18>/Input_Vx_RateLimiter' */\r\n double PrevY_o; /* '<S4>/Brake_Out_RateLimiter' */\r\n double PrevY_a; /* '<S4>/TargetSpd_RateLimiter' */\r\n double Memory_PreviousInput; /* '<S4>/Memory' */\r\n double HAC_ON_FLAG; /* '<S8>/HAC_OFF_OK_Func' */\r\n double Smoothed_Torque; /* '<S8>/HAC_OFF_OK_Func' */\r\n double HAC_Desired_Torque; /* '<S8>/HAC_OFF_OK_Func' */\r\n double HAC_ON_Timer; /* '<S8>/HAC_OFF_OK_Func' */\r\n uint8_t is_active_c6_ADM_Integrated_Log;/* '<S8>/Chart' */\r\n uint8_t is_c6_ADM_Integrated_Logic; /* '<S8>/Chart' */\r\n} DW_ADM_Integrated_Logic_T;\r\n\r\n/* Invariant block signals (default storage) */\r\ntypedef struct {\r\n const double W_value; /* '<S43>/Multiply' */\r\n const double W_Value_for_Brake; /* '<S43>/Multiply4' */\r\n} ConstB_ADM_Integrated_Logic_T;\r\n\r\n/* External inputs (root inport signals with default storage) */\r\ntypedef struct {\r\n double GV_MCU_RPM; /* '<Root>/GV_MCU_RPM' */\r\n double GV_BrakeTorqueCommand; /* '<Root>/GV_BrakeTorqueCommand' */\r\n double GV_IMU_AX_Val; /* '<Root>/GV_IMU_AX_Val' */\r\n double GV_IMU_AY_Val; /* '<Root>/GV_IMU_AY_Val' */\r\n double GV_IMU_AZ_Val; /* '<Root>/GV_IMU_AZ_Val' */\r\n double GV_IMU_PitchRtVal; /* '<Root>/GV_IMU_PitchRtVal' */\r\n double GV_Vx_Command; /* '<Root>/GV_Vx_Command' */\r\n double GV_VCU_GearSelStat; /* '<Root>/GV_VCU_GearSelStat' */\r\n double GV_MCU_EstTrq; /* '<Root>/GV_MCU_EstTrq' */\r\n double GV_Vx_Limit; /* '<Root>/GV_Vx_Limit' */\r\n double GV_Vx_Fbk; /* '<Root>/GV_Vx_Fbk' */\r\n double GV_RWA_RackAngleCommand; /* '<Root>/GV_RWA_RackAngleCommand' */\r\n double GV_RWS_RackAngleCommand; /* '<Root>/GV_RWS_RackAngleCommand' */\r\n double GV_Operation_Mode; /* '<Root>/GV_Operation_Mode' */\r\n double GV_RC_RWA1_2_FAULT; /* '<Root>/GV_RC_RWA1_2_FAULT' */\r\n double GV_RC_IDB_Fault; /* '<Root>/GV_RC_IDB_Fault' */\r\n double GV_RC_MCU_Fault; /* '<Root>/GV_RC_MCU_Fault' */\r\n double IDB_ECU_FAULT_FLAG; /* '<Root>/IDB_ECU_FAULT_FLAG' */\r\n double RCU_ECU_FAULT_FLAG; /* '<Root>/RCU_ECU_FAULT_FLAG' */\r\n double RWA_ECU_FAULT_FLAG; /* '<Root>/RWA_ECU_FAULT_FLAG' */\r\n double RWA2_ECU_FAULT_FLAG; /* '<Root>/RWA2_ECU_FAULT_FLAG' */\r\n} ExtU_ADM_Integrated_Logic_T;\r\n\r\n/* External outputs (root outports fed by signals with default storage) */\r\ntypedef struct {\r\n double GV_Brake_Command; /* '<Root>/GV_Brake_Command' */\r\n double GV_Master_Rack_Angle_Cmd; /* '<Root>/GV_Master_Rack_Angle_Cmd' */\r\n double GV_Hill_Torque_Assist; /* '<Root>/GV_Hill_Torque_Assist' */\r\n double GV_Motor_Torque_Cmd; /* '<Root>/GV_Motor_Torque_Cmd' */\r\n double Debug_HAC_FLAG; /* '<Root>/Debug_HAC_FLAG' */\r\n double Debug_HAC_RPM_Decision; /* '<Root>/Debug_HAC_RPM_Decision' */\r\n double Debug_HAC_Pitch_angle; /* '<Root>/Debug_HAC_Pitch_angle' */\r\n double Debug_HAC_Brake_Output; /* '<Root>/Debug_HAC_Brake_Output' */\r\n double Debug_CC_Brake_Output; /* '<Root>/Debug_CC_Brake_Output' */\r\n double GV_RWS_RackAngleCmd1; /* '<Root>/GV_RWS_RackAngleCmd1' */\r\n double GV_Speed_Limit; /* '<Root>/GV_Speed_Limit' */\r\n double GV_Gear_Postion_Out; /* '<Root>/GV_Gear_Postion_Out' */\r\n double Act_Fault_Exist; /* '<Root>/Act_Fault_Exist' */\r\n double Target_RWA_Out; /* '<Root>/Target_RWA_Out' */\r\n double Target_IDB_Out; /* '<Root>/Target_IDB_Out' */\r\n double Target_MCU_Out; /* '<Root>/Target_MCU_Out' */\r\n} ExtY_ADM_Integrated_Logic_T;\r\n\r\n/* Real-time Model Data Structure */\r\nstruct tag_RTM_ADM_Integrated_Logic_T {\r\n const char * volatile errorStatus;\r\n};\r\n\r\n/* Block signals and states (default storage) */\r\nextern DW_ADM_Integrated_Logic_T ADM_Integrated_Logic_DW;\r\n\r\n/* External inputs (root inport signals with default storage) */\r\nextern ExtU_ADM_Integrated_Logic_T ADM_Integrated_Logic_U;\r\n\r\n/* External outputs (root outports fed by signals with default storage) */\r\nextern ExtY_ADM_Integrated_Logic_T ADM_Integrated_Logic_Y;\r\nextern const ConstB_ADM_Integrated_Logic_T ADM_Integrated_Logic_ConstB;/* constant block i/o */\r\n\r\n/* Model entry point functions */\r\nextern void ADM_Integrated_Logic_initialize(void);\r\nextern void ADM_Integrated_Logic_step(void);\r\n\r\n/* Real-time Model object */\r\nextern RT_MODEL_ADM_Integrated_Logic_T *const ADM_Integrated_Logic_M;\r\n\r\n/*-\r\n * These blocks were eliminated from the model due to optimizations:\r\n *\r\n * Block '<S21>/BW_PI' : Unused code path elimination\r\n * Block '<S21>/Constant1' : Unused code path elimination\r\n * Block '<S21>/Constant16' : Unused code path elimination\r\n * Block '<S21>/Constant17' : Unused code path elimination\r\n * Block '<S21>/Constant2' : Unused code path elimination\r\n * Block '<S43>/Brake_Saturation' : Unused code path elimination\r\n * Block '<S43>/Multiply5' : Unused code path elimination\r\n * Block '<S43>/Radius1' : Unused code path elimination\r\n * Block '<S49>/FixPt Data Type Duplicate' : Unused code path elimination\r\n * Block '<S54>/Data Type Duplicate' : Unused code path elimination\r\n * Block '<S54>/Data Type Propagation' : Unused code path elimination\r\n * Block '<S50>/FixPt Data Type Duplicate' : Unused code path elimination\r\n * Block '<S55>/Data Type Duplicate' : Unused code path elimination\r\n * Block '<S55>/Data Type Propagation' : Unused code path elimination\r\n * Block '<S8>/Scope2' : Unused code path elimination\r\n * Block '<S16>/FixPt Data Type Duplicate' : Unused code path elimination\r\n * Block '<S56>/Data Type Duplicate' : Unused code path elimination\r\n * Block '<S56>/Data Type Propagation' : Unused code path elimination\r\n * Block '<S17>/FixPt Data Type Duplicate' : Unused code path elimination\r\n * Block '<S57>/Data Type Duplicate' : Unused code path elimination\r\n * Block '<S57>/Data Type Propagation' : Unused code path elimination\r\n * Block '<S4>/ControlFlag' : Eliminated nontunable gain of 1\r\n * Block '<S21>/FBGain' : Eliminated nontunable gain of 1\r\n * Block '<S32>/FFGain' : Eliminated nontunable gain of 1\r\n * Block '<S1>/Data Type Conversion1' : Eliminate redundant data type conversion\r\n * Block '<S1>/Data Type Conversion3' : Eliminate redundant data type conversion\r\n * Block '<S43>/HAC_Gain' : Eliminated nontunable gain of 1\r\n * Block '<S49>/Zero-Order Hold' : Eliminated since input and output rates are identical\r\n * Block '<S50>/Zero-Order Hold' : Eliminated since input and output rates are identical\r\n * Block '<S16>/Zero-Order Hold' : Eliminated since input and output rates are identical\r\n * Block '<S17>/Zero-Order Hold' : Eliminated since input and output rates are identical\r\n */\r\n\r\n/*-\r\n * The generated code includes comments that allow you to trace directly\r\n * back to the appropriate location in the model. The basic format\r\n * is <system>/block_name, where system is the system number (uniquely\r\n * assigned by Simulink) and block_name is the name of the block.\r\n *\r\n * Use the MATLAB hilite_system command to trace the generated code back\r\n * to the model. For example,\r\n *\r\n * hilite_system('<S3>') - opens system 3\r\n * hilite_system('<S3>/Kp') - opens and selects block Kp which resides in S3\r\n *\r\n * Here is the system hierarchy for this model\r\n *\r\n * '<Root>' : 'ADM_Integrated_Logic'\r\n * '<S1>' : 'ADM_Integrated_Logic/Delivery_Mobility'\r\n * '<S2>' : 'ADM_Integrated_Logic/Delivery_Mobility/Actuator_Fault_Decision'\r\n * '<S3>' : 'ADM_Integrated_Logic/Delivery_Mobility/Compare To Constant'\r\n * '<S4>' : 'ADM_Integrated_Logic/Delivery_Mobility/Cruise_Control1'\r\n * '<S5>' : 'ADM_Integrated_Logic/Delivery_Mobility/Emergency_Brake_Func'\r\n * '<S6>' : 'ADM_Integrated_Logic/Delivery_Mobility/Emergency_Motor_Func'\r\n * '<S7>' : 'ADM_Integrated_Logic/Delivery_Mobility/Gear_Position'\r\n * '<S8>' : 'ADM_Integrated_Logic/Delivery_Mobility/HAC_Logic1'\r\n * '<S9>' : 'ADM_Integrated_Logic/Delivery_Mobility/IDB_Fault_Injection'\r\n * '<S10>' : 'ADM_Integrated_Logic/Delivery_Mobility/MATLAB Function1'\r\n * '<S11>' : 'ADM_Integrated_Logic/Delivery_Mobility/MATLAB Function2'\r\n * '<S12>' : 'ADM_Integrated_Logic/Delivery_Mobility/MATLAB Function5'\r\n * '<S13>' : 'ADM_Integrated_Logic/Delivery_Mobility/MATLAB Function6'\r\n * '<S14>' : 'ADM_Integrated_Logic/Delivery_Mobility/MCU_Fault_Injection'\r\n * '<S15>' : 'ADM_Integrated_Logic/Delivery_Mobility/RWA_Actuator_Fault_Injection'\r\n * '<S16>' : 'ADM_Integrated_Logic/Delivery_Mobility/Rate Limiter Dynamic'\r\n * '<S17>' : 'ADM_Integrated_Logic/Delivery_Mobility/Rate Limiter Dynamic1'\r\n * '<S18>' : 'ADM_Integrated_Logic/Delivery_Mobility/Vx_Logic'\r\n * '<S19>' : 'ADM_Integrated_Logic/Delivery_Mobility/Cruise_Control1/DOB'\r\n * '<S20>' : 'ADM_Integrated_Logic/Delivery_Mobility/Cruise_Control1/DOB_Gain'\r\n * '<S21>' : 'ADM_Integrated_Logic/Delivery_Mobility/Cruise_Control1/FF_PID_Controller'\r\n * '<S22>' : 'ADM_Integrated_Logic/Delivery_Mobility/Cruise_Control1/GearCondition_Brake'\r\n * '<S23>' : 'ADM_Integrated_Logic/Delivery_Mobility/Cruise_Control1/Gear_pos_out'\r\n * '<S24>' : 'ADM_Integrated_Logic/Delivery_Mobility/Cruise_Control1/LPFM'\r\n * '<S25>' : 'ADM_Integrated_Logic/Delivery_Mobility/Cruise_Control1/Target_RPM'\r\n * '<S26>' : 'ADM_Integrated_Logic/Delivery_Mobility/Cruise_Control1/DOB/Dot3'\r\n * '<S27>' : 'ADM_Integrated_Logic/Delivery_Mobility/Cruise_Control1/DOB/Dot4'\r\n * '<S28>' : 'ADM_Integrated_Logic/Delivery_Mobility/Cruise_Control1/DOB/Dot5'\r\n * '<S29>' : 'ADM_Integrated_Logic/Delivery_Mobility/Cruise_Control1/DOB/LPFM'\r\n * '<S30>' : 'ADM_Integrated_Logic/Delivery_Mobility/Cruise_Control1/DOB/Second order LPF'\r\n * '<S31>' : 'ADM_Integrated_Logic/Delivery_Mobility/Cruise_Control1/FF_PID_Controller/FB'\r\n * '<S32>' : 'ADM_Integrated_Logic/Delivery_Mobility/Cruise_Control1/FF_PID_Controller/FF'\r\n * '<S33>' : 'ADM_Integrated_Logic/Delivery_Mobility/Cruise_Control1/FF_PID_Controller/FB/P'\r\n * '<S34>' : 'ADM_Integrated_Logic/Delivery_Mobility/Cruise_Control1/FF_PID_Controller/FF/Dot'\r\n * '<S35>' : 'ADM_Integrated_Logic/Delivery_Mobility/Cruise_Control1/FF_PID_Controller/FF/Dot2'\r\n * '<S36>' : 'ADM_Integrated_Logic/Delivery_Mobility/Cruise_Control1/FF_PID_Controller/FF/Dot3'\r\n * '<S37>' : 'ADM_Integrated_Logic/Delivery_Mobility/Cruise_Control1/FF_PID_Controller/FF/LPFM'\r\n * '<S38>' : 'ADM_Integrated_Logic/Delivery_Mobility/Cruise_Control1/FF_PID_Controller/FF/Second order LPF'\r\n * '<S39>' : 'ADM_Integrated_Logic/Delivery_Mobility/Gear_Position/Compare To Constant'\r\n * '<S40>' : 'ADM_Integrated_Logic/Delivery_Mobility/Gear_Position/Gear_FUNCTION1'\r\n * '<S41>' : 'ADM_Integrated_Logic/Delivery_Mobility/HAC_Logic1/Chart'\r\n * '<S42>' : 'ADM_Integrated_Logic/Delivery_Mobility/HAC_Logic1/HAC_OFF_OK_Func'\r\n * '<S43>' : 'ADM_Integrated_Logic/Delivery_Mobility/HAC_Logic1/Hill_Required_Torque2'\r\n * '<S44>' : 'ADM_Integrated_Logic/Delivery_Mobility/HAC_Logic1/LPFM'\r\n * '<S45>' : 'ADM_Integrated_Logic/Delivery_Mobility/HAC_Logic1/LPFM1'\r\n * '<S46>' : 'ADM_Integrated_Logic/Delivery_Mobility/HAC_Logic1/LPFM2'\r\n * '<S47>' : 'ADM_Integrated_Logic/Delivery_Mobility/HAC_Logic1/LPFM3'\r\n * '<S48>' : 'ADM_Integrated_Logic/Delivery_Mobility/HAC_Logic1/Pitch_calculate'\r\n * '<S49>' : 'ADM_Integrated_Logic/Delivery_Mobility/HAC_Logic1/Rate Limiter Dynamic'\r\n * '<S50>' : 'ADM_Integrated_Logic/Delivery_Mobility/HAC_Logic1/Rate Limiter Dynamic1'\r\n * '<S51>' : 'ADM_Integrated_Logic/Delivery_Mobility/HAC_Logic1/Hill_Required_Torque2/Calculate_F_R'\r\n * '<S52>' : 'ADM_Integrated_Logic/Delivery_Mobility/HAC_Logic1/Hill_Required_Torque2/Calculate_F_c'\r\n * '<S53>' : 'ADM_Integrated_Logic/Delivery_Mobility/HAC_Logic1/Hill_Required_Torque2/Calculate_F_c1'\r\n * '<S54>' : 'ADM_Integrated_Logic/Delivery_Mobility/HAC_Logic1/Rate Limiter Dynamic/Saturation Dynamic'\r\n * '<S55>' : 'ADM_Integrated_Logic/Delivery_Mobility/HAC_Logic1/Rate Limiter Dynamic1/Saturation Dynamic'\r\n * '<S56>' : 'ADM_Integrated_Logic/Delivery_Mobility/Rate Limiter Dynamic/Saturation Dynamic'\r\n * '<S57>' : 'ADM_Integrated_Logic/Delivery_Mobility/Rate Limiter Dynamic1/Saturation Dynamic'\r\n * '<S58>' : 'ADM_Integrated_Logic/Delivery_Mobility/Vx_Logic/Compare To Constant'\r\n * '<S59>' : 'ADM_Integrated_Logic/Delivery_Mobility/Vx_Logic/Vx_OutPut_Function'\r\n */\r\n\r\n/*-\r\n * Requirements for '<Root>': ADM_Integrated_Logic\r\n\r\n */\r\n#endif /* ADM_Integrated_Logic_h_ */\r\n\r\n/*\r\n * File trailer for generated code.\r\n *\r\n * [EOF]\r\n */\r\n"},{"name":"ADM_Integrated_Logic_data.c","type":"source","group":"data","path":"K:\\!사업\\배송모빌리티\\25-06-19-목 통합 로직\\ADM_Integrated_Logic_ert_rtw","tag":"","groupDisplay":"Data files","code":"/*\r\n * Academic License - for use in teaching, academic research, and meeting\r\n * course requirements at degree granting institutions only. Not for\r\n * government, commercial, or other organizational use.\r\n *\r\n * File: ADM_Integrated_Logic_data.c\r\n *\r\n * Code generated for Simulink model 'ADM_Integrated_Logic'.\r\n *\r\n * Model version : 11.39\r\n * Simulink Coder version : 24.1 (R2024a) 19-Nov-2023\r\n * C/C++ source code generated on : Thu Jun 19 19:37:54 2025\r\n *\r\n * Target selection: ert.tlc\r\n * Embedded hardware selection: NXP->Cortex-M4\r\n * Code generation objectives:\r\n * 1. Execution efficiency\r\n * 2. RAM efficiency\r\n * 3. Debugging\r\n * Validation result: Not run\r\n */\r\n\r\n#include \"ADM_Integrated_Logic.h\"\r\n\r\n/* Invariant block signals (default storage) */\r\nconst ConstB_ADM_Integrated_Logic_T ADM_Integrated_Logic_ConstB = {\r\n 12753.0, /* '<S43>/Multiply' */\r\n 12753.0 /* '<S43>/Multiply4' */\r\n};\r\n\r\n/*\r\n * File trailer for generated code.\r\n *\r\n * [EOF]\r\n */\r\n"}],"coverage":[{"id":"SimulinkCoverage","name":"Simulink Coverage","files":[]},{"id":"Bullseye","name":"Bullseye Coverage","files":[]},{"id":"LDRA","name":"LDRA Testbed","files":[]}],"features":{"annotation":false,"coverage":true,"profiling":true,"tooltip":true,"coverageTooltip":true,"showJustificationLinks":true,"useMWTable":false,"showProfilingInfo":true,"showTaskSummary":true,"showProtectedV2Report":true}}; |