mirror of
https://github.com/Dev-KATECH/ADM.git
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568 lines
14 KiB
C
568 lines
14 KiB
C
#ifndef __def_uds__
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#define __def_uds__
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#define ENABLE_UART
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#define SECURITY_MASK_L1 0x6C6C6969
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//------------------------------------------------------------------
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#define EEP_V_SIGN 1008 // TABLE
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//------------------------------------------------------------------
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#define USE_PLLAB_TABLE
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#define MAX_UDS_IO_PARM 64
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#define PROGRAM_IS_EXTENDED //
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#ifdef PROGRAM_IS_EXTENDED
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#define is_program_session(n) ((n==2) || (n==3))
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#else
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#define is_program_session(n) (n==2)
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#endif
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enum
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{
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BT_START,
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BT_ERASE,
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BT_PROGRAM,
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BT_PROGRAM_FINISH,
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BT_END
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};
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enum
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{
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NCH_PCAN,
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NCH_PCAN_SUB,
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NCH_END
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};
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#define MAX_UDS_DATA_BUF 64u
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#define MAX_DTC 64 /*100*/
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#define MAX_DTC_SEND 200
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#define MAX_DTC_ITEM 18
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#define APP_SIGN 0x55AA1234ul
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#define ID_UDS_TX 0x7D8 //
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#define ID_UDS_RX 0x7D0 //
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#define ID_UDS_TP 0x7DF //
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//#define ID_UDS_TX 0x18DAF940u
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//#define ID_UDS_RX 0x18DA40F9u
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//#define ID_UDS_TP 0x18DBFFF9u
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#define ID_FUCTIONAL_REQ ID_UDS_TP
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#define MB_UDS_TX 24
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#define MB_UDS_RX 25
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#define MB_FUCTIONAL_REQ 26
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#define BOOTVERSION_ADDRESS 0x401020ul
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#define SHADOWRAM 0x20000000u // int_sram_shareable
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#define SHADOWRAM2 0x20443FF0U
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#define SHADOW_JMP_APP 0x5A5A1234
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#define SHADOW_BOOT 0x3DCA5471
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#ifdef PROGRAM_IS_EXTENDED
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#define is_program_session(n) ((n==2) || (n==3))
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#else
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#define is_program_session(n) (n==2)
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#endif
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#define is_externded_session(n) (n==3)
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#define MSG_BUF_SIZE 4 /* Msg Buffer Size. (CAN 2.0AB: 2 hdr + 2 data= 4 words) */
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#define V_c_wait_flowcontrol_10ms 11U // 110MS
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typedef void(* APPFn)(void);
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#define DownLoadID uds.rx_id
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#define UpLoadID uds.tx_id
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#define CONSECUTIVE_FLOW_CONTROL_COUNT 0U
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#define STMIN 0U
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//Tx_Message_Offset
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enum
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{
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OPI11, // 0.OPI11 = Object_ID_64
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DIAG_RESP, // 1.DIAG_RESP = Object_ID_65
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P_CAN_TOTAL_TX_MSG
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};//End of Tx_Message_Offset
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#define UDS_DID_VERSION 0XF187u //
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#define UDS_SID_VERSION 0XF500u //
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#define UDS_Download_block_length 0x42u;
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#define UDS_DID_F100 0xF100u
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#define UDS_DID_RES_OFFSET 0x2100u
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#define UDS_DID_F000 0xF000u
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#define UDS_DID_F190 0xF190u
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#define UDS_DID_87 0xF187u
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#define UDS_DID_97 0xF197u
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#define UDS_DID_8A 0xF18Au
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#define UDS_DID_93 0xF193u
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#define UDS_DID_95 0xF195u
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#define UDS_DID_00 0xF100u
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#define UDS_DID_99 0xF199u
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// ==================== UDS ON CAN DEFINE
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enum {
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UDS_WTYPE_1_DATA=0x0Du,
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UDS_WTYPE_TABLE_CONTROL,
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UDS_WTYPE_TABLE_WRITE
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};
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enum {
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UDS_VER_REQ_APP,
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UDS_VER_REQ_HW,
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UDS_VER_REPAIRSHOP,
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UDS_VER_DATE,
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UDS_VER_REQ_BOOT,
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UDS_VER_END
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};
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#define UDS_CONTROL_IDLE 0u
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#define UDS_TABLE_CONTROL_RAM_TO_FLASH 1u
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#define UDS_TABLE_CONTROL_FLASH_TO_RAM 2u
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#define UDS_TABLE_CONTROL_DEFULT 255u
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#define UDS_TIME_OUT 501u // * 10msec
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#define NTABLE_VERSION 0x500u
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#define NTABLE_MAX 29u
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#define NTABLE_MAX_WRITE 4u
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#define NTABLE_VERSION 0x500u
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#define NTABLE_ReadMemoryByAddress 1u
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#define NTABLE_WriteMemoryByAddress 2u
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#define NTABLE_nputOutputControlByIdentifier 3u
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#define NTABLE_DynamicallyDefineDataIdentifie 4u
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#define NTABLE_ReadDataByPeriodicIdentifier 5u
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#define NTABLE_DTC_CODE 1U
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// ============================== eeprom address
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#define ADD_SIGN 0
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#define ADD_CS 4
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#define ADD_SIZE_OF_SETUP 8
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#define EEP_ADD_TEST 12
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#define ADD_BPSIGN 16
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#define ADD_BPCS 20
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#define EEPADD_DTC_0 0x100
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#define EEPADD_DTC_OLD_0 0x110
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#define EEPADD_DTC_1 0x120
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#define EEPADD_DTC_OLD_1 0x130
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#define EEPADD_DTC_NEW 0x140
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#define EEPADD_CHK_OFFSET 10
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//-----------------------------------------------
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typedef struct _can_rx {
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uint32_t id;
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uint16_t ms,cms;
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uint8_t buf[64];
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uint8_t length;
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uint8_t xreq_send;
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uint8_t extended;
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}can_rx_;
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typedef struct _T_UDS {
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can_rx_ rx;
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can_rx_ tx;
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uint8_t x2ms;
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uint8_t c_10ms;
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uint8_t c_1000ms;
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uint8_t tempo_10ms;
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uint16_t c_test;
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uint8_t avoid_empty;
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uint8_t mb,ubuf[8],ireq; // interrupt o????? ???,
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uint32_t rx_id;
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uint32_t tx_id;
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uint16_t ndata;
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uint32_t start_address;
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uint16_t ndata_pre_packet;
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uint16_t timeout;
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uint16_t c_dtc_change;
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uint8_t monitor_mode;
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uint8_t flow_control_ms,c_flow_control_ms;
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uint8_t wait_flowcontrol;
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uint8_t c_wait_flowcontrol_10ms;
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uint8_t c_wait_cf_10ms;
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// ================ ??????? command in. ===============================
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uint8_t dsc;
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// ================ ??????? command in. ===============================
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//10 : 0D 31 1 FF 0 44 0 routine control 1=sub fuction
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// erase memory 0xFF00=erase memory
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//21 : 3 14 0 0 0 CC 0 add=031400,size=00cc00 44=length formater
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uint16_t p_data,tx_len; // send or receve until p_data = len set at first frame
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uint8_t sid;
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uint8_t subfuction;
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uint16_t identifier;
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uint8_t length_formmater;
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uint32_t address;
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uint32_t size;
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// =======================================================================
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uint32_t old_crc32,crc32; // crc check transfrt data
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uint8_t data[MAX_UDS_DATA_BUF+10];
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uint8_t req_io_control; //
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uint8_t io_control_parameter[MAX_UDS_IO_PARM+10];
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uint8_t io_control_parameter_len; //
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uint16_t io_control_did; //
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uint8_t io_control_parm; //
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uint8_t req_session; //
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uint8_t session_id; //
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uint8_t cmd,rt;
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uint8_t seq;
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uint16_t frame_len;
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uint16_t ntable;
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uint16_t ntable_did; // ???? table
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uint8_t table_control;
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uint8_t table_write_to;
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uint8_t table_seq;
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uint8_t consecutive_rx_num; // 21..22
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uint8_t data_send_seq;
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uint8_t write_data_type;
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uint8_t write_data[4];
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uint8_t * pdata_wr;
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uint8_t * pdata_rd;
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uint8_t response_to_negetive; //
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uint8_t req_dtc_1st_frame;
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uint8_t dtc_type,dtc_mask;
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uint8_t xreq_dtc_clear;
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uint8_t xreq_eep_write_did; // did f100 ??? ????write
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uint8_t xreq_table_snap_short_write;
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uint8_t bootloader_update;
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uint8_t session_mode; // force sleep
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uint8_t session;
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uint8_t seed[4]; //
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uint32_t key; //
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uint32_t data_key1; //
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uint32_t data_key2; //
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uint32_t data_key3; //
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uint32_t data_key4; //
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uint8_t program_type; // 0=program.1=data
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uint8_t wait_key;
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uint8_t r_seed; //
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uint8_t ReadDataByPeriodicIdentifier_10ms,c_ReadDataByPeriodicIdentifier_10ms;
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uint16_t c_inhibut_10ms;
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uint8_t init;
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uint8_t XUPDTE_FLASH,XREQ_UDS_RESET,XREQ_RESET,XINIT_TABLE;
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uint8_t c_log_send;
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uint8_t eep_status;
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uint8_t rom_access_level;
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uint32_t group_of_dtc;
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uint8_t dtc_check_inhibit; // 85 dtc check off
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uint8_t length;
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uint8_t nrc; // negative res code
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uint8_t next_con_seq;
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uint8_t con_seq;
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uint8_t con_seq_error;
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uint8_t req_parameter_write_to_dataflash;
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uint8_t consecutive_length_fail; // ??????? nak
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uint8_t disable_rx_tx; // 6.4 CommunicationControl
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uint8_t can_length;
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uint8_t extended;
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uint32_t can_id;
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uint16_t c_timeout_session_10ms;
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uint8_t force_boot;
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uint8_t can_ch,can_ch_fixed;
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uint8_t print;
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uint8_t c_dtc_event;
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uint16_t c_monitor_inhibit_10ms;
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// uint8_t serial_tx[MAX_UDS_SERIAL_TX+2]; //
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// uint16_t pserial_tx_send,pserial_tx_write;
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uint8_t c_monitor_can;
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// uint8_t seq_map_download;
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}T_UDS_;
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//-----------------------------------------------
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typedef struct _flash {
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uint16_t ndata; // FlashDataCounter
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uint32_t address;
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uint32_t start_address;
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uint16_t ndata_pre_packet;
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uint16_t p_data;
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uint8_t data[MAX_UDS_DATA_BUF+10];
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uint8_t cmd,rt;
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uint8_t seq;
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uint16_t frame_len;
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uint16_t checksum_tx;
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uint16_t checksum_rx;
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uint16_t block_checksum; // transfrt exit ?? ??.
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uint8_t STATE;
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uint8_t program_fail;
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uint8_t check_fw_version_correct; // "EPT" FOUND
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uint8_t verify_fail;
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uint16_t checksum;
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uint8_t checksum_ok;
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uint8_t vector[4];
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// =========================================
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uint8_t opcode;
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uint32_t addr;
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uint32_t start_addr,end_addr;
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uint8_t buf[10];
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}flash_;
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typedef struct _DTC_Items_Type
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{
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// ===================================== c[0]
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uint32_t lv : 1; // msb
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uint32_t hv : 1;
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uint32_t can_l : 1;
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uint32_t can_l_busoff : 1;
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uint32_t can_r : 1;
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uint32_t can_r_busoff : 1;
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uint32_t can_ecu : 1;
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uint32_t can_ecu_busoff : 1; // lsb
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// ===================================== c[1]
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uint32_t d1_oc : 1;
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uint32_t d1_open_short : 1;
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uint32_t d1_g_vcc : 1;
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uint32_t d2_oc : 1;
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uint32_t d2_open_short : 1;
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uint32_t d2_g_vcc : 1;
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uint32_t d3_oc : 1;
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uint32_t d3_open_short : 1;
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// ===================================== c[2]
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uint32_t d3_g_vcc : 1;
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uint32_t d4_oc : 1;
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uint32_t d4_open_short : 1;
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uint32_t d4_g_vcc : 1;
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uint32_t d5_oc : 1;
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uint32_t d5_open_short : 1;
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uint32_t d5_g_vcc : 1;
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uint32_t d6_oc : 1;
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// ===================================== c[3]
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uint32_t d6_open_short : 1;
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uint32_t d6_g_vcc : 1;
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uint32_t : 1;
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uint32_t : 1;
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uint32_t : 1;
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uint32_t : 1;
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uint32_t : 1;
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uint32_t : 1;
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// ===================================== c[4]
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uint32_t : 1;
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uint32_t : 1;
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uint32_t : 1;
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uint32_t : 1;
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uint32_t : 1;
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uint32_t : 1;
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uint32_t : 1;
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uint32_t : 1;
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// ===================================== c[5]
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uint32_t : 1;
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uint32_t : 1;
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uint32_t : 1;
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uint32_t : 1;
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uint32_t : 1;
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uint32_t : 1;
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uint32_t : 1;
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uint32_t : 1;
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// ===================================== c[6]
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uint32_t : 1;
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uint32_t : 1;
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uint32_t : 1;
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uint32_t : 1;
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uint32_t : 1;
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uint32_t : 1;
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uint32_t : 1;
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uint32_t : 1;
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// ===================================== c[7]
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uint32_t : 1;
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uint32_t : 1;
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uint32_t : 1;
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uint32_t : 1;
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uint32_t : 1;
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uint32_t : 1;
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uint32_t : 1;
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uint32_t : 1;
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}_DTC_Items_T_;
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typedef union _c_DTC_bufTag
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{
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uint8_t _c[8];
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_DTC_Items_T_ f;
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} _DTC_Items_Type_;
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enum
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{
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NCOM_TYPE_NORMAL=1,
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NCOM_TYPE_NM,
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NCOM_TYPE_ALL,
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NCOM_TYPE_END
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};
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/* =======================================
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====================================== */
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#define SID_DiagnosticSessionControl 0x10
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#define SID_ECUReset 0x11
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#define SID_SecurityAccess 0x27
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#define SID_CommunicationControl 0x28
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#define SID_EnableNormalMessageTransmission 0x29
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#define SID_TesterPresent 0x3E
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#define SID_ControlDTCSetting 0x85
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#define SID_ReadDataByIdentifier 0x22
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#define SID_ReadScalingDataByIdentifier 0x24
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#define SID_WriteDataByIdentifier 0x2E
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#define SID_ReadDTCInformation 0x19
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#define SID_ClearDiagnosticInformation 0x14
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#define SID_RoutineControl 0x31
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#define SID_RequestDownload 0x34
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#define SID_TransferData 0x36
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#define SID_RequestTransferExit 0x37
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#define SID_ReadMemoryByAddress 0x23u
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#define SID_WriteMemoryByAddress 0x3Du
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#define SID_InputOutputControlByIdentifier 0x2Fu
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#define SID_DynamicallyDefineDataIdentifie 0x2Cu
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#define SID_ReadDataByPeriodicIdentifier 0x2au
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#define SID_StopDiagnosticSession 0x20u
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#define SID_Other 0xff;
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// ========================== ERROR
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#define UDS_NAK 0x7Fu
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#define UDS_NRC_LEN 0x13u // incorrectMessageLength
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#define UDS_NRC_subFunctionNotSupported 0x12u // subFunctionNotSupported
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#define UDS_NRC_OUTOFRANGE 0x31u //
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#define UDS_NRC_securityAccessDenied 0x33u // securityAccessDenied
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#define UDS_NRC_serviceNotSupport 0x11u //
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#define UDS_NRC_requestSequenceError 0x24u //
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#define UDS_NRC_invalidKey 0x35u //
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#define UDS_NRC_subFunctionNotSupportedInActiveSession 0x7eu //
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#define UDS_NRC_serviceNotSupportedInActiveSession 0x7Fu //
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#define UDS_NRC_transferDataSuspended 0x71U
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#define UDS_NRC_generalProgrammingFailure 0x72U
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#define UDS_NRC_wrongBlockSequenceCounter 0x73U
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#define UDS_NRC_requestCorrectlyReceived_ResponsePending 0x78U
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#define UDS_NRC_conditionsNotCorrect 0x22U
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#define UDS_NRC_busyRepeatReques 0x21U
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#define UDS_NRC_generalReject 0x10U
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#define is_noresponse(n) (n&0x80)
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#define is_response_supressed ((uds.rx.buf[2]&0x80)==0x80)
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#define NSESSION_DEFAULT 1u
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#define NSESSION_PROGRAMMING 2u
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#define NSESSION_EXTENDED_DIAGNOSTIC 3u
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#define V_TIMEOUT_SESSION_10MS 500u
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#define is_session_default (uds.session<=NSESSION_DEFAULT)
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#define is_session_extended_diagnostic (uds.session==NSESSION_EXTENDED_DIAGNOSTIC)
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#define is_session_program (uds.session==NSESSION_PROGRAMMING)
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#define is_serial (uds.rx.buf[0]==0)
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#define is_single_frame ((uds.rx.buf[0] & 0xF0)==0)
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#define is_first_frame ((uds.rx.buf[0] & 0xF0)==0x10)
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#define is_consecutive_frame ((uds.rx.buf[0] & 0xF0)==0x20)
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#define is_flow_control ((uds.rx.buf[0] & 0xF0)==0x30)
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#define is_flow_control_abort_cons (uds.rx.buf[0]>=0x32)
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#define is_flow_control_wait (uds.rx.buf[0]==0x31)
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#define is_sel_all_clear (uds.rx.buf[7]==1)
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#define is_sel_set (uds.rx.buf[7]==0)
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#define is_sel_clear (uds.rx.buf[7]==2)
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#define is_program_fail_nak (0)
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enum
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{
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TT_U8=0, // unsigned char
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TT_S8, // signed char
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TT_U16, // unsigned short
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TT_S16, // signed short
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TT_U32, // unsigned int (32bit)
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TT_S32, // signed int (32bit)
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TT_F32, // signed float (32bit)
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TT_X // STRING (8bit)
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};
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#define UDS_GroupOfDTC_POWER_TRAIN 0x0000FF // Powertrain Group
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#define UDS_GroupOfDTC_CHASSIS 0x4000FF // CHASSIS group
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#define UDS_GroupOfDTC_ALL 0xFFFFFF //ALL
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#define is_extendedmode_unlock ((uds.session==NSESSION_EXTENDED_DIAGNOSTIC) && (uds.rom_access_level==1))
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#ifndef TRUE
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#define TRUE 1
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#endif
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#ifndef FALSE
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#define FALSE 0
|
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#endif
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#ifndef SUCCESS
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#define SUCCESS 1
|
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#endif
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#ifndef FAILED
|
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#define FAILED -1
|
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#endif
|
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#ifndef ON
|
|
#define ON 1
|
|
#endif
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#ifndef OFF
|
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#define OFF 0
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#endif
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#endif
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