mirror of
https://github.com/Dev-KATECH/ADM.git
synced 2026-05-17 18:03:59 +09:00
8848 lines
275 KiB
Plaintext
8848 lines
275 KiB
Plaintext
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Analyzing function: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_46/188
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;; 1 loops found
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;;
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;; Loop 0
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;; header 0, latch 1
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;; depth 0, outer -1
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;; nodes: 0 1 2 3 4 5
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;; 2 succs { 3 5 }
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;; 3 succs { 4 5 }
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;; 4 succs { 5 }
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;; 5 succs { 1 }
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Analyzing function body size: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_46
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IPA function summary for SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_46/188 inlinable
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global time: 21.750000
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self size: 16
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global size: 0
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min size: 0
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self stack: 0
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global stack: 0
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size:11.000000, time:8.750000
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size:3.000000, time:2.000000, executed if:(not inlined)
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calls:
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Sys_GetCoreID/189 function body not available
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loop depth: 0 freq:1.00 size: 2 time: 11
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Analyzing function: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_46/187
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;; 1 loops found
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;;
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;; Loop 0
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;; header 0, latch 1
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;; depth 0, outer -1
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;; nodes: 0 1 2 3 4 5
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;; 2 succs { 3 5 }
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;; 3 succs { 4 5 }
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;; 4 succs { 5 }
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;; 5 succs { 1 }
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Analyzing function body size: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_46
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IPA function summary for SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_46/187 inlinable
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global time: 22.250000
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self size: 18
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global size: 0
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min size: 0
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self stack: 0
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global stack: 0
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size:13.000000, time:9.250000
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size:3.000000, time:2.000000, executed if:(not inlined)
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calls:
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Sys_GetCoreID/189 function body not available
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loop depth: 0 freq:1.00 size: 2 time: 11
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Analyzing function: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_45/186
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;; 1 loops found
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;;
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;; Loop 0
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;; header 0, latch 1
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;; depth 0, outer -1
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;; nodes: 0 1 2 3 4 5
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;; 2 succs { 3 5 }
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;; 3 succs { 4 5 }
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;; 4 succs { 5 }
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;; 5 succs { 1 }
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Analyzing function body size: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_45
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IPA function summary for SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_45/186 inlinable
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global time: 21.750000
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self size: 16
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global size: 0
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min size: 0
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self stack: 0
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global stack: 0
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size:11.000000, time:8.750000
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size:3.000000, time:2.000000, executed if:(not inlined)
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calls:
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Sys_GetCoreID/189 function body not available
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loop depth: 0 freq:1.00 size: 2 time: 11
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Analyzing function: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_45/185
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;; 1 loops found
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;;
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;; Loop 0
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;; header 0, latch 1
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;; depth 0, outer -1
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;; nodes: 0 1 2 3 4 5
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;; 2 succs { 3 5 }
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;; 3 succs { 4 5 }
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;; 4 succs { 5 }
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;; 5 succs { 1 }
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Analyzing function body size: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_45
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IPA function summary for SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_45/185 inlinable
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global time: 22.250000
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self size: 18
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global size: 0
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min size: 0
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self stack: 0
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global stack: 0
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size:13.000000, time:9.250000
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size:3.000000, time:2.000000, executed if:(not inlined)
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calls:
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Sys_GetCoreID/189 function body not available
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loop depth: 0 freq:1.00 size: 2 time: 11
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Analyzing function: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_44/184
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;; 1 loops found
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;;
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;; Loop 0
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;; header 0, latch 1
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;; depth 0, outer -1
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;; nodes: 0 1 2 3 4 5
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;; 2 succs { 3 5 }
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;; 3 succs { 4 5 }
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;; 4 succs { 5 }
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;; 5 succs { 1 }
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Analyzing function body size: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_44
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IPA function summary for SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_44/184 inlinable
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global time: 21.750000
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self size: 16
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global size: 0
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min size: 0
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self stack: 0
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global stack: 0
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size:11.000000, time:8.750000
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size:3.000000, time:2.000000, executed if:(not inlined)
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calls:
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Sys_GetCoreID/189 function body not available
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loop depth: 0 freq:1.00 size: 2 time: 11
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Analyzing function: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_44/183
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;; 1 loops found
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;;
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;; Loop 0
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;; header 0, latch 1
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;; depth 0, outer -1
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;; nodes: 0 1 2 3 4 5
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;; 2 succs { 3 5 }
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;; 3 succs { 4 5 }
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;; 4 succs { 5 }
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;; 5 succs { 1 }
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Analyzing function body size: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_44
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IPA function summary for SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_44/183 inlinable
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global time: 22.250000
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self size: 18
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global size: 0
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min size: 0
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self stack: 0
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global stack: 0
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size:13.000000, time:9.250000
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size:3.000000, time:2.000000, executed if:(not inlined)
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calls:
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Sys_GetCoreID/189 function body not available
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loop depth: 0 freq:1.00 size: 2 time: 11
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Analyzing function: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_43/182
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;; 1 loops found
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;;
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;; Loop 0
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;; header 0, latch 1
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;; depth 0, outer -1
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;; nodes: 0 1 2 3 4 5
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;; 2 succs { 3 5 }
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;; 3 succs { 4 5 }
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;; 4 succs { 5 }
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;; 5 succs { 1 }
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Analyzing function body size: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_43
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IPA function summary for SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_43/182 inlinable
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global time: 21.750000
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self size: 16
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global size: 0
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min size: 0
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self stack: 0
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global stack: 0
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size:11.000000, time:8.750000
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size:3.000000, time:2.000000, executed if:(not inlined)
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calls:
|
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Sys_GetCoreID/189 function body not available
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loop depth: 0 freq:1.00 size: 2 time: 11
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Analyzing function: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_43/181
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;; 1 loops found
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;;
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;; Loop 0
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;; header 0, latch 1
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;; depth 0, outer -1
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;; nodes: 0 1 2 3 4 5
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;; 2 succs { 3 5 }
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;; 3 succs { 4 5 }
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;; 4 succs { 5 }
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;; 5 succs { 1 }
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|
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Analyzing function body size: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_43
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IPA function summary for SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_43/181 inlinable
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global time: 22.250000
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self size: 18
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global size: 0
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min size: 0
|
|
self stack: 0
|
|
global stack: 0
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|
size:13.000000, time:9.250000
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size:3.000000, time:2.000000, executed if:(not inlined)
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calls:
|
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Sys_GetCoreID/189 function body not available
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loop depth: 0 freq:1.00 size: 2 time: 11
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Analyzing function: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_42/180
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;; 1 loops found
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;;
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;; Loop 0
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;; header 0, latch 1
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;; depth 0, outer -1
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;; nodes: 0 1 2 3 4 5
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;; 2 succs { 3 5 }
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;; 3 succs { 4 5 }
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;; 4 succs { 5 }
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;; 5 succs { 1 }
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|
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Analyzing function body size: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_42
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IPA function summary for SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_42/180 inlinable
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global time: 21.750000
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self size: 16
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|
global size: 0
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|
min size: 0
|
|
self stack: 0
|
|
global stack: 0
|
|
size:11.000000, time:8.750000
|
|
size:3.000000, time:2.000000, executed if:(not inlined)
|
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calls:
|
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Sys_GetCoreID/189 function body not available
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loop depth: 0 freq:1.00 size: 2 time: 11
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|
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Analyzing function: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_42/179
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;; 1 loops found
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;;
|
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;; Loop 0
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;; header 0, latch 1
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;; depth 0, outer -1
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;; nodes: 0 1 2 3 4 5
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;; 2 succs { 3 5 }
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;; 3 succs { 4 5 }
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;; 4 succs { 5 }
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;; 5 succs { 1 }
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|
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Analyzing function body size: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_42
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|
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IPA function summary for SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_42/179 inlinable
|
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global time: 22.250000
|
|
self size: 18
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global size: 0
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min size: 0
|
|
self stack: 0
|
|
global stack: 0
|
|
size:13.000000, time:9.250000
|
|
size:3.000000, time:2.000000, executed if:(not inlined)
|
|
calls:
|
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Sys_GetCoreID/189 function body not available
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loop depth: 0 freq:1.00 size: 2 time: 11
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Analyzing function: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_41/178
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;; 1 loops found
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;;
|
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;; Loop 0
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;; header 0, latch 1
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;; depth 0, outer -1
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;; nodes: 0 1 2 3 4 5
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;; 2 succs { 3 5 }
|
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;; 3 succs { 4 5 }
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;; 4 succs { 5 }
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;; 5 succs { 1 }
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|
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Analyzing function body size: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_41
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IPA function summary for SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_41/178 inlinable
|
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global time: 21.750000
|
|
self size: 16
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|
global size: 0
|
|
min size: 0
|
|
self stack: 0
|
|
global stack: 0
|
|
size:11.000000, time:8.750000
|
|
size:3.000000, time:2.000000, executed if:(not inlined)
|
|
calls:
|
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Sys_GetCoreID/189 function body not available
|
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loop depth: 0 freq:1.00 size: 2 time: 11
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|
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|
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Analyzing function: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_41/177
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;; 1 loops found
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;;
|
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;; Loop 0
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;; header 0, latch 1
|
|
;; depth 0, outer -1
|
|
;; nodes: 0 1 2 3 4 5
|
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;; 2 succs { 3 5 }
|
|
;; 3 succs { 4 5 }
|
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;; 4 succs { 5 }
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;; 5 succs { 1 }
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|
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Analyzing function body size: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_41
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IPA function summary for SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_41/177 inlinable
|
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global time: 22.250000
|
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self size: 18
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global size: 0
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min size: 0
|
|
self stack: 0
|
|
global stack: 0
|
|
size:13.000000, time:9.250000
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size:3.000000, time:2.000000, executed if:(not inlined)
|
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calls:
|
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Sys_GetCoreID/189 function body not available
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loop depth: 0 freq:1.00 size: 2 time: 11
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Analyzing function: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_40/176
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;; 1 loops found
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;;
|
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;; Loop 0
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;; header 0, latch 1
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;; depth 0, outer -1
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;; nodes: 0 1 2 3 4 5
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;; 2 succs { 3 5 }
|
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;; 3 succs { 4 5 }
|
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;; 4 succs { 5 }
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;; 5 succs { 1 }
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|
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Analyzing function body size: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_40
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IPA function summary for SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_40/176 inlinable
|
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global time: 21.750000
|
|
self size: 16
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|
global size: 0
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min size: 0
|
|
self stack: 0
|
|
global stack: 0
|
|
size:11.000000, time:8.750000
|
|
size:3.000000, time:2.000000, executed if:(not inlined)
|
|
calls:
|
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Sys_GetCoreID/189 function body not available
|
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loop depth: 0 freq:1.00 size: 2 time: 11
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Analyzing function: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_40/175
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;; 1 loops found
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;;
|
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;; Loop 0
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;; header 0, latch 1
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;; depth 0, outer -1
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;; nodes: 0 1 2 3 4 5
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|
;; 2 succs { 3 5 }
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;; 3 succs { 4 5 }
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;; 4 succs { 5 }
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;; 5 succs { 1 }
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|
|
Analyzing function body size: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_40
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|
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IPA function summary for SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_40/175 inlinable
|
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global time: 22.250000
|
|
self size: 18
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|
global size: 0
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|
min size: 0
|
|
self stack: 0
|
|
global stack: 0
|
|
size:13.000000, time:9.250000
|
|
size:3.000000, time:2.000000, executed if:(not inlined)
|
|
calls:
|
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Sys_GetCoreID/189 function body not available
|
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loop depth: 0 freq:1.00 size: 2 time: 11
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|
|
|
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Analyzing function: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_39/174
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;; 1 loops found
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;;
|
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;; Loop 0
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;; header 0, latch 1
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;; depth 0, outer -1
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|
;; nodes: 0 1 2 3 4 5
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|
;; 2 succs { 3 5 }
|
|
;; 3 succs { 4 5 }
|
|
;; 4 succs { 5 }
|
|
;; 5 succs { 1 }
|
|
|
|
Analyzing function body size: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_39
|
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|
|
IPA function summary for SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_39/174 inlinable
|
|
global time: 21.750000
|
|
self size: 16
|
|
global size: 0
|
|
min size: 0
|
|
self stack: 0
|
|
global stack: 0
|
|
size:11.000000, time:8.750000
|
|
size:3.000000, time:2.000000, executed if:(not inlined)
|
|
calls:
|
|
Sys_GetCoreID/189 function body not available
|
|
loop depth: 0 freq:1.00 size: 2 time: 11
|
|
|
|
|
|
Analyzing function: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_39/173
|
|
;; 1 loops found
|
|
;;
|
|
;; Loop 0
|
|
;; header 0, latch 1
|
|
;; depth 0, outer -1
|
|
;; nodes: 0 1 2 3 4 5
|
|
;; 2 succs { 3 5 }
|
|
;; 3 succs { 4 5 }
|
|
;; 4 succs { 5 }
|
|
;; 5 succs { 1 }
|
|
|
|
Analyzing function body size: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_39
|
|
|
|
IPA function summary for SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_39/173 inlinable
|
|
global time: 22.250000
|
|
self size: 18
|
|
global size: 0
|
|
min size: 0
|
|
self stack: 0
|
|
global stack: 0
|
|
size:13.000000, time:9.250000
|
|
size:3.000000, time:2.000000, executed if:(not inlined)
|
|
calls:
|
|
Sys_GetCoreID/189 function body not available
|
|
loop depth: 0 freq:1.00 size: 2 time: 11
|
|
|
|
|
|
Analyzing function: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_38/172
|
|
;; 1 loops found
|
|
;;
|
|
;; Loop 0
|
|
;; header 0, latch 1
|
|
;; depth 0, outer -1
|
|
;; nodes: 0 1 2 3 4 5
|
|
;; 2 succs { 3 5 }
|
|
;; 3 succs { 4 5 }
|
|
;; 4 succs { 5 }
|
|
;; 5 succs { 1 }
|
|
|
|
Analyzing function body size: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_38
|
|
|
|
IPA function summary for SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_38/172 inlinable
|
|
global time: 21.750000
|
|
self size: 16
|
|
global size: 0
|
|
min size: 0
|
|
self stack: 0
|
|
global stack: 0
|
|
size:11.000000, time:8.750000
|
|
size:3.000000, time:2.000000, executed if:(not inlined)
|
|
calls:
|
|
Sys_GetCoreID/189 function body not available
|
|
loop depth: 0 freq:1.00 size: 2 time: 11
|
|
|
|
|
|
Analyzing function: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_38/171
|
|
;; 1 loops found
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|
;;
|
|
;; Loop 0
|
|
;; header 0, latch 1
|
|
;; depth 0, outer -1
|
|
;; nodes: 0 1 2 3 4 5
|
|
;; 2 succs { 3 5 }
|
|
;; 3 succs { 4 5 }
|
|
;; 4 succs { 5 }
|
|
;; 5 succs { 1 }
|
|
|
|
Analyzing function body size: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_38
|
|
|
|
IPA function summary for SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_38/171 inlinable
|
|
global time: 22.250000
|
|
self size: 18
|
|
global size: 0
|
|
min size: 0
|
|
self stack: 0
|
|
global stack: 0
|
|
size:13.000000, time:9.250000
|
|
size:3.000000, time:2.000000, executed if:(not inlined)
|
|
calls:
|
|
Sys_GetCoreID/189 function body not available
|
|
loop depth: 0 freq:1.00 size: 2 time: 11
|
|
|
|
|
|
Analyzing function: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_37/170
|
|
;; 1 loops found
|
|
;;
|
|
;; Loop 0
|
|
;; header 0, latch 1
|
|
;; depth 0, outer -1
|
|
;; nodes: 0 1 2 3 4 5
|
|
;; 2 succs { 3 5 }
|
|
;; 3 succs { 4 5 }
|
|
;; 4 succs { 5 }
|
|
;; 5 succs { 1 }
|
|
|
|
Analyzing function body size: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_37
|
|
|
|
IPA function summary for SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_37/170 inlinable
|
|
global time: 21.750000
|
|
self size: 16
|
|
global size: 0
|
|
min size: 0
|
|
self stack: 0
|
|
global stack: 0
|
|
size:11.000000, time:8.750000
|
|
size:3.000000, time:2.000000, executed if:(not inlined)
|
|
calls:
|
|
Sys_GetCoreID/189 function body not available
|
|
loop depth: 0 freq:1.00 size: 2 time: 11
|
|
|
|
|
|
Analyzing function: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_37/169
|
|
;; 1 loops found
|
|
;;
|
|
;; Loop 0
|
|
;; header 0, latch 1
|
|
;; depth 0, outer -1
|
|
;; nodes: 0 1 2 3 4 5
|
|
;; 2 succs { 3 5 }
|
|
;; 3 succs { 4 5 }
|
|
;; 4 succs { 5 }
|
|
;; 5 succs { 1 }
|
|
|
|
Analyzing function body size: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_37
|
|
|
|
IPA function summary for SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_37/169 inlinable
|
|
global time: 22.250000
|
|
self size: 18
|
|
global size: 0
|
|
min size: 0
|
|
self stack: 0
|
|
global stack: 0
|
|
size:13.000000, time:9.250000
|
|
size:3.000000, time:2.000000, executed if:(not inlined)
|
|
calls:
|
|
Sys_GetCoreID/189 function body not available
|
|
loop depth: 0 freq:1.00 size: 2 time: 11
|
|
|
|
|
|
Analyzing function: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_36/168
|
|
;; 1 loops found
|
|
;;
|
|
;; Loop 0
|
|
;; header 0, latch 1
|
|
;; depth 0, outer -1
|
|
;; nodes: 0 1 2 3 4 5
|
|
;; 2 succs { 3 5 }
|
|
;; 3 succs { 4 5 }
|
|
;; 4 succs { 5 }
|
|
;; 5 succs { 1 }
|
|
|
|
Analyzing function body size: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_36
|
|
|
|
IPA function summary for SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_36/168 inlinable
|
|
global time: 21.750000
|
|
self size: 16
|
|
global size: 0
|
|
min size: 0
|
|
self stack: 0
|
|
global stack: 0
|
|
size:11.000000, time:8.750000
|
|
size:3.000000, time:2.000000, executed if:(not inlined)
|
|
calls:
|
|
Sys_GetCoreID/189 function body not available
|
|
loop depth: 0 freq:1.00 size: 2 time: 11
|
|
|
|
|
|
Analyzing function: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_36/167
|
|
;; 1 loops found
|
|
;;
|
|
;; Loop 0
|
|
;; header 0, latch 1
|
|
;; depth 0, outer -1
|
|
;; nodes: 0 1 2 3 4 5
|
|
;; 2 succs { 3 5 }
|
|
;; 3 succs { 4 5 }
|
|
;; 4 succs { 5 }
|
|
;; 5 succs { 1 }
|
|
|
|
Analyzing function body size: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_36
|
|
|
|
IPA function summary for SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_36/167 inlinable
|
|
global time: 22.250000
|
|
self size: 18
|
|
global size: 0
|
|
min size: 0
|
|
self stack: 0
|
|
global stack: 0
|
|
size:13.000000, time:9.250000
|
|
size:3.000000, time:2.000000, executed if:(not inlined)
|
|
calls:
|
|
Sys_GetCoreID/189 function body not available
|
|
loop depth: 0 freq:1.00 size: 2 time: 11
|
|
|
|
|
|
Analyzing function: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_35/166
|
|
;; 1 loops found
|
|
;;
|
|
;; Loop 0
|
|
;; header 0, latch 1
|
|
;; depth 0, outer -1
|
|
;; nodes: 0 1 2 3 4 5
|
|
;; 2 succs { 3 5 }
|
|
;; 3 succs { 4 5 }
|
|
;; 4 succs { 5 }
|
|
;; 5 succs { 1 }
|
|
|
|
Analyzing function body size: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_35
|
|
|
|
IPA function summary for SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_35/166 inlinable
|
|
global time: 21.750000
|
|
self size: 16
|
|
global size: 0
|
|
min size: 0
|
|
self stack: 0
|
|
global stack: 0
|
|
size:11.000000, time:8.750000
|
|
size:3.000000, time:2.000000, executed if:(not inlined)
|
|
calls:
|
|
Sys_GetCoreID/189 function body not available
|
|
loop depth: 0 freq:1.00 size: 2 time: 11
|
|
|
|
|
|
Analyzing function: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_35/165
|
|
;; 1 loops found
|
|
;;
|
|
;; Loop 0
|
|
;; header 0, latch 1
|
|
;; depth 0, outer -1
|
|
;; nodes: 0 1 2 3 4 5
|
|
;; 2 succs { 3 5 }
|
|
;; 3 succs { 4 5 }
|
|
;; 4 succs { 5 }
|
|
;; 5 succs { 1 }
|
|
|
|
Analyzing function body size: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_35
|
|
|
|
IPA function summary for SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_35/165 inlinable
|
|
global time: 22.250000
|
|
self size: 18
|
|
global size: 0
|
|
min size: 0
|
|
self stack: 0
|
|
global stack: 0
|
|
size:13.000000, time:9.250000
|
|
size:3.000000, time:2.000000, executed if:(not inlined)
|
|
calls:
|
|
Sys_GetCoreID/189 function body not available
|
|
loop depth: 0 freq:1.00 size: 2 time: 11
|
|
|
|
|
|
Analyzing function: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_34/164
|
|
;; 1 loops found
|
|
;;
|
|
;; Loop 0
|
|
;; header 0, latch 1
|
|
;; depth 0, outer -1
|
|
;; nodes: 0 1 2 3 4 5
|
|
;; 2 succs { 3 5 }
|
|
;; 3 succs { 4 5 }
|
|
;; 4 succs { 5 }
|
|
;; 5 succs { 1 }
|
|
|
|
Analyzing function body size: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_34
|
|
|
|
IPA function summary for SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_34/164 inlinable
|
|
global time: 21.750000
|
|
self size: 16
|
|
global size: 0
|
|
min size: 0
|
|
self stack: 0
|
|
global stack: 0
|
|
size:11.000000, time:8.750000
|
|
size:3.000000, time:2.000000, executed if:(not inlined)
|
|
calls:
|
|
Sys_GetCoreID/189 function body not available
|
|
loop depth: 0 freq:1.00 size: 2 time: 11
|
|
|
|
|
|
Analyzing function: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_34/163
|
|
;; 1 loops found
|
|
;;
|
|
;; Loop 0
|
|
;; header 0, latch 1
|
|
;; depth 0, outer -1
|
|
;; nodes: 0 1 2 3 4 5
|
|
;; 2 succs { 3 5 }
|
|
;; 3 succs { 4 5 }
|
|
;; 4 succs { 5 }
|
|
;; 5 succs { 1 }
|
|
|
|
Analyzing function body size: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_34
|
|
|
|
IPA function summary for SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_34/163 inlinable
|
|
global time: 22.250000
|
|
self size: 18
|
|
global size: 0
|
|
min size: 0
|
|
self stack: 0
|
|
global stack: 0
|
|
size:13.000000, time:9.250000
|
|
size:3.000000, time:2.000000, executed if:(not inlined)
|
|
calls:
|
|
Sys_GetCoreID/189 function body not available
|
|
loop depth: 0 freq:1.00 size: 2 time: 11
|
|
|
|
|
|
Analyzing function: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_33/162
|
|
;; 1 loops found
|
|
;;
|
|
;; Loop 0
|
|
;; header 0, latch 1
|
|
;; depth 0, outer -1
|
|
;; nodes: 0 1 2 3 4 5
|
|
;; 2 succs { 3 5 }
|
|
;; 3 succs { 4 5 }
|
|
;; 4 succs { 5 }
|
|
;; 5 succs { 1 }
|
|
|
|
Analyzing function body size: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_33
|
|
|
|
IPA function summary for SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_33/162 inlinable
|
|
global time: 21.750000
|
|
self size: 16
|
|
global size: 0
|
|
min size: 0
|
|
self stack: 0
|
|
global stack: 0
|
|
size:11.000000, time:8.750000
|
|
size:3.000000, time:2.000000, executed if:(not inlined)
|
|
calls:
|
|
Sys_GetCoreID/189 function body not available
|
|
loop depth: 0 freq:1.00 size: 2 time: 11
|
|
|
|
|
|
Analyzing function: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_33/161
|
|
;; 1 loops found
|
|
;;
|
|
;; Loop 0
|
|
;; header 0, latch 1
|
|
;; depth 0, outer -1
|
|
;; nodes: 0 1 2 3 4 5
|
|
;; 2 succs { 3 5 }
|
|
;; 3 succs { 4 5 }
|
|
;; 4 succs { 5 }
|
|
;; 5 succs { 1 }
|
|
|
|
Analyzing function body size: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_33
|
|
|
|
IPA function summary for SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_33/161 inlinable
|
|
global time: 22.250000
|
|
self size: 18
|
|
global size: 0
|
|
min size: 0
|
|
self stack: 0
|
|
global stack: 0
|
|
size:13.000000, time:9.250000
|
|
size:3.000000, time:2.000000, executed if:(not inlined)
|
|
calls:
|
|
Sys_GetCoreID/189 function body not available
|
|
loop depth: 0 freq:1.00 size: 2 time: 11
|
|
|
|
|
|
Analyzing function: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_32/160
|
|
;; 1 loops found
|
|
;;
|
|
;; Loop 0
|
|
;; header 0, latch 1
|
|
;; depth 0, outer -1
|
|
;; nodes: 0 1 2 3 4 5
|
|
;; 2 succs { 3 5 }
|
|
;; 3 succs { 4 5 }
|
|
;; 4 succs { 5 }
|
|
;; 5 succs { 1 }
|
|
|
|
Analyzing function body size: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_32
|
|
|
|
IPA function summary for SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_32/160 inlinable
|
|
global time: 21.750000
|
|
self size: 16
|
|
global size: 0
|
|
min size: 0
|
|
self stack: 0
|
|
global stack: 0
|
|
size:11.000000, time:8.750000
|
|
size:3.000000, time:2.000000, executed if:(not inlined)
|
|
calls:
|
|
Sys_GetCoreID/189 function body not available
|
|
loop depth: 0 freq:1.00 size: 2 time: 11
|
|
|
|
|
|
Analyzing function: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_32/159
|
|
;; 1 loops found
|
|
;;
|
|
;; Loop 0
|
|
;; header 0, latch 1
|
|
;; depth 0, outer -1
|
|
;; nodes: 0 1 2 3 4 5
|
|
;; 2 succs { 3 5 }
|
|
;; 3 succs { 4 5 }
|
|
;; 4 succs { 5 }
|
|
;; 5 succs { 1 }
|
|
|
|
Analyzing function body size: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_32
|
|
|
|
IPA function summary for SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_32/159 inlinable
|
|
global time: 22.250000
|
|
self size: 18
|
|
global size: 0
|
|
min size: 0
|
|
self stack: 0
|
|
global stack: 0
|
|
size:13.000000, time:9.250000
|
|
size:3.000000, time:2.000000, executed if:(not inlined)
|
|
calls:
|
|
Sys_GetCoreID/189 function body not available
|
|
loop depth: 0 freq:1.00 size: 2 time: 11
|
|
|
|
|
|
Analyzing function: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_31/158
|
|
;; 1 loops found
|
|
;;
|
|
;; Loop 0
|
|
;; header 0, latch 1
|
|
;; depth 0, outer -1
|
|
;; nodes: 0 1 2 3 4 5
|
|
;; 2 succs { 3 5 }
|
|
;; 3 succs { 4 5 }
|
|
;; 4 succs { 5 }
|
|
;; 5 succs { 1 }
|
|
|
|
Analyzing function body size: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_31
|
|
|
|
IPA function summary for SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_31/158 inlinable
|
|
global time: 21.750000
|
|
self size: 16
|
|
global size: 0
|
|
min size: 0
|
|
self stack: 0
|
|
global stack: 0
|
|
size:11.000000, time:8.750000
|
|
size:3.000000, time:2.000000, executed if:(not inlined)
|
|
calls:
|
|
Sys_GetCoreID/189 function body not available
|
|
loop depth: 0 freq:1.00 size: 2 time: 11
|
|
|
|
|
|
Analyzing function: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_31/157
|
|
;; 1 loops found
|
|
;;
|
|
;; Loop 0
|
|
;; header 0, latch 1
|
|
;; depth 0, outer -1
|
|
;; nodes: 0 1 2 3 4 5
|
|
;; 2 succs { 3 5 }
|
|
;; 3 succs { 4 5 }
|
|
;; 4 succs { 5 }
|
|
;; 5 succs { 1 }
|
|
|
|
Analyzing function body size: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_31
|
|
|
|
IPA function summary for SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_31/157 inlinable
|
|
global time: 22.250000
|
|
self size: 18
|
|
global size: 0
|
|
min size: 0
|
|
self stack: 0
|
|
global stack: 0
|
|
size:13.000000, time:9.250000
|
|
size:3.000000, time:2.000000, executed if:(not inlined)
|
|
calls:
|
|
Sys_GetCoreID/189 function body not available
|
|
loop depth: 0 freq:1.00 size: 2 time: 11
|
|
|
|
|
|
Analyzing function: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_30/156
|
|
;; 1 loops found
|
|
;;
|
|
;; Loop 0
|
|
;; header 0, latch 1
|
|
;; depth 0, outer -1
|
|
;; nodes: 0 1 2 3 4 5
|
|
;; 2 succs { 3 5 }
|
|
;; 3 succs { 4 5 }
|
|
;; 4 succs { 5 }
|
|
;; 5 succs { 1 }
|
|
|
|
Analyzing function body size: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_30
|
|
|
|
IPA function summary for SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_30/156 inlinable
|
|
global time: 21.750000
|
|
self size: 16
|
|
global size: 0
|
|
min size: 0
|
|
self stack: 0
|
|
global stack: 0
|
|
size:11.000000, time:8.750000
|
|
size:3.000000, time:2.000000, executed if:(not inlined)
|
|
calls:
|
|
Sys_GetCoreID/189 function body not available
|
|
loop depth: 0 freq:1.00 size: 2 time: 11
|
|
|
|
|
|
Analyzing function: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_30/155
|
|
;; 1 loops found
|
|
;;
|
|
;; Loop 0
|
|
;; header 0, latch 1
|
|
;; depth 0, outer -1
|
|
;; nodes: 0 1 2 3 4 5
|
|
;; 2 succs { 3 5 }
|
|
;; 3 succs { 4 5 }
|
|
;; 4 succs { 5 }
|
|
;; 5 succs { 1 }
|
|
|
|
Analyzing function body size: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_30
|
|
|
|
IPA function summary for SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_30/155 inlinable
|
|
global time: 22.250000
|
|
self size: 18
|
|
global size: 0
|
|
min size: 0
|
|
self stack: 0
|
|
global stack: 0
|
|
size:13.000000, time:9.250000
|
|
size:3.000000, time:2.000000, executed if:(not inlined)
|
|
calls:
|
|
Sys_GetCoreID/189 function body not available
|
|
loop depth: 0 freq:1.00 size: 2 time: 11
|
|
|
|
|
|
Analyzing function: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_29/154
|
|
;; 1 loops found
|
|
;;
|
|
;; Loop 0
|
|
;; header 0, latch 1
|
|
;; depth 0, outer -1
|
|
;; nodes: 0 1 2 3 4 5
|
|
;; 2 succs { 3 5 }
|
|
;; 3 succs { 4 5 }
|
|
;; 4 succs { 5 }
|
|
;; 5 succs { 1 }
|
|
|
|
Analyzing function body size: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_29
|
|
|
|
IPA function summary for SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_29/154 inlinable
|
|
global time: 21.750000
|
|
self size: 16
|
|
global size: 0
|
|
min size: 0
|
|
self stack: 0
|
|
global stack: 0
|
|
size:11.000000, time:8.750000
|
|
size:3.000000, time:2.000000, executed if:(not inlined)
|
|
calls:
|
|
Sys_GetCoreID/189 function body not available
|
|
loop depth: 0 freq:1.00 size: 2 time: 11
|
|
|
|
|
|
Analyzing function: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_29/153
|
|
;; 1 loops found
|
|
;;
|
|
;; Loop 0
|
|
;; header 0, latch 1
|
|
;; depth 0, outer -1
|
|
;; nodes: 0 1 2 3 4 5
|
|
;; 2 succs { 3 5 }
|
|
;; 3 succs { 4 5 }
|
|
;; 4 succs { 5 }
|
|
;; 5 succs { 1 }
|
|
|
|
Analyzing function body size: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_29
|
|
|
|
IPA function summary for SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_29/153 inlinable
|
|
global time: 22.250000
|
|
self size: 18
|
|
global size: 0
|
|
min size: 0
|
|
self stack: 0
|
|
global stack: 0
|
|
size:13.000000, time:9.250000
|
|
size:3.000000, time:2.000000, executed if:(not inlined)
|
|
calls:
|
|
Sys_GetCoreID/189 function body not available
|
|
loop depth: 0 freq:1.00 size: 2 time: 11
|
|
|
|
|
|
Analyzing function: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_28/152
|
|
;; 1 loops found
|
|
;;
|
|
;; Loop 0
|
|
;; header 0, latch 1
|
|
;; depth 0, outer -1
|
|
;; nodes: 0 1 2 3 4 5
|
|
;; 2 succs { 3 5 }
|
|
;; 3 succs { 4 5 }
|
|
;; 4 succs { 5 }
|
|
;; 5 succs { 1 }
|
|
|
|
Analyzing function body size: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_28
|
|
|
|
IPA function summary for SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_28/152 inlinable
|
|
global time: 21.750000
|
|
self size: 16
|
|
global size: 0
|
|
min size: 0
|
|
self stack: 0
|
|
global stack: 0
|
|
size:11.000000, time:8.750000
|
|
size:3.000000, time:2.000000, executed if:(not inlined)
|
|
calls:
|
|
Sys_GetCoreID/189 function body not available
|
|
loop depth: 0 freq:1.00 size: 2 time: 11
|
|
|
|
|
|
Analyzing function: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_28/151
|
|
;; 1 loops found
|
|
;;
|
|
;; Loop 0
|
|
;; header 0, latch 1
|
|
;; depth 0, outer -1
|
|
;; nodes: 0 1 2 3 4 5
|
|
;; 2 succs { 3 5 }
|
|
;; 3 succs { 4 5 }
|
|
;; 4 succs { 5 }
|
|
;; 5 succs { 1 }
|
|
|
|
Analyzing function body size: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_28
|
|
|
|
IPA function summary for SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_28/151 inlinable
|
|
global time: 22.250000
|
|
self size: 18
|
|
global size: 0
|
|
min size: 0
|
|
self stack: 0
|
|
global stack: 0
|
|
size:13.000000, time:9.250000
|
|
size:3.000000, time:2.000000, executed if:(not inlined)
|
|
calls:
|
|
Sys_GetCoreID/189 function body not available
|
|
loop depth: 0 freq:1.00 size: 2 time: 11
|
|
|
|
|
|
Analyzing function: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_27/150
|
|
;; 1 loops found
|
|
;;
|
|
;; Loop 0
|
|
;; header 0, latch 1
|
|
;; depth 0, outer -1
|
|
;; nodes: 0 1 2 3 4 5
|
|
;; 2 succs { 3 5 }
|
|
;; 3 succs { 4 5 }
|
|
;; 4 succs { 5 }
|
|
;; 5 succs { 1 }
|
|
|
|
Analyzing function body size: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_27
|
|
|
|
IPA function summary for SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_27/150 inlinable
|
|
global time: 21.750000
|
|
self size: 16
|
|
global size: 0
|
|
min size: 0
|
|
self stack: 0
|
|
global stack: 0
|
|
size:11.000000, time:8.750000
|
|
size:3.000000, time:2.000000, executed if:(not inlined)
|
|
calls:
|
|
Sys_GetCoreID/189 function body not available
|
|
loop depth: 0 freq:1.00 size: 2 time: 11
|
|
|
|
|
|
Analyzing function: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_27/149
|
|
;; 1 loops found
|
|
;;
|
|
;; Loop 0
|
|
;; header 0, latch 1
|
|
;; depth 0, outer -1
|
|
;; nodes: 0 1 2 3 4 5
|
|
;; 2 succs { 3 5 }
|
|
;; 3 succs { 4 5 }
|
|
;; 4 succs { 5 }
|
|
;; 5 succs { 1 }
|
|
|
|
Analyzing function body size: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_27
|
|
|
|
IPA function summary for SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_27/149 inlinable
|
|
global time: 22.250000
|
|
self size: 18
|
|
global size: 0
|
|
min size: 0
|
|
self stack: 0
|
|
global stack: 0
|
|
size:13.000000, time:9.250000
|
|
size:3.000000, time:2.000000, executed if:(not inlined)
|
|
calls:
|
|
Sys_GetCoreID/189 function body not available
|
|
loop depth: 0 freq:1.00 size: 2 time: 11
|
|
|
|
|
|
Analyzing function: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_26/148
|
|
;; 1 loops found
|
|
;;
|
|
;; Loop 0
|
|
;; header 0, latch 1
|
|
;; depth 0, outer -1
|
|
;; nodes: 0 1 2 3 4 5
|
|
;; 2 succs { 3 5 }
|
|
;; 3 succs { 4 5 }
|
|
;; 4 succs { 5 }
|
|
;; 5 succs { 1 }
|
|
|
|
Analyzing function body size: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_26
|
|
|
|
IPA function summary for SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_26/148 inlinable
|
|
global time: 21.750000
|
|
self size: 16
|
|
global size: 0
|
|
min size: 0
|
|
self stack: 0
|
|
global stack: 0
|
|
size:11.000000, time:8.750000
|
|
size:3.000000, time:2.000000, executed if:(not inlined)
|
|
calls:
|
|
Sys_GetCoreID/189 function body not available
|
|
loop depth: 0 freq:1.00 size: 2 time: 11
|
|
|
|
|
|
Analyzing function: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_26/147
|
|
;; 1 loops found
|
|
;;
|
|
;; Loop 0
|
|
;; header 0, latch 1
|
|
;; depth 0, outer -1
|
|
;; nodes: 0 1 2 3 4 5
|
|
;; 2 succs { 3 5 }
|
|
;; 3 succs { 4 5 }
|
|
;; 4 succs { 5 }
|
|
;; 5 succs { 1 }
|
|
|
|
Analyzing function body size: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_26
|
|
|
|
IPA function summary for SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_26/147 inlinable
|
|
global time: 22.250000
|
|
self size: 18
|
|
global size: 0
|
|
min size: 0
|
|
self stack: 0
|
|
global stack: 0
|
|
size:13.000000, time:9.250000
|
|
size:3.000000, time:2.000000, executed if:(not inlined)
|
|
calls:
|
|
Sys_GetCoreID/189 function body not available
|
|
loop depth: 0 freq:1.00 size: 2 time: 11
|
|
|
|
|
|
Analyzing function: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_25/146
|
|
;; 1 loops found
|
|
;;
|
|
;; Loop 0
|
|
;; header 0, latch 1
|
|
;; depth 0, outer -1
|
|
;; nodes: 0 1 2 3 4 5
|
|
;; 2 succs { 3 5 }
|
|
;; 3 succs { 4 5 }
|
|
;; 4 succs { 5 }
|
|
;; 5 succs { 1 }
|
|
|
|
Analyzing function body size: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_25
|
|
|
|
IPA function summary for SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_25/146 inlinable
|
|
global time: 21.750000
|
|
self size: 16
|
|
global size: 0
|
|
min size: 0
|
|
self stack: 0
|
|
global stack: 0
|
|
size:11.000000, time:8.750000
|
|
size:3.000000, time:2.000000, executed if:(not inlined)
|
|
calls:
|
|
Sys_GetCoreID/189 function body not available
|
|
loop depth: 0 freq:1.00 size: 2 time: 11
|
|
|
|
|
|
Analyzing function: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_25/145
|
|
;; 1 loops found
|
|
;;
|
|
;; Loop 0
|
|
;; header 0, latch 1
|
|
;; depth 0, outer -1
|
|
;; nodes: 0 1 2 3 4 5
|
|
;; 2 succs { 3 5 }
|
|
;; 3 succs { 4 5 }
|
|
;; 4 succs { 5 }
|
|
;; 5 succs { 1 }
|
|
|
|
Analyzing function body size: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_25
|
|
|
|
IPA function summary for SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_25/145 inlinable
|
|
global time: 22.250000
|
|
self size: 18
|
|
global size: 0
|
|
min size: 0
|
|
self stack: 0
|
|
global stack: 0
|
|
size:13.000000, time:9.250000
|
|
size:3.000000, time:2.000000, executed if:(not inlined)
|
|
calls:
|
|
Sys_GetCoreID/189 function body not available
|
|
loop depth: 0 freq:1.00 size: 2 time: 11
|
|
|
|
|
|
Analyzing function: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_24/144
|
|
;; 1 loops found
|
|
;;
|
|
;; Loop 0
|
|
;; header 0, latch 1
|
|
;; depth 0, outer -1
|
|
;; nodes: 0 1 2 3 4 5
|
|
;; 2 succs { 3 5 }
|
|
;; 3 succs { 4 5 }
|
|
;; 4 succs { 5 }
|
|
;; 5 succs { 1 }
|
|
|
|
Analyzing function body size: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_24
|
|
|
|
IPA function summary for SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_24/144 inlinable
|
|
global time: 21.750000
|
|
self size: 16
|
|
global size: 0
|
|
min size: 0
|
|
self stack: 0
|
|
global stack: 0
|
|
size:11.000000, time:8.750000
|
|
size:3.000000, time:2.000000, executed if:(not inlined)
|
|
calls:
|
|
Sys_GetCoreID/189 function body not available
|
|
loop depth: 0 freq:1.00 size: 2 time: 11
|
|
|
|
|
|
Analyzing function: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_24/143
|
|
;; 1 loops found
|
|
;;
|
|
;; Loop 0
|
|
;; header 0, latch 1
|
|
;; depth 0, outer -1
|
|
;; nodes: 0 1 2 3 4 5
|
|
;; 2 succs { 3 5 }
|
|
;; 3 succs { 4 5 }
|
|
;; 4 succs { 5 }
|
|
;; 5 succs { 1 }
|
|
|
|
Analyzing function body size: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_24
|
|
|
|
IPA function summary for SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_24/143 inlinable
|
|
global time: 22.250000
|
|
self size: 18
|
|
global size: 0
|
|
min size: 0
|
|
self stack: 0
|
|
global stack: 0
|
|
size:13.000000, time:9.250000
|
|
size:3.000000, time:2.000000, executed if:(not inlined)
|
|
calls:
|
|
Sys_GetCoreID/189 function body not available
|
|
loop depth: 0 freq:1.00 size: 2 time: 11
|
|
|
|
|
|
Analyzing function: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_23/142
|
|
;; 1 loops found
|
|
;;
|
|
;; Loop 0
|
|
;; header 0, latch 1
|
|
;; depth 0, outer -1
|
|
;; nodes: 0 1 2 3 4 5
|
|
;; 2 succs { 3 5 }
|
|
;; 3 succs { 4 5 }
|
|
;; 4 succs { 5 }
|
|
;; 5 succs { 1 }
|
|
|
|
Analyzing function body size: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_23
|
|
|
|
IPA function summary for SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_23/142 inlinable
|
|
global time: 21.750000
|
|
self size: 16
|
|
global size: 0
|
|
min size: 0
|
|
self stack: 0
|
|
global stack: 0
|
|
size:11.000000, time:8.750000
|
|
size:3.000000, time:2.000000, executed if:(not inlined)
|
|
calls:
|
|
Sys_GetCoreID/189 function body not available
|
|
loop depth: 0 freq:1.00 size: 2 time: 11
|
|
|
|
|
|
Analyzing function: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_23/141
|
|
;; 1 loops found
|
|
;;
|
|
;; Loop 0
|
|
;; header 0, latch 1
|
|
;; depth 0, outer -1
|
|
;; nodes: 0 1 2 3 4 5
|
|
;; 2 succs { 3 5 }
|
|
;; 3 succs { 4 5 }
|
|
;; 4 succs { 5 }
|
|
;; 5 succs { 1 }
|
|
|
|
Analyzing function body size: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_23
|
|
|
|
IPA function summary for SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_23/141 inlinable
|
|
global time: 22.250000
|
|
self size: 18
|
|
global size: 0
|
|
min size: 0
|
|
self stack: 0
|
|
global stack: 0
|
|
size:13.000000, time:9.250000
|
|
size:3.000000, time:2.000000, executed if:(not inlined)
|
|
calls:
|
|
Sys_GetCoreID/189 function body not available
|
|
loop depth: 0 freq:1.00 size: 2 time: 11
|
|
|
|
|
|
Analyzing function: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_22/140
|
|
;; 1 loops found
|
|
;;
|
|
;; Loop 0
|
|
;; header 0, latch 1
|
|
;; depth 0, outer -1
|
|
;; nodes: 0 1 2 3 4 5
|
|
;; 2 succs { 3 5 }
|
|
;; 3 succs { 4 5 }
|
|
;; 4 succs { 5 }
|
|
;; 5 succs { 1 }
|
|
|
|
Analyzing function body size: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_22
|
|
|
|
IPA function summary for SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_22/140 inlinable
|
|
global time: 21.750000
|
|
self size: 16
|
|
global size: 0
|
|
min size: 0
|
|
self stack: 0
|
|
global stack: 0
|
|
size:11.000000, time:8.750000
|
|
size:3.000000, time:2.000000, executed if:(not inlined)
|
|
calls:
|
|
Sys_GetCoreID/189 function body not available
|
|
loop depth: 0 freq:1.00 size: 2 time: 11
|
|
|
|
|
|
Analyzing function: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_22/139
|
|
;; 1 loops found
|
|
;;
|
|
;; Loop 0
|
|
;; header 0, latch 1
|
|
;; depth 0, outer -1
|
|
;; nodes: 0 1 2 3 4 5
|
|
;; 2 succs { 3 5 }
|
|
;; 3 succs { 4 5 }
|
|
;; 4 succs { 5 }
|
|
;; 5 succs { 1 }
|
|
|
|
Analyzing function body size: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_22
|
|
|
|
IPA function summary for SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_22/139 inlinable
|
|
global time: 22.250000
|
|
self size: 18
|
|
global size: 0
|
|
min size: 0
|
|
self stack: 0
|
|
global stack: 0
|
|
size:13.000000, time:9.250000
|
|
size:3.000000, time:2.000000, executed if:(not inlined)
|
|
calls:
|
|
Sys_GetCoreID/189 function body not available
|
|
loop depth: 0 freq:1.00 size: 2 time: 11
|
|
|
|
|
|
Analyzing function: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_21/138
|
|
;; 1 loops found
|
|
;;
|
|
;; Loop 0
|
|
;; header 0, latch 1
|
|
;; depth 0, outer -1
|
|
;; nodes: 0 1 2 3 4 5
|
|
;; 2 succs { 3 5 }
|
|
;; 3 succs { 4 5 }
|
|
;; 4 succs { 5 }
|
|
;; 5 succs { 1 }
|
|
|
|
Analyzing function body size: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_21
|
|
|
|
IPA function summary for SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_21/138 inlinable
|
|
global time: 21.750000
|
|
self size: 16
|
|
global size: 0
|
|
min size: 0
|
|
self stack: 0
|
|
global stack: 0
|
|
size:11.000000, time:8.750000
|
|
size:3.000000, time:2.000000, executed if:(not inlined)
|
|
calls:
|
|
Sys_GetCoreID/189 function body not available
|
|
loop depth: 0 freq:1.00 size: 2 time: 11
|
|
|
|
|
|
Analyzing function: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_21/137
|
|
;; 1 loops found
|
|
;;
|
|
;; Loop 0
|
|
;; header 0, latch 1
|
|
;; depth 0, outer -1
|
|
;; nodes: 0 1 2 3 4 5
|
|
;; 2 succs { 3 5 }
|
|
;; 3 succs { 4 5 }
|
|
;; 4 succs { 5 }
|
|
;; 5 succs { 1 }
|
|
|
|
Analyzing function body size: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_21
|
|
|
|
IPA function summary for SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_21/137 inlinable
|
|
global time: 22.250000
|
|
self size: 18
|
|
global size: 0
|
|
min size: 0
|
|
self stack: 0
|
|
global stack: 0
|
|
size:13.000000, time:9.250000
|
|
size:3.000000, time:2.000000, executed if:(not inlined)
|
|
calls:
|
|
Sys_GetCoreID/189 function body not available
|
|
loop depth: 0 freq:1.00 size: 2 time: 11
|
|
|
|
|
|
Analyzing function: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_20/136
|
|
;; 1 loops found
|
|
;;
|
|
;; Loop 0
|
|
;; header 0, latch 1
|
|
;; depth 0, outer -1
|
|
;; nodes: 0 1 2 3 4 5
|
|
;; 2 succs { 3 5 }
|
|
;; 3 succs { 4 5 }
|
|
;; 4 succs { 5 }
|
|
;; 5 succs { 1 }
|
|
|
|
Analyzing function body size: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_20
|
|
|
|
IPA function summary for SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_20/136 inlinable
|
|
global time: 21.750000
|
|
self size: 16
|
|
global size: 0
|
|
min size: 0
|
|
self stack: 0
|
|
global stack: 0
|
|
size:11.000000, time:8.750000
|
|
size:3.000000, time:2.000000, executed if:(not inlined)
|
|
calls:
|
|
Sys_GetCoreID/189 function body not available
|
|
loop depth: 0 freq:1.00 size: 2 time: 11
|
|
|
|
|
|
Analyzing function: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_20/135
|
|
;; 1 loops found
|
|
;;
|
|
;; Loop 0
|
|
;; header 0, latch 1
|
|
;; depth 0, outer -1
|
|
;; nodes: 0 1 2 3 4 5
|
|
;; 2 succs { 3 5 }
|
|
;; 3 succs { 4 5 }
|
|
;; 4 succs { 5 }
|
|
;; 5 succs { 1 }
|
|
|
|
Analyzing function body size: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_20
|
|
|
|
IPA function summary for SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_20/135 inlinable
|
|
global time: 22.250000
|
|
self size: 18
|
|
global size: 0
|
|
min size: 0
|
|
self stack: 0
|
|
global stack: 0
|
|
size:13.000000, time:9.250000
|
|
size:3.000000, time:2.000000, executed if:(not inlined)
|
|
calls:
|
|
Sys_GetCoreID/189 function body not available
|
|
loop depth: 0 freq:1.00 size: 2 time: 11
|
|
|
|
|
|
Analyzing function: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_19/134
|
|
;; 1 loops found
|
|
;;
|
|
;; Loop 0
|
|
;; header 0, latch 1
|
|
;; depth 0, outer -1
|
|
;; nodes: 0 1 2 3 4 5
|
|
;; 2 succs { 3 5 }
|
|
;; 3 succs { 4 5 }
|
|
;; 4 succs { 5 }
|
|
;; 5 succs { 1 }
|
|
|
|
Analyzing function body size: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_19
|
|
|
|
IPA function summary for SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_19/134 inlinable
|
|
global time: 21.750000
|
|
self size: 16
|
|
global size: 0
|
|
min size: 0
|
|
self stack: 0
|
|
global stack: 0
|
|
size:11.000000, time:8.750000
|
|
size:3.000000, time:2.000000, executed if:(not inlined)
|
|
calls:
|
|
Sys_GetCoreID/189 function body not available
|
|
loop depth: 0 freq:1.00 size: 2 time: 11
|
|
|
|
|
|
Analyzing function: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_19/133
|
|
;; 1 loops found
|
|
;;
|
|
;; Loop 0
|
|
;; header 0, latch 1
|
|
;; depth 0, outer -1
|
|
;; nodes: 0 1 2 3 4 5
|
|
;; 2 succs { 3 5 }
|
|
;; 3 succs { 4 5 }
|
|
;; 4 succs { 5 }
|
|
;; 5 succs { 1 }
|
|
|
|
Analyzing function body size: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_19
|
|
|
|
IPA function summary for SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_19/133 inlinable
|
|
global time: 22.250000
|
|
self size: 18
|
|
global size: 0
|
|
min size: 0
|
|
self stack: 0
|
|
global stack: 0
|
|
size:13.000000, time:9.250000
|
|
size:3.000000, time:2.000000, executed if:(not inlined)
|
|
calls:
|
|
Sys_GetCoreID/189 function body not available
|
|
loop depth: 0 freq:1.00 size: 2 time: 11
|
|
|
|
|
|
Analyzing function: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_18/132
|
|
;; 1 loops found
|
|
;;
|
|
;; Loop 0
|
|
;; header 0, latch 1
|
|
;; depth 0, outer -1
|
|
;; nodes: 0 1 2 3 4 5
|
|
;; 2 succs { 3 5 }
|
|
;; 3 succs { 4 5 }
|
|
;; 4 succs { 5 }
|
|
;; 5 succs { 1 }
|
|
|
|
Analyzing function body size: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_18
|
|
|
|
IPA function summary for SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_18/132 inlinable
|
|
global time: 21.750000
|
|
self size: 16
|
|
global size: 0
|
|
min size: 0
|
|
self stack: 0
|
|
global stack: 0
|
|
size:11.000000, time:8.750000
|
|
size:3.000000, time:2.000000, executed if:(not inlined)
|
|
calls:
|
|
Sys_GetCoreID/189 function body not available
|
|
loop depth: 0 freq:1.00 size: 2 time: 11
|
|
|
|
|
|
Analyzing function: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_18/131
|
|
;; 1 loops found
|
|
;;
|
|
;; Loop 0
|
|
;; header 0, latch 1
|
|
;; depth 0, outer -1
|
|
;; nodes: 0 1 2 3 4 5
|
|
;; 2 succs { 3 5 }
|
|
;; 3 succs { 4 5 }
|
|
;; 4 succs { 5 }
|
|
;; 5 succs { 1 }
|
|
|
|
Analyzing function body size: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_18
|
|
|
|
IPA function summary for SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_18/131 inlinable
|
|
global time: 22.250000
|
|
self size: 18
|
|
global size: 0
|
|
min size: 0
|
|
self stack: 0
|
|
global stack: 0
|
|
size:13.000000, time:9.250000
|
|
size:3.000000, time:2.000000, executed if:(not inlined)
|
|
calls:
|
|
Sys_GetCoreID/189 function body not available
|
|
loop depth: 0 freq:1.00 size: 2 time: 11
|
|
|
|
|
|
Analyzing function: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_17/130
|
|
;; 1 loops found
|
|
;;
|
|
;; Loop 0
|
|
;; header 0, latch 1
|
|
;; depth 0, outer -1
|
|
;; nodes: 0 1 2 3 4 5
|
|
;; 2 succs { 3 5 }
|
|
;; 3 succs { 4 5 }
|
|
;; 4 succs { 5 }
|
|
;; 5 succs { 1 }
|
|
|
|
Analyzing function body size: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_17
|
|
|
|
IPA function summary for SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_17/130 inlinable
|
|
global time: 21.750000
|
|
self size: 16
|
|
global size: 0
|
|
min size: 0
|
|
self stack: 0
|
|
global stack: 0
|
|
size:11.000000, time:8.750000
|
|
size:3.000000, time:2.000000, executed if:(not inlined)
|
|
calls:
|
|
Sys_GetCoreID/189 function body not available
|
|
loop depth: 0 freq:1.00 size: 2 time: 11
|
|
|
|
|
|
Analyzing function: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_17/129
|
|
;; 1 loops found
|
|
;;
|
|
;; Loop 0
|
|
;; header 0, latch 1
|
|
;; depth 0, outer -1
|
|
;; nodes: 0 1 2 3 4 5
|
|
;; 2 succs { 3 5 }
|
|
;; 3 succs { 4 5 }
|
|
;; 4 succs { 5 }
|
|
;; 5 succs { 1 }
|
|
|
|
Analyzing function body size: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_17
|
|
|
|
IPA function summary for SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_17/129 inlinable
|
|
global time: 22.250000
|
|
self size: 18
|
|
global size: 0
|
|
min size: 0
|
|
self stack: 0
|
|
global stack: 0
|
|
size:13.000000, time:9.250000
|
|
size:3.000000, time:2.000000, executed if:(not inlined)
|
|
calls:
|
|
Sys_GetCoreID/189 function body not available
|
|
loop depth: 0 freq:1.00 size: 2 time: 11
|
|
|
|
|
|
Analyzing function: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_16/128
|
|
;; 1 loops found
|
|
;;
|
|
;; Loop 0
|
|
;; header 0, latch 1
|
|
;; depth 0, outer -1
|
|
;; nodes: 0 1 2 3 4 5
|
|
;; 2 succs { 3 5 }
|
|
;; 3 succs { 4 5 }
|
|
;; 4 succs { 5 }
|
|
;; 5 succs { 1 }
|
|
|
|
Analyzing function body size: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_16
|
|
|
|
IPA function summary for SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_16/128 inlinable
|
|
global time: 21.750000
|
|
self size: 16
|
|
global size: 0
|
|
min size: 0
|
|
self stack: 0
|
|
global stack: 0
|
|
size:11.000000, time:8.750000
|
|
size:3.000000, time:2.000000, executed if:(not inlined)
|
|
calls:
|
|
Sys_GetCoreID/189 function body not available
|
|
loop depth: 0 freq:1.00 size: 2 time: 11
|
|
|
|
|
|
Analyzing function: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_16/127
|
|
;; 1 loops found
|
|
;;
|
|
;; Loop 0
|
|
;; header 0, latch 1
|
|
;; depth 0, outer -1
|
|
;; nodes: 0 1 2 3 4 5
|
|
;; 2 succs { 3 5 }
|
|
;; 3 succs { 4 5 }
|
|
;; 4 succs { 5 }
|
|
;; 5 succs { 1 }
|
|
|
|
Analyzing function body size: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_16
|
|
|
|
IPA function summary for SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_16/127 inlinable
|
|
global time: 22.250000
|
|
self size: 18
|
|
global size: 0
|
|
min size: 0
|
|
self stack: 0
|
|
global stack: 0
|
|
size:13.000000, time:9.250000
|
|
size:3.000000, time:2.000000, executed if:(not inlined)
|
|
calls:
|
|
Sys_GetCoreID/189 function body not available
|
|
loop depth: 0 freq:1.00 size: 2 time: 11
|
|
|
|
|
|
Analyzing function: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_15/126
|
|
;; 1 loops found
|
|
;;
|
|
;; Loop 0
|
|
;; header 0, latch 1
|
|
;; depth 0, outer -1
|
|
;; nodes: 0 1 2 3 4 5
|
|
;; 2 succs { 3 5 }
|
|
;; 3 succs { 4 5 }
|
|
;; 4 succs { 5 }
|
|
;; 5 succs { 1 }
|
|
|
|
Analyzing function body size: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_15
|
|
|
|
IPA function summary for SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_15/126 inlinable
|
|
global time: 21.750000
|
|
self size: 16
|
|
global size: 0
|
|
min size: 0
|
|
self stack: 0
|
|
global stack: 0
|
|
size:11.000000, time:8.750000
|
|
size:3.000000, time:2.000000, executed if:(not inlined)
|
|
calls:
|
|
Sys_GetCoreID/189 function body not available
|
|
loop depth: 0 freq:1.00 size: 2 time: 11
|
|
|
|
|
|
Analyzing function: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_15/125
|
|
;; 1 loops found
|
|
;;
|
|
;; Loop 0
|
|
;; header 0, latch 1
|
|
;; depth 0, outer -1
|
|
;; nodes: 0 1 2 3 4 5
|
|
;; 2 succs { 3 5 }
|
|
;; 3 succs { 4 5 }
|
|
;; 4 succs { 5 }
|
|
;; 5 succs { 1 }
|
|
|
|
Analyzing function body size: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_15
|
|
|
|
IPA function summary for SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_15/125 inlinable
|
|
global time: 22.250000
|
|
self size: 18
|
|
global size: 0
|
|
min size: 0
|
|
self stack: 0
|
|
global stack: 0
|
|
size:13.000000, time:9.250000
|
|
size:3.000000, time:2.000000, executed if:(not inlined)
|
|
calls:
|
|
Sys_GetCoreID/189 function body not available
|
|
loop depth: 0 freq:1.00 size: 2 time: 11
|
|
|
|
|
|
Analyzing function: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_14/124
|
|
;; 1 loops found
|
|
;;
|
|
;; Loop 0
|
|
;; header 0, latch 1
|
|
;; depth 0, outer -1
|
|
;; nodes: 0 1 2 3 4 5
|
|
;; 2 succs { 3 5 }
|
|
;; 3 succs { 4 5 }
|
|
;; 4 succs { 5 }
|
|
;; 5 succs { 1 }
|
|
|
|
Analyzing function body size: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_14
|
|
|
|
IPA function summary for SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_14/124 inlinable
|
|
global time: 21.750000
|
|
self size: 16
|
|
global size: 0
|
|
min size: 0
|
|
self stack: 0
|
|
global stack: 0
|
|
size:11.000000, time:8.750000
|
|
size:3.000000, time:2.000000, executed if:(not inlined)
|
|
calls:
|
|
Sys_GetCoreID/189 function body not available
|
|
loop depth: 0 freq:1.00 size: 2 time: 11
|
|
|
|
|
|
Analyzing function: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_14/123
|
|
;; 1 loops found
|
|
;;
|
|
;; Loop 0
|
|
;; header 0, latch 1
|
|
;; depth 0, outer -1
|
|
;; nodes: 0 1 2 3 4 5
|
|
;; 2 succs { 3 5 }
|
|
;; 3 succs { 4 5 }
|
|
;; 4 succs { 5 }
|
|
;; 5 succs { 1 }
|
|
|
|
Analyzing function body size: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_14
|
|
|
|
IPA function summary for SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_14/123 inlinable
|
|
global time: 22.250000
|
|
self size: 18
|
|
global size: 0
|
|
min size: 0
|
|
self stack: 0
|
|
global stack: 0
|
|
size:13.000000, time:9.250000
|
|
size:3.000000, time:2.000000, executed if:(not inlined)
|
|
calls:
|
|
Sys_GetCoreID/189 function body not available
|
|
loop depth: 0 freq:1.00 size: 2 time: 11
|
|
|
|
|
|
Analyzing function: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_13/122
|
|
;; 1 loops found
|
|
;;
|
|
;; Loop 0
|
|
;; header 0, latch 1
|
|
;; depth 0, outer -1
|
|
;; nodes: 0 1 2 3 4 5
|
|
;; 2 succs { 3 5 }
|
|
;; 3 succs { 4 5 }
|
|
;; 4 succs { 5 }
|
|
;; 5 succs { 1 }
|
|
|
|
Analyzing function body size: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_13
|
|
|
|
IPA function summary for SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_13/122 inlinable
|
|
global time: 21.750000
|
|
self size: 16
|
|
global size: 0
|
|
min size: 0
|
|
self stack: 0
|
|
global stack: 0
|
|
size:11.000000, time:8.750000
|
|
size:3.000000, time:2.000000, executed if:(not inlined)
|
|
calls:
|
|
Sys_GetCoreID/189 function body not available
|
|
loop depth: 0 freq:1.00 size: 2 time: 11
|
|
|
|
|
|
Analyzing function: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_13/121
|
|
;; 1 loops found
|
|
;;
|
|
;; Loop 0
|
|
;; header 0, latch 1
|
|
;; depth 0, outer -1
|
|
;; nodes: 0 1 2 3 4 5
|
|
;; 2 succs { 3 5 }
|
|
;; 3 succs { 4 5 }
|
|
;; 4 succs { 5 }
|
|
;; 5 succs { 1 }
|
|
|
|
Analyzing function body size: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_13
|
|
|
|
IPA function summary for SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_13/121 inlinable
|
|
global time: 22.250000
|
|
self size: 18
|
|
global size: 0
|
|
min size: 0
|
|
self stack: 0
|
|
global stack: 0
|
|
size:13.000000, time:9.250000
|
|
size:3.000000, time:2.000000, executed if:(not inlined)
|
|
calls:
|
|
Sys_GetCoreID/189 function body not available
|
|
loop depth: 0 freq:1.00 size: 2 time: 11
|
|
|
|
|
|
Analyzing function: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_12/120
|
|
;; 1 loops found
|
|
;;
|
|
;; Loop 0
|
|
;; header 0, latch 1
|
|
;; depth 0, outer -1
|
|
;; nodes: 0 1 2 3 4 5
|
|
;; 2 succs { 3 5 }
|
|
;; 3 succs { 4 5 }
|
|
;; 4 succs { 5 }
|
|
;; 5 succs { 1 }
|
|
|
|
Analyzing function body size: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_12
|
|
|
|
IPA function summary for SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_12/120 inlinable
|
|
global time: 21.750000
|
|
self size: 16
|
|
global size: 0
|
|
min size: 0
|
|
self stack: 0
|
|
global stack: 0
|
|
size:11.000000, time:8.750000
|
|
size:3.000000, time:2.000000, executed if:(not inlined)
|
|
calls:
|
|
Sys_GetCoreID/189 function body not available
|
|
loop depth: 0 freq:1.00 size: 2 time: 11
|
|
|
|
|
|
Analyzing function: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_12/119
|
|
;; 1 loops found
|
|
;;
|
|
;; Loop 0
|
|
;; header 0, latch 1
|
|
;; depth 0, outer -1
|
|
;; nodes: 0 1 2 3 4 5
|
|
;; 2 succs { 3 5 }
|
|
;; 3 succs { 4 5 }
|
|
;; 4 succs { 5 }
|
|
;; 5 succs { 1 }
|
|
|
|
Analyzing function body size: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_12
|
|
|
|
IPA function summary for SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_12/119 inlinable
|
|
global time: 22.250000
|
|
self size: 18
|
|
global size: 0
|
|
min size: 0
|
|
self stack: 0
|
|
global stack: 0
|
|
size:13.000000, time:9.250000
|
|
size:3.000000, time:2.000000, executed if:(not inlined)
|
|
calls:
|
|
Sys_GetCoreID/189 function body not available
|
|
loop depth: 0 freq:1.00 size: 2 time: 11
|
|
|
|
|
|
Analyzing function: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_11/118
|
|
;; 1 loops found
|
|
;;
|
|
;; Loop 0
|
|
;; header 0, latch 1
|
|
;; depth 0, outer -1
|
|
;; nodes: 0 1 2 3 4 5
|
|
;; 2 succs { 3 5 }
|
|
;; 3 succs { 4 5 }
|
|
;; 4 succs { 5 }
|
|
;; 5 succs { 1 }
|
|
|
|
Analyzing function body size: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_11
|
|
|
|
IPA function summary for SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_11/118 inlinable
|
|
global time: 21.750000
|
|
self size: 16
|
|
global size: 0
|
|
min size: 0
|
|
self stack: 0
|
|
global stack: 0
|
|
size:11.000000, time:8.750000
|
|
size:3.000000, time:2.000000, executed if:(not inlined)
|
|
calls:
|
|
Sys_GetCoreID/189 function body not available
|
|
loop depth: 0 freq:1.00 size: 2 time: 11
|
|
|
|
|
|
Analyzing function: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_11/117
|
|
;; 1 loops found
|
|
;;
|
|
;; Loop 0
|
|
;; header 0, latch 1
|
|
;; depth 0, outer -1
|
|
;; nodes: 0 1 2 3 4 5
|
|
;; 2 succs { 3 5 }
|
|
;; 3 succs { 4 5 }
|
|
;; 4 succs { 5 }
|
|
;; 5 succs { 1 }
|
|
|
|
Analyzing function body size: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_11
|
|
|
|
IPA function summary for SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_11/117 inlinable
|
|
global time: 22.250000
|
|
self size: 18
|
|
global size: 0
|
|
min size: 0
|
|
self stack: 0
|
|
global stack: 0
|
|
size:13.000000, time:9.250000
|
|
size:3.000000, time:2.000000, executed if:(not inlined)
|
|
calls:
|
|
Sys_GetCoreID/189 function body not available
|
|
loop depth: 0 freq:1.00 size: 2 time: 11
|
|
|
|
|
|
Analyzing function: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_10/116
|
|
;; 1 loops found
|
|
;;
|
|
;; Loop 0
|
|
;; header 0, latch 1
|
|
;; depth 0, outer -1
|
|
;; nodes: 0 1 2 3 4 5
|
|
;; 2 succs { 3 5 }
|
|
;; 3 succs { 4 5 }
|
|
;; 4 succs { 5 }
|
|
;; 5 succs { 1 }
|
|
|
|
Analyzing function body size: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_10
|
|
|
|
IPA function summary for SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_10/116 inlinable
|
|
global time: 21.750000
|
|
self size: 16
|
|
global size: 0
|
|
min size: 0
|
|
self stack: 0
|
|
global stack: 0
|
|
size:11.000000, time:8.750000
|
|
size:3.000000, time:2.000000, executed if:(not inlined)
|
|
calls:
|
|
Sys_GetCoreID/189 function body not available
|
|
loop depth: 0 freq:1.00 size: 2 time: 11
|
|
|
|
|
|
Analyzing function: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_10/115
|
|
;; 1 loops found
|
|
;;
|
|
;; Loop 0
|
|
;; header 0, latch 1
|
|
;; depth 0, outer -1
|
|
;; nodes: 0 1 2 3 4 5
|
|
;; 2 succs { 3 5 }
|
|
;; 3 succs { 4 5 }
|
|
;; 4 succs { 5 }
|
|
;; 5 succs { 1 }
|
|
|
|
Analyzing function body size: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_10
|
|
|
|
IPA function summary for SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_10/115 inlinable
|
|
global time: 22.250000
|
|
self size: 18
|
|
global size: 0
|
|
min size: 0
|
|
self stack: 0
|
|
global stack: 0
|
|
size:13.000000, time:9.250000
|
|
size:3.000000, time:2.000000, executed if:(not inlined)
|
|
calls:
|
|
Sys_GetCoreID/189 function body not available
|
|
loop depth: 0 freq:1.00 size: 2 time: 11
|
|
|
|
|
|
Analyzing function: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_09/114
|
|
;; 1 loops found
|
|
;;
|
|
;; Loop 0
|
|
;; header 0, latch 1
|
|
;; depth 0, outer -1
|
|
;; nodes: 0 1 2 3 4 5
|
|
;; 2 succs { 3 5 }
|
|
;; 3 succs { 4 5 }
|
|
;; 4 succs { 5 }
|
|
;; 5 succs { 1 }
|
|
|
|
Analyzing function body size: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_09
|
|
|
|
IPA function summary for SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_09/114 inlinable
|
|
global time: 21.750000
|
|
self size: 16
|
|
global size: 0
|
|
min size: 0
|
|
self stack: 0
|
|
global stack: 0
|
|
size:11.000000, time:8.750000
|
|
size:3.000000, time:2.000000, executed if:(not inlined)
|
|
calls:
|
|
Sys_GetCoreID/189 function body not available
|
|
loop depth: 0 freq:1.00 size: 2 time: 11
|
|
|
|
|
|
Analyzing function: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_09/113
|
|
;; 1 loops found
|
|
;;
|
|
;; Loop 0
|
|
;; header 0, latch 1
|
|
;; depth 0, outer -1
|
|
;; nodes: 0 1 2 3 4 5
|
|
;; 2 succs { 3 5 }
|
|
;; 3 succs { 4 5 }
|
|
;; 4 succs { 5 }
|
|
;; 5 succs { 1 }
|
|
|
|
Analyzing function body size: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_09
|
|
|
|
IPA function summary for SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_09/113 inlinable
|
|
global time: 22.250000
|
|
self size: 18
|
|
global size: 0
|
|
min size: 0
|
|
self stack: 0
|
|
global stack: 0
|
|
size:13.000000, time:9.250000
|
|
size:3.000000, time:2.000000, executed if:(not inlined)
|
|
calls:
|
|
Sys_GetCoreID/189 function body not available
|
|
loop depth: 0 freq:1.00 size: 2 time: 11
|
|
|
|
|
|
Analyzing function: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_08/112
|
|
;; 1 loops found
|
|
;;
|
|
;; Loop 0
|
|
;; header 0, latch 1
|
|
;; depth 0, outer -1
|
|
;; nodes: 0 1 2 3 4 5
|
|
;; 2 succs { 3 5 }
|
|
;; 3 succs { 4 5 }
|
|
;; 4 succs { 5 }
|
|
;; 5 succs { 1 }
|
|
|
|
Analyzing function body size: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_08
|
|
|
|
IPA function summary for SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_08/112 inlinable
|
|
global time: 21.750000
|
|
self size: 16
|
|
global size: 0
|
|
min size: 0
|
|
self stack: 0
|
|
global stack: 0
|
|
size:11.000000, time:8.750000
|
|
size:3.000000, time:2.000000, executed if:(not inlined)
|
|
calls:
|
|
Sys_GetCoreID/189 function body not available
|
|
loop depth: 0 freq:1.00 size: 2 time: 11
|
|
|
|
|
|
Analyzing function: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_08/111
|
|
;; 1 loops found
|
|
;;
|
|
;; Loop 0
|
|
;; header 0, latch 1
|
|
;; depth 0, outer -1
|
|
;; nodes: 0 1 2 3 4 5
|
|
;; 2 succs { 3 5 }
|
|
;; 3 succs { 4 5 }
|
|
;; 4 succs { 5 }
|
|
;; 5 succs { 1 }
|
|
|
|
Analyzing function body size: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_08
|
|
|
|
IPA function summary for SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_08/111 inlinable
|
|
global time: 22.250000
|
|
self size: 18
|
|
global size: 0
|
|
min size: 0
|
|
self stack: 0
|
|
global stack: 0
|
|
size:13.000000, time:9.250000
|
|
size:3.000000, time:2.000000, executed if:(not inlined)
|
|
calls:
|
|
Sys_GetCoreID/189 function body not available
|
|
loop depth: 0 freq:1.00 size: 2 time: 11
|
|
|
|
|
|
Analyzing function: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_07/110
|
|
;; 1 loops found
|
|
;;
|
|
;; Loop 0
|
|
;; header 0, latch 1
|
|
;; depth 0, outer -1
|
|
;; nodes: 0 1 2 3 4 5
|
|
;; 2 succs { 3 5 }
|
|
;; 3 succs { 4 5 }
|
|
;; 4 succs { 5 }
|
|
;; 5 succs { 1 }
|
|
|
|
Analyzing function body size: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_07
|
|
|
|
IPA function summary for SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_07/110 inlinable
|
|
global time: 21.750000
|
|
self size: 16
|
|
global size: 0
|
|
min size: 0
|
|
self stack: 0
|
|
global stack: 0
|
|
size:11.000000, time:8.750000
|
|
size:3.000000, time:2.000000, executed if:(not inlined)
|
|
calls:
|
|
Sys_GetCoreID/189 function body not available
|
|
loop depth: 0 freq:1.00 size: 2 time: 11
|
|
|
|
|
|
Analyzing function: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_07/109
|
|
;; 1 loops found
|
|
;;
|
|
;; Loop 0
|
|
;; header 0, latch 1
|
|
;; depth 0, outer -1
|
|
;; nodes: 0 1 2 3 4 5
|
|
;; 2 succs { 3 5 }
|
|
;; 3 succs { 4 5 }
|
|
;; 4 succs { 5 }
|
|
;; 5 succs { 1 }
|
|
|
|
Analyzing function body size: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_07
|
|
|
|
IPA function summary for SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_07/109 inlinable
|
|
global time: 22.250000
|
|
self size: 18
|
|
global size: 0
|
|
min size: 0
|
|
self stack: 0
|
|
global stack: 0
|
|
size:13.000000, time:9.250000
|
|
size:3.000000, time:2.000000, executed if:(not inlined)
|
|
calls:
|
|
Sys_GetCoreID/189 function body not available
|
|
loop depth: 0 freq:1.00 size: 2 time: 11
|
|
|
|
|
|
Analyzing function: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_06/108
|
|
;; 1 loops found
|
|
;;
|
|
;; Loop 0
|
|
;; header 0, latch 1
|
|
;; depth 0, outer -1
|
|
;; nodes: 0 1 2 3 4 5
|
|
;; 2 succs { 3 5 }
|
|
;; 3 succs { 4 5 }
|
|
;; 4 succs { 5 }
|
|
;; 5 succs { 1 }
|
|
|
|
Analyzing function body size: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_06
|
|
|
|
IPA function summary for SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_06/108 inlinable
|
|
global time: 21.750000
|
|
self size: 16
|
|
global size: 0
|
|
min size: 0
|
|
self stack: 0
|
|
global stack: 0
|
|
size:11.000000, time:8.750000
|
|
size:3.000000, time:2.000000, executed if:(not inlined)
|
|
calls:
|
|
Sys_GetCoreID/189 function body not available
|
|
loop depth: 0 freq:1.00 size: 2 time: 11
|
|
|
|
|
|
Analyzing function: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_06/107
|
|
;; 1 loops found
|
|
;;
|
|
;; Loop 0
|
|
;; header 0, latch 1
|
|
;; depth 0, outer -1
|
|
;; nodes: 0 1 2 3 4 5
|
|
;; 2 succs { 3 5 }
|
|
;; 3 succs { 4 5 }
|
|
;; 4 succs { 5 }
|
|
;; 5 succs { 1 }
|
|
|
|
Analyzing function body size: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_06
|
|
|
|
IPA function summary for SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_06/107 inlinable
|
|
global time: 22.250000
|
|
self size: 18
|
|
global size: 0
|
|
min size: 0
|
|
self stack: 0
|
|
global stack: 0
|
|
size:13.000000, time:9.250000
|
|
size:3.000000, time:2.000000, executed if:(not inlined)
|
|
calls:
|
|
Sys_GetCoreID/189 function body not available
|
|
loop depth: 0 freq:1.00 size: 2 time: 11
|
|
|
|
|
|
Analyzing function: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_05/106
|
|
;; 1 loops found
|
|
;;
|
|
;; Loop 0
|
|
;; header 0, latch 1
|
|
;; depth 0, outer -1
|
|
;; nodes: 0 1 2 3 4 5
|
|
;; 2 succs { 3 5 }
|
|
;; 3 succs { 4 5 }
|
|
;; 4 succs { 5 }
|
|
;; 5 succs { 1 }
|
|
|
|
Analyzing function body size: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_05
|
|
|
|
IPA function summary for SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_05/106 inlinable
|
|
global time: 21.750000
|
|
self size: 16
|
|
global size: 0
|
|
min size: 0
|
|
self stack: 0
|
|
global stack: 0
|
|
size:11.000000, time:8.750000
|
|
size:3.000000, time:2.000000, executed if:(not inlined)
|
|
calls:
|
|
Sys_GetCoreID/189 function body not available
|
|
loop depth: 0 freq:1.00 size: 2 time: 11
|
|
|
|
|
|
Analyzing function: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_05/105
|
|
;; 1 loops found
|
|
;;
|
|
;; Loop 0
|
|
;; header 0, latch 1
|
|
;; depth 0, outer -1
|
|
;; nodes: 0 1 2 3 4 5
|
|
;; 2 succs { 3 5 }
|
|
;; 3 succs { 4 5 }
|
|
;; 4 succs { 5 }
|
|
;; 5 succs { 1 }
|
|
|
|
Analyzing function body size: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_05
|
|
|
|
IPA function summary for SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_05/105 inlinable
|
|
global time: 22.250000
|
|
self size: 18
|
|
global size: 0
|
|
min size: 0
|
|
self stack: 0
|
|
global stack: 0
|
|
size:13.000000, time:9.250000
|
|
size:3.000000, time:2.000000, executed if:(not inlined)
|
|
calls:
|
|
Sys_GetCoreID/189 function body not available
|
|
loop depth: 0 freq:1.00 size: 2 time: 11
|
|
|
|
|
|
Analyzing function: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_04/104
|
|
;; 1 loops found
|
|
;;
|
|
;; Loop 0
|
|
;; header 0, latch 1
|
|
;; depth 0, outer -1
|
|
;; nodes: 0 1 2 3 4 5
|
|
;; 2 succs { 3 5 }
|
|
;; 3 succs { 4 5 }
|
|
;; 4 succs { 5 }
|
|
;; 5 succs { 1 }
|
|
|
|
Analyzing function body size: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_04
|
|
|
|
IPA function summary for SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_04/104 inlinable
|
|
global time: 21.750000
|
|
self size: 16
|
|
global size: 0
|
|
min size: 0
|
|
self stack: 0
|
|
global stack: 0
|
|
size:11.000000, time:8.750000
|
|
size:3.000000, time:2.000000, executed if:(not inlined)
|
|
calls:
|
|
Sys_GetCoreID/189 function body not available
|
|
loop depth: 0 freq:1.00 size: 2 time: 11
|
|
|
|
|
|
Analyzing function: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_04/103
|
|
;; 1 loops found
|
|
;;
|
|
;; Loop 0
|
|
;; header 0, latch 1
|
|
;; depth 0, outer -1
|
|
;; nodes: 0 1 2 3 4 5
|
|
;; 2 succs { 3 5 }
|
|
;; 3 succs { 4 5 }
|
|
;; 4 succs { 5 }
|
|
;; 5 succs { 1 }
|
|
|
|
Analyzing function body size: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_04
|
|
|
|
IPA function summary for SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_04/103 inlinable
|
|
global time: 22.250000
|
|
self size: 18
|
|
global size: 0
|
|
min size: 0
|
|
self stack: 0
|
|
global stack: 0
|
|
size:13.000000, time:9.250000
|
|
size:3.000000, time:2.000000, executed if:(not inlined)
|
|
calls:
|
|
Sys_GetCoreID/189 function body not available
|
|
loop depth: 0 freq:1.00 size: 2 time: 11
|
|
|
|
|
|
Analyzing function: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_03/102
|
|
;; 1 loops found
|
|
;;
|
|
;; Loop 0
|
|
;; header 0, latch 1
|
|
;; depth 0, outer -1
|
|
;; nodes: 0 1 2 3 4 5
|
|
;; 2 succs { 3 5 }
|
|
;; 3 succs { 4 5 }
|
|
;; 4 succs { 5 }
|
|
;; 5 succs { 1 }
|
|
|
|
Analyzing function body size: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_03
|
|
|
|
IPA function summary for SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_03/102 inlinable
|
|
global time: 21.750000
|
|
self size: 16
|
|
global size: 0
|
|
min size: 0
|
|
self stack: 0
|
|
global stack: 0
|
|
size:11.000000, time:8.750000
|
|
size:3.000000, time:2.000000, executed if:(not inlined)
|
|
calls:
|
|
Sys_GetCoreID/189 function body not available
|
|
loop depth: 0 freq:1.00 size: 2 time: 11
|
|
|
|
|
|
Analyzing function: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_03/101
|
|
;; 1 loops found
|
|
;;
|
|
;; Loop 0
|
|
;; header 0, latch 1
|
|
;; depth 0, outer -1
|
|
;; nodes: 0 1 2 3 4 5
|
|
;; 2 succs { 3 5 }
|
|
;; 3 succs { 4 5 }
|
|
;; 4 succs { 5 }
|
|
;; 5 succs { 1 }
|
|
|
|
Analyzing function body size: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_03
|
|
|
|
IPA function summary for SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_03/101 inlinable
|
|
global time: 22.250000
|
|
self size: 18
|
|
global size: 0
|
|
min size: 0
|
|
self stack: 0
|
|
global stack: 0
|
|
size:13.000000, time:9.250000
|
|
size:3.000000, time:2.000000, executed if:(not inlined)
|
|
calls:
|
|
Sys_GetCoreID/189 function body not available
|
|
loop depth: 0 freq:1.00 size: 2 time: 11
|
|
|
|
|
|
Analyzing function: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_02/100
|
|
;; 1 loops found
|
|
;;
|
|
;; Loop 0
|
|
;; header 0, latch 1
|
|
;; depth 0, outer -1
|
|
;; nodes: 0 1 2 3 4 5
|
|
;; 2 succs { 3 5 }
|
|
;; 3 succs { 4 5 }
|
|
;; 4 succs { 5 }
|
|
;; 5 succs { 1 }
|
|
|
|
Analyzing function body size: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_02
|
|
|
|
IPA function summary for SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_02/100 inlinable
|
|
global time: 21.750000
|
|
self size: 16
|
|
global size: 0
|
|
min size: 0
|
|
self stack: 0
|
|
global stack: 0
|
|
size:11.000000, time:8.750000
|
|
size:3.000000, time:2.000000, executed if:(not inlined)
|
|
calls:
|
|
Sys_GetCoreID/189 function body not available
|
|
loop depth: 0 freq:1.00 size: 2 time: 11
|
|
|
|
|
|
Analyzing function: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_02/99
|
|
;; 1 loops found
|
|
;;
|
|
;; Loop 0
|
|
;; header 0, latch 1
|
|
;; depth 0, outer -1
|
|
;; nodes: 0 1 2 3 4 5
|
|
;; 2 succs { 3 5 }
|
|
;; 3 succs { 4 5 }
|
|
;; 4 succs { 5 }
|
|
;; 5 succs { 1 }
|
|
|
|
Analyzing function body size: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_02
|
|
|
|
IPA function summary for SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_02/99 inlinable
|
|
global time: 22.250000
|
|
self size: 18
|
|
global size: 0
|
|
min size: 0
|
|
self stack: 0
|
|
global stack: 0
|
|
size:13.000000, time:9.250000
|
|
size:3.000000, time:2.000000, executed if:(not inlined)
|
|
calls:
|
|
Sys_GetCoreID/189 function body not available
|
|
loop depth: 0 freq:1.00 size: 2 time: 11
|
|
|
|
|
|
Analyzing function: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_01/98
|
|
;; 1 loops found
|
|
;;
|
|
;; Loop 0
|
|
;; header 0, latch 1
|
|
;; depth 0, outer -1
|
|
;; nodes: 0 1 2 3 4 5
|
|
;; 2 succs { 3 5 }
|
|
;; 3 succs { 4 5 }
|
|
;; 4 succs { 5 }
|
|
;; 5 succs { 1 }
|
|
|
|
Analyzing function body size: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_01
|
|
|
|
IPA function summary for SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_01/98 inlinable
|
|
global time: 21.750000
|
|
self size: 16
|
|
global size: 0
|
|
min size: 0
|
|
self stack: 0
|
|
global stack: 0
|
|
size:11.000000, time:8.750000
|
|
size:3.000000, time:2.000000, executed if:(not inlined)
|
|
calls:
|
|
Sys_GetCoreID/189 function body not available
|
|
loop depth: 0 freq:1.00 size: 2 time: 11
|
|
|
|
|
|
Analyzing function: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_01/97
|
|
;; 1 loops found
|
|
;;
|
|
;; Loop 0
|
|
;; header 0, latch 1
|
|
;; depth 0, outer -1
|
|
;; nodes: 0 1 2 3 4 5
|
|
;; 2 succs { 3 5 }
|
|
;; 3 succs { 4 5 }
|
|
;; 4 succs { 5 }
|
|
;; 5 succs { 1 }
|
|
|
|
Analyzing function body size: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_01
|
|
|
|
IPA function summary for SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_01/97 inlinable
|
|
global time: 22.250000
|
|
self size: 18
|
|
global size: 0
|
|
min size: 0
|
|
self stack: 0
|
|
global stack: 0
|
|
size:13.000000, time:9.250000
|
|
size:3.000000, time:2.000000, executed if:(not inlined)
|
|
calls:
|
|
Sys_GetCoreID/189 function body not available
|
|
loop depth: 0 freq:1.00 size: 2 time: 11
|
|
|
|
|
|
Analyzing function: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_00/96
|
|
;; 1 loops found
|
|
;;
|
|
;; Loop 0
|
|
;; header 0, latch 1
|
|
;; depth 0, outer -1
|
|
;; nodes: 0 1 2 3 4 5
|
|
;; 2 succs { 3 5 }
|
|
;; 3 succs { 4 5 }
|
|
;; 4 succs { 5 }
|
|
;; 5 succs { 1 }
|
|
|
|
Analyzing function body size: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_00
|
|
|
|
IPA function summary for SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_00/96 inlinable
|
|
global time: 21.750000
|
|
self size: 16
|
|
global size: 0
|
|
min size: 0
|
|
self stack: 0
|
|
global stack: 0
|
|
size:11.000000, time:8.750000
|
|
size:3.000000, time:2.000000, executed if:(not inlined)
|
|
calls:
|
|
Sys_GetCoreID/189 function body not available
|
|
loop depth: 0 freq:1.00 size: 2 time: 11
|
|
|
|
|
|
Analyzing function: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_00/95
|
|
;; 1 loops found
|
|
;;
|
|
;; Loop 0
|
|
;; header 0, latch 1
|
|
;; depth 0, outer -1
|
|
;; nodes: 0 1 2 3 4 5
|
|
;; 2 succs { 3 5 }
|
|
;; 3 succs { 4 5 }
|
|
;; 4 succs { 5 }
|
|
;; 5 succs { 1 }
|
|
|
|
Analyzing function body size: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_00
|
|
|
|
IPA function summary for SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_00/95 inlinable
|
|
global time: 22.250000
|
|
self size: 18
|
|
global size: 0
|
|
min size: 0
|
|
self stack: 0
|
|
global stack: 0
|
|
size:13.000000, time:9.250000
|
|
size:3.000000, time:2.000000, executed if:(not inlined)
|
|
calls:
|
|
Sys_GetCoreID/189 function body not available
|
|
loop depth: 0 freq:1.00 size: 2 time: 11
|
|
|
|
|
|
Analyzing function: Mcl_schm_read_msr/94
|
|
;; 1 loops found
|
|
;;
|
|
;; Loop 0
|
|
;; header 0, latch 1
|
|
;; depth 0, outer -1
|
|
;; nodes: 0 1 2
|
|
;; 2 succs { 1 }
|
|
|
|
Analyzing function body size: Mcl_schm_read_msr
|
|
|
|
IPA function summary for Mcl_schm_read_msr/94 inlinable
|
|
global time: 3.000000
|
|
self size: 4
|
|
global size: 0
|
|
min size: 0
|
|
self stack: 0
|
|
global stack: 0
|
|
size:1.000000, time:1.000000
|
|
size:3.000000, time:2.000000, executed if:(not inlined)
|
|
calls:
|
|
|
|
Symbol table:
|
|
|
|
Sys_GetCoreID/189 (Sys_GetCoreID) @06a551c0
|
|
Type: function
|
|
Visibility: external public
|
|
References:
|
|
Referring:
|
|
Availability: not_available
|
|
Function flags: optimize_size
|
|
Called by: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_46/188 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_46/187 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_45/186 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_45/185 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_44/184 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_44/183 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_43/182 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_43/181 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_42/180 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_42/179 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_41/178 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_41/177 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_40/176 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_40/175 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_39/174 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_39/173 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_38/172 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_38/171 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_37/170 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_37/169 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_36/168 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_36/167 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_35/166 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_35/165 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_34/164 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_34/163 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_33/162 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_33/161 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_32/160 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_32/159 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_31/158 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_31/157 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_30/156 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_30/155 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_29/154 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_29/153 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_28/152 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_28/151 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_27/150 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_27/149 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_26/148 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_26/147 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_25/146 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_25/145 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_24/144 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_24/143 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_23/142 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_23/141 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_22/140 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_22/139 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_21/138 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_21/137 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_20/136 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_20/135 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_19/134 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_19/133 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_18/132 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_18/131 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_17/130 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_17/129 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_16/128 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_16/127 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_15/126 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_15/125 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_14/124 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_14/123 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_13/122 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_13/121 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_12/120 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_12/119 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_11/118 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_11/117 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_10/116 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_10/115 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_09/114 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_09/113 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_08/112 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_08/111 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_07/110 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_07/109 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_06/108 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_06/107 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_05/106 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_05/105 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_04/104 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_04/103 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_03/102 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_03/101 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_02/100 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_02/99 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_01/98 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_01/97 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_00/96 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_00/95 (1073741824 (estimated locally),1.00 per call)
|
|
Calls:
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_46/188 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_46) @06a4d620
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_46/93 (read)reentry_guard_MCL_EXCLUSIVE_AREA_46/93 (write)msr_MCL_EXCLUSIVE_AREA_46/92 (read)reentry_guard_MCL_EXCLUSIVE_AREA_46/93 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_46/187 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_46) @06a4d0e0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_46/93 (read)msr_MCL_EXCLUSIVE_AREA_46/92 (write)msr_MCL_EXCLUSIVE_AREA_46/92 (read)reentry_guard_MCL_EXCLUSIVE_AREA_46/93 (read)reentry_guard_MCL_EXCLUSIVE_AREA_46/93 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_45/186 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_45) @06a4dd20
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_45/91 (read)reentry_guard_MCL_EXCLUSIVE_AREA_45/91 (write)msr_MCL_EXCLUSIVE_AREA_45/90 (read)reentry_guard_MCL_EXCLUSIVE_AREA_45/91 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_45/185 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_45) @06a4da80
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_45/91 (read)msr_MCL_EXCLUSIVE_AREA_45/90 (write)msr_MCL_EXCLUSIVE_AREA_45/90 (read)reentry_guard_MCL_EXCLUSIVE_AREA_45/91 (read)reentry_guard_MCL_EXCLUSIVE_AREA_45/91 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_44/184 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_44) @06a4d7e0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_44/89 (read)reentry_guard_MCL_EXCLUSIVE_AREA_44/89 (write)msr_MCL_EXCLUSIVE_AREA_44/88 (read)reentry_guard_MCL_EXCLUSIVE_AREA_44/89 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_44/183 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_44) @06a4d540
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_44/89 (read)msr_MCL_EXCLUSIVE_AREA_44/88 (write)msr_MCL_EXCLUSIVE_AREA_44/88 (read)reentry_guard_MCL_EXCLUSIVE_AREA_44/89 (read)reentry_guard_MCL_EXCLUSIVE_AREA_44/89 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_43/182 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_43) @06a4d2a0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_43/87 (read)reentry_guard_MCL_EXCLUSIVE_AREA_43/87 (write)msr_MCL_EXCLUSIVE_AREA_43/86 (read)reentry_guard_MCL_EXCLUSIVE_AREA_43/87 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_43/181 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_43) @06a4d000
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_43/87 (read)msr_MCL_EXCLUSIVE_AREA_43/86 (write)msr_MCL_EXCLUSIVE_AREA_43/86 (read)reentry_guard_MCL_EXCLUSIVE_AREA_43/87 (read)reentry_guard_MCL_EXCLUSIVE_AREA_43/87 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_42/180 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_42) @06a46b60
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_42/85 (read)reentry_guard_MCL_EXCLUSIVE_AREA_42/85 (write)msr_MCL_EXCLUSIVE_AREA_42/84 (read)reentry_guard_MCL_EXCLUSIVE_AREA_42/85 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_42/179 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_42) @06a46620
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_42/85 (read)msr_MCL_EXCLUSIVE_AREA_42/84 (write)msr_MCL_EXCLUSIVE_AREA_42/84 (read)reentry_guard_MCL_EXCLUSIVE_AREA_42/85 (read)reentry_guard_MCL_EXCLUSIVE_AREA_42/85 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_41/178 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_41) @06a460e0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_41/83 (read)reentry_guard_MCL_EXCLUSIVE_AREA_41/83 (write)msr_MCL_EXCLUSIVE_AREA_41/82 (read)reentry_guard_MCL_EXCLUSIVE_AREA_41/83 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_41/177 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_41) @06a46d20
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_41/83 (read)msr_MCL_EXCLUSIVE_AREA_41/82 (write)msr_MCL_EXCLUSIVE_AREA_41/82 (read)reentry_guard_MCL_EXCLUSIVE_AREA_41/83 (read)reentry_guard_MCL_EXCLUSIVE_AREA_41/83 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_40/176 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_40) @06a46a80
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_40/81 (read)reentry_guard_MCL_EXCLUSIVE_AREA_40/81 (write)msr_MCL_EXCLUSIVE_AREA_40/80 (read)reentry_guard_MCL_EXCLUSIVE_AREA_40/81 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_40/175 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_40) @06a467e0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_40/81 (read)msr_MCL_EXCLUSIVE_AREA_40/80 (write)msr_MCL_EXCLUSIVE_AREA_40/80 (read)reentry_guard_MCL_EXCLUSIVE_AREA_40/81 (read)reentry_guard_MCL_EXCLUSIVE_AREA_40/81 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_39/174 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_39) @06a46540
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_39/79 (read)reentry_guard_MCL_EXCLUSIVE_AREA_39/79 (write)msr_MCL_EXCLUSIVE_AREA_39/78 (read)reentry_guard_MCL_EXCLUSIVE_AREA_39/79 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_39/173 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_39) @06a462a0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_39/79 (read)msr_MCL_EXCLUSIVE_AREA_39/78 (write)msr_MCL_EXCLUSIVE_AREA_39/78 (read)reentry_guard_MCL_EXCLUSIVE_AREA_39/79 (read)reentry_guard_MCL_EXCLUSIVE_AREA_39/79 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_38/172 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_38) @06a46000
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_38/77 (read)reentry_guard_MCL_EXCLUSIVE_AREA_38/77 (write)msr_MCL_EXCLUSIVE_AREA_38/76 (read)reentry_guard_MCL_EXCLUSIVE_AREA_38/77 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_38/171 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_38) @06a3fb60
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_38/77 (read)msr_MCL_EXCLUSIVE_AREA_38/76 (write)msr_MCL_EXCLUSIVE_AREA_38/76 (read)reentry_guard_MCL_EXCLUSIVE_AREA_38/77 (read)reentry_guard_MCL_EXCLUSIVE_AREA_38/77 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_37/170 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_37) @06a3f620
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_37/75 (read)reentry_guard_MCL_EXCLUSIVE_AREA_37/75 (write)msr_MCL_EXCLUSIVE_AREA_37/74 (read)reentry_guard_MCL_EXCLUSIVE_AREA_37/75 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_37/169 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_37) @06a3f0e0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_37/75 (read)msr_MCL_EXCLUSIVE_AREA_37/74 (write)msr_MCL_EXCLUSIVE_AREA_37/74 (read)reentry_guard_MCL_EXCLUSIVE_AREA_37/75 (read)reentry_guard_MCL_EXCLUSIVE_AREA_37/75 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_36/168 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_36) @06a3fd20
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_36/73 (read)reentry_guard_MCL_EXCLUSIVE_AREA_36/73 (write)msr_MCL_EXCLUSIVE_AREA_36/72 (read)reentry_guard_MCL_EXCLUSIVE_AREA_36/73 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_36/167 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_36) @06a3fa80
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_36/73 (read)msr_MCL_EXCLUSIVE_AREA_36/72 (write)msr_MCL_EXCLUSIVE_AREA_36/72 (read)reentry_guard_MCL_EXCLUSIVE_AREA_36/73 (read)reentry_guard_MCL_EXCLUSIVE_AREA_36/73 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_35/166 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_35) @06a3f7e0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_35/71 (read)reentry_guard_MCL_EXCLUSIVE_AREA_35/71 (write)msr_MCL_EXCLUSIVE_AREA_35/70 (read)reentry_guard_MCL_EXCLUSIVE_AREA_35/71 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_35/165 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_35) @06a3f540
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_35/71 (read)msr_MCL_EXCLUSIVE_AREA_35/70 (write)msr_MCL_EXCLUSIVE_AREA_35/70 (read)reentry_guard_MCL_EXCLUSIVE_AREA_35/71 (read)reentry_guard_MCL_EXCLUSIVE_AREA_35/71 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_34/164 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_34) @06a3f2a0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_34/69 (read)reentry_guard_MCL_EXCLUSIVE_AREA_34/69 (write)msr_MCL_EXCLUSIVE_AREA_34/68 (read)reentry_guard_MCL_EXCLUSIVE_AREA_34/69 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_34/163 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_34) @06a3f000
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_34/69 (read)msr_MCL_EXCLUSIVE_AREA_34/68 (write)msr_MCL_EXCLUSIVE_AREA_34/68 (read)reentry_guard_MCL_EXCLUSIVE_AREA_34/69 (read)reentry_guard_MCL_EXCLUSIVE_AREA_34/69 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_33/162 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_33) @06a38b60
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_33/67 (read)reentry_guard_MCL_EXCLUSIVE_AREA_33/67 (write)msr_MCL_EXCLUSIVE_AREA_33/66 (read)reentry_guard_MCL_EXCLUSIVE_AREA_33/67 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_33/161 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_33) @06a38620
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_33/67 (read)msr_MCL_EXCLUSIVE_AREA_33/66 (write)msr_MCL_EXCLUSIVE_AREA_33/66 (read)reentry_guard_MCL_EXCLUSIVE_AREA_33/67 (read)reentry_guard_MCL_EXCLUSIVE_AREA_33/67 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_32/160 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_32) @06a380e0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_32/65 (read)reentry_guard_MCL_EXCLUSIVE_AREA_32/65 (write)msr_MCL_EXCLUSIVE_AREA_32/64 (read)reentry_guard_MCL_EXCLUSIVE_AREA_32/65 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_32/159 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_32) @06a38d20
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_32/65 (read)msr_MCL_EXCLUSIVE_AREA_32/64 (write)msr_MCL_EXCLUSIVE_AREA_32/64 (read)reentry_guard_MCL_EXCLUSIVE_AREA_32/65 (read)reentry_guard_MCL_EXCLUSIVE_AREA_32/65 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_31/158 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_31) @06a38a80
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_31/63 (read)reentry_guard_MCL_EXCLUSIVE_AREA_31/63 (write)msr_MCL_EXCLUSIVE_AREA_31/62 (read)reentry_guard_MCL_EXCLUSIVE_AREA_31/63 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_31/157 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_31) @06a387e0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_31/63 (read)msr_MCL_EXCLUSIVE_AREA_31/62 (write)msr_MCL_EXCLUSIVE_AREA_31/62 (read)reentry_guard_MCL_EXCLUSIVE_AREA_31/63 (read)reentry_guard_MCL_EXCLUSIVE_AREA_31/63 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_30/156 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_30) @06a38540
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_30/61 (read)reentry_guard_MCL_EXCLUSIVE_AREA_30/61 (write)msr_MCL_EXCLUSIVE_AREA_30/60 (read)reentry_guard_MCL_EXCLUSIVE_AREA_30/61 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_30/155 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_30) @06a382a0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_30/61 (read)msr_MCL_EXCLUSIVE_AREA_30/60 (write)msr_MCL_EXCLUSIVE_AREA_30/60 (read)reentry_guard_MCL_EXCLUSIVE_AREA_30/61 (read)reentry_guard_MCL_EXCLUSIVE_AREA_30/61 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_29/154 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_29) @06a38000
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_29/59 (read)reentry_guard_MCL_EXCLUSIVE_AREA_29/59 (write)msr_MCL_EXCLUSIVE_AREA_29/58 (read)reentry_guard_MCL_EXCLUSIVE_AREA_29/59 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_29/153 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_29) @06a2db60
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_29/59 (read)msr_MCL_EXCLUSIVE_AREA_29/58 (write)msr_MCL_EXCLUSIVE_AREA_29/58 (read)reentry_guard_MCL_EXCLUSIVE_AREA_29/59 (read)reentry_guard_MCL_EXCLUSIVE_AREA_29/59 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_28/152 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_28) @06a2d620
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_28/57 (read)reentry_guard_MCL_EXCLUSIVE_AREA_28/57 (write)msr_MCL_EXCLUSIVE_AREA_28/56 (read)reentry_guard_MCL_EXCLUSIVE_AREA_28/57 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_28/151 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_28) @06a2d0e0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_28/57 (read)msr_MCL_EXCLUSIVE_AREA_28/56 (write)msr_MCL_EXCLUSIVE_AREA_28/56 (read)reentry_guard_MCL_EXCLUSIVE_AREA_28/57 (read)reentry_guard_MCL_EXCLUSIVE_AREA_28/57 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_27/150 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_27) @06a2dd20
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_27/55 (read)reentry_guard_MCL_EXCLUSIVE_AREA_27/55 (write)msr_MCL_EXCLUSIVE_AREA_27/54 (read)reentry_guard_MCL_EXCLUSIVE_AREA_27/55 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_27/149 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_27) @06a2da80
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_27/55 (read)msr_MCL_EXCLUSIVE_AREA_27/54 (write)msr_MCL_EXCLUSIVE_AREA_27/54 (read)reentry_guard_MCL_EXCLUSIVE_AREA_27/55 (read)reentry_guard_MCL_EXCLUSIVE_AREA_27/55 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_26/148 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_26) @06a2d7e0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_26/53 (read)reentry_guard_MCL_EXCLUSIVE_AREA_26/53 (write)msr_MCL_EXCLUSIVE_AREA_26/52 (read)reentry_guard_MCL_EXCLUSIVE_AREA_26/53 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_26/147 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_26) @06a2d540
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_26/53 (read)msr_MCL_EXCLUSIVE_AREA_26/52 (write)msr_MCL_EXCLUSIVE_AREA_26/52 (read)reentry_guard_MCL_EXCLUSIVE_AREA_26/53 (read)reentry_guard_MCL_EXCLUSIVE_AREA_26/53 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_25/146 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_25) @06a2d2a0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_25/51 (read)reentry_guard_MCL_EXCLUSIVE_AREA_25/51 (write)msr_MCL_EXCLUSIVE_AREA_25/50 (read)reentry_guard_MCL_EXCLUSIVE_AREA_25/51 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_25/145 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_25) @06a2d000
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_25/51 (read)msr_MCL_EXCLUSIVE_AREA_25/50 (write)msr_MCL_EXCLUSIVE_AREA_25/50 (read)reentry_guard_MCL_EXCLUSIVE_AREA_25/51 (read)reentry_guard_MCL_EXCLUSIVE_AREA_25/51 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_24/144 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_24) @06a26b60
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_24/49 (read)reentry_guard_MCL_EXCLUSIVE_AREA_24/49 (write)msr_MCL_EXCLUSIVE_AREA_24/48 (read)reentry_guard_MCL_EXCLUSIVE_AREA_24/49 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_24/143 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_24) @06a26620
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_24/49 (read)msr_MCL_EXCLUSIVE_AREA_24/48 (write)msr_MCL_EXCLUSIVE_AREA_24/48 (read)reentry_guard_MCL_EXCLUSIVE_AREA_24/49 (read)reentry_guard_MCL_EXCLUSIVE_AREA_24/49 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_23/142 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_23) @06a260e0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_23/47 (read)reentry_guard_MCL_EXCLUSIVE_AREA_23/47 (write)msr_MCL_EXCLUSIVE_AREA_23/46 (read)reentry_guard_MCL_EXCLUSIVE_AREA_23/47 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_23/141 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_23) @06a26d20
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_23/47 (read)msr_MCL_EXCLUSIVE_AREA_23/46 (write)msr_MCL_EXCLUSIVE_AREA_23/46 (read)reentry_guard_MCL_EXCLUSIVE_AREA_23/47 (read)reentry_guard_MCL_EXCLUSIVE_AREA_23/47 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_22/140 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_22) @06a26a80
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_22/45 (read)reentry_guard_MCL_EXCLUSIVE_AREA_22/45 (write)msr_MCL_EXCLUSIVE_AREA_22/44 (read)reentry_guard_MCL_EXCLUSIVE_AREA_22/45 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_22/139 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_22) @06a267e0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_22/45 (read)msr_MCL_EXCLUSIVE_AREA_22/44 (write)msr_MCL_EXCLUSIVE_AREA_22/44 (read)reentry_guard_MCL_EXCLUSIVE_AREA_22/45 (read)reentry_guard_MCL_EXCLUSIVE_AREA_22/45 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_21/138 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_21) @06a26540
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_21/43 (read)reentry_guard_MCL_EXCLUSIVE_AREA_21/43 (write)msr_MCL_EXCLUSIVE_AREA_21/42 (read)reentry_guard_MCL_EXCLUSIVE_AREA_21/43 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_21/137 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_21) @06a262a0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_21/43 (read)msr_MCL_EXCLUSIVE_AREA_21/42 (write)msr_MCL_EXCLUSIVE_AREA_21/42 (read)reentry_guard_MCL_EXCLUSIVE_AREA_21/43 (read)reentry_guard_MCL_EXCLUSIVE_AREA_21/43 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_20/136 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_20) @06a26000
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_20/41 (read)reentry_guard_MCL_EXCLUSIVE_AREA_20/41 (write)msr_MCL_EXCLUSIVE_AREA_20/40 (read)reentry_guard_MCL_EXCLUSIVE_AREA_20/41 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_20/135 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_20) @06a1eb60
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_20/41 (read)msr_MCL_EXCLUSIVE_AREA_20/40 (write)msr_MCL_EXCLUSIVE_AREA_20/40 (read)reentry_guard_MCL_EXCLUSIVE_AREA_20/41 (read)reentry_guard_MCL_EXCLUSIVE_AREA_20/41 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_19/134 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_19) @06a1e620
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_19/39 (read)reentry_guard_MCL_EXCLUSIVE_AREA_19/39 (write)msr_MCL_EXCLUSIVE_AREA_19/38 (read)reentry_guard_MCL_EXCLUSIVE_AREA_19/39 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_19/133 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_19) @06a1e0e0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_19/39 (read)msr_MCL_EXCLUSIVE_AREA_19/38 (write)msr_MCL_EXCLUSIVE_AREA_19/38 (read)reentry_guard_MCL_EXCLUSIVE_AREA_19/39 (read)reentry_guard_MCL_EXCLUSIVE_AREA_19/39 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_18/132 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_18) @06a1ed20
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_18/37 (read)reentry_guard_MCL_EXCLUSIVE_AREA_18/37 (write)msr_MCL_EXCLUSIVE_AREA_18/36 (read)reentry_guard_MCL_EXCLUSIVE_AREA_18/37 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_18/131 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_18) @06a1ea80
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_18/37 (read)msr_MCL_EXCLUSIVE_AREA_18/36 (write)msr_MCL_EXCLUSIVE_AREA_18/36 (read)reentry_guard_MCL_EXCLUSIVE_AREA_18/37 (read)reentry_guard_MCL_EXCLUSIVE_AREA_18/37 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_17/130 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_17) @06a1e7e0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_17/35 (read)reentry_guard_MCL_EXCLUSIVE_AREA_17/35 (write)msr_MCL_EXCLUSIVE_AREA_17/34 (read)reentry_guard_MCL_EXCLUSIVE_AREA_17/35 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_17/129 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_17) @06a1e540
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_17/35 (read)msr_MCL_EXCLUSIVE_AREA_17/34 (write)msr_MCL_EXCLUSIVE_AREA_17/34 (read)reentry_guard_MCL_EXCLUSIVE_AREA_17/35 (read)reentry_guard_MCL_EXCLUSIVE_AREA_17/35 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_16/128 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_16) @06a1e2a0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_16/33 (read)reentry_guard_MCL_EXCLUSIVE_AREA_16/33 (write)msr_MCL_EXCLUSIVE_AREA_16/32 (read)reentry_guard_MCL_EXCLUSIVE_AREA_16/33 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_16/127 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_16) @06a1e000
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_16/33 (read)msr_MCL_EXCLUSIVE_AREA_16/32 (write)msr_MCL_EXCLUSIVE_AREA_16/32 (read)reentry_guard_MCL_EXCLUSIVE_AREA_16/33 (read)reentry_guard_MCL_EXCLUSIVE_AREA_16/33 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_15/126 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_15) @06a18b60
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_15/31 (read)reentry_guard_MCL_EXCLUSIVE_AREA_15/31 (write)msr_MCL_EXCLUSIVE_AREA_15/30 (read)reentry_guard_MCL_EXCLUSIVE_AREA_15/31 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_15/125 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_15) @06a18620
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_15/31 (read)msr_MCL_EXCLUSIVE_AREA_15/30 (write)msr_MCL_EXCLUSIVE_AREA_15/30 (read)reentry_guard_MCL_EXCLUSIVE_AREA_15/31 (read)reentry_guard_MCL_EXCLUSIVE_AREA_15/31 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_14/124 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_14) @06a180e0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_14/29 (read)reentry_guard_MCL_EXCLUSIVE_AREA_14/29 (write)msr_MCL_EXCLUSIVE_AREA_14/28 (read)reentry_guard_MCL_EXCLUSIVE_AREA_14/29 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_14/123 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_14) @06a18d20
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_14/29 (read)msr_MCL_EXCLUSIVE_AREA_14/28 (write)msr_MCL_EXCLUSIVE_AREA_14/28 (read)reentry_guard_MCL_EXCLUSIVE_AREA_14/29 (read)reentry_guard_MCL_EXCLUSIVE_AREA_14/29 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_13/122 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_13) @06a18a80
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_13/27 (read)reentry_guard_MCL_EXCLUSIVE_AREA_13/27 (write)msr_MCL_EXCLUSIVE_AREA_13/26 (read)reentry_guard_MCL_EXCLUSIVE_AREA_13/27 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_13/121 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_13) @06a187e0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_13/27 (read)msr_MCL_EXCLUSIVE_AREA_13/26 (write)msr_MCL_EXCLUSIVE_AREA_13/26 (read)reentry_guard_MCL_EXCLUSIVE_AREA_13/27 (read)reentry_guard_MCL_EXCLUSIVE_AREA_13/27 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_12/120 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_12) @06a18540
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_12/25 (read)reentry_guard_MCL_EXCLUSIVE_AREA_12/25 (write)msr_MCL_EXCLUSIVE_AREA_12/24 (read)reentry_guard_MCL_EXCLUSIVE_AREA_12/25 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_12/119 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_12) @06a182a0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_12/25 (read)msr_MCL_EXCLUSIVE_AREA_12/24 (write)msr_MCL_EXCLUSIVE_AREA_12/24 (read)reentry_guard_MCL_EXCLUSIVE_AREA_12/25 (read)reentry_guard_MCL_EXCLUSIVE_AREA_12/25 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_11/118 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_11) @06a18000
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_11/23 (read)reentry_guard_MCL_EXCLUSIVE_AREA_11/23 (write)msr_MCL_EXCLUSIVE_AREA_11/22 (read)reentry_guard_MCL_EXCLUSIVE_AREA_11/23 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_11/117 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_11) @06a0eb60
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_11/23 (read)msr_MCL_EXCLUSIVE_AREA_11/22 (write)msr_MCL_EXCLUSIVE_AREA_11/22 (read)reentry_guard_MCL_EXCLUSIVE_AREA_11/23 (read)reentry_guard_MCL_EXCLUSIVE_AREA_11/23 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_10/116 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_10) @06a0e620
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_10/21 (read)reentry_guard_MCL_EXCLUSIVE_AREA_10/21 (write)msr_MCL_EXCLUSIVE_AREA_10/20 (read)reentry_guard_MCL_EXCLUSIVE_AREA_10/21 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_10/115 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_10) @06a0e0e0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_10/21 (read)msr_MCL_EXCLUSIVE_AREA_10/20 (write)msr_MCL_EXCLUSIVE_AREA_10/20 (read)reentry_guard_MCL_EXCLUSIVE_AREA_10/21 (read)reentry_guard_MCL_EXCLUSIVE_AREA_10/21 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_09/114 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_09) @06a0ed20
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_09/19 (read)reentry_guard_MCL_EXCLUSIVE_AREA_09/19 (write)msr_MCL_EXCLUSIVE_AREA_09/18 (read)reentry_guard_MCL_EXCLUSIVE_AREA_09/19 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_09/113 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_09) @06a0ea80
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_09/19 (read)msr_MCL_EXCLUSIVE_AREA_09/18 (write)msr_MCL_EXCLUSIVE_AREA_09/18 (read)reentry_guard_MCL_EXCLUSIVE_AREA_09/19 (read)reentry_guard_MCL_EXCLUSIVE_AREA_09/19 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_08/112 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_08) @06a0e7e0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_08/17 (read)reentry_guard_MCL_EXCLUSIVE_AREA_08/17 (write)msr_MCL_EXCLUSIVE_AREA_08/16 (read)reentry_guard_MCL_EXCLUSIVE_AREA_08/17 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_08/111 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_08) @06a0e540
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_08/17 (read)msr_MCL_EXCLUSIVE_AREA_08/16 (write)msr_MCL_EXCLUSIVE_AREA_08/16 (read)reentry_guard_MCL_EXCLUSIVE_AREA_08/17 (read)reentry_guard_MCL_EXCLUSIVE_AREA_08/17 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_07/110 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_07) @06a0e2a0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_07/15 (read)reentry_guard_MCL_EXCLUSIVE_AREA_07/15 (write)msr_MCL_EXCLUSIVE_AREA_07/14 (read)reentry_guard_MCL_EXCLUSIVE_AREA_07/15 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_07/109 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_07) @06a0e000
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_07/15 (read)msr_MCL_EXCLUSIVE_AREA_07/14 (write)msr_MCL_EXCLUSIVE_AREA_07/14 (read)reentry_guard_MCL_EXCLUSIVE_AREA_07/15 (read)reentry_guard_MCL_EXCLUSIVE_AREA_07/15 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_06/108 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_06) @06a08b60
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_06/13 (read)reentry_guard_MCL_EXCLUSIVE_AREA_06/13 (write)msr_MCL_EXCLUSIVE_AREA_06/12 (read)reentry_guard_MCL_EXCLUSIVE_AREA_06/13 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_06/107 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_06) @06a08620
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_06/13 (read)msr_MCL_EXCLUSIVE_AREA_06/12 (write)msr_MCL_EXCLUSIVE_AREA_06/12 (read)reentry_guard_MCL_EXCLUSIVE_AREA_06/13 (read)reentry_guard_MCL_EXCLUSIVE_AREA_06/13 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_05/106 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_05) @06a080e0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_05/11 (read)reentry_guard_MCL_EXCLUSIVE_AREA_05/11 (write)msr_MCL_EXCLUSIVE_AREA_05/10 (read)reentry_guard_MCL_EXCLUSIVE_AREA_05/11 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_05/105 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_05) @06a08d20
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_05/11 (read)msr_MCL_EXCLUSIVE_AREA_05/10 (write)msr_MCL_EXCLUSIVE_AREA_05/10 (read)reentry_guard_MCL_EXCLUSIVE_AREA_05/11 (read)reentry_guard_MCL_EXCLUSIVE_AREA_05/11 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_04/104 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_04) @06a08a80
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_04/9 (read)reentry_guard_MCL_EXCLUSIVE_AREA_04/9 (write)msr_MCL_EXCLUSIVE_AREA_04/8 (read)reentry_guard_MCL_EXCLUSIVE_AREA_04/9 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_04/103 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_04) @06a087e0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_04/9 (read)msr_MCL_EXCLUSIVE_AREA_04/8 (write)msr_MCL_EXCLUSIVE_AREA_04/8 (read)reentry_guard_MCL_EXCLUSIVE_AREA_04/9 (read)reentry_guard_MCL_EXCLUSIVE_AREA_04/9 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_03/102 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_03) @06a08540
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_03/7 (read)reentry_guard_MCL_EXCLUSIVE_AREA_03/7 (write)msr_MCL_EXCLUSIVE_AREA_03/6 (read)reentry_guard_MCL_EXCLUSIVE_AREA_03/7 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_03/101 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_03) @06a082a0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_03/7 (read)msr_MCL_EXCLUSIVE_AREA_03/6 (write)msr_MCL_EXCLUSIVE_AREA_03/6 (read)reentry_guard_MCL_EXCLUSIVE_AREA_03/7 (read)reentry_guard_MCL_EXCLUSIVE_AREA_03/7 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_02/100 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_02) @06a08000
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_02/5 (read)reentry_guard_MCL_EXCLUSIVE_AREA_02/5 (write)msr_MCL_EXCLUSIVE_AREA_02/4 (read)reentry_guard_MCL_EXCLUSIVE_AREA_02/5 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_02/99 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_02) @0697ac40
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_02/5 (read)msr_MCL_EXCLUSIVE_AREA_02/4 (write)msr_MCL_EXCLUSIVE_AREA_02/4 (read)reentry_guard_MCL_EXCLUSIVE_AREA_02/5 (read)reentry_guard_MCL_EXCLUSIVE_AREA_02/5 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_01/98 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_01) @0697a700
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_01/3 (read)reentry_guard_MCL_EXCLUSIVE_AREA_01/3 (write)msr_MCL_EXCLUSIVE_AREA_01/2 (read)reentry_guard_MCL_EXCLUSIVE_AREA_01/3 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_01/97 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_01) @0697ae00
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_01/3 (read)msr_MCL_EXCLUSIVE_AREA_01/2 (write)msr_MCL_EXCLUSIVE_AREA_01/2 (read)reentry_guard_MCL_EXCLUSIVE_AREA_01/3 (read)reentry_guard_MCL_EXCLUSIVE_AREA_01/3 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_00/96 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_00) @0697ab60
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_00/1 (read)reentry_guard_MCL_EXCLUSIVE_AREA_00/1 (write)msr_MCL_EXCLUSIVE_AREA_00/0 (read)reentry_guard_MCL_EXCLUSIVE_AREA_00/1 (read)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_00/95 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_00) @0697a8c0
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References: reentry_guard_MCL_EXCLUSIVE_AREA_00/1 (read)msr_MCL_EXCLUSIVE_AREA_00/0 (write)msr_MCL_EXCLUSIVE_AREA_00/0 (read)reentry_guard_MCL_EXCLUSIVE_AREA_00/1 (read)reentry_guard_MCL_EXCLUSIVE_AREA_00/1 (write)
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
|
|
Mcl_schm_read_msr/94 (Mcl_schm_read_msr) @0697a620
|
|
Type: function definition analyzed
|
|
Visibility: externally_visible public
|
|
References:
|
|
Referring:
|
|
Availability: available
|
|
Function flags: count:1073741824 (estimated locally) body optimize_size
|
|
Called by:
|
|
Calls:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_46/93 (reentry_guard_MCL_EXCLUSIVE_AREA_46) @0697b168
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_46/187 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_46/187 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_46/187 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_46/188 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_46/188 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_46/188 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_46/92 (msr_MCL_EXCLUSIVE_AREA_46) @0697b0d8
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_46/187 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_46/187 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_46/188 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_45/91 (reentry_guard_MCL_EXCLUSIVE_AREA_45) @0697b048
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_45/185 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_45/185 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_45/185 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_45/186 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_45/186 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_45/186 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_45/90 (msr_MCL_EXCLUSIVE_AREA_45) @06976f78
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_45/185 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_45/185 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_45/186 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_44/89 (reentry_guard_MCL_EXCLUSIVE_AREA_44) @06976ee8
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_44/183 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_44/183 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_44/183 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_44/184 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_44/184 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_44/184 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_44/88 (msr_MCL_EXCLUSIVE_AREA_44) @06976e58
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_44/183 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_44/183 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_44/184 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_43/87 (reentry_guard_MCL_EXCLUSIVE_AREA_43) @06976dc8
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_43/181 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_43/181 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_43/181 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_43/182 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_43/182 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_43/182 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_43/86 (msr_MCL_EXCLUSIVE_AREA_43) @06976d38
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_43/181 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_43/181 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_43/182 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_42/85 (reentry_guard_MCL_EXCLUSIVE_AREA_42) @06976ca8
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_42/179 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_42/179 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_42/179 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_42/180 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_42/180 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_42/180 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_42/84 (msr_MCL_EXCLUSIVE_AREA_42) @06976c18
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_42/179 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_42/179 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_42/180 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_41/83 (reentry_guard_MCL_EXCLUSIVE_AREA_41) @06976b88
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_41/177 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_41/177 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_41/177 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_41/178 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_41/178 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_41/178 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_41/82 (msr_MCL_EXCLUSIVE_AREA_41) @06976af8
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_41/177 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_41/177 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_41/178 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_40/81 (reentry_guard_MCL_EXCLUSIVE_AREA_40) @06976a68
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_40/175 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_40/175 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_40/175 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_40/176 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_40/176 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_40/176 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_40/80 (msr_MCL_EXCLUSIVE_AREA_40) @069769d8
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_40/175 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_40/175 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_40/176 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_39/79 (reentry_guard_MCL_EXCLUSIVE_AREA_39) @06976948
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_39/173 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_39/173 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_39/173 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_39/174 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_39/174 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_39/174 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_39/78 (msr_MCL_EXCLUSIVE_AREA_39) @069768b8
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_39/173 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_39/173 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_39/174 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_38/77 (reentry_guard_MCL_EXCLUSIVE_AREA_38) @06976828
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_38/171 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_38/171 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_38/171 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_38/172 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_38/172 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_38/172 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_38/76 (msr_MCL_EXCLUSIVE_AREA_38) @06976798
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_38/171 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_38/171 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_38/172 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_37/75 (reentry_guard_MCL_EXCLUSIVE_AREA_37) @06976708
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_37/169 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_37/169 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_37/169 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_37/170 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_37/170 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_37/170 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_37/74 (msr_MCL_EXCLUSIVE_AREA_37) @06976678
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_37/169 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_37/169 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_37/170 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_36/73 (reentry_guard_MCL_EXCLUSIVE_AREA_36) @069765e8
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_36/167 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_36/167 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_36/167 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_36/168 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_36/168 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_36/168 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_36/72 (msr_MCL_EXCLUSIVE_AREA_36) @06976558
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_36/167 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_36/167 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_36/168 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_35/71 (reentry_guard_MCL_EXCLUSIVE_AREA_35) @069764c8
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_35/165 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_35/165 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_35/165 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_35/166 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_35/166 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_35/166 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_35/70 (msr_MCL_EXCLUSIVE_AREA_35) @06976438
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_35/165 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_35/165 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_35/166 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_34/69 (reentry_guard_MCL_EXCLUSIVE_AREA_34) @069763a8
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_34/163 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_34/163 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_34/163 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_34/164 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_34/164 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_34/164 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_34/68 (msr_MCL_EXCLUSIVE_AREA_34) @06976318
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_34/163 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_34/163 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_34/164 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_33/67 (reentry_guard_MCL_EXCLUSIVE_AREA_33) @06976288
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_33/161 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_33/161 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_33/161 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_33/162 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_33/162 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_33/162 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_33/66 (msr_MCL_EXCLUSIVE_AREA_33) @069761f8
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_33/161 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_33/161 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_33/162 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_32/65 (reentry_guard_MCL_EXCLUSIVE_AREA_32) @06976168
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_32/159 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_32/159 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_32/159 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_32/160 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_32/160 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_32/160 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_32/64 (msr_MCL_EXCLUSIVE_AREA_32) @069760d8
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_32/159 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_32/159 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_32/160 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_31/63 (reentry_guard_MCL_EXCLUSIVE_AREA_31) @06976048
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_31/157 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_31/157 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_31/157 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_31/158 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_31/158 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_31/158 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_31/62 (msr_MCL_EXCLUSIVE_AREA_31) @06971f78
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_31/157 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_31/157 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_31/158 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_30/61 (reentry_guard_MCL_EXCLUSIVE_AREA_30) @06971ee8
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_30/155 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_30/155 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_30/155 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_30/156 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_30/156 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_30/156 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_30/60 (msr_MCL_EXCLUSIVE_AREA_30) @06971e58
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_30/155 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_30/155 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_30/156 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_29/59 (reentry_guard_MCL_EXCLUSIVE_AREA_29) @06971dc8
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_29/153 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_29/153 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_29/153 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_29/154 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_29/154 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_29/154 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_29/58 (msr_MCL_EXCLUSIVE_AREA_29) @06971d38
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_29/153 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_29/153 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_29/154 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_28/57 (reentry_guard_MCL_EXCLUSIVE_AREA_28) @06971ca8
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_28/151 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_28/151 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_28/151 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_28/152 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_28/152 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_28/152 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_28/56 (msr_MCL_EXCLUSIVE_AREA_28) @06971c18
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_28/151 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_28/151 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_28/152 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_27/55 (reentry_guard_MCL_EXCLUSIVE_AREA_27) @06971b88
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_27/149 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_27/149 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_27/149 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_27/150 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_27/150 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_27/150 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_27/54 (msr_MCL_EXCLUSIVE_AREA_27) @06971af8
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_27/149 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_27/149 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_27/150 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_26/53 (reentry_guard_MCL_EXCLUSIVE_AREA_26) @06971a68
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_26/147 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_26/147 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_26/147 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_26/148 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_26/148 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_26/148 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_26/52 (msr_MCL_EXCLUSIVE_AREA_26) @069719d8
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_26/147 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_26/147 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_26/148 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_25/51 (reentry_guard_MCL_EXCLUSIVE_AREA_25) @06971948
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_25/145 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_25/145 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_25/145 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_25/146 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_25/146 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_25/146 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_25/50 (msr_MCL_EXCLUSIVE_AREA_25) @069718b8
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_25/145 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_25/145 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_25/146 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_24/49 (reentry_guard_MCL_EXCLUSIVE_AREA_24) @06971828
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_24/143 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_24/143 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_24/143 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_24/144 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_24/144 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_24/144 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_24/48 (msr_MCL_EXCLUSIVE_AREA_24) @06971798
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_24/143 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_24/143 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_24/144 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_23/47 (reentry_guard_MCL_EXCLUSIVE_AREA_23) @06971708
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_23/141 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_23/141 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_23/141 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_23/142 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_23/142 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_23/142 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_23/46 (msr_MCL_EXCLUSIVE_AREA_23) @06971678
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_23/141 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_23/141 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_23/142 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_22/45 (reentry_guard_MCL_EXCLUSIVE_AREA_22) @069715e8
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_22/139 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_22/139 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_22/139 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_22/140 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_22/140 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_22/140 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_22/44 (msr_MCL_EXCLUSIVE_AREA_22) @06971558
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_22/139 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_22/139 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_22/140 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_21/43 (reentry_guard_MCL_EXCLUSIVE_AREA_21) @069714c8
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_21/137 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_21/137 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_21/137 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_21/138 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_21/138 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_21/138 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_21/42 (msr_MCL_EXCLUSIVE_AREA_21) @06971438
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_21/137 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_21/137 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_21/138 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_20/41 (reentry_guard_MCL_EXCLUSIVE_AREA_20) @069713a8
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_20/135 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_20/135 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_20/135 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_20/136 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_20/136 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_20/136 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_20/40 (msr_MCL_EXCLUSIVE_AREA_20) @06971318
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_20/135 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_20/135 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_20/136 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_19/39 (reentry_guard_MCL_EXCLUSIVE_AREA_19) @06971288
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_19/133 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_19/133 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_19/133 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_19/134 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_19/134 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_19/134 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_19/38 (msr_MCL_EXCLUSIVE_AREA_19) @069711f8
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_19/133 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_19/133 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_19/134 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_18/37 (reentry_guard_MCL_EXCLUSIVE_AREA_18) @06971168
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_18/131 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_18/131 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_18/131 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_18/132 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_18/132 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_18/132 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_18/36 (msr_MCL_EXCLUSIVE_AREA_18) @069710d8
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_18/131 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_18/131 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_18/132 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_17/35 (reentry_guard_MCL_EXCLUSIVE_AREA_17) @06971048
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_17/129 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_17/129 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_17/129 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_17/130 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_17/130 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_17/130 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_17/34 (msr_MCL_EXCLUSIVE_AREA_17) @0692af78
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_17/129 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_17/129 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_17/130 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_16/33 (reentry_guard_MCL_EXCLUSIVE_AREA_16) @0692aee8
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_16/127 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_16/127 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_16/127 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_16/128 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_16/128 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_16/128 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_16/32 (msr_MCL_EXCLUSIVE_AREA_16) @0692ae58
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_16/127 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_16/127 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_16/128 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_15/31 (reentry_guard_MCL_EXCLUSIVE_AREA_15) @0692adc8
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_15/125 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_15/125 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_15/125 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_15/126 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_15/126 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_15/126 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_15/30 (msr_MCL_EXCLUSIVE_AREA_15) @0692ad38
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_15/125 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_15/125 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_15/126 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_14/29 (reentry_guard_MCL_EXCLUSIVE_AREA_14) @0692aca8
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_14/123 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_14/123 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_14/123 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_14/124 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_14/124 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_14/124 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_14/28 (msr_MCL_EXCLUSIVE_AREA_14) @0692ac18
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_14/123 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_14/123 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_14/124 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_13/27 (reentry_guard_MCL_EXCLUSIVE_AREA_13) @0692ab88
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_13/121 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_13/121 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_13/121 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_13/122 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_13/122 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_13/122 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_13/26 (msr_MCL_EXCLUSIVE_AREA_13) @0692aaf8
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_13/121 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_13/121 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_13/122 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_12/25 (reentry_guard_MCL_EXCLUSIVE_AREA_12) @0692aa68
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_12/119 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_12/119 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_12/119 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_12/120 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_12/120 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_12/120 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_12/24 (msr_MCL_EXCLUSIVE_AREA_12) @0692a9d8
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_12/119 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_12/119 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_12/120 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_11/23 (reentry_guard_MCL_EXCLUSIVE_AREA_11) @0692a948
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_11/117 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_11/117 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_11/117 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_11/118 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_11/118 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_11/118 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_11/22 (msr_MCL_EXCLUSIVE_AREA_11) @0692a8b8
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_11/117 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_11/117 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_11/118 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_10/21 (reentry_guard_MCL_EXCLUSIVE_AREA_10) @0692a828
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_10/115 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_10/115 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_10/115 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_10/116 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_10/116 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_10/116 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_10/20 (msr_MCL_EXCLUSIVE_AREA_10) @0692a798
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_10/115 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_10/115 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_10/116 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_09/19 (reentry_guard_MCL_EXCLUSIVE_AREA_09) @0692a708
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_09/113 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_09/113 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_09/113 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_09/114 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_09/114 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_09/114 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_09/18 (msr_MCL_EXCLUSIVE_AREA_09) @0692a678
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_09/113 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_09/113 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_09/114 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_08/17 (reentry_guard_MCL_EXCLUSIVE_AREA_08) @0692a5e8
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_08/111 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_08/111 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_08/111 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_08/112 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_08/112 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_08/112 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_08/16 (msr_MCL_EXCLUSIVE_AREA_08) @0692a558
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_08/111 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_08/111 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_08/112 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_07/15 (reentry_guard_MCL_EXCLUSIVE_AREA_07) @0692a4c8
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_07/109 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_07/109 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_07/109 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_07/110 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_07/110 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_07/110 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_07/14 (msr_MCL_EXCLUSIVE_AREA_07) @0692a438
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_07/109 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_07/109 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_07/110 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_06/13 (reentry_guard_MCL_EXCLUSIVE_AREA_06) @0692a3a8
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_06/107 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_06/107 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_06/107 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_06/108 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_06/108 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_06/108 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_06/12 (msr_MCL_EXCLUSIVE_AREA_06) @0692a318
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_06/107 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_06/107 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_06/108 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_05/11 (reentry_guard_MCL_EXCLUSIVE_AREA_05) @0692a288
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_05/105 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_05/105 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_05/105 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_05/106 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_05/106 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_05/106 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_05/10 (msr_MCL_EXCLUSIVE_AREA_05) @0692a1f8
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_05/105 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_05/105 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_05/106 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_04/9 (reentry_guard_MCL_EXCLUSIVE_AREA_04) @0692a168
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_04/103 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_04/103 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_04/103 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_04/104 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_04/104 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_04/104 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_04/8 (msr_MCL_EXCLUSIVE_AREA_04) @0692a0d8
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_04/103 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_04/103 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_04/104 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_03/7 (reentry_guard_MCL_EXCLUSIVE_AREA_03) @0692a048
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_03/101 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_03/101 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_03/101 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_03/102 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_03/102 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_03/102 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_03/6 (msr_MCL_EXCLUSIVE_AREA_03) @06923f78
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_03/101 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_03/101 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_03/102 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_02/5 (reentry_guard_MCL_EXCLUSIVE_AREA_02) @06923ee8
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_02/99 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_02/99 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_02/99 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_02/100 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_02/100 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_02/100 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_02/4 (msr_MCL_EXCLUSIVE_AREA_02) @06923e58
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_02/99 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_02/99 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_02/100 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_01/3 (reentry_guard_MCL_EXCLUSIVE_AREA_01) @06923dc8
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_01/97 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_01/97 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_01/97 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_01/98 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_01/98 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_01/98 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_01/2 (msr_MCL_EXCLUSIVE_AREA_01) @06923d38
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_01/97 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_01/97 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_01/98 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_00/1 (reentry_guard_MCL_EXCLUSIVE_AREA_00) @06923ca8
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_00/95 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_00/95 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_00/95 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_00/96 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_00/96 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_00/96 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
msr_MCL_EXCLUSIVE_AREA_00/0 (msr_MCL_EXCLUSIVE_AREA_00) @06923c18
|
|
Type: variable definition analyzed
|
|
Visibility: force_output prevailing_def_ironly
|
|
References:
|
|
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_00/95 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_00/95 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_00/96 (read)
|
|
Availability: available
|
|
Varpool flags:
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_46 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_46[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_46[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_46[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_46[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_46 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_46[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_46[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_46[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_46[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_46[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_45 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_45[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_45[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_45[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_45[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_45 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_45[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_45[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_45[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_45[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_45[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_44 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_44[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_44[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_44[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_44[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_44 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_44[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_44[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_44[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_44[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_44[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_43 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_43[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_43[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_43[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_43[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_43 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_43[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_43[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_43[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_43[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_43[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_42 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_42[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_42[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_42[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_42[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_42 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_42[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_42[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_42[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_42[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_42[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_41 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_41[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_41[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_41[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_41[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_41 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_41[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_41[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_41[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_41[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_41[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_40 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_40[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_40[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_40[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_40[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_40 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_40[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_40[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_40[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_40[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_40[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_39 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_39[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_39[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_39[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_39[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_39 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_39[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_39[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_39[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_39[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_39[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_38 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_38[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_38[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_38[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_38[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_38 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_38[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_38[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_38[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_38[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_38[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_37 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_37[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_37[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_37[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_37[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_37 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_37[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_37[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_37[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_37[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_37[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_36 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_36[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_36[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_36[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_36[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_36 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_36[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_36[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_36[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_36[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_36[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_35 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_35[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_35[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_35[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_35[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_35 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_35[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_35[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_35[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_35[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_35[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_34 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_34[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_34[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_34[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_34[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_34 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_34[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_34[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_34[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_34[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_34[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_33 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_33[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_33[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_33[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_33[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_33 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_33[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_33[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_33[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_33[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_33[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_32 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_32[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_32[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_32[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_32[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_32 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_32[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_32[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_32[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_32[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_32[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_31 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_31[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_31[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_31[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_31[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_31 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_31[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_31[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_31[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_31[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_31[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_30 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_30[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_30[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_30[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_30[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_30 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_30[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_30[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_30[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_30[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_30[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_29 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_29[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_29[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_29[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_29[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_29 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_29[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_29[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_29[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_29[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_29[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_28 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_28[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_28[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_28[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_28[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_28 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_28[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_28[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_28[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_28[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_28[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_27 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_27[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_27[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_27[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_27[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_27 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_27[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_27[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_27[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_27[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_27[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_26 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_26[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_26[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_26[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_26[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_26 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_26[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_26[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_26[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_26[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_26[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_25 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_25[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_25[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_25[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_25[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_25 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_25[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_25[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_25[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_25[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_25[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_24 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_24[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_24[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_24[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_24[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_24 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_24[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_24[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_24[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_24[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_24[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_23 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_23[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_23[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_23[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_23[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_23 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_23[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_23[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_23[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_23[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_23[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_22 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_22[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_22[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_22[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_22[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_22 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_22[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_22[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_22[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_22[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_22[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_21 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_21[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_21[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_21[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_21[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_21 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_21[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_21[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_21[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_21[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_21[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_20 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_20[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_20[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_20[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_20[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_20 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_20[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_20[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_20[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_20[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_20[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_19 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_19[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_19[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_19[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_19[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_19 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_19[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_19[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_19[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_19[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_19[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_18 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_18[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_18[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_18[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_18[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_18 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_18[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_18[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_18[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_18[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_18[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_17 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_17[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_17[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_17[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_17[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_17 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_17[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_17[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_17[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_17[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_17[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_16 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_16[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_16[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_16[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_16[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_16 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_16[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_16[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_16[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_16[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_16[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_15 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_15[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_15[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_15[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_15[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_15 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_15[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_15[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_15[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_15[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_15[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_14 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_14[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_14[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_14[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_14[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_14 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_14[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_14[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_14[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_14[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_14[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_13 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_13[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_13[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_13[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_13[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_13 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_13[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_13[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_13[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_13[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_13[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_12 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_12[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_12[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_12[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_12[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_12 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_12[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_12[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_12[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_12[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_12[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_11 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_11[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_11[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_11[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_11[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_11 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_11[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_11[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_11[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_11[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_11[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_10 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_10[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_10[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_10[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_10[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_10 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_10[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_10[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_10[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_10[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_10[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_09 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_09[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_09[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_09[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_09[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_09 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_09[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_09[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_09[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_09[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_09[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_08 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_08[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_08[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_08[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_08[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_08 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_08[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_08[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_08[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_08[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_08[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_07 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_07[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_07[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_07[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_07[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_07 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_07[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_07[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_07[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_07[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_07[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_06 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_06[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_06[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_06[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_06[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_06 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_06[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_06[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_06[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_06[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_06[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_05 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_05[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_05[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_05[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_05[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_05 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_05[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_05[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_05[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_05[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_05[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_04 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_04[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_04[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_04[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_04[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_04 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_04[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_04[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_04[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_04[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_04[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_03 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_03[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_03[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_03[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_03[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_03 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_03[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_03[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_03[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_03[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_03[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_02 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_02[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_02[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_02[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_02[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_02 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_02[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_02[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_02[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_02[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_02[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_01 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_01[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_01[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_01[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_01[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_01 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_01[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_01[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_01[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_01[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_01[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_00 ()
|
|
{
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_00[u32CoreId_10];
|
|
_3 = _2 + 4294967295;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_00[u32CoreId_10] ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} msr_MCL_EXCLUSIVE_AREA_00[u32CoreId_10];
|
|
_5 = _4 & 1;
|
|
if (_5 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_00[u32CoreId_10];
|
|
if (_6 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsie i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_00 ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
uint32 u32CoreId;
|
|
unsigned char _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = Sys_GetCoreID ();
|
|
u32CoreId_10 = (uint32) _1;
|
|
# DEBUG u32CoreId => u32CoreId_10
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_00[u32CoreId_10];
|
|
if (_2 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
|
|
# DEBUG reg_tmp => reg_tmp_14
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG reg_tmp => NULL
|
|
msr_MCL_EXCLUSIVE_AREA_00[u32CoreId_10] ={v} reg_tmp_14;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} msr_MCL_EXCLUSIVE_AREA_00[u32CoreId_10];
|
|
_4 = _3 & 1;
|
|
if (_4 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" cpsid i");
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_00[u32CoreId_10];
|
|
_6 = _5 + 1;
|
|
reentry_guard_MCL_EXCLUSIVE_AREA_00[u32CoreId_10] ={v} _6;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Mcl_schm_read_msr ()
|
|
{
|
|
register uint32 reg_tmp;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_1);
|
|
# DEBUG reg_tmp => reg_tmp_1
|
|
# DEBUG BEGIN_STMT
|
|
return reg_tmp_1;
|
|
|
|
}
|
|
|
|
|