mirror of
https://github.com/Dev-KATECH/ADM.git
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323 lines
12 KiB
C
323 lines
12 KiB
C
/*==================================================================================================
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* Project : RTD AUTOSAR 4.4
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* Platform : CORTEXM
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* Peripheral :
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* Dependencies : none
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*
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* Autosar Version : 4.4.0
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* Autosar Revision : ASR_REL_4_4_REV_0000
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* Autosar Conf.Variant :
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* SW Version : 0.9.0
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* Build Version : S32K3_RTD_0_9_0_P02_D2107_ASR_REL_4_4_REV_0000_20210716
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*
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* (c) Copyright 2020 - 2021 NXP Semiconductors
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* All Rights Reserved.
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*
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* NXP Confidential. This software is owned or controlled by NXP and may only be
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* used strictly in accordance with the applicable license terms. By expressly
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* accepting such terms or by downloading, installing, activating and/or otherwise
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* using the software, you are agreeing that you have read, and that you agree to
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* comply with and are bound by, such license terms. If you do not agree to be
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* bound by the applicable license terms, then you may not retain, install,
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* activate or otherwise use the software.
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==================================================================================================*/
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#ifdef __cplusplus
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extern "C" {
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#endif
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/*==================================================================================================
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* INCLUDE FILES
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* 1) system and project includes
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* 2) needed interfaces from external units
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* 3) internal and external interfaces from this unit
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==================================================================================================*/
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#include "Platform_Types.h"
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#include "Mcal.h"
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#include "system.h"
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#include "core_specific.h"
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#include "S32K344_SCB.h"
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#include "S32K344_MPU.h"
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#include "S32K344_MSCM.h"
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/*==================================================================================================
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* FILE VERSION CHECKS
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==================================================================================================*/
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/*==================================================================================================
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* LOCAL TYPEDEFS (STRUCTURES, UNIONS, ENUMS)
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==================================================================================================*/
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/*==================================================================================================
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* LOCAL CONSTANTS
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==================================================================================================*/
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/*==================================================================================================
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* LOCAL MACROS
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==================================================================================================*/
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#define CM7_0 (0UL)
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#define CM7_1 (1UL)
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#define SVC_GoToSupervisor() ASM_KEYWORD("svc 0x0")
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#define SVC_GoToUser() ASM_KEYWORD("svc 0x1")
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#define S32_SCB_CPACR_CPx_MASK(CpNum) (0x3U << S32_SCB_CPACR_CPx_SHIFT(CpNum))
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#define S32_SCB_CPACR_CPx_SHIFT(CpNum) (2U*((uint32)CpNum))
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#define S32_SCB_CPACR_CPx(CpNum, x) (((uint32)(((uint32)(x))<<S32_SCB_CPACR_CPx_SHIFT((CpNum))))&S32_SCB_CPACR_CPx_MASK((CpNum)))
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/*==================================================================================================
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* LOCAL VARIABLES
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==================================================================================================*/
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/*==================================================================================================-
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* GLOBAL CONSTANTS
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==================================================================================================*/
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/*==================================================================================================
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* GLOBAL VARIABLES
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==================================================================================================*/
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#define PLATFORM_START_SEC_VAR_INIT_32
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#include "Platform_MemMap.h"
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/* Allocate a global variable which will be overwritten by the debugger if attached(in CMM), to catch the core after reset. */
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uint32 RESET_CATCH_CORE=0x00U;
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#define PLATFORM_STOP_SEC_VAR_INIT_32
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#include "Platform_MemMap.h"
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/*==================================================================================================
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* LOCAL FUNCTION PROTOTYPES
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==================================================================================================*/
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#define PLATFORM_START_SEC_CODE
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#include "Platform_MemMap.h"
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static void sys_m7_cache_init(void);
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/*==================================================================================================
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* LOCAL FUNCTIONS
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==================================================================================================*/
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/*==================================================================================================
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* GLOBAL FUNCTIONS
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==================================================================================================*/
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#ifdef MCAL_ENABLE_USER_MODE_SUPPORT
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extern uint32 startup_getControlRegisterValue(void);
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extern uint32 startup_getAipsRegisterValue(void);
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#endif /*MCAL_ENABLE_USER_MODE_SUPPORT*/
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/*================================================================================================*/
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/**
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* @brief startup_go_to_user_mode
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* @details Function called from startup.s to switch to user mode if MCAL_ENABLE_USER_MODE_SUPPORT
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* is defined
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*/
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/*================================================================================================*/
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void startup_go_to_user_mode(void);
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void startup_go_to_user_mode(void)
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{
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#ifdef MCAL_ENABLE_USER_MODE_SUPPORT
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ASM_KEYWORD("svc 0x1");
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#endif
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}
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/*================================================================================================*/
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/**
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* @brief Default IRQ handler
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* @details Infinite Loop
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*/
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/*================================================================================================*/
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void default_interrupt_routine(void)
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{
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while(1);
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}
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/*================================================================================================*/
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/**
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* @brief Sys_GoToSupervisor
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* @details function used to enter to supervisor mode.
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* check if it's needed to switch to supervisor mode and make the switch.
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* Return 1 if switch was done
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*/
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/*================================================================================================*/
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#ifdef MCAL_ENABLE_USER_MODE_SUPPORT
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uint32 Sys_GoToSupervisor(void)
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{
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uint32 u32ControlRegValue;
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uint32 u32AipsRegValue;
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uint32 u32SwitchToSupervisor;
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/* if it's 0 then Thread mode is already in supervisor mode */
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u32ControlRegValue = startup_getControlRegisterValue();
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/* if it's 0 the core is in Thread mode, otherwise in Handler mode */
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u32AipsRegValue = startup_getAipsRegisterValue();
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/* if core is already in supervisor mode for Thread mode, or running form Handler mode, there is no need to make the switch */
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if((0UL == (u32ControlRegValue & 1)) || (0 < (u32AipsRegValue & 0xFF)))
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{
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u32SwitchToSupervisor = 0U;
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}
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else
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{
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u32SwitchToSupervisor = 1U;
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SVC_GoToSupervisor();
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}
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return u32SwitchToSupervisor;
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}
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/*================================================================================================*/
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/**
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* @brief Sys_GoToUser_Return
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* @details function used to switch back to user mode for Thread mode, return a uint32 value passed as parameter
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*/
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/*================================================================================================*/
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uint32 Sys_GoToUser_Return(uint32 u32SwitchToSupervisor, uint32 u32returnValue)
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{
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if (1UL == u32SwitchToSupervisor)
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{
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SVC_GoToUser();
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}
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return u32returnValue;
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}
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uint32 Sys_GoToUser(void)
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{
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SVC_GoToUser();
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return 0UL;
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}
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#endif
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/*================================================================================================*/
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/**
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* @brief Sys_GetCoreID
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* @details Function used to get the ID of the currently executing thread
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*/
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/*================================================================================================*/
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#if !defined(USING_OS_AUTOSAROS)
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uint8 Sys_GetCoreID(void)
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{
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return (MSCM->CPXNUM & MSCM_CPXNUM_CPN_MASK);
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}
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#endif
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/*================================================================================================*/
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/*
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* system initialization : system clock, interrupt router ...
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*/
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void SystemInit(void)
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{
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uint32 i;
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uint32 coreMask;
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uint8 regionNum = 0U;
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uint8 coreId = OsIf_GetCoreID();
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switch(coreId)
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{
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case CM7_0:
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coreMask = (1UL << MSCM_IRSPRC_M7_0_SHIFT);
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break;
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case CM7_1:
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coreMask = (1UL << MSCM_IRSPRC_M7_1_SHIFT);
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break;
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default:
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coreMask = 0UL;
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break;
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}
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/* Configure MSCM to enable/disable interrupts routing to Core processor */
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for (i = 0; i < MSCM_IRSPRC_COUNT; i++)
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{
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MSCM->IRSPRC[i] |= coreMask;
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}
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/**************************************************************************/
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/* FPU ENABLE*/
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/**************************************************************************/
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#ifdef ENABLE_FPU
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/* Enable CP10 and CP11 coprocessors */
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S32_SCB->CPACR |= (S32_SCB_CPACR_CPx(10U, 3U) | S32_SCB_CPACR_CPx(11U, 3U));
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ASM_KEYWORD("dsb");
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ASM_KEYWORD("isb");
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#endif /* ENABLE_FPU */
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/**************************************************************************/
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/* DEFAULT MEMORY ENABLE*/
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/**************************************************************************/
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ASM_KEYWORD("dsb");
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ASM_KEYWORD("isb");
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/* Set default memory regions */
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for (regionNum = 0U; regionNum < CPU_MPU_MEMORY_COUNT; regionNum++)
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{
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S32_MPU->RNR = regionNum;
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S32_MPU->RBAR = rbar[regionNum];
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S32_MPU->RASR = rasr[regionNum];
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}
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/* Enable MPU */
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S32_MPU->CTRL |= S32_MPU_CTRL_ENABLE_MASK;
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ASM_KEYWORD("dsb");
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ASM_KEYWORD("isb");
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/**************************************************************************/
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/* ENABLE CACHE */
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/**************************************************************************/
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sys_m7_cache_init();
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}
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static void sys_m7_cache_init(void)
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{
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uint32 ccsidr = 0U;
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uint32 sets = 0U;
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uint32 ways = 0U;
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#ifdef D_CACHE_ENABLE
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/*init Data caches*/
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S32_SCB->CSSELR = 0U; /* select Level 1 data cache */
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ASM_KEYWORD("dsb");
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ccsidr = S32_SCB->CCSIDR;
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sets = (uint32)(CCSIDR_SETS(ccsidr));
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do {
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ways = (uint32)(CCSIDR_WAYS(ccsidr));
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do {
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S32_SCB->DCISW = (((sets << SCB_DCISW_SET_Pos) & SCB_DCISW_SET_Msk) |
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((ways << SCB_DCISW_WAY_Pos) & SCB_DCISW_WAY_Msk) );
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ASM_KEYWORD("dsb");
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} while (ways-- != 0U);
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} while(sets-- != 0U);
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ASM_KEYWORD("dsb");
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S32_SCB->CCR |= (uint32)SCB_CCR_DC_Msk; /* enable D-Cache */
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ASM_KEYWORD("dsb");
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ASM_KEYWORD("isb");
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#endif
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#ifdef I_CACHE_ENABLE
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/*init Code caches*/
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ASM_KEYWORD("dsb");
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ASM_KEYWORD("isb");
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S32_SCB->ICIALLU = 0UL; /* invalidate I-Cache */
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ASM_KEYWORD("dsb");
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ASM_KEYWORD("isb");
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S32_SCB->CCR |= (uint32)SCB_CCR_IC_Msk; /* enable I-Cache */
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ASM_KEYWORD("dsb");
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ASM_KEYWORD("isb");
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#endif
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}
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#define PLATFORM_STOP_SEC_CODE
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#include "Platform_MemMap.h"
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#ifdef __cplusplus
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}
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#endif
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