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ADM/GW/Debug_RAM/RTD/src/SchM_Mcu.c.016i.visibility
S2-CHICKEN 77297108b6 VCU C code first commit
2024-08-08 10:00:15 +09:00

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Marking local functions:
Marking externally visible functions: SchM_Exit_Mcu_MCU_EXCLUSIVE_AREA_02 SchM_Enter_Mcu_MCU_EXCLUSIVE_AREA_02 SchM_Exit_Mcu_MCU_EXCLUSIVE_AREA_01 SchM_Enter_Mcu_MCU_EXCLUSIVE_AREA_01 SchM_Exit_Mcu_MCU_EXCLUSIVE_AREA_00 SchM_Enter_Mcu_MCU_EXCLUSIVE_AREA_00 Mcu_schm_read_msr
Marking externally visible variables:
Reclaiming functions:
Reclaiming variables:
Clearing address taken flags:
Symbol table:
Sys_GetCoreID/13 (Sys_GetCoreID) @068c49a0
Type: function
Visibility: external public
References:
Referring:
Availability: not_available
Function flags: optimize_size
Called by: SchM_Exit_Mcu_MCU_EXCLUSIVE_AREA_02/12 SchM_Enter_Mcu_MCU_EXCLUSIVE_AREA_02/11 SchM_Exit_Mcu_MCU_EXCLUSIVE_AREA_01/10 SchM_Enter_Mcu_MCU_EXCLUSIVE_AREA_01/9 SchM_Exit_Mcu_MCU_EXCLUSIVE_AREA_00/8 SchM_Enter_Mcu_MCU_EXCLUSIVE_AREA_00/7
Calls:
SchM_Exit_Mcu_MCU_EXCLUSIVE_AREA_02/12 (SchM_Exit_Mcu_MCU_EXCLUSIVE_AREA_02) @068c4460
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCU_EXCLUSIVE_AREA_02/5 (read)reentry_guard_MCU_EXCLUSIVE_AREA_02/5 (write)msr_MCU_EXCLUSIVE_AREA_02/4 (read)reentry_guard_MCU_EXCLUSIVE_AREA_02/5 (read)
Referring:
Availability: available
Function flags: body optimize_size
Called by:
Calls: Sys_GetCoreID/13
SchM_Enter_Mcu_MCU_EXCLUSIVE_AREA_02/11 (SchM_Enter_Mcu_MCU_EXCLUSIVE_AREA_02) @068c41c0
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCU_EXCLUSIVE_AREA_02/5 (read)msr_MCU_EXCLUSIVE_AREA_02/4 (write)msr_MCU_EXCLUSIVE_AREA_02/4 (read)reentry_guard_MCU_EXCLUSIVE_AREA_02/5 (read)reentry_guard_MCU_EXCLUSIVE_AREA_02/5 (write)
Referring:
Availability: available
Function flags: body optimize_size
Called by:
Calls: Mcu_schm_read_msr/6 Sys_GetCoreID/13
SchM_Exit_Mcu_MCU_EXCLUSIVE_AREA_01/10 (SchM_Exit_Mcu_MCU_EXCLUSIVE_AREA_01) @068bcee0
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCU_EXCLUSIVE_AREA_01/3 (read)reentry_guard_MCU_EXCLUSIVE_AREA_01/3 (write)msr_MCU_EXCLUSIVE_AREA_01/2 (read)reentry_guard_MCU_EXCLUSIVE_AREA_01/3 (read)
Referring:
Availability: available
Function flags: body optimize_size
Called by:
Calls: Sys_GetCoreID/13
SchM_Enter_Mcu_MCU_EXCLUSIVE_AREA_01/9 (SchM_Enter_Mcu_MCU_EXCLUSIVE_AREA_01) @068bc9a0
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCU_EXCLUSIVE_AREA_01/3 (read)msr_MCU_EXCLUSIVE_AREA_01/2 (write)msr_MCU_EXCLUSIVE_AREA_01/2 (read)reentry_guard_MCU_EXCLUSIVE_AREA_01/3 (read)reentry_guard_MCU_EXCLUSIVE_AREA_01/3 (write)
Referring:
Availability: available
Function flags: body optimize_size
Called by:
Calls: Mcu_schm_read_msr/6 Sys_GetCoreID/13
SchM_Exit_Mcu_MCU_EXCLUSIVE_AREA_00/8 (SchM_Exit_Mcu_MCU_EXCLUSIVE_AREA_00) @068bce00
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCU_EXCLUSIVE_AREA_00/1 (read)reentry_guard_MCU_EXCLUSIVE_AREA_00/1 (write)msr_MCU_EXCLUSIVE_AREA_00/0 (read)reentry_guard_MCU_EXCLUSIVE_AREA_00/1 (read)
Referring:
Availability: available
Function flags: body optimize_size
Called by:
Calls: Sys_GetCoreID/13
SchM_Enter_Mcu_MCU_EXCLUSIVE_AREA_00/7 (SchM_Enter_Mcu_MCU_EXCLUSIVE_AREA_00) @068bcb60
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCU_EXCLUSIVE_AREA_00/1 (read)msr_MCU_EXCLUSIVE_AREA_00/0 (write)msr_MCU_EXCLUSIVE_AREA_00/0 (read)reentry_guard_MCU_EXCLUSIVE_AREA_00/1 (read)reentry_guard_MCU_EXCLUSIVE_AREA_00/1 (write)
Referring:
Availability: available
Function flags: body optimize_size
Called by:
Calls: Mcu_schm_read_msr/6 Sys_GetCoreID/13
Mcu_schm_read_msr/6 (Mcu_schm_read_msr) @068bc8c0
Type: function definition analyzed
Visibility: externally_visible public
References:
Referring:
Availability: available
Function flags: body optimize_size
Called by: SchM_Enter_Mcu_MCU_EXCLUSIVE_AREA_02/11 SchM_Enter_Mcu_MCU_EXCLUSIVE_AREA_01/9 SchM_Enter_Mcu_MCU_EXCLUSIVE_AREA_00/7
Calls:
reentry_guard_MCU_EXCLUSIVE_AREA_02/5 (reentry_guard_MCU_EXCLUSIVE_AREA_02) @068bb5e8
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcu_MCU_EXCLUSIVE_AREA_02/11 (read)SchM_Enter_Mcu_MCU_EXCLUSIVE_AREA_02/11 (read)SchM_Enter_Mcu_MCU_EXCLUSIVE_AREA_02/11 (write)SchM_Exit_Mcu_MCU_EXCLUSIVE_AREA_02/12 (read)SchM_Exit_Mcu_MCU_EXCLUSIVE_AREA_02/12 (write)SchM_Exit_Mcu_MCU_EXCLUSIVE_AREA_02/12 (read)
Availability: available
Varpool flags:
msr_MCU_EXCLUSIVE_AREA_02/4 (msr_MCU_EXCLUSIVE_AREA_02) @068bb558
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcu_MCU_EXCLUSIVE_AREA_02/11 (write)SchM_Enter_Mcu_MCU_EXCLUSIVE_AREA_02/11 (read)SchM_Exit_Mcu_MCU_EXCLUSIVE_AREA_02/12 (read)
Availability: available
Varpool flags:
reentry_guard_MCU_EXCLUSIVE_AREA_01/3 (reentry_guard_MCU_EXCLUSIVE_AREA_01) @068bb4c8
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcu_MCU_EXCLUSIVE_AREA_01/9 (read)SchM_Enter_Mcu_MCU_EXCLUSIVE_AREA_01/9 (read)SchM_Enter_Mcu_MCU_EXCLUSIVE_AREA_01/9 (write)SchM_Exit_Mcu_MCU_EXCLUSIVE_AREA_01/10 (read)SchM_Exit_Mcu_MCU_EXCLUSIVE_AREA_01/10 (write)SchM_Exit_Mcu_MCU_EXCLUSIVE_AREA_01/10 (read)
Availability: available
Varpool flags:
msr_MCU_EXCLUSIVE_AREA_01/2 (msr_MCU_EXCLUSIVE_AREA_01) @068bb438
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcu_MCU_EXCLUSIVE_AREA_01/9 (write)SchM_Enter_Mcu_MCU_EXCLUSIVE_AREA_01/9 (read)SchM_Exit_Mcu_MCU_EXCLUSIVE_AREA_01/10 (read)
Availability: available
Varpool flags:
reentry_guard_MCU_EXCLUSIVE_AREA_00/1 (reentry_guard_MCU_EXCLUSIVE_AREA_00) @068bb3a8
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcu_MCU_EXCLUSIVE_AREA_00/7 (read)SchM_Enter_Mcu_MCU_EXCLUSIVE_AREA_00/7 (read)SchM_Enter_Mcu_MCU_EXCLUSIVE_AREA_00/7 (write)SchM_Exit_Mcu_MCU_EXCLUSIVE_AREA_00/8 (read)SchM_Exit_Mcu_MCU_EXCLUSIVE_AREA_00/8 (write)SchM_Exit_Mcu_MCU_EXCLUSIVE_AREA_00/8 (read)
Availability: available
Varpool flags:
msr_MCU_EXCLUSIVE_AREA_00/0 (msr_MCU_EXCLUSIVE_AREA_00) @068bb318
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcu_MCU_EXCLUSIVE_AREA_00/7 (write)SchM_Enter_Mcu_MCU_EXCLUSIVE_AREA_00/7 (read)SchM_Exit_Mcu_MCU_EXCLUSIVE_AREA_00/8 (read)
Availability: available
Varpool flags:
SchM_Exit_Mcu_MCU_EXCLUSIVE_AREA_02 ()
{
uint32 u32CoreId;
<bb 2> :
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId = (uint32) _1;
# DEBUG BEGIN_STMT
_2 = reentry_guard_MCU_EXCLUSIVE_AREA_02[u32CoreId];
_3 = _2 + 4294967295;
reentry_guard_MCU_EXCLUSIVE_AREA_02[u32CoreId] = _3;
# DEBUG BEGIN_STMT
_4 = msr_MCU_EXCLUSIVE_AREA_02[u32CoreId];
_5 = _4 & 1;
if (_5 == 0)
goto <bb 3>; [INV]
else
goto <bb 5>; [INV]
<bb 3> :
_6 = reentry_guard_MCU_EXCLUSIVE_AREA_02[u32CoreId];
if (_6 == 0)
goto <bb 4>; [INV]
else
goto <bb 5>; [INV]
<bb 4> :
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsie i");
<bb 5> :
return;
}
SchM_Enter_Mcu_MCU_EXCLUSIVE_AREA_02 ()
{
uint32 u32CoreId;
<bb 2> :
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId = (uint32) _1;
# DEBUG BEGIN_STMT
_2 = reentry_guard_MCU_EXCLUSIVE_AREA_02[u32CoreId];
if (_2 == 0)
goto <bb 3>; [INV]
else
goto <bb 5>; [INV]
<bb 3> :
# DEBUG BEGIN_STMT
_3 = Mcu_schm_read_msr ();
msr_MCU_EXCLUSIVE_AREA_02[u32CoreId] = _3;
# DEBUG BEGIN_STMT
_4 = msr_MCU_EXCLUSIVE_AREA_02[u32CoreId];
_5 = _4 & 1;
if (_5 == 0)
goto <bb 4>; [INV]
else
goto <bb 5>; [INV]
<bb 4> :
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsid i");
<bb 5> :
# DEBUG BEGIN_STMT
_6 = reentry_guard_MCU_EXCLUSIVE_AREA_02[u32CoreId];
_7 = _6 + 1;
reentry_guard_MCU_EXCLUSIVE_AREA_02[u32CoreId] = _7;
return;
}
SchM_Exit_Mcu_MCU_EXCLUSIVE_AREA_01 ()
{
uint32 u32CoreId;
<bb 2> :
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId = (uint32) _1;
# DEBUG BEGIN_STMT
_2 = reentry_guard_MCU_EXCLUSIVE_AREA_01[u32CoreId];
_3 = _2 + 4294967295;
reentry_guard_MCU_EXCLUSIVE_AREA_01[u32CoreId] = _3;
# DEBUG BEGIN_STMT
_4 = msr_MCU_EXCLUSIVE_AREA_01[u32CoreId];
_5 = _4 & 1;
if (_5 == 0)
goto <bb 3>; [INV]
else
goto <bb 5>; [INV]
<bb 3> :
_6 = reentry_guard_MCU_EXCLUSIVE_AREA_01[u32CoreId];
if (_6 == 0)
goto <bb 4>; [INV]
else
goto <bb 5>; [INV]
<bb 4> :
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsie i");
<bb 5> :
return;
}
SchM_Enter_Mcu_MCU_EXCLUSIVE_AREA_01 ()
{
uint32 u32CoreId;
<bb 2> :
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId = (uint32) _1;
# DEBUG BEGIN_STMT
_2 = reentry_guard_MCU_EXCLUSIVE_AREA_01[u32CoreId];
if (_2 == 0)
goto <bb 3>; [INV]
else
goto <bb 5>; [INV]
<bb 3> :
# DEBUG BEGIN_STMT
_3 = Mcu_schm_read_msr ();
msr_MCU_EXCLUSIVE_AREA_01[u32CoreId] = _3;
# DEBUG BEGIN_STMT
_4 = msr_MCU_EXCLUSIVE_AREA_01[u32CoreId];
_5 = _4 & 1;
if (_5 == 0)
goto <bb 4>; [INV]
else
goto <bb 5>; [INV]
<bb 4> :
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsid i");
<bb 5> :
# DEBUG BEGIN_STMT
_6 = reentry_guard_MCU_EXCLUSIVE_AREA_01[u32CoreId];
_7 = _6 + 1;
reentry_guard_MCU_EXCLUSIVE_AREA_01[u32CoreId] = _7;
return;
}
SchM_Exit_Mcu_MCU_EXCLUSIVE_AREA_00 ()
{
uint32 u32CoreId;
<bb 2> :
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId = (uint32) _1;
# DEBUG BEGIN_STMT
_2 = reentry_guard_MCU_EXCLUSIVE_AREA_00[u32CoreId];
_3 = _2 + 4294967295;
reentry_guard_MCU_EXCLUSIVE_AREA_00[u32CoreId] = _3;
# DEBUG BEGIN_STMT
_4 = msr_MCU_EXCLUSIVE_AREA_00[u32CoreId];
_5 = _4 & 1;
if (_5 == 0)
goto <bb 3>; [INV]
else
goto <bb 5>; [INV]
<bb 3> :
_6 = reentry_guard_MCU_EXCLUSIVE_AREA_00[u32CoreId];
if (_6 == 0)
goto <bb 4>; [INV]
else
goto <bb 5>; [INV]
<bb 4> :
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsie i");
<bb 5> :
return;
}
SchM_Enter_Mcu_MCU_EXCLUSIVE_AREA_00 ()
{
uint32 u32CoreId;
<bb 2> :
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId = (uint32) _1;
# DEBUG BEGIN_STMT
_2 = reentry_guard_MCU_EXCLUSIVE_AREA_00[u32CoreId];
if (_2 == 0)
goto <bb 3>; [INV]
else
goto <bb 5>; [INV]
<bb 3> :
# DEBUG BEGIN_STMT
_3 = Mcu_schm_read_msr ();
msr_MCU_EXCLUSIVE_AREA_00[u32CoreId] = _3;
# DEBUG BEGIN_STMT
_4 = msr_MCU_EXCLUSIVE_AREA_00[u32CoreId];
_5 = _4 & 1;
if (_5 == 0)
goto <bb 4>; [INV]
else
goto <bb 5>; [INV]
<bb 4> :
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsid i");
<bb 5> :
# DEBUG BEGIN_STMT
_6 = reentry_guard_MCU_EXCLUSIVE_AREA_00[u32CoreId];
_7 = _6 + 1;
reentry_guard_MCU_EXCLUSIVE_AREA_00[u32CoreId] = _7;
return;
}
Mcu_schm_read_msr ()
{
register uint32 reg_tmp;
uint32 D.4126;
<bb 2> :
# DEBUG BEGIN_STMT
# DEBUG BEGIN_STMT
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp);
# DEBUG BEGIN_STMT
D.4126 = reg_tmp;
return D.4126;
}
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