smbae/ADM
1
0
Fork 0
mirror of https://github.com/Dev-KATECH/ADM.git synced 2026-05-17 01:43:59 +09:00
Code Issues Actions Packages Projects Releases Wiki Activity
Workspace
ADM/GW/Debug_RAM/RTD/src/SchM_Mcl.c.048i.remove_symbols
S2-CHICKEN 77297108b6 VCU C code first commit
2024-08-08 10:00:15 +09:00

6197 lines
209 KiB
Plaintext
Raw Permalink Blame History

Reclaiming functions:
Reclaiming variables:
Clearing address taken flags:
Symbol table:
Sys_GetCoreID/189 (Sys_GetCoreID) @06aab0e0
Type: function
Visibility: external public
References:
Referring:
Availability: not_available
Function flags: optimize_size
Called by: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_46/188 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_46/187 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_45/186 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_45/185 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_44/184 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_44/183 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_43/182 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_43/181 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_42/180 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_42/179 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_41/178 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_41/177 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_40/176 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_40/175 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_39/174 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_39/173 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_38/172 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_38/171 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_37/170 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_37/169 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_36/168 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_36/167 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_35/166 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_35/165 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_34/164 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_34/163 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_33/162 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_33/161 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_32/160 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_32/159 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_31/158 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_31/157 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_30/156 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_30/155 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_29/154 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_29/153 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_28/152 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_28/151 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_27/150 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_27/149 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_26/148 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_26/147 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_25/146 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_25/145 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_24/144 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_24/143 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_23/142 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_23/141 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_22/140 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_22/139 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_21/138 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_21/137 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_20/136 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_20/135 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_19/134 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_19/133 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_18/132 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_18/131 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_17/130 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_17/129 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_16/128 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_16/127 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_15/126 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_15/125 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_14/124 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_14/123 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_13/122 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_13/121 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_12/120 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_12/119 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_11/118 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_11/117 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_10/116 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_10/115 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_09/114 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_09/113 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_08/112 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_08/111 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_07/110 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_07/109 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_06/108 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_06/107 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_05/106 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_05/105 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_04/104 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_04/103 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_03/102 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_03/101 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_02/100 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_02/99 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_01/98 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_01/97 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_00/96 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_00/95 (1073741824 (estimated locally),1.00 per call)
Calls:
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_46/188 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_46) @06a1c2a0
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_46/93 (read)reentry_guard_MCL_EXCLUSIVE_AREA_46/93 (write)msr_MCL_EXCLUSIVE_AREA_46/92 (read)reentry_guard_MCL_EXCLUSIVE_AREA_46/93 (read)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_46/187 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_46) @06a1cee0
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_46/93 (read)msr_MCL_EXCLUSIVE_AREA_46/92 (write)msr_MCL_EXCLUSIVE_AREA_46/92 (read)reentry_guard_MCL_EXCLUSIVE_AREA_46/93 (read)reentry_guard_MCL_EXCLUSIVE_AREA_46/93 (write)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_45/186 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_45) @06a1cc40
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_45/91 (read)reentry_guard_MCL_EXCLUSIVE_AREA_45/91 (write)msr_MCL_EXCLUSIVE_AREA_45/90 (read)reentry_guard_MCL_EXCLUSIVE_AREA_45/91 (read)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_45/185 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_45) @06a1c9a0
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_45/91 (read)msr_MCL_EXCLUSIVE_AREA_45/90 (write)msr_MCL_EXCLUSIVE_AREA_45/90 (read)reentry_guard_MCL_EXCLUSIVE_AREA_45/91 (read)reentry_guard_MCL_EXCLUSIVE_AREA_45/91 (write)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_44/184 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_44) @06a1c700
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_44/89 (read)reentry_guard_MCL_EXCLUSIVE_AREA_44/89 (write)msr_MCL_EXCLUSIVE_AREA_44/88 (read)reentry_guard_MCL_EXCLUSIVE_AREA_44/89 (read)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_44/183 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_44) @06a1c460
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_44/89 (read)msr_MCL_EXCLUSIVE_AREA_44/88 (write)msr_MCL_EXCLUSIVE_AREA_44/88 (read)reentry_guard_MCL_EXCLUSIVE_AREA_44/89 (read)reentry_guard_MCL_EXCLUSIVE_AREA_44/89 (write)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_43/182 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_43) @06a1c1c0
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_43/87 (read)reentry_guard_MCL_EXCLUSIVE_AREA_43/87 (write)msr_MCL_EXCLUSIVE_AREA_43/86 (read)reentry_guard_MCL_EXCLUSIVE_AREA_43/87 (read)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_43/181 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_43) @06a14d20
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_43/87 (read)msr_MCL_EXCLUSIVE_AREA_43/86 (write)msr_MCL_EXCLUSIVE_AREA_43/86 (read)reentry_guard_MCL_EXCLUSIVE_AREA_43/87 (read)reentry_guard_MCL_EXCLUSIVE_AREA_43/87 (write)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_42/180 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_42) @06a147e0
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_42/85 (read)reentry_guard_MCL_EXCLUSIVE_AREA_42/85 (write)msr_MCL_EXCLUSIVE_AREA_42/84 (read)reentry_guard_MCL_EXCLUSIVE_AREA_42/85 (read)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_42/179 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_42) @06a142a0
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_42/85 (read)msr_MCL_EXCLUSIVE_AREA_42/84 (write)msr_MCL_EXCLUSIVE_AREA_42/84 (read)reentry_guard_MCL_EXCLUSIVE_AREA_42/85 (read)reentry_guard_MCL_EXCLUSIVE_AREA_42/85 (write)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_41/178 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_41) @06a14ee0
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_41/83 (read)reentry_guard_MCL_EXCLUSIVE_AREA_41/83 (write)msr_MCL_EXCLUSIVE_AREA_41/82 (read)reentry_guard_MCL_EXCLUSIVE_AREA_41/83 (read)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_41/177 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_41) @06a14c40
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_41/83 (read)msr_MCL_EXCLUSIVE_AREA_41/82 (write)msr_MCL_EXCLUSIVE_AREA_41/82 (read)reentry_guard_MCL_EXCLUSIVE_AREA_41/83 (read)reentry_guard_MCL_EXCLUSIVE_AREA_41/83 (write)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_40/176 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_40) @06a149a0
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_40/81 (read)reentry_guard_MCL_EXCLUSIVE_AREA_40/81 (write)msr_MCL_EXCLUSIVE_AREA_40/80 (read)reentry_guard_MCL_EXCLUSIVE_AREA_40/81 (read)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_40/175 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_40) @06a14700
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_40/81 (read)msr_MCL_EXCLUSIVE_AREA_40/80 (write)msr_MCL_EXCLUSIVE_AREA_40/80 (read)reentry_guard_MCL_EXCLUSIVE_AREA_40/81 (read)reentry_guard_MCL_EXCLUSIVE_AREA_40/81 (write)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_39/174 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_39) @06a14460
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_39/79 (read)reentry_guard_MCL_EXCLUSIVE_AREA_39/79 (write)msr_MCL_EXCLUSIVE_AREA_39/78 (read)reentry_guard_MCL_EXCLUSIVE_AREA_39/79 (read)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_39/173 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_39) @06a141c0
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_39/79 (read)msr_MCL_EXCLUSIVE_AREA_39/78 (write)msr_MCL_EXCLUSIVE_AREA_39/78 (read)reentry_guard_MCL_EXCLUSIVE_AREA_39/79 (read)reentry_guard_MCL_EXCLUSIVE_AREA_39/79 (write)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_38/172 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_38) @06a0ed20
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_38/77 (read)reentry_guard_MCL_EXCLUSIVE_AREA_38/77 (write)msr_MCL_EXCLUSIVE_AREA_38/76 (read)reentry_guard_MCL_EXCLUSIVE_AREA_38/77 (read)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_38/171 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_38) @06a0e7e0
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_38/77 (read)msr_MCL_EXCLUSIVE_AREA_38/76 (write)msr_MCL_EXCLUSIVE_AREA_38/76 (read)reentry_guard_MCL_EXCLUSIVE_AREA_38/77 (read)reentry_guard_MCL_EXCLUSIVE_AREA_38/77 (write)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_37/170 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_37) @06a0e2a0
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_37/75 (read)reentry_guard_MCL_EXCLUSIVE_AREA_37/75 (write)msr_MCL_EXCLUSIVE_AREA_37/74 (read)reentry_guard_MCL_EXCLUSIVE_AREA_37/75 (read)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_37/169 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_37) @06a0eee0
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_37/75 (read)msr_MCL_EXCLUSIVE_AREA_37/74 (write)msr_MCL_EXCLUSIVE_AREA_37/74 (read)reentry_guard_MCL_EXCLUSIVE_AREA_37/75 (read)reentry_guard_MCL_EXCLUSIVE_AREA_37/75 (write)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_36/168 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_36) @06a0ec40
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_36/73 (read)reentry_guard_MCL_EXCLUSIVE_AREA_36/73 (write)msr_MCL_EXCLUSIVE_AREA_36/72 (read)reentry_guard_MCL_EXCLUSIVE_AREA_36/73 (read)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_36/167 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_36) @06a0e9a0
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_36/73 (read)msr_MCL_EXCLUSIVE_AREA_36/72 (write)msr_MCL_EXCLUSIVE_AREA_36/72 (read)reentry_guard_MCL_EXCLUSIVE_AREA_36/73 (read)reentry_guard_MCL_EXCLUSIVE_AREA_36/73 (write)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_35/166 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_35) @06a0e700
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_35/71 (read)reentry_guard_MCL_EXCLUSIVE_AREA_35/71 (write)msr_MCL_EXCLUSIVE_AREA_35/70 (read)reentry_guard_MCL_EXCLUSIVE_AREA_35/71 (read)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_35/165 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_35) @06a0e460
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_35/71 (read)msr_MCL_EXCLUSIVE_AREA_35/70 (write)msr_MCL_EXCLUSIVE_AREA_35/70 (read)reentry_guard_MCL_EXCLUSIVE_AREA_35/71 (read)reentry_guard_MCL_EXCLUSIVE_AREA_35/71 (write)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_34/164 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_34) @06a0e1c0
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_34/69 (read)reentry_guard_MCL_EXCLUSIVE_AREA_34/69 (write)msr_MCL_EXCLUSIVE_AREA_34/68 (read)reentry_guard_MCL_EXCLUSIVE_AREA_34/69 (read)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_34/163 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_34) @06a07d20
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_34/69 (read)msr_MCL_EXCLUSIVE_AREA_34/68 (write)msr_MCL_EXCLUSIVE_AREA_34/68 (read)reentry_guard_MCL_EXCLUSIVE_AREA_34/69 (read)reentry_guard_MCL_EXCLUSIVE_AREA_34/69 (write)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_33/162 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_33) @06a077e0
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_33/67 (read)reentry_guard_MCL_EXCLUSIVE_AREA_33/67 (write)msr_MCL_EXCLUSIVE_AREA_33/66 (read)reentry_guard_MCL_EXCLUSIVE_AREA_33/67 (read)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_33/161 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_33) @06a072a0
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_33/67 (read)msr_MCL_EXCLUSIVE_AREA_33/66 (write)msr_MCL_EXCLUSIVE_AREA_33/66 (read)reentry_guard_MCL_EXCLUSIVE_AREA_33/67 (read)reentry_guard_MCL_EXCLUSIVE_AREA_33/67 (write)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_32/160 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_32) @06a07ee0
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_32/65 (read)reentry_guard_MCL_EXCLUSIVE_AREA_32/65 (write)msr_MCL_EXCLUSIVE_AREA_32/64 (read)reentry_guard_MCL_EXCLUSIVE_AREA_32/65 (read)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_32/159 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_32) @06a07c40
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_32/65 (read)msr_MCL_EXCLUSIVE_AREA_32/64 (write)msr_MCL_EXCLUSIVE_AREA_32/64 (read)reentry_guard_MCL_EXCLUSIVE_AREA_32/65 (read)reentry_guard_MCL_EXCLUSIVE_AREA_32/65 (write)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_31/158 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_31) @06a079a0
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_31/63 (read)reentry_guard_MCL_EXCLUSIVE_AREA_31/63 (write)msr_MCL_EXCLUSIVE_AREA_31/62 (read)reentry_guard_MCL_EXCLUSIVE_AREA_31/63 (read)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_31/157 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_31) @06a07700
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_31/63 (read)msr_MCL_EXCLUSIVE_AREA_31/62 (write)msr_MCL_EXCLUSIVE_AREA_31/62 (read)reentry_guard_MCL_EXCLUSIVE_AREA_31/63 (read)reentry_guard_MCL_EXCLUSIVE_AREA_31/63 (write)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_30/156 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_30) @06a07460
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_30/61 (read)reentry_guard_MCL_EXCLUSIVE_AREA_30/61 (write)msr_MCL_EXCLUSIVE_AREA_30/60 (read)reentry_guard_MCL_EXCLUSIVE_AREA_30/61 (read)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_30/155 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_30) @06a071c0
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_30/61 (read)msr_MCL_EXCLUSIVE_AREA_30/60 (write)msr_MCL_EXCLUSIVE_AREA_30/60 (read)reentry_guard_MCL_EXCLUSIVE_AREA_30/61 (read)reentry_guard_MCL_EXCLUSIVE_AREA_30/61 (write)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_29/154 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_29) @069fcd20
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_29/59 (read)reentry_guard_MCL_EXCLUSIVE_AREA_29/59 (write)msr_MCL_EXCLUSIVE_AREA_29/58 (read)reentry_guard_MCL_EXCLUSIVE_AREA_29/59 (read)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_29/153 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_29) @069fc7e0
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_29/59 (read)msr_MCL_EXCLUSIVE_AREA_29/58 (write)msr_MCL_EXCLUSIVE_AREA_29/58 (read)reentry_guard_MCL_EXCLUSIVE_AREA_29/59 (read)reentry_guard_MCL_EXCLUSIVE_AREA_29/59 (write)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_28/152 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_28) @069fc2a0
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_28/57 (read)reentry_guard_MCL_EXCLUSIVE_AREA_28/57 (write)msr_MCL_EXCLUSIVE_AREA_28/56 (read)reentry_guard_MCL_EXCLUSIVE_AREA_28/57 (read)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_28/151 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_28) @069fcee0
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_28/57 (read)msr_MCL_EXCLUSIVE_AREA_28/56 (write)msr_MCL_EXCLUSIVE_AREA_28/56 (read)reentry_guard_MCL_EXCLUSIVE_AREA_28/57 (read)reentry_guard_MCL_EXCLUSIVE_AREA_28/57 (write)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_27/150 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_27) @069fcc40
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_27/55 (read)reentry_guard_MCL_EXCLUSIVE_AREA_27/55 (write)msr_MCL_EXCLUSIVE_AREA_27/54 (read)reentry_guard_MCL_EXCLUSIVE_AREA_27/55 (read)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_27/149 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_27) @069fc9a0
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_27/55 (read)msr_MCL_EXCLUSIVE_AREA_27/54 (write)msr_MCL_EXCLUSIVE_AREA_27/54 (read)reentry_guard_MCL_EXCLUSIVE_AREA_27/55 (read)reentry_guard_MCL_EXCLUSIVE_AREA_27/55 (write)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_26/148 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_26) @069fc700
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_26/53 (read)reentry_guard_MCL_EXCLUSIVE_AREA_26/53 (write)msr_MCL_EXCLUSIVE_AREA_26/52 (read)reentry_guard_MCL_EXCLUSIVE_AREA_26/53 (read)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_26/147 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_26) @069fc460
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_26/53 (read)msr_MCL_EXCLUSIVE_AREA_26/52 (write)msr_MCL_EXCLUSIVE_AREA_26/52 (read)reentry_guard_MCL_EXCLUSIVE_AREA_26/53 (read)reentry_guard_MCL_EXCLUSIVE_AREA_26/53 (write)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_25/146 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_25) @069fc1c0
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_25/51 (read)reentry_guard_MCL_EXCLUSIVE_AREA_25/51 (write)msr_MCL_EXCLUSIVE_AREA_25/50 (read)reentry_guard_MCL_EXCLUSIVE_AREA_25/51 (read)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_25/145 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_25) @069f5d20
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_25/51 (read)msr_MCL_EXCLUSIVE_AREA_25/50 (write)msr_MCL_EXCLUSIVE_AREA_25/50 (read)reentry_guard_MCL_EXCLUSIVE_AREA_25/51 (read)reentry_guard_MCL_EXCLUSIVE_AREA_25/51 (write)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_24/144 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_24) @069f57e0
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_24/49 (read)reentry_guard_MCL_EXCLUSIVE_AREA_24/49 (write)msr_MCL_EXCLUSIVE_AREA_24/48 (read)reentry_guard_MCL_EXCLUSIVE_AREA_24/49 (read)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_24/143 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_24) @069f52a0
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_24/49 (read)msr_MCL_EXCLUSIVE_AREA_24/48 (write)msr_MCL_EXCLUSIVE_AREA_24/48 (read)reentry_guard_MCL_EXCLUSIVE_AREA_24/49 (read)reentry_guard_MCL_EXCLUSIVE_AREA_24/49 (write)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_23/142 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_23) @069f5ee0
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_23/47 (read)reentry_guard_MCL_EXCLUSIVE_AREA_23/47 (write)msr_MCL_EXCLUSIVE_AREA_23/46 (read)reentry_guard_MCL_EXCLUSIVE_AREA_23/47 (read)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_23/141 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_23) @069f5c40
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_23/47 (read)msr_MCL_EXCLUSIVE_AREA_23/46 (write)msr_MCL_EXCLUSIVE_AREA_23/46 (read)reentry_guard_MCL_EXCLUSIVE_AREA_23/47 (read)reentry_guard_MCL_EXCLUSIVE_AREA_23/47 (write)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_22/140 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_22) @069f59a0
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_22/45 (read)reentry_guard_MCL_EXCLUSIVE_AREA_22/45 (write)msr_MCL_EXCLUSIVE_AREA_22/44 (read)reentry_guard_MCL_EXCLUSIVE_AREA_22/45 (read)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_22/139 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_22) @069f5700
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_22/45 (read)msr_MCL_EXCLUSIVE_AREA_22/44 (write)msr_MCL_EXCLUSIVE_AREA_22/44 (read)reentry_guard_MCL_EXCLUSIVE_AREA_22/45 (read)reentry_guard_MCL_EXCLUSIVE_AREA_22/45 (write)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_21/138 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_21) @069f5460
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_21/43 (read)reentry_guard_MCL_EXCLUSIVE_AREA_21/43 (write)msr_MCL_EXCLUSIVE_AREA_21/42 (read)reentry_guard_MCL_EXCLUSIVE_AREA_21/43 (read)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_21/137 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_21) @069f51c0
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_21/43 (read)msr_MCL_EXCLUSIVE_AREA_21/42 (write)msr_MCL_EXCLUSIVE_AREA_21/42 (read)reentry_guard_MCL_EXCLUSIVE_AREA_21/43 (read)reentry_guard_MCL_EXCLUSIVE_AREA_21/43 (write)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_20/136 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_20) @069edd20
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_20/41 (read)reentry_guard_MCL_EXCLUSIVE_AREA_20/41 (write)msr_MCL_EXCLUSIVE_AREA_20/40 (read)reentry_guard_MCL_EXCLUSIVE_AREA_20/41 (read)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_20/135 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_20) @069ed7e0
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_20/41 (read)msr_MCL_EXCLUSIVE_AREA_20/40 (write)msr_MCL_EXCLUSIVE_AREA_20/40 (read)reentry_guard_MCL_EXCLUSIVE_AREA_20/41 (read)reentry_guard_MCL_EXCLUSIVE_AREA_20/41 (write)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_19/134 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_19) @069ed2a0
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_19/39 (read)reentry_guard_MCL_EXCLUSIVE_AREA_19/39 (write)msr_MCL_EXCLUSIVE_AREA_19/38 (read)reentry_guard_MCL_EXCLUSIVE_AREA_19/39 (read)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_19/133 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_19) @069edee0
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_19/39 (read)msr_MCL_EXCLUSIVE_AREA_19/38 (write)msr_MCL_EXCLUSIVE_AREA_19/38 (read)reentry_guard_MCL_EXCLUSIVE_AREA_19/39 (read)reentry_guard_MCL_EXCLUSIVE_AREA_19/39 (write)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_18/132 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_18) @069edc40
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_18/37 (read)reentry_guard_MCL_EXCLUSIVE_AREA_18/37 (write)msr_MCL_EXCLUSIVE_AREA_18/36 (read)reentry_guard_MCL_EXCLUSIVE_AREA_18/37 (read)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_18/131 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_18) @069ed9a0
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_18/37 (read)msr_MCL_EXCLUSIVE_AREA_18/36 (write)msr_MCL_EXCLUSIVE_AREA_18/36 (read)reentry_guard_MCL_EXCLUSIVE_AREA_18/37 (read)reentry_guard_MCL_EXCLUSIVE_AREA_18/37 (write)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_17/130 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_17) @069ed700
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_17/35 (read)reentry_guard_MCL_EXCLUSIVE_AREA_17/35 (write)msr_MCL_EXCLUSIVE_AREA_17/34 (read)reentry_guard_MCL_EXCLUSIVE_AREA_17/35 (read)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_17/129 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_17) @069ed460
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_17/35 (read)msr_MCL_EXCLUSIVE_AREA_17/34 (write)msr_MCL_EXCLUSIVE_AREA_17/34 (read)reentry_guard_MCL_EXCLUSIVE_AREA_17/35 (read)reentry_guard_MCL_EXCLUSIVE_AREA_17/35 (write)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_16/128 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_16) @069ed1c0
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_16/33 (read)reentry_guard_MCL_EXCLUSIVE_AREA_16/33 (write)msr_MCL_EXCLUSIVE_AREA_16/32 (read)reentry_guard_MCL_EXCLUSIVE_AREA_16/33 (read)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_16/127 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_16) @069e7d20
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_16/33 (read)msr_MCL_EXCLUSIVE_AREA_16/32 (write)msr_MCL_EXCLUSIVE_AREA_16/32 (read)reentry_guard_MCL_EXCLUSIVE_AREA_16/33 (read)reentry_guard_MCL_EXCLUSIVE_AREA_16/33 (write)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_15/126 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_15) @069e77e0
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_15/31 (read)reentry_guard_MCL_EXCLUSIVE_AREA_15/31 (write)msr_MCL_EXCLUSIVE_AREA_15/30 (read)reentry_guard_MCL_EXCLUSIVE_AREA_15/31 (read)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_15/125 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_15) @069e72a0
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_15/31 (read)msr_MCL_EXCLUSIVE_AREA_15/30 (write)msr_MCL_EXCLUSIVE_AREA_15/30 (read)reentry_guard_MCL_EXCLUSIVE_AREA_15/31 (read)reentry_guard_MCL_EXCLUSIVE_AREA_15/31 (write)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_14/124 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_14) @069e7ee0
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_14/29 (read)reentry_guard_MCL_EXCLUSIVE_AREA_14/29 (write)msr_MCL_EXCLUSIVE_AREA_14/28 (read)reentry_guard_MCL_EXCLUSIVE_AREA_14/29 (read)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_14/123 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_14) @069e7c40
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_14/29 (read)msr_MCL_EXCLUSIVE_AREA_14/28 (write)msr_MCL_EXCLUSIVE_AREA_14/28 (read)reentry_guard_MCL_EXCLUSIVE_AREA_14/29 (read)reentry_guard_MCL_EXCLUSIVE_AREA_14/29 (write)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_13/122 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_13) @069e79a0
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_13/27 (read)reentry_guard_MCL_EXCLUSIVE_AREA_13/27 (write)msr_MCL_EXCLUSIVE_AREA_13/26 (read)reentry_guard_MCL_EXCLUSIVE_AREA_13/27 (read)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_13/121 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_13) @069e7700
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_13/27 (read)msr_MCL_EXCLUSIVE_AREA_13/26 (write)msr_MCL_EXCLUSIVE_AREA_13/26 (read)reentry_guard_MCL_EXCLUSIVE_AREA_13/27 (read)reentry_guard_MCL_EXCLUSIVE_AREA_13/27 (write)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_12/120 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_12) @069e7460
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_12/25 (read)reentry_guard_MCL_EXCLUSIVE_AREA_12/25 (write)msr_MCL_EXCLUSIVE_AREA_12/24 (read)reentry_guard_MCL_EXCLUSIVE_AREA_12/25 (read)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_12/119 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_12) @069e71c0
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_12/25 (read)msr_MCL_EXCLUSIVE_AREA_12/24 (write)msr_MCL_EXCLUSIVE_AREA_12/24 (read)reentry_guard_MCL_EXCLUSIVE_AREA_12/25 (read)reentry_guard_MCL_EXCLUSIVE_AREA_12/25 (write)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_11/118 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_11) @069ded20
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_11/23 (read)reentry_guard_MCL_EXCLUSIVE_AREA_11/23 (write)msr_MCL_EXCLUSIVE_AREA_11/22 (read)reentry_guard_MCL_EXCLUSIVE_AREA_11/23 (read)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_11/117 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_11) @069de7e0
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_11/23 (read)msr_MCL_EXCLUSIVE_AREA_11/22 (write)msr_MCL_EXCLUSIVE_AREA_11/22 (read)reentry_guard_MCL_EXCLUSIVE_AREA_11/23 (read)reentry_guard_MCL_EXCLUSIVE_AREA_11/23 (write)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_10/116 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_10) @069de2a0
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_10/21 (read)reentry_guard_MCL_EXCLUSIVE_AREA_10/21 (write)msr_MCL_EXCLUSIVE_AREA_10/20 (read)reentry_guard_MCL_EXCLUSIVE_AREA_10/21 (read)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_10/115 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_10) @069deee0
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_10/21 (read)msr_MCL_EXCLUSIVE_AREA_10/20 (write)msr_MCL_EXCLUSIVE_AREA_10/20 (read)reentry_guard_MCL_EXCLUSIVE_AREA_10/21 (read)reentry_guard_MCL_EXCLUSIVE_AREA_10/21 (write)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_09/114 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_09) @069dec40
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_09/19 (read)reentry_guard_MCL_EXCLUSIVE_AREA_09/19 (write)msr_MCL_EXCLUSIVE_AREA_09/18 (read)reentry_guard_MCL_EXCLUSIVE_AREA_09/19 (read)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_09/113 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_09) @069de9a0
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_09/19 (read)msr_MCL_EXCLUSIVE_AREA_09/18 (write)msr_MCL_EXCLUSIVE_AREA_09/18 (read)reentry_guard_MCL_EXCLUSIVE_AREA_09/19 (read)reentry_guard_MCL_EXCLUSIVE_AREA_09/19 (write)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_08/112 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_08) @069de700
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_08/17 (read)reentry_guard_MCL_EXCLUSIVE_AREA_08/17 (write)msr_MCL_EXCLUSIVE_AREA_08/16 (read)reentry_guard_MCL_EXCLUSIVE_AREA_08/17 (read)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_08/111 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_08) @069de460
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_08/17 (read)msr_MCL_EXCLUSIVE_AREA_08/16 (write)msr_MCL_EXCLUSIVE_AREA_08/16 (read)reentry_guard_MCL_EXCLUSIVE_AREA_08/17 (read)reentry_guard_MCL_EXCLUSIVE_AREA_08/17 (write)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_07/110 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_07) @069de1c0
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_07/15 (read)reentry_guard_MCL_EXCLUSIVE_AREA_07/15 (write)msr_MCL_EXCLUSIVE_AREA_07/14 (read)reentry_guard_MCL_EXCLUSIVE_AREA_07/15 (read)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_07/109 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_07) @069d6d20
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_07/15 (read)msr_MCL_EXCLUSIVE_AREA_07/14 (write)msr_MCL_EXCLUSIVE_AREA_07/14 (read)reentry_guard_MCL_EXCLUSIVE_AREA_07/15 (read)reentry_guard_MCL_EXCLUSIVE_AREA_07/15 (write)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_06/108 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_06) @069d67e0
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_06/13 (read)reentry_guard_MCL_EXCLUSIVE_AREA_06/13 (write)msr_MCL_EXCLUSIVE_AREA_06/12 (read)reentry_guard_MCL_EXCLUSIVE_AREA_06/13 (read)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_06/107 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_06) @069d62a0
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_06/13 (read)msr_MCL_EXCLUSIVE_AREA_06/12 (write)msr_MCL_EXCLUSIVE_AREA_06/12 (read)reentry_guard_MCL_EXCLUSIVE_AREA_06/13 (read)reentry_guard_MCL_EXCLUSIVE_AREA_06/13 (write)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_05/106 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_05) @069d6ee0
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_05/11 (read)reentry_guard_MCL_EXCLUSIVE_AREA_05/11 (write)msr_MCL_EXCLUSIVE_AREA_05/10 (read)reentry_guard_MCL_EXCLUSIVE_AREA_05/11 (read)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_05/105 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_05) @069d6c40
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_05/11 (read)msr_MCL_EXCLUSIVE_AREA_05/10 (write)msr_MCL_EXCLUSIVE_AREA_05/10 (read)reentry_guard_MCL_EXCLUSIVE_AREA_05/11 (read)reentry_guard_MCL_EXCLUSIVE_AREA_05/11 (write)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_04/104 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_04) @069d69a0
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_04/9 (read)reentry_guard_MCL_EXCLUSIVE_AREA_04/9 (write)msr_MCL_EXCLUSIVE_AREA_04/8 (read)reentry_guard_MCL_EXCLUSIVE_AREA_04/9 (read)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_04/103 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_04) @069d6700
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_04/9 (read)msr_MCL_EXCLUSIVE_AREA_04/8 (write)msr_MCL_EXCLUSIVE_AREA_04/8 (read)reentry_guard_MCL_EXCLUSIVE_AREA_04/9 (read)reentry_guard_MCL_EXCLUSIVE_AREA_04/9 (write)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_03/102 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_03) @069d6460
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_03/7 (read)reentry_guard_MCL_EXCLUSIVE_AREA_03/7 (write)msr_MCL_EXCLUSIVE_AREA_03/6 (read)reentry_guard_MCL_EXCLUSIVE_AREA_03/7 (read)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_03/101 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_03) @069d61c0
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_03/7 (read)msr_MCL_EXCLUSIVE_AREA_03/6 (write)msr_MCL_EXCLUSIVE_AREA_03/6 (read)reentry_guard_MCL_EXCLUSIVE_AREA_03/7 (read)reentry_guard_MCL_EXCLUSIVE_AREA_03/7 (write)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_02/100 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_02) @0694be00
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_02/5 (read)reentry_guard_MCL_EXCLUSIVE_AREA_02/5 (write)msr_MCL_EXCLUSIVE_AREA_02/4 (read)reentry_guard_MCL_EXCLUSIVE_AREA_02/5 (read)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_02/99 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_02) @0694b8c0
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_02/5 (read)msr_MCL_EXCLUSIVE_AREA_02/4 (write)msr_MCL_EXCLUSIVE_AREA_02/4 (read)reentry_guard_MCL_EXCLUSIVE_AREA_02/5 (read)reentry_guard_MCL_EXCLUSIVE_AREA_02/5 (write)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_01/98 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_01) @0694b380
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_01/3 (read)reentry_guard_MCL_EXCLUSIVE_AREA_01/3 (write)msr_MCL_EXCLUSIVE_AREA_01/2 (read)reentry_guard_MCL_EXCLUSIVE_AREA_01/3 (read)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_01/97 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_01) @0694bd20
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_01/3 (read)msr_MCL_EXCLUSIVE_AREA_01/2 (write)msr_MCL_EXCLUSIVE_AREA_01/2 (read)reentry_guard_MCL_EXCLUSIVE_AREA_01/3 (read)reentry_guard_MCL_EXCLUSIVE_AREA_01/3 (write)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_00/96 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_00) @0694ba80
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_00/1 (read)reentry_guard_MCL_EXCLUSIVE_AREA_00/1 (write)msr_MCL_EXCLUSIVE_AREA_00/0 (read)reentry_guard_MCL_EXCLUSIVE_AREA_00/1 (read)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_00/95 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_00) @0694b7e0
Type: function definition analyzed
Visibility: externally_visible public
References: reentry_guard_MCL_EXCLUSIVE_AREA_00/1 (read)msr_MCL_EXCLUSIVE_AREA_00/0 (write)msr_MCL_EXCLUSIVE_AREA_00/0 (read)reentry_guard_MCL_EXCLUSIVE_AREA_00/1 (read)reentry_guard_MCL_EXCLUSIVE_AREA_00/1 (write)
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls: Sys_GetCoreID/189 (1073741824 (estimated locally),1.00 per call)
Mcl_schm_read_msr/94 (Mcl_schm_read_msr) @0694b540
Type: function definition analyzed
Visibility: externally_visible public
References:
Referring:
Availability: available
Function flags: count:1073741824 (estimated locally) body optimize_size
Called by:
Calls:
reentry_guard_MCL_EXCLUSIVE_AREA_46/93 (reentry_guard_MCL_EXCLUSIVE_AREA_46) @0694a168
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_46/187 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_46/187 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_46/187 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_46/188 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_46/188 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_46/188 (read)
Availability: available
Varpool flags:
msr_MCL_EXCLUSIVE_AREA_46/92 (msr_MCL_EXCLUSIVE_AREA_46) @0694a0d8
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_46/187 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_46/187 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_46/188 (read)
Availability: available
Varpool flags:
reentry_guard_MCL_EXCLUSIVE_AREA_45/91 (reentry_guard_MCL_EXCLUSIVE_AREA_45) @0694a048
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_45/185 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_45/185 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_45/185 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_45/186 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_45/186 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_45/186 (read)
Availability: available
Varpool flags:
msr_MCL_EXCLUSIVE_AREA_45/90 (msr_MCL_EXCLUSIVE_AREA_45) @06946f78
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_45/185 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_45/185 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_45/186 (read)
Availability: available
Varpool flags:
reentry_guard_MCL_EXCLUSIVE_AREA_44/89 (reentry_guard_MCL_EXCLUSIVE_AREA_44) @06946ee8
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_44/183 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_44/183 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_44/183 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_44/184 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_44/184 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_44/184 (read)
Availability: available
Varpool flags:
msr_MCL_EXCLUSIVE_AREA_44/88 (msr_MCL_EXCLUSIVE_AREA_44) @06946e58
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_44/183 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_44/183 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_44/184 (read)
Availability: available
Varpool flags:
reentry_guard_MCL_EXCLUSIVE_AREA_43/87 (reentry_guard_MCL_EXCLUSIVE_AREA_43) @06946dc8
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_43/181 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_43/181 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_43/181 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_43/182 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_43/182 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_43/182 (read)
Availability: available
Varpool flags:
msr_MCL_EXCLUSIVE_AREA_43/86 (msr_MCL_EXCLUSIVE_AREA_43) @06946d38
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_43/181 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_43/181 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_43/182 (read)
Availability: available
Varpool flags:
reentry_guard_MCL_EXCLUSIVE_AREA_42/85 (reentry_guard_MCL_EXCLUSIVE_AREA_42) @06946ca8
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_42/179 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_42/179 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_42/179 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_42/180 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_42/180 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_42/180 (read)
Availability: available
Varpool flags:
msr_MCL_EXCLUSIVE_AREA_42/84 (msr_MCL_EXCLUSIVE_AREA_42) @06946c18
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_42/179 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_42/179 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_42/180 (read)
Availability: available
Varpool flags:
reentry_guard_MCL_EXCLUSIVE_AREA_41/83 (reentry_guard_MCL_EXCLUSIVE_AREA_41) @06946b88
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_41/177 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_41/177 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_41/177 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_41/178 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_41/178 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_41/178 (read)
Availability: available
Varpool flags:
msr_MCL_EXCLUSIVE_AREA_41/82 (msr_MCL_EXCLUSIVE_AREA_41) @06946af8
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_41/177 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_41/177 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_41/178 (read)
Availability: available
Varpool flags:
reentry_guard_MCL_EXCLUSIVE_AREA_40/81 (reentry_guard_MCL_EXCLUSIVE_AREA_40) @06946a68
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_40/175 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_40/175 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_40/175 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_40/176 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_40/176 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_40/176 (read)
Availability: available
Varpool flags:
msr_MCL_EXCLUSIVE_AREA_40/80 (msr_MCL_EXCLUSIVE_AREA_40) @069469d8
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_40/175 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_40/175 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_40/176 (read)
Availability: available
Varpool flags:
reentry_guard_MCL_EXCLUSIVE_AREA_39/79 (reentry_guard_MCL_EXCLUSIVE_AREA_39) @06946948
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_39/173 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_39/173 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_39/173 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_39/174 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_39/174 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_39/174 (read)
Availability: available
Varpool flags:
msr_MCL_EXCLUSIVE_AREA_39/78 (msr_MCL_EXCLUSIVE_AREA_39) @069468b8
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_39/173 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_39/173 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_39/174 (read)
Availability: available
Varpool flags:
reentry_guard_MCL_EXCLUSIVE_AREA_38/77 (reentry_guard_MCL_EXCLUSIVE_AREA_38) @06946828
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_38/171 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_38/171 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_38/171 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_38/172 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_38/172 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_38/172 (read)
Availability: available
Varpool flags:
msr_MCL_EXCLUSIVE_AREA_38/76 (msr_MCL_EXCLUSIVE_AREA_38) @06946798
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_38/171 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_38/171 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_38/172 (read)
Availability: available
Varpool flags:
reentry_guard_MCL_EXCLUSIVE_AREA_37/75 (reentry_guard_MCL_EXCLUSIVE_AREA_37) @06946708
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_37/169 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_37/169 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_37/169 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_37/170 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_37/170 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_37/170 (read)
Availability: available
Varpool flags:
msr_MCL_EXCLUSIVE_AREA_37/74 (msr_MCL_EXCLUSIVE_AREA_37) @06946678
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_37/169 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_37/169 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_37/170 (read)
Availability: available
Varpool flags:
reentry_guard_MCL_EXCLUSIVE_AREA_36/73 (reentry_guard_MCL_EXCLUSIVE_AREA_36) @069465e8
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_36/167 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_36/167 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_36/167 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_36/168 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_36/168 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_36/168 (read)
Availability: available
Varpool flags:
msr_MCL_EXCLUSIVE_AREA_36/72 (msr_MCL_EXCLUSIVE_AREA_36) @06946558
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_36/167 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_36/167 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_36/168 (read)
Availability: available
Varpool flags:
reentry_guard_MCL_EXCLUSIVE_AREA_35/71 (reentry_guard_MCL_EXCLUSIVE_AREA_35) @069464c8
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_35/165 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_35/165 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_35/165 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_35/166 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_35/166 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_35/166 (read)
Availability: available
Varpool flags:
msr_MCL_EXCLUSIVE_AREA_35/70 (msr_MCL_EXCLUSIVE_AREA_35) @06946438
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_35/165 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_35/165 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_35/166 (read)
Availability: available
Varpool flags:
reentry_guard_MCL_EXCLUSIVE_AREA_34/69 (reentry_guard_MCL_EXCLUSIVE_AREA_34) @069463a8
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_34/163 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_34/163 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_34/163 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_34/164 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_34/164 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_34/164 (read)
Availability: available
Varpool flags:
msr_MCL_EXCLUSIVE_AREA_34/68 (msr_MCL_EXCLUSIVE_AREA_34) @06946318
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_34/163 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_34/163 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_34/164 (read)
Availability: available
Varpool flags:
reentry_guard_MCL_EXCLUSIVE_AREA_33/67 (reentry_guard_MCL_EXCLUSIVE_AREA_33) @06946288
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_33/161 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_33/161 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_33/161 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_33/162 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_33/162 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_33/162 (read)
Availability: available
Varpool flags:
msr_MCL_EXCLUSIVE_AREA_33/66 (msr_MCL_EXCLUSIVE_AREA_33) @069461f8
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_33/161 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_33/161 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_33/162 (read)
Availability: available
Varpool flags:
reentry_guard_MCL_EXCLUSIVE_AREA_32/65 (reentry_guard_MCL_EXCLUSIVE_AREA_32) @06946168
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_32/159 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_32/159 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_32/159 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_32/160 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_32/160 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_32/160 (read)
Availability: available
Varpool flags:
msr_MCL_EXCLUSIVE_AREA_32/64 (msr_MCL_EXCLUSIVE_AREA_32) @069460d8
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_32/159 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_32/159 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_32/160 (read)
Availability: available
Varpool flags:
reentry_guard_MCL_EXCLUSIVE_AREA_31/63 (reentry_guard_MCL_EXCLUSIVE_AREA_31) @06946048
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_31/157 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_31/157 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_31/157 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_31/158 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_31/158 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_31/158 (read)
Availability: available
Varpool flags:
msr_MCL_EXCLUSIVE_AREA_31/62 (msr_MCL_EXCLUSIVE_AREA_31) @06941f78
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_31/157 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_31/157 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_31/158 (read)
Availability: available
Varpool flags:
reentry_guard_MCL_EXCLUSIVE_AREA_30/61 (reentry_guard_MCL_EXCLUSIVE_AREA_30) @06941ee8
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_30/155 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_30/155 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_30/155 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_30/156 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_30/156 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_30/156 (read)
Availability: available
Varpool flags:
msr_MCL_EXCLUSIVE_AREA_30/60 (msr_MCL_EXCLUSIVE_AREA_30) @06941e58
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_30/155 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_30/155 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_30/156 (read)
Availability: available
Varpool flags:
reentry_guard_MCL_EXCLUSIVE_AREA_29/59 (reentry_guard_MCL_EXCLUSIVE_AREA_29) @06941dc8
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_29/153 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_29/153 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_29/153 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_29/154 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_29/154 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_29/154 (read)
Availability: available
Varpool flags:
msr_MCL_EXCLUSIVE_AREA_29/58 (msr_MCL_EXCLUSIVE_AREA_29) @06941d38
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_29/153 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_29/153 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_29/154 (read)
Availability: available
Varpool flags:
reentry_guard_MCL_EXCLUSIVE_AREA_28/57 (reentry_guard_MCL_EXCLUSIVE_AREA_28) @06941ca8
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_28/151 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_28/151 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_28/151 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_28/152 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_28/152 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_28/152 (read)
Availability: available
Varpool flags:
msr_MCL_EXCLUSIVE_AREA_28/56 (msr_MCL_EXCLUSIVE_AREA_28) @06941c18
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_28/151 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_28/151 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_28/152 (read)
Availability: available
Varpool flags:
reentry_guard_MCL_EXCLUSIVE_AREA_27/55 (reentry_guard_MCL_EXCLUSIVE_AREA_27) @06941b88
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_27/149 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_27/149 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_27/149 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_27/150 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_27/150 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_27/150 (read)
Availability: available
Varpool flags:
msr_MCL_EXCLUSIVE_AREA_27/54 (msr_MCL_EXCLUSIVE_AREA_27) @06941af8
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_27/149 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_27/149 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_27/150 (read)
Availability: available
Varpool flags:
reentry_guard_MCL_EXCLUSIVE_AREA_26/53 (reentry_guard_MCL_EXCLUSIVE_AREA_26) @06941a68
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_26/147 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_26/147 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_26/147 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_26/148 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_26/148 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_26/148 (read)
Availability: available
Varpool flags:
msr_MCL_EXCLUSIVE_AREA_26/52 (msr_MCL_EXCLUSIVE_AREA_26) @069419d8
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_26/147 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_26/147 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_26/148 (read)
Availability: available
Varpool flags:
reentry_guard_MCL_EXCLUSIVE_AREA_25/51 (reentry_guard_MCL_EXCLUSIVE_AREA_25) @06941948
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_25/145 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_25/145 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_25/145 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_25/146 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_25/146 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_25/146 (read)
Availability: available
Varpool flags:
msr_MCL_EXCLUSIVE_AREA_25/50 (msr_MCL_EXCLUSIVE_AREA_25) @069418b8
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_25/145 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_25/145 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_25/146 (read)
Availability: available
Varpool flags:
reentry_guard_MCL_EXCLUSIVE_AREA_24/49 (reentry_guard_MCL_EXCLUSIVE_AREA_24) @06941828
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_24/143 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_24/143 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_24/143 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_24/144 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_24/144 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_24/144 (read)
Availability: available
Varpool flags:
msr_MCL_EXCLUSIVE_AREA_24/48 (msr_MCL_EXCLUSIVE_AREA_24) @06941798
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_24/143 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_24/143 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_24/144 (read)
Availability: available
Varpool flags:
reentry_guard_MCL_EXCLUSIVE_AREA_23/47 (reentry_guard_MCL_EXCLUSIVE_AREA_23) @06941708
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_23/141 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_23/141 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_23/141 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_23/142 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_23/142 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_23/142 (read)
Availability: available
Varpool flags:
msr_MCL_EXCLUSIVE_AREA_23/46 (msr_MCL_EXCLUSIVE_AREA_23) @06941678
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_23/141 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_23/141 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_23/142 (read)
Availability: available
Varpool flags:
reentry_guard_MCL_EXCLUSIVE_AREA_22/45 (reentry_guard_MCL_EXCLUSIVE_AREA_22) @069415e8
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_22/139 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_22/139 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_22/139 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_22/140 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_22/140 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_22/140 (read)
Availability: available
Varpool flags:
msr_MCL_EXCLUSIVE_AREA_22/44 (msr_MCL_EXCLUSIVE_AREA_22) @06941558
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_22/139 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_22/139 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_22/140 (read)
Availability: available
Varpool flags:
reentry_guard_MCL_EXCLUSIVE_AREA_21/43 (reentry_guard_MCL_EXCLUSIVE_AREA_21) @069414c8
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_21/137 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_21/137 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_21/137 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_21/138 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_21/138 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_21/138 (read)
Availability: available
Varpool flags:
msr_MCL_EXCLUSIVE_AREA_21/42 (msr_MCL_EXCLUSIVE_AREA_21) @06941438
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_21/137 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_21/137 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_21/138 (read)
Availability: available
Varpool flags:
reentry_guard_MCL_EXCLUSIVE_AREA_20/41 (reentry_guard_MCL_EXCLUSIVE_AREA_20) @069413a8
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_20/135 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_20/135 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_20/135 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_20/136 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_20/136 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_20/136 (read)
Availability: available
Varpool flags:
msr_MCL_EXCLUSIVE_AREA_20/40 (msr_MCL_EXCLUSIVE_AREA_20) @06941318
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_20/135 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_20/135 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_20/136 (read)
Availability: available
Varpool flags:
reentry_guard_MCL_EXCLUSIVE_AREA_19/39 (reentry_guard_MCL_EXCLUSIVE_AREA_19) @06941288
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_19/133 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_19/133 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_19/133 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_19/134 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_19/134 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_19/134 (read)
Availability: available
Varpool flags:
msr_MCL_EXCLUSIVE_AREA_19/38 (msr_MCL_EXCLUSIVE_AREA_19) @069411f8
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_19/133 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_19/133 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_19/134 (read)
Availability: available
Varpool flags:
reentry_guard_MCL_EXCLUSIVE_AREA_18/37 (reentry_guard_MCL_EXCLUSIVE_AREA_18) @06941168
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_18/131 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_18/131 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_18/131 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_18/132 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_18/132 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_18/132 (read)
Availability: available
Varpool flags:
msr_MCL_EXCLUSIVE_AREA_18/36 (msr_MCL_EXCLUSIVE_AREA_18) @069410d8
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_18/131 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_18/131 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_18/132 (read)
Availability: available
Varpool flags:
reentry_guard_MCL_EXCLUSIVE_AREA_17/35 (reentry_guard_MCL_EXCLUSIVE_AREA_17) @06941048
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_17/129 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_17/129 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_17/129 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_17/130 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_17/130 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_17/130 (read)
Availability: available
Varpool flags:
msr_MCL_EXCLUSIVE_AREA_17/34 (msr_MCL_EXCLUSIVE_AREA_17) @068faf78
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_17/129 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_17/129 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_17/130 (read)
Availability: available
Varpool flags:
reentry_guard_MCL_EXCLUSIVE_AREA_16/33 (reentry_guard_MCL_EXCLUSIVE_AREA_16) @068faee8
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_16/127 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_16/127 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_16/127 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_16/128 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_16/128 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_16/128 (read)
Availability: available
Varpool flags:
msr_MCL_EXCLUSIVE_AREA_16/32 (msr_MCL_EXCLUSIVE_AREA_16) @068fae58
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_16/127 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_16/127 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_16/128 (read)
Availability: available
Varpool flags:
reentry_guard_MCL_EXCLUSIVE_AREA_15/31 (reentry_guard_MCL_EXCLUSIVE_AREA_15) @068fadc8
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_15/125 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_15/125 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_15/125 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_15/126 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_15/126 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_15/126 (read)
Availability: available
Varpool flags:
msr_MCL_EXCLUSIVE_AREA_15/30 (msr_MCL_EXCLUSIVE_AREA_15) @068fad38
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_15/125 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_15/125 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_15/126 (read)
Availability: available
Varpool flags:
reentry_guard_MCL_EXCLUSIVE_AREA_14/29 (reentry_guard_MCL_EXCLUSIVE_AREA_14) @068faca8
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_14/123 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_14/123 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_14/123 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_14/124 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_14/124 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_14/124 (read)
Availability: available
Varpool flags:
msr_MCL_EXCLUSIVE_AREA_14/28 (msr_MCL_EXCLUSIVE_AREA_14) @068fac18
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_14/123 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_14/123 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_14/124 (read)
Availability: available
Varpool flags:
reentry_guard_MCL_EXCLUSIVE_AREA_13/27 (reentry_guard_MCL_EXCLUSIVE_AREA_13) @068fab88
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_13/121 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_13/121 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_13/121 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_13/122 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_13/122 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_13/122 (read)
Availability: available
Varpool flags:
msr_MCL_EXCLUSIVE_AREA_13/26 (msr_MCL_EXCLUSIVE_AREA_13) @068faaf8
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_13/121 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_13/121 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_13/122 (read)
Availability: available
Varpool flags:
reentry_guard_MCL_EXCLUSIVE_AREA_12/25 (reentry_guard_MCL_EXCLUSIVE_AREA_12) @068faa68
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_12/119 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_12/119 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_12/119 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_12/120 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_12/120 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_12/120 (read)
Availability: available
Varpool flags:
msr_MCL_EXCLUSIVE_AREA_12/24 (msr_MCL_EXCLUSIVE_AREA_12) @068fa9d8
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_12/119 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_12/119 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_12/120 (read)
Availability: available
Varpool flags:
reentry_guard_MCL_EXCLUSIVE_AREA_11/23 (reentry_guard_MCL_EXCLUSIVE_AREA_11) @068fa948
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_11/117 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_11/117 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_11/117 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_11/118 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_11/118 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_11/118 (read)
Availability: available
Varpool flags:
msr_MCL_EXCLUSIVE_AREA_11/22 (msr_MCL_EXCLUSIVE_AREA_11) @068fa8b8
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_11/117 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_11/117 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_11/118 (read)
Availability: available
Varpool flags:
reentry_guard_MCL_EXCLUSIVE_AREA_10/21 (reentry_guard_MCL_EXCLUSIVE_AREA_10) @068fa828
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_10/115 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_10/115 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_10/115 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_10/116 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_10/116 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_10/116 (read)
Availability: available
Varpool flags:
msr_MCL_EXCLUSIVE_AREA_10/20 (msr_MCL_EXCLUSIVE_AREA_10) @068fa798
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_10/115 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_10/115 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_10/116 (read)
Availability: available
Varpool flags:
reentry_guard_MCL_EXCLUSIVE_AREA_09/19 (reentry_guard_MCL_EXCLUSIVE_AREA_09) @068fa708
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_09/113 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_09/113 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_09/113 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_09/114 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_09/114 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_09/114 (read)
Availability: available
Varpool flags:
msr_MCL_EXCLUSIVE_AREA_09/18 (msr_MCL_EXCLUSIVE_AREA_09) @068fa678
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_09/113 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_09/113 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_09/114 (read)
Availability: available
Varpool flags:
reentry_guard_MCL_EXCLUSIVE_AREA_08/17 (reentry_guard_MCL_EXCLUSIVE_AREA_08) @068fa5e8
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_08/111 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_08/111 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_08/111 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_08/112 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_08/112 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_08/112 (read)
Availability: available
Varpool flags:
msr_MCL_EXCLUSIVE_AREA_08/16 (msr_MCL_EXCLUSIVE_AREA_08) @068fa558
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_08/111 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_08/111 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_08/112 (read)
Availability: available
Varpool flags:
reentry_guard_MCL_EXCLUSIVE_AREA_07/15 (reentry_guard_MCL_EXCLUSIVE_AREA_07) @068fa4c8
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_07/109 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_07/109 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_07/109 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_07/110 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_07/110 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_07/110 (read)
Availability: available
Varpool flags:
msr_MCL_EXCLUSIVE_AREA_07/14 (msr_MCL_EXCLUSIVE_AREA_07) @068fa438
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_07/109 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_07/109 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_07/110 (read)
Availability: available
Varpool flags:
reentry_guard_MCL_EXCLUSIVE_AREA_06/13 (reentry_guard_MCL_EXCLUSIVE_AREA_06) @068fa3a8
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_06/107 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_06/107 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_06/107 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_06/108 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_06/108 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_06/108 (read)
Availability: available
Varpool flags:
msr_MCL_EXCLUSIVE_AREA_06/12 (msr_MCL_EXCLUSIVE_AREA_06) @068fa318
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_06/107 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_06/107 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_06/108 (read)
Availability: available
Varpool flags:
reentry_guard_MCL_EXCLUSIVE_AREA_05/11 (reentry_guard_MCL_EXCLUSIVE_AREA_05) @068fa288
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_05/105 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_05/105 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_05/105 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_05/106 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_05/106 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_05/106 (read)
Availability: available
Varpool flags:
msr_MCL_EXCLUSIVE_AREA_05/10 (msr_MCL_EXCLUSIVE_AREA_05) @068fa1f8
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_05/105 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_05/105 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_05/106 (read)
Availability: available
Varpool flags:
reentry_guard_MCL_EXCLUSIVE_AREA_04/9 (reentry_guard_MCL_EXCLUSIVE_AREA_04) @068fa168
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_04/103 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_04/103 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_04/103 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_04/104 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_04/104 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_04/104 (read)
Availability: available
Varpool flags:
msr_MCL_EXCLUSIVE_AREA_04/8 (msr_MCL_EXCLUSIVE_AREA_04) @068fa0d8
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_04/103 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_04/103 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_04/104 (read)
Availability: available
Varpool flags:
reentry_guard_MCL_EXCLUSIVE_AREA_03/7 (reentry_guard_MCL_EXCLUSIVE_AREA_03) @068fa048
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_03/101 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_03/101 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_03/101 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_03/102 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_03/102 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_03/102 (read)
Availability: available
Varpool flags:
msr_MCL_EXCLUSIVE_AREA_03/6 (msr_MCL_EXCLUSIVE_AREA_03) @068f3f78
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_03/101 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_03/101 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_03/102 (read)
Availability: available
Varpool flags:
reentry_guard_MCL_EXCLUSIVE_AREA_02/5 (reentry_guard_MCL_EXCLUSIVE_AREA_02) @068f3ee8
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_02/99 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_02/99 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_02/99 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_02/100 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_02/100 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_02/100 (read)
Availability: available
Varpool flags:
msr_MCL_EXCLUSIVE_AREA_02/4 (msr_MCL_EXCLUSIVE_AREA_02) @068f3e58
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_02/99 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_02/99 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_02/100 (read)
Availability: available
Varpool flags:
reentry_guard_MCL_EXCLUSIVE_AREA_01/3 (reentry_guard_MCL_EXCLUSIVE_AREA_01) @068f3dc8
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_01/97 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_01/97 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_01/97 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_01/98 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_01/98 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_01/98 (read)
Availability: available
Varpool flags:
msr_MCL_EXCLUSIVE_AREA_01/2 (msr_MCL_EXCLUSIVE_AREA_01) @068f3d38
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_01/97 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_01/97 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_01/98 (read)
Availability: available
Varpool flags:
reentry_guard_MCL_EXCLUSIVE_AREA_00/1 (reentry_guard_MCL_EXCLUSIVE_AREA_00) @068f3ca8
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_00/95 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_00/95 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_00/95 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_00/96 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_00/96 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_00/96 (read)
Availability: available
Varpool flags:
msr_MCL_EXCLUSIVE_AREA_00/0 (msr_MCL_EXCLUSIVE_AREA_00) @068f3c18
Type: variable definition analyzed
Visibility: force_output prevailing_def_ironly
References:
Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_00/95 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_00/95 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_00/96 (read)
Availability: available
Varpool flags:
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_46 ()
{
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_46[u32CoreId_10];
_3 = _2 + 4294967295;
reentry_guard_MCL_EXCLUSIVE_AREA_46[u32CoreId_10] ={v} _3;
# DEBUG BEGIN_STMT
_4 ={v} msr_MCL_EXCLUSIVE_AREA_46[u32CoreId_10];
_5 = _4 & 1;
if (_5 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_46[u32CoreId_10];
if (_6 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsie i");
<bb 5> [local count: 1073741824]:
return;
}
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_46 ()
{
register uint32 reg_tmp;
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_46[u32CoreId_10];
if (_2 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
# DEBUG BEGIN_STMT
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
# DEBUG BEGIN_STMT
# DEBUG BEGIN_STMT
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
# DEBUG reg_tmp => reg_tmp_14
# DEBUG BEGIN_STMT
# DEBUG reg_tmp => NULL
msr_MCL_EXCLUSIVE_AREA_46[u32CoreId_10] ={v} reg_tmp_14;
# DEBUG BEGIN_STMT
_3 ={v} msr_MCL_EXCLUSIVE_AREA_46[u32CoreId_10];
_4 = _3 & 1;
if (_4 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsid i");
<bb 5> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_46[u32CoreId_10];
_6 = _5 + 1;
reentry_guard_MCL_EXCLUSIVE_AREA_46[u32CoreId_10] ={v} _6;
return;
}
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_45 ()
{
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_45[u32CoreId_10];
_3 = _2 + 4294967295;
reentry_guard_MCL_EXCLUSIVE_AREA_45[u32CoreId_10] ={v} _3;
# DEBUG BEGIN_STMT
_4 ={v} msr_MCL_EXCLUSIVE_AREA_45[u32CoreId_10];
_5 = _4 & 1;
if (_5 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_45[u32CoreId_10];
if (_6 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsie i");
<bb 5> [local count: 1073741824]:
return;
}
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_45 ()
{
register uint32 reg_tmp;
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_45[u32CoreId_10];
if (_2 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
# DEBUG BEGIN_STMT
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
# DEBUG BEGIN_STMT
# DEBUG BEGIN_STMT
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
# DEBUG reg_tmp => reg_tmp_14
# DEBUG BEGIN_STMT
# DEBUG reg_tmp => NULL
msr_MCL_EXCLUSIVE_AREA_45[u32CoreId_10] ={v} reg_tmp_14;
# DEBUG BEGIN_STMT
_3 ={v} msr_MCL_EXCLUSIVE_AREA_45[u32CoreId_10];
_4 = _3 & 1;
if (_4 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsid i");
<bb 5> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_45[u32CoreId_10];
_6 = _5 + 1;
reentry_guard_MCL_EXCLUSIVE_AREA_45[u32CoreId_10] ={v} _6;
return;
}
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_44 ()
{
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_44[u32CoreId_10];
_3 = _2 + 4294967295;
reentry_guard_MCL_EXCLUSIVE_AREA_44[u32CoreId_10] ={v} _3;
# DEBUG BEGIN_STMT
_4 ={v} msr_MCL_EXCLUSIVE_AREA_44[u32CoreId_10];
_5 = _4 & 1;
if (_5 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_44[u32CoreId_10];
if (_6 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsie i");
<bb 5> [local count: 1073741824]:
return;
}
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_44 ()
{
register uint32 reg_tmp;
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_44[u32CoreId_10];
if (_2 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
# DEBUG BEGIN_STMT
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
# DEBUG BEGIN_STMT
# DEBUG BEGIN_STMT
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
# DEBUG reg_tmp => reg_tmp_14
# DEBUG BEGIN_STMT
# DEBUG reg_tmp => NULL
msr_MCL_EXCLUSIVE_AREA_44[u32CoreId_10] ={v} reg_tmp_14;
# DEBUG BEGIN_STMT
_3 ={v} msr_MCL_EXCLUSIVE_AREA_44[u32CoreId_10];
_4 = _3 & 1;
if (_4 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsid i");
<bb 5> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_44[u32CoreId_10];
_6 = _5 + 1;
reentry_guard_MCL_EXCLUSIVE_AREA_44[u32CoreId_10] ={v} _6;
return;
}
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_43 ()
{
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_43[u32CoreId_10];
_3 = _2 + 4294967295;
reentry_guard_MCL_EXCLUSIVE_AREA_43[u32CoreId_10] ={v} _3;
# DEBUG BEGIN_STMT
_4 ={v} msr_MCL_EXCLUSIVE_AREA_43[u32CoreId_10];
_5 = _4 & 1;
if (_5 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_43[u32CoreId_10];
if (_6 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsie i");
<bb 5> [local count: 1073741824]:
return;
}
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_43 ()
{
register uint32 reg_tmp;
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_43[u32CoreId_10];
if (_2 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
# DEBUG BEGIN_STMT
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
# DEBUG BEGIN_STMT
# DEBUG BEGIN_STMT
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
# DEBUG reg_tmp => reg_tmp_14
# DEBUG BEGIN_STMT
# DEBUG reg_tmp => NULL
msr_MCL_EXCLUSIVE_AREA_43[u32CoreId_10] ={v} reg_tmp_14;
# DEBUG BEGIN_STMT
_3 ={v} msr_MCL_EXCLUSIVE_AREA_43[u32CoreId_10];
_4 = _3 & 1;
if (_4 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsid i");
<bb 5> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_43[u32CoreId_10];
_6 = _5 + 1;
reentry_guard_MCL_EXCLUSIVE_AREA_43[u32CoreId_10] ={v} _6;
return;
}
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_42 ()
{
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_42[u32CoreId_10];
_3 = _2 + 4294967295;
reentry_guard_MCL_EXCLUSIVE_AREA_42[u32CoreId_10] ={v} _3;
# DEBUG BEGIN_STMT
_4 ={v} msr_MCL_EXCLUSIVE_AREA_42[u32CoreId_10];
_5 = _4 & 1;
if (_5 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_42[u32CoreId_10];
if (_6 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsie i");
<bb 5> [local count: 1073741824]:
return;
}
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_42 ()
{
register uint32 reg_tmp;
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_42[u32CoreId_10];
if (_2 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
# DEBUG BEGIN_STMT
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
# DEBUG BEGIN_STMT
# DEBUG BEGIN_STMT
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
# DEBUG reg_tmp => reg_tmp_14
# DEBUG BEGIN_STMT
# DEBUG reg_tmp => NULL
msr_MCL_EXCLUSIVE_AREA_42[u32CoreId_10] ={v} reg_tmp_14;
# DEBUG BEGIN_STMT
_3 ={v} msr_MCL_EXCLUSIVE_AREA_42[u32CoreId_10];
_4 = _3 & 1;
if (_4 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsid i");
<bb 5> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_42[u32CoreId_10];
_6 = _5 + 1;
reentry_guard_MCL_EXCLUSIVE_AREA_42[u32CoreId_10] ={v} _6;
return;
}
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_41 ()
{
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_41[u32CoreId_10];
_3 = _2 + 4294967295;
reentry_guard_MCL_EXCLUSIVE_AREA_41[u32CoreId_10] ={v} _3;
# DEBUG BEGIN_STMT
_4 ={v} msr_MCL_EXCLUSIVE_AREA_41[u32CoreId_10];
_5 = _4 & 1;
if (_5 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_41[u32CoreId_10];
if (_6 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsie i");
<bb 5> [local count: 1073741824]:
return;
}
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_41 ()
{
register uint32 reg_tmp;
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_41[u32CoreId_10];
if (_2 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
# DEBUG BEGIN_STMT
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
# DEBUG BEGIN_STMT
# DEBUG BEGIN_STMT
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
# DEBUG reg_tmp => reg_tmp_14
# DEBUG BEGIN_STMT
# DEBUG reg_tmp => NULL
msr_MCL_EXCLUSIVE_AREA_41[u32CoreId_10] ={v} reg_tmp_14;
# DEBUG BEGIN_STMT
_3 ={v} msr_MCL_EXCLUSIVE_AREA_41[u32CoreId_10];
_4 = _3 & 1;
if (_4 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsid i");
<bb 5> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_41[u32CoreId_10];
_6 = _5 + 1;
reentry_guard_MCL_EXCLUSIVE_AREA_41[u32CoreId_10] ={v} _6;
return;
}
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_40 ()
{
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_40[u32CoreId_10];
_3 = _2 + 4294967295;
reentry_guard_MCL_EXCLUSIVE_AREA_40[u32CoreId_10] ={v} _3;
# DEBUG BEGIN_STMT
_4 ={v} msr_MCL_EXCLUSIVE_AREA_40[u32CoreId_10];
_5 = _4 & 1;
if (_5 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_40[u32CoreId_10];
if (_6 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsie i");
<bb 5> [local count: 1073741824]:
return;
}
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_40 ()
{
register uint32 reg_tmp;
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_40[u32CoreId_10];
if (_2 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
# DEBUG BEGIN_STMT
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
# DEBUG BEGIN_STMT
# DEBUG BEGIN_STMT
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
# DEBUG reg_tmp => reg_tmp_14
# DEBUG BEGIN_STMT
# DEBUG reg_tmp => NULL
msr_MCL_EXCLUSIVE_AREA_40[u32CoreId_10] ={v} reg_tmp_14;
# DEBUG BEGIN_STMT
_3 ={v} msr_MCL_EXCLUSIVE_AREA_40[u32CoreId_10];
_4 = _3 & 1;
if (_4 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsid i");
<bb 5> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_40[u32CoreId_10];
_6 = _5 + 1;
reentry_guard_MCL_EXCLUSIVE_AREA_40[u32CoreId_10] ={v} _6;
return;
}
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_39 ()
{
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_39[u32CoreId_10];
_3 = _2 + 4294967295;
reentry_guard_MCL_EXCLUSIVE_AREA_39[u32CoreId_10] ={v} _3;
# DEBUG BEGIN_STMT
_4 ={v} msr_MCL_EXCLUSIVE_AREA_39[u32CoreId_10];
_5 = _4 & 1;
if (_5 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_39[u32CoreId_10];
if (_6 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsie i");
<bb 5> [local count: 1073741824]:
return;
}
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_39 ()
{
register uint32 reg_tmp;
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_39[u32CoreId_10];
if (_2 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
# DEBUG BEGIN_STMT
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
# DEBUG BEGIN_STMT
# DEBUG BEGIN_STMT
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
# DEBUG reg_tmp => reg_tmp_14
# DEBUG BEGIN_STMT
# DEBUG reg_tmp => NULL
msr_MCL_EXCLUSIVE_AREA_39[u32CoreId_10] ={v} reg_tmp_14;
# DEBUG BEGIN_STMT
_3 ={v} msr_MCL_EXCLUSIVE_AREA_39[u32CoreId_10];
_4 = _3 & 1;
if (_4 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsid i");
<bb 5> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_39[u32CoreId_10];
_6 = _5 + 1;
reentry_guard_MCL_EXCLUSIVE_AREA_39[u32CoreId_10] ={v} _6;
return;
}
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_38 ()
{
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_38[u32CoreId_10];
_3 = _2 + 4294967295;
reentry_guard_MCL_EXCLUSIVE_AREA_38[u32CoreId_10] ={v} _3;
# DEBUG BEGIN_STMT
_4 ={v} msr_MCL_EXCLUSIVE_AREA_38[u32CoreId_10];
_5 = _4 & 1;
if (_5 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_38[u32CoreId_10];
if (_6 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsie i");
<bb 5> [local count: 1073741824]:
return;
}
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_38 ()
{
register uint32 reg_tmp;
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_38[u32CoreId_10];
if (_2 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
# DEBUG BEGIN_STMT
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
# DEBUG BEGIN_STMT
# DEBUG BEGIN_STMT
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
# DEBUG reg_tmp => reg_tmp_14
# DEBUG BEGIN_STMT
# DEBUG reg_tmp => NULL
msr_MCL_EXCLUSIVE_AREA_38[u32CoreId_10] ={v} reg_tmp_14;
# DEBUG BEGIN_STMT
_3 ={v} msr_MCL_EXCLUSIVE_AREA_38[u32CoreId_10];
_4 = _3 & 1;
if (_4 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsid i");
<bb 5> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_38[u32CoreId_10];
_6 = _5 + 1;
reentry_guard_MCL_EXCLUSIVE_AREA_38[u32CoreId_10] ={v} _6;
return;
}
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_37 ()
{
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_37[u32CoreId_10];
_3 = _2 + 4294967295;
reentry_guard_MCL_EXCLUSIVE_AREA_37[u32CoreId_10] ={v} _3;
# DEBUG BEGIN_STMT
_4 ={v} msr_MCL_EXCLUSIVE_AREA_37[u32CoreId_10];
_5 = _4 & 1;
if (_5 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_37[u32CoreId_10];
if (_6 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsie i");
<bb 5> [local count: 1073741824]:
return;
}
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_37 ()
{
register uint32 reg_tmp;
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_37[u32CoreId_10];
if (_2 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
# DEBUG BEGIN_STMT
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
# DEBUG BEGIN_STMT
# DEBUG BEGIN_STMT
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
# DEBUG reg_tmp => reg_tmp_14
# DEBUG BEGIN_STMT
# DEBUG reg_tmp => NULL
msr_MCL_EXCLUSIVE_AREA_37[u32CoreId_10] ={v} reg_tmp_14;
# DEBUG BEGIN_STMT
_3 ={v} msr_MCL_EXCLUSIVE_AREA_37[u32CoreId_10];
_4 = _3 & 1;
if (_4 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsid i");
<bb 5> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_37[u32CoreId_10];
_6 = _5 + 1;
reentry_guard_MCL_EXCLUSIVE_AREA_37[u32CoreId_10] ={v} _6;
return;
}
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_36 ()
{
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_36[u32CoreId_10];
_3 = _2 + 4294967295;
reentry_guard_MCL_EXCLUSIVE_AREA_36[u32CoreId_10] ={v} _3;
# DEBUG BEGIN_STMT
_4 ={v} msr_MCL_EXCLUSIVE_AREA_36[u32CoreId_10];
_5 = _4 & 1;
if (_5 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_36[u32CoreId_10];
if (_6 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsie i");
<bb 5> [local count: 1073741824]:
return;
}
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_36 ()
{
register uint32 reg_tmp;
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_36[u32CoreId_10];
if (_2 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
# DEBUG BEGIN_STMT
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
# DEBUG BEGIN_STMT
# DEBUG BEGIN_STMT
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
# DEBUG reg_tmp => reg_tmp_14
# DEBUG BEGIN_STMT
# DEBUG reg_tmp => NULL
msr_MCL_EXCLUSIVE_AREA_36[u32CoreId_10] ={v} reg_tmp_14;
# DEBUG BEGIN_STMT
_3 ={v} msr_MCL_EXCLUSIVE_AREA_36[u32CoreId_10];
_4 = _3 & 1;
if (_4 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsid i");
<bb 5> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_36[u32CoreId_10];
_6 = _5 + 1;
reentry_guard_MCL_EXCLUSIVE_AREA_36[u32CoreId_10] ={v} _6;
return;
}
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_35 ()
{
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_35[u32CoreId_10];
_3 = _2 + 4294967295;
reentry_guard_MCL_EXCLUSIVE_AREA_35[u32CoreId_10] ={v} _3;
# DEBUG BEGIN_STMT
_4 ={v} msr_MCL_EXCLUSIVE_AREA_35[u32CoreId_10];
_5 = _4 & 1;
if (_5 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_35[u32CoreId_10];
if (_6 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsie i");
<bb 5> [local count: 1073741824]:
return;
}
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_35 ()
{
register uint32 reg_tmp;
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_35[u32CoreId_10];
if (_2 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
# DEBUG BEGIN_STMT
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
# DEBUG BEGIN_STMT
# DEBUG BEGIN_STMT
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
# DEBUG reg_tmp => reg_tmp_14
# DEBUG BEGIN_STMT
# DEBUG reg_tmp => NULL
msr_MCL_EXCLUSIVE_AREA_35[u32CoreId_10] ={v} reg_tmp_14;
# DEBUG BEGIN_STMT
_3 ={v} msr_MCL_EXCLUSIVE_AREA_35[u32CoreId_10];
_4 = _3 & 1;
if (_4 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsid i");
<bb 5> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_35[u32CoreId_10];
_6 = _5 + 1;
reentry_guard_MCL_EXCLUSIVE_AREA_35[u32CoreId_10] ={v} _6;
return;
}
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_34 ()
{
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_34[u32CoreId_10];
_3 = _2 + 4294967295;
reentry_guard_MCL_EXCLUSIVE_AREA_34[u32CoreId_10] ={v} _3;
# DEBUG BEGIN_STMT
_4 ={v} msr_MCL_EXCLUSIVE_AREA_34[u32CoreId_10];
_5 = _4 & 1;
if (_5 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_34[u32CoreId_10];
if (_6 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsie i");
<bb 5> [local count: 1073741824]:
return;
}
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_34 ()
{
register uint32 reg_tmp;
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_34[u32CoreId_10];
if (_2 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
# DEBUG BEGIN_STMT
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
# DEBUG BEGIN_STMT
# DEBUG BEGIN_STMT
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
# DEBUG reg_tmp => reg_tmp_14
# DEBUG BEGIN_STMT
# DEBUG reg_tmp => NULL
msr_MCL_EXCLUSIVE_AREA_34[u32CoreId_10] ={v} reg_tmp_14;
# DEBUG BEGIN_STMT
_3 ={v} msr_MCL_EXCLUSIVE_AREA_34[u32CoreId_10];
_4 = _3 & 1;
if (_4 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsid i");
<bb 5> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_34[u32CoreId_10];
_6 = _5 + 1;
reentry_guard_MCL_EXCLUSIVE_AREA_34[u32CoreId_10] ={v} _6;
return;
}
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_33 ()
{
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_33[u32CoreId_10];
_3 = _2 + 4294967295;
reentry_guard_MCL_EXCLUSIVE_AREA_33[u32CoreId_10] ={v} _3;
# DEBUG BEGIN_STMT
_4 ={v} msr_MCL_EXCLUSIVE_AREA_33[u32CoreId_10];
_5 = _4 & 1;
if (_5 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_33[u32CoreId_10];
if (_6 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsie i");
<bb 5> [local count: 1073741824]:
return;
}
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_33 ()
{
register uint32 reg_tmp;
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_33[u32CoreId_10];
if (_2 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
# DEBUG BEGIN_STMT
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
# DEBUG BEGIN_STMT
# DEBUG BEGIN_STMT
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
# DEBUG reg_tmp => reg_tmp_14
# DEBUG BEGIN_STMT
# DEBUG reg_tmp => NULL
msr_MCL_EXCLUSIVE_AREA_33[u32CoreId_10] ={v} reg_tmp_14;
# DEBUG BEGIN_STMT
_3 ={v} msr_MCL_EXCLUSIVE_AREA_33[u32CoreId_10];
_4 = _3 & 1;
if (_4 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsid i");
<bb 5> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_33[u32CoreId_10];
_6 = _5 + 1;
reentry_guard_MCL_EXCLUSIVE_AREA_33[u32CoreId_10] ={v} _6;
return;
}
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_32 ()
{
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_32[u32CoreId_10];
_3 = _2 + 4294967295;
reentry_guard_MCL_EXCLUSIVE_AREA_32[u32CoreId_10] ={v} _3;
# DEBUG BEGIN_STMT
_4 ={v} msr_MCL_EXCLUSIVE_AREA_32[u32CoreId_10];
_5 = _4 & 1;
if (_5 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_32[u32CoreId_10];
if (_6 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsie i");
<bb 5> [local count: 1073741824]:
return;
}
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_32 ()
{
register uint32 reg_tmp;
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_32[u32CoreId_10];
if (_2 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
# DEBUG BEGIN_STMT
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
# DEBUG BEGIN_STMT
# DEBUG BEGIN_STMT
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
# DEBUG reg_tmp => reg_tmp_14
# DEBUG BEGIN_STMT
# DEBUG reg_tmp => NULL
msr_MCL_EXCLUSIVE_AREA_32[u32CoreId_10] ={v} reg_tmp_14;
# DEBUG BEGIN_STMT
_3 ={v} msr_MCL_EXCLUSIVE_AREA_32[u32CoreId_10];
_4 = _3 & 1;
if (_4 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsid i");
<bb 5> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_32[u32CoreId_10];
_6 = _5 + 1;
reentry_guard_MCL_EXCLUSIVE_AREA_32[u32CoreId_10] ={v} _6;
return;
}
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_31 ()
{
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_31[u32CoreId_10];
_3 = _2 + 4294967295;
reentry_guard_MCL_EXCLUSIVE_AREA_31[u32CoreId_10] ={v} _3;
# DEBUG BEGIN_STMT
_4 ={v} msr_MCL_EXCLUSIVE_AREA_31[u32CoreId_10];
_5 = _4 & 1;
if (_5 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_31[u32CoreId_10];
if (_6 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsie i");
<bb 5> [local count: 1073741824]:
return;
}
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_31 ()
{
register uint32 reg_tmp;
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_31[u32CoreId_10];
if (_2 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
# DEBUG BEGIN_STMT
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
# DEBUG BEGIN_STMT
# DEBUG BEGIN_STMT
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
# DEBUG reg_tmp => reg_tmp_14
# DEBUG BEGIN_STMT
# DEBUG reg_tmp => NULL
msr_MCL_EXCLUSIVE_AREA_31[u32CoreId_10] ={v} reg_tmp_14;
# DEBUG BEGIN_STMT
_3 ={v} msr_MCL_EXCLUSIVE_AREA_31[u32CoreId_10];
_4 = _3 & 1;
if (_4 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsid i");
<bb 5> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_31[u32CoreId_10];
_6 = _5 + 1;
reentry_guard_MCL_EXCLUSIVE_AREA_31[u32CoreId_10] ={v} _6;
return;
}
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_30 ()
{
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_30[u32CoreId_10];
_3 = _2 + 4294967295;
reentry_guard_MCL_EXCLUSIVE_AREA_30[u32CoreId_10] ={v} _3;
# DEBUG BEGIN_STMT
_4 ={v} msr_MCL_EXCLUSIVE_AREA_30[u32CoreId_10];
_5 = _4 & 1;
if (_5 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_30[u32CoreId_10];
if (_6 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsie i");
<bb 5> [local count: 1073741824]:
return;
}
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_30 ()
{
register uint32 reg_tmp;
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_30[u32CoreId_10];
if (_2 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
# DEBUG BEGIN_STMT
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
# DEBUG BEGIN_STMT
# DEBUG BEGIN_STMT
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
# DEBUG reg_tmp => reg_tmp_14
# DEBUG BEGIN_STMT
# DEBUG reg_tmp => NULL
msr_MCL_EXCLUSIVE_AREA_30[u32CoreId_10] ={v} reg_tmp_14;
# DEBUG BEGIN_STMT
_3 ={v} msr_MCL_EXCLUSIVE_AREA_30[u32CoreId_10];
_4 = _3 & 1;
if (_4 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsid i");
<bb 5> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_30[u32CoreId_10];
_6 = _5 + 1;
reentry_guard_MCL_EXCLUSIVE_AREA_30[u32CoreId_10] ={v} _6;
return;
}
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_29 ()
{
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_29[u32CoreId_10];
_3 = _2 + 4294967295;
reentry_guard_MCL_EXCLUSIVE_AREA_29[u32CoreId_10] ={v} _3;
# DEBUG BEGIN_STMT
_4 ={v} msr_MCL_EXCLUSIVE_AREA_29[u32CoreId_10];
_5 = _4 & 1;
if (_5 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_29[u32CoreId_10];
if (_6 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsie i");
<bb 5> [local count: 1073741824]:
return;
}
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_29 ()
{
register uint32 reg_tmp;
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_29[u32CoreId_10];
if (_2 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
# DEBUG BEGIN_STMT
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
# DEBUG BEGIN_STMT
# DEBUG BEGIN_STMT
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
# DEBUG reg_tmp => reg_tmp_14
# DEBUG BEGIN_STMT
# DEBUG reg_tmp => NULL
msr_MCL_EXCLUSIVE_AREA_29[u32CoreId_10] ={v} reg_tmp_14;
# DEBUG BEGIN_STMT
_3 ={v} msr_MCL_EXCLUSIVE_AREA_29[u32CoreId_10];
_4 = _3 & 1;
if (_4 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsid i");
<bb 5> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_29[u32CoreId_10];
_6 = _5 + 1;
reentry_guard_MCL_EXCLUSIVE_AREA_29[u32CoreId_10] ={v} _6;
return;
}
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_28 ()
{
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_28[u32CoreId_10];
_3 = _2 + 4294967295;
reentry_guard_MCL_EXCLUSIVE_AREA_28[u32CoreId_10] ={v} _3;
# DEBUG BEGIN_STMT
_4 ={v} msr_MCL_EXCLUSIVE_AREA_28[u32CoreId_10];
_5 = _4 & 1;
if (_5 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_28[u32CoreId_10];
if (_6 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsie i");
<bb 5> [local count: 1073741824]:
return;
}
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_28 ()
{
register uint32 reg_tmp;
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_28[u32CoreId_10];
if (_2 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
# DEBUG BEGIN_STMT
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
# DEBUG BEGIN_STMT
# DEBUG BEGIN_STMT
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
# DEBUG reg_tmp => reg_tmp_14
# DEBUG BEGIN_STMT
# DEBUG reg_tmp => NULL
msr_MCL_EXCLUSIVE_AREA_28[u32CoreId_10] ={v} reg_tmp_14;
# DEBUG BEGIN_STMT
_3 ={v} msr_MCL_EXCLUSIVE_AREA_28[u32CoreId_10];
_4 = _3 & 1;
if (_4 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsid i");
<bb 5> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_28[u32CoreId_10];
_6 = _5 + 1;
reentry_guard_MCL_EXCLUSIVE_AREA_28[u32CoreId_10] ={v} _6;
return;
}
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_27 ()
{
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_27[u32CoreId_10];
_3 = _2 + 4294967295;
reentry_guard_MCL_EXCLUSIVE_AREA_27[u32CoreId_10] ={v} _3;
# DEBUG BEGIN_STMT
_4 ={v} msr_MCL_EXCLUSIVE_AREA_27[u32CoreId_10];
_5 = _4 & 1;
if (_5 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_27[u32CoreId_10];
if (_6 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsie i");
<bb 5> [local count: 1073741824]:
return;
}
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_27 ()
{
register uint32 reg_tmp;
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_27[u32CoreId_10];
if (_2 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
# DEBUG BEGIN_STMT
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
# DEBUG BEGIN_STMT
# DEBUG BEGIN_STMT
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
# DEBUG reg_tmp => reg_tmp_14
# DEBUG BEGIN_STMT
# DEBUG reg_tmp => NULL
msr_MCL_EXCLUSIVE_AREA_27[u32CoreId_10] ={v} reg_tmp_14;
# DEBUG BEGIN_STMT
_3 ={v} msr_MCL_EXCLUSIVE_AREA_27[u32CoreId_10];
_4 = _3 & 1;
if (_4 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsid i");
<bb 5> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_27[u32CoreId_10];
_6 = _5 + 1;
reentry_guard_MCL_EXCLUSIVE_AREA_27[u32CoreId_10] ={v} _6;
return;
}
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_26 ()
{
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_26[u32CoreId_10];
_3 = _2 + 4294967295;
reentry_guard_MCL_EXCLUSIVE_AREA_26[u32CoreId_10] ={v} _3;
# DEBUG BEGIN_STMT
_4 ={v} msr_MCL_EXCLUSIVE_AREA_26[u32CoreId_10];
_5 = _4 & 1;
if (_5 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_26[u32CoreId_10];
if (_6 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsie i");
<bb 5> [local count: 1073741824]:
return;
}
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_26 ()
{
register uint32 reg_tmp;
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_26[u32CoreId_10];
if (_2 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
# DEBUG BEGIN_STMT
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
# DEBUG BEGIN_STMT
# DEBUG BEGIN_STMT
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
# DEBUG reg_tmp => reg_tmp_14
# DEBUG BEGIN_STMT
# DEBUG reg_tmp => NULL
msr_MCL_EXCLUSIVE_AREA_26[u32CoreId_10] ={v} reg_tmp_14;
# DEBUG BEGIN_STMT
_3 ={v} msr_MCL_EXCLUSIVE_AREA_26[u32CoreId_10];
_4 = _3 & 1;
if (_4 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsid i");
<bb 5> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_26[u32CoreId_10];
_6 = _5 + 1;
reentry_guard_MCL_EXCLUSIVE_AREA_26[u32CoreId_10] ={v} _6;
return;
}
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_25 ()
{
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_25[u32CoreId_10];
_3 = _2 + 4294967295;
reentry_guard_MCL_EXCLUSIVE_AREA_25[u32CoreId_10] ={v} _3;
# DEBUG BEGIN_STMT
_4 ={v} msr_MCL_EXCLUSIVE_AREA_25[u32CoreId_10];
_5 = _4 & 1;
if (_5 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_25[u32CoreId_10];
if (_6 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsie i");
<bb 5> [local count: 1073741824]:
return;
}
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_25 ()
{
register uint32 reg_tmp;
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_25[u32CoreId_10];
if (_2 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
# DEBUG BEGIN_STMT
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
# DEBUG BEGIN_STMT
# DEBUG BEGIN_STMT
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
# DEBUG reg_tmp => reg_tmp_14
# DEBUG BEGIN_STMT
# DEBUG reg_tmp => NULL
msr_MCL_EXCLUSIVE_AREA_25[u32CoreId_10] ={v} reg_tmp_14;
# DEBUG BEGIN_STMT
_3 ={v} msr_MCL_EXCLUSIVE_AREA_25[u32CoreId_10];
_4 = _3 & 1;
if (_4 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsid i");
<bb 5> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_25[u32CoreId_10];
_6 = _5 + 1;
reentry_guard_MCL_EXCLUSIVE_AREA_25[u32CoreId_10] ={v} _6;
return;
}
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_24 ()
{
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_24[u32CoreId_10];
_3 = _2 + 4294967295;
reentry_guard_MCL_EXCLUSIVE_AREA_24[u32CoreId_10] ={v} _3;
# DEBUG BEGIN_STMT
_4 ={v} msr_MCL_EXCLUSIVE_AREA_24[u32CoreId_10];
_5 = _4 & 1;
if (_5 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_24[u32CoreId_10];
if (_6 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsie i");
<bb 5> [local count: 1073741824]:
return;
}
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_24 ()
{
register uint32 reg_tmp;
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_24[u32CoreId_10];
if (_2 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
# DEBUG BEGIN_STMT
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
# DEBUG BEGIN_STMT
# DEBUG BEGIN_STMT
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
# DEBUG reg_tmp => reg_tmp_14
# DEBUG BEGIN_STMT
# DEBUG reg_tmp => NULL
msr_MCL_EXCLUSIVE_AREA_24[u32CoreId_10] ={v} reg_tmp_14;
# DEBUG BEGIN_STMT
_3 ={v} msr_MCL_EXCLUSIVE_AREA_24[u32CoreId_10];
_4 = _3 & 1;
if (_4 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsid i");
<bb 5> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_24[u32CoreId_10];
_6 = _5 + 1;
reentry_guard_MCL_EXCLUSIVE_AREA_24[u32CoreId_10] ={v} _6;
return;
}
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_23 ()
{
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_23[u32CoreId_10];
_3 = _2 + 4294967295;
reentry_guard_MCL_EXCLUSIVE_AREA_23[u32CoreId_10] ={v} _3;
# DEBUG BEGIN_STMT
_4 ={v} msr_MCL_EXCLUSIVE_AREA_23[u32CoreId_10];
_5 = _4 & 1;
if (_5 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_23[u32CoreId_10];
if (_6 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsie i");
<bb 5> [local count: 1073741824]:
return;
}
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_23 ()
{
register uint32 reg_tmp;
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_23[u32CoreId_10];
if (_2 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
# DEBUG BEGIN_STMT
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
# DEBUG BEGIN_STMT
# DEBUG BEGIN_STMT
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
# DEBUG reg_tmp => reg_tmp_14
# DEBUG BEGIN_STMT
# DEBUG reg_tmp => NULL
msr_MCL_EXCLUSIVE_AREA_23[u32CoreId_10] ={v} reg_tmp_14;
# DEBUG BEGIN_STMT
_3 ={v} msr_MCL_EXCLUSIVE_AREA_23[u32CoreId_10];
_4 = _3 & 1;
if (_4 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsid i");
<bb 5> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_23[u32CoreId_10];
_6 = _5 + 1;
reentry_guard_MCL_EXCLUSIVE_AREA_23[u32CoreId_10] ={v} _6;
return;
}
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_22 ()
{
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_22[u32CoreId_10];
_3 = _2 + 4294967295;
reentry_guard_MCL_EXCLUSIVE_AREA_22[u32CoreId_10] ={v} _3;
# DEBUG BEGIN_STMT
_4 ={v} msr_MCL_EXCLUSIVE_AREA_22[u32CoreId_10];
_5 = _4 & 1;
if (_5 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_22[u32CoreId_10];
if (_6 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsie i");
<bb 5> [local count: 1073741824]:
return;
}
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_22 ()
{
register uint32 reg_tmp;
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_22[u32CoreId_10];
if (_2 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
# DEBUG BEGIN_STMT
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
# DEBUG BEGIN_STMT
# DEBUG BEGIN_STMT
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
# DEBUG reg_tmp => reg_tmp_14
# DEBUG BEGIN_STMT
# DEBUG reg_tmp => NULL
msr_MCL_EXCLUSIVE_AREA_22[u32CoreId_10] ={v} reg_tmp_14;
# DEBUG BEGIN_STMT
_3 ={v} msr_MCL_EXCLUSIVE_AREA_22[u32CoreId_10];
_4 = _3 & 1;
if (_4 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsid i");
<bb 5> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_22[u32CoreId_10];
_6 = _5 + 1;
reentry_guard_MCL_EXCLUSIVE_AREA_22[u32CoreId_10] ={v} _6;
return;
}
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_21 ()
{
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_21[u32CoreId_10];
_3 = _2 + 4294967295;
reentry_guard_MCL_EXCLUSIVE_AREA_21[u32CoreId_10] ={v} _3;
# DEBUG BEGIN_STMT
_4 ={v} msr_MCL_EXCLUSIVE_AREA_21[u32CoreId_10];
_5 = _4 & 1;
if (_5 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_21[u32CoreId_10];
if (_6 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsie i");
<bb 5> [local count: 1073741824]:
return;
}
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_21 ()
{
register uint32 reg_tmp;
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_21[u32CoreId_10];
if (_2 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
# DEBUG BEGIN_STMT
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
# DEBUG BEGIN_STMT
# DEBUG BEGIN_STMT
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
# DEBUG reg_tmp => reg_tmp_14
# DEBUG BEGIN_STMT
# DEBUG reg_tmp => NULL
msr_MCL_EXCLUSIVE_AREA_21[u32CoreId_10] ={v} reg_tmp_14;
# DEBUG BEGIN_STMT
_3 ={v} msr_MCL_EXCLUSIVE_AREA_21[u32CoreId_10];
_4 = _3 & 1;
if (_4 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsid i");
<bb 5> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_21[u32CoreId_10];
_6 = _5 + 1;
reentry_guard_MCL_EXCLUSIVE_AREA_21[u32CoreId_10] ={v} _6;
return;
}
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_20 ()
{
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_20[u32CoreId_10];
_3 = _2 + 4294967295;
reentry_guard_MCL_EXCLUSIVE_AREA_20[u32CoreId_10] ={v} _3;
# DEBUG BEGIN_STMT
_4 ={v} msr_MCL_EXCLUSIVE_AREA_20[u32CoreId_10];
_5 = _4 & 1;
if (_5 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_20[u32CoreId_10];
if (_6 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsie i");
<bb 5> [local count: 1073741824]:
return;
}
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_20 ()
{
register uint32 reg_tmp;
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_20[u32CoreId_10];
if (_2 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
# DEBUG BEGIN_STMT
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
# DEBUG BEGIN_STMT
# DEBUG BEGIN_STMT
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
# DEBUG reg_tmp => reg_tmp_14
# DEBUG BEGIN_STMT
# DEBUG reg_tmp => NULL
msr_MCL_EXCLUSIVE_AREA_20[u32CoreId_10] ={v} reg_tmp_14;
# DEBUG BEGIN_STMT
_3 ={v} msr_MCL_EXCLUSIVE_AREA_20[u32CoreId_10];
_4 = _3 & 1;
if (_4 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsid i");
<bb 5> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_20[u32CoreId_10];
_6 = _5 + 1;
reentry_guard_MCL_EXCLUSIVE_AREA_20[u32CoreId_10] ={v} _6;
return;
}
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_19 ()
{
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_19[u32CoreId_10];
_3 = _2 + 4294967295;
reentry_guard_MCL_EXCLUSIVE_AREA_19[u32CoreId_10] ={v} _3;
# DEBUG BEGIN_STMT
_4 ={v} msr_MCL_EXCLUSIVE_AREA_19[u32CoreId_10];
_5 = _4 & 1;
if (_5 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_19[u32CoreId_10];
if (_6 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsie i");
<bb 5> [local count: 1073741824]:
return;
}
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_19 ()
{
register uint32 reg_tmp;
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_19[u32CoreId_10];
if (_2 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
# DEBUG BEGIN_STMT
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
# DEBUG BEGIN_STMT
# DEBUG BEGIN_STMT
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
# DEBUG reg_tmp => reg_tmp_14
# DEBUG BEGIN_STMT
# DEBUG reg_tmp => NULL
msr_MCL_EXCLUSIVE_AREA_19[u32CoreId_10] ={v} reg_tmp_14;
# DEBUG BEGIN_STMT
_3 ={v} msr_MCL_EXCLUSIVE_AREA_19[u32CoreId_10];
_4 = _3 & 1;
if (_4 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsid i");
<bb 5> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_19[u32CoreId_10];
_6 = _5 + 1;
reentry_guard_MCL_EXCLUSIVE_AREA_19[u32CoreId_10] ={v} _6;
return;
}
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_18 ()
{
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_18[u32CoreId_10];
_3 = _2 + 4294967295;
reentry_guard_MCL_EXCLUSIVE_AREA_18[u32CoreId_10] ={v} _3;
# DEBUG BEGIN_STMT
_4 ={v} msr_MCL_EXCLUSIVE_AREA_18[u32CoreId_10];
_5 = _4 & 1;
if (_5 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_18[u32CoreId_10];
if (_6 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsie i");
<bb 5> [local count: 1073741824]:
return;
}
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_18 ()
{
register uint32 reg_tmp;
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_18[u32CoreId_10];
if (_2 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
# DEBUG BEGIN_STMT
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
# DEBUG BEGIN_STMT
# DEBUG BEGIN_STMT
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
# DEBUG reg_tmp => reg_tmp_14
# DEBUG BEGIN_STMT
# DEBUG reg_tmp => NULL
msr_MCL_EXCLUSIVE_AREA_18[u32CoreId_10] ={v} reg_tmp_14;
# DEBUG BEGIN_STMT
_3 ={v} msr_MCL_EXCLUSIVE_AREA_18[u32CoreId_10];
_4 = _3 & 1;
if (_4 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsid i");
<bb 5> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_18[u32CoreId_10];
_6 = _5 + 1;
reentry_guard_MCL_EXCLUSIVE_AREA_18[u32CoreId_10] ={v} _6;
return;
}
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_17 ()
{
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_17[u32CoreId_10];
_3 = _2 + 4294967295;
reentry_guard_MCL_EXCLUSIVE_AREA_17[u32CoreId_10] ={v} _3;
# DEBUG BEGIN_STMT
_4 ={v} msr_MCL_EXCLUSIVE_AREA_17[u32CoreId_10];
_5 = _4 & 1;
if (_5 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_17[u32CoreId_10];
if (_6 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsie i");
<bb 5> [local count: 1073741824]:
return;
}
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_17 ()
{
register uint32 reg_tmp;
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_17[u32CoreId_10];
if (_2 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
# DEBUG BEGIN_STMT
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
# DEBUG BEGIN_STMT
# DEBUG BEGIN_STMT
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
# DEBUG reg_tmp => reg_tmp_14
# DEBUG BEGIN_STMT
# DEBUG reg_tmp => NULL
msr_MCL_EXCLUSIVE_AREA_17[u32CoreId_10] ={v} reg_tmp_14;
# DEBUG BEGIN_STMT
_3 ={v} msr_MCL_EXCLUSIVE_AREA_17[u32CoreId_10];
_4 = _3 & 1;
if (_4 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsid i");
<bb 5> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_17[u32CoreId_10];
_6 = _5 + 1;
reentry_guard_MCL_EXCLUSIVE_AREA_17[u32CoreId_10] ={v} _6;
return;
}
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_16 ()
{
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_16[u32CoreId_10];
_3 = _2 + 4294967295;
reentry_guard_MCL_EXCLUSIVE_AREA_16[u32CoreId_10] ={v} _3;
# DEBUG BEGIN_STMT
_4 ={v} msr_MCL_EXCLUSIVE_AREA_16[u32CoreId_10];
_5 = _4 & 1;
if (_5 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_16[u32CoreId_10];
if (_6 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsie i");
<bb 5> [local count: 1073741824]:
return;
}
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_16 ()
{
register uint32 reg_tmp;
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_16[u32CoreId_10];
if (_2 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
# DEBUG BEGIN_STMT
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
# DEBUG BEGIN_STMT
# DEBUG BEGIN_STMT
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
# DEBUG reg_tmp => reg_tmp_14
# DEBUG BEGIN_STMT
# DEBUG reg_tmp => NULL
msr_MCL_EXCLUSIVE_AREA_16[u32CoreId_10] ={v} reg_tmp_14;
# DEBUG BEGIN_STMT
_3 ={v} msr_MCL_EXCLUSIVE_AREA_16[u32CoreId_10];
_4 = _3 & 1;
if (_4 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsid i");
<bb 5> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_16[u32CoreId_10];
_6 = _5 + 1;
reentry_guard_MCL_EXCLUSIVE_AREA_16[u32CoreId_10] ={v} _6;
return;
}
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_15 ()
{
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_15[u32CoreId_10];
_3 = _2 + 4294967295;
reentry_guard_MCL_EXCLUSIVE_AREA_15[u32CoreId_10] ={v} _3;
# DEBUG BEGIN_STMT
_4 ={v} msr_MCL_EXCLUSIVE_AREA_15[u32CoreId_10];
_5 = _4 & 1;
if (_5 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_15[u32CoreId_10];
if (_6 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsie i");
<bb 5> [local count: 1073741824]:
return;
}
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_15 ()
{
register uint32 reg_tmp;
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_15[u32CoreId_10];
if (_2 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
# DEBUG BEGIN_STMT
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
# DEBUG BEGIN_STMT
# DEBUG BEGIN_STMT
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
# DEBUG reg_tmp => reg_tmp_14
# DEBUG BEGIN_STMT
# DEBUG reg_tmp => NULL
msr_MCL_EXCLUSIVE_AREA_15[u32CoreId_10] ={v} reg_tmp_14;
# DEBUG BEGIN_STMT
_3 ={v} msr_MCL_EXCLUSIVE_AREA_15[u32CoreId_10];
_4 = _3 & 1;
if (_4 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsid i");
<bb 5> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_15[u32CoreId_10];
_6 = _5 + 1;
reentry_guard_MCL_EXCLUSIVE_AREA_15[u32CoreId_10] ={v} _6;
return;
}
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_14 ()
{
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_14[u32CoreId_10];
_3 = _2 + 4294967295;
reentry_guard_MCL_EXCLUSIVE_AREA_14[u32CoreId_10] ={v} _3;
# DEBUG BEGIN_STMT
_4 ={v} msr_MCL_EXCLUSIVE_AREA_14[u32CoreId_10];
_5 = _4 & 1;
if (_5 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_14[u32CoreId_10];
if (_6 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsie i");
<bb 5> [local count: 1073741824]:
return;
}
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_14 ()
{
register uint32 reg_tmp;
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_14[u32CoreId_10];
if (_2 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
# DEBUG BEGIN_STMT
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
# DEBUG BEGIN_STMT
# DEBUG BEGIN_STMT
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
# DEBUG reg_tmp => reg_tmp_14
# DEBUG BEGIN_STMT
# DEBUG reg_tmp => NULL
msr_MCL_EXCLUSIVE_AREA_14[u32CoreId_10] ={v} reg_tmp_14;
# DEBUG BEGIN_STMT
_3 ={v} msr_MCL_EXCLUSIVE_AREA_14[u32CoreId_10];
_4 = _3 & 1;
if (_4 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsid i");
<bb 5> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_14[u32CoreId_10];
_6 = _5 + 1;
reentry_guard_MCL_EXCLUSIVE_AREA_14[u32CoreId_10] ={v} _6;
return;
}
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_13 ()
{
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_13[u32CoreId_10];
_3 = _2 + 4294967295;
reentry_guard_MCL_EXCLUSIVE_AREA_13[u32CoreId_10] ={v} _3;
# DEBUG BEGIN_STMT
_4 ={v} msr_MCL_EXCLUSIVE_AREA_13[u32CoreId_10];
_5 = _4 & 1;
if (_5 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_13[u32CoreId_10];
if (_6 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsie i");
<bb 5> [local count: 1073741824]:
return;
}
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_13 ()
{
register uint32 reg_tmp;
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_13[u32CoreId_10];
if (_2 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
# DEBUG BEGIN_STMT
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
# DEBUG BEGIN_STMT
# DEBUG BEGIN_STMT
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
# DEBUG reg_tmp => reg_tmp_14
# DEBUG BEGIN_STMT
# DEBUG reg_tmp => NULL
msr_MCL_EXCLUSIVE_AREA_13[u32CoreId_10] ={v} reg_tmp_14;
# DEBUG BEGIN_STMT
_3 ={v} msr_MCL_EXCLUSIVE_AREA_13[u32CoreId_10];
_4 = _3 & 1;
if (_4 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsid i");
<bb 5> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_13[u32CoreId_10];
_6 = _5 + 1;
reentry_guard_MCL_EXCLUSIVE_AREA_13[u32CoreId_10] ={v} _6;
return;
}
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_12 ()
{
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_12[u32CoreId_10];
_3 = _2 + 4294967295;
reentry_guard_MCL_EXCLUSIVE_AREA_12[u32CoreId_10] ={v} _3;
# DEBUG BEGIN_STMT
_4 ={v} msr_MCL_EXCLUSIVE_AREA_12[u32CoreId_10];
_5 = _4 & 1;
if (_5 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_12[u32CoreId_10];
if (_6 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsie i");
<bb 5> [local count: 1073741824]:
return;
}
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_12 ()
{
register uint32 reg_tmp;
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_12[u32CoreId_10];
if (_2 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
# DEBUG BEGIN_STMT
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
# DEBUG BEGIN_STMT
# DEBUG BEGIN_STMT
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
# DEBUG reg_tmp => reg_tmp_14
# DEBUG BEGIN_STMT
# DEBUG reg_tmp => NULL
msr_MCL_EXCLUSIVE_AREA_12[u32CoreId_10] ={v} reg_tmp_14;
# DEBUG BEGIN_STMT
_3 ={v} msr_MCL_EXCLUSIVE_AREA_12[u32CoreId_10];
_4 = _3 & 1;
if (_4 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsid i");
<bb 5> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_12[u32CoreId_10];
_6 = _5 + 1;
reentry_guard_MCL_EXCLUSIVE_AREA_12[u32CoreId_10] ={v} _6;
return;
}
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_11 ()
{
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_11[u32CoreId_10];
_3 = _2 + 4294967295;
reentry_guard_MCL_EXCLUSIVE_AREA_11[u32CoreId_10] ={v} _3;
# DEBUG BEGIN_STMT
_4 ={v} msr_MCL_EXCLUSIVE_AREA_11[u32CoreId_10];
_5 = _4 & 1;
if (_5 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_11[u32CoreId_10];
if (_6 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsie i");
<bb 5> [local count: 1073741824]:
return;
}
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_11 ()
{
register uint32 reg_tmp;
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_11[u32CoreId_10];
if (_2 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
# DEBUG BEGIN_STMT
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
# DEBUG BEGIN_STMT
# DEBUG BEGIN_STMT
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
# DEBUG reg_tmp => reg_tmp_14
# DEBUG BEGIN_STMT
# DEBUG reg_tmp => NULL
msr_MCL_EXCLUSIVE_AREA_11[u32CoreId_10] ={v} reg_tmp_14;
# DEBUG BEGIN_STMT
_3 ={v} msr_MCL_EXCLUSIVE_AREA_11[u32CoreId_10];
_4 = _3 & 1;
if (_4 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsid i");
<bb 5> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_11[u32CoreId_10];
_6 = _5 + 1;
reentry_guard_MCL_EXCLUSIVE_AREA_11[u32CoreId_10] ={v} _6;
return;
}
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_10 ()
{
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_10[u32CoreId_10];
_3 = _2 + 4294967295;
reentry_guard_MCL_EXCLUSIVE_AREA_10[u32CoreId_10] ={v} _3;
# DEBUG BEGIN_STMT
_4 ={v} msr_MCL_EXCLUSIVE_AREA_10[u32CoreId_10];
_5 = _4 & 1;
if (_5 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_10[u32CoreId_10];
if (_6 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsie i");
<bb 5> [local count: 1073741824]:
return;
}
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_10 ()
{
register uint32 reg_tmp;
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_10[u32CoreId_10];
if (_2 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
# DEBUG BEGIN_STMT
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
# DEBUG BEGIN_STMT
# DEBUG BEGIN_STMT
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
# DEBUG reg_tmp => reg_tmp_14
# DEBUG BEGIN_STMT
# DEBUG reg_tmp => NULL
msr_MCL_EXCLUSIVE_AREA_10[u32CoreId_10] ={v} reg_tmp_14;
# DEBUG BEGIN_STMT
_3 ={v} msr_MCL_EXCLUSIVE_AREA_10[u32CoreId_10];
_4 = _3 & 1;
if (_4 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsid i");
<bb 5> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_10[u32CoreId_10];
_6 = _5 + 1;
reentry_guard_MCL_EXCLUSIVE_AREA_10[u32CoreId_10] ={v} _6;
return;
}
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_09 ()
{
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_09[u32CoreId_10];
_3 = _2 + 4294967295;
reentry_guard_MCL_EXCLUSIVE_AREA_09[u32CoreId_10] ={v} _3;
# DEBUG BEGIN_STMT
_4 ={v} msr_MCL_EXCLUSIVE_AREA_09[u32CoreId_10];
_5 = _4 & 1;
if (_5 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_09[u32CoreId_10];
if (_6 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsie i");
<bb 5> [local count: 1073741824]:
return;
}
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_09 ()
{
register uint32 reg_tmp;
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_09[u32CoreId_10];
if (_2 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
# DEBUG BEGIN_STMT
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
# DEBUG BEGIN_STMT
# DEBUG BEGIN_STMT
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
# DEBUG reg_tmp => reg_tmp_14
# DEBUG BEGIN_STMT
# DEBUG reg_tmp => NULL
msr_MCL_EXCLUSIVE_AREA_09[u32CoreId_10] ={v} reg_tmp_14;
# DEBUG BEGIN_STMT
_3 ={v} msr_MCL_EXCLUSIVE_AREA_09[u32CoreId_10];
_4 = _3 & 1;
if (_4 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsid i");
<bb 5> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_09[u32CoreId_10];
_6 = _5 + 1;
reentry_guard_MCL_EXCLUSIVE_AREA_09[u32CoreId_10] ={v} _6;
return;
}
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_08 ()
{
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_08[u32CoreId_10];
_3 = _2 + 4294967295;
reentry_guard_MCL_EXCLUSIVE_AREA_08[u32CoreId_10] ={v} _3;
# DEBUG BEGIN_STMT
_4 ={v} msr_MCL_EXCLUSIVE_AREA_08[u32CoreId_10];
_5 = _4 & 1;
if (_5 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_08[u32CoreId_10];
if (_6 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsie i");
<bb 5> [local count: 1073741824]:
return;
}
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_08 ()
{
register uint32 reg_tmp;
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_08[u32CoreId_10];
if (_2 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
# DEBUG BEGIN_STMT
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
# DEBUG BEGIN_STMT
# DEBUG BEGIN_STMT
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
# DEBUG reg_tmp => reg_tmp_14
# DEBUG BEGIN_STMT
# DEBUG reg_tmp => NULL
msr_MCL_EXCLUSIVE_AREA_08[u32CoreId_10] ={v} reg_tmp_14;
# DEBUG BEGIN_STMT
_3 ={v} msr_MCL_EXCLUSIVE_AREA_08[u32CoreId_10];
_4 = _3 & 1;
if (_4 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsid i");
<bb 5> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_08[u32CoreId_10];
_6 = _5 + 1;
reentry_guard_MCL_EXCLUSIVE_AREA_08[u32CoreId_10] ={v} _6;
return;
}
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_07 ()
{
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_07[u32CoreId_10];
_3 = _2 + 4294967295;
reentry_guard_MCL_EXCLUSIVE_AREA_07[u32CoreId_10] ={v} _3;
# DEBUG BEGIN_STMT
_4 ={v} msr_MCL_EXCLUSIVE_AREA_07[u32CoreId_10];
_5 = _4 & 1;
if (_5 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_07[u32CoreId_10];
if (_6 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsie i");
<bb 5> [local count: 1073741824]:
return;
}
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_07 ()
{
register uint32 reg_tmp;
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_07[u32CoreId_10];
if (_2 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
# DEBUG BEGIN_STMT
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
# DEBUG BEGIN_STMT
# DEBUG BEGIN_STMT
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
# DEBUG reg_tmp => reg_tmp_14
# DEBUG BEGIN_STMT
# DEBUG reg_tmp => NULL
msr_MCL_EXCLUSIVE_AREA_07[u32CoreId_10] ={v} reg_tmp_14;
# DEBUG BEGIN_STMT
_3 ={v} msr_MCL_EXCLUSIVE_AREA_07[u32CoreId_10];
_4 = _3 & 1;
if (_4 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsid i");
<bb 5> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_07[u32CoreId_10];
_6 = _5 + 1;
reentry_guard_MCL_EXCLUSIVE_AREA_07[u32CoreId_10] ={v} _6;
return;
}
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_06 ()
{
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_06[u32CoreId_10];
_3 = _2 + 4294967295;
reentry_guard_MCL_EXCLUSIVE_AREA_06[u32CoreId_10] ={v} _3;
# DEBUG BEGIN_STMT
_4 ={v} msr_MCL_EXCLUSIVE_AREA_06[u32CoreId_10];
_5 = _4 & 1;
if (_5 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_06[u32CoreId_10];
if (_6 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsie i");
<bb 5> [local count: 1073741824]:
return;
}
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_06 ()
{
register uint32 reg_tmp;
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_06[u32CoreId_10];
if (_2 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
# DEBUG BEGIN_STMT
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
# DEBUG BEGIN_STMT
# DEBUG BEGIN_STMT
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
# DEBUG reg_tmp => reg_tmp_14
# DEBUG BEGIN_STMT
# DEBUG reg_tmp => NULL
msr_MCL_EXCLUSIVE_AREA_06[u32CoreId_10] ={v} reg_tmp_14;
# DEBUG BEGIN_STMT
_3 ={v} msr_MCL_EXCLUSIVE_AREA_06[u32CoreId_10];
_4 = _3 & 1;
if (_4 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsid i");
<bb 5> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_06[u32CoreId_10];
_6 = _5 + 1;
reentry_guard_MCL_EXCLUSIVE_AREA_06[u32CoreId_10] ={v} _6;
return;
}
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_05 ()
{
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_05[u32CoreId_10];
_3 = _2 + 4294967295;
reentry_guard_MCL_EXCLUSIVE_AREA_05[u32CoreId_10] ={v} _3;
# DEBUG BEGIN_STMT
_4 ={v} msr_MCL_EXCLUSIVE_AREA_05[u32CoreId_10];
_5 = _4 & 1;
if (_5 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_05[u32CoreId_10];
if (_6 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsie i");
<bb 5> [local count: 1073741824]:
return;
}
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_05 ()
{
register uint32 reg_tmp;
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_05[u32CoreId_10];
if (_2 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
# DEBUG BEGIN_STMT
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
# DEBUG BEGIN_STMT
# DEBUG BEGIN_STMT
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
# DEBUG reg_tmp => reg_tmp_14
# DEBUG BEGIN_STMT
# DEBUG reg_tmp => NULL
msr_MCL_EXCLUSIVE_AREA_05[u32CoreId_10] ={v} reg_tmp_14;
# DEBUG BEGIN_STMT
_3 ={v} msr_MCL_EXCLUSIVE_AREA_05[u32CoreId_10];
_4 = _3 & 1;
if (_4 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsid i");
<bb 5> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_05[u32CoreId_10];
_6 = _5 + 1;
reentry_guard_MCL_EXCLUSIVE_AREA_05[u32CoreId_10] ={v} _6;
return;
}
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_04 ()
{
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_04[u32CoreId_10];
_3 = _2 + 4294967295;
reentry_guard_MCL_EXCLUSIVE_AREA_04[u32CoreId_10] ={v} _3;
# DEBUG BEGIN_STMT
_4 ={v} msr_MCL_EXCLUSIVE_AREA_04[u32CoreId_10];
_5 = _4 & 1;
if (_5 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_04[u32CoreId_10];
if (_6 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsie i");
<bb 5> [local count: 1073741824]:
return;
}
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_04 ()
{
register uint32 reg_tmp;
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_04[u32CoreId_10];
if (_2 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
# DEBUG BEGIN_STMT
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
# DEBUG BEGIN_STMT
# DEBUG BEGIN_STMT
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
# DEBUG reg_tmp => reg_tmp_14
# DEBUG BEGIN_STMT
# DEBUG reg_tmp => NULL
msr_MCL_EXCLUSIVE_AREA_04[u32CoreId_10] ={v} reg_tmp_14;
# DEBUG BEGIN_STMT
_3 ={v} msr_MCL_EXCLUSIVE_AREA_04[u32CoreId_10];
_4 = _3 & 1;
if (_4 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsid i");
<bb 5> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_04[u32CoreId_10];
_6 = _5 + 1;
reentry_guard_MCL_EXCLUSIVE_AREA_04[u32CoreId_10] ={v} _6;
return;
}
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_03 ()
{
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_03[u32CoreId_10];
_3 = _2 + 4294967295;
reentry_guard_MCL_EXCLUSIVE_AREA_03[u32CoreId_10] ={v} _3;
# DEBUG BEGIN_STMT
_4 ={v} msr_MCL_EXCLUSIVE_AREA_03[u32CoreId_10];
_5 = _4 & 1;
if (_5 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_03[u32CoreId_10];
if (_6 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsie i");
<bb 5> [local count: 1073741824]:
return;
}
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_03 ()
{
register uint32 reg_tmp;
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_03[u32CoreId_10];
if (_2 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
# DEBUG BEGIN_STMT
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
# DEBUG BEGIN_STMT
# DEBUG BEGIN_STMT
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
# DEBUG reg_tmp => reg_tmp_14
# DEBUG BEGIN_STMT
# DEBUG reg_tmp => NULL
msr_MCL_EXCLUSIVE_AREA_03[u32CoreId_10] ={v} reg_tmp_14;
# DEBUG BEGIN_STMT
_3 ={v} msr_MCL_EXCLUSIVE_AREA_03[u32CoreId_10];
_4 = _3 & 1;
if (_4 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsid i");
<bb 5> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_03[u32CoreId_10];
_6 = _5 + 1;
reentry_guard_MCL_EXCLUSIVE_AREA_03[u32CoreId_10] ={v} _6;
return;
}
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_02 ()
{
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_02[u32CoreId_10];
_3 = _2 + 4294967295;
reentry_guard_MCL_EXCLUSIVE_AREA_02[u32CoreId_10] ={v} _3;
# DEBUG BEGIN_STMT
_4 ={v} msr_MCL_EXCLUSIVE_AREA_02[u32CoreId_10];
_5 = _4 & 1;
if (_5 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_02[u32CoreId_10];
if (_6 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsie i");
<bb 5> [local count: 1073741824]:
return;
}
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_02 ()
{
register uint32 reg_tmp;
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_02[u32CoreId_10];
if (_2 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
# DEBUG BEGIN_STMT
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
# DEBUG BEGIN_STMT
# DEBUG BEGIN_STMT
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
# DEBUG reg_tmp => reg_tmp_14
# DEBUG BEGIN_STMT
# DEBUG reg_tmp => NULL
msr_MCL_EXCLUSIVE_AREA_02[u32CoreId_10] ={v} reg_tmp_14;
# DEBUG BEGIN_STMT
_3 ={v} msr_MCL_EXCLUSIVE_AREA_02[u32CoreId_10];
_4 = _3 & 1;
if (_4 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsid i");
<bb 5> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_02[u32CoreId_10];
_6 = _5 + 1;
reentry_guard_MCL_EXCLUSIVE_AREA_02[u32CoreId_10] ={v} _6;
return;
}
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_01 ()
{
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_01[u32CoreId_10];
_3 = _2 + 4294967295;
reentry_guard_MCL_EXCLUSIVE_AREA_01[u32CoreId_10] ={v} _3;
# DEBUG BEGIN_STMT
_4 ={v} msr_MCL_EXCLUSIVE_AREA_01[u32CoreId_10];
_5 = _4 & 1;
if (_5 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_01[u32CoreId_10];
if (_6 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsie i");
<bb 5> [local count: 1073741824]:
return;
}
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_01 ()
{
register uint32 reg_tmp;
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_01[u32CoreId_10];
if (_2 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
# DEBUG BEGIN_STMT
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
# DEBUG BEGIN_STMT
# DEBUG BEGIN_STMT
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
# DEBUG reg_tmp => reg_tmp_14
# DEBUG BEGIN_STMT
# DEBUG reg_tmp => NULL
msr_MCL_EXCLUSIVE_AREA_01[u32CoreId_10] ={v} reg_tmp_14;
# DEBUG BEGIN_STMT
_3 ={v} msr_MCL_EXCLUSIVE_AREA_01[u32CoreId_10];
_4 = _3 & 1;
if (_4 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsid i");
<bb 5> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_01[u32CoreId_10];
_6 = _5 + 1;
reentry_guard_MCL_EXCLUSIVE_AREA_01[u32CoreId_10] ={v} _6;
return;
}
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_00 ()
{
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_00[u32CoreId_10];
_3 = _2 + 4294967295;
reentry_guard_MCL_EXCLUSIVE_AREA_00[u32CoreId_10] ={v} _3;
# DEBUG BEGIN_STMT
_4 ={v} msr_MCL_EXCLUSIVE_AREA_00[u32CoreId_10];
_5 = _4 & 1;
if (_5 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
_6 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_00[u32CoreId_10];
if (_6 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsie i");
<bb 5> [local count: 1073741824]:
return;
}
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_00 ()
{
register uint32 reg_tmp;
uint32 u32CoreId;
unsigned char _1;
long unsigned int _2;
long unsigned int _3;
long unsigned int _4;
long unsigned int _5;
long unsigned int _6;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_1 = Sys_GetCoreID ();
u32CoreId_10 = (uint32) _1;
# DEBUG u32CoreId => u32CoreId_10
# DEBUG BEGIN_STMT
_2 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_00[u32CoreId_10];
if (_2 == 0)
goto <bb 3>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 3> [local count: 536870913]:
# DEBUG BEGIN_STMT
# DEBUG INLINE_ENTRY Mcl_schm_read_msr
# DEBUG BEGIN_STMT
# DEBUG BEGIN_STMT
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
# DEBUG reg_tmp => reg_tmp_14
# DEBUG BEGIN_STMT
# DEBUG reg_tmp => NULL
msr_MCL_EXCLUSIVE_AREA_00[u32CoreId_10] ={v} reg_tmp_14;
# DEBUG BEGIN_STMT
_3 ={v} msr_MCL_EXCLUSIVE_AREA_00[u32CoreId_10];
_4 = _3 & 1;
if (_4 == 0)
goto <bb 4>; [50.00%]
else
goto <bb 5>; [50.00%]
<bb 4> [local count: 268435456]:
# DEBUG BEGIN_STMT
__asm__ __volatile__(" cpsid i");
<bb 5> [local count: 1073741824]:
# DEBUG BEGIN_STMT
_5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_00[u32CoreId_10];
_6 = _5 + 1;
reentry_guard_MCL_EXCLUSIVE_AREA_00[u32CoreId_10] ={v} _6;
return;
}
Mcl_schm_read_msr ()
{
register uint32 reg_tmp;
<bb 2> [local count: 1073741824]:
# DEBUG BEGIN_STMT
# DEBUG BEGIN_STMT
__asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_1);
# DEBUG reg_tmp => reg_tmp_1
# DEBUG BEGIN_STMT
return reg_tmp_1;
}
Reference in New Issue View Git Blame Copy Permalink