mirror of
https://github.com/Dev-KATECH/ADM.git
synced 2026-05-17 01:43:59 +09:00
5053 lines
126 KiB
Plaintext
5053 lines
126 KiB
Plaintext
Parsed function:Adc_Sar_Ip_SetPresamplingSource.part.0
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Parsed function:Adc_Sar_Ip_SetExternalTrigger
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Parsed function:Adc_Sar_Ip_SetCtuMode
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Parsed function:Adc_Sar_Ip_SetConversionMode
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Parsed function:Adc_Sar_Ip_SetWdgThreshold
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Parsed function:Adc_Sar_Ip_SetDmaClearSource
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Parsed function:Adc_Sar_Ip_DisableChannelDmaAll
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Parsed function:Adc_Sar_Ip_DisableChannelDma
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Parsed function:Adc_Sar_Ip_EnableChannelDma
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Parsed function:Adc_Sar_Ip_DisableDma
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Parsed function:Adc_Sar_Ip_EnableDma
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Parsed function:Adc_Sar_Ip_DisablePresampleConversion
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Parsed function:Adc_Sar_Ip_EnablePresampleConversion
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Parsed function:Adc_Sar_Ip_DisableChannelPresampling
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Parsed function:Adc_Sar_Ip_EnableChannelPresampling
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Parsed function:Adc_Sar_Ip_SetPresamplingSource
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Parsed function:Adc_Sar_Ip_AbortChain
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Parsed function:Adc_Sar_Ip_AbortConversion
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Parsed function:Adc_Sar_Ip_SetAveraging
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Parsed function:Adc_Sar_Ip_SetSampleTimes
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Parsed function:Adc_Sar_Ip_SetClockMode
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Parsed function:Adc_Sar_Ip_DisableChannelNotifications
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Parsed function:Adc_Sar_Ip_EnableChannelNotifications
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Parsed function:Adc_Sar_Ip_DisableNotifications
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Parsed function:Adc_Sar_Ip_EnableNotifications
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Parsed function:Adc_Sar_Ip_Powerdown
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Parsed function:Adc_Sar_Ip_Powerup
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Parsed function:Adc_Sar_Ip_DoCalibration
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Parsed function:Adc_Sar_Ip_GetConvResult
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Parsed function:Adc_Sar_Ip_GetConvData
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Parsed function:Adc_Sar_Ip_GetConvResultsToArray
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Parsed function:Adc_Sar_Ip_GetConvDataToArray
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Parsed function:Adc_Sar_Ip_SelfTest
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Parsed function:Adc_Sar_Ip_ClearStatusFlags
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Parsed function:Adc_Sar_Ip_GetStatusFlags
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Parsed function:Adc_Sar_Ip_StartConversion
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Parsed function:Adc_Sar_Ip_SetResolution
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Parsed function:Adc_Sar_Ip_DisableChannel
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Parsed function:Adc_Sar_Ip_EnableChannel
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Parsed function:Adc_Sar_Ip_ChainConfig
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Parsed function:Adc_Sar_Ip_Deinit
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Parsed function:Adc_Sar_Ip_Init
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Parsed function:Adc_Sar_Ip_IRQHandler
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Parsed function:Adc_Sar_ConfigExternalTrigger
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Parsed function:Adc_Sar_Ip_GetDataAddress
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Parsed function:Adc_Sar_CheckAndCallNotification
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Parsed function:Adc_Sar_ResetWdog
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Parsed function:Adc_Sar_GetConvResults
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Parsed function:Adc_Sar_CheckSelfTestProgress
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Parsed function:Adc_Sar_EnableChannelWatchdog
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Parsed function:Adc_Sar_CollectMcrMasks
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Parsed function:Adc_Sar_GetIsrFlags
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Parsed function:Adc_Sar_GetMsrFlags
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Parsed function:Adc_Sar_GetMaskedResult
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Parsed function:Adc_Sar_GetResolution
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Parsed function:Adc_Sar_WriteChannelMapping
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Dump after hash based groups
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Congruence classes: 59 (unique hash values: 59), with total: 59 items
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Class size histogram [num of members]: number of classe number of classess
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[1]: 59 classes
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Dump after WPA based types groups
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Congruence classes: 59 (unique hash values: 59), with total: 59 items
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Class size histogram [num of members]: number of classe number of classess
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[1]: 59 classes
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Worklist has been filled with: 28
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Address reference subdivision created: 0 new classes.
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Dump after callgraph-based congruence reduction
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Congruence classes: 59 (unique hash values: 59), with total: 59 items
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Class size histogram [num of members]: number of classe number of classess
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[1]: 59 classes
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Init called for 0 items (0.00%).
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Dump after full equality comparison of groups
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Congruence classes: 59 (unique hash values: 59), with total: 59 items
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Class size histogram [num of members]: number of classe number of classess
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[1]: 59 classes
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Worklist has been filled with: 28
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Address reference subdivision created: 0 new classes.
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Congruence classes: 59 (unique hash values: 59), with total: 59 items
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Class size histogram [num of members]: number of classe number of classess
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[1]: 59 classes
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Item count: 59
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Congruent classes before: 59, after: 59
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Average class size before: 1.00, after: 1.00
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Average non-singular class size: 0.00, count: 0
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Equal symbols: 0
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Fraction of visited symbols: 0.00%
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Adc_Sar_Ip_SetPresamplingSource.part.0 (const uint32 u32Instance, const Adc_Sar_Ip_ChanGroupType pChanGroup, const Adc_Sar_Ip_PresamplingSourceType pPresampleSource)
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{
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struct ADC_Type * const pBase;
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uint32 u32Pscr;
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long unsigned int _7;
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long unsigned int _8;
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long unsigned int _9;
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long unsigned int _12;
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long unsigned int _13;
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long unsigned int _14;
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long unsigned int _17;
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long unsigned int _18;
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long unsigned int _19;
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<bb 8> [local count: 1073741824]:
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<bb 2> [local count: 1073741824]:
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# DEBUG BEGIN_STMT
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pBase_2 = pAdcBase[u32Instance_1(D)];
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# DEBUG pBase => pBase_2
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# DEBUG BEGIN_STMT
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SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_38 ();
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# DEBUG BEGIN_STMT
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u32Pscr_3 ={v} pBase_2->PSCR;
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# DEBUG u32Pscr => u32Pscr_3
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# DEBUG BEGIN_STMT
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switch (pChanGroup_4(D)) <default: <L3> [25.00%], case 0: <L0> [25.00%], case 1: <L1> [25.00%], case 2: <L2> [25.00%]>
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<bb 3> [local count: 268435456]:
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<L0>:
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# DEBUG BEGIN_STMT
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u32Pscr_5 = u32Pscr_3 & 4294967293;
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# DEBUG u32Pscr => u32Pscr_5
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# DEBUG BEGIN_STMT
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_7 = (long unsigned int) pPresampleSource_6(D);
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_8 = _7 << 1;
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_9 = _8 & 2;
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u32Pscr_10 = u32Pscr_5 | _9;
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# DEBUG u32Pscr => u32Pscr_10
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# DEBUG BEGIN_STMT
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goto <bb 6>; [100.00%]
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<bb 4> [local count: 268435456]:
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<L1>:
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# DEBUG BEGIN_STMT
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u32Pscr_11 = u32Pscr_3 & 4294967287;
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# DEBUG u32Pscr => u32Pscr_11
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# DEBUG BEGIN_STMT
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_12 = (long unsigned int) pPresampleSource_6(D);
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_13 = _12 << 3;
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_14 = _13 & 8;
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u32Pscr_15 = u32Pscr_11 | _14;
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# DEBUG u32Pscr => u32Pscr_15
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# DEBUG BEGIN_STMT
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goto <bb 6>; [100.00%]
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<bb 5> [local count: 268435456]:
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<L2>:
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# DEBUG BEGIN_STMT
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u32Pscr_16 = u32Pscr_3 & 4294967263;
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# DEBUG u32Pscr => u32Pscr_16
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# DEBUG BEGIN_STMT
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_17 = (long unsigned int) pPresampleSource_6(D);
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_18 = _17 << 5;
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_19 = _18 & 32;
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u32Pscr_20 = u32Pscr_16 | _19;
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# DEBUG u32Pscr => u32Pscr_20
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# DEBUG BEGIN_STMT
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<bb 6> [local count: 1073741824]:
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# u32Pscr_21 = PHI <u32Pscr_3(2), u32Pscr_10(3), u32Pscr_15(4), u32Pscr_20(5)>
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<L3>:
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# DEBUG u32Pscr => u32Pscr_21
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# DEBUG BEGIN_STMT
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pBase_2->PSCR ={v} u32Pscr_21;
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# DEBUG BEGIN_STMT
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SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_38 ();
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<bb 7> [local count: 1073741824]:
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return;
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}
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Adc_Sar_Ip_SetExternalTrigger (const uint32 u32Instance, const Adc_Sar_Ip_ExtTriggerEdgeType eTriggerEdge, const Adc_Sar_Ip_ExtTriggerSourceType eTrggerSrc)
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{
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<bb 2> [local count: 1073741823]:
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# DEBUG BEGIN_STMT
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switch (eTrggerSrc_2(D)) <default: <L6> [20.00%], case 0: <L0> [20.00%], case 1: <L1> [20.00%], case 2: <L2> [20.00%], case 3: <L3> [20.00%]>
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<bb 3> [local count: 214748364]:
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<L0>:
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# DEBUG BEGIN_STMT
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Adc_Sar_ConfigExternalTrigger (u32Instance_4(D), eTriggerEdge_5(D), 67108864, 0, 134217728);
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# DEBUG BEGIN_STMT
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goto <bb 7>; [100.00%]
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<bb 4> [local count: 214748364]:
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<L1>:
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# DEBUG BEGIN_STMT
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Adc_Sar_ConfigExternalTrigger (u32Instance_4(D), eTriggerEdge_5(D), 67108864, 0, 33554432);
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# DEBUG BEGIN_STMT
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goto <bb 7>; [100.00%]
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<bb 5> [local count: 214748364]:
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<L2>:
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# DEBUG BEGIN_STMT
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Adc_Sar_ConfigExternalTrigger (u32Instance_4(D), eTriggerEdge_5(D), 67108864, 67108864, 167772160);
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# DEBUG BEGIN_STMT
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goto <bb 7>; [100.00%]
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<bb 6> [local count: 214748364]:
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<L3>:
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# DEBUG BEGIN_STMT
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Adc_Sar_ConfigExternalTrigger (u32Instance_4(D), eTriggerEdge_5(D), 2097152, 2097152, 4194304);
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# DEBUG BEGIN_STMT
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<bb 7> [local count: 1073741824]:
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<L6>:
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return;
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}
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Adc_Sar_Ip_SetCtuMode (const uint32 u32Instance, const Adc_Sar_Ip_CtuModeType eCtuMode)
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{
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struct ADC_Type * const pBase;
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Adc_Sar_Ip_StatusType eStatus;
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long unsigned int _1;
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long unsigned int _2;
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long unsigned int _3;
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long unsigned int _4;
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long unsigned int _5;
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long unsigned int _6;
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long unsigned int _7;
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long unsigned int _8;
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long unsigned int _9;
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long unsigned int _10;
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long unsigned int _11;
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long unsigned int _12;
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Adc_Sar_Ip_StatusType _13;
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<bb 2> [local count: 1073741824]:
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# DEBUG BEGIN_STMT
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# DEBUG eStatus => 0
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# DEBUG BEGIN_STMT
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pBase_19 = pAdcBase[u32Instance_18(D)];
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# DEBUG pBase => pBase_19
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# DEBUG BEGIN_STMT
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SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_20 ();
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# DEBUG BEGIN_STMT
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_1 ={v} pBase_19->MCR;
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_2 = _1 & 4294836223;
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pBase_19->MCR ={v} _2;
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# DEBUG BEGIN_STMT
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SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_20 ();
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# DEBUG BEGIN_STMT
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eStatus_24 = Adc_Sar_Ip_Powerdown (u32Instance_18(D));
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# DEBUG eStatus => eStatus_24
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# DEBUG BEGIN_STMT
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if (eStatus_24 != 0)
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goto <bb 10>; [34.00%]
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else
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goto <bb 3>; [66.00%]
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<bb 3> [local count: 708669605]:
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# DEBUG BEGIN_STMT
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_3 = u32AdcFeatureBitmap[u32Instance_18(D)];
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_4 = _3 & 4;
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if (_4 != 0)
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goto <bb 4>; [33.00%]
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else
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goto <bb 9>; [67.00%]
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<bb 4> [local count: 233860969]:
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# DEBUG BEGIN_STMT
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SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_20 ();
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# DEBUG BEGIN_STMT
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switch (eCtuMode_26(D)) <default: <L10> [25.00%], case 0: <L5> [25.00%], case 1: <L3> [25.00%], case 2: <L4> [25.00%]>
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<bb 5> [local count: 58465242]:
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<L3>:
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# DEBUG BEGIN_STMT
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_5 ={v} pBase_19->MCR;
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_6 = _5 & 4294901759;
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pBase_19->MCR ={v} _6;
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# DEBUG BEGIN_STMT
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_7 ={v} pBase_19->MCR;
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_8 = _7 | 131072;
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pBase_19->MCR ={v} _8;
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# DEBUG BEGIN_STMT
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goto <bb 8>; [100.00%]
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<bb 6> [local count: 58465242]:
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<L4>:
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# DEBUG BEGIN_STMT
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_9 ={v} pBase_19->MCR;
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_10 = _9 | 196608;
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pBase_19->MCR ={v} _10;
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# DEBUG BEGIN_STMT
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goto <bb 8>; [100.00%]
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<bb 7> [local count: 58465242]:
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<L5>:
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# DEBUG BEGIN_STMT
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_11 ={v} pBase_19->MCR;
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_12 = _11 & 4294770687;
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pBase_19->MCR ={v} _12;
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# DEBUG BEGIN_STMT
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<bb 8> [local count: 233860969]:
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<L10>:
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# DEBUG BEGIN_STMT
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SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_20 ();
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<bb 9> [local count: 708669605]:
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# DEBUG BEGIN_STMT
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eStatus_33 = Adc_Sar_Ip_Powerup (u32Instance_18(D));
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# DEBUG eStatus => eStatus_33
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# DEBUG BEGIN_STMT
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<bb 10> [local count: 1073741824]:
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# _13 = PHI <eStatus_24(2), eStatus_33(9)>
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return _13;
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}
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Adc_Sar_Ip_SetConversionMode (const uint32 u32Instance, const Adc_Sar_Ip_ConvModeType eConvMode)
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{
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struct ADC_Type * const pBase;
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long unsigned int _1;
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long unsigned int _2;
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long unsigned int _3;
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long unsigned int _4;
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<bb 2> [local count: 1073741824]:
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# DEBUG BEGIN_STMT
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pBase_8 = pAdcBase[u32Instance_7(D)];
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# DEBUG pBase => pBase_8
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# DEBUG BEGIN_STMT
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SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_19 ();
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# DEBUG BEGIN_STMT
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switch (eConvMode_10(D)) <default: <L4> [33.33%], case 0: <L0> [33.33%], case 1: <L1> [33.33%]>
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<bb 3> [local count: 357878150]:
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<L0>:
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# DEBUG BEGIN_STMT
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_1 ={v} pBase_8->MCR;
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_2 = _1 & 3758096383;
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pBase_8->MCR ={v} _2;
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# DEBUG BEGIN_STMT
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goto <bb 5>; [100.00%]
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<bb 4> [local count: 357878150]:
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<L1>:
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# DEBUG BEGIN_STMT
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_3 ={v} pBase_8->MCR;
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_4 = _3 | 536870912;
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pBase_8->MCR ={v} _4;
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# DEBUG BEGIN_STMT
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<bb 5> [local count: 1073634451]:
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<L4>:
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# DEBUG BEGIN_STMT
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SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_19 ();
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return;
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}
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Adc_Sar_Ip_SetWdgThreshold (const uint32 u32Instance, const uint8 u8RegisterIdx, const struct Adc_Sar_Ip_WdgThresholdType * const pThresholdValues)
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{
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uint32 u32Value;
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uint32 u32Wtimr;
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uint16 u16LowThreshold;
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uint8 u8Shift;
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struct ADC_Type * const pBase;
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unsigned char _1;
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short unsigned int _2;
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int _3;
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int _4;
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int _5;
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short unsigned int _6;
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int _7;
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int _8;
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_Bool _9;
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unsigned int _10;
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unsigned int _11;
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unsigned int _12;
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long unsigned int _13;
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unsigned int _14;
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unsigned int _15;
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unsigned int _16;
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long unsigned int _17;
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long unsigned int _18;
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_Bool _19;
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unsigned int _20;
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unsigned int _21;
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long unsigned int _22;
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unsigned int _23;
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unsigned int _24;
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long unsigned int _25;
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long unsigned int _26;
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long unsigned int _45;
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short unsigned int _46;
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long unsigned int _47;
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int _49;
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long unsigned int _51;
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long unsigned int _52;
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<bb 2> [local count: 1073741824]:
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# DEBUG BEGIN_STMT
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pBase_31 = pAdcBase[u32Instance_30(D)];
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# DEBUG pBase => pBase_31
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# DEBUG BEGIN_STMT
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_1 = Adc_Sar_GetResolution (u32Instance_30(D));
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u8Shift_33 = 15 - _1;
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# DEBUG u8Shift => u8Shift_33
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# DEBUG BEGIN_STMT
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_2 = pThresholdValues_34(D)->u16HighThreshold;
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_3 = (int) _2;
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_4 = (int) u8Shift_33;
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_5 = _3 << _4;
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# DEBUG D#1 => (uint16) _5
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# DEBUG u16HighThreshold => D#1
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# DEBUG BEGIN_STMT
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_6 = pThresholdValues_34(D)->u16LowThreshold;
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_7 = (int) _6;
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_8 = _7 << _4;
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u16LowThreshold_35 = (uint16) _8;
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# DEBUG u16LowThreshold => u16LowThreshold_35
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# DEBUG BEGIN_STMT
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# DEBUG pBase => pBase_31
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# DEBUG u8RegisterNumber => u8RegisterIdx_36(D)
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# DEBUG u16HighThreshold => D#1
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# DEBUG u16LowThreshold => u16LowThreshold_35
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# DEBUG INLINE_ENTRY Adc_Sar_WriteThresholds
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# DEBUG BEGIN_STMT
|
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_51 = (long unsigned int) _5;
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_52 = _51 << 16;
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_45 = _52 & 2147418112;
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_46 = u16LowThreshold_35 & 32767;
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_47 = (long unsigned int) _46;
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u32Value_48 = _45 | _47;
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# DEBUG u32Value => u32Value_48
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# DEBUG BEGIN_STMT
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_49 = (int) u8RegisterIdx_36(D);
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pBase_31->THRHLR[_49] ={v} u32Value_48;
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# DEBUG pBase => NULL
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# DEBUG u8RegisterNumber => NULL
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# DEBUG u16HighThreshold => NULL
|
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# DEBUG u16LowThreshold => NULL
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# DEBUG u32Value => NULL
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# DEBUG BEGIN_STMT
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_32 ();
|
|
# DEBUG BEGIN_STMT
|
|
u32Wtimr_38 ={v} pBase_31->WTIMR;
|
|
# DEBUG u32Wtimr => u32Wtimr_38
|
|
# DEBUG BEGIN_STMT
|
|
_9 = pThresholdValues_34(D)->bLowThresholdIntEn;
|
|
if (_9 != 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 4>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
_10 = (unsigned int) u8RegisterIdx_36(D);
|
|
_11 = _10 * 2;
|
|
_12 = _11 + 1;
|
|
_13 = 1 << _12;
|
|
u32Wtimr_40 = _13 | u32Wtimr_38;
|
|
# DEBUG u32Wtimr => u32Wtimr_40
|
|
goto <bb 5>; [100.00%]
|
|
|
|
<bb 4> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
_14 = (unsigned int) u8RegisterIdx_36(D);
|
|
_15 = _14 * 2;
|
|
_16 = _15 + 1;
|
|
_17 = 1 << _16;
|
|
_18 = ~_17;
|
|
u32Wtimr_39 = _18 & u32Wtimr_38;
|
|
# DEBUG u32Wtimr => u32Wtimr_39
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# u32Wtimr_27 = PHI <u32Wtimr_40(3), u32Wtimr_39(4)>
|
|
# DEBUG u32Wtimr => u32Wtimr_27
|
|
# DEBUG BEGIN_STMT
|
|
_19 = pThresholdValues_34(D)->bHighThresholdIntEn;
|
|
if (_19 != 0)
|
|
goto <bb 6>; [50.00%]
|
|
else
|
|
goto <bb 7>; [50.00%]
|
|
|
|
<bb 6> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
_20 = (unsigned int) u8RegisterIdx_36(D);
|
|
_21 = _20 * 2;
|
|
_22 = 1 << _21;
|
|
u32Wtimr_42 = _22 | u32Wtimr_27;
|
|
# DEBUG u32Wtimr => u32Wtimr_42
|
|
goto <bb 8>; [100.00%]
|
|
|
|
<bb 7> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
_23 = (unsigned int) u8RegisterIdx_36(D);
|
|
_24 = _23 * 2;
|
|
_25 = 1 << _24;
|
|
_26 = ~_25;
|
|
u32Wtimr_41 = _26 & u32Wtimr_27;
|
|
# DEBUG u32Wtimr => u32Wtimr_41
|
|
|
|
<bb 8> [local count: 1073741824]:
|
|
# u32Wtimr_28 = PHI <u32Wtimr_42(6), u32Wtimr_41(7)>
|
|
# DEBUG u32Wtimr => u32Wtimr_28
|
|
# DEBUG BEGIN_STMT
|
|
pBase_31->WTIMR ={v} u32Wtimr_28;
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_32 ();
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Adc_Sar_Ip_SetDmaClearSource (const uint32 u32Instance, const Adc_Sar_Ip_ClearSourceType pDmaClear)
|
|
{
|
|
struct ADC_Type * const pBase;
|
|
long unsigned int _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
long unsigned int _7;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
pBase_10 = pAdcBase[u32Instance_9(D)];
|
|
# DEBUG pBase => pBase_10
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_45 ();
|
|
# DEBUG BEGIN_STMT
|
|
_1 ={v} pBase_10->DMAE;
|
|
_2 = _1 & 4294967293;
|
|
pBase_10->DMAE ={v} _2;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} pBase_10->DMAE;
|
|
_4 = (long unsigned int) pDmaClear_13(D);
|
|
_5 = _4 << 1;
|
|
_6 = _5 & 2;
|
|
_7 = _3 | _6;
|
|
pBase_10->DMAE ={v} _7;
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_45 ();
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Adc_Sar_Ip_DisableChannelDmaAll (const uint32 u32Instance)
|
|
{
|
|
uint8 u8Index;
|
|
struct ADC_Type * const pBase;
|
|
int _1;
|
|
long unsigned int _2;
|
|
volatile uint32_t * _3;
|
|
unsigned int _4;
|
|
unsigned int _5;
|
|
volatile uint32_t * _6;
|
|
long unsigned int _7;
|
|
long unsigned int _8;
|
|
long unsigned int _9;
|
|
|
|
<bb 2> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
pBase_15 = pAdcBase[u32Instance_14(D)];
|
|
# DEBUG pBase => pBase_15
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG u8Index => 0
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG u8Index => 0
|
|
goto <bb 7>; [100.00%]
|
|
|
|
<bb 3> [local count: 805306369]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) u8Index_10;
|
|
_2 = u32AdcChanBitmap[u32Instance_14(D)][_1];
|
|
if (_2 == 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 402653184]:
|
|
# DEBUG BEGIN_STMT
|
|
// predicted unlikely by continue predictor.
|
|
goto <bb 6>; [100.00%]
|
|
|
|
<bb 5> [local count: 402653184]:
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_48 ();
|
|
# DEBUG BEGIN_STMT
|
|
_3 = &pBase_15->DMAR0;
|
|
_4 = (unsigned int) u8Index_10;
|
|
_5 = _4 * 4;
|
|
_6 = _3 + _5;
|
|
_7 ={v} MEM[(volatile uint32 *)_6];
|
|
_8 = ~_2;
|
|
_9 = _7 & _8;
|
|
MEM[(volatile uint32 *)_6] ={v} _9;
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_48 ();
|
|
|
|
<bb 6> [local count: 805306369]:
|
|
# DEBUG BEGIN_STMT
|
|
u8Index_19 = u8Index_10 + 1;
|
|
# DEBUG u8Index => u8Index_19
|
|
|
|
<bb 7> [local count: 1073741824]:
|
|
# u8Index_10 = PHI <0(2), u8Index_19(6)>
|
|
# DEBUG u8Index => u8Index_10
|
|
# DEBUG BEGIN_STMT
|
|
if (u8Index_10 != 3)
|
|
goto <bb 3>; [75.00%]
|
|
else
|
|
goto <bb 8>; [25.00%]
|
|
|
|
<bb 8> [local count: 268435456]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Adc_Sar_Ip_DisableChannelDma (const uint32 u32Instance, const uint32 u32ChnIdx)
|
|
{
|
|
uint32 u32VectBit;
|
|
uint32 u32VectAdr;
|
|
struct ADC_Type * const pBase;
|
|
volatile uint32_t * _1;
|
|
long unsigned int _2;
|
|
volatile uint32_t * _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
long unsigned int _7;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
pBase_10 = pAdcBase[u32Instance_9(D)];
|
|
# DEBUG pBase => pBase_10
|
|
# DEBUG BEGIN_STMT
|
|
u32VectAdr_12 = u32ChnIdx_11(D) >> 5;
|
|
# DEBUG u32VectAdr => u32VectAdr_12
|
|
# DEBUG BEGIN_STMT
|
|
u32VectBit_13 = u32ChnIdx_11(D) & 31;
|
|
# DEBUG u32VectBit => u32VectBit_13
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_47 ();
|
|
# DEBUG BEGIN_STMT
|
|
_1 = &pBase_10->DMAR0;
|
|
_2 = u32VectAdr_12 * 4;
|
|
_3 = _1 + _2;
|
|
_4 ={v} MEM[(volatile uint32 *)_3];
|
|
_5 = 1 << u32VectBit_13;
|
|
_6 = ~_5;
|
|
_7 = _4 & _6;
|
|
MEM[(volatile uint32 *)_3] ={v} _7;
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_47 ();
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Adc_Sar_Ip_EnableChannelDma (const uint32 u32Instance, const uint32 u32ChnIdx)
|
|
{
|
|
uint32 u32VectBit;
|
|
uint32 u32VectAdr;
|
|
struct ADC_Type * const pBase;
|
|
volatile uint32_t * _1;
|
|
long unsigned int _2;
|
|
volatile uint32_t * _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
pBase_9 = pAdcBase[u32Instance_8(D)];
|
|
# DEBUG pBase => pBase_9
|
|
# DEBUG BEGIN_STMT
|
|
u32VectAdr_11 = u32ChnIdx_10(D) >> 5;
|
|
# DEBUG u32VectAdr => u32VectAdr_11
|
|
# DEBUG BEGIN_STMT
|
|
u32VectBit_12 = u32ChnIdx_10(D) & 31;
|
|
# DEBUG u32VectBit => u32VectBit_12
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_46 ();
|
|
# DEBUG BEGIN_STMT
|
|
_1 = &pBase_9->DMAR0;
|
|
_2 = u32VectAdr_11 * 4;
|
|
_3 = _1 + _2;
|
|
_4 ={v} MEM[(volatile uint32 *)_3];
|
|
_5 = 1 << u32VectBit_12;
|
|
_6 = _4 | _5;
|
|
MEM[(volatile uint32 *)_3] ={v} _6;
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_46 ();
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Adc_Sar_Ip_DisableDma (const uint32 u32Instance)
|
|
{
|
|
struct ADC_Type * const pBase;
|
|
long unsigned int _1;
|
|
long unsigned int _2;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
pBase_5 = pAdcBase[u32Instance_4(D)];
|
|
# DEBUG pBase => pBase_5
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_44 ();
|
|
# DEBUG BEGIN_STMT
|
|
_1 ={v} pBase_5->DMAE;
|
|
_2 = _1 & 4294967294;
|
|
pBase_5->DMAE ={v} _2;
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_44 ();
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Adc_Sar_Ip_EnableDma (const uint32 u32Instance)
|
|
{
|
|
struct ADC_Type * const pBase;
|
|
long unsigned int _1;
|
|
long unsigned int _2;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
pBase_5 = pAdcBase[u32Instance_4(D)];
|
|
# DEBUG pBase => pBase_5
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_43 ();
|
|
# DEBUG BEGIN_STMT
|
|
_1 ={v} pBase_5->DMAE;
|
|
_2 = _1 | 1;
|
|
pBase_5->DMAE ={v} _2;
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_43 ();
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Adc_Sar_Ip_DisablePresampleConversion (const uint32 u32Instance)
|
|
{
|
|
struct ADC_Type * const pBase;
|
|
long unsigned int _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = u32AdcFeatureBitmap[u32Instance_7(D)];
|
|
_2 = _1 & 2;
|
|
if (_2 != 0)
|
|
goto <bb 3>; [33.00%]
|
|
else
|
|
goto <bb 4>; [67.00%]
|
|
|
|
<bb 3> [local count: 354334802]:
|
|
# DEBUG BEGIN_STMT
|
|
pBase_8 = pAdcBase[u32Instance_7(D)];
|
|
# DEBUG pBase => pBase_8
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_40 ();
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} pBase_8->PSCR;
|
|
_4 = _3 & 4294967294;
|
|
pBase_8->PSCR ={v} _4;
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_40 ();
|
|
|
|
<bb 4> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Adc_Sar_Ip_EnablePresampleConversion (const uint32 u32Instance)
|
|
{
|
|
struct ADC_Type * const pBase;
|
|
long unsigned int _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = u32AdcFeatureBitmap[u32Instance_7(D)];
|
|
_2 = _1 & 2;
|
|
if (_2 != 0)
|
|
goto <bb 3>; [33.00%]
|
|
else
|
|
goto <bb 4>; [67.00%]
|
|
|
|
<bb 3> [local count: 354334802]:
|
|
# DEBUG BEGIN_STMT
|
|
pBase_8 = pAdcBase[u32Instance_7(D)];
|
|
# DEBUG pBase => pBase_8
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_39 ();
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} pBase_8->PSCR;
|
|
_4 = _3 | 1;
|
|
pBase_8->PSCR ={v} _4;
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_39 ();
|
|
|
|
<bb 4> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Adc_Sar_Ip_DisableChannelPresampling (const uint32 u32Instance, const uint32 u32ChnIdx)
|
|
{
|
|
uint32 u32VectBit;
|
|
uint32 u32VectAdr;
|
|
struct ADC_Type * const pBase;
|
|
long unsigned int _1;
|
|
long unsigned int _2;
|
|
volatile uint32_t * _3;
|
|
long unsigned int _4;
|
|
volatile uint32_t * _5;
|
|
long unsigned int _6;
|
|
long unsigned int _7;
|
|
long unsigned int _8;
|
|
long unsigned int _9;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = u32AdcFeatureBitmap[u32Instance_12(D)];
|
|
_2 = _1 & 2;
|
|
if (_2 != 0)
|
|
goto <bb 3>; [33.00%]
|
|
else
|
|
goto <bb 4>; [67.00%]
|
|
|
|
<bb 3> [local count: 354334802]:
|
|
# DEBUG BEGIN_STMT
|
|
pBase_13 = pAdcBase[u32Instance_12(D)];
|
|
# DEBUG pBase => pBase_13
|
|
# DEBUG BEGIN_STMT
|
|
u32VectAdr_15 = u32ChnIdx_14(D) >> 5;
|
|
# DEBUG u32VectAdr => u32VectAdr_15
|
|
# DEBUG BEGIN_STMT
|
|
u32VectBit_16 = u32ChnIdx_14(D) & 31;
|
|
# DEBUG u32VectBit => u32VectBit_16
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_42 ();
|
|
# DEBUG BEGIN_STMT
|
|
_3 = &pBase_13->PSR0;
|
|
_4 = u32VectAdr_15 * 4;
|
|
_5 = _3 + _4;
|
|
_6 ={v} MEM[(volatile uint32 *)_5];
|
|
_7 = 1 << u32VectBit_16;
|
|
_8 = ~_7;
|
|
_9 = _6 & _8;
|
|
MEM[(volatile uint32 *)_5] ={v} _9;
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_42 ();
|
|
|
|
<bb 4> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Adc_Sar_Ip_EnableChannelPresampling (const uint32 u32Instance, const uint32 u32ChnIdx)
|
|
{
|
|
uint32 u32VectBit;
|
|
uint32 u32VectAdr;
|
|
struct ADC_Type * const pBase;
|
|
long unsigned int _1;
|
|
long unsigned int _2;
|
|
volatile uint32_t * _3;
|
|
long unsigned int _4;
|
|
volatile uint32_t * _5;
|
|
long unsigned int _6;
|
|
long unsigned int _7;
|
|
long unsigned int _8;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = u32AdcFeatureBitmap[u32Instance_11(D)];
|
|
_2 = _1 & 2;
|
|
if (_2 != 0)
|
|
goto <bb 3>; [33.00%]
|
|
else
|
|
goto <bb 4>; [67.00%]
|
|
|
|
<bb 3> [local count: 354334802]:
|
|
# DEBUG BEGIN_STMT
|
|
pBase_12 = pAdcBase[u32Instance_11(D)];
|
|
# DEBUG pBase => pBase_12
|
|
# DEBUG BEGIN_STMT
|
|
u32VectAdr_14 = u32ChnIdx_13(D) >> 5;
|
|
# DEBUG u32VectAdr => u32VectAdr_14
|
|
# DEBUG BEGIN_STMT
|
|
u32VectBit_15 = u32ChnIdx_13(D) & 31;
|
|
# DEBUG u32VectBit => u32VectBit_15
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_41 ();
|
|
# DEBUG BEGIN_STMT
|
|
_3 = &pBase_12->PSR0;
|
|
_4 = u32VectAdr_14 * 4;
|
|
_5 = _3 + _4;
|
|
_6 ={v} MEM[(volatile uint32 *)_5];
|
|
_7 = 1 << u32VectBit_15;
|
|
_8 = _6 | _7;
|
|
MEM[(volatile uint32 *)_5] ={v} _8;
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_41 ();
|
|
|
|
<bb 4> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Adc_Sar_Ip_SetPresamplingSource (const uint32 u32Instance, const Adc_Sar_Ip_ChanGroupType pChanGroup, const Adc_Sar_Ip_PresamplingSourceType pPresampleSource)
|
|
{
|
|
long unsigned int _1;
|
|
long unsigned int _2;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = u32AdcFeatureBitmap[u32Instance_5(D)];
|
|
_2 = _1 & 2;
|
|
if (_2 != 0)
|
|
goto <bb 3>; [33.00%]
|
|
else
|
|
goto <bb 4>; [67.00%]
|
|
|
|
<bb 3> [local count: 354334800]:
|
|
Adc_Sar_Ip_SetPresamplingSource.part.0 (u32Instance_5(D), pChanGroup_6(D), pPresampleSource_7(D));
|
|
|
|
<bb 4> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Adc_Sar_Ip_AbortChain (const uint32 u32Instance, const boolean bBlocking, const boolean bAllowRestart)
|
|
{
|
|
uint32 u32ElapsedTicks;
|
|
uint32 u32CurrentTicks;
|
|
uint32 u32TimeoutTicks;
|
|
uint32 u32Status;
|
|
struct ADC_Type * const pBase;
|
|
long unsigned int _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
long unsigned int _7;
|
|
Adc_Sar_Ip_StatusType _10;
|
|
long unsigned int _31;
|
|
|
|
<bb 2> [local count: 229727064]:
|
|
# DEBUG BEGIN_STMT
|
|
pBase_16 = pAdcBase[u32Instance_15(D)];
|
|
# DEBUG pBase => pBase_16
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
u32TimeoutTicks_18 = OsIf_MicrosToTicks (3000, 0);
|
|
# DEBUG u32TimeoutTicks => u32TimeoutTicks_18
|
|
# DEBUG BEGIN_STMT
|
|
_1 = OsIf_GetCounter (0);
|
|
u32CurrentTicks = _1;
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG u32ElapsedTicks => 0
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_18 ();
|
|
# DEBUG BEGIN_STMT
|
|
if (bAllowRestart_23(D) != 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 3>; [50.00%]
|
|
|
|
<bb 3> [local count: 114863532]:
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} pBase_16->MCR;
|
|
_3 = _2 & 4278190079;
|
|
pBase_16->MCR ={v} _3;
|
|
|
|
<bb 4> [local count: 229727064]:
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} pBase_16->MCR;
|
|
_5 = _4 | 128;
|
|
pBase_16->MCR ={v} _5;
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_18 ();
|
|
# DEBUG BEGIN_STMT
|
|
if (bBlocking_27(D) != 0)
|
|
goto <bb 5>; [50.00%]
|
|
else
|
|
goto <bb 11>; [50.00%]
|
|
|
|
<bb 5> [local count: 114863532]:
|
|
# DEBUG BEGIN_STMT
|
|
_6 ={v} pBase_16->MSR;
|
|
u32Status_28 = _6 & 16777216;
|
|
# DEBUG u32Status => u32Status_28
|
|
# DEBUG BEGIN_STMT
|
|
goto <bb 7>; [100.00%]
|
|
|
|
<bb 6> [local count: 958878293]:
|
|
# DEBUG BEGIN_STMT
|
|
_7 ={v} pBase_16->MSR;
|
|
u32Status_29 = _7 & 16777216;
|
|
# DEBUG u32Status => u32Status_29
|
|
# DEBUG BEGIN_STMT
|
|
_31 = OsIf_GetElapsed (&u32CurrentTicks, 0);
|
|
u32ElapsedTicks_32 = u32ElapsedTicks_9 + _31;
|
|
# DEBUG u32ElapsedTicks => u32ElapsedTicks_32
|
|
|
|
<bb 7> [local count: 1073741824]:
|
|
# u32Status_8 = PHI <u32Status_28(5), u32Status_29(6)>
|
|
# u32ElapsedTicks_9 = PHI <0(5), u32ElapsedTicks_32(6)>
|
|
# DEBUG u32ElapsedTicks => u32ElapsedTicks_9
|
|
# DEBUG u32Status => u32Status_8
|
|
# DEBUG BEGIN_STMT
|
|
if (u32Status_8 == 16777216)
|
|
goto <bb 8>; [94.50%]
|
|
else
|
|
goto <bb 9>; [5.50%]
|
|
|
|
<bb 8> [local count: 1014686025]:
|
|
if (u32ElapsedTicks_9 < u32TimeoutTicks_18)
|
|
goto <bb 6>; [94.50%]
|
|
else
|
|
goto <bb 9>; [5.50%]
|
|
|
|
<bb 9> [local count: 114863532]:
|
|
# u32ElapsedTicks_21 = PHI <u32ElapsedTicks_9(7), u32ElapsedTicks_9(8)>
|
|
# DEBUG BEGIN_STMT
|
|
if (u32TimeoutTicks_18 <= u32ElapsedTicks_21)
|
|
goto <bb 10>; [21.72%]
|
|
else
|
|
goto <bb 11>; [78.28%]
|
|
|
|
<bb 10> [local count: 24948359]:
|
|
# DEBUG BEGIN_STMT
|
|
|
|
<bb 11> [local count: 229727064]:
|
|
# _10 = PHI <2(10), 0(9), 0(4)>
|
|
u32CurrentTicks ={v} {CLOBBER};
|
|
return _10;
|
|
|
|
}
|
|
|
|
|
|
Adc_Sar_Ip_AbortConversion (const uint32 u32Instance)
|
|
{
|
|
struct ADC_Type * const pBase;
|
|
long unsigned int _1;
|
|
long unsigned int _2;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
pBase_5 = pAdcBase[u32Instance_4(D)];
|
|
# DEBUG pBase => pBase_5
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_17 ();
|
|
# DEBUG BEGIN_STMT
|
|
_1 ={v} pBase_5->MCR;
|
|
_2 = _1 | 64;
|
|
pBase_5->MCR ={v} _2;
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_17 ();
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Adc_Sar_Ip_SetAveraging (const uint32 u32Instance, const boolean bAvgEn, const Adc_Sar_Ip_AvgSelectType eAvgSel)
|
|
{
|
|
struct ADC_Type * const pBase;
|
|
long unsigned int _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
long unsigned int _7;
|
|
long unsigned int _8;
|
|
long unsigned int iftmp.22_9;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
pBase_12 = pAdcBase[u32Instance_11(D)];
|
|
# DEBUG pBase => pBase_12
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_16 ();
|
|
# DEBUG BEGIN_STMT
|
|
_1 ={v} pBase_12->MCR;
|
|
_2 = _1 & 4294963711;
|
|
pBase_12->MCR ={v} _2;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} pBase_12->MCR;
|
|
if (bAvgEn_15(D) != 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 3>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
|
|
<bb 4> [local count: 1073741824]:
|
|
# iftmp.22_9 = PHI <2048(2), 0(3)>
|
|
_4 = (long unsigned int) eAvgSel_16(D);
|
|
_5 = _4 << 9;
|
|
_6 = _5 & 1536;
|
|
_7 = _6 | iftmp.22_9;
|
|
_8 = _3 | _7;
|
|
pBase_12->MCR ={v} _8;
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_16 ();
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Adc_Sar_Ip_SetSampleTimes (const uint32 u32Instance, const uint8 * const aSampleTimes)
|
|
{
|
|
struct ADC_Type * const pBase;
|
|
long unsigned int _1;
|
|
unsigned char _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
unsigned char _5;
|
|
long unsigned int _6;
|
|
long unsigned int _7;
|
|
unsigned char _8;
|
|
long unsigned int _9;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
pBase_15 = pAdcBase[u32Instance_14(D)];
|
|
# DEBUG pBase => pBase_15
|
|
# DEBUG BEGIN_STMT
|
|
_1 = u32AdcChanBitmap[u32Instance_14(D)][0];
|
|
if (_1 != 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 4>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
_2 = *aSampleTimes_16(D);
|
|
_3 = (long unsigned int) _2;
|
|
MEM[(volatile uint32 *)pBase_15 + 148B] ={v} _3;
|
|
|
|
<bb 4> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_4 = u32AdcChanBitmap[u32Instance_14(D)][1];
|
|
if (_4 != 0)
|
|
goto <bb 5>; [50.00%]
|
|
else
|
|
goto <bb 6>; [50.00%]
|
|
|
|
<bb 5> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 = MEM[(const uint8 *)aSampleTimes_16(D) + 1B];
|
|
_6 = (long unsigned int) _5;
|
|
MEM[(volatile uint32 *)pBase_15 + 152B] ={v} _6;
|
|
|
|
<bb 6> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_7 = u32AdcChanBitmap[u32Instance_14(D)][2];
|
|
if (_7 != 0)
|
|
goto <bb 7>; [50.00%]
|
|
else
|
|
goto <bb 8>; [50.00%]
|
|
|
|
<bb 7> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
_8 = MEM[(const uint8 *)aSampleTimes_16(D) + 2B];
|
|
_9 = (long unsigned int) _8;
|
|
MEM[(volatile uint32 *)pBase_15 + 156B] ={v} _9;
|
|
|
|
<bb 8> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Adc_Sar_Ip_SetClockMode (const uint32 u32Instance, const struct Adc_Sar_Ip_ClockConfigType * const pConfig)
|
|
{
|
|
struct ADC_Type * const pBase;
|
|
Adc_Sar_Ip_StatusType eStatus;
|
|
<unnamed type> _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
long unsigned int _7;
|
|
_Bool _8;
|
|
<unnamed type> _9;
|
|
unsigned char _10;
|
|
long unsigned int _11;
|
|
const uint8[3] * _12;
|
|
Adc_Sar_Ip_StatusType _13;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG eStatus => 0
|
|
# DEBUG BEGIN_STMT
|
|
pBase_17 = pAdcBase[u32Instance_16(D)];
|
|
# DEBUG pBase => pBase_17
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG u32Mcr => 0
|
|
# DEBUG BEGIN_STMT
|
|
_1 = pConfig_18(D)->eClkSelect;
|
|
_2 = (long unsigned int) _1;
|
|
_3 = _2 << 1;
|
|
_4 = _3 & 6;
|
|
# DEBUG u32Mcr => _4
|
|
# DEBUG BEGIN_STMT
|
|
eStatus_20 = Adc_Sar_Ip_Powerdown (u32Instance_16(D));
|
|
# DEBUG eStatus => eStatus_20
|
|
# DEBUG BEGIN_STMT
|
|
if (eStatus_20 != 0)
|
|
goto <bb 5>; [51.12%]
|
|
else
|
|
goto <bb 3>; [48.88%]
|
|
|
|
<bb 3> [local count: 524845004]:
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_15 ();
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} pBase_17->MCR;
|
|
_6 = _5 & 4294967289;
|
|
_7 = _4 | _6;
|
|
pBase_17->MCR ={v} _7;
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_15 ();
|
|
# DEBUG BEGIN_STMT
|
|
eStatus_25 = Adc_Sar_Ip_Powerup (u32Instance_16(D));
|
|
# DEBUG eStatus => eStatus_25
|
|
# DEBUG BEGIN_STMT
|
|
if (eStatus_25 != 0)
|
|
goto <bb 5>; [51.12%]
|
|
else
|
|
goto <bb 4>; [48.88%]
|
|
|
|
<bb 4> [local count: 256544238]:
|
|
# DEBUG BEGIN_STMT
|
|
_8 = pConfig_18(D)->bAvgEn;
|
|
_9 = pConfig_18(D)->eAvgSel;
|
|
Adc_Sar_Ip_SetAveraging (u32Instance_16(D), _8, _9);
|
|
# DEBUG BEGIN_STMT
|
|
_10 = pConfig_18(D)->u8PowerDownDelay;
|
|
_11 = (long unsigned int) _10;
|
|
pBase_17->PDEDR ={v} _11;
|
|
# DEBUG BEGIN_STMT
|
|
_12 = &pConfig_18(D)->aSampleTime;
|
|
Adc_Sar_Ip_SetSampleTimes (u32Instance_16(D), _12);
|
|
# DEBUG BEGIN_STMT
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# _13 = PHI <eStatus_20(2), eStatus_25(3), 0(4)>
|
|
return _13;
|
|
|
|
}
|
|
|
|
|
|
Adc_Sar_Ip_DisableChannelNotifications (const uint32 u32Instance, const uint32 u32ChnIdx, const uint32 u32Mask)
|
|
{
|
|
uint32 u32VectBit;
|
|
uint32 u32VectAdr;
|
|
struct ADC_Type * const pBase;
|
|
long unsigned int _1;
|
|
long unsigned int _2;
|
|
volatile uint32_t * _3;
|
|
long unsigned int _4;
|
|
volatile uint32_t * _5;
|
|
long unsigned int _6;
|
|
long unsigned int _7;
|
|
long unsigned int _8;
|
|
long unsigned int _9;
|
|
long unsigned int _10;
|
|
long unsigned int _11;
|
|
volatile uint32_t * _12;
|
|
long unsigned int _13;
|
|
volatile uint32_t * _14;
|
|
long unsigned int _15;
|
|
long unsigned int _16;
|
|
long unsigned int _17;
|
|
long unsigned int _18;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
pBase_23 = pAdcBase[u32Instance_22(D)];
|
|
# DEBUG pBase => pBase_23
|
|
# DEBUG BEGIN_STMT
|
|
u32VectAdr_25 = u32ChnIdx_24(D) >> 5;
|
|
# DEBUG u32VectAdr => u32VectAdr_25
|
|
# DEBUG BEGIN_STMT
|
|
u32VectBit_26 = u32ChnIdx_24(D) & 31;
|
|
# DEBUG u32VectBit => u32VectBit_26
|
|
# DEBUG BEGIN_STMT
|
|
_1 = u32Mask_27(D) & 1;
|
|
if (_1 != 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
_2 = u32AdcChanBitmap[u32Instance_22(D)][u32VectAdr_25];
|
|
if (_2 != 0)
|
|
goto <bb 4>; [33.00%]
|
|
else
|
|
goto <bb 5>; [67.00%]
|
|
|
|
<bb 4> [local count: 177167401]:
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_31 ();
|
|
# DEBUG BEGIN_STMT
|
|
_3 = &pBase_23->CIMR0;
|
|
_4 = u32VectAdr_25 * 4;
|
|
_5 = _3 + _4;
|
|
_6 ={v} MEM[(volatile uint32 *)_5];
|
|
_7 = 1 << u32VectBit_26;
|
|
_8 = ~_7;
|
|
_9 = _6 & _8;
|
|
MEM[(volatile uint32 *)_5] ={v} _9;
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_31 ();
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_10 = u32Mask_27(D) & 2;
|
|
if (_10 != 0)
|
|
goto <bb 6>; [50.00%]
|
|
else
|
|
goto <bb 8>; [50.00%]
|
|
|
|
<bb 6> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
_11 = u32AdcChanBitmap[u32Instance_22(D)][u32VectAdr_25];
|
|
if (_11 != 0)
|
|
goto <bb 7>; [33.00%]
|
|
else
|
|
goto <bb 8>; [67.00%]
|
|
|
|
<bb 7> [local count: 177167401]:
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_29 ();
|
|
# DEBUG BEGIN_STMT
|
|
_12 = &pBase_23->CWENR0;
|
|
_13 = u32VectAdr_25 * 4;
|
|
_14 = _12 + _13;
|
|
_15 ={v} MEM[(volatile uint32 *)_14];
|
|
_16 = 1 << u32VectBit_26;
|
|
_17 = ~_16;
|
|
_18 = _15 & _17;
|
|
MEM[(volatile uint32 *)_14] ={v} _18;
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_29 ();
|
|
|
|
<bb 8> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Adc_Sar_Ip_EnableChannelNotifications (const uint32 u32Instance, const uint32 u32ChnIdx, const uint32 u32Mask)
|
|
{
|
|
uint32 u32VectBit;
|
|
uint32 u32VectAdr;
|
|
struct ADC_Type * const pBase;
|
|
long unsigned int _1;
|
|
long unsigned int _2;
|
|
volatile uint32_t * _3;
|
|
long unsigned int _4;
|
|
volatile uint32_t * _5;
|
|
long unsigned int _6;
|
|
long unsigned int _7;
|
|
long unsigned int _8;
|
|
long unsigned int _9;
|
|
long unsigned int _10;
|
|
volatile uint32_t * _11;
|
|
long unsigned int _12;
|
|
volatile uint32_t * _13;
|
|
long unsigned int _14;
|
|
long unsigned int _15;
|
|
long unsigned int _16;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
pBase_21 = pAdcBase[u32Instance_20(D)];
|
|
# DEBUG pBase => pBase_21
|
|
# DEBUG BEGIN_STMT
|
|
u32VectAdr_23 = u32ChnIdx_22(D) >> 5;
|
|
# DEBUG u32VectAdr => u32VectAdr_23
|
|
# DEBUG BEGIN_STMT
|
|
u32VectBit_24 = u32ChnIdx_22(D) & 31;
|
|
# DEBUG u32VectBit => u32VectBit_24
|
|
# DEBUG BEGIN_STMT
|
|
_1 = u32Mask_25(D) & 1;
|
|
if (_1 != 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
_2 = u32AdcChanBitmap[u32Instance_20(D)][u32VectAdr_23];
|
|
if (_2 != 0)
|
|
goto <bb 4>; [33.00%]
|
|
else
|
|
goto <bb 5>; [67.00%]
|
|
|
|
<bb 4> [local count: 177167401]:
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_30 ();
|
|
# DEBUG BEGIN_STMT
|
|
_3 = &pBase_21->CIMR0;
|
|
_4 = u32VectAdr_23 * 4;
|
|
_5 = _3 + _4;
|
|
_6 ={v} MEM[(volatile uint32 *)_5];
|
|
_7 = 1 << u32VectBit_24;
|
|
_8 = _6 | _7;
|
|
MEM[(volatile uint32 *)_5] ={v} _8;
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_30 ();
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_9 = u32Mask_25(D) & 2;
|
|
if (_9 != 0)
|
|
goto <bb 6>; [50.00%]
|
|
else
|
|
goto <bb 8>; [50.00%]
|
|
|
|
<bb 6> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
_10 = u32AdcChanBitmap[u32Instance_20(D)][u32VectAdr_23];
|
|
if (_10 != 0)
|
|
goto <bb 7>; [33.00%]
|
|
else
|
|
goto <bb 8>; [67.00%]
|
|
|
|
<bb 7> [local count: 177167401]:
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_28 ();
|
|
# DEBUG BEGIN_STMT
|
|
_11 = &pBase_21->CWENR0;
|
|
_12 = u32VectAdr_23 * 4;
|
|
_13 = _11 + _12;
|
|
_14 ={v} MEM[(volatile uint32 *)_13];
|
|
_15 = 1 << u32VectBit_24;
|
|
_16 = _14 | _15;
|
|
MEM[(volatile uint32 *)_13] ={v} _16;
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_28 ();
|
|
|
|
<bb 8> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Adc_Sar_Ip_DisableNotifications (const uint32 u32Instance, const uint32 u32NotificationMask)
|
|
{
|
|
uint32 u32ImrFlags;
|
|
struct ADC_Type * const pBase;
|
|
long unsigned int _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
pBase_9 = pAdcBase[u32Instance_8(D)];
|
|
# DEBUG pBase => pBase_9
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG u32ImrFlags => 0
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG u32ImrFlags => u32NotificationMask_10(D) & 2
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG u32ImrFlags => u32NotificationMask_10(D) & 3
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG u32ImrFlags => u32NotificationMask_10(D) & 11
|
|
# DEBUG BEGIN_STMT
|
|
u32ImrFlags_11 = u32NotificationMask_10(D) & 15;
|
|
# DEBUG u32ImrFlags => u32ImrFlags_11
|
|
# DEBUG BEGIN_STMT
|
|
_1 = u32AdcFeatureBitmap[u32Instance_8(D)];
|
|
_2 = _1 & 4;
|
|
if (_2 != 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 4>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
u32ImrFlags_12 = u32NotificationMask_10(D) & 31;
|
|
# DEBUG u32ImrFlags => u32ImrFlags_12
|
|
|
|
<bb 4> [local count: 1073741824]:
|
|
# u32ImrFlags_6 = PHI <u32ImrFlags_11(2), u32ImrFlags_12(3)>
|
|
# DEBUG u32ImrFlags => u32ImrFlags_6
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_34 ();
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} pBase_9->IMR;
|
|
_4 = ~u32ImrFlags_6;
|
|
_5 = _3 & _4;
|
|
pBase_9->IMR ={v} _5;
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_34 ();
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Adc_Sar_Ip_EnableNotifications (const uint32 u32Instance, const uint32 u32NotificationMask)
|
|
{
|
|
uint32 u32ImrFlags;
|
|
struct ADC_Type * const pBase;
|
|
long unsigned int _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
pBase_8 = pAdcBase[u32Instance_7(D)];
|
|
# DEBUG pBase => pBase_8
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG u32ImrFlags => 0
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG u32ImrFlags => u32NotificationMask_9(D) & 2
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG u32ImrFlags => u32NotificationMask_9(D) & 3
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG u32ImrFlags => u32NotificationMask_9(D) & 11
|
|
# DEBUG BEGIN_STMT
|
|
u32ImrFlags_10 = u32NotificationMask_9(D) & 15;
|
|
# DEBUG u32ImrFlags => u32ImrFlags_10
|
|
# DEBUG BEGIN_STMT
|
|
_1 = u32AdcFeatureBitmap[u32Instance_7(D)];
|
|
_2 = _1 & 4;
|
|
if (_2 != 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 4>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
u32ImrFlags_11 = u32NotificationMask_9(D) & 31;
|
|
# DEBUG u32ImrFlags => u32ImrFlags_11
|
|
|
|
<bb 4> [local count: 1073741824]:
|
|
# u32ImrFlags_5 = PHI <u32ImrFlags_10(2), u32ImrFlags_11(3)>
|
|
# DEBUG u32ImrFlags => u32ImrFlags_5
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_33 ();
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} pBase_8->IMR;
|
|
_4 = _3 | u32ImrFlags_5;
|
|
pBase_8->IMR ={v} _4;
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_33 ();
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Adc_Sar_Ip_Powerdown (const uint32 u32Instance)
|
|
{
|
|
uint32 u32ElapsedTicks;
|
|
uint32 u32CurrentTicks;
|
|
uint32 u32TimeoutTicks;
|
|
uint32 u32Status;
|
|
Adc_Sar_Ip_StatusType eStatus;
|
|
struct ADC_Type * const pBase;
|
|
long unsigned int _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _20;
|
|
long unsigned int _24;
|
|
long unsigned int _25;
|
|
|
|
<bb 2> [local count: 114863532]:
|
|
# DEBUG BEGIN_STMT
|
|
pBase_10 = pAdcBase[u32Instance_9(D)];
|
|
# DEBUG pBase => pBase_10
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG eStatus => 0
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG u32ExpectedStatus => 1
|
|
# DEBUG BEGIN_STMT
|
|
_1 ={v} pBase_10->MSR;
|
|
u32Status_11 = _1 & 7;
|
|
# DEBUG u32Status => u32Status_11
|
|
# DEBUG BEGIN_STMT
|
|
u32TimeoutTicks_13 = OsIf_MicrosToTicks (3000, 0);
|
|
# DEBUG u32TimeoutTicks => u32TimeoutTicks_13
|
|
# DEBUG BEGIN_STMT
|
|
_2 = OsIf_GetCounter (0);
|
|
u32CurrentTicks = _2;
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG u32ElapsedTicks => 0
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_14 ();
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG pBase => pBase_10
|
|
# DEBUG INLINE_ENTRY Adc_Sar_Powerdown
|
|
# DEBUG BEGIN_STMT
|
|
_24 ={v} pBase_10->MCR;
|
|
_25 = _24 | 1;
|
|
pBase_10->MCR ={v} _25;
|
|
# DEBUG pBase => NULL
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_14 ();
|
|
# DEBUG BEGIN_STMT
|
|
goto <bb 4>; [100.00%]
|
|
|
|
<bb 3> [local count: 958878293]:
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} pBase_10->MSR;
|
|
u32Status_18 = _3 & 7;
|
|
# DEBUG u32Status => u32Status_18
|
|
# DEBUG BEGIN_STMT
|
|
_20 = OsIf_GetElapsed (&u32CurrentTicks, 0);
|
|
u32ElapsedTicks_21 = u32ElapsedTicks_6 + _20;
|
|
# DEBUG u32ElapsedTicks => u32ElapsedTicks_21
|
|
|
|
<bb 4> [local count: 1073741824]:
|
|
# u32Status_5 = PHI <u32Status_11(2), u32Status_18(3)>
|
|
# u32ElapsedTicks_6 = PHI <0(2), u32ElapsedTicks_21(3)>
|
|
# DEBUG u32ElapsedTicks => u32ElapsedTicks_6
|
|
# DEBUG u32Status => u32Status_5
|
|
# DEBUG BEGIN_STMT
|
|
if (u32Status_5 != 1)
|
|
goto <bb 5>; [94.50%]
|
|
else
|
|
goto <bb 6>; [5.50%]
|
|
|
|
<bb 5> [local count: 1014686025]:
|
|
if (u32ElapsedTicks_6 < u32TimeoutTicks_13)
|
|
goto <bb 3>; [94.50%]
|
|
else
|
|
goto <bb 6>; [5.50%]
|
|
|
|
<bb 6> [local count: 114863532]:
|
|
# u32ElapsedTicks_22 = PHI <u32ElapsedTicks_6(4), u32ElapsedTicks_6(5)>
|
|
# DEBUG BEGIN_STMT
|
|
if (u32TimeoutTicks_13 <= u32ElapsedTicks_22)
|
|
goto <bb 7>; [35.00%]
|
|
else
|
|
goto <bb 8>; [65.00%]
|
|
|
|
<bb 7> [local count: 40202236]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG eStatus => 2
|
|
|
|
<bb 8> [local count: 114863532]:
|
|
# eStatus_4 = PHI <0(6), 2(7)>
|
|
# DEBUG eStatus => eStatus_4
|
|
# DEBUG BEGIN_STMT
|
|
u32CurrentTicks ={v} {CLOBBER};
|
|
return eStatus_4;
|
|
|
|
}
|
|
|
|
|
|
Adc_Sar_Ip_Powerup (const uint32 u32Instance)
|
|
{
|
|
uint32 u32ElapsedTicks;
|
|
uint32 u32CurrentTicks;
|
|
uint32 u32TimeoutTicks;
|
|
uint32 u32Status;
|
|
Adc_Sar_Ip_StatusType eStatus;
|
|
struct ADC_Type * const pBase;
|
|
long unsigned int _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _20;
|
|
long unsigned int _24;
|
|
long unsigned int _25;
|
|
|
|
<bb 2> [local count: 114863532]:
|
|
# DEBUG BEGIN_STMT
|
|
pBase_10 = pAdcBase[u32Instance_9(D)];
|
|
# DEBUG pBase => pBase_10
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG eStatus => 0
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG u32ExpectedStatus => 0
|
|
# DEBUG BEGIN_STMT
|
|
_1 ={v} pBase_10->MSR;
|
|
u32Status_11 = _1 & 7;
|
|
# DEBUG u32Status => u32Status_11
|
|
# DEBUG BEGIN_STMT
|
|
u32TimeoutTicks_13 = OsIf_MicrosToTicks (3000, 0);
|
|
# DEBUG u32TimeoutTicks => u32TimeoutTicks_13
|
|
# DEBUG BEGIN_STMT
|
|
_2 = OsIf_GetCounter (0);
|
|
u32CurrentTicks = _2;
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG u32ElapsedTicks => 0
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_13 ();
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG pBase => pBase_10
|
|
# DEBUG INLINE_ENTRY Adc_Sar_Powerup
|
|
# DEBUG BEGIN_STMT
|
|
_24 ={v} pBase_10->MCR;
|
|
_25 = _24 & 4294967294;
|
|
pBase_10->MCR ={v} _25;
|
|
# DEBUG pBase => NULL
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_13 ();
|
|
# DEBUG BEGIN_STMT
|
|
goto <bb 4>; [100.00%]
|
|
|
|
<bb 3> [local count: 958878293]:
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} pBase_10->MSR;
|
|
u32Status_18 = _3 & 7;
|
|
# DEBUG u32Status => u32Status_18
|
|
# DEBUG BEGIN_STMT
|
|
_20 = OsIf_GetElapsed (&u32CurrentTicks, 0);
|
|
u32ElapsedTicks_21 = u32ElapsedTicks_6 + _20;
|
|
# DEBUG u32ElapsedTicks => u32ElapsedTicks_21
|
|
|
|
<bb 4> [local count: 1073741824]:
|
|
# u32Status_5 = PHI <u32Status_11(2), u32Status_18(3)>
|
|
# u32ElapsedTicks_6 = PHI <0(2), u32ElapsedTicks_21(3)>
|
|
# DEBUG u32ElapsedTicks => u32ElapsedTicks_6
|
|
# DEBUG u32Status => u32Status_5
|
|
# DEBUG BEGIN_STMT
|
|
if (u32Status_5 != 0)
|
|
goto <bb 5>; [94.50%]
|
|
else
|
|
goto <bb 6>; [5.50%]
|
|
|
|
<bb 5> [local count: 1014686025]:
|
|
if (u32ElapsedTicks_6 < u32TimeoutTicks_13)
|
|
goto <bb 3>; [94.50%]
|
|
else
|
|
goto <bb 6>; [5.50%]
|
|
|
|
<bb 6> [local count: 114863532]:
|
|
# u32ElapsedTicks_22 = PHI <u32ElapsedTicks_6(4), u32ElapsedTicks_6(5)>
|
|
# DEBUG BEGIN_STMT
|
|
if (u32TimeoutTicks_13 <= u32ElapsedTicks_22)
|
|
goto <bb 7>; [35.00%]
|
|
else
|
|
goto <bb 8>; [65.00%]
|
|
|
|
<bb 7> [local count: 40202236]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG eStatus => 2
|
|
|
|
<bb 8> [local count: 114863532]:
|
|
# eStatus_4 = PHI <0(6), 2(7)>
|
|
# DEBUG eStatus => eStatus_4
|
|
# DEBUG BEGIN_STMT
|
|
u32CurrentTicks ={v} {CLOBBER};
|
|
return eStatus_4;
|
|
|
|
}
|
|
|
|
|
|
Adc_Sar_Ip_DoCalibration (const uint32 u32Instance)
|
|
{
|
|
uint32 u32Calbistreg;
|
|
uint32 u32AdcClkSel;
|
|
uint32 u32ElapsedTicks;
|
|
uint32 u32CurrentTicks;
|
|
uint32 u32TimeoutTicks;
|
|
struct ADC_Type * const pBase;
|
|
Adc_Sar_Ip_StatusType eCalStatus;
|
|
Adc_Sar_Ip_StatusType eStatus;
|
|
long unsigned int _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
<unnamed type> _6;
|
|
long unsigned int _7;
|
|
long unsigned int _8;
|
|
long unsigned int _9;
|
|
long unsigned int _10;
|
|
long unsigned int _11;
|
|
long unsigned int _12;
|
|
long unsigned int _13;
|
|
long unsigned int _14;
|
|
long unsigned int _15;
|
|
long unsigned int _16;
|
|
long unsigned int _17;
|
|
long unsigned int _18;
|
|
long unsigned int _19;
|
|
long unsigned int _20;
|
|
long unsigned int _21;
|
|
long unsigned int _22;
|
|
Adc_Sar_Ip_StatusType _25;
|
|
long unsigned int _53;
|
|
|
|
<bb 2> [local count: 480750531]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG eStatus => 0
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG eCalStatus => 0
|
|
# DEBUG BEGIN_STMT
|
|
pBase_30 = pAdcBase[u32Instance_29(D)];
|
|
# DEBUG pBase => pBase_30
|
|
# DEBUG BEGIN_STMT
|
|
u32TimeoutTicks_32 = OsIf_MicrosToTicks (3000, 0);
|
|
# DEBUG u32TimeoutTicks => u32TimeoutTicks_32
|
|
# DEBUG BEGIN_STMT
|
|
_1 = OsIf_GetCounter (0);
|
|
u32CurrentTicks = _1;
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG u32ElapsedTicks => 0
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG u32AdcClkSel => 0
|
|
# DEBUG BEGIN_STMT
|
|
eStatus_36 = Adc_Sar_Ip_Powerdown (u32Instance_29(D));
|
|
# DEBUG eStatus => eStatus_36
|
|
# DEBUG BEGIN_STMT
|
|
if (eStatus_36 != 0)
|
|
goto <bb 14>; [51.12%]
|
|
else
|
|
goto <bb 3>; [48.88%]
|
|
|
|
<bb 3> [local count: 234990860]:
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_12 ();
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} pBase_30->MCR;
|
|
u32AdcClkSel_38 = _2 & 6;
|
|
# DEBUG u32AdcClkSel => u32AdcClkSel_38
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} pBase_30->MCR;
|
|
_4 = _3 & 4294967289;
|
|
pBase_30->MCR ={v} _4;
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} pBase_30->MCR;
|
|
_6 = aAdcSarState[u32Instance_29(D)].eCalibrationClkSelect;
|
|
_7 = (long unsigned int) _6;
|
|
_8 = _7 << 1;
|
|
_9 = _8 & 6;
|
|
_10 = _5 | _9;
|
|
pBase_30->MCR ={v} _10;
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_12 ();
|
|
# DEBUG BEGIN_STMT
|
|
eStatus_43 = Adc_Sar_Ip_Powerup (u32Instance_29(D));
|
|
# DEBUG eStatus => eStatus_43
|
|
# DEBUG BEGIN_STMT
|
|
if (eStatus_43 != 0)
|
|
goto <bb 14>; [51.12%]
|
|
else
|
|
goto <bb 4>; [48.88%]
|
|
|
|
<bb 4> [local count: 114863532]:
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_36 ();
|
|
# DEBUG BEGIN_STMT
|
|
u32Calbistreg_45 ={v} pBase_30->CALBISTREG;
|
|
# DEBUG u32Calbistreg => u32Calbistreg_45
|
|
# DEBUG BEGIN_STMT
|
|
u32Calbistreg_46 = u32Calbistreg_45 & 3892313998;
|
|
# DEBUG u32Calbistreg => u32Calbistreg_46
|
|
# DEBUG BEGIN_STMT
|
|
u32Calbistreg_47 = u32Calbistreg_46 | 112;
|
|
# DEBUG u32Calbistreg => u32Calbistreg_47
|
|
# DEBUG BEGIN_STMT
|
|
pBase_30->CALBISTREG ={v} u32Calbistreg_47;
|
|
# DEBUG BEGIN_STMT
|
|
_11 ={v} pBase_30->CALBISTREG;
|
|
_12 = _11 | 8;
|
|
pBase_30->CALBISTREG ={v} _12;
|
|
# DEBUG BEGIN_STMT
|
|
_13 ={v} pBase_30->CALBISTREG;
|
|
_14 = _13 | 1;
|
|
pBase_30->CALBISTREG ={v} _14;
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_36 ();
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG u32ElapsedTicks => 0
|
|
# DEBUG BEGIN_STMT
|
|
goto <bb 6>; [100.00%]
|
|
|
|
<bb 5> [local count: 958878292]:
|
|
# DEBUG BEGIN_STMT
|
|
_53 = OsIf_GetElapsed (&u32CurrentTicks, 0);
|
|
u32ElapsedTicks_54 = u32ElapsedTicks_24 + _53;
|
|
# DEBUG u32ElapsedTicks => u32ElapsedTicks_54
|
|
|
|
<bb 6> [local count: 1073741824]:
|
|
# u32ElapsedTicks_24 = PHI <0(4), u32ElapsedTicks_54(5)>
|
|
# DEBUG u32ElapsedTicks => u32ElapsedTicks_24
|
|
# DEBUG BEGIN_STMT
|
|
_15 ={v} pBase_30->CALBISTREG;
|
|
_16 = _15 & 32768;
|
|
if (_16 != 0)
|
|
goto <bb 7>; [94.50%]
|
|
else
|
|
goto <bb 8>; [5.50%]
|
|
|
|
<bb 7> [local count: 1014686024]:
|
|
if (u32ElapsedTicks_24 < u32TimeoutTicks_32)
|
|
goto <bb 5>; [94.50%]
|
|
else
|
|
goto <bb 8>; [5.50%]
|
|
|
|
<bb 8> [local count: 114863532]:
|
|
# u32ElapsedTicks_63 = PHI <u32ElapsedTicks_24(6), u32ElapsedTicks_24(7)>
|
|
# DEBUG BEGIN_STMT
|
|
if (u32TimeoutTicks_32 <= u32ElapsedTicks_63)
|
|
goto <bb 11>; [50.00%]
|
|
else
|
|
goto <bb 9>; [50.00%]
|
|
|
|
<bb 9> [local count: 57431766]:
|
|
# DEBUG BEGIN_STMT
|
|
_17 ={v} pBase_30->CALBISTREG;
|
|
_18 = _17 & 8;
|
|
if (_18 != 0)
|
|
goto <bb 10>; [50.00%]
|
|
else
|
|
goto <bb 11>; [50.00%]
|
|
|
|
<bb 10> [local count: 28715883]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG eCalStatus => 1
|
|
|
|
<bb 11> [local count: 114863532]:
|
|
# eCalStatus_23 = PHI <2(8), 0(9), 1(10)>
|
|
# DEBUG eCalStatus => eCalStatus_23
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
eStatus_56 = Adc_Sar_Ip_Powerdown (u32Instance_29(D));
|
|
# DEBUG eStatus => eStatus_56
|
|
# DEBUG BEGIN_STMT
|
|
if (eStatus_56 != 0)
|
|
goto <bb 14>; [51.12%]
|
|
else
|
|
goto <bb 12>; [48.88%]
|
|
|
|
<bb 12> [local count: 56145294]:
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_12 ();
|
|
# DEBUG BEGIN_STMT
|
|
_19 ={v} pBase_30->MCR;
|
|
_20 = _19 & 4294967289;
|
|
pBase_30->MCR ={v} _20;
|
|
# DEBUG BEGIN_STMT
|
|
_21 ={v} pBase_30->MCR;
|
|
_22 = _21 | u32AdcClkSel_38;
|
|
pBase_30->MCR ={v} _22;
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_12 ();
|
|
# DEBUG BEGIN_STMT
|
|
eStatus_62 = Adc_Sar_Ip_Powerup (u32Instance_29(D));
|
|
# DEBUG eStatus => eStatus_62
|
|
# DEBUG BEGIN_STMT
|
|
if (eCalStatus_23 != 0)
|
|
goto <bb 13>; [50.00%]
|
|
else
|
|
goto <bb 14>; [50.00%]
|
|
|
|
<bb 13> [local count: 28072647]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG eStatus => eCalStatus_23
|
|
|
|
<bb 14> [local count: 480750530]:
|
|
# _25 = PHI <eStatus_36(2), eStatus_43(3), eStatus_56(11), eCalStatus_23(13), eStatus_62(12)>
|
|
# DEBUG eStatus => NULL
|
|
u32CurrentTicks ={v} {CLOBBER};
|
|
return _25;
|
|
|
|
}
|
|
|
|
|
|
Adc_Sar_Ip_GetConvResult (const uint32 u32Instance, const uint32 u32ChnIdx, const Adc_Sar_Ip_ConvChainType pChainType, struct Adc_Sar_Ip_ChanResultType * const pResult)
|
|
{
|
|
uint32 u32Cdr;
|
|
uint32 u32VectBit;
|
|
uint32 u32VectAdr;
|
|
struct ADC_Type * const pBase;
|
|
unsigned char _1;
|
|
const uint32_t * _2;
|
|
long unsigned int _3;
|
|
const uint32_t * _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
long unsigned int _7;
|
|
long unsigned int _8;
|
|
long unsigned int _9;
|
|
long unsigned int _10;
|
|
_Bool _11;
|
|
short unsigned int _12;
|
|
volatile uint32_t * _13;
|
|
long unsigned int _14;
|
|
volatile uint32_t * _15;
|
|
long unsigned int _16;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
pBase_20 = pAdcBase[u32Instance_19(D)];
|
|
# DEBUG pBase => pBase_20
|
|
# DEBUG BEGIN_STMT
|
|
u32VectAdr_22 = u32ChnIdx_21(D) >> 5;
|
|
# DEBUG u32VectAdr => u32VectAdr_22
|
|
# DEBUG BEGIN_STMT
|
|
u32VectBit_23 = u32ChnIdx_21(D) & 31;
|
|
# DEBUG u32VectBit => u32VectBit_23
|
|
# DEBUG BEGIN_STMT
|
|
pResult_24(D)->u16ConvData = 0;
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (unsigned char) u32ChnIdx_21(D);
|
|
pResult_24(D)->u8ChnIdx = _1;
|
|
# DEBUG BEGIN_STMT
|
|
pResult_24(D)->bValid = 0;
|
|
# DEBUG BEGIN_STMT
|
|
pResult_24(D)->bOverWritten = 0;
|
|
# DEBUG BEGIN_STMT
|
|
_2 = &pBase_20->PCDR[0];
|
|
_3 = u32ChnIdx_21(D) * 4;
|
|
_4 = _2 + _3;
|
|
u32Cdr_29 ={v} MEM[(volatile uint32 *)_4];
|
|
# DEBUG u32Cdr => u32Cdr_29
|
|
# DEBUG BEGIN_STMT
|
|
_5 = (long unsigned int) pChainType_30(D);
|
|
_6 = _5 << 16;
|
|
_7 = _6 ^ u32Cdr_29;
|
|
_8 = _7 & 196608;
|
|
if (_8 == 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
_9 = u32Cdr_29 & 524288;
|
|
if (_9 != 0)
|
|
goto <bb 4>; [33.00%]
|
|
else
|
|
goto <bb 5>; [67.00%]
|
|
|
|
<bb 4> [local count: 177167401]:
|
|
# DEBUG BEGIN_STMT
|
|
pResult_24(D)->bValid = 1;
|
|
# DEBUG BEGIN_STMT
|
|
_10 = u32Cdr_29 & 262144;
|
|
_11 = _10 != 0;
|
|
pResult_24(D)->bOverWritten = _11;
|
|
# DEBUG BEGIN_STMT
|
|
_12 = Adc_Sar_GetMaskedResult (u32Instance_19(D), u32Cdr_29);
|
|
pResult_24(D)->u16ConvData = _12;
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_13 = &pBase_20->CEOCFR0;
|
|
_14 = u32VectAdr_22 * 4;
|
|
_15 = _13 + _14;
|
|
_16 = 1 << u32VectBit_23;
|
|
MEM[(volatile uint32 *)_15] ={v} _16;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Adc_Sar_Ip_GetConvData (const uint32 u32Instance, const uint32 u32ChnIdx)
|
|
{
|
|
uint32 u32Cdr;
|
|
uint32 u32VectBit;
|
|
uint32 u32VectAdr;
|
|
struct ADC_Type * const pBase;
|
|
uint16 u16Result;
|
|
const uint32_t * _1;
|
|
long unsigned int _2;
|
|
const uint32_t * _3;
|
|
long unsigned int _4;
|
|
volatile uint32_t * _5;
|
|
long unsigned int _6;
|
|
volatile uint32_t * _7;
|
|
long unsigned int _8;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG u16Result => 0
|
|
# DEBUG BEGIN_STMT
|
|
pBase_13 = pAdcBase[u32Instance_12(D)];
|
|
# DEBUG pBase => pBase_13
|
|
# DEBUG BEGIN_STMT
|
|
u32VectAdr_15 = u32ChnIdx_14(D) >> 5;
|
|
# DEBUG u32VectAdr => u32VectAdr_15
|
|
# DEBUG BEGIN_STMT
|
|
u32VectBit_16 = u32ChnIdx_14(D) & 31;
|
|
# DEBUG u32VectBit => u32VectBit_16
|
|
# DEBUG BEGIN_STMT
|
|
_1 = &pBase_13->PCDR[0];
|
|
_2 = u32ChnIdx_14(D) * 4;
|
|
_3 = _1 + _2;
|
|
u32Cdr_17 ={v} MEM[(volatile uint32 *)_3];
|
|
# DEBUG u32Cdr => u32Cdr_17
|
|
# DEBUG BEGIN_STMT
|
|
_4 = u32Cdr_17 & 524288;
|
|
if (_4 != 0)
|
|
goto <bb 3>; [33.00%]
|
|
else
|
|
goto <bb 4>; [67.00%]
|
|
|
|
<bb 3> [local count: 354334802]:
|
|
# DEBUG BEGIN_STMT
|
|
u16Result_19 = Adc_Sar_GetMaskedResult (u32Instance_12(D), u32Cdr_17);
|
|
# DEBUG u16Result => u16Result_19
|
|
# DEBUG BEGIN_STMT
|
|
_5 = &pBase_13->CEOCFR0;
|
|
_6 = u32VectAdr_15 * 4;
|
|
_7 = _5 + _6;
|
|
_8 = 1 << u32VectBit_16;
|
|
MEM[(volatile uint32 *)_7] ={v} _8;
|
|
|
|
<bb 4> [local count: 1073741824]:
|
|
# u16Result_9 = PHI <0(2), u16Result_19(3)>
|
|
# DEBUG u16Result => u16Result_9
|
|
# DEBUG BEGIN_STMT
|
|
return u16Result_9;
|
|
|
|
}
|
|
|
|
|
|
Adc_Sar_Ip_GetConvResultsToArray (const uint32 u32Instance, const Adc_Sar_Ip_ConvChainType pChainType, const uint32 u32Length, struct Adc_Sar_Ip_ChanResultType * const pResults)
|
|
{
|
|
uint32 _7;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_7 = Adc_Sar_GetConvResults (u32Instance_2(D), pChainType_3(D), 0B, pResults_4(D), u32Length_5(D));
|
|
return _7;
|
|
|
|
}
|
|
|
|
|
|
Adc_Sar_Ip_GetConvDataToArray (const uint32 u32Instance, const Adc_Sar_Ip_ConvChainType pChainType, const uint32 u32Length, uint16 * const pResults)
|
|
{
|
|
uint32 _7;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_7 = Adc_Sar_GetConvResults (u32Instance_2(D), pChainType_3(D), pResults_4(D), 0B, u32Length_5(D));
|
|
return _7;
|
|
|
|
}
|
|
|
|
|
|
Adc_Sar_Ip_SelfTest (const uint32 u32Instance)
|
|
{
|
|
uint32 u32ElapsedTicks;
|
|
uint32 u32CurrentTicks;
|
|
uint32 u32TimeoutTicks;
|
|
uint32 u32MsrStatus;
|
|
Adc_Sar_Ip_StatusType eStatus;
|
|
struct ADC_Type * const pBase;
|
|
long unsigned int _1;
|
|
long unsigned int _2;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
long unsigned int _7;
|
|
long unsigned int _8;
|
|
long unsigned int _9;
|
|
long unsigned int _10;
|
|
long unsigned int _11;
|
|
long unsigned int _12;
|
|
long unsigned int _13;
|
|
long unsigned int _14;
|
|
long unsigned int _15;
|
|
long unsigned int _16;
|
|
long unsigned int _17;
|
|
long unsigned int _18;
|
|
long unsigned int _19;
|
|
long unsigned int _20;
|
|
long unsigned int _55;
|
|
|
|
<bb 2> [local count: 114863532]:
|
|
# DEBUG BEGIN_STMT
|
|
pBase_27 = pAdcBase[u32Instance_26(D)];
|
|
# DEBUG pBase => pBase_27
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG eStatus => 0
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
u32TimeoutTicks_29 = OsIf_MicrosToTicks (3000, 0);
|
|
# DEBUG u32TimeoutTicks => u32TimeoutTicks_29
|
|
# DEBUG BEGIN_STMT
|
|
_1 = OsIf_GetCounter (0);
|
|
u32CurrentTicks = _1;
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG u32ElapsedTicks => 0
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_25 ();
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} MEM[(volatile uint32 *)pBase_27 + 164B];
|
|
_4 = _2 | 1;
|
|
MEM[(volatile uint32 *)pBase_27 + 164B] ={v} _4;
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_25 ();
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_11 ();
|
|
# DEBUG BEGIN_STMT
|
|
_5 ={v} pBase_27->MCR;
|
|
_6 = _5 & 4294836223;
|
|
pBase_27->MCR ={v} _6;
|
|
# DEBUG BEGIN_STMT
|
|
_7 ={v} pBase_27->MCR;
|
|
_8 = _7 | 536870912;
|
|
pBase_27->MCR ={v} _8;
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_11 ();
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG u32Reg => 0
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG u32Reg => 268439552
|
|
# DEBUG BEGIN_STMT
|
|
pBase_27->STCR1 ={v} 268439552;
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_35 ();
|
|
# DEBUG BEGIN_STMT
|
|
_9 ={v} pBase_27->STCR3;
|
|
_10 = _9 | 768;
|
|
pBase_27->STCR3 ={v} _10;
|
|
# DEBUG BEGIN_STMT
|
|
_11 ={v} pBase_27->STCR2;
|
|
_12 = _11 | 128;
|
|
pBase_27->STCR2 ={v} _12;
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_35 ();
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_11 ();
|
|
# DEBUG BEGIN_STMT
|
|
_13 ={v} pBase_27->MCR;
|
|
_14 = _13 | 16777216;
|
|
pBase_27->MCR ={v} _14;
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_11 ();
|
|
# DEBUG BEGIN_STMT
|
|
eStatus_48 = Adc_Sar_CheckSelfTestProgress (u32Instance_26(D));
|
|
# DEBUG eStatus => eStatus_48
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_11 ();
|
|
# DEBUG BEGIN_STMT
|
|
_15 ={v} pBase_27->MCR;
|
|
_16 = _15 & 4278190079;
|
|
pBase_27->MCR ={v} _16;
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_11 ();
|
|
# DEBUG BEGIN_STMT
|
|
_17 ={v} pBase_27->MSR;
|
|
u32MsrStatus_52 = _17 & 7;
|
|
# DEBUG u32MsrStatus => u32MsrStatus_52
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG u32ElapsedTicks => 0
|
|
# DEBUG BEGIN_STMT
|
|
goto <bb 4>; [100.00%]
|
|
|
|
<bb 3> [local count: 958878293]:
|
|
# DEBUG BEGIN_STMT
|
|
_18 ={v} pBase_27->MSR;
|
|
u32MsrStatus_53 = _18 & 7;
|
|
# DEBUG u32MsrStatus => u32MsrStatus_53
|
|
# DEBUG BEGIN_STMT
|
|
_55 = OsIf_GetElapsed (&u32CurrentTicks, 0);
|
|
u32ElapsedTicks_56 = u32ElapsedTicks_23 + _55;
|
|
# DEBUG u32ElapsedTicks => u32ElapsedTicks_56
|
|
|
|
<bb 4> [local count: 1073741824]:
|
|
# u32MsrStatus_22 = PHI <u32MsrStatus_52(2), u32MsrStatus_53(3)>
|
|
# u32ElapsedTicks_23 = PHI <0(2), u32ElapsedTicks_56(3)>
|
|
# DEBUG u32ElapsedTicks => u32ElapsedTicks_23
|
|
# DEBUG u32MsrStatus => u32MsrStatus_22
|
|
# DEBUG BEGIN_STMT
|
|
if (u32MsrStatus_22 != 0)
|
|
goto <bb 5>; [94.50%]
|
|
else
|
|
goto <bb 6>; [5.50%]
|
|
|
|
<bb 5> [local count: 1014686025]:
|
|
if (u32ElapsedTicks_23 < u32TimeoutTicks_29)
|
|
goto <bb 3>; [94.50%]
|
|
else
|
|
goto <bb 6>; [5.50%]
|
|
|
|
<bb 6> [local count: 114863532]:
|
|
# u32ElapsedTicks_3 = PHI <u32ElapsedTicks_23(4), u32ElapsedTicks_23(5)>
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_35 ();
|
|
# DEBUG BEGIN_STMT
|
|
_19 ={v} pBase_27->STCR2;
|
|
_20 = _19 & 4294967167;
|
|
pBase_27->STCR2 ={v} _20;
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_35 ();
|
|
# DEBUG BEGIN_STMT
|
|
if (u32ElapsedTicks_3 >= u32TimeoutTicks_29)
|
|
goto <bb 7>; [35.00%]
|
|
else
|
|
goto <bb 8>; [65.00%]
|
|
|
|
<bb 7> [local count: 40202236]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG eStatus => 2
|
|
|
|
<bb 8> [local count: 114863532]:
|
|
# eStatus_21 = PHI <eStatus_48(6), 2(7)>
|
|
# DEBUG eStatus => eStatus_21
|
|
# DEBUG BEGIN_STMT
|
|
u32CurrentTicks ={v} {CLOBBER};
|
|
return eStatus_21;
|
|
|
|
}
|
|
|
|
|
|
Adc_Sar_Ip_ClearStatusFlags (const uint32 u32Instance, const uint32 u32Mask)
|
|
{
|
|
uint32 u32IsrFlags;
|
|
struct ADC_Type * const pBase;
|
|
long unsigned int _1;
|
|
long unsigned int _2;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
pBase_6 = pAdcBase[u32Instance_5(D)];
|
|
# DEBUG pBase => pBase_6
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG u32IsrFlags => 0
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG u32IsrFlags => u32Mask_7(D) & 2
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG u32IsrFlags => u32Mask_7(D) & 3
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG u32IsrFlags => u32Mask_7(D) & 11
|
|
# DEBUG BEGIN_STMT
|
|
u32IsrFlags_8 = u32Mask_7(D) & 15;
|
|
# DEBUG u32IsrFlags => u32IsrFlags_8
|
|
# DEBUG BEGIN_STMT
|
|
_1 = u32AdcFeatureBitmap[u32Instance_5(D)];
|
|
_2 = _1 & 4;
|
|
if (_2 != 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 4>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
u32IsrFlags_9 = u32Mask_7(D) & 31;
|
|
# DEBUG u32IsrFlags => u32IsrFlags_9
|
|
|
|
<bb 4> [local count: 1073741824]:
|
|
# u32IsrFlags_3 = PHI <u32IsrFlags_8(2), u32IsrFlags_9(3)>
|
|
# DEBUG u32IsrFlags => u32IsrFlags_3
|
|
# DEBUG BEGIN_STMT
|
|
pBase_6->ISR ={v} u32IsrFlags_3;
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Adc_Sar_Ip_GetStatusFlags (const uint32 u32Instance)
|
|
{
|
|
uint32 u32Flags;
|
|
long unsigned int _4;
|
|
long unsigned int _6;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG u32Flags => 0
|
|
# DEBUG BEGIN_STMT
|
|
_4 = Adc_Sar_GetMsrFlags (u32Instance_2(D));
|
|
# DEBUG u32Flags => _4
|
|
# DEBUG BEGIN_STMT
|
|
_6 = Adc_Sar_GetIsrFlags (u32Instance_2(D));
|
|
u32Flags_7 = _4 | _6;
|
|
# DEBUG u32Flags => u32Flags_7
|
|
# DEBUG BEGIN_STMT
|
|
return u32Flags_7;
|
|
|
|
}
|
|
|
|
|
|
Adc_Sar_Ip_StartConversion (const uint32 u32Instance, const Adc_Sar_Ip_ConvChainType pChainType)
|
|
{
|
|
struct ADC_Type * const pBase;
|
|
long unsigned int _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
pBase_8 = pAdcBase[u32Instance_7(D)];
|
|
# DEBUG pBase => pBase_8
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_10 ();
|
|
# DEBUG BEGIN_STMT
|
|
switch (pChainType_10(D)) <default: <L4> [33.33%], case 0: <L0> [33.33%], case 1: <L1> [33.33%]>
|
|
|
|
<bb 3> [local count: 357878150]:
|
|
<L0>:
|
|
# DEBUG BEGIN_STMT
|
|
_1 ={v} pBase_8->MCR;
|
|
_2 = _1 | 16777216;
|
|
pBase_8->MCR ={v} _2;
|
|
# DEBUG BEGIN_STMT
|
|
goto <bb 5>; [100.00%]
|
|
|
|
<bb 4> [local count: 357878150]:
|
|
<L1>:
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} pBase_8->MCR;
|
|
_4 = _3 | 1048576;
|
|
pBase_8->MCR ={v} _4;
|
|
# DEBUG BEGIN_STMT
|
|
|
|
<bb 5> [local count: 1073634451]:
|
|
<L4>:
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_10 ();
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Adc_Sar_Ip_SetResolution (const uint32 u32Instance, const Adc_Sar_Ip_Resolution eResolution)
|
|
{
|
|
uint32 u32Calbistreg;
|
|
struct ADC_Type * const pBase;
|
|
long unsigned int _1;
|
|
long unsigned int _2;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
pBase_5 = pAdcBase[u32Instance_4(D)];
|
|
# DEBUG pBase => pBase_5
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_37 ();
|
|
# DEBUG BEGIN_STMT
|
|
u32Calbistreg_7 ={v} pBase_5->CALBISTREG;
|
|
# DEBUG u32Calbistreg => u32Calbistreg_7
|
|
# DEBUG BEGIN_STMT
|
|
u32Calbistreg_8 = u32Calbistreg_7 & 536870911;
|
|
# DEBUG u32Calbistreg => u32Calbistreg_8
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (long unsigned int) eResolution_9(D);
|
|
_2 = _1 << 29;
|
|
u32Calbistreg_10 = _2 | u32Calbistreg_8;
|
|
# DEBUG u32Calbistreg => u32Calbistreg_10
|
|
# DEBUG BEGIN_STMT
|
|
pBase_5->CALBISTREG ={v} u32Calbistreg_10;
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_37 ();
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Adc_Sar_Ip_DisableChannel (const uint32 u32Instance, const Adc_Sar_Ip_ConvChainType pChainType, const uint32 u32ChnIdx)
|
|
{
|
|
uint32 u32VectBit;
|
|
uint32 u32VectAdr;
|
|
struct ADC_Type * const pBase;
|
|
volatile uint32_t * _1;
|
|
long unsigned int _2;
|
|
volatile uint32_t * _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
long unsigned int _7;
|
|
volatile uint32_t * _8;
|
|
long unsigned int _9;
|
|
volatile uint32_t * _10;
|
|
long unsigned int _11;
|
|
long unsigned int _12;
|
|
long unsigned int _13;
|
|
long unsigned int _14;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
pBase_18 = pAdcBase[u32Instance_17(D)];
|
|
# DEBUG pBase => pBase_18
|
|
# DEBUG BEGIN_STMT
|
|
u32VectAdr_20 = u32ChnIdx_19(D) >> 5;
|
|
# DEBUG u32VectAdr => u32VectAdr_20
|
|
# DEBUG BEGIN_STMT
|
|
u32VectBit_21 = u32ChnIdx_19(D) & 31;
|
|
# DEBUG u32VectBit => u32VectBit_21
|
|
# DEBUG BEGIN_STMT
|
|
switch (pChainType_22(D)) <default: <L4> [33.33%], case 0: <L0> [33.33%], case 1: <L1> [33.33%]>
|
|
|
|
<bb 3> [local count: 357878150]:
|
|
<L0>:
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_24 ();
|
|
# DEBUG BEGIN_STMT
|
|
_1 = &pBase_18->NCMR0;
|
|
_2 = u32VectAdr_20 * 4;
|
|
_3 = _1 + _2;
|
|
_4 ={v} MEM[(volatile uint32 *)_3];
|
|
_5 = 1 << u32VectBit_21;
|
|
_6 = ~_5;
|
|
_7 = _4 & _6;
|
|
MEM[(volatile uint32 *)_3] ={v} _7;
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_24 ();
|
|
# DEBUG BEGIN_STMT
|
|
goto <bb 5>; [100.00%]
|
|
|
|
<bb 4> [local count: 357878150]:
|
|
<L1>:
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_27 ();
|
|
# DEBUG BEGIN_STMT
|
|
_8 = &pBase_18->JCMR0;
|
|
_9 = u32VectAdr_20 * 4;
|
|
_10 = _8 + _9;
|
|
_11 ={v} MEM[(volatile uint32 *)_10];
|
|
_12 = 1 << u32VectBit_21;
|
|
_13 = ~_12;
|
|
_14 = _11 & _13;
|
|
MEM[(volatile uint32 *)_10] ={v} _14;
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_27 ();
|
|
# DEBUG BEGIN_STMT
|
|
|
|
<bb 5> [local count: 1073634451]:
|
|
<L4>:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Adc_Sar_Ip_EnableChannel (const uint32 u32Instance, const Adc_Sar_Ip_ConvChainType pChainType, const uint32 u32ChnIdx)
|
|
{
|
|
uint32 u32VectBit;
|
|
uint32 u32VectAdr;
|
|
struct ADC_Type * const pBase;
|
|
volatile uint32_t * _1;
|
|
long unsigned int _2;
|
|
volatile uint32_t * _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
volatile uint32_t * _7;
|
|
long unsigned int _8;
|
|
volatile uint32_t * _9;
|
|
long unsigned int _10;
|
|
long unsigned int _11;
|
|
long unsigned int _12;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
pBase_16 = pAdcBase[u32Instance_15(D)];
|
|
# DEBUG pBase => pBase_16
|
|
# DEBUG BEGIN_STMT
|
|
u32VectAdr_18 = u32ChnIdx_17(D) >> 5;
|
|
# DEBUG u32VectAdr => u32VectAdr_18
|
|
# DEBUG BEGIN_STMT
|
|
u32VectBit_19 = u32ChnIdx_17(D) & 31;
|
|
# DEBUG u32VectBit => u32VectBit_19
|
|
# DEBUG BEGIN_STMT
|
|
switch (pChainType_20(D)) <default: <L4> [33.33%], case 0: <L0> [33.33%], case 1: <L1> [33.33%]>
|
|
|
|
<bb 3> [local count: 357878150]:
|
|
<L0>:
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_23 ();
|
|
# DEBUG BEGIN_STMT
|
|
_1 = &pBase_16->NCMR0;
|
|
_2 = u32VectAdr_18 * 4;
|
|
_3 = _1 + _2;
|
|
_4 ={v} MEM[(volatile uint32 *)_3];
|
|
_5 = 1 << u32VectBit_19;
|
|
_6 = _4 | _5;
|
|
MEM[(volatile uint32 *)_3] ={v} _6;
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_23 ();
|
|
# DEBUG BEGIN_STMT
|
|
goto <bb 5>; [100.00%]
|
|
|
|
<bb 4> [local count: 357878150]:
|
|
<L1>:
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_26 ();
|
|
# DEBUG BEGIN_STMT
|
|
_7 = &pBase_16->JCMR0;
|
|
_8 = u32VectAdr_18 * 4;
|
|
_9 = _7 + _8;
|
|
_10 ={v} MEM[(volatile uint32 *)_9];
|
|
_11 = 1 << u32VectBit_19;
|
|
_12 = _10 | _11;
|
|
MEM[(volatile uint32 *)_9] ={v} _12;
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_26 ();
|
|
# DEBUG BEGIN_STMT
|
|
|
|
<bb 5> [local count: 1073634451]:
|
|
<L4>:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Adc_Sar_Ip_ChainConfig (const uint32 u32Instance, const struct Adc_Sar_Ip_ChansIdxMaskType * const pChansIdxMask, const Adc_Sar_Ip_ConvChainType pChainType)
|
|
{
|
|
uint8 u8Index;
|
|
struct ADC_Type * const pBase;
|
|
int _1;
|
|
long unsigned int _2;
|
|
volatile uint32_t * _3;
|
|
unsigned int _4;
|
|
unsigned int _5;
|
|
volatile uint32_t * _6;
|
|
long unsigned int _7;
|
|
int _8;
|
|
long unsigned int _9;
|
|
volatile uint32_t * _10;
|
|
unsigned int _11;
|
|
unsigned int _12;
|
|
volatile uint32_t * _13;
|
|
long unsigned int _14;
|
|
|
|
<bb 2> [local count: 805386908]:
|
|
# DEBUG BEGIN_STMT
|
|
pBase_24 = pAdcBase[u32Instance_23(D)];
|
|
# DEBUG pBase => pBase_24
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
switch (pChainType_25(D)) <default: <L16> [33.33%], case 0: <L23> [33.33%], case 1: <L24> [33.33%]>
|
|
|
|
<bb 15> [local count: 268435456]:
|
|
<L24>:
|
|
goto <bb 12>; [100.00%]
|
|
|
|
<bb 14> [local count: 268435456]:
|
|
<L23>:
|
|
goto <bb 7>; [100.00%]
|
|
|
|
<bb 3> [local count: 805306369]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) u8Index_15;
|
|
_2 = u32AdcChanBitmap[u32Instance_23(D)][_1];
|
|
if (_2 == 0)
|
|
goto <bb 4>; [33.00%]
|
|
else
|
|
goto <bb 5>; [67.00%]
|
|
|
|
<bb 4> [local count: 265751102]:
|
|
# DEBUG BEGIN_STMT
|
|
// predicted unlikely by continue predictor.
|
|
goto <bb 6>; [100.00%]
|
|
|
|
<bb 5> [local count: 539555267]:
|
|
# DEBUG BEGIN_STMT
|
|
_3 = &pBase_24->NCMR0;
|
|
_4 = (unsigned int) u8Index_15;
|
|
_5 = _4 * 4;
|
|
_6 = _3 + _5;
|
|
_7 = pChansIdxMask_26(D)->aChanMask[_1];
|
|
MEM[(volatile uint32 *)_6] ={v} _7;
|
|
|
|
<bb 6> [local count: 805306369]:
|
|
# DEBUG BEGIN_STMT
|
|
u8Index_30 = u8Index_15 + 1;
|
|
# DEBUG u8Index => u8Index_30
|
|
|
|
<bb 7> [local count: 1073741824]:
|
|
# u8Index_15 = PHI <u8Index_30(6), 0(14)>
|
|
<L17>:
|
|
# DEBUG u8Index => u8Index_15
|
|
# DEBUG BEGIN_STMT
|
|
if (u8Index_15 != 3)
|
|
goto <bb 3>; [75.00%]
|
|
else
|
|
goto <bb 13>; [25.00%]
|
|
|
|
<bb 8> [local count: 805306369]:
|
|
# DEBUG BEGIN_STMT
|
|
_8 = (int) u8Index_16;
|
|
_9 = u32AdcChanBitmap[u32Instance_23(D)][_8];
|
|
if (_9 == 0)
|
|
goto <bb 9>; [33.00%]
|
|
else
|
|
goto <bb 10>; [67.00%]
|
|
|
|
<bb 9> [local count: 265751102]:
|
|
# DEBUG BEGIN_STMT
|
|
// predicted unlikely by continue predictor.
|
|
goto <bb 11>; [100.00%]
|
|
|
|
<bb 10> [local count: 539555267]:
|
|
# DEBUG BEGIN_STMT
|
|
_10 = &pBase_24->JCMR0;
|
|
_11 = (unsigned int) u8Index_16;
|
|
_12 = _11 * 4;
|
|
_13 = _10 + _12;
|
|
_14 = pChansIdxMask_26(D)->aChanMask[_8];
|
|
MEM[(volatile uint32 *)_13] ={v} _14;
|
|
|
|
<bb 11> [local count: 805306369]:
|
|
# DEBUG BEGIN_STMT
|
|
u8Index_28 = u8Index_16 + 1;
|
|
# DEBUG u8Index => u8Index_28
|
|
|
|
<bb 12> [local count: 1073741824]:
|
|
# u8Index_16 = PHI <u8Index_28(11), 0(15)>
|
|
<L18>:
|
|
# DEBUG u8Index => u8Index_16
|
|
# DEBUG BEGIN_STMT
|
|
if (u8Index_16 != 3)
|
|
goto <bb 8>; [75.00%]
|
|
else
|
|
goto <bb 13>; [25.00%]
|
|
|
|
<bb 13> [local count: 805306369]:
|
|
<L16>:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Adc_Sar_Ip_Deinit (const uint32 u32Instance)
|
|
{
|
|
struct ADC_Type * const pBase;
|
|
Adc_Sar_Ip_StatusType eStatus;
|
|
struct Adc_Sar_Ip_ConfigType pDefaultConfig;
|
|
uint8 u8Index;
|
|
int _1;
|
|
int _2;
|
|
long unsigned int _3;
|
|
volatile uint32_t * _4;
|
|
unsigned int _5;
|
|
unsigned int _6;
|
|
volatile uint32_t * _7;
|
|
volatile uint32_t * _8;
|
|
unsigned int _9;
|
|
unsigned int _10;
|
|
volatile uint32_t * _11;
|
|
volatile uint32_t * _12;
|
|
unsigned int _13;
|
|
unsigned int _14;
|
|
volatile uint32_t * _15;
|
|
Adc_Sar_Ip_StatusType _18;
|
|
|
|
<bb 2> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
pBase_27 = pAdcBase[u32Instance_26(D)];
|
|
# DEBUG pBase => pBase_27
|
|
# DEBUG BEGIN_STMT
|
|
pDefaultConfig.eConvMode = 0;
|
|
# DEBUG BEGIN_STMT
|
|
pDefaultConfig.eClkSelect = 0;
|
|
# DEBUG BEGIN_STMT
|
|
pDefaultConfig.eCalibrationClkSelect = 1;
|
|
# DEBUG BEGIN_STMT
|
|
pDefaultConfig.eCtuMode = 0;
|
|
# DEBUG BEGIN_STMT
|
|
pDefaultConfig.eInjectedEdge = 0;
|
|
# DEBUG BEGIN_STMT
|
|
pDefaultConfig.eExtTrigger = 0;
|
|
# DEBUG BEGIN_STMT
|
|
pDefaultConfig.bNormalExtTrgEn = 0;
|
|
# DEBUG BEGIN_STMT
|
|
pDefaultConfig.bNormalAuxExtTrgEn = 0;
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG u8Index => 0
|
|
goto <bb 4>; [100.00%]
|
|
|
|
<bb 3> [local count: 805306369]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) u8Index_16;
|
|
pDefaultConfig.aSampleTime[_1] = 22;
|
|
# DEBUG BEGIN_STMT
|
|
pDefaultConfig.aPresamplingSource[_1] = 0;
|
|
# DEBUG BEGIN_STMT
|
|
u8Index_72 = u8Index_16 + 1;
|
|
# DEBUG u8Index => u8Index_72
|
|
|
|
<bb 4> [local count: 1073741824]:
|
|
# u8Index_16 = PHI <0(2), u8Index_72(3)>
|
|
# DEBUG u8Index => u8Index_16
|
|
# DEBUG BEGIN_STMT
|
|
if (u8Index_16 != 3)
|
|
goto <bb 3>; [75.00%]
|
|
else
|
|
goto <bb 5>; [25.00%]
|
|
|
|
<bb 5> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
pDefaultConfig.bBypassSampling = 0;
|
|
# DEBUG BEGIN_STMT
|
|
pDefaultConfig.bAutoClockOff = 0;
|
|
# DEBUG BEGIN_STMT
|
|
pDefaultConfig.bOverwriteEnable = 0;
|
|
# DEBUG BEGIN_STMT
|
|
pDefaultConfig.eDataAlign = 0;
|
|
# DEBUG BEGIN_STMT
|
|
pDefaultConfig.u16DecodeDelay = 0;
|
|
# DEBUG BEGIN_STMT
|
|
pDefaultConfig.u8PowerDownDelay = 0;
|
|
# DEBUG BEGIN_STMT
|
|
pDefaultConfig.bAvgEn = 0;
|
|
# DEBUG BEGIN_STMT
|
|
pDefaultConfig.eAvgSel = 0;
|
|
# DEBUG BEGIN_STMT
|
|
pDefaultConfig.u8UsrOffset = 0;
|
|
# DEBUG BEGIN_STMT
|
|
pDefaultConfig.u16UsrGain = 0;
|
|
# DEBUG BEGIN_STMT
|
|
pDefaultConfig.eDmaClearSource = 0;
|
|
# DEBUG BEGIN_STMT
|
|
pDefaultConfig.u8NumChannels = 0;
|
|
# DEBUG BEGIN_STMT
|
|
pDefaultConfig.pChannelConfigs = 0B;
|
|
# DEBUG BEGIN_STMT
|
|
pDefaultConfig.u8NumWdgThresholds = 0;
|
|
# DEBUG BEGIN_STMT
|
|
pDefaultConfig.pWdgThresholds = 0B;
|
|
# DEBUG BEGIN_STMT
|
|
pDefaultConfig.pfEndOfNormalChainNotification = 0B;
|
|
# DEBUG BEGIN_STMT
|
|
pDefaultConfig.pfEndOfInjectedChainNotification = 0B;
|
|
# DEBUG BEGIN_STMT
|
|
pDefaultConfig.pfEndOfCtuConversionNotification = 0B;
|
|
# DEBUG BEGIN_STMT
|
|
pDefaultConfig.pfEndOfConvNotification = 0B;
|
|
# DEBUG BEGIN_STMT
|
|
pDefaultConfig.pfWdgOutOfRangeNotification = 0B;
|
|
# DEBUG BEGIN_STMT
|
|
eStatus_57 = Adc_Sar_Ip_Init (u32Instance_26(D), &pDefaultConfig);
|
|
# DEBUG eStatus => eStatus_57
|
|
# DEBUG BEGIN_STMT
|
|
if (eStatus_57 != 0)
|
|
goto <bb 15>; [34.00%]
|
|
else
|
|
goto <bb 16>; [66.00%]
|
|
|
|
<bb 16> [local count: 177167400]:
|
|
goto <bb 13>; [100.00%]
|
|
|
|
<bb 6> [local count: 531502203]:
|
|
# DEBUG BEGIN_STMT
|
|
_2 = (int) u8Index_17;
|
|
_3 = u32AdcChanBitmap[u32Instance_26(D)][_2];
|
|
if (_3 != 0)
|
|
goto <bb 7>; [50.00%]
|
|
else
|
|
goto <bb 8>; [50.00%]
|
|
|
|
<bb 7> [local count: 265751101]:
|
|
# DEBUG BEGIN_STMT
|
|
_4 = &pBase_27->CIMR0;
|
|
_5 = (unsigned int) u8Index_17;
|
|
_6 = _5 * 4;
|
|
_7 = _4 + _6;
|
|
MEM[(volatile uint32 *)_7] ={v} 0;
|
|
|
|
<bb 8> [local count: 531502203]:
|
|
# DEBUG BEGIN_STMT
|
|
if (_3 != 0)
|
|
goto <bb 9>; [50.00%]
|
|
else
|
|
goto <bb 10>; [50.00%]
|
|
|
|
<bb 9> [local count: 265751101]:
|
|
# DEBUG BEGIN_STMT
|
|
_8 = &pBase_27->CEOCFR0;
|
|
_9 = (unsigned int) u8Index_17;
|
|
_10 = _9 * 4;
|
|
_11 = _8 + _10;
|
|
MEM[(volatile uint32 *)_11] ={v} 4294967295;
|
|
|
|
<bb 10> [local count: 531502203]:
|
|
# DEBUG BEGIN_STMT
|
|
if (_3 != 0)
|
|
goto <bb 11>; [50.00%]
|
|
else
|
|
goto <bb 12>; [50.00%]
|
|
|
|
<bb 11> [local count: 265751101]:
|
|
# DEBUG BEGIN_STMT
|
|
_12 = &pBase_27->PSR0;
|
|
_13 = (unsigned int) u8Index_17;
|
|
_14 = _13 * 4;
|
|
_15 = _12 + _14;
|
|
MEM[(volatile uint32 *)_15] ={v} 0;
|
|
|
|
<bb 12> [local count: 531502203]:
|
|
# DEBUG BEGIN_STMT
|
|
u8Index_68 = u8Index_17 + 1;
|
|
# DEBUG u8Index => u8Index_68
|
|
|
|
<bb 13> [local count: 708669605]:
|
|
# u8Index_17 = PHI <u8Index_68(12), 0(16)>
|
|
# DEBUG u8Index => u8Index_17
|
|
# DEBUG BEGIN_STMT
|
|
if (u8Index_17 != 3)
|
|
goto <bb 6>; [75.00%]
|
|
else
|
|
goto <bb 14>; [25.00%]
|
|
|
|
<bb 14> [local count: 177167401]:
|
|
# DEBUG BEGIN_STMT
|
|
Adc_Sar_ResetWdog (u32Instance_26(D));
|
|
# DEBUG BEGIN_STMT
|
|
pBase_27->WTIMR ={v} 0;
|
|
# DEBUG BEGIN_STMT
|
|
Adc_Sar_Ip_ClearStatusFlags (u32Instance_26(D), 31);
|
|
# DEBUG BEGIN_STMT
|
|
Adc_Sar_Ip_SetResolution (u32Instance_26(D), 1);
|
|
# DEBUG BEGIN_STMT
|
|
aAdcSarState[u32Instance_26(D)].bInit = 0;
|
|
# DEBUG BEGIN_STMT
|
|
eStatus_64 = Adc_Sar_Ip_Powerdown (u32Instance_26(D));
|
|
# DEBUG eStatus => eStatus_64
|
|
# DEBUG BEGIN_STMT
|
|
|
|
<bb 15> [local count: 268435456]:
|
|
# _18 = PHI <eStatus_57(5), eStatus_64(14)>
|
|
pDefaultConfig ={v} {CLOBBER};
|
|
return _18;
|
|
|
|
}
|
|
|
|
|
|
Adc_Sar_Ip_Init (const uint32 u32Instance, const struct Adc_Sar_Ip_ConfigType * const pConfig)
|
|
{
|
|
uint8 u8Index;
|
|
struct ADC_Type * const pBase;
|
|
Adc_Sar_Ip_StatusType eStatus;
|
|
long unsigned int _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
<unnamed type> _4;
|
|
long unsigned int _5;
|
|
unsigned char _6;
|
|
long unsigned int _7;
|
|
long unsigned int _8;
|
|
unsigned char _9;
|
|
long unsigned int _10;
|
|
long unsigned int _11;
|
|
unsigned char _12;
|
|
long unsigned int _13;
|
|
unsigned char _14;
|
|
long unsigned int _15;
|
|
long unsigned int _16;
|
|
long unsigned int _17;
|
|
short unsigned int _18;
|
|
long unsigned int _19;
|
|
int _20;
|
|
long unsigned int _21;
|
|
volatile uint32_t * _22;
|
|
unsigned int _23;
|
|
unsigned int _24;
|
|
volatile uint32_t * _25;
|
|
long unsigned int _26;
|
|
int _27;
|
|
long unsigned int _28;
|
|
volatile uint32_t * _29;
|
|
unsigned int _30;
|
|
unsigned int _31;
|
|
volatile uint32_t * _32;
|
|
long unsigned int _33;
|
|
<unnamed type> _34;
|
|
const struct Adc_Sar_Ip_WdgThresholdType * _35;
|
|
unsigned char _36;
|
|
const struct Adc_Sar_Ip_WdgThresholdType * _37;
|
|
unsigned int _38;
|
|
unsigned int _39;
|
|
const struct Adc_Sar_Ip_WdgThresholdType * _40;
|
|
unsigned char _41;
|
|
unsigned char _43;
|
|
const struct Adc_Sar_Ip_ChanConfigType * _44;
|
|
unsigned char _45;
|
|
long unsigned int _46;
|
|
long unsigned int _47;
|
|
long unsigned int _48;
|
|
_Bool _49;
|
|
long unsigned int _50;
|
|
<unnamed type> _51;
|
|
<unnamed type> _52;
|
|
<unnamed type> _53;
|
|
void (*<T34c>) (void) _54;
|
|
void (*<T34c>) (void) _55;
|
|
void (*<T34c>) (void) _56;
|
|
void (*<T34d>) (uint16) _57;
|
|
void (*<T34d>) (uint16) _58;
|
|
<unnamed type> _59;
|
|
<unnamed type> _60;
|
|
unsigned char _61;
|
|
long unsigned int _62;
|
|
short unsigned int _63;
|
|
long unsigned int _64;
|
|
long unsigned int _65;
|
|
long unsigned int _66;
|
|
long unsigned int _67;
|
|
Adc_Sar_Ip_StatusType _71;
|
|
long unsigned int iftmp.3_72;
|
|
|
|
<bb 2> [local count: 832079355]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG eStatus => 0
|
|
# DEBUG BEGIN_STMT
|
|
pBase_87 = pAdcBase[u32Instance_86(D)];
|
|
# DEBUG pBase => pBase_87
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG u8Index => 0
|
|
# DEBUG BEGIN_STMT
|
|
Adc_Sar_Ip_AbortChain (u32Instance_86(D), 1, 0);
|
|
# DEBUG BEGIN_STMT
|
|
_1 ={v} pBase_87->MCR;
|
|
_2 = _1 & 4294836223;
|
|
pBase_87->MCR ={v} _2;
|
|
# DEBUG BEGIN_STMT
|
|
eStatus_91 = Adc_Sar_Ip_Powerdown (u32Instance_86(D));
|
|
# DEBUG eStatus => eStatus_91
|
|
# DEBUG BEGIN_STMT
|
|
if (eStatus_91 != 0)
|
|
goto <bb 33>; [51.12%]
|
|
else
|
|
goto <bb 3>; [48.88%]
|
|
|
|
<bb 3> [local count: 406720388]:
|
|
# DEBUG BEGIN_STMT
|
|
_3 = Adc_Sar_CollectMcrMasks (u32Instance_86(D), pConfig_92(D));
|
|
pBase_87->MCR ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 = pConfig_92(D)->eDataAlign;
|
|
aAdcSarState[u32Instance_86(D)].eDataAlign = _4;
|
|
# DEBUG BEGIN_STMT
|
|
eStatus_96 = Adc_Sar_Ip_Powerup (u32Instance_86(D));
|
|
# DEBUG eStatus => eStatus_96
|
|
# DEBUG BEGIN_STMT
|
|
if (eStatus_96 != 0)
|
|
goto <bb 33>; [34.00%]
|
|
else
|
|
goto <bb 4>; [66.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 = u32AdcChanBitmap[u32Instance_86(D)][0];
|
|
if (_5 != 0)
|
|
goto <bb 5>; [50.00%]
|
|
else
|
|
goto <bb 6>; [50.00%]
|
|
|
|
<bb 5> [local count: 134217728]:
|
|
# DEBUG BEGIN_STMT
|
|
_6 = pConfig_92(D)->aSampleTime[0];
|
|
_7 = (long unsigned int) _6;
|
|
MEM[(volatile uint32 *)pBase_87 + 148B] ={v} _7;
|
|
|
|
<bb 6> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
_8 = u32AdcChanBitmap[u32Instance_86(D)][1];
|
|
if (_8 != 0)
|
|
goto <bb 7>; [50.00%]
|
|
else
|
|
goto <bb 8>; [50.00%]
|
|
|
|
<bb 7> [local count: 134217728]:
|
|
# DEBUG BEGIN_STMT
|
|
_9 = pConfig_92(D)->aSampleTime[1];
|
|
_10 = (long unsigned int) _9;
|
|
MEM[(volatile uint32 *)pBase_87 + 152B] ={v} _10;
|
|
|
|
<bb 8> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
_11 = u32AdcChanBitmap[u32Instance_86(D)][2];
|
|
if (_11 != 0)
|
|
goto <bb 9>; [50.00%]
|
|
else
|
|
goto <bb 10>; [50.00%]
|
|
|
|
<bb 9> [local count: 134217728]:
|
|
# DEBUG BEGIN_STMT
|
|
_12 = pConfig_92(D)->aSampleTime[2];
|
|
_13 = (long unsigned int) _12;
|
|
MEM[(volatile uint32 *)pBase_87 + 156B] ={v} _13;
|
|
|
|
<bb 10> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
_14 = pConfig_92(D)->u8PowerDownDelay;
|
|
_15 = (long unsigned int) _14;
|
|
pBase_87->PDEDR ={v} _15;
|
|
# DEBUG BEGIN_STMT
|
|
_16 = u32AdcFeatureBitmap[u32Instance_86(D)];
|
|
_17 = _16 & 1;
|
|
if (_17 != 0)
|
|
goto <bb 11>; [50.00%]
|
|
else
|
|
goto <bb 12>; [50.00%]
|
|
|
|
<bb 11> [local count: 134217728]:
|
|
# DEBUG BEGIN_STMT
|
|
_18 = pConfig_92(D)->u16DecodeDelay;
|
|
_19 = (long unsigned int) _18;
|
|
pBase_87->DSDR ={v} _19;
|
|
|
|
<bb 12> [local count: 268435456]:
|
|
# u8Index_76 = PHI <0(11), 0(10)>
|
|
goto <bb 17>; [100.00%]
|
|
|
|
<bb 13> [local count: 805306369]:
|
|
# DEBUG BEGIN_STMT
|
|
_20 = (int) u8Index_68;
|
|
_21 = u32AdcChanBitmap[u32Instance_86(D)][_20];
|
|
if (_21 == 0)
|
|
goto <bb 14>; [33.00%]
|
|
else
|
|
goto <bb 15>; [67.00%]
|
|
|
|
<bb 14> [local count: 265751102]:
|
|
# DEBUG BEGIN_STMT
|
|
// predicted unlikely by continue predictor.
|
|
goto <bb 16>; [100.00%]
|
|
|
|
<bb 15> [local count: 539555267]:
|
|
# DEBUG BEGIN_STMT
|
|
_22 = &pBase_87->NCMR0;
|
|
_23 = (unsigned int) u8Index_68;
|
|
_24 = _23 * 4;
|
|
_25 = _22 + _24;
|
|
_26 = pConfig_92(D)->pChanMaskNormal[_20];
|
|
MEM[(volatile uint32 *)_25] ={v} _26;
|
|
|
|
<bb 16> [local count: 805306369]:
|
|
# DEBUG BEGIN_STMT
|
|
u8Index_123 = u8Index_68 + 1;
|
|
# DEBUG u8Index => u8Index_123
|
|
|
|
<bb 17> [local count: 1073741824]:
|
|
# u8Index_68 = PHI <u8Index_76(12), u8Index_123(16)>
|
|
# DEBUG u8Index => u8Index_68
|
|
# DEBUG BEGIN_STMT
|
|
if (u8Index_68 != 3)
|
|
goto <bb 13>; [75.00%]
|
|
else
|
|
goto <bb 35>; [25.00%]
|
|
|
|
<bb 35> [local count: 268435456]:
|
|
goto <bb 22>; [100.00%]
|
|
|
|
<bb 18> [local count: 805306369]:
|
|
# DEBUG BEGIN_STMT
|
|
_27 = (int) u8Index_69;
|
|
_28 = u32AdcChanBitmap[u32Instance_86(D)][_27];
|
|
if (_28 == 0)
|
|
goto <bb 19>; [33.00%]
|
|
else
|
|
goto <bb 20>; [67.00%]
|
|
|
|
<bb 19> [local count: 265751102]:
|
|
# DEBUG BEGIN_STMT
|
|
// predicted unlikely by continue predictor.
|
|
goto <bb 21>; [100.00%]
|
|
|
|
<bb 20> [local count: 539555267]:
|
|
# DEBUG BEGIN_STMT
|
|
_29 = &pBase_87->JCMR0;
|
|
_30 = (unsigned int) u8Index_69;
|
|
_31 = _30 * 4;
|
|
_32 = _29 + _31;
|
|
_33 = pConfig_92(D)->pChanMaskInjected[_27];
|
|
MEM[(volatile uint32 *)_32] ={v} _33;
|
|
|
|
<bb 21> [local count: 805306369]:
|
|
# DEBUG BEGIN_STMT
|
|
u8Index_121 = u8Index_69 + 1;
|
|
# DEBUG u8Index => u8Index_121
|
|
|
|
<bb 22> [local count: 1073741824]:
|
|
# u8Index_69 = PHI <u8Index_121(21), 0(35)>
|
|
# DEBUG u8Index => u8Index_69
|
|
# DEBUG BEGIN_STMT
|
|
if (u8Index_69 != 3)
|
|
goto <bb 18>; [75.00%]
|
|
else
|
|
goto <bb 23>; [25.00%]
|
|
|
|
<bb 23> [local count: 268435456]:
|
|
# DEBUG BEGIN_STMT
|
|
_34 = pConfig_92(D)->eAdcResolution;
|
|
Adc_Sar_Ip_SetResolution (u32Instance_86(D), _34);
|
|
# DEBUG BEGIN_STMT
|
|
_35 = pConfig_92(D)->pWdgThresholds;
|
|
if (_35 != 0B)
|
|
goto <bb 24>; [70.00%]
|
|
else
|
|
goto <bb 27>; [30.00%]
|
|
|
|
<bb 24> [local count: 187904819]:
|
|
_36 = pConfig_92(D)->u8NumWdgThresholds;
|
|
if (_36 != 0)
|
|
goto <bb 34>; [50.00%]
|
|
else
|
|
goto <bb 27>; [50.00%]
|
|
|
|
<bb 34> [local count: 93952410]:
|
|
goto <bb 26>; [100.00%]
|
|
|
|
<bb 25> [local count: 760160410]:
|
|
# DEBUG BEGIN_STMT
|
|
_37 = pConfig_92(D)->pWdgThresholds;
|
|
_38 = (unsigned int) u8Index_70;
|
|
_39 = _38 * 8;
|
|
_40 = _37 + _39;
|
|
_41 = _40->u8WdgIndex;
|
|
Adc_Sar_Ip_SetWdgThreshold (u32Instance_86(D), _41, _40);
|
|
# DEBUG BEGIN_STMT
|
|
u8Index_104 = u8Index_70 + 1;
|
|
# DEBUG u8Index => u8Index_104
|
|
|
|
<bb 26> [local count: 854112820]:
|
|
# u8Index_70 = PHI <u8Index_104(25), 0(34)>
|
|
# DEBUG u8Index => u8Index_70
|
|
# DEBUG BEGIN_STMT
|
|
_43 = pConfig_92(D)->u8NumWdgThresholds;
|
|
if (_43 > u8Index_70)
|
|
goto <bb 25>; [89.00%]
|
|
else
|
|
goto <bb 27>; [11.00%]
|
|
|
|
<bb 27> [local count: 268435457]:
|
|
# DEBUG BEGIN_STMT
|
|
_44 = pConfig_92(D)->pChannelConfigs;
|
|
if (_44 != 0B)
|
|
goto <bb 28>; [70.00%]
|
|
else
|
|
goto <bb 30>; [30.00%]
|
|
|
|
<bb 28> [local count: 187904820]:
|
|
_45 = pConfig_92(D)->u8NumChannels;
|
|
if (_45 != 0)
|
|
goto <bb 29>; [33.00%]
|
|
else
|
|
goto <bb 30>; [67.00%]
|
|
|
|
<bb 29> [local count: 62008590]:
|
|
# DEBUG BEGIN_STMT
|
|
Adc_Sar_EnableChannelWatchdog (u32Instance_86(D), _44, _45);
|
|
|
|
<bb 30> [local count: 268435457]:
|
|
# DEBUG BEGIN_STMT
|
|
_46 ={v} pBase_87->PSCR;
|
|
_47 = _46 & 4294967294;
|
|
pBase_87->PSCR ={v} _47;
|
|
# DEBUG BEGIN_STMT
|
|
_48 ={v} pBase_87->PSCR;
|
|
_49 = pConfig_92(D)->bBypassSampling;
|
|
if (_49 != 0)
|
|
goto <bb 32>; [50.00%]
|
|
else
|
|
goto <bb 31>; [50.00%]
|
|
|
|
<bb 31> [local count: 134217728]:
|
|
|
|
<bb 32> [local count: 268435457]:
|
|
# iftmp.3_72 = PHI <1(30), 0(31)>
|
|
_50 = _48 | iftmp.3_72;
|
|
pBase_87->PSCR ={v} _50;
|
|
# DEBUG BEGIN_STMT
|
|
_51 = pConfig_92(D)->aPresamplingSource[0];
|
|
Adc_Sar_Ip_SetPresamplingSource (u32Instance_86(D), 0, _51);
|
|
# DEBUG BEGIN_STMT
|
|
_52 = pConfig_92(D)->aPresamplingSource[1];
|
|
Adc_Sar_Ip_SetPresamplingSource (u32Instance_86(D), 1, _52);
|
|
# DEBUG BEGIN_STMT
|
|
_53 = pConfig_92(D)->aPresamplingSource[2];
|
|
Adc_Sar_Ip_SetPresamplingSource (u32Instance_86(D), 2, _53);
|
|
# DEBUG BEGIN_STMT
|
|
_54 = pConfig_92(D)->pfEndOfNormalChainNotification;
|
|
aAdcSarState[u32Instance_86(D)].pfEndOfNormalChainNotification = _54;
|
|
# DEBUG BEGIN_STMT
|
|
_55 = pConfig_92(D)->pfEndOfInjectedChainNotification;
|
|
aAdcSarState[u32Instance_86(D)].pfEndOfInjectedChainNotification = _55;
|
|
# DEBUG BEGIN_STMT
|
|
_56 = pConfig_92(D)->pfEndOfCtuConversionNotification;
|
|
aAdcSarState[u32Instance_86(D)].pfEndOfCtuConversionNotification = _56;
|
|
# DEBUG BEGIN_STMT
|
|
_57 = pConfig_92(D)->pfEndOfConvNotification;
|
|
aAdcSarState[u32Instance_86(D)].pfEndOfConvNotification = _57;
|
|
# DEBUG BEGIN_STMT
|
|
_58 = pConfig_92(D)->pfWdgOutOfRangeNotification;
|
|
aAdcSarState[u32Instance_86(D)].pfWdgOutOfRangeNotification = _58;
|
|
# DEBUG BEGIN_STMT
|
|
_59 = pConfig_92(D)->eCalibrationClkSelect;
|
|
aAdcSarState[u32Instance_86(D)].eCalibrationClkSelect = _59;
|
|
# DEBUG BEGIN_STMT
|
|
_60 = pConfig_92(D)->eDmaClearSource;
|
|
Adc_Sar_Ip_SetDmaClearSource (u32Instance_86(D), _60);
|
|
# DEBUG BEGIN_STMT
|
|
_61 = pConfig_92(D)->u8UsrOffset;
|
|
_62 = (long unsigned int) _61;
|
|
_63 = pConfig_92(D)->u16UsrGain;
|
|
_64 = (long unsigned int) _63;
|
|
_65 = _64 << 16;
|
|
_66 = _65 & 67043328;
|
|
_67 = _62 | _66;
|
|
pBase_87->OFSGNUSR ={v} _67;
|
|
# DEBUG BEGIN_STMT
|
|
aAdcSarState[u32Instance_86(D)].bInit = 1;
|
|
# DEBUG BEGIN_STMT
|
|
|
|
<bb 33> [local count: 832079354]:
|
|
# _71 = PHI <eStatus_91(2), eStatus_96(3), 0(32)>
|
|
return _71;
|
|
|
|
}
|
|
|
|
|
|
Adc_Sar_Ip_IRQHandler (const uint32 u32Instance)
|
|
{
|
|
struct ADC_Type * const pBase;
|
|
long unsigned int _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
void (*<T34c>) (void) _5;
|
|
long unsigned int _6;
|
|
long unsigned int _7;
|
|
long unsigned int _8;
|
|
long unsigned int _9;
|
|
void (*<T34c>) (void) _10;
|
|
long unsigned int _11;
|
|
long unsigned int _12;
|
|
long unsigned int _13;
|
|
long unsigned int _14;
|
|
void (*<T34c>) (void) _15;
|
|
long unsigned int _16;
|
|
long unsigned int _17;
|
|
long unsigned int _18;
|
|
long unsigned int _19;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
pBase_27 = pAdcBase[u32Instance_26(D)];
|
|
# DEBUG pBase => pBase_27
|
|
# DEBUG BEGIN_STMT
|
|
_1 ={v} pBase_27->ISR;
|
|
_2 = _1 & 16;
|
|
if (_2 != 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
pBase_27->ISR ={v} 16;
|
|
# DEBUG BEGIN_STMT
|
|
_3 ={v} pBase_27->IMR;
|
|
_4 = _3 & 16;
|
|
if (_4 != 0)
|
|
goto <bb 4>; [33.00%]
|
|
else
|
|
goto <bb 5>; [67.00%]
|
|
|
|
<bb 4> [local count: 177167401]:
|
|
# DEBUG BEGIN_STMT
|
|
_5 = aAdcSarState[u32Instance_26(D)].pfEndOfCtuConversionNotification;
|
|
Adc_Sar_CheckAndCallNotification (u32Instance_26(D), _5);
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_6 ={v} pBase_27->ISR;
|
|
_7 = _6 & 1;
|
|
if (_7 != 0)
|
|
goto <bb 6>; [50.00%]
|
|
else
|
|
goto <bb 8>; [50.00%]
|
|
|
|
<bb 6> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
pBase_27->ISR ={v} 1;
|
|
# DEBUG BEGIN_STMT
|
|
_8 ={v} pBase_27->IMR;
|
|
_9 = _8 & 1;
|
|
if (_9 != 0)
|
|
goto <bb 7>; [33.00%]
|
|
else
|
|
goto <bb 8>; [67.00%]
|
|
|
|
<bb 7> [local count: 177167401]:
|
|
# DEBUG BEGIN_STMT
|
|
_10 = aAdcSarState[u32Instance_26(D)].pfEndOfNormalChainNotification;
|
|
Adc_Sar_CheckAndCallNotification (u32Instance_26(D), _10);
|
|
|
|
<bb 8> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_11 ={v} pBase_27->ISR;
|
|
_12 = _11 & 4;
|
|
if (_12 != 0)
|
|
goto <bb 9>; [50.00%]
|
|
else
|
|
goto <bb 11>; [50.00%]
|
|
|
|
<bb 9> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
pBase_27->ISR ={v} 4;
|
|
# DEBUG BEGIN_STMT
|
|
_13 ={v} pBase_27->IMR;
|
|
_14 = _13 & 4;
|
|
if (_14 != 0)
|
|
goto <bb 10>; [33.00%]
|
|
else
|
|
goto <bb 11>; [67.00%]
|
|
|
|
<bb 10> [local count: 177167401]:
|
|
# DEBUG BEGIN_STMT
|
|
_15 = aAdcSarState[u32Instance_26(D)].pfEndOfInjectedChainNotification;
|
|
Adc_Sar_CheckAndCallNotification (u32Instance_26(D), _15);
|
|
|
|
<bb 11> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_16 ={v} pBase_27->ISR;
|
|
_17 = _16 & 2;
|
|
if (_17 != 0)
|
|
goto <bb 12>; [50.00%]
|
|
else
|
|
goto <bb 13>; [50.00%]
|
|
|
|
<bb 12> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
pBase_27->ISR ={v} 2;
|
|
|
|
<bb 13> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_18 ={v} pBase_27->ISR;
|
|
_19 = _18 & 8;
|
|
if (_19 != 0)
|
|
goto <bb 14>; [50.00%]
|
|
else
|
|
goto <bb 15>; [50.00%]
|
|
|
|
<bb 14> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
pBase_27->ISR ={v} 8;
|
|
|
|
<bb 15> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Adc_Sar_ConfigExternalTrigger (const uint32 u32Instance, const Adc_Sar_Ip_ExtTriggerEdgeType eTriggerEdge, const uint32 u32TrgEdgeSetMask, const uint32 u32TrgEdgeClrMask, const uint32 u32TrigSrcMask)
|
|
{
|
|
struct ADC_Type * const pBase;
|
|
long unsigned int _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
long unsigned int _7;
|
|
long unsigned int _8;
|
|
long unsigned int _9;
|
|
long unsigned int _10;
|
|
long unsigned int _11;
|
|
long unsigned int _12;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
pBase_16 = pAdcBase[u32Instance_15(D)];
|
|
# DEBUG pBase => pBase_16
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_21 ();
|
|
# DEBUG BEGIN_STMT
|
|
switch (eTriggerEdge_18(D)) <default: <L5> [25.00%], case 0: <L2> [25.00%], case 1: <L0> [25.00%], case 2: <L1> [25.00%]>
|
|
|
|
<bb 3> [local count: 268435456]:
|
|
<L0>:
|
|
# DEBUG BEGIN_STMT
|
|
_1 ={v} pBase_16->MCR;
|
|
_2 = ~u32TrgEdgeSetMask_19(D);
|
|
_3 = _1 & _2;
|
|
pBase_16->MCR ={v} _3;
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} pBase_16->MCR;
|
|
_5 = _4 | u32TrigSrcMask_20(D);
|
|
pBase_16->MCR ={v} _5;
|
|
# DEBUG BEGIN_STMT
|
|
goto <bb 6>; [100.00%]
|
|
|
|
<bb 4> [local count: 268435456]:
|
|
<L1>:
|
|
# DEBUG BEGIN_STMT
|
|
_6 ={v} pBase_16->MCR;
|
|
_7 = u32TrgEdgeSetMask_19(D) | u32TrigSrcMask_20(D);
|
|
_8 = _6 | _7;
|
|
pBase_16->MCR ={v} _8;
|
|
# DEBUG BEGIN_STMT
|
|
goto <bb 6>; [100.00%]
|
|
|
|
<bb 5> [local count: 268435456]:
|
|
<L2>:
|
|
# DEBUG BEGIN_STMT
|
|
_9 ={v} pBase_16->MCR;
|
|
_10 = u32TrigSrcMask_20(D) | u32TrgEdgeClrMask_24(D);
|
|
_11 = ~_10;
|
|
_12 = _9 & _11;
|
|
pBase_16->MCR ={v} _12;
|
|
# DEBUG BEGIN_STMT
|
|
|
|
<bb 6> [local count: 1073741824]:
|
|
<L5>:
|
|
# DEBUG BEGIN_STMT
|
|
SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_21 ();
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Adc_Sar_Ip_GetDataAddress (uint32 u32Instance, uint32 u32ChannelIndex)
|
|
{
|
|
struct ADC_Type * _1;
|
|
const uint32_t * _2;
|
|
long unsigned int _3;
|
|
const uint32_t * _4;
|
|
uint32 _8;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = pAdcBase[u32Instance_6(D)];
|
|
_2 = &_1->PCDR[0];
|
|
_3 = u32ChannelIndex_7(D) * 4;
|
|
_4 = _2 + _3;
|
|
_8 = (uint32) _4;
|
|
return _8;
|
|
|
|
}
|
|
|
|
|
|
Adc_Sar_CheckAndCallNotification (const uint32 u32Instance, void (*<T34c>) (void) pfCallback)
|
|
{
|
|
_Bool _1;
|
|
|
|
<bb 2> [local count: 1073741823]:
|
|
# DEBUG BEGIN_STMT
|
|
if (pfCallback_3(D) != 0B)
|
|
goto <bb 3>; [70.00%]
|
|
else
|
|
goto <bb 5>; [30.00%]
|
|
|
|
<bb 3> [local count: 751619277]:
|
|
_1 = aAdcSarState[u32Instance_5(D)].bInit;
|
|
if (_1 != 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 4> [local count: 375809638]:
|
|
# DEBUG BEGIN_STMT
|
|
pfCallback_3(D) ();
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Adc_Sar_ResetWdog (const uint32 u32Instance)
|
|
{
|
|
uint8 u8Index;
|
|
struct ADC_Type * const pBase;
|
|
int _1;
|
|
long unsigned int _2;
|
|
volatile uint32_t * _3;
|
|
unsigned int _4;
|
|
unsigned int _5;
|
|
volatile uint32_t * _6;
|
|
int _7;
|
|
long unsigned int _8;
|
|
volatile uint32_t * _9;
|
|
unsigned int _10;
|
|
unsigned int _11;
|
|
volatile uint32_t * _12;
|
|
long unsigned int _13;
|
|
unsigned int _14;
|
|
unsigned int _15;
|
|
unsigned int _16;
|
|
long unsigned int _17;
|
|
long unsigned int _18;
|
|
unsigned char _33;
|
|
int _40;
|
|
volatile uint32_t * _41;
|
|
unsigned int _42;
|
|
volatile uint32_t * _43;
|
|
|
|
<bb 2> [local count: 214748364]:
|
|
# DEBUG BEGIN_STMT
|
|
pBase_32 = pAdcBase[u32Instance_31(D)];
|
|
# DEBUG pBase => pBase_32
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG u32ThrhlrCount => 4
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG u8Index => 0
|
|
goto <bb 7>; [100.00%]
|
|
|
|
<bb 3> [local count: 644245092]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (int) u8Index_19;
|
|
_2 = u32AdcChanBitmap[u32Instance_31(D)][_1];
|
|
if (_2 == 0)
|
|
goto <bb 4>; [33.00%]
|
|
else
|
|
goto <bb 5>; [67.00%]
|
|
|
|
<bb 4> [local count: 212600880]:
|
|
# DEBUG BEGIN_STMT
|
|
// predicted unlikely by continue predictor.
|
|
goto <bb 6>; [100.00%]
|
|
|
|
<bb 5> [local count: 431644211]:
|
|
# DEBUG BEGIN_STMT
|
|
_3 = &pBase_32->CWENR0;
|
|
_4 = (unsigned int) u8Index_19;
|
|
_5 = _4 * 4;
|
|
_6 = _3 + _5;
|
|
MEM[(volatile uint32 *)_6] ={v} 0;
|
|
|
|
<bb 6> [local count: 644245091]:
|
|
# DEBUG BEGIN_STMT
|
|
u8Index_39 = u8Index_19 + 1;
|
|
# DEBUG u8Index => u8Index_39
|
|
|
|
<bb 7> [local count: 858993456]:
|
|
# u8Index_19 = PHI <0(2), u8Index_39(6)>
|
|
# DEBUG u8Index => u8Index_19
|
|
# DEBUG BEGIN_STMT
|
|
if (u8Index_19 != 3)
|
|
goto <bb 3>; [75.00%]
|
|
else
|
|
goto <bb 23>; [25.00%]
|
|
|
|
<bb 23> [local count: 214748364]:
|
|
goto <bb 12>; [100.00%]
|
|
|
|
<bb 8> [local count: 644245092]:
|
|
# DEBUG BEGIN_STMT
|
|
_7 = (int) u8Index_20;
|
|
_8 = u32AdcChanBitmap[u32Instance_31(D)][_7];
|
|
if (_8 == 0)
|
|
goto <bb 9>; [33.00%]
|
|
else
|
|
goto <bb 10>; [67.00%]
|
|
|
|
<bb 9> [local count: 212600880]:
|
|
# DEBUG BEGIN_STMT
|
|
// predicted unlikely by continue predictor.
|
|
goto <bb 11>; [100.00%]
|
|
|
|
<bb 10> [local count: 431644211]:
|
|
# DEBUG BEGIN_STMT
|
|
_9 = &pBase_32->AWORR0;
|
|
_10 = (unsigned int) u8Index_20;
|
|
_11 = _10 * 4;
|
|
_12 = _9 + _11;
|
|
MEM[(volatile uint32 *)_12] ={v} 4294967295;
|
|
|
|
<bb 11> [local count: 644245091]:
|
|
# DEBUG BEGIN_STMT
|
|
u8Index_37 = u8Index_20 + 1;
|
|
# DEBUG u8Index => u8Index_37
|
|
|
|
<bb 12> [local count: 858993456]:
|
|
# u8Index_20 = PHI <u8Index_37(11), 0(23)>
|
|
# DEBUG u8Index => u8Index_20
|
|
# DEBUG BEGIN_STMT
|
|
if (u8Index_20 != 3)
|
|
goto <bb 8>; [75.00%]
|
|
else
|
|
goto <bb 22>; [25.00%]
|
|
|
|
<bb 22> [local count: 214748364]:
|
|
goto <bb 14>; [100.00%]
|
|
|
|
<bb 13> [local count: 858993459]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG pBase => pBase_32
|
|
# DEBUG u8RegisterNumber => u8Index_21
|
|
# DEBUG u16HighThreshold => 65535
|
|
# DEBUG u16LowThreshold => 0
|
|
# DEBUG INLINE_ENTRY Adc_Sar_WriteThresholds
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG u32Value => 2147418112
|
|
# DEBUG BEGIN_STMT
|
|
_40 = (int) u8Index_21;
|
|
pBase_32->THRHLR[_40] ={v} 2147418112;
|
|
# DEBUG pBase => NULL
|
|
# DEBUG u8RegisterNumber => NULL
|
|
# DEBUG u16HighThreshold => NULL
|
|
# DEBUG u16LowThreshold => NULL
|
|
# DEBUG u32Value => NULL
|
|
# DEBUG BEGIN_STMT
|
|
u8Index_35 = u8Index_21 + 1;
|
|
# DEBUG u8Index => u8Index_35
|
|
|
|
<bb 14> [local count: 1073741824]:
|
|
# u8Index_21 = PHI <u8Index_35(13), 0(22)>
|
|
# DEBUG u8Index => u8Index_21
|
|
# DEBUG BEGIN_STMT
|
|
if (u8Index_21 != 4)
|
|
goto <bb 13>; [80.00%]
|
|
else
|
|
goto <bb 21>; [20.00%]
|
|
|
|
<bb 21> [local count: 214748365]:
|
|
goto <bb 19>; [100.00%]
|
|
|
|
<bb 15> [local count: 644245095]:
|
|
# DEBUG BEGIN_STMT
|
|
_13 = u32AdcChanBitmap[u32Instance_31(D)][0];
|
|
_14 = (unsigned int) u8Index_22;
|
|
_33 = u8Index_22;
|
|
_15 = (unsigned int) _33;
|
|
_16 = _15 * 8;
|
|
_17 = 255 << _16;
|
|
_18 = _13 & _17;
|
|
if (_18 == 0)
|
|
goto <bb 16>; [33.00%]
|
|
else
|
|
goto <bb 17>; [67.00%]
|
|
|
|
<bb 16> [local count: 212600881]:
|
|
# DEBUG BEGIN_STMT
|
|
// predicted unlikely by continue predictor.
|
|
goto <bb 18>; [100.00%]
|
|
|
|
<bb 17> [local count: 431644213]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG pBase => pBase_32
|
|
# DEBUG u8CwselrId => u8Index_22
|
|
# DEBUG INLINE_ENTRY Adc_Sar_ResetWdogCWSELR
|
|
# DEBUG BEGIN_STMT
|
|
_41 = &pBase_32->CWSELRPI[0];
|
|
_42 = _14 * 4;
|
|
_43 = _41 + _42;
|
|
MEM[(volatile uint32 *)_43] ={v} 0;
|
|
|
|
<bb 18> [local count: 644245094]:
|
|
# DEBUG pBase => NULL
|
|
# DEBUG u8CwselrId => NULL
|
|
# DEBUG BEGIN_STMT
|
|
u8Index_34 = u8Index_22 + 1;
|
|
# DEBUG u8Index => u8Index_34
|
|
|
|
<bb 19> [local count: 858993459]:
|
|
# u8Index_22 = PHI <u8Index_34(18), 0(21)>
|
|
# DEBUG u8Index => u8Index_22
|
|
# DEBUG BEGIN_STMT
|
|
if (u8Index_22 != 3)
|
|
goto <bb 15>; [75.00%]
|
|
else
|
|
goto <bb 20>; [25.00%]
|
|
|
|
<bb 20> [local count: 214748365]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Adc_Sar_GetConvResults (const uint32 u32Instance, const Adc_Sar_Ip_ConvChainType pChainType, uint16 * const pResultsRaw, struct Adc_Sar_Ip_ChanResultType * const pResultsStruct, const uint32 u32Length)
|
|
{
|
|
uint32 u32Cdr;
|
|
uint8 u8ChnIdx;
|
|
uint32 u32VectBit;
|
|
uint32 u32VectAdr;
|
|
struct ADC_Type * const pBase;
|
|
boolean bLengthExceeded;
|
|
uint32 u32Index;
|
|
long unsigned int _1;
|
|
unsigned char _2;
|
|
unsigned char _3;
|
|
unsigned char _4;
|
|
unsigned char _5;
|
|
unsigned int _6;
|
|
long unsigned int _7;
|
|
unsigned int _8;
|
|
unsigned int _9;
|
|
long unsigned int _10;
|
|
long unsigned int _11;
|
|
const uint32_t * _12;
|
|
unsigned int _13;
|
|
const uint32_t * _14;
|
|
long unsigned int _15;
|
|
long unsigned int _16;
|
|
long unsigned int _17;
|
|
long unsigned int _18;
|
|
long unsigned int _19;
|
|
long unsigned int _20;
|
|
uint16 * _21;
|
|
short unsigned int _22;
|
|
long unsigned int _23;
|
|
struct Adc_Sar_Ip_ChanResultType * _24;
|
|
short unsigned int _25;
|
|
long unsigned int _26;
|
|
_Bool _27;
|
|
long unsigned int _28;
|
|
_Bool _29;
|
|
volatile uint32_t * _30;
|
|
long unsigned int _31;
|
|
volatile uint32_t * _32;
|
|
long unsigned int _33;
|
|
unsigned char _53;
|
|
|
|
<bb 2> [local count: 37930576]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG u32Index => 0
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG bLengthExceeded => 0
|
|
# DEBUG BEGIN_STMT
|
|
pBase_56 = pAdcBase[u32Instance_55(D)];
|
|
# DEBUG pBase => pBase_56
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG u32VectAdr => 0
|
|
goto <bb 17>; [100.00%]
|
|
|
|
<bb 3> [local count: 106271080]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = u32AdcChanBitmap[u32Instance_55(D)][u32VectAdr_43];
|
|
if (_1 == 0)
|
|
goto <bb 4>; [57.11%]
|
|
else
|
|
goto <bb 19>; [42.89%]
|
|
|
|
<bb 19> [local count: 45579666]:
|
|
goto <bb 14>; [100.00%]
|
|
|
|
<bb 4> [local count: 60691414]:
|
|
# DEBUG BEGIN_STMT
|
|
// predicted unlikely by continue predictor.
|
|
goto <bb 16>; [100.00%]
|
|
|
|
<bb 5> [local count: 1041207448]:
|
|
# DEBUG BEGIN_STMT
|
|
_2 = (unsigned char) u32VectAdr_43;
|
|
_3 = _2 * 32;
|
|
_4 = (unsigned char) u32VectBit_44;
|
|
u8ChnIdx_57 = _3 + _4;
|
|
# DEBUG u8ChnIdx => u8ChnIdx_57
|
|
# DEBUG BEGIN_STMT
|
|
_5 = u8ChnIdx_57 >> 5;
|
|
_6 = (unsigned int) _5;
|
|
_7 = u32AdcChanBitmap[u32Instance_55(D)][_6];
|
|
_8 = (unsigned int) u8ChnIdx_57;
|
|
_53 = u8ChnIdx_57 & 31;
|
|
_9 = (unsigned int) _53;
|
|
_10 = _7 >> _9;
|
|
_11 = _10 & 1;
|
|
if (_11 == 0)
|
|
goto <bb 6>; [33.00%]
|
|
else
|
|
goto <bb 7>; [67.00%]
|
|
|
|
<bb 6> [local count: 343598458]:
|
|
# DEBUG BEGIN_STMT
|
|
// predicted unlikely by continue predictor.
|
|
goto <bb 13>; [100.00%]
|
|
|
|
<bb 7> [local count: 697608991]:
|
|
# DEBUG BEGIN_STMT
|
|
_12 = &pBase_56->PCDR[0];
|
|
_13 = _8 * 4;
|
|
_14 = _12 + _13;
|
|
u32Cdr_58 ={v} MEM[(volatile uint32 *)_14];
|
|
# DEBUG u32Cdr => u32Cdr_58
|
|
# DEBUG BEGIN_STMT
|
|
_15 = (long unsigned int) pChainType_59(D);
|
|
_16 = _15 << 16;
|
|
_17 = _16 & 196608;
|
|
_18 = _17 | 524288;
|
|
_19 = u32Cdr_58 & 720896;
|
|
if (_18 == _19)
|
|
goto <bb 8>; [34.00%]
|
|
else
|
|
goto <bb 13>; [66.00%]
|
|
|
|
<bb 8> [local count: 237187056]:
|
|
# DEBUG BEGIN_STMT
|
|
if (pResultsRaw_60(D) != 0B)
|
|
goto <bb 9>; [53.47%]
|
|
else
|
|
goto <bb 10>; [46.53%]
|
|
|
|
<bb 9> [local count: 126823919]:
|
|
# DEBUG BEGIN_STMT
|
|
_20 = u32Index_35 * 2;
|
|
_21 = pResultsRaw_60(D) + _20;
|
|
_22 = Adc_Sar_GetMaskedResult (u32Instance_55(D), u32Cdr_58);
|
|
*_21 = _22;
|
|
|
|
<bb 10> [local count: 237187056]:
|
|
# DEBUG BEGIN_STMT
|
|
if (pResultsStruct_63(D) != 0B)
|
|
goto <bb 11>; [53.47%]
|
|
else
|
|
goto <bb 12>; [46.53%]
|
|
|
|
<bb 11> [local count: 126823919]:
|
|
# DEBUG BEGIN_STMT
|
|
_23 = u32Index_35 * 6;
|
|
_24 = pResultsStruct_63(D) + _23;
|
|
_25 = Adc_Sar_GetMaskedResult (u32Instance_55(D), u32Cdr_58);
|
|
_24->u16ConvData = _25;
|
|
# DEBUG BEGIN_STMT
|
|
_24->u8ChnIdx = u8ChnIdx_57;
|
|
# DEBUG BEGIN_STMT
|
|
_26 = u32Cdr_58 >> 19;
|
|
_27 = (_Bool) _26;
|
|
_24->bValid = _27;
|
|
# DEBUG BEGIN_STMT
|
|
_28 = u32Cdr_58 >> 18;
|
|
_29 = (_Bool) _28;
|
|
_24->bOverWritten = _29;
|
|
|
|
<bb 12> [local count: 237187056]:
|
|
# DEBUG BEGIN_STMT
|
|
_30 = &pBase_56->CEOCFR0;
|
|
_31 = u32VectAdr_43 * 4;
|
|
_32 = _30 + _31;
|
|
_33 = 1 << u32VectBit_44;
|
|
MEM[(volatile uint32 *)_32] ={v} _33;
|
|
# DEBUG BEGIN_STMT
|
|
u32Index_70 = u32Index_35 + 1;
|
|
# DEBUG u32Index => u32Index_70
|
|
# DEBUG BEGIN_STMT
|
|
if (u32Index_70 >= u32Length_71(D))
|
|
goto <bb 15>; [5.50%]
|
|
else
|
|
goto <bb 13>; [94.50%]
|
|
|
|
<bb 13> [local count: 1028162160]:
|
|
# u32Index_34 = PHI <u32Index_35(6), u32Index_35(7), u32Index_70(12)>
|
|
# DEBUG u32Index => u32Index_34
|
|
# DEBUG BEGIN_STMT
|
|
u32VectBit_72 = u32VectBit_44 + 1;
|
|
# DEBUG u32VectBit => u32VectBit_72
|
|
|
|
<bb 14> [local count: 1073741824]:
|
|
# u32Index_35 = PHI <u32Index_34(13), u32Index_38(19)>
|
|
# u32VectBit_44 = PHI <u32VectBit_72(13), 0(19)>
|
|
# DEBUG u32VectBit => u32VectBit_44
|
|
# DEBUG u32Index => u32Index_35
|
|
# DEBUG BEGIN_STMT
|
|
if (u32VectBit_44 != 32)
|
|
goto <bb 5>; [96.97%]
|
|
else
|
|
goto <bb 15>; [3.03%]
|
|
|
|
<bb 15> [local count: 45579665]:
|
|
# u32Index_36 = PHI <u32Index_70(12), u32Index_35(14)>
|
|
# bLengthExceeded_40 = PHI <1(12), bLengthExceeded_42(14)>
|
|
# DEBUG bLengthExceeded => bLengthExceeded_40
|
|
# DEBUG u32Index => u32Index_36
|
|
# DEBUG BEGIN_STMT
|
|
if (bLengthExceeded_40 != 0)
|
|
goto <bb 18>; [5.50%]
|
|
else
|
|
goto <bb 16>; [94.50%]
|
|
|
|
<bb 16> [local count: 103764197]:
|
|
# u32Index_37 = PHI <u32Index_38(4), u32Index_36(15)>
|
|
# bLengthExceeded_41 = PHI <bLengthExceeded_42(4), bLengthExceeded_40(15)>
|
|
# DEBUG bLengthExceeded => bLengthExceeded_41
|
|
# DEBUG u32Index => u32Index_37
|
|
# DEBUG BEGIN_STMT
|
|
u32VectAdr_73 = u32VectAdr_43 + 1;
|
|
# DEBUG u32VectAdr => u32VectAdr_73
|
|
|
|
<bb 17> [local count: 141694773]:
|
|
# u32Index_38 = PHI <0(2), u32Index_37(16)>
|
|
# bLengthExceeded_42 = PHI <0(2), bLengthExceeded_41(16)>
|
|
# u32VectAdr_43 = PHI <0(2), u32VectAdr_73(16)>
|
|
# DEBUG u32VectAdr => u32VectAdr_43
|
|
# DEBUG bLengthExceeded => bLengthExceeded_42
|
|
# DEBUG u32Index => u32Index_38
|
|
# DEBUG BEGIN_STMT
|
|
if (u32VectAdr_43 != 3)
|
|
goto <bb 3>; [75.00%]
|
|
else
|
|
goto <bb 18>; [25.00%]
|
|
|
|
<bb 18> [local count: 37930575]:
|
|
# u32Index_39 = PHI <u32Index_36(15), u32Index_38(17)>
|
|
# DEBUG u32Index => u32Index_39
|
|
# DEBUG BEGIN_STMT
|
|
return u32Index_39;
|
|
|
|
}
|
|
|
|
|
|
Adc_Sar_CheckSelfTestProgress (const uint32 u32Instance)
|
|
{
|
|
uint8 u8Index;
|
|
uint32 u32ElapsedTicks;
|
|
uint32 u32CurrentTicks;
|
|
uint32 u32TimeoutTicks;
|
|
Adc_Sar_Ip_StatusType eStatus;
|
|
const struct ADC_Type * const pBase;
|
|
long unsigned int _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _7;
|
|
long unsigned int _8;
|
|
long unsigned int _26;
|
|
long unsigned int _29;
|
|
|
|
<bb 2> [local count: 65677296]:
|
|
# DEBUG BEGIN_STMT
|
|
pBase_20 = pAdcBase[u32Instance_19(D)];
|
|
# DEBUG pBase => pBase_20
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG eStatus => 0
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG u32Reg => 0
|
|
# DEBUG BEGIN_STMT
|
|
u32TimeoutTicks_22 = OsIf_MicrosToTicks (3000, 0);
|
|
# DEBUG u32TimeoutTicks => u32TimeoutTicks_22
|
|
# DEBUG BEGIN_STMT
|
|
_1 = OsIf_GetCounter (0);
|
|
u32CurrentTicks = _1;
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG u8Index => 0
|
|
goto <bb 12>; [100.00%]
|
|
|
|
<bb 3> [local count: 958878293]:
|
|
# DEBUG BEGIN_STMT
|
|
_26 = OsIf_GetElapsed (&u32CurrentTicks, 0);
|
|
u32ElapsedTicks_27 = u32ElapsedTicks_11 + _26;
|
|
# DEBUG u32ElapsedTicks => u32ElapsedTicks_27
|
|
|
|
<bb 4> [local count: 1073741824]:
|
|
# u32ElapsedTicks_11 = PHI <u32ElapsedTicks_27(3), 0(18)>
|
|
# DEBUG u32ElapsedTicks => u32ElapsedTicks_11
|
|
# DEBUG BEGIN_STMT
|
|
_2 ={v} pBase_20->MSR;
|
|
_3 = _2 & 262144;
|
|
if (_3 == 0)
|
|
goto <bb 5>; [94.50%]
|
|
else
|
|
goto <bb 6>; [5.50%]
|
|
|
|
<bb 5> [local count: 1014686025]:
|
|
if (u32ElapsedTicks_11 < u32TimeoutTicks_22)
|
|
goto <bb 3>; [94.50%]
|
|
else
|
|
goto <bb 6>; [5.50%]
|
|
|
|
<bb 6> [local count: 114863532]:
|
|
# u32ElapsedTicks_6 = PHI <u32ElapsedTicks_11(4), u32ElapsedTicks_11(5)>
|
|
# DEBUG BEGIN_STMT
|
|
if (u32ElapsedTicks_6 >= u32TimeoutTicks_22)
|
|
goto <bb 13>; [3.66%]
|
|
else
|
|
goto <bb 17>; [96.34%]
|
|
|
|
<bb 17> [local count: 110659526]:
|
|
goto <bb 8>; [100.00%]
|
|
|
|
<bb 7> [local count: 923783344]:
|
|
# DEBUG BEGIN_STMT
|
|
_29 = OsIf_GetElapsed (&u32CurrentTicks, 0);
|
|
u32ElapsedTicks_30 = u32ElapsedTicks_12 + _29;
|
|
# DEBUG u32ElapsedTicks => u32ElapsedTicks_30
|
|
|
|
<bb 8> [local count: 1034442871]:
|
|
# u32ElapsedTicks_12 = PHI <u32ElapsedTicks_30(7), 0(17)>
|
|
# DEBUG u32ElapsedTicks => u32ElapsedTicks_12
|
|
# DEBUG BEGIN_STMT
|
|
_4 ={v} pBase_20->MSR;
|
|
_5 = _4 & 262144;
|
|
if (_5 != 0)
|
|
goto <bb 9>; [94.50%]
|
|
else
|
|
goto <bb 10>; [5.50%]
|
|
|
|
<bb 9> [local count: 977548512]:
|
|
if (u32ElapsedTicks_12 < u32TimeoutTicks_22)
|
|
goto <bb 7>; [94.50%]
|
|
else
|
|
goto <bb 10>; [5.50%]
|
|
|
|
<bb 10> [local count: 110659526]:
|
|
# u32ElapsedTicks_32 = PHI <u32ElapsedTicks_12(8), u32ElapsedTicks_12(9)>
|
|
# DEBUG BEGIN_STMT
|
|
if (u32TimeoutTicks_22 <= u32ElapsedTicks_32)
|
|
goto <bb 13>; [3.66%]
|
|
else
|
|
goto <bb 11>; [96.34%]
|
|
|
|
<bb 11> [local count: 106609387]:
|
|
# DEBUG BEGIN_STMT
|
|
u8Index_31 = u8Index_13 + 1;
|
|
# DEBUG u8Index => u8Index_31
|
|
|
|
<bb 12> [local count: 172286684]:
|
|
# u8Index_13 = PHI <0(2), u8Index_31(11)>
|
|
# DEBUG u8Index => u8Index_13
|
|
# DEBUG BEGIN_STMT
|
|
if (u8Index_13 != 2)
|
|
goto <bb 18>; [66.67%]
|
|
else
|
|
goto <bb 13>; [33.33%]
|
|
|
|
<bb 18> [local count: 114863532]:
|
|
goto <bb 4>; [100.00%]
|
|
|
|
<bb 13> [local count: 65677296]:
|
|
# eStatus_9 = PHI <2(6), 2(10), 0(12)>
|
|
# DEBUG eStatus => eStatus_9
|
|
# DEBUG BEGIN_STMT
|
|
if (eStatus_9 != 2)
|
|
goto <bb 14>; [66.00%]
|
|
else
|
|
goto <bb 16>; [34.00%]
|
|
|
|
<bb 14> [local count: 43347015]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG u32Reg => 47104
|
|
# DEBUG BEGIN_STMT
|
|
_7 ={v} pBase_20->STSR1;
|
|
_8 = _7 & 47104;
|
|
if (_8 != 0)
|
|
goto <bb 15>; [50.00%]
|
|
else
|
|
goto <bb 16>; [50.00%]
|
|
|
|
<bb 15> [local count: 21673508]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG eStatus => 1
|
|
|
|
<bb 16> [local count: 65677296]:
|
|
# eStatus_10 = PHI <eStatus_9(13), eStatus_9(14), 1(15)>
|
|
# DEBUG eStatus => eStatus_10
|
|
# DEBUG BEGIN_STMT
|
|
u32CurrentTicks ={v} {CLOBBER};
|
|
return eStatus_10;
|
|
|
|
}
|
|
|
|
|
|
Adc_Sar_EnableChannelWatchdog (const uint32 u32Instance, const struct Adc_Sar_Ip_ChanConfigType * pChannelConfigs, uint8 u8NumChannels)
|
|
{
|
|
uint32 u32Pos;
|
|
uint32 u32RegNum;
|
|
const struct Adc_Sar_Ip_ChanConfigType * pChnConfig;
|
|
uint8 u8Index;
|
|
uint32 u32Mask;
|
|
struct ADC_Type * const pBase;
|
|
unsigned int _1;
|
|
unsigned int _2;
|
|
unsigned char _3;
|
|
unsigned char _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
long unsigned int _7;
|
|
long unsigned int _8;
|
|
long unsigned int _9;
|
|
long unsigned int _10;
|
|
unsigned char _11;
|
|
long unsigned int _12;
|
|
_Bool _13;
|
|
_Bool _14;
|
|
unsigned char _15;
|
|
long unsigned int _16;
|
|
unsigned char _17;
|
|
unsigned char _18;
|
|
long unsigned int _19;
|
|
volatile uint32_t * _20;
|
|
long unsigned int _21;
|
|
volatile uint32_t * _22;
|
|
long unsigned int _23;
|
|
_Bool _24;
|
|
long unsigned int _25;
|
|
long unsigned int iftmp.10_29;
|
|
unsigned char _36;
|
|
unsigned char _43;
|
|
unsigned char _44;
|
|
long unsigned int iftmp.10_49;
|
|
|
|
<bb 2> [local count: 118111602]:
|
|
# DEBUG BEGIN_STMT
|
|
pBase_35 = pAdcBase[u32Instance_34(D)];
|
|
# DEBUG pBase => pBase_35
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG u8Index => 0
|
|
goto <bb 14>; [100.00%]
|
|
|
|
<bb 3> [local count: 955630223]:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (unsigned int) u8Index_28;
|
|
_2 = _1 * 5;
|
|
pChnConfig_39 = pChannelConfigs_38(D) + _2;
|
|
# DEBUG pChnConfig => pChnConfig_39
|
|
# DEBUG BEGIN_STMT
|
|
_3 = pChnConfig_39->u8ChannelIndex;
|
|
_4 = _3 >> 3;
|
|
u32RegNum_40 = (uint32) _4;
|
|
# DEBUG u32RegNum => u32RegNum_40
|
|
# DEBUG BEGIN_STMT
|
|
_36 = _3 & 7;
|
|
u32Pos_41 = (uint32) _36;
|
|
# DEBUG u32Pos => u32Pos_41
|
|
# DEBUG BEGIN_STMT
|
|
_5 = u32RegNum_40 >> 2;
|
|
_6 = u32AdcChanBitmap[u32Instance_34(D)][_5];
|
|
_43 = _4 & 3;
|
|
_7 = (long unsigned int) _43;
|
|
_8 = _7 * 8;
|
|
_9 = 255 << _8;
|
|
_10 = _6 & _9;
|
|
if (_10 != 0)
|
|
goto <bb 4>; [33.00%]
|
|
else
|
|
goto <bb 5>; [67.00%]
|
|
|
|
<bb 4> [local count: 315357973]:
|
|
# DEBUG BEGIN_STMT
|
|
_11 = pChnConfig_39->u8WdgThreshRegIndex;
|
|
_12 = (long unsigned int) _11;
|
|
Adc_Sar_WriteChannelMapping (pBase_35, u32RegNum_40, u32Pos_41, _12);
|
|
|
|
<bb 5> [local count: 955630223]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG u32Mask => 0
|
|
# DEBUG BEGIN_STMT
|
|
_13 = pChnConfig_39->bEndOfConvNotification;
|
|
if (_13 != 0)
|
|
goto <bb 6>; [50.00%]
|
|
else
|
|
goto <bb 7>; [50.00%]
|
|
|
|
<bb 6> [local count: 477815111]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG u32Mask => 1
|
|
|
|
<bb 7> [local count: 955630223]:
|
|
# u32Mask_26 = PHI <0(5), 1(6)>
|
|
# DEBUG u32Mask => u32Mask_26
|
|
# DEBUG BEGIN_STMT
|
|
_14 = pChnConfig_39->bWdgNotification;
|
|
if (_14 != 0)
|
|
goto <bb 8>; [50.00%]
|
|
else
|
|
goto <bb 9>; [50.00%]
|
|
|
|
<bb 8> [local count: 477815111]:
|
|
# DEBUG BEGIN_STMT
|
|
u32Mask_45 = u32Mask_26 | 2;
|
|
# DEBUG u32Mask => u32Mask_45
|
|
|
|
<bb 9> [local count: 955630223]:
|
|
# u32Mask_27 = PHI <u32Mask_26(7), u32Mask_45(8)>
|
|
# DEBUG u32Mask => u32Mask_27
|
|
# DEBUG BEGIN_STMT
|
|
_15 = pChnConfig_39->u8ChannelIndex;
|
|
_16 = (long unsigned int) _15;
|
|
Adc_Sar_Ip_EnableChannelNotifications (u32Instance_34(D), _16, u32Mask_27);
|
|
# DEBUG BEGIN_STMT
|
|
_17 = pChnConfig_39->u8ChannelIndex;
|
|
_18 = _17 >> 5;
|
|
u32RegNum_47 = (uint32) _18;
|
|
# DEBUG u32RegNum => u32RegNum_47
|
|
# DEBUG BEGIN_STMT
|
|
_44 = _17 & 31;
|
|
u32Pos_48 = (uint32) _44;
|
|
# DEBUG u32Pos => u32Pos_48
|
|
# DEBUG BEGIN_STMT
|
|
_19 = u32AdcChanBitmap[u32Instance_34(D)][u32RegNum_47];
|
|
if (_19 != 0)
|
|
goto <bb 10>; [50.00%]
|
|
else
|
|
goto <bb 13>; [50.00%]
|
|
|
|
<bb 10> [local count: 477815111]:
|
|
# DEBUG BEGIN_STMT
|
|
_20 = &pBase_35->PSR0;
|
|
_21 = u32RegNum_47 * 4;
|
|
_22 = _20 + _21;
|
|
_23 ={v} MEM[(volatile uint32 *)_22];
|
|
_24 = pChnConfig_39->bPresamplingEnable;
|
|
if (_24 != 0)
|
|
goto <bb 11>; [50.00%]
|
|
else
|
|
goto <bb 12>; [50.00%]
|
|
|
|
<bb 11> [local count: 238907556]:
|
|
iftmp.10_49 = 1 << u32Pos_48;
|
|
|
|
<bb 12> [local count: 477815111]:
|
|
# iftmp.10_29 = PHI <iftmp.10_49(11), 0(10)>
|
|
_25 = _23 | iftmp.10_29;
|
|
MEM[(volatile uint32 *)_22] ={v} _25;
|
|
|
|
<bb 13> [local count: 955630223]:
|
|
# DEBUG BEGIN_STMT
|
|
u8Index_51 = u8Index_28 + 1;
|
|
# DEBUG u8Index => u8Index_51
|
|
|
|
<bb 14> [local count: 1073741824]:
|
|
# u8Index_28 = PHI <0(2), u8Index_51(13)>
|
|
# DEBUG u8Index => u8Index_28
|
|
# DEBUG BEGIN_STMT
|
|
if (u8Index_28 < u8NumChannels_37(D))
|
|
goto <bb 3>; [89.00%]
|
|
else
|
|
goto <bb 15>; [11.00%]
|
|
|
|
<bb 15> [local count: 118111601]:
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
Adc_Sar_CollectMcrMasks (const uint32 u32Instance, const struct Adc_Sar_Ip_ConfigType * const pConfig)
|
|
{
|
|
uint32 u32Mcr;
|
|
<unnamed type> _1;
|
|
long unsigned int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
<unnamed type> _5;
|
|
long unsigned int _6;
|
|
long unsigned int _7;
|
|
long unsigned int _8;
|
|
_Bool _9;
|
|
_Bool _10;
|
|
<unnamed type> _11;
|
|
long unsigned int _12;
|
|
long unsigned int _13;
|
|
long unsigned int _14;
|
|
long unsigned int _15;
|
|
long unsigned int _16;
|
|
<unnamed type> _17;
|
|
<unnamed type> _18;
|
|
<unnamed type> _19;
|
|
_Bool _20;
|
|
_Bool _21;
|
|
_Bool _22;
|
|
<unnamed type> _23;
|
|
long unsigned int _24;
|
|
long unsigned int _25;
|
|
long unsigned int _26;
|
|
long unsigned int iftmp.4_30;
|
|
long unsigned int iftmp.5_31;
|
|
long unsigned int iftmp.6_32;
|
|
long unsigned int iftmp.7_33;
|
|
long unsigned int iftmp.8_34;
|
|
long unsigned int iftmp.9_35;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG u32Mcr => 0
|
|
# DEBUG BEGIN_STMT
|
|
_1 = pConfig_37(D)->eConvMode;
|
|
_2 = (long unsigned int) _1;
|
|
_3 = _2 << 29;
|
|
_4 = _3 & 536870912;
|
|
# DEBUG u32Mcr => _4
|
|
# DEBUG BEGIN_STMT
|
|
_5 = pConfig_37(D)->eClkSelect;
|
|
_6 = (long unsigned int) _5;
|
|
_7 = _6 << 1;
|
|
_8 = _7 & 6;
|
|
u32Mcr_38 = _4 | _8;
|
|
# DEBUG u32Mcr => u32Mcr_38
|
|
# DEBUG BEGIN_STMT
|
|
_9 = pConfig_37(D)->bAutoClockOff;
|
|
if (_9 != 0)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 3>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
|
|
<bb 4> [local count: 1073741824]:
|
|
# iftmp.4_30 = PHI <32(2), 0(3)>
|
|
u32Mcr_39 = iftmp.4_30 | u32Mcr_38;
|
|
# DEBUG u32Mcr => u32Mcr_39
|
|
# DEBUG BEGIN_STMT
|
|
_10 = pConfig_37(D)->bOverwriteEnable;
|
|
if (_10 != 0)
|
|
goto <bb 6>; [50.00%]
|
|
else
|
|
goto <bb 5>; [50.00%]
|
|
|
|
<bb 5> [local count: 536870913]:
|
|
|
|
<bb 6> [local count: 1073741824]:
|
|
# iftmp.5_31 = PHI <2147483648(4), 0(5)>
|
|
u32Mcr_40 = iftmp.5_31 | u32Mcr_39;
|
|
# DEBUG u32Mcr => u32Mcr_40
|
|
# DEBUG BEGIN_STMT
|
|
_11 = pConfig_37(D)->eDataAlign;
|
|
_12 = (long unsigned int) _11;
|
|
_13 = _12 << 30;
|
|
_14 = _13 & 1073741824;
|
|
u32Mcr_41 = _14 | u32Mcr_40;
|
|
# DEBUG u32Mcr => u32Mcr_41
|
|
# DEBUG BEGIN_STMT
|
|
_15 = u32AdcFeatureBitmap[u32Instance_42(D)];
|
|
_16 = _15 & 4;
|
|
if (_16 != 0)
|
|
goto <bb 7>; [50.00%]
|
|
else
|
|
goto <bb 10>; [50.00%]
|
|
|
|
<bb 7> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
_17 = pConfig_37(D)->eCtuMode;
|
|
switch (_17) <default: <L33> [33.33%], case 1: <L7> [33.33%], case 2: <L8> [33.33%]>
|
|
|
|
<bb 8> [local count: 178939075]:
|
|
<L7>:
|
|
# DEBUG BEGIN_STMT
|
|
u32Mcr_44 = u32Mcr_41 | 131072;
|
|
# DEBUG u32Mcr => u32Mcr_44
|
|
# DEBUG BEGIN_STMT
|
|
goto <bb 10>; [100.00%]
|
|
|
|
<bb 9> [local count: 178939075]:
|
|
<L8>:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG u32Mcr => u32Mcr_41 | 65536
|
|
# DEBUG BEGIN_STMT
|
|
u32Mcr_43 = u32Mcr_41 | 196608;
|
|
# DEBUG u32Mcr => u32Mcr_43
|
|
# DEBUG BEGIN_STMT
|
|
|
|
<bb 10> [local count: 1073688138]:
|
|
# u32Mcr_27 = PHI <u32Mcr_41(6), u32Mcr_44(8), u32Mcr_43(9), u32Mcr_41(7)>
|
|
<L33>:
|
|
# DEBUG u32Mcr => u32Mcr_27
|
|
# DEBUG BEGIN_STMT
|
|
_18 = pConfig_37(D)->eInjectedEdge;
|
|
switch (_18) <default: <L34> [33.33%], case 1: <L13> [33.33%], case 2: <L14> [33.33%]>
|
|
|
|
<bb 11> [local count: 357860256]:
|
|
<L13>:
|
|
# DEBUG BEGIN_STMT
|
|
u32Mcr_46 = u32Mcr_27 | 4194304;
|
|
# DEBUG u32Mcr => u32Mcr_46
|
|
# DEBUG BEGIN_STMT
|
|
goto <bb 13>; [100.00%]
|
|
|
|
<bb 12> [local count: 357860256]:
|
|
<L14>:
|
|
# DEBUG BEGIN_STMT
|
|
u32Mcr_45 = u32Mcr_27 | 6291456;
|
|
# DEBUG u32Mcr => u32Mcr_45
|
|
# DEBUG BEGIN_STMT
|
|
|
|
<bb 13> [local count: 1073580769]:
|
|
# u32Mcr_28 = PHI <u32Mcr_46(11), u32Mcr_45(12), u32Mcr_27(10)>
|
|
<L34>:
|
|
# DEBUG u32Mcr => u32Mcr_28
|
|
# DEBUG BEGIN_STMT
|
|
_19 = pConfig_37(D)->eExtTrigger;
|
|
if (_19 == 2)
|
|
goto <bb 15>; [34.00%]
|
|
else
|
|
goto <bb 14>; [66.00%]
|
|
|
|
<bb 14> [local count: 708563308]:
|
|
|
|
<bb 15> [local count: 1073580769]:
|
|
# iftmp.6_32 = PHI <67108864(13), 0(14)>
|
|
u32Mcr_47 = u32Mcr_28 | iftmp.6_32;
|
|
# DEBUG u32Mcr => u32Mcr_47
|
|
# DEBUG BEGIN_STMT
|
|
if (_19 != 0)
|
|
goto <bb 16>; [50.00%]
|
|
else
|
|
goto <bb 21>; [50.00%]
|
|
|
|
<bb 16> [local count: 536790384]:
|
|
# DEBUG BEGIN_STMT
|
|
_20 = pConfig_37(D)->bNormalExtTrgEn;
|
|
if (_20 != 0)
|
|
goto <bb 18>; [50.00%]
|
|
else
|
|
goto <bb 17>; [50.00%]
|
|
|
|
<bb 17> [local count: 268395192]:
|
|
|
|
<bb 18> [local count: 536790384]:
|
|
# iftmp.7_33 = PHI <134217728(16), 0(17)>
|
|
u32Mcr_48 = iftmp.7_33 | u32Mcr_47;
|
|
# DEBUG u32Mcr => u32Mcr_48
|
|
# DEBUG BEGIN_STMT
|
|
_21 = pConfig_37(D)->bNormalAuxExtTrgEn;
|
|
if (_21 != 0)
|
|
goto <bb 20>; [50.00%]
|
|
else
|
|
goto <bb 19>; [50.00%]
|
|
|
|
<bb 19> [local count: 268395192]:
|
|
|
|
<bb 20> [local count: 536790384]:
|
|
# iftmp.8_34 = PHI <33554432(18), 0(19)>
|
|
u32Mcr_49 = iftmp.8_34 | u32Mcr_48;
|
|
# DEBUG u32Mcr => u32Mcr_49
|
|
|
|
<bb 21> [local count: 1073580768]:
|
|
# u32Mcr_29 = PHI <u32Mcr_47(15), u32Mcr_49(20)>
|
|
# DEBUG u32Mcr => u32Mcr_29
|
|
# DEBUG BEGIN_STMT
|
|
_22 = pConfig_37(D)->bAvgEn;
|
|
if (_22 != 0)
|
|
goto <bb 23>; [50.00%]
|
|
else
|
|
goto <bb 22>; [50.00%]
|
|
|
|
<bb 22> [local count: 536790384]:
|
|
|
|
<bb 23> [local count: 1073580768]:
|
|
# iftmp.9_35 = PHI <2048(21), 0(22)>
|
|
u32Mcr_50 = u32Mcr_29 | iftmp.9_35;
|
|
# DEBUG u32Mcr => u32Mcr_50
|
|
# DEBUG BEGIN_STMT
|
|
_23 = pConfig_37(D)->eAvgSel;
|
|
_24 = (long unsigned int) _23;
|
|
_25 = _24 << 9;
|
|
_26 = _25 & 1536;
|
|
u32Mcr_51 = _26 | u32Mcr_50;
|
|
# DEBUG u32Mcr => u32Mcr_51
|
|
# DEBUG BEGIN_STMT
|
|
return u32Mcr_51;
|
|
|
|
}
|
|
|
|
|
|
Adc_Sar_GetIsrFlags (const uint32 u32Instance)
|
|
{
|
|
uint32 u32Flags;
|
|
uint32 u32Isr;
|
|
const struct ADC_Type * const pBase;
|
|
long unsigned int _1;
|
|
long unsigned int _2;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
pBase_6 = pAdcBase[u32Instance_5(D)];
|
|
# DEBUG pBase => pBase_6
|
|
# DEBUG BEGIN_STMT
|
|
u32Isr_7 ={v} pBase_6->ISR;
|
|
# DEBUG u32Isr => u32Isr_7
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG u32Flags => 0
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG u32Flags => u32Isr_7 & 2
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG u32Flags => u32Isr_7 & 3
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG u32Flags => u32Isr_7 & 11
|
|
# DEBUG BEGIN_STMT
|
|
u32Flags_8 = u32Isr_7 & 15;
|
|
# DEBUG u32Flags => u32Flags_8
|
|
# DEBUG BEGIN_STMT
|
|
_1 = u32AdcFeatureBitmap[u32Instance_5(D)];
|
|
_2 = _1 & 4;
|
|
if (_2 != 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 4>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
u32Flags_9 = u32Isr_7 & 31;
|
|
# DEBUG u32Flags => u32Flags_9
|
|
|
|
<bb 4> [local count: 1073741824]:
|
|
# u32Flags_3 = PHI <u32Flags_8(2), u32Flags_9(3)>
|
|
# DEBUG u32Flags => u32Flags_3
|
|
# DEBUG BEGIN_STMT
|
|
return u32Flags_3;
|
|
|
|
}
|
|
|
|
|
|
Adc_Sar_GetMsrFlags (const uint32 u32Instance)
|
|
{
|
|
uint32 u32Flags;
|
|
uint32 u32Msr;
|
|
const struct ADC_Type * const pBase;
|
|
signed int u32Msr.20_1;
|
|
signed int _2;
|
|
long unsigned int _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
long unsigned int _7;
|
|
long unsigned int _8;
|
|
long unsigned int _9;
|
|
long unsigned int _10;
|
|
long unsigned int _11;
|
|
long unsigned int _12;
|
|
long unsigned int _13;
|
|
long unsigned int _14;
|
|
long unsigned int _15;
|
|
long unsigned int _16;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
pBase_20 = pAdcBase[u32Instance_19(D)];
|
|
# DEBUG pBase => pBase_20
|
|
# DEBUG BEGIN_STMT
|
|
u32Msr_21 ={v} pBase_20->MSR;
|
|
# DEBUG u32Msr => u32Msr_21
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG u32Flags => 0
|
|
# DEBUG BEGIN_STMT
|
|
u32Msr.20_1 = (signed int) u32Msr_21;
|
|
_2 = u32Msr.20_1 >> 26;
|
|
_3 = (long unsigned int) _2;
|
|
_4 = _3 & 32;
|
|
# DEBUG u32Flags => _4
|
|
# DEBUG BEGIN_STMT
|
|
_5 = u32Msr_21 >> 18;
|
|
_6 = _5 & 64;
|
|
u32Flags_22 = _4 | _6;
|
|
# DEBUG u32Flags => u32Flags_22
|
|
# DEBUG BEGIN_STMT
|
|
_7 = u32Msr_21 >> 15;
|
|
_8 = _7 & 256;
|
|
u32Flags_23 = _8 | u32Flags_22;
|
|
# DEBUG u32Flags => u32Flags_23
|
|
# DEBUG BEGIN_STMT
|
|
_9 = u32Msr_21 >> 13;
|
|
_10 = _9 & 128;
|
|
u32Flags_24 = _10 | u32Flags_23;
|
|
# DEBUG u32Flags => u32Flags_24
|
|
# DEBUG BEGIN_STMT
|
|
_11 = u32AdcFeatureBitmap[u32Instance_19(D)];
|
|
_12 = _11 & 4;
|
|
if (_12 != 0)
|
|
goto <bb 3>; [50.00%]
|
|
else
|
|
goto <bb 4>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
# DEBUG BEGIN_STMT
|
|
_13 = u32Msr_21 >> 7;
|
|
_14 = _13 & 512;
|
|
u32Flags_25 = _14 | u32Flags_24;
|
|
# DEBUG u32Flags => u32Flags_25
|
|
|
|
<bb 4> [local count: 1073741824]:
|
|
# u32Flags_17 = PHI <u32Flags_24(2), u32Flags_25(3)>
|
|
# DEBUG u32Flags => u32Flags_17
|
|
# DEBUG BEGIN_STMT
|
|
_15 = u32Msr_21 << 5;
|
|
_16 = _15 & 1024;
|
|
u32Flags_26 = _16 | u32Flags_17;
|
|
# DEBUG u32Flags => u32Flags_26
|
|
# DEBUG BEGIN_STMT
|
|
return u32Flags_26;
|
|
|
|
}
|
|
|
|
|
|
Adc_Sar_GetMaskedResult (const uint32 u32Instance, const uint32 u32Cdr)
|
|
{
|
|
uint8 u8Resolution;
|
|
uint16 u16Result;
|
|
uint32 u32CdrMask;
|
|
unsigned int _1;
|
|
unsigned int _2;
|
|
<unnamed type> _3;
|
|
short unsigned int _4;
|
|
short unsigned int _5;
|
|
unsigned int _6;
|
|
unsigned int _7;
|
|
short unsigned int _8;
|
|
short unsigned int _9;
|
|
short unsigned int _10;
|
|
int _11;
|
|
int _12;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
u8Resolution_17 = Adc_Sar_GetResolution (u32Instance_15(D));
|
|
# DEBUG u8Resolution => u8Resolution_17
|
|
# DEBUG BEGIN_STMT
|
|
_1 = (unsigned int) u8Resolution_17;
|
|
_2 = 16 - _1;
|
|
u32CdrMask_18 = 65535 << _2;
|
|
# DEBUG u32CdrMask => u32CdrMask_18
|
|
# DEBUG BEGIN_STMT
|
|
_3 = aAdcSarState[u32Instance_15(D)].eDataAlign;
|
|
if (_3 == 1)
|
|
goto <bb 3>; [34.00%]
|
|
else
|
|
goto <bb 4>; [66.00%]
|
|
|
|
<bb 3> [local count: 365072220]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG u32CdrMask => u32CdrMask_18
|
|
# DEBUG BEGIN_STMT
|
|
_4 = (short unsigned int) u32Cdr_20(D);
|
|
_5 = (short unsigned int) u32CdrMask_18;
|
|
u16Result_22 = _4 & _5;
|
|
# DEBUG u16Result => u16Result_22
|
|
goto <bb 5>; [100.00%]
|
|
|
|
<bb 4> [local count: 708669605]:
|
|
# DEBUG BEGIN_STMT
|
|
_6 = 15 - _1;
|
|
_7 = 65535 << _6;
|
|
u32CdrMask_19 = _7 & 32767;
|
|
# DEBUG u32CdrMask => u32CdrMask_19
|
|
# DEBUG BEGIN_STMT
|
|
_8 = (short unsigned int) u32Cdr_20(D);
|
|
_9 = (short unsigned int) u32CdrMask_19;
|
|
_10 = _8 & _9;
|
|
_11 = (int) _10;
|
|
_12 = _11 >> _6;
|
|
u16Result_21 = (uint16) _12;
|
|
# DEBUG u16Result => u16Result_21
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# u16Result_13 = PHI <u16Result_22(3), u16Result_21(4)>
|
|
# DEBUG u16Result => u16Result_13
|
|
# DEBUG BEGIN_STMT
|
|
return u16Result_13;
|
|
|
|
}
|
|
|
|
|
|
Adc_Sar_GetResolution (const uint32 u32Instance)
|
|
{
|
|
uint32 u32Calbistreg;
|
|
struct ADC_Type * const pBase;
|
|
uint8 u8Resolution;
|
|
long unsigned int _1;
|
|
unsigned int _8;
|
|
unsigned char _9;
|
|
unsigned char _10;
|
|
unsigned char _12;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
# DEBUG BEGIN_STMT
|
|
pBase_6 = pAdcBase[u32Instance_5(D)];
|
|
# DEBUG pBase => pBase_6
|
|
# DEBUG BEGIN_STMT
|
|
u32Calbistreg_7 ={v} pBase_6->CALBISTREG;
|
|
# DEBUG u32Calbistreg => u32Calbistreg_7
|
|
# DEBUG BEGIN_STMT
|
|
_1 = u32Calbistreg_7 >> 29;
|
|
# DEBUG u8ResolutionBits => (uint8) _1
|
|
# DEBUG BEGIN_STMT
|
|
_8 = _1 + 4294967295;
|
|
if (_8 <= 2)
|
|
goto <bb 4>; [50.00%]
|
|
else
|
|
goto <bb 3>; [50.00%]
|
|
|
|
<bb 3> [local count: 536870913]:
|
|
<L8>:
|
|
u8Resolution_11 = 14;
|
|
goto <bb 5>; [100.00%]
|
|
|
|
<bb 4> [local count: 536870913]:
|
|
<L9>:
|
|
_12 = (unsigned char) _1;
|
|
_9 = 254 * _12;
|
|
_10 = _9 + 14;
|
|
u8Resolution_2 = _10;
|
|
|
|
<bb 5> [local count: 1073741824]:
|
|
# u8Resolution_3 = PHI <u8Resolution_2(4), u8Resolution_11(3)>
|
|
<L10>:
|
|
<L7>:
|
|
# DEBUG u8Resolution => u8Resolution_3
|
|
# DEBUG BEGIN_STMT
|
|
return u8Resolution_3;
|
|
|
|
}
|
|
|
|
|
|
Adc_Sar_WriteChannelMapping (struct ADC_Type * const pBase, uint32 u32RegisterNumber, uint32 u32FieldPosition, uint32 u32Value)
|
|
{
|
|
volatile uint32_t * _1;
|
|
long unsigned int _2;
|
|
volatile uint32_t * _3;
|
|
long unsigned int _4;
|
|
long unsigned int _5;
|
|
long unsigned int _6;
|
|
long unsigned int _7;
|
|
long unsigned int _8;
|
|
volatile uint32_t * _9;
|
|
long unsigned int _10;
|
|
volatile uint32_t * _11;
|
|
long unsigned int _12;
|
|
long unsigned int _13;
|
|
long unsigned int _14;
|
|
long unsigned int _15;
|
|
long unsigned int _16;
|
|
long unsigned int _17;
|
|
volatile uint32_t * _18;
|
|
long unsigned int _19;
|
|
volatile uint32_t * _20;
|
|
long unsigned int _21;
|
|
long unsigned int _22;
|
|
long unsigned int _23;
|
|
long unsigned int _24;
|
|
long unsigned int _25;
|
|
long unsigned int _26;
|
|
volatile uint32_t * _27;
|
|
long unsigned int _28;
|
|
volatile uint32_t * _29;
|
|
long unsigned int _30;
|
|
long unsigned int _31;
|
|
long unsigned int _32;
|
|
long unsigned int _33;
|
|
long unsigned int _34;
|
|
long unsigned int _35;
|
|
volatile uint32_t * _36;
|
|
long unsigned int _37;
|
|
volatile uint32_t * _38;
|
|
long unsigned int _39;
|
|
long unsigned int _40;
|
|
long unsigned int _41;
|
|
long unsigned int _42;
|
|
long unsigned int _43;
|
|
long unsigned int _44;
|
|
volatile uint32_t * _45;
|
|
long unsigned int _46;
|
|
volatile uint32_t * _47;
|
|
long unsigned int _48;
|
|
long unsigned int _49;
|
|
long unsigned int _50;
|
|
long unsigned int _51;
|
|
long unsigned int _52;
|
|
long unsigned int _53;
|
|
volatile uint32_t * _54;
|
|
long unsigned int _55;
|
|
volatile uint32_t * _56;
|
|
long unsigned int _57;
|
|
long unsigned int _58;
|
|
long unsigned int _59;
|
|
long unsigned int _60;
|
|
long unsigned int _61;
|
|
long unsigned int _62;
|
|
volatile uint32_t * _63;
|
|
long unsigned int _64;
|
|
volatile uint32_t * _65;
|
|
long unsigned int _66;
|
|
long unsigned int _67;
|
|
long unsigned int _68;
|
|
long unsigned int _69;
|
|
long unsigned int _70;
|
|
long unsigned int _71;
|
|
|
|
<bb 2> [local count: 1073741824]:
|
|
# DEBUG BEGIN_STMT
|
|
switch (u32FieldPosition_73(D)) <default: <L10> [11.11%], case 0: <L0> [11.11%], case 1: <L1> [11.11%], case 2: <L2> [11.11%], case 3: <L3> [11.11%], case 4: <L4> [11.11%], case 5: <L5> [11.11%], case 6: <L6> [11.11%], case 7: <L7> [11.11%]>
|
|
|
|
<bb 3> [local count: 119292717]:
|
|
<L0>:
|
|
# DEBUG BEGIN_STMT
|
|
_1 = &pBase_75(D)->CWSELRPI[0];
|
|
_2 = u32RegisterNumber_76(D) * 4;
|
|
_3 = _1 + _2;
|
|
_4 ={v} MEM[(volatile uint32 *)_3];
|
|
_5 = _4 & 4294967292;
|
|
MEM[(volatile uint32 *)_3] ={v} _5;
|
|
# DEBUG BEGIN_STMT
|
|
_6 ={v} MEM[(volatile uint32 *)_3];
|
|
_7 = u32Value_78(D) & 3;
|
|
_8 = _6 | _7;
|
|
MEM[(volatile uint32 *)_3] ={v} _8;
|
|
# DEBUG BEGIN_STMT
|
|
goto <bb 11>; [100.00%]
|
|
|
|
<bb 4> [local count: 119292717]:
|
|
<L1>:
|
|
# DEBUG BEGIN_STMT
|
|
_9 = &pBase_75(D)->CWSELRPI[0];
|
|
_10 = u32RegisterNumber_76(D) * 4;
|
|
_11 = _9 + _10;
|
|
_12 ={v} MEM[(volatile uint32 *)_11];
|
|
_13 = _12 & 4294967247;
|
|
MEM[(volatile uint32 *)_11] ={v} _13;
|
|
# DEBUG BEGIN_STMT
|
|
_14 ={v} MEM[(volatile uint32 *)_11];
|
|
_15 = u32Value_78(D) << 4;
|
|
_16 = _15 & 48;
|
|
_17 = _14 | _16;
|
|
MEM[(volatile uint32 *)_11] ={v} _17;
|
|
# DEBUG BEGIN_STMT
|
|
goto <bb 11>; [100.00%]
|
|
|
|
<bb 5> [local count: 119292717]:
|
|
<L2>:
|
|
# DEBUG BEGIN_STMT
|
|
_18 = &pBase_75(D)->CWSELRPI[0];
|
|
_19 = u32RegisterNumber_76(D) * 4;
|
|
_20 = _18 + _19;
|
|
_21 ={v} MEM[(volatile uint32 *)_20];
|
|
_22 = _21 & 4294966527;
|
|
MEM[(volatile uint32 *)_20] ={v} _22;
|
|
# DEBUG BEGIN_STMT
|
|
_23 ={v} MEM[(volatile uint32 *)_20];
|
|
_24 = u32Value_78(D) << 8;
|
|
_25 = _24 & 768;
|
|
_26 = _23 | _25;
|
|
MEM[(volatile uint32 *)_20] ={v} _26;
|
|
# DEBUG BEGIN_STMT
|
|
goto <bb 11>; [100.00%]
|
|
|
|
<bb 6> [local count: 119292717]:
|
|
<L3>:
|
|
# DEBUG BEGIN_STMT
|
|
_27 = &pBase_75(D)->CWSELRPI[0];
|
|
_28 = u32RegisterNumber_76(D) * 4;
|
|
_29 = _27 + _28;
|
|
_30 ={v} MEM[(volatile uint32 *)_29];
|
|
_31 = _30 & 4294955007;
|
|
MEM[(volatile uint32 *)_29] ={v} _31;
|
|
# DEBUG BEGIN_STMT
|
|
_32 ={v} MEM[(volatile uint32 *)_29];
|
|
_33 = u32Value_78(D) << 12;
|
|
_34 = _33 & 12288;
|
|
_35 = _32 | _34;
|
|
MEM[(volatile uint32 *)_29] ={v} _35;
|
|
# DEBUG BEGIN_STMT
|
|
goto <bb 11>; [100.00%]
|
|
|
|
<bb 7> [local count: 119292717]:
|
|
<L4>:
|
|
# DEBUG BEGIN_STMT
|
|
_36 = &pBase_75(D)->CWSELRPI[0];
|
|
_37 = u32RegisterNumber_76(D) * 4;
|
|
_38 = _36 + _37;
|
|
_39 ={v} MEM[(volatile uint32 *)_38];
|
|
_40 = _39 & 4294770687;
|
|
MEM[(volatile uint32 *)_38] ={v} _40;
|
|
# DEBUG BEGIN_STMT
|
|
_41 ={v} MEM[(volatile uint32 *)_38];
|
|
_42 = u32Value_78(D) << 16;
|
|
_43 = _42 & 196608;
|
|
_44 = _41 | _43;
|
|
MEM[(volatile uint32 *)_38] ={v} _44;
|
|
# DEBUG BEGIN_STMT
|
|
goto <bb 11>; [100.00%]
|
|
|
|
<bb 8> [local count: 119292717]:
|
|
<L5>:
|
|
# DEBUG BEGIN_STMT
|
|
_45 = &pBase_75(D)->CWSELRPI[0];
|
|
_46 = u32RegisterNumber_76(D) * 4;
|
|
_47 = _45 + _46;
|
|
_48 ={v} MEM[(volatile uint32 *)_47];
|
|
_49 = _48 & 4291821567;
|
|
MEM[(volatile uint32 *)_47] ={v} _49;
|
|
# DEBUG BEGIN_STMT
|
|
_50 ={v} MEM[(volatile uint32 *)_47];
|
|
_51 = u32Value_78(D) << 20;
|
|
_52 = _51 & 3145728;
|
|
_53 = _50 | _52;
|
|
MEM[(volatile uint32 *)_47] ={v} _53;
|
|
# DEBUG BEGIN_STMT
|
|
goto <bb 11>; [100.00%]
|
|
|
|
<bb 9> [local count: 119292717]:
|
|
<L6>:
|
|
# DEBUG BEGIN_STMT
|
|
_54 = &pBase_75(D)->CWSELRPI[0];
|
|
_55 = u32RegisterNumber_76(D) * 4;
|
|
_56 = _54 + _55;
|
|
_57 ={v} MEM[(volatile uint32 *)_56];
|
|
_58 = _57 & 4244635647;
|
|
MEM[(volatile uint32 *)_56] ={v} _58;
|
|
# DEBUG BEGIN_STMT
|
|
_59 ={v} MEM[(volatile uint32 *)_56];
|
|
_60 = u32Value_78(D) << 24;
|
|
_61 = _60 & 50331648;
|
|
_62 = _59 | _61;
|
|
MEM[(volatile uint32 *)_56] ={v} _62;
|
|
# DEBUG BEGIN_STMT
|
|
goto <bb 11>; [100.00%]
|
|
|
|
<bb 10> [local count: 119292717]:
|
|
<L7>:
|
|
# DEBUG BEGIN_STMT
|
|
_63 = &pBase_75(D)->CWSELRPI[0];
|
|
_64 = u32RegisterNumber_76(D) * 4;
|
|
_65 = _63 + _64;
|
|
_66 ={v} MEM[(volatile uint32 *)_65];
|
|
_67 = _66 & 3489660927;
|
|
MEM[(volatile uint32 *)_65] ={v} _67;
|
|
# DEBUG BEGIN_STMT
|
|
_68 ={v} MEM[(volatile uint32 *)_65];
|
|
_69 = u32Value_78(D) << 28;
|
|
_70 = _69 & 805306368;
|
|
_71 = _68 | _70;
|
|
MEM[(volatile uint32 *)_65] ={v} _71;
|
|
# DEBUG BEGIN_STMT
|
|
|
|
<bb 11> [local count: 1073634452]:
|
|
<L10>:
|
|
return;
|
|
|
|
}
|
|
|
|
|