#ifndef __def_uds__ #define __def_uds__ #define ENABLE_UART #define SECURITY_MASK_L1 0x6C6C6969 //------------------------------------------------------------------ #define EEP_V_SIGN 1008 // TABLE //------------------------------------------------------------------ #define USE_PLLAB_TABLE #define MAX_UDS_IO_PARM 64 #define PROGRAM_IS_EXTENDED // #ifdef PROGRAM_IS_EXTENDED #define is_program_session(n) ((n==2) || (n==3)) #else #define is_program_session(n) (n==2) #endif enum { BT_START, BT_ERASE, BT_PROGRAM, BT_PROGRAM_FINISH, BT_END }; enum { NCH_PCAN, NCH_PCAN_SUB, NCH_END }; #define MAX_UDS_DATA_BUF 64u #define MAX_DTC 64 /*100*/ #define MAX_DTC_SEND 200 #define MAX_DTC_ITEM 18 #define APP_SIGN 0x55AA1234ul #define ID_UDS_TX 0x7D8 // #define ID_UDS_RX 0x7D0 // #define ID_UDS_TP 0x7DF // //#define ID_UDS_TX 0x18DAF940u //#define ID_UDS_RX 0x18DA40F9u //#define ID_UDS_TP 0x18DBFFF9u #define ID_FUCTIONAL_REQ ID_UDS_TP #define MB_UDS_TX 24 #define MB_UDS_RX 25 #define MB_FUCTIONAL_REQ 26 #define BOOTVERSION_ADDRESS 0x401020ul #define SHADOWRAM 0x20000000u // int_sram_shareable #define SHADOWRAM2 0x20443FF0U #define SHADOW_JMP_APP 0x5A5A1234 #define SHADOW_BOOT 0x3DCA5471 #ifdef PROGRAM_IS_EXTENDED #define is_program_session(n) ((n==2) || (n==3)) #else #define is_program_session(n) (n==2) #endif #define is_externded_session(n) (n==3) #define MSG_BUF_SIZE 4 /* Msg Buffer Size. (CAN 2.0AB: 2 hdr + 2 data= 4 words) */ #define V_c_wait_flowcontrol_10ms 11U // 110MS typedef void(* APPFn)(void); #define DownLoadID uds.rx_id #define UpLoadID uds.tx_id #define CONSECUTIVE_FLOW_CONTROL_COUNT 0U #define STMIN 0U //Tx_Message_Offset enum { OPI11, // 0.OPI11 = Object_ID_64 DIAG_RESP, // 1.DIAG_RESP = Object_ID_65 P_CAN_TOTAL_TX_MSG };//End of Tx_Message_Offset #define UDS_DID_VERSION 0XF187u // #define UDS_SID_VERSION 0XF500u // #define UDS_Download_block_length 0x42u; #define UDS_DID_F100 0xF100u #define UDS_DID_RES_OFFSET 0x2100u #define UDS_DID_F000 0xF000u #define UDS_DID_F190 0xF190u #define UDS_DID_87 0xF187u #define UDS_DID_97 0xF197u #define UDS_DID_8A 0xF18Au #define UDS_DID_93 0xF193u #define UDS_DID_95 0xF195u #define UDS_DID_00 0xF100u #define UDS_DID_99 0xF199u // ==================== UDS ON CAN DEFINE enum { UDS_WTYPE_1_DATA=0x0Du, UDS_WTYPE_TABLE_CONTROL, UDS_WTYPE_TABLE_WRITE }; enum { UDS_VER_REQ_APP, UDS_VER_REQ_HW, UDS_VER_REPAIRSHOP, UDS_VER_DATE, UDS_VER_REQ_BOOT, UDS_VER_END }; #define UDS_CONTROL_IDLE 0u #define UDS_TABLE_CONTROL_RAM_TO_FLASH 1u #define UDS_TABLE_CONTROL_FLASH_TO_RAM 2u #define UDS_TABLE_CONTROL_DEFULT 255u #define UDS_TIME_OUT 501u // * 10msec #define NTABLE_VERSION 0x500u #define NTABLE_MAX 29u #define NTABLE_MAX_WRITE 4u #define NTABLE_VERSION 0x500u #define NTABLE_ReadMemoryByAddress 1u #define NTABLE_WriteMemoryByAddress 2u #define NTABLE_nputOutputControlByIdentifier 3u #define NTABLE_DynamicallyDefineDataIdentifie 4u #define NTABLE_ReadDataByPeriodicIdentifier 5u #define NTABLE_DTC_CODE 1U // ============================== eeprom address #define ADD_SIGN 0 #define ADD_CS 4 #define ADD_SIZE_OF_SETUP 8 #define EEP_ADD_TEST 12 #define ADD_BPSIGN 16 #define ADD_BPCS 20 #define EEPADD_DTC_0 0x100 #define EEPADD_DTC_OLD_0 0x110 #define EEPADD_DTC_1 0x120 #define EEPADD_DTC_OLD_1 0x130 #define EEPADD_DTC_NEW 0x140 #define EEPADD_CHK_OFFSET 10 //----------------------------------------------- typedef struct _can_rx { uint32_t id; uint16_t ms,cms; uint8_t buf[64]; uint8_t length; uint8_t xreq_send; uint8_t extended; }can_rx_; typedef struct _T_UDS { can_rx_ rx; can_rx_ tx; uint8_t x2ms; uint8_t c_10ms; uint8_t c_1000ms; uint8_t tempo_10ms; uint16_t c_test; uint8_t avoid_empty; uint8_t mb,ubuf[8],ireq; // interrupt o????? ???, uint32_t rx_id; uint32_t tx_id; uint16_t ndata; uint32_t start_address; uint16_t ndata_pre_packet; uint16_t timeout; uint16_t c_dtc_change; uint8_t monitor_mode; uint8_t flow_control_ms,c_flow_control_ms; uint8_t wait_flowcontrol; uint8_t c_wait_flowcontrol_10ms; uint8_t c_wait_cf_10ms; // ================ ??????? command in. =============================== uint8_t dsc; // ================ ??????? command in. =============================== //10 : 0D 31 1 FF 0 44 0 routine control 1=sub fuction // erase memory 0xFF00=erase memory //21 : 3 14 0 0 0 CC 0 add=031400,size=00cc00 44=length formater uint16_t p_data,tx_len; // send or receve until p_data = len set at first frame uint8_t sid; uint8_t subfuction; uint16_t identifier; uint8_t length_formmater; uint32_t address; uint32_t size; // ======================================================================= uint32_t old_crc32,crc32; // crc check transfrt data uint8_t data[MAX_UDS_DATA_BUF+10]; uint8_t req_io_control; // uint8_t io_control_parameter[MAX_UDS_IO_PARM+10]; uint8_t io_control_parameter_len; // uint16_t io_control_did; // uint8_t io_control_parm; // uint8_t req_session; // uint8_t session_id; // uint8_t cmd,rt; uint8_t seq; uint16_t frame_len; uint16_t ntable; uint16_t ntable_did; // ???? table uint8_t table_control; uint8_t table_write_to; uint8_t table_seq; uint8_t consecutive_rx_num; // 21..22 uint8_t data_send_seq; uint8_t write_data_type; uint8_t write_data[4]; uint8_t * pdata_wr; uint8_t * pdata_rd; uint8_t response_to_negetive; // uint8_t req_dtc_1st_frame; uint8_t dtc_type,dtc_mask; uint8_t xreq_dtc_clear; uint8_t xreq_eep_write_did; // did f100 ??? ????write uint8_t xreq_table_snap_short_write; uint8_t bootloader_update; uint8_t session_mode; // force sleep uint8_t session; uint8_t seed[4]; // uint32_t key; // uint32_t data_key1; // uint32_t data_key2; // uint32_t data_key3; // uint32_t data_key4; // uint8_t program_type; // 0=program.1=data uint8_t wait_key; uint8_t r_seed; // uint8_t ReadDataByPeriodicIdentifier_10ms,c_ReadDataByPeriodicIdentifier_10ms; uint16_t c_inhibut_10ms; uint8_t init; uint8_t XUPDTE_FLASH,XREQ_UDS_RESET,XREQ_RESET,XINIT_TABLE; uint8_t c_log_send; uint8_t eep_status; uint8_t rom_access_level; uint32_t group_of_dtc; uint8_t dtc_check_inhibit; // 85 dtc check off uint8_t length; uint8_t nrc; // negative res code uint8_t next_con_seq; uint8_t con_seq; uint8_t con_seq_error; uint8_t req_parameter_write_to_dataflash; uint8_t consecutive_length_fail; // ??????? nak uint8_t disable_rx_tx; // 6.4 CommunicationControl uint8_t can_length; uint8_t extended; uint32_t can_id; uint16_t c_timeout_session_10ms; uint8_t force_boot; uint8_t can_ch,can_ch_fixed; uint8_t print; uint8_t c_dtc_event; uint16_t c_monitor_inhibit_10ms; // uint8_t serial_tx[MAX_UDS_SERIAL_TX+2]; // // uint16_t pserial_tx_send,pserial_tx_write; uint8_t c_monitor_can; // uint8_t seq_map_download; }T_UDS_; //----------------------------------------------- typedef struct _flash { uint16_t ndata; // FlashDataCounter uint32_t address; uint32_t start_address; uint16_t ndata_pre_packet; uint16_t p_data; uint8_t data[MAX_UDS_DATA_BUF+10]; uint8_t cmd,rt; uint8_t seq; uint16_t frame_len; uint16_t checksum_tx; uint16_t checksum_rx; uint16_t block_checksum; // transfrt exit ?? ??. uint8_t STATE; uint8_t program_fail; uint8_t check_fw_version_correct; // "EPT" FOUND uint8_t verify_fail; uint16_t checksum; uint8_t checksum_ok; uint8_t vector[4]; // ========================================= uint8_t opcode; uint32_t addr; uint32_t start_addr,end_addr; uint8_t buf[10]; }flash_; typedef struct _DTC_Items_Type { // ===================================== c[0] uint32_t lv : 1; // msb uint32_t hv : 1; uint32_t can_l : 1; uint32_t can_l_busoff : 1; uint32_t can_r : 1; uint32_t can_r_busoff : 1; uint32_t can_ecu : 1; uint32_t can_ecu_busoff : 1; // lsb // ===================================== c[1] uint32_t d1_oc : 1; uint32_t d1_open_short : 1; uint32_t d1_g_vcc : 1; uint32_t d2_oc : 1; uint32_t d2_open_short : 1; uint32_t d2_g_vcc : 1; uint32_t d3_oc : 1; uint32_t d3_open_short : 1; // ===================================== c[2] uint32_t d3_g_vcc : 1; uint32_t d4_oc : 1; uint32_t d4_open_short : 1; uint32_t d4_g_vcc : 1; uint32_t d5_oc : 1; uint32_t d5_open_short : 1; uint32_t d5_g_vcc : 1; uint32_t d6_oc : 1; // ===================================== c[3] uint32_t d6_open_short : 1; uint32_t d6_g_vcc : 1; uint32_t : 1; uint32_t : 1; uint32_t : 1; uint32_t : 1; uint32_t : 1; uint32_t : 1; // ===================================== c[4] uint32_t : 1; uint32_t : 1; uint32_t : 1; uint32_t : 1; uint32_t : 1; uint32_t : 1; uint32_t : 1; uint32_t : 1; // ===================================== c[5] uint32_t : 1; uint32_t : 1; uint32_t : 1; uint32_t : 1; uint32_t : 1; uint32_t : 1; uint32_t : 1; uint32_t : 1; // ===================================== c[6] uint32_t : 1; uint32_t : 1; uint32_t : 1; uint32_t : 1; uint32_t : 1; uint32_t : 1; uint32_t : 1; uint32_t : 1; // ===================================== c[7] uint32_t : 1; uint32_t : 1; uint32_t : 1; uint32_t : 1; uint32_t : 1; uint32_t : 1; uint32_t : 1; uint32_t : 1; }_DTC_Items_T_; typedef union _c_DTC_bufTag { uint8_t _c[8]; _DTC_Items_T_ f; } _DTC_Items_Type_; enum { NCOM_TYPE_NORMAL=1, NCOM_TYPE_NM, NCOM_TYPE_ALL, NCOM_TYPE_END }; /* ======================================= ====================================== */ #define SID_DiagnosticSessionControl 0x10 #define SID_ECUReset 0x11 #define SID_SecurityAccess 0x27 #define SID_CommunicationControl 0x28 #define SID_EnableNormalMessageTransmission 0x29 #define SID_TesterPresent 0x3E #define SID_ControlDTCSetting 0x85 #define SID_ReadDataByIdentifier 0x22 #define SID_ReadScalingDataByIdentifier 0x24 #define SID_WriteDataByIdentifier 0x2E #define SID_ReadDTCInformation 0x19 #define SID_ClearDiagnosticInformation 0x14 #define SID_RoutineControl 0x31 #define SID_RequestDownload 0x34 #define SID_TransferData 0x36 #define SID_RequestTransferExit 0x37 #define SID_ReadMemoryByAddress 0x23u #define SID_WriteMemoryByAddress 0x3Du #define SID_InputOutputControlByIdentifier 0x2Fu #define SID_DynamicallyDefineDataIdentifie 0x2Cu #define SID_ReadDataByPeriodicIdentifier 0x2au #define SID_StopDiagnosticSession 0x20u #define SID_Other 0xff; // ========================== ERROR #define UDS_NAK 0x7Fu #define UDS_NRC_LEN 0x13u // incorrectMessageLength #define UDS_NRC_subFunctionNotSupported 0x12u // subFunctionNotSupported #define UDS_NRC_OUTOFRANGE 0x31u // #define UDS_NRC_securityAccessDenied 0x33u // securityAccessDenied #define UDS_NRC_serviceNotSupport 0x11u // #define UDS_NRC_requestSequenceError 0x24u // #define UDS_NRC_invalidKey 0x35u // #define UDS_NRC_subFunctionNotSupportedInActiveSession 0x7eu // #define UDS_NRC_serviceNotSupportedInActiveSession 0x7Fu // #define UDS_NRC_transferDataSuspended 0x71U #define UDS_NRC_generalProgrammingFailure 0x72U #define UDS_NRC_wrongBlockSequenceCounter 0x73U #define UDS_NRC_requestCorrectlyReceived_ResponsePending 0x78U #define UDS_NRC_conditionsNotCorrect 0x22U #define UDS_NRC_busyRepeatReques 0x21U #define UDS_NRC_generalReject 0x10U #define is_noresponse(n) (n&0x80) #define is_response_supressed ((uds.rx.buf[2]&0x80)==0x80) #define NSESSION_DEFAULT 1u #define NSESSION_PROGRAMMING 2u #define NSESSION_EXTENDED_DIAGNOSTIC 3u #define V_TIMEOUT_SESSION_10MS 500u #define is_session_default (uds.session<=NSESSION_DEFAULT) #define is_session_extended_diagnostic (uds.session==NSESSION_EXTENDED_DIAGNOSTIC) #define is_session_program (uds.session==NSESSION_PROGRAMMING) #define is_serial (uds.rx.buf[0]==0) #define is_single_frame ((uds.rx.buf[0] & 0xF0)==0) #define is_first_frame ((uds.rx.buf[0] & 0xF0)==0x10) #define is_consecutive_frame ((uds.rx.buf[0] & 0xF0)==0x20) #define is_flow_control ((uds.rx.buf[0] & 0xF0)==0x30) #define is_flow_control_abort_cons (uds.rx.buf[0]>=0x32) #define is_flow_control_wait (uds.rx.buf[0]==0x31) #define is_sel_all_clear (uds.rx.buf[7]==1) #define is_sel_set (uds.rx.buf[7]==0) #define is_sel_clear (uds.rx.buf[7]==2) #define is_program_fail_nak (0) enum { TT_U8=0, // unsigned char TT_S8, // signed char TT_U16, // unsigned short TT_S16, // signed short TT_U32, // unsigned int (32bit) TT_S32, // signed int (32bit) TT_F32, // signed float (32bit) TT_X // STRING (8bit) }; #define UDS_GroupOfDTC_POWER_TRAIN 0x0000FF // Powertrain Group #define UDS_GroupOfDTC_CHASSIS 0x4000FF // CHASSIS group #define UDS_GroupOfDTC_ALL 0xFFFFFF //ALL #define is_extendedmode_unlock ((uds.session==NSESSION_EXTENDED_DIAGNOSTIC) && (uds.rom_access_level==1)) #ifndef TRUE #define TRUE 1 #endif #ifndef FALSE #define FALSE 0 #endif #ifndef SUCCESS #define SUCCESS 1 #endif #ifndef FAILED #define FAILED -1 #endif #ifndef ON #define ON 1 #endif #ifndef OFF #define OFF 0 #endif #endif