| 1 | /* |
| 2 | * File: ADM_Integrated_Logic.c |
| 3 | * |
| 4 | * Code generated for Simulink model 'ADM_Integrated_Logic'. |
| 5 | * |
| 6 | * Model version : 7.13 |
| 7 | * Simulink Coder version : 9.5 (R2021a) 14-Nov-2020 |
| 8 | * C/C++ source code generated on : Wed Jul 16 16:53:18 2025 |
| 9 | * |
| 10 | * Target selection: ert.tlc |
| 11 | * Embedded hardware selection: NXP->Cortex-M4 |
| 12 | * Code generation objectives: |
| 13 | * 1. Execution efficiency |
| 14 | * 2. RAM efficiency |
| 15 | * 3. Debugging |
| 16 | * Validation result: Not run |
| 17 | */ |
| 18 | |
| 19 | #include "ADM_Integrated_Logic.h" |
| 20 | |
| 21 | /* Named constants for Chart: '<S8>/Chart' */ |
| 22 | #define IN_HAC_OFF ((uint8_T)1U) |
| 23 | #define IN_HAC_ON ((uint8_T)2U) |
| 24 | |
| 25 | /* Block signals and states (default storage) */ |
| 26 | DW_ADM_Integrated_Logic_T ADM_Integrated_Logic_DW; |
| 27 | |
| 28 | /* External inputs (root inport signals with default storage) */ |
| 29 | ExtU_ADM_Integrated_Logic_T ADM_Integrated_Logic_U; |
| 30 | |
| 31 | /* External outputs (root outports fed by signals with default storage) */ |
| 32 | ExtY_ADM_Integrated_Logic_T ADM_Integrated_Logic_Y; |
| 33 | |
| 34 | /* Real-time model */ |
| 35 | static RT_MODEL_ADM_Integrated_Logic_T ADM_Integrated_Logic_M_; |
| 36 | RT_MODEL_ADM_Integrated_Logic_T *const ADM_Integrated_Logic_M = |
| 37 | &ADM_Integrated_Logic_M_; |
| 38 | static void ADM_Integrated_Lo_Calculate_F_c(real_T rtu_W, real_T rtu_theta, |
| 39 | real_T *rty_F_c); |
| 40 | static void ADM_Integrated__MATLABFunction1(real_T rtu_u, real_T *rty_y); |
| 41 | static void ADM_Integrated__MATLABFunction2(real_T rtu_u, real_T *rty_y); |
| 42 | |
| 43 | /* |
| 44 | * Output and update for atomic system: |
| 45 | * '<S43>/Calculate_F_c' |
| 46 | * '<S43>/Calculate_F_c1' |
| 47 | */ |
| 48 | static void ADM_Integrated_Lo_Calculate_F_c(real_T rtu_W, real_T rtu_theta, |
| 49 | real_T *rty_F_c) |
| 50 | { |
| 51 | *rty_F_c = rtu_W * sin(rtu_theta); |
| 52 | } |
| 53 | |
| 54 | /* |
| 55 | * Output and update for atomic system: |
| 56 | * '<S1>/MATLAB Function1' |
| 57 | * '<S1>/MATLAB Function5' |
| 58 | */ |
| 59 | static void ADM_Integrated__MATLABFunction1(real_T rtu_u, real_T *rty_y) |
| 60 | { |
| 61 | *rty_y = rtu_u; |
| 62 | if (rtu_u < 140.0) { |
| 63 | *rty_y = 140.0; |
| 64 | } |
| 65 | } |
| 66 | |
| 67 | /* |
| 68 | * Output and update for atomic system: |
| 69 | * '<S1>/MATLAB Function2' |
| 70 | * '<S1>/MATLAB Function6' |
| 71 | */ |
| 72 | static void ADM_Integrated__MATLABFunction2(real_T rtu_u, real_T *rty_y) |
| 73 | { |
| 74 | *rty_y = rtu_u; |
| 75 | if (rtu_u > -140.0) { |
| 76 | *rty_y = -140.0; |
| 77 | } |
| 78 | } |
| 79 | |
| 80 | /* Model step function */ |
| 81 | void ADM_Integrated_Logic_step(void) |
| 82 | { |
| 83 | real_T rtb_Add1; |
| 84 | real_T rtb_Add3; |
| 85 | real_T rtb_Add_e; |
| 86 | real_T rtb_Brake_Saturation; |
| 87 | real_T rtb_Brake_Torque_Cmd; |
| 88 | real_T rtb_Error_b; |
| 89 | real_T rtb_Error_m; |
| 90 | real_T rtb_Gain_c; |
| 91 | real_T rtb_Integrator_1; |
| 92 | real_T rtb_Memory; |
| 93 | real_T rtb_Product1_ee; |
| 94 | real_T rtb_Product1_h; |
| 95 | real_T rtb_Product1_j; |
| 96 | real_T rtb_Product1_kq; |
| 97 | real_T rtb_Product1_m; |
| 98 | real_T rtb_Sum1_aj; |
| 99 | real_T rtb_Sum1_i2; |
| 100 | real_T rtb_Sum1_lm; |
| 101 | real_T rtb_Sum1_o1; |
| 102 | real_T rtb_Sum1_p; |
| 103 | real_T rtb_Switch2; |
| 104 | real_T rtb_TargetSpd_RateLimiter; |
| 105 | real_T rtb_Target_RPM; |
| 106 | real_T rtb_UkYk1; |
| 107 | real_T rtb_UkYk1_a; |
| 108 | real_T rtb_Vx_Cmd_R; |
| 109 | real_T rtb_Yk1_e; |
| 110 | real_T rtb_deltafalllimit_m; |
| 111 | real_T rtb_y; |
| 112 | real_T rtb_y_n; |
| 113 | int32_T rtb_Memory_0; |
| 114 | boolean_T rtb_Compare; |
| 115 | boolean_T rtb_Compare_d; |
| 116 | |
| 117 | /* RelationalOperator: '<S3>/Compare' incorporates: |
| 118 | * Constant: '<S3>/Constant' |
| 119 | * Inport: '<Root>/GV_Operation_Mode' |
| 120 | */ |
| 121 | rtb_Compare = (ADM_Integrated_Logic_U.GV_Operation_Mode == 2.0); |
| 122 | |
| 123 | /* MATLAB Function: '<S18>/Vx_OutPut_Function' incorporates: |
| 124 | * Constant: '<S58>/Constant' |
| 125 | * Inport: '<Root>/GV_BrakeTorqueCommand' |
| 126 | * Inport: '<Root>/GV_Vx_Command' |
| 127 | * Inport: '<Root>/GV_Vx_Limit' |
| 128 | * RelationalOperator: '<S58>/Compare' |
| 129 | */ |
| 130 | if (!(ADM_Integrated_Logic_U.GV_BrakeTorqueCommand >= 50.0)) { |
| 131 | if (ADM_Integrated_Logic_U.GV_Vx_Limit <= |
| 132 | ADM_Integrated_Logic_U.GV_Vx_Command) { |
| 133 | rtb_TargetSpd_RateLimiter = ADM_Integrated_Logic_U.GV_Vx_Limit; |
| 134 | } else { |
| 135 | rtb_TargetSpd_RateLimiter = ADM_Integrated_Logic_U.GV_Vx_Command; |
| 136 | } |
| 137 | } else { |
| 138 | rtb_TargetSpd_RateLimiter = 0.0; |
| 139 | } |
| 140 | |
| 141 | /* End of MATLAB Function: '<S18>/Vx_OutPut_Function' */ |
| 142 | |
| 143 | /* Product: '<S18>/Product' incorporates: |
| 144 | * Switch: '<S18>/Switch' |
| 145 | */ |
| 146 | rtb_y_n = rtb_TargetSpd_RateLimiter * (real_T)!rtb_Compare; |
| 147 | |
| 148 | /* RateLimiter: '<S18>/Input_Vx_RateLimiter' */ |
| 149 | rtb_TargetSpd_RateLimiter = rtb_y_n - ADM_Integrated_Logic_DW.PrevY; |
| 150 | if (rtb_TargetSpd_RateLimiter > 0.004) { |
| 151 | rtb_Vx_Cmd_R = ADM_Integrated_Logic_DW.PrevY + 0.004; |
| 152 | } else if (rtb_TargetSpd_RateLimiter < -0.008) { |
| 153 | rtb_Vx_Cmd_R = ADM_Integrated_Logic_DW.PrevY + -0.008; |
| 154 | } else { |
| 155 | rtb_Vx_Cmd_R = rtb_y_n; |
| 156 | } |
| 157 | |
| 158 | ADM_Integrated_Logic_DW.PrevY = rtb_Vx_Cmd_R; |
| 159 | |
| 160 | /* End of RateLimiter: '<S18>/Input_Vx_RateLimiter' */ |
| 161 | |
| 162 | /* RelationalOperator: '<S39>/Compare' incorporates: |
| 163 | * Constant: '<S39>/Constant' |
| 164 | * Inport: '<Root>/GV_BrakeTorqueCommand' |
| 165 | */ |
| 166 | rtb_Compare_d = (ADM_Integrated_Logic_U.GV_BrakeTorqueCommand >= 100.0); |
| 167 | |
| 168 | /* Delay: '<S7>/Memory' */ |
| 169 | rtb_Memory = ADM_Integrated_Logic_DW.Memory_DSTATE; |
| 170 | |
| 171 | /* MATLAB Function: '<S7>/Gear_FUNCTION1' incorporates: |
| 172 | * Inport: '<Root>/GV_VCU_GearSelStat' |
| 173 | * Inport: '<Root>/GV_Vx_Fbk' |
| 174 | */ |
| 175 | if (ADM_Integrated_Logic_U.GV_VCU_GearSelStat == 0.0) { |
| 176 | if ((ADM_Integrated_Logic_U.GV_Vx_Fbk <= 0.0) && rtb_Compare_d) { |
| 177 | rtb_Memory = 0.0; |
| 178 | } |
| 179 | } else { |
| 180 | switch ((int32_T)rtb_Memory) { |
| 181 | case 0: |
| 182 | if ((ADM_Integrated_Logic_U.GV_Vx_Fbk <= 0.0) && |
| 183 | ((ADM_Integrated_Logic_U.GV_VCU_GearSelStat == 1.0) || |
| 184 | (ADM_Integrated_Logic_U.GV_VCU_GearSelStat == 3.0) || |
| 185 | (ADM_Integrated_Logic_U.GV_VCU_GearSelStat == 2.0))) { |
| 186 | rtb_Memory = 2.0; |
| 187 | } |
| 188 | break; |
| 189 | |
| 190 | case 1: |
| 191 | if (ADM_Integrated_Logic_U.GV_VCU_GearSelStat == 2.0) { |
| 192 | rtb_Memory = 2.0; |
| 193 | } |
| 194 | break; |
| 195 | |
| 196 | case 2: |
| 197 | if ((ADM_Integrated_Logic_U.GV_Vx_Fbk <= 0.0) && rtb_Compare_d) { |
| 198 | if (ADM_Integrated_Logic_U.GV_VCU_GearSelStat == 1.0) { |
| 199 | rtb_Memory = 1.0; |
| 200 | } else if (ADM_Integrated_Logic_U.GV_VCU_GearSelStat == 3.0) { |
| 201 | rtb_Memory = 3.0; |
| 202 | } |
| 203 | } |
| 204 | break; |
| 205 | |
| 206 | case 3: |
| 207 | if (ADM_Integrated_Logic_U.GV_VCU_GearSelStat == 2.0) { |
| 208 | rtb_Memory = 2.0; |
| 209 | } |
| 210 | break; |
| 211 | } |
| 212 | } |
| 213 | |
| 214 | /* End of MATLAB Function: '<S7>/Gear_FUNCTION1' */ |
| 215 | |
| 216 | /* Chart: '<S8>/Chart' incorporates: |
| 217 | * Constant: '<S8>/Constant' |
| 218 | * Constant: '<S8>/Constant1' |
| 219 | * Inport: '<Root>/GV_MCU_RPM' |
| 220 | */ |
| 221 | if (ADM_Integrated_Logic_DW.is_active_c6_ADM_Integrated_Log == 0U) { |
| 222 | ADM_Integrated_Logic_DW.is_active_c6_ADM_Integrated_Log = 1U; |
| 223 | ADM_Integrated_Logic_DW.is_c6_ADM_Integrated_Logic = IN_HAC_OFF; |
| 224 | } else if (ADM_Integrated_Logic_DW.is_c6_ADM_Integrated_Logic == 1) { |
| 225 | if (ADM_Integrated_Logic_U.GV_MCU_RPM < -50.0) { |
| 226 | ADM_Integrated_Logic_DW.is_c6_ADM_Integrated_Logic = IN_HAC_ON; |
| 227 | } else { |
| 228 | /* Outport: '<Root>/Debug_HAC_RPM_Decision' */ |
| 229 | ADM_Integrated_Logic_Y.Debug_HAC_RPM_Decision = 0.0; |
| 230 | } |
| 231 | |
| 232 | /* case IN_HAC_ON: */ |
| 233 | } else if (ADM_Integrated_Logic_U.GV_MCU_RPM > 150.0) { |
| 234 | ADM_Integrated_Logic_DW.is_c6_ADM_Integrated_Logic = IN_HAC_OFF; |
| 235 | } else { |
| 236 | /* Outport: '<Root>/Debug_HAC_RPM_Decision' */ |
| 237 | ADM_Integrated_Logic_Y.Debug_HAC_RPM_Decision = 1.0; |
| 238 | } |
| 239 | |
| 240 | /* End of Chart: '<S8>/Chart' */ |
| 241 | |
| 242 | /* Product: '<S49>/delta rise limit' incorporates: |
| 243 | * Constant: '<S8>/Upper_Torq' |
| 244 | * SampleTimeMath: '<S49>/sample time' |
| 245 | * |
| 246 | * About '<S49>/sample time': |
| 247 | * y = K where K = ( w * Ts ) |
| 248 | */ |
| 249 | rtb_y_n = 0.016; |
| 250 | |
| 251 | /* UnitDelay: '<S50>/Delay Input2' |
| 252 | * |
| 253 | * Block description for '<S50>/Delay Input2': |
| 254 | * |
| 255 | * Store in Global RAM |
| 256 | */ |
| 257 | rtb_Yk1_e = ADM_Integrated_Logic_DW.DelayInput2_DSTATE_m; |
| 258 | |
| 259 | /* Product: '<S50>/delta rise limit' incorporates: |
| 260 | * SampleTimeMath: '<S50>/sample time' |
| 261 | * |
| 262 | * About '<S50>/sample time': |
| 263 | * y = K where K = ( w * Ts ) |
| 264 | */ |
| 265 | rtb_Integrator_1 = 0.002; |
| 266 | |
| 267 | /* Saturate: '<S8>/Pitch_Saturation' incorporates: |
| 268 | * DiscreteIntegrator: '<S8>/Integrator_2' |
| 269 | */ |
| 270 | if (ADM_Integrated_Logic_DW.Integrator_2_DSTATE > 10.0) { |
| 271 | rtb_TargetSpd_RateLimiter = 10.0; |
| 272 | } else if (ADM_Integrated_Logic_DW.Integrator_2_DSTATE < -10.0) { |
| 273 | rtb_TargetSpd_RateLimiter = -10.0; |
| 274 | } else { |
| 275 | rtb_TargetSpd_RateLimiter = ADM_Integrated_Logic_DW.Integrator_2_DSTATE; |
| 276 | } |
| 277 | |
| 278 | /* End of Saturate: '<S8>/Pitch_Saturation' */ |
| 279 | |
| 280 | /* Sum: '<S50>/Difference Inputs1' |
| 281 | * |
| 282 | * Block description for '<S50>/Difference Inputs1': |
| 283 | * |
| 284 | * Add in CPU |
| 285 | */ |
| 286 | rtb_UkYk1 = rtb_TargetSpd_RateLimiter - rtb_Yk1_e; |
| 287 | |
| 288 | /* Switch: '<S55>/Switch2' incorporates: |
| 289 | * RelationalOperator: '<S55>/LowerRelop1' |
| 290 | */ |
| 291 | if (!(rtb_UkYk1 > 0.002)) { |
| 292 | /* Switch: '<S55>/Switch' incorporates: |
| 293 | * RelationalOperator: '<S55>/UpperRelop' |
| 294 | */ |
| 295 | if (rtb_UkYk1 < -0.002) { |
| 296 | rtb_Integrator_1 = -0.002; |
| 297 | } else { |
| 298 | rtb_Integrator_1 = rtb_UkYk1; |
| 299 | } |
| 300 | |
| 301 | /* End of Switch: '<S55>/Switch' */ |
| 302 | } |
| 303 | |
| 304 | /* End of Switch: '<S55>/Switch2' */ |
| 305 | |
| 306 | /* Sum: '<S50>/Difference Inputs2' |
| 307 | * |
| 308 | * Block description for '<S50>/Difference Inputs2': |
| 309 | * |
| 310 | * Add in CPU |
| 311 | */ |
| 312 | rtb_Yk1_e += rtb_Integrator_1; |
| 313 | |
| 314 | /* MATLAB Function: '<S43>/Calculate_F_c' incorporates: |
| 315 | * Gain: '<S43>/Gain' |
| 316 | */ |
| 317 | ADM_Integrated_Lo_Calculate_F_c(ADM_Integrated_Logic_ConstB.W_value, |
| 318 | 0.017453292519943295 * rtb_Yk1_e, &rtb_UkYk1); |
| 319 | |
| 320 | /* Gain: '<S43>/Gain2' incorporates: |
| 321 | * Constant: '<S43>/Radius' |
| 322 | * Gain: '<S43>/Gain1' |
| 323 | * Gain: '<S43>/Rolling_Gain' |
| 324 | * MATLAB Function: '<S43>/Calculate_F_R' |
| 325 | * Product: '<S43>/Multiply3' |
| 326 | * Sum: '<S43>/Required_Brake_Cal' |
| 327 | */ |
| 328 | rtb_Integrator_1 = (cos(0.017453292519943295 * rtb_Yk1_e) * 436.7465753424658 * |
| 329 | 0.0 + rtb_UkYk1) * 0.292 * 0.083822296730930432; |
| 330 | |
| 331 | /* Saturate: '<S43>/Saturation' */ |
| 332 | if (rtb_Integrator_1 > 60.0) { |
| 333 | rtb_Integrator_1 = 60.0; |
| 334 | } else if (rtb_Integrator_1 < 0.0) { |
| 335 | rtb_Integrator_1 = 0.0; |
| 336 | } |
| 337 | |
| 338 | /* End of Saturate: '<S43>/Saturation' */ |
| 339 | |
| 340 | /* Sum: '<S49>/Difference Inputs1' incorporates: |
| 341 | * UnitDelay: '<S49>/Delay Input2' |
| 342 | * |
| 343 | * Block description for '<S49>/Difference Inputs1': |
| 344 | * |
| 345 | * Add in CPU |
| 346 | * |
| 347 | * Block description for '<S49>/Delay Input2': |
| 348 | * |
| 349 | * Store in Global RAM |
| 350 | */ |
| 351 | rtb_UkYk1 = rtb_Integrator_1 - ADM_Integrated_Logic_DW.DelayInput2_DSTATE; |
| 352 | |
| 353 | /* Switch: '<S54>/Switch2' incorporates: |
| 354 | * RelationalOperator: '<S54>/LowerRelop1' |
| 355 | */ |
| 356 | if (!(rtb_UkYk1 > 0.016)) { |
| 357 | /* Switch: '<S54>/Switch' incorporates: |
| 358 | * RelationalOperator: '<S54>/UpperRelop' |
| 359 | */ |
| 360 | if (rtb_UkYk1 < -0.16) { |
| 361 | rtb_y_n = -0.16; |
| 362 | } else { |
| 363 | rtb_y_n = rtb_UkYk1; |
| 364 | } |
| 365 | |
| 366 | /* End of Switch: '<S54>/Switch' */ |
| 367 | } |
| 368 | |
| 369 | /* End of Switch: '<S54>/Switch2' */ |
| 370 | |
| 371 | /* Sum: '<S49>/Difference Inputs2' incorporates: |
| 372 | * UnitDelay: '<S49>/Delay Input2' |
| 373 | * |
| 374 | * Block description for '<S49>/Difference Inputs2': |
| 375 | * |
| 376 | * Add in CPU |
| 377 | * |
| 378 | * Block description for '<S49>/Delay Input2': |
| 379 | * |
| 380 | * Store in Global RAM |
| 381 | */ |
| 382 | rtb_UkYk1 = rtb_y_n + ADM_Integrated_Logic_DW.DelayInput2_DSTATE; |
| 383 | |
| 384 | /* Gain: '<S8>/Grade_GAIN' */ |
| 385 | rtb_deltafalllimit_m = 0.8 * rtb_UkYk1; |
| 386 | |
| 387 | /* MATLAB Function: '<S8>/HAC_OFF_OK_Func' */ |
| 388 | rtb_Brake_Torque_Cmd = 0.0; |
| 389 | |
| 390 | /* Outport: '<Root>/Debug_HAC_FLAG' incorporates: |
| 391 | * MATLAB Function: '<S8>/HAC_OFF_OK_Func' |
| 392 | */ |
| 393 | ADM_Integrated_Logic_Y.Debug_HAC_FLAG = 0.0; |
| 394 | |
| 395 | /* MATLAB Function: '<S8>/HAC_OFF_OK_Func' incorporates: |
| 396 | * Constant: '<S8>/Accel_Cmd ' |
| 397 | * Constant: '<S8>/Brake_Cmd' |
| 398 | * Constant: '<S8>/Gear_D' |
| 399 | * Inport: '<Root>/GV_BrakeTorqueCommand' |
| 400 | * Inport: '<Root>/GV_MCU_EstTrq' |
| 401 | * Outport: '<Root>/Debug_HAC_RPM_Decision' |
| 402 | * RelationalOperator: '<S8>/Relational Operator' |
| 403 | * RelationalOperator: '<S8>/Relational Operator1' |
| 404 | * RelationalOperator: '<S8>/Relational Operator2' |
| 405 | * Sum: '<S8>/HAC_Flags_Add' |
| 406 | */ |
| 407 | if ((real_T)(((ADM_Integrated_Logic_U.GV_BrakeTorqueCommand <= 20.0) + |
| 408 | (rtb_Vx_Cmd_R <= 2.0)) + (rtb_Memory == 3.0)) + |
| 409 | ADM_Integrated_Logic_Y.Debug_HAC_RPM_Decision >= 4.0) { |
| 410 | if (ADM_Integrated_Logic_DW.HAC_ON_FLAG == 0.0) { |
| 411 | ADM_Integrated_Logic_DW.HAC_ON_Timer = 0.0; |
| 412 | } |
| 413 | |
| 414 | ADM_Integrated_Logic_DW.HAC_ON_FLAG = 1.0; |
| 415 | rtb_Brake_Torque_Cmd = 1000.0; |
| 416 | ADM_Integrated_Logic_DW.Smoothed_Torque = 1000.0; |
| 417 | if (ADM_Integrated_Logic_DW.HAC_ON_Timer < 3.0) { |
| 418 | ADM_Integrated_Logic_DW.HAC_Desired_Torque = rtb_deltafalllimit_m; |
| 419 | ADM_Integrated_Logic_DW.HAC_ON_Timer += 0.005; |
| 420 | } |
| 421 | |
| 422 | /* Outport: '<Root>/Debug_HAC_FLAG' */ |
| 423 | ADM_Integrated_Logic_Y.Debug_HAC_FLAG = 1.0; |
| 424 | } else if (ADM_Integrated_Logic_DW.HAC_ON_FLAG == 1.0) { |
| 425 | if (ADM_Integrated_Logic_U.GV_MCU_EstTrq >= |
| 426 | ADM_Integrated_Logic_DW.HAC_Desired_Torque) { |
| 427 | /* Outport: '<Root>/Debug_HAC_FLAG' */ |
| 428 | ADM_Integrated_Logic_Y.Debug_HAC_FLAG = 0.0; |
| 429 | ADM_Integrated_Logic_DW.Smoothed_Torque -= 0.05 * |
| 430 | ADM_Integrated_Logic_DW.Smoothed_Torque; |
| 431 | if (ADM_Integrated_Logic_DW.Smoothed_Torque < 0.01) { |
| 432 | ADM_Integrated_Logic_DW.Smoothed_Torque = 0.0; |
| 433 | ADM_Integrated_Logic_DW.HAC_ON_FLAG = 0.0; |
| 434 | ADM_Integrated_Logic_DW.HAC_Desired_Torque = 0.0; |
| 435 | ADM_Integrated_Logic_DW.HAC_ON_Timer = 0.0; |
| 436 | } |
| 437 | |
| 438 | rtb_Brake_Torque_Cmd = ADM_Integrated_Logic_DW.Smoothed_Torque; |
| 439 | } else { |
| 440 | rtb_Brake_Torque_Cmd = 1000.0; |
| 441 | ADM_Integrated_Logic_DW.Smoothed_Torque = 1000.0; |
| 442 | |
| 443 | /* Outport: '<Root>/Debug_HAC_FLAG' */ |
| 444 | ADM_Integrated_Logic_Y.Debug_HAC_FLAG = 1.0; |
| 445 | } |
| 446 | } |
| 447 | |
| 448 | /* Gain: '<S4>/Brake_GAIN' incorporates: |
| 449 | * DiscreteTransferFcn: '<S1>/Discrete Transfer Fcn' |
| 450 | */ |
| 451 | rtb_Add_e = 0.0625 * ADM_Integrated_Logic_DW.DiscreteTransferFcn_states * |
| 452 | -80.0; |
| 453 | |
| 454 | /* MATLAB Function: '<S4>/GearCondition_Brake' */ |
| 455 | if (rtb_Memory == 1.0) { |
| 456 | rtb_Memory_0 = -1; |
| 457 | } else { |
| 458 | rtb_Memory_0 = (rtb_Memory == 3.0); |
| 459 | } |
| 460 | |
| 461 | /* End of MATLAB Function: '<S4>/GearCondition_Brake' */ |
| 462 | |
| 463 | /* Saturate: '<S4>/Saturation' */ |
| 464 | if (rtb_Add_e > 1000.0) { |
| 465 | rtb_Add_e = 1000.0; |
| 466 | } else if (rtb_Add_e < 0.0) { |
| 467 | rtb_Add_e = 0.0; |
| 468 | } |
| 469 | |
| 470 | /* End of Saturate: '<S4>/Saturation' */ |
| 471 | |
| 472 | /* Product: '<S4>/Multiply2' */ |
| 473 | rtb_Integrator_1 = (real_T)rtb_Memory_0 * rtb_Add_e; |
| 474 | |
| 475 | /* RateLimiter: '<S4>/Brake_Out_RateLimiter' */ |
| 476 | rtb_TargetSpd_RateLimiter = rtb_Integrator_1 - ADM_Integrated_Logic_DW.PrevY_o; |
| 477 | if (rtb_TargetSpd_RateLimiter > 3.0) { |
| 478 | rtb_Integrator_1 = ADM_Integrated_Logic_DW.PrevY_o + 3.0; |
| 479 | } else if (rtb_TargetSpd_RateLimiter < -3.0) { |
| 480 | rtb_Integrator_1 = ADM_Integrated_Logic_DW.PrevY_o + -3.0; |
| 481 | } |
| 482 | |
| 483 | ADM_Integrated_Logic_DW.PrevY_o = rtb_Integrator_1; |
| 484 | |
| 485 | /* End of RateLimiter: '<S4>/Brake_Out_RateLimiter' */ |
| 486 | |
| 487 | /* Saturate: '<S4>/Brake_Saturation' */ |
| 488 | if (rtb_Integrator_1 > 1000.0) { |
| 489 | rtb_Integrator_1 = 1000.0; |
| 490 | } else if (rtb_Integrator_1 < 0.0) { |
| 491 | rtb_Integrator_1 = 0.0; |
| 492 | } |
| 493 | |
| 494 | /* End of Saturate: '<S4>/Brake_Saturation' */ |
| 495 | |
| 496 | /* MATLAB Function: '<S1>/Emergency_Brake_Func' incorporates: |
| 497 | * Inport: '<Root>/GV_Vx_Fbk' |
| 498 | * Sum: '<S1>/Add' |
| 499 | */ |
| 500 | if (rtb_Compare) { |
| 501 | rtb_Brake_Saturation = ADM_Integrated_Logic_U.GV_Vx_Fbk * 100.0; |
| 502 | } else { |
| 503 | rtb_Brake_Saturation = rtb_Brake_Torque_Cmd + rtb_Integrator_1; |
| 504 | } |
| 505 | |
| 506 | /* End of MATLAB Function: '<S1>/Emergency_Brake_Func' */ |
| 507 | |
| 508 | /* Saturate: '<S1>/Brake_Saturation' */ |
| 509 | if (rtb_Brake_Saturation > 1500.0) { |
| 510 | rtb_Brake_Saturation = 1500.0; |
| 511 | } else if (rtb_Brake_Saturation < 0.0) { |
| 512 | rtb_Brake_Saturation = 0.0; |
| 513 | } |
| 514 | |
| 515 | /* End of Saturate: '<S1>/Brake_Saturation' */ |
| 516 | |
| 517 | /* Outport: '<Root>/GV_Brake_Command' incorporates: |
| 518 | * MATLAB Function: '<S1>/IDB_Fault_Injection' |
| 519 | */ |
| 520 | ADM_Integrated_Logic_Y.GV_Brake_Command = rtb_Brake_Saturation; |
| 521 | |
| 522 | /* Outport: '<Root>/Target_IDB_Out' incorporates: |
| 523 | * MATLAB Function: '<S1>/IDB_Fault_Injection' |
| 524 | */ |
| 525 | ADM_Integrated_Logic_Y.Target_IDB_Out = rtb_Brake_Saturation; |
| 526 | |
| 527 | /* Outport: '<Root>/Debug_CC_Brake_Output' */ |
| 528 | ADM_Integrated_Logic_Y.Debug_CC_Brake_Output = rtb_Integrator_1; |
| 529 | |
| 530 | /* Outport: '<Root>/Debug_HAC_Brake_Output' */ |
| 531 | ADM_Integrated_Logic_Y.Debug_HAC_Brake_Output = rtb_Brake_Torque_Cmd; |
| 532 | |
| 533 | /* Outport: '<Root>/GV_Hill_Torque_Assist' */ |
| 534 | ADM_Integrated_Logic_Y.GV_Hill_Torque_Assist = rtb_deltafalllimit_m; |
| 535 | |
| 536 | /* Outport: '<Root>/Debug_HAC_Pitch_angle' */ |
| 537 | ADM_Integrated_Logic_Y.Debug_HAC_Pitch_angle = rtb_Yk1_e; |
| 538 | |
| 539 | /* MATLAB Function: '<S43>/Calculate_F_c1' incorporates: |
| 540 | * Gain: '<S43>/Gain3' |
| 541 | */ |
| 542 | ADM_Integrated_Lo_Calculate_F_c(ADM_Integrated_Logic_ConstB.W_Value_for_Brake, |
| 543 | 0.017453292519943295 * rtb_Yk1_e, &rtb_deltafalllimit_m); |
| 544 | |
| 545 | /* Product: '<S44>/Product1' incorporates: |
| 546 | * Constant: '<S44>/Constant' |
| 547 | * Gain: '<S44>/gain' |
| 548 | * Inport: '<Root>/GV_IMU_AX_Val' |
| 549 | * Product: '<S44>/Product11' |
| 550 | * Sum: '<S44>/Sum1' |
| 551 | * Sum: '<S44>/Sum2' |
| 552 | * Sum: '<S44>/Sum3' |
| 553 | * Sum: '<S44>/Sum4' |
| 554 | * UnitDelay: '<S44>/d' |
| 555 | * UnitDelay: '<S44>/d1' |
| 556 | */ |
| 557 | rtb_deltafalllimit_m = ((ADM_Integrated_Logic_U.GV_IMU_AX_Val + |
| 558 | ADM_Integrated_Logic_DW.d1_DSTATE) * 0.002 + 0.061661977236758134 * |
| 559 | ADM_Integrated_Logic_DW.d_DSTATE) / 0.065661977236758137; |
| 560 | |
| 561 | /* Product: '<S45>/Product1' incorporates: |
| 562 | * Constant: '<S45>/Constant' |
| 563 | * Gain: '<S45>/gain' |
| 564 | * Inport: '<Root>/GV_IMU_AY_Val' |
| 565 | * Product: '<S45>/Product11' |
| 566 | * Sum: '<S45>/Sum1' |
| 567 | * Sum: '<S45>/Sum2' |
| 568 | * Sum: '<S45>/Sum3' |
| 569 | * Sum: '<S45>/Sum4' |
| 570 | * UnitDelay: '<S45>/d' |
| 571 | * UnitDelay: '<S45>/d1' |
| 572 | */ |
| 573 | rtb_Brake_Torque_Cmd = ((ADM_Integrated_Logic_U.GV_IMU_AY_Val + |
| 574 | ADM_Integrated_Logic_DW.d1_DSTATE_i) * 0.002 + 0.061661977236758134 * |
| 575 | ADM_Integrated_Logic_DW.d_DSTATE_p) / 0.065661977236758137; |
| 576 | |
| 577 | /* Product: '<S46>/Product1' incorporates: |
| 578 | * Constant: '<S46>/Constant' |
| 579 | * Gain: '<S46>/gain' |
| 580 | * Inport: '<Root>/GV_IMU_AZ_Val' |
| 581 | * Product: '<S46>/Product11' |
| 582 | * Sum: '<S46>/Sum1' |
| 583 | * Sum: '<S46>/Sum2' |
| 584 | * Sum: '<S46>/Sum3' |
| 585 | * Sum: '<S46>/Sum4' |
| 586 | * UnitDelay: '<S46>/d' |
| 587 | * UnitDelay: '<S46>/d1' |
| 588 | */ |
| 589 | rtb_Integrator_1 = ((ADM_Integrated_Logic_U.GV_IMU_AZ_Val + |
| 590 | ADM_Integrated_Logic_DW.d1_DSTATE_o) * 0.002 + |
| 591 | 0.061661977236758134 * ADM_Integrated_Logic_DW.d_DSTATE_n) |
| 592 | / 0.065661977236758137; |
| 593 | |
| 594 | /* MATLAB Function: '<S8>/Pitch_calculate' */ |
| 595 | rtb_Brake_Saturation = sqrt(rtb_Brake_Torque_Cmd * rtb_Brake_Torque_Cmd + |
| 596 | rtb_Integrator_1 * rtb_Integrator_1); |
| 597 | if (rtb_Brake_Saturation == 0.0) { |
| 598 | rtb_Brake_Saturation = 0.0; |
| 599 | } else { |
| 600 | rtb_Brake_Saturation = atan(rtb_deltafalllimit_m / rtb_Brake_Saturation); |
| 601 | } |
| 602 | |
| 603 | /* Sum: '<S8>/Sum' incorporates: |
| 604 | * DiscreteIntegrator: '<S8>/Integrator_2' |
| 605 | * MATLAB Function: '<S8>/Pitch_calculate' |
| 606 | */ |
| 607 | rtb_Brake_Saturation = ADM_Integrated_Logic_DW.Integrator_2_DSTATE - |
| 608 | rtb_Brake_Saturation * 57.295779513082323; |
| 609 | |
| 610 | /* Product: '<S47>/Product1' incorporates: |
| 611 | * Constant: '<S47>/Constant' |
| 612 | * Gain: '<S47>/gain' |
| 613 | * Inport: '<Root>/GV_IMU_PitchRtVal' |
| 614 | * Product: '<S47>/Product11' |
| 615 | * Sum: '<S47>/Sum1' |
| 616 | * Sum: '<S47>/Sum2' |
| 617 | * Sum: '<S47>/Sum3' |
| 618 | * Sum: '<S47>/Sum4' |
| 619 | * UnitDelay: '<S47>/d' |
| 620 | * UnitDelay: '<S47>/d1' |
| 621 | */ |
| 622 | rtb_Product1_m = ((ADM_Integrated_Logic_U.GV_IMU_PitchRtVal + |
| 623 | ADM_Integrated_Logic_DW.d1_DSTATE_a) * 0.002 + |
| 624 | 0.061661977236758134 * ADM_Integrated_Logic_DW.d_DSTATE_d) / |
| 625 | 0.065661977236758137; |
| 626 | |
| 627 | /* MATLAB Function: '<S4>/Target_RPM' */ |
| 628 | if (rtb_Memory == 0.0) { |
| 629 | rtb_Memory_0 = 0; |
| 630 | } else if (rtb_Memory == 2.0) { |
| 631 | rtb_Memory_0 = 0; |
| 632 | } else if (rtb_Memory == 1.0) { |
| 633 | rtb_Memory_0 = -1; |
| 634 | } else { |
| 635 | rtb_Memory_0 = (rtb_Memory == 3.0); |
| 636 | } |
| 637 | |
| 638 | rtb_Target_RPM = rtb_Vx_Cmd_R * 1000.0 / 3600.0 * 11.93 * 60.0 / |
| 639 | 1.7013672006633955 * (real_T)rtb_Memory_0; |
| 640 | |
| 641 | /* End of MATLAB Function: '<S4>/Target_RPM' */ |
| 642 | |
| 643 | /* RateLimiter: '<S4>/TargetSpd_RateLimiter' */ |
| 644 | rtb_TargetSpd_RateLimiter = rtb_Target_RPM - ADM_Integrated_Logic_DW.PrevY_a; |
| 645 | if (rtb_TargetSpd_RateLimiter > 0.4) { |
| 646 | rtb_TargetSpd_RateLimiter = ADM_Integrated_Logic_DW.PrevY_a + 0.4; |
| 647 | } else if (rtb_TargetSpd_RateLimiter < -0.8) { |
| 648 | rtb_TargetSpd_RateLimiter = ADM_Integrated_Logic_DW.PrevY_a + -0.8; |
| 649 | } else { |
| 650 | rtb_TargetSpd_RateLimiter = rtb_Target_RPM; |
| 651 | } |
| 652 | |
| 653 | ADM_Integrated_Logic_DW.PrevY_a = rtb_TargetSpd_RateLimiter; |
| 654 | |
| 655 | /* End of RateLimiter: '<S4>/TargetSpd_RateLimiter' */ |
| 656 | |
| 657 | /* Product: '<S24>/Product1' incorporates: |
| 658 | * Constant: '<S24>/Constant' |
| 659 | * Gain: '<S24>/gain' |
| 660 | * Product: '<S24>/Product11' |
| 661 | * Sum: '<S24>/Sum1' |
| 662 | * Sum: '<S24>/Sum2' |
| 663 | * Sum: '<S24>/Sum3' |
| 664 | * Sum: '<S24>/Sum4' |
| 665 | * UnitDelay: '<S24>/d' |
| 666 | * UnitDelay: '<S24>/d1' |
| 667 | */ |
| 668 | rtb_Target_RPM = ((rtb_TargetSpd_RateLimiter + |
| 669 | ADM_Integrated_Logic_DW.d1_DSTATE_c) * 0.002 + |
| 670 | 0.1041032953945969 * ADM_Integrated_Logic_DW.d_DSTATE_l) / |
| 671 | 0.1081032953945969; |
| 672 | |
| 673 | /* Sum: '<S34>/Sum1' incorporates: |
| 674 | * Gain: '<S34>/gain' |
| 675 | * Sum: '<S34>/Sum2' |
| 676 | * UnitDelay: '<S34>/d' |
| 677 | * UnitDelay: '<S34>/d1' |
| 678 | */ |
| 679 | rtb_Sum1_i2 = (rtb_Target_RPM - ADM_Integrated_Logic_DW.d_DSTATE_i) * 1000.0 - |
| 680 | ADM_Integrated_Logic_DW.d1_DSTATE_p; |
| 681 | |
| 682 | /* Sum: '<S35>/Sum1' incorporates: |
| 683 | * Gain: '<S35>/gain' |
| 684 | * Sum: '<S35>/Sum2' |
| 685 | * UnitDelay: '<S35>/d' |
| 686 | * UnitDelay: '<S35>/d1' |
| 687 | */ |
| 688 | rtb_Sum1_o1 = (rtb_Sum1_i2 - ADM_Integrated_Logic_DW.d_DSTATE_c) * 1000.0 - |
| 689 | ADM_Integrated_Logic_DW.d1_DSTATE_h; |
| 690 | |
| 691 | /* Sum: '<S36>/Sum1' incorporates: |
| 692 | * Gain: '<S36>/gain' |
| 693 | * Sum: '<S36>/Sum2' |
| 694 | * UnitDelay: '<S36>/d' |
| 695 | * UnitDelay: '<S36>/d1' |
| 696 | */ |
| 697 | rtb_Sum1_lm = (rtb_Sum1_o1 - ADM_Integrated_Logic_DW.d_DSTATE_db) * 1000.0 - |
| 698 | ADM_Integrated_Logic_DW.d1_DSTATE_l; |
| 699 | |
| 700 | /* Gain: '<S32>/Gain' incorporates: |
| 701 | * Constant: '<S32>/Constant3' |
| 702 | * Constant: '<S32>/Constant4' |
| 703 | * Constant: '<S32>/Constant5' |
| 704 | * Product: '<S32>/Product' |
| 705 | * Product: '<S32>/Product1' |
| 706 | * Product: '<S32>/Product2' |
| 707 | * Sum: '<S32>/Add5' |
| 708 | */ |
| 709 | rtb_Gain_c = (((156.8 * rtb_Target_RPM + 212.8 * rtb_Sum1_i2) + 21.8 * |
| 710 | rtb_Sum1_o1) + rtb_Sum1_lm) * 9.44822373393802E-6; |
| 711 | |
| 712 | /* Product: '<S38>/Product1' incorporates: |
| 713 | * Constant: '<S38>/Constant1' |
| 714 | * Constant: '<S38>/Constant2' |
| 715 | * Delay: '<S38>/Delay' |
| 716 | * Delay: '<S38>/Delay1' |
| 717 | * Delay: '<S38>/Delay2' |
| 718 | * Delay: '<S38>/Delay3' |
| 719 | * Gain: '<S38>/gain1' |
| 720 | * Gain: '<S38>/gain3' |
| 721 | * Product: '<S38>/x(n), x(n-1), x(n-2)' |
| 722 | * Product: '<S38>/y(n-1)' |
| 723 | * Product: '<S38>/y(n-2)' |
| 724 | * Sum: '<S38>/Sum1' |
| 725 | * Sum: '<S38>/Sum2' |
| 726 | * Sum: '<S38>/Sum3' |
| 727 | * Sum: '<S38>/Sum4' |
| 728 | * Sum: '<S38>/Sum5' |
| 729 | * Sum: '<S38>/Sum6' |
| 730 | */ |
| 731 | rtb_Product1_j = ((((2.0 * ADM_Integrated_Logic_DW.Delay1_DSTATE + rtb_Gain_c) |
| 732 | + ADM_Integrated_Logic_DW.Delay_DSTATE[0]) * |
| 733 | 0.39478417604357435 - -7.2104316479128512 * |
| 734 | ADM_Integrated_Logic_DW.Delay2_DSTATE) - 2.6178993711731877 |
| 735 | * ADM_Integrated_Logic_DW.Delay3_DSTATE[0]) / |
| 736 | 6.1716689809139611; |
| 737 | |
| 738 | /* Product: '<S37>/Product1' incorporates: |
| 739 | * Constant: '<S37>/Constant' |
| 740 | * Gain: '<S37>/gain' |
| 741 | * Product: '<S37>/Product11' |
| 742 | * Sum: '<S37>/Sum1' |
| 743 | * Sum: '<S37>/Sum2' |
| 744 | * Sum: '<S37>/Sum3' |
| 745 | * Sum: '<S37>/Sum4' |
| 746 | * UnitDelay: '<S37>/d' |
| 747 | * UnitDelay: '<S37>/d1' |
| 748 | */ |
| 749 | rtb_Product1_ee = ((rtb_Product1_j + ADM_Integrated_Logic_DW.d1_DSTATE_e) * |
| 750 | 0.002 + 0.00861032953945969 * |
| 751 | ADM_Integrated_Logic_DW.d_DSTATE_ij) / 0.01261032953945969; |
| 752 | |
| 753 | /* Sum: '<S4>/Subtract' incorporates: |
| 754 | * Inport: '<Root>/GV_MCU_RPM' |
| 755 | * MultiPortSwitch: '<S31>/Multiport Switch1' |
| 756 | */ |
| 757 | rtb_Error_m = rtb_Target_RPM - ADM_Integrated_Logic_U.GV_MCU_RPM; |
| 758 | |
| 759 | /* Saturate: '<S4>/Error_Saturation' incorporates: |
| 760 | * MultiPortSwitch: '<S31>/Multiport Switch1' |
| 761 | */ |
| 762 | if (rtb_Error_m > 2000.0) { |
| 763 | rtb_Error_m = 2000.0; |
| 764 | } else if (rtb_Error_m < -2000.0) { |
| 765 | rtb_Error_m = -2000.0; |
| 766 | } |
| 767 | |
| 768 | /* End of Saturate: '<S4>/Error_Saturation' */ |
| 769 | |
| 770 | /* DeadZone: '<S21>/Dead Zone' incorporates: |
| 771 | * MultiPortSwitch: '<S31>/Multiport Switch1' |
| 772 | */ |
| 773 | if (rtb_Error_m > 50.0) { |
| 774 | rtb_Error_b = rtb_Error_m - 50.0; |
| 775 | } else if (rtb_Error_m >= -50.0) { |
| 776 | rtb_Error_b = 0.0; |
| 777 | } else { |
| 778 | rtb_Error_b = rtb_Error_m - -50.0; |
| 779 | } |
| 780 | |
| 781 | /* End of DeadZone: '<S21>/Dead Zone' */ |
| 782 | |
| 783 | /* Sum: '<S26>/Sum1' incorporates: |
| 784 | * Gain: '<S26>/gain' |
| 785 | * Sum: '<S26>/Sum2' |
| 786 | * UnitDelay: '<S26>/d' |
| 787 | * UnitDelay: '<S26>/d1' |
| 788 | */ |
| 789 | rtb_Error_m = (rtb_Target_RPM - ADM_Integrated_Logic_DW.d_DSTATE_ir) * 1000.0 |
| 790 | - ADM_Integrated_Logic_DW.d1_DSTATE_of; |
| 791 | |
| 792 | /* Sum: '<S27>/Sum1' incorporates: |
| 793 | * Gain: '<S27>/gain' |
| 794 | * Sum: '<S27>/Sum2' |
| 795 | * UnitDelay: '<S27>/d' |
| 796 | * UnitDelay: '<S27>/d1' |
| 797 | */ |
| 798 | rtb_Sum1_aj = (rtb_Error_m - ADM_Integrated_Logic_DW.d_DSTATE_m) * 1000.0 - |
| 799 | ADM_Integrated_Logic_DW.d1_DSTATE_hm; |
| 800 | |
| 801 | /* Sum: '<S28>/Sum1' incorporates: |
| 802 | * Gain: '<S28>/gain' |
| 803 | * Sum: '<S28>/Sum2' |
| 804 | * UnitDelay: '<S28>/d' |
| 805 | * UnitDelay: '<S28>/d1' |
| 806 | */ |
| 807 | rtb_Sum1_p = (rtb_Sum1_aj - ADM_Integrated_Logic_DW.d_DSTATE_mw) * 1000.0 - |
| 808 | ADM_Integrated_Logic_DW.d1_DSTATE_g; |
| 809 | |
| 810 | /* Sum: '<S19>/Add3' incorporates: |
| 811 | * Constant: '<S19>/Constant3' |
| 812 | * Constant: '<S19>/Constant4' |
| 813 | * Constant: '<S19>/Constant5' |
| 814 | * Gain: '<S19>/Gain' |
| 815 | * Memory: '<S4>/Memory' |
| 816 | * Product: '<S19>/Product2' |
| 817 | * Product: '<S19>/Product3' |
| 818 | * Product: '<S19>/Product4' |
| 819 | * Sum: '<S19>/Add2' |
| 820 | */ |
| 821 | rtb_Add3 = (((156.8 * rtb_Target_RPM + 212.8 * rtb_Error_m) + 21.8 * |
| 822 | rtb_Sum1_aj) + rtb_Sum1_p) * 9.44822373393802E-6 - |
| 823 | ADM_Integrated_Logic_DW.Memory_PreviousInput; |
| 824 | |
| 825 | /* Product: '<S29>/Product1' incorporates: |
| 826 | * Constant: '<S29>/Constant' |
| 827 | * Gain: '<S29>/gain' |
| 828 | * Product: '<S29>/Product11' |
| 829 | * Sum: '<S29>/Sum1' |
| 830 | * Sum: '<S29>/Sum2' |
| 831 | * Sum: '<S29>/Sum3' |
| 832 | * Sum: '<S29>/Sum4' |
| 833 | * UnitDelay: '<S29>/d' |
| 834 | * UnitDelay: '<S29>/d1' |
| 835 | */ |
| 836 | rtb_Product1_h = ((rtb_Add3 + ADM_Integrated_Logic_DW.d1_DSTATE_ej) * 0.002 + |
| 837 | 0.029830988618379066 * ADM_Integrated_Logic_DW.d_DSTATE_j) / |
| 838 | 0.03383098861837907; |
| 839 | |
| 840 | /* Product: '<S30>/Product1' incorporates: |
| 841 | * Constant: '<S30>/Constant1' |
| 842 | * Constant: '<S30>/Constant2' |
| 843 | * Delay: '<S30>/Delay' |
| 844 | * Delay: '<S30>/Delay1' |
| 845 | * Delay: '<S30>/Delay2' |
| 846 | * Delay: '<S30>/Delay3' |
| 847 | * Gain: '<S30>/gain1' |
| 848 | * Gain: '<S30>/gain3' |
| 849 | * Product: '<S30>/x(n), x(n-1), x(n-2)' |
| 850 | * Product: '<S30>/y(n-1)' |
| 851 | * Product: '<S30>/y(n-2)' |
| 852 | * Sum: '<S30>/Sum1' |
| 853 | * Sum: '<S30>/Sum2' |
| 854 | * Sum: '<S30>/Sum3' |
| 855 | * Sum: '<S30>/Sum4' |
| 856 | * Sum: '<S30>/Sum5' |
| 857 | * Sum: '<S30>/Sum6' |
| 858 | */ |
| 859 | rtb_Product1_kq = ((((2.0 * ADM_Integrated_Logic_DW.Delay1_DSTATE_c + |
| 860 | rtb_Product1_h) + |
| 861 | ADM_Integrated_Logic_DW.Delay_DSTATE_p[0]) * |
| 862 | 0.00035530575843921691 - -7.9992893884831213 * |
| 863 | ADM_Integrated_Logic_DW.Delay2_DSTATE_n) - |
| 864 | 3.9470487616123275 * |
| 865 | ADM_Integrated_Logic_DW.Delay3_DSTATE_h[0]) / |
| 866 | 4.0536618499045511; |
| 867 | |
| 868 | /* MATLAB Function: '<S4>/DOB_Gain' incorporates: |
| 869 | * Inport: '<Root>/GV_Vx_Fbk' |
| 870 | */ |
| 871 | if (ADM_Integrated_Logic_U.GV_Vx_Fbk < 5.0) { |
| 872 | rtb_y_n = 0.0; |
| 873 | } else { |
| 874 | rtb_y_n = (ADM_Integrated_Logic_U.GV_Vx_Fbk - 5.0) * 0.2; |
| 875 | } |
| 876 | |
| 877 | if (rtb_y_n >= 1.0) { |
| 878 | rtb_y_n = 1.0; |
| 879 | } |
| 880 | |
| 881 | /* End of MATLAB Function: '<S4>/DOB_Gain' */ |
| 882 | |
| 883 | /* Product: '<S4>/Product1' incorporates: |
| 884 | * Constant: '<S4>/DOBFlag' |
| 885 | * Product: '<S4>/Product' |
| 886 | */ |
| 887 | rtb_Add_e = -(rtb_Product1_kq * 0.9); |
| 888 | |
| 889 | /* Saturate: '<S4>/DOB_Saturation' */ |
| 890 | if (rtb_Add_e > 30.0) { |
| 891 | rtb_Add_e = 30.0; |
| 892 | } else if (rtb_Add_e < -30.0) { |
| 893 | rtb_Add_e = -30.0; |
| 894 | } |
| 895 | |
| 896 | /* End of Saturate: '<S4>/DOB_Saturation' */ |
| 897 | |
| 898 | /* Sum: '<S4>/Subtract2' incorporates: |
| 899 | * MultiPortSwitch: '<S31>/Multiport Switch1' |
| 900 | * Product: '<S33>/Product' |
| 901 | * Product: '<S4>/Multiply1' |
| 902 | * Sum: '<S21>/Add' |
| 903 | */ |
| 904 | rtb_Add_e = (rtb_Product1_ee + rtb_Error_b * 0.044648264844923756) + rtb_Add_e |
| 905 | * rtb_y_n; |
| 906 | |
| 907 | /* Saturate: '<S4>/Torq_Saturation' */ |
| 908 | if (rtb_Add_e > 80.0) { |
| 909 | rtb_Add_e = 80.0; |
| 910 | } else if (rtb_Add_e < -80.0) { |
| 911 | rtb_Add_e = -80.0; |
| 912 | } |
| 913 | |
| 914 | /* End of Saturate: '<S4>/Torq_Saturation' */ |
| 915 | |
| 916 | /* MATLAB Function: '<S1>/Emergency_Motor_Func' incorporates: |
| 917 | * Inport: '<Root>/GV_IDB_ECU_Fault_Flag' |
| 918 | * Inport: '<Root>/GV_RCU_ECU_Fault_Flag' |
| 919 | * Inport: '<Root>/GV_Vx_Fbk' |
| 920 | * MATLAB Function: '<S4>/Gear_pos_out' |
| 921 | * Product: '<S4>/Multiply' |
| 922 | */ |
| 923 | if (rtb_Compare) { |
| 924 | if ((ADM_Integrated_Logic_U.GV_IDB_ECU_Fault_Flag == 1.0) && |
| 925 | (ADM_Integrated_Logic_U.GV_RCU_ECU_Fault_Flag == 1.0)) { |
| 926 | if (ADM_Integrated_Logic_U.GV_Vx_Fbk / 3.6 > 0.5) { |
| 927 | rtb_y_n = -80.0; |
| 928 | } else { |
| 929 | rtb_y_n = 0.0; |
| 930 | } |
| 931 | } else { |
| 932 | rtb_y_n = 0.0; |
| 933 | } |
| 934 | } else { |
| 935 | if (rtb_Memory == 0.0) { |
| 936 | /* MATLAB Function: '<S4>/Gear_pos_out' */ |
| 937 | rtb_Memory_0 = 0; |
| 938 | } else if (rtb_Memory == 2.0) { |
| 939 | /* MATLAB Function: '<S4>/Gear_pos_out' */ |
| 940 | rtb_Memory_0 = 0; |
| 941 | } else if (rtb_Memory == 1.0) { |
| 942 | /* MATLAB Function: '<S4>/Gear_pos_out' */ |
| 943 | rtb_Memory_0 = -1; |
| 944 | } else { |
| 945 | /* MATLAB Function: '<S4>/Gear_pos_out' */ |
| 946 | rtb_Memory_0 = (rtb_Memory == 3.0); |
| 947 | } |
| 948 | |
| 949 | rtb_y_n = (real_T)rtb_Memory_0 * rtb_Add_e; |
| 950 | } |
| 951 | |
| 952 | /* End of MATLAB Function: '<S1>/Emergency_Motor_Func' */ |
| 953 | |
| 954 | /* MATLAB Function: '<S1>/MCU_Fault_Injection' incorporates: |
| 955 | * Inport: '<Root>/GV_MCU_Actuator_Fault_Flag' |
| 956 | */ |
| 957 | if (ADM_Integrated_Logic_U.GV_MCU_Actuator_Fault_Flag == 1.0) { |
| 958 | /* Outport: '<Root>/GV_Motor_Torque_Cmd' */ |
| 959 | ADM_Integrated_Logic_Y.GV_Motor_Torque_Cmd = 0.0; |
| 960 | } else { |
| 961 | /* Outport: '<Root>/GV_Motor_Torque_Cmd' */ |
| 962 | ADM_Integrated_Logic_Y.GV_Motor_Torque_Cmd = rtb_y_n; |
| 963 | } |
| 964 | |
| 965 | /* Outport: '<Root>/Target_MCU_Out' incorporates: |
| 966 | * MATLAB Function: '<S1>/MCU_Fault_Injection' |
| 967 | */ |
| 968 | ADM_Integrated_Logic_Y.Target_MCU_Out = rtb_y_n; |
| 969 | |
| 970 | /* Outport: '<Root>/GV_Gear_Postion_Out' */ |
| 971 | ADM_Integrated_Logic_Y.GV_Gear_Postion_Out = rtb_Memory; |
| 972 | |
| 973 | /* Sum: '<S1>/Add2' incorporates: |
| 974 | * Inport: '<Root>/GV_Vx_Fbk' |
| 975 | */ |
| 976 | rtb_Vx_Cmd_R -= ADM_Integrated_Logic_U.GV_Vx_Fbk; |
| 977 | |
| 978 | /* Sum: '<S1>/Add1' incorporates: |
| 979 | * Constant: '<S1>/Constant' |
| 980 | * Gain: '<S1>/Gain1' |
| 981 | * Inport: '<Root>/GV_Vx_Fbk' |
| 982 | * Sum: '<S1>/Add3' |
| 983 | */ |
| 984 | rtb_Error_b = 400.0 - 6.5 * ADM_Integrated_Logic_U.GV_Vx_Fbk; |
| 985 | |
| 986 | /* MATLAB Function: '<S1>/MATLAB Function1' incorporates: |
| 987 | * Sum: '<S1>/Add1' |
| 988 | */ |
| 989 | ADM_Integrated__MATLABFunction1(rtb_Error_b, &rtb_y); |
| 990 | |
| 991 | /* Product: '<S16>/delta rise limit' incorporates: |
| 992 | * SampleTimeMath: '<S16>/sample time' |
| 993 | * |
| 994 | * About '<S16>/sample time': |
| 995 | * y = K where K = ( w * Ts ) |
| 996 | */ |
| 997 | rtb_Switch2 = rtb_y * 0.002; |
| 998 | |
| 999 | /* Sum: '<S16>/Difference Inputs1' incorporates: |
| 1000 | * Inport: '<Root>/GV_RWA_RackAngleCommand' |
| 1001 | * UnitDelay: '<S16>/Delay Input2' |
| 1002 | * |
| 1003 | * Block description for '<S16>/Difference Inputs1': |
| 1004 | * |
| 1005 | * Add in CPU |
| 1006 | * |
| 1007 | * Block description for '<S16>/Delay Input2': |
| 1008 | * |
| 1009 | * Store in Global RAM |
| 1010 | */ |
| 1011 | rtb_y_n = ADM_Integrated_Logic_U.GV_RWA_RackAngleCommand - |
| 1012 | ADM_Integrated_Logic_DW.DelayInput2_DSTATE_c; |
| 1013 | |
| 1014 | /* MATLAB Function: '<S1>/MATLAB Function2' incorporates: |
| 1015 | * Gain: '<S1>/Gain3' |
| 1016 | * Sum: '<S1>/Add1' |
| 1017 | */ |
| 1018 | ADM_Integrated__MATLABFunction2(-rtb_Error_b, &rtb_y); |
| 1019 | |
| 1020 | /* Switch: '<S56>/Switch2' incorporates: |
| 1021 | * RelationalOperator: '<S56>/LowerRelop1' |
| 1022 | */ |
| 1023 | if (!(rtb_y_n > rtb_Switch2)) { |
| 1024 | /* Product: '<S16>/delta fall limit' incorporates: |
| 1025 | * SampleTimeMath: '<S16>/sample time' |
| 1026 | * |
| 1027 | * About '<S16>/sample time': |
| 1028 | * y = K where K = ( w * Ts ) |
| 1029 | */ |
| 1030 | rtb_Switch2 = rtb_y * 0.002; |
| 1031 | |
| 1032 | /* Switch: '<S56>/Switch' incorporates: |
| 1033 | * RelationalOperator: '<S56>/UpperRelop' |
| 1034 | */ |
| 1035 | if (!(rtb_y_n < rtb_Switch2)) { |
| 1036 | rtb_Switch2 = rtb_y_n; |
| 1037 | } |
| 1038 | |
| 1039 | /* End of Switch: '<S56>/Switch' */ |
| 1040 | } |
| 1041 | |
| 1042 | /* End of Switch: '<S56>/Switch2' */ |
| 1043 | |
| 1044 | /* Sum: '<S16>/Difference Inputs2' incorporates: |
| 1045 | * UnitDelay: '<S16>/Delay Input2' |
| 1046 | * |
| 1047 | * Block description for '<S16>/Difference Inputs2': |
| 1048 | * |
| 1049 | * Add in CPU |
| 1050 | * |
| 1051 | * Block description for '<S16>/Delay Input2': |
| 1052 | * |
| 1053 | * Store in Global RAM |
| 1054 | */ |
| 1055 | rtb_Add1 = rtb_Switch2 + ADM_Integrated_Logic_DW.DelayInput2_DSTATE_c; |
| 1056 | |
| 1057 | /* Outport: '<Root>/GV_Master_Rack_Angle_Cmd' incorporates: |
| 1058 | * MATLAB Function: '<S1>/RWA_Actuator_Fault_Injection' |
| 1059 | */ |
| 1060 | ADM_Integrated_Logic_Y.GV_Master_Rack_Angle_Cmd = rtb_Add1; |
| 1061 | |
| 1062 | /* Outport: '<Root>/Target_RWA_Out' incorporates: |
| 1063 | * MATLAB Function: '<S1>/RWA_Actuator_Fault_Injection' |
| 1064 | */ |
| 1065 | ADM_Integrated_Logic_Y.Target_RWA_Out = rtb_Add1; |
| 1066 | |
| 1067 | /* MATLAB Function: '<S1>/MATLAB Function5' */ |
| 1068 | ADM_Integrated__MATLABFunction1(rtb_Error_b, &rtb_Switch2); |
| 1069 | |
| 1070 | /* Product: '<S17>/delta rise limit' incorporates: |
| 1071 | * SampleTimeMath: '<S17>/sample time' |
| 1072 | * |
| 1073 | * About '<S17>/sample time': |
| 1074 | * y = K where K = ( w * Ts ) |
| 1075 | */ |
| 1076 | rtb_Switch2 *= 0.002; |
| 1077 | |
| 1078 | /* UnitDelay: '<S17>/Delay Input2' |
| 1079 | * |
| 1080 | * Block description for '<S17>/Delay Input2': |
| 1081 | * |
| 1082 | * Store in Global RAM |
| 1083 | */ |
| 1084 | rtb_y = ADM_Integrated_Logic_DW.DelayInput2_DSTATE_i; |
| 1085 | |
| 1086 | /* Sum: '<S17>/Difference Inputs1' incorporates: |
| 1087 | * Inport: '<Root>/GV_RWS_RackAngleCommand' |
| 1088 | * |
| 1089 | * Block description for '<S17>/Difference Inputs1': |
| 1090 | * |
| 1091 | * Add in CPU |
| 1092 | */ |
| 1093 | rtb_UkYk1_a = ADM_Integrated_Logic_U.GV_RWS_RackAngleCommand - rtb_y; |
| 1094 | |
| 1095 | /* MATLAB Function: '<S1>/MATLAB Function6' incorporates: |
| 1096 | * Gain: '<S1>/Gain5' |
| 1097 | */ |
| 1098 | ADM_Integrated__MATLABFunction2(-rtb_Error_b, &rtb_y_n); |
| 1099 | |
| 1100 | /* Switch: '<S57>/Switch2' incorporates: |
| 1101 | * RelationalOperator: '<S57>/LowerRelop1' |
| 1102 | */ |
| 1103 | if (!(rtb_UkYk1_a > rtb_Switch2)) { |
| 1104 | /* Product: '<S17>/delta fall limit' incorporates: |
| 1105 | * SampleTimeMath: '<S17>/sample time' |
| 1106 | * |
| 1107 | * About '<S17>/sample time': |
| 1108 | * y = K where K = ( w * Ts ) |
| 1109 | */ |
| 1110 | rtb_y_n *= 0.002; |
| 1111 | |
| 1112 | /* Switch: '<S57>/Switch' incorporates: |
| 1113 | * RelationalOperator: '<S57>/UpperRelop' |
| 1114 | */ |
| 1115 | if (rtb_UkYk1_a < rtb_y_n) { |
| 1116 | rtb_Switch2 = rtb_y_n; |
| 1117 | } else { |
| 1118 | rtb_Switch2 = rtb_UkYk1_a; |
| 1119 | } |
| 1120 | |
| 1121 | /* End of Switch: '<S57>/Switch' */ |
| 1122 | } |
| 1123 | |
| 1124 | /* End of Switch: '<S57>/Switch2' */ |
| 1125 | |
| 1126 | /* Sum: '<S17>/Difference Inputs2' |
| 1127 | * |
| 1128 | * Block description for '<S17>/Difference Inputs2': |
| 1129 | * |
| 1130 | * Add in CPU |
| 1131 | */ |
| 1132 | rtb_y_n = rtb_Switch2 + rtb_y; |
| 1133 | |
| 1134 | /* Outport: '<Root>/GV_RWS_RackAngleCmd1' */ |
| 1135 | ADM_Integrated_Logic_Y.GV_RWS_RackAngleCmd1 = rtb_y_n; |
| 1136 | |
| 1137 | /* Outport: '<Root>/Act_Fault_Exist' incorporates: |
| 1138 | * MATLAB Function: '<S1>/Actuator_Fault_Decision' |
| 1139 | */ |
| 1140 | ADM_Integrated_Logic_Y.Act_Fault_Exist = 0.0; |
| 1141 | |
| 1142 | /* MATLAB Function: '<S1>/Actuator_Fault_Decision' incorporates: |
| 1143 | * Inport: '<Root>/GV_ACU_Fault_Flag' |
| 1144 | * Inport: '<Root>/GV_IDB_ECU_Fault_Flag' |
| 1145 | * Inport: '<Root>/GV_MCU_Actuator_Fault_Flag' |
| 1146 | * Inport: '<Root>/GV_RCU_ECU_Fault_Flag' |
| 1147 | * Inport: '<Root>/GV_RWA1_ECU_Fault_Flag' |
| 1148 | * Inport: '<Root>/GV_RWA2_ECU_Fault_Flag' |
| 1149 | * Inport: '<Root>/GV_RWA_Actuator_Fault' |
| 1150 | */ |
| 1151 | if ((ADM_Integrated_Logic_U.GV_ACU_Fault_Flag == 1.0) || |
| 1152 | (ADM_Integrated_Logic_U.GV_MCU_Actuator_Fault_Flag == 1.0) || |
| 1153 | (ADM_Integrated_Logic_U.GV_RWA_Actuator_Fault == 1.0)) { |
| 1154 | /* Outport: '<Root>/Act_Fault_Exist' */ |
| 1155 | ADM_Integrated_Logic_Y.Act_Fault_Exist = 1.0; |
| 1156 | } |
| 1157 | |
| 1158 | if ((ADM_Integrated_Logic_U.GV_IDB_ECU_Fault_Flag == 1.0) || |
| 1159 | (ADM_Integrated_Logic_U.GV_RCU_ECU_Fault_Flag == 1.0)) { |
| 1160 | /* Outport: '<Root>/Act_Fault_Exist' */ |
| 1161 | ADM_Integrated_Logic_Y.Act_Fault_Exist = 1.0; |
| 1162 | } else if ((ADM_Integrated_Logic_U.GV_RWA1_ECU_Fault_Flag == 1.0) && |
| 1163 | (ADM_Integrated_Logic_U.GV_RWA2_ECU_Fault_Flag == 1.0)) { |
| 1164 | /* Outport: '<Root>/Act_Fault_Exist' */ |
| 1165 | ADM_Integrated_Logic_Y.Act_Fault_Exist = 1.0; |
| 1166 | } |
| 1167 | |
| 1168 | /* Update for Delay: '<S7>/Memory' */ |
| 1169 | ADM_Integrated_Logic_DW.Memory_DSTATE = rtb_Memory; |
| 1170 | |
| 1171 | /* Update for UnitDelay: '<S49>/Delay Input2' |
| 1172 | * |
| 1173 | * Block description for '<S49>/Delay Input2': |
| 1174 | * |
| 1175 | * Store in Global RAM |
| 1176 | */ |
| 1177 | ADM_Integrated_Logic_DW.DelayInput2_DSTATE = rtb_UkYk1; |
| 1178 | |
| 1179 | /* Update for UnitDelay: '<S50>/Delay Input2' |
| 1180 | * |
| 1181 | * Block description for '<S50>/Delay Input2': |
| 1182 | * |
| 1183 | * Store in Global RAM |
| 1184 | */ |
| 1185 | ADM_Integrated_Logic_DW.DelayInput2_DSTATE_m = rtb_Yk1_e; |
| 1186 | |
| 1187 | /* Update for DiscreteIntegrator: '<S8>/Integrator_2' incorporates: |
| 1188 | * Constant: '<S8>/I_gain' |
| 1189 | * Constant: '<S8>/P_gain' |
| 1190 | * DiscreteIntegrator: '<S8>/Integrator_1' |
| 1191 | * Product: '<S8>/Product' |
| 1192 | * Product: '<S8>/Product1' |
| 1193 | * Sum: '<S8>/Sum1' |
| 1194 | * Sum: '<S8>/Sum2' |
| 1195 | */ |
| 1196 | ADM_Integrated_Logic_DW.Integrator_2_DSTATE += (rtb_Product1_m - |
| 1197 | (ADM_Integrated_Logic_DW.Integrator_1_DSTATE * 5.0 + rtb_Brake_Saturation * |
| 1198 | 100.0)) * 0.002; |
| 1199 | |
| 1200 | /* Update for DiscreteTransferFcn: '<S1>/Discrete Transfer Fcn' */ |
| 1201 | ADM_Integrated_Logic_DW.DiscreteTransferFcn_states = rtb_Vx_Cmd_R - -0.9375 * |
| 1202 | ADM_Integrated_Logic_DW.DiscreteTransferFcn_states; |
| 1203 | |
| 1204 | /* Update for UnitDelay: '<S44>/d1' incorporates: |
| 1205 | * Inport: '<Root>/GV_IMU_AX_Val' |
| 1206 | */ |
| 1207 | ADM_Integrated_Logic_DW.d1_DSTATE = ADM_Integrated_Logic_U.GV_IMU_AX_Val; |
| 1208 | |
| 1209 | /* Update for UnitDelay: '<S44>/d' */ |
| 1210 | ADM_Integrated_Logic_DW.d_DSTATE = rtb_deltafalllimit_m; |
| 1211 | |
| 1212 | /* Update for UnitDelay: '<S45>/d1' incorporates: |
| 1213 | * Inport: '<Root>/GV_IMU_AY_Val' |
| 1214 | */ |
| 1215 | ADM_Integrated_Logic_DW.d1_DSTATE_i = ADM_Integrated_Logic_U.GV_IMU_AY_Val; |
| 1216 | |
| 1217 | /* Update for UnitDelay: '<S45>/d' */ |
| 1218 | ADM_Integrated_Logic_DW.d_DSTATE_p = rtb_Brake_Torque_Cmd; |
| 1219 | |
| 1220 | /* Update for UnitDelay: '<S46>/d1' incorporates: |
| 1221 | * Inport: '<Root>/GV_IMU_AZ_Val' |
| 1222 | */ |
| 1223 | ADM_Integrated_Logic_DW.d1_DSTATE_o = ADM_Integrated_Logic_U.GV_IMU_AZ_Val; |
| 1224 | |
| 1225 | /* Update for UnitDelay: '<S46>/d' */ |
| 1226 | ADM_Integrated_Logic_DW.d_DSTATE_n = rtb_Integrator_1; |
| 1227 | |
| 1228 | /* Update for DiscreteIntegrator: '<S8>/Integrator_1' */ |
| 1229 | ADM_Integrated_Logic_DW.Integrator_1_DSTATE += 0.002 * rtb_Brake_Saturation; |
| 1230 | |
| 1231 | /* Update for UnitDelay: '<S47>/d1' incorporates: |
| 1232 | * Inport: '<Root>/GV_IMU_PitchRtVal' |
| 1233 | */ |
| 1234 | ADM_Integrated_Logic_DW.d1_DSTATE_a = ADM_Integrated_Logic_U.GV_IMU_PitchRtVal; |
| 1235 | |
| 1236 | /* Update for UnitDelay: '<S47>/d' */ |
| 1237 | ADM_Integrated_Logic_DW.d_DSTATE_d = rtb_Product1_m; |
| 1238 | |
| 1239 | /* Update for UnitDelay: '<S24>/d1' */ |
| 1240 | ADM_Integrated_Logic_DW.d1_DSTATE_c = rtb_TargetSpd_RateLimiter; |
| 1241 | |
| 1242 | /* Update for UnitDelay: '<S24>/d' */ |
| 1243 | ADM_Integrated_Logic_DW.d_DSTATE_l = rtb_Target_RPM; |
| 1244 | |
| 1245 | /* Update for UnitDelay: '<S34>/d' */ |
| 1246 | ADM_Integrated_Logic_DW.d_DSTATE_i = rtb_Target_RPM; |
| 1247 | |
| 1248 | /* Update for UnitDelay: '<S34>/d1' */ |
| 1249 | ADM_Integrated_Logic_DW.d1_DSTATE_p = rtb_Sum1_i2; |
| 1250 | |
| 1251 | /* Update for UnitDelay: '<S35>/d' */ |
| 1252 | ADM_Integrated_Logic_DW.d_DSTATE_c = rtb_Sum1_i2; |
| 1253 | |
| 1254 | /* Update for UnitDelay: '<S35>/d1' */ |
| 1255 | ADM_Integrated_Logic_DW.d1_DSTATE_h = rtb_Sum1_o1; |
| 1256 | |
| 1257 | /* Update for UnitDelay: '<S36>/d' */ |
| 1258 | ADM_Integrated_Logic_DW.d_DSTATE_db = rtb_Sum1_o1; |
| 1259 | |
| 1260 | /* Update for UnitDelay: '<S36>/d1' */ |
| 1261 | ADM_Integrated_Logic_DW.d1_DSTATE_l = rtb_Sum1_lm; |
| 1262 | |
| 1263 | /* Update for Delay: '<S38>/Delay1' */ |
| 1264 | ADM_Integrated_Logic_DW.Delay1_DSTATE = rtb_Gain_c; |
| 1265 | |
| 1266 | /* Update for Delay: '<S38>/Delay' */ |
| 1267 | ADM_Integrated_Logic_DW.Delay_DSTATE[0] = |
| 1268 | ADM_Integrated_Logic_DW.Delay_DSTATE[1]; |
| 1269 | ADM_Integrated_Logic_DW.Delay_DSTATE[1] = rtb_Gain_c; |
| 1270 | |
| 1271 | /* Update for Delay: '<S38>/Delay2' */ |
| 1272 | ADM_Integrated_Logic_DW.Delay2_DSTATE = rtb_Product1_j; |
| 1273 | |
| 1274 | /* Update for Delay: '<S38>/Delay3' */ |
| 1275 | ADM_Integrated_Logic_DW.Delay3_DSTATE[0] = |
| 1276 | ADM_Integrated_Logic_DW.Delay3_DSTATE[1]; |
| 1277 | ADM_Integrated_Logic_DW.Delay3_DSTATE[1] = rtb_Product1_j; |
| 1278 | |
| 1279 | /* Update for UnitDelay: '<S37>/d1' */ |
| 1280 | ADM_Integrated_Logic_DW.d1_DSTATE_e = rtb_Product1_j; |
| 1281 | |
| 1282 | /* Update for UnitDelay: '<S37>/d' */ |
| 1283 | ADM_Integrated_Logic_DW.d_DSTATE_ij = rtb_Product1_ee; |
| 1284 | |
| 1285 | /* Update for Memory: '<S4>/Memory' */ |
| 1286 | ADM_Integrated_Logic_DW.Memory_PreviousInput = rtb_Add_e; |
| 1287 | |
| 1288 | /* Update for UnitDelay: '<S26>/d' */ |
| 1289 | ADM_Integrated_Logic_DW.d_DSTATE_ir = rtb_Target_RPM; |
| 1290 | |
| 1291 | /* Update for UnitDelay: '<S26>/d1' */ |
| 1292 | ADM_Integrated_Logic_DW.d1_DSTATE_of = rtb_Error_m; |
| 1293 | |
| 1294 | /* Update for UnitDelay: '<S27>/d' */ |
| 1295 | ADM_Integrated_Logic_DW.d_DSTATE_m = rtb_Error_m; |
| 1296 | |
| 1297 | /* Update for UnitDelay: '<S27>/d1' */ |
| 1298 | ADM_Integrated_Logic_DW.d1_DSTATE_hm = rtb_Sum1_aj; |
| 1299 | |
| 1300 | /* Update for UnitDelay: '<S28>/d' */ |
| 1301 | ADM_Integrated_Logic_DW.d_DSTATE_mw = rtb_Sum1_aj; |
| 1302 | |
| 1303 | /* Update for UnitDelay: '<S28>/d1' */ |
| 1304 | ADM_Integrated_Logic_DW.d1_DSTATE_g = rtb_Sum1_p; |
| 1305 | |
| 1306 | /* Update for UnitDelay: '<S29>/d1' */ |
| 1307 | ADM_Integrated_Logic_DW.d1_DSTATE_ej = rtb_Add3; |
| 1308 | |
| 1309 | /* Update for UnitDelay: '<S29>/d' */ |
| 1310 | ADM_Integrated_Logic_DW.d_DSTATE_j = rtb_Product1_h; |
| 1311 | |
| 1312 | /* Update for Delay: '<S30>/Delay1' */ |
| 1313 | ADM_Integrated_Logic_DW.Delay1_DSTATE_c = rtb_Product1_h; |
| 1314 | |
| 1315 | /* Update for Delay: '<S30>/Delay' */ |
| 1316 | ADM_Integrated_Logic_DW.Delay_DSTATE_p[0] = |
| 1317 | ADM_Integrated_Logic_DW.Delay_DSTATE_p[1]; |
| 1318 | ADM_Integrated_Logic_DW.Delay_DSTATE_p[1] = rtb_Product1_h; |
| 1319 | |
| 1320 | /* Update for Delay: '<S30>/Delay2' */ |
| 1321 | ADM_Integrated_Logic_DW.Delay2_DSTATE_n = rtb_Product1_kq; |
| 1322 | |
| 1323 | /* Update for Delay: '<S30>/Delay3' */ |
| 1324 | ADM_Integrated_Logic_DW.Delay3_DSTATE_h[0] = |
| 1325 | ADM_Integrated_Logic_DW.Delay3_DSTATE_h[1]; |
| 1326 | ADM_Integrated_Logic_DW.Delay3_DSTATE_h[1] = rtb_Product1_kq; |
| 1327 | |
| 1328 | /* Update for UnitDelay: '<S16>/Delay Input2' |
| 1329 | * |
| 1330 | * Block description for '<S16>/Delay Input2': |
| 1331 | * |
| 1332 | * Store in Global RAM |
| 1333 | */ |
| 1334 | ADM_Integrated_Logic_DW.DelayInput2_DSTATE_c = rtb_Add1; |
| 1335 | |
| 1336 | /* Update for UnitDelay: '<S17>/Delay Input2' |
| 1337 | * |
| 1338 | * Block description for '<S17>/Delay Input2': |
| 1339 | * |
| 1340 | * Store in Global RAM |
| 1341 | */ |
| 1342 | ADM_Integrated_Logic_DW.DelayInput2_DSTATE_i = rtb_y_n; |
| 1343 | } |
| 1344 | |
| 1345 | /* Model initialize function */ |
| 1346 | void ADM_Integrated_Logic_initialize(void) |
| 1347 | { |
| 1348 | /* (no initialization code required) */ |
| 1349 | } |
| 1350 | |
| 1351 | /* |
| 1352 | * File trailer for generated code. |
| 1353 | * |
| 1354 | * [EOF] |
| 1355 | */ |
| 1356 | |