Merge c7a23eb1dd into 86f158cd76

GW/src/Logic/ADM_Integrated_Logic.h

@@ -7,9 +7,9 @@
  *
  * Code generated for Simulink model 'ADM_Integrated_Logic'.
  *
- * Model version                  : 14.27
+ * Model version                  : 14.2
  * Simulink Coder version         : 24.2 (R2024b) 21-Jun-2024
- * C/C++ source code generated on : Mon May  4 18:14:49 2026
+ * C/C++ source code generated on : Tue Mar 10 17:51:08 2026
  *
  * Target selection: ert.tlc
  * Embedded hardware selection: NXP->Cortex-M4
@@ -42,75 +42,69 @@ typedef struct tag_RTM_ADM_Integrated_Logic_T RT_MODEL_ADM_Integrated_Logic_T;
 
 /* Block signals and states (default storage) for system '<Root>' */
 typedef struct {
-  double Delay_DSTATE_c[2];            /* '<S56>/Delay' */
+  double Delay_DSTATE_c[2];            /* '<S52>/Delay' */
-  double Delay3_DSTATE[2];             /* '<S56>/Delay3' */
+  double Delay3_DSTATE[2];             /* '<S52>/Delay3' */
-  double Delay_DSTATE_p[2];            /* '<S45>/Delay' */
+  double Delay_DSTATE_p[2];            /* '<S44>/Delay' */
-  double Delay3_DSTATE_h[2];           /* '<S45>/Delay3' */
+  double Delay3_DSTATE_h[2];           /* '<S44>/Delay3' */
   double x_hat[3];                     /* '<S1>/MATLAB Function' */
   double M;                            /* '<S9>/MATLAB Function' */
   double d1_DSTATE;                    /* '<S13>/d1' */
   double d_DSTATE;                     /* '<S13>/d' */
-  double Memory_DSTATE;                /* '<S10>/Memory' */
   double Integrator_2_DSTATE;          /* '<S11>/Integrator_2' */
-  double Delay_DSTATE;                 /* '<S69>/Delay' */
+  double Delay_DSTATE;                 /* '<S65>/Delay' */
-  double Delay_DSTATE_i;               /* '<S68>/Delay' */
+  double Delay_DSTATE_i;               /* '<S64>/Delay' */
+  double Memory_DSTATE;                /* '<S10>/Memory' */
   double DiscreteTimeIntegrator_DSTATE;/* '<S28>/Discrete-Time Integrator' */
   double UD_DSTATE;                    /* '<S31>/UD' */
   double DiscreteTransferFcn_states;   /* '<S1>/Discrete Transfer Fcn' */
-  double d1_DSTATE_c;                  /* '<S39>/d1' */
+  double d1_DSTATE_c;                  /* '<S38>/d1' */
-  double d_DSTATE_l;                   /* '<S39>/d' */
+  double d_DSTATE_l;                   /* '<S38>/d' */
-  double d_DSTATE_i;                   /* '<S52>/d' */
+  double d_DSTATE_i;                   /* '<S48>/d' */
-  double d1_DSTATE_p;                  /* '<S52>/d1' */
+  double d1_DSTATE_p;                  /* '<S48>/d1' */
-  double d_DSTATE_c;                   /* '<S53>/d' */
+  double d_DSTATE_c;                   /* '<S49>/d' */
-  double d1_DSTATE_h;                  /* '<S53>/d1' */
+  double d1_DSTATE_h;                  /* '<S49>/d1' */
-  double d_DSTATE_d;                   /* '<S54>/d' */
+  double d_DSTATE_d;                   /* '<S50>/d' */
-  double d1_DSTATE_l;                  /* '<S54>/d1' */
+  double d1_DSTATE_l;                  /* '<S50>/d1' */
-  double Delay1_DSTATE;                /* '<S56>/Delay1' */
+  double Delay1_DSTATE;                /* '<S52>/Delay1' */
-  double Delay2_DSTATE;                /* '<S56>/Delay2' */
+  double Delay2_DSTATE;                /* '<S52>/Delay2' */
-  double d1_DSTATE_e;                  /* '<S55>/d1' */
+  double d1_DSTATE_e;                  /* '<S51>/d1' */
-  double d_DSTATE_ij;                  /* '<S55>/d' */
+  double d_DSTATE_ij;                  /* '<S51>/d' */
-  double DiscreteTimeIntegrator_DSTATE_j;/* '<S48>/Discrete-Time Integrator' */
+  double d_DSTATE_ir;                  /* '<S40>/d' */
-  double d_DSTATE_ir;                  /* '<S41>/d' */
+  double d1_DSTATE_o;                  /* '<S40>/d1' */
-  double d1_DSTATE_o;                  /* '<S41>/d1' */
+  double d_DSTATE_m;                   /* '<S41>/d' */
-  double d_DSTATE_m;                   /* '<S42>/d' */
+  double d1_DSTATE_hm;                 /* '<S41>/d1' */
-  double d1_DSTATE_hm;                 /* '<S42>/d1' */
+  double d_DSTATE_mw;                  /* '<S42>/d' */
-  double d_DSTATE_mw;                  /* '<S43>/d' */
+  double d1_DSTATE_g;                  /* '<S42>/d1' */
-  double d1_DSTATE_g;                  /* '<S43>/d1' */
+  double d1_DSTATE_ej;                 /* '<S43>/d1' */
-  double d1_DSTATE_ej;                 /* '<S44>/d1' */
+  double d_DSTATE_j;                   /* '<S43>/d' */
-  double d_DSTATE_j;                   /* '<S44>/d' */
+  double Delay1_DSTATE_c;              /* '<S44>/Delay1' */
-  double Delay1_DSTATE_c;              /* '<S45>/Delay1' */
+  double Delay2_DSTATE_n;              /* '<S44>/Delay2' */
-  double Delay2_DSTATE_n;              /* '<S45>/Delay2' */
+  double d1_DSTATE_ob;                 /* '<S59>/d1' */
-  double d1_DSTATE_ob;                 /* '<S63>/d1' */
+  double d_DSTATE_e;                   /* '<S59>/d' */
-  double d_DSTATE_e;                   /* '<S63>/d' */
+  double d1_DSTATE_i;                  /* '<S60>/d1' */
-  double d1_DSTATE_i;                  /* '<S64>/d1' */
+  double d_DSTATE_p;                   /* '<S60>/d' */
-  double d_DSTATE_p;                   /* '<S64>/d' */
+  double d1_DSTATE_o1;                 /* '<S61>/d1' */
-  double d1_DSTATE_o1;                 /* '<S65>/d1' */
+  double d_DSTATE_n;                   /* '<S61>/d' */
-  double d_DSTATE_n;                   /* '<S65>/d' */
   double Integrator_1_DSTATE;          /* '<S11>/Integrator_1' */
-  double d1_DSTATE_a;                  /* '<S66>/d1' */
+  double d1_DSTATE_a;                  /* '<S62>/d1' */
-  double d_DSTATE_d1;                  /* '<S66>/d' */
+  double d_DSTATE_d1;                  /* '<S62>/d' */
   double Delay_DSTATE_c4;              /* '<S23>/Delay' */
   double Delay_DSTATE_i1;              /* '<S24>/Delay' */
   double PrevY;                        /* '<S25>/Input_Vx_RateLimiter' */
   double PrevY_b;                      /* '<S3>/Rate Limiter' */
   double PrevY_o;                      /* '<S6>/Brake_Out_RateLimiter' */
   double PrevY_a;                      /* '<S6>/TargetSpd_RateLimiter' */
-  double PrevY_d;                      /* '<S46>/Rate Limiter' */
   double Memory_PreviousInput;         /* '<S6>/Memory' */
-  double Memory_PreviousInput_j;       /* '<S48>/Memory' */
   double Memory_PreviousInput_f;       /* '<S28>/Memory' */
   double currentEstMass;               /* '<S1>/MATLAB Function3' */
   double HAC_ON_FLAG;                  /* '<S11>/HAC_OFF_OK_Func' */
   double Smoothed_Torque;              /* '<S11>/HAC_OFF_OK_Func' */
   double HAC_Desired_Torque;           /* '<S11>/HAC_OFF_OK_Func' */
   double HAC_ON_Timer;                 /* '<S11>/HAC_OFF_OK_Func' */
-  double emergency_active;             /* '<S1>/Emergency_Brake_Func' */
-  double brake_hold;                   /* '<S1>/Emergency_Brake_Func' */
-  int8_t DiscreteTimeIntegrator_PrevRese;/* '<S48>/Discrete-Time Integrator' */
   uint8_t is_active_c6_ADM_Integrated_Log;/* '<S11>/Chart' */
   uint8_t is_c6_ADM_Integrated_Logic;  /* '<S11>/Chart' */
-  bool icLoad;                         /* '<S69>/Delay' */
+  bool icLoad;                         /* '<S65>/Delay' */
-  bool icLoad_e;                       /* '<S68>/Delay' */
+  bool icLoad_e;                       /* '<S64>/Delay' */
   bool icLoad_l;                       /* '<S23>/Delay' */
   bool icLoad_d;                       /* '<S24>/Delay' */
   bool isConverged;                    /* '<S1>/MATLAB Function3' */
@@ -118,8 +112,8 @@ typedef struct {
 
 /* Invariant block signals (default storage) */
 typedef struct {
-  const double W_value;                /* '<S62>/Multiply' */
+  const double W_value;                /* '<S58>/Multiply' */
-  const double W_Value_for_Brake;      /* '<S62>/Multiply4' */
+  const double W_Value_for_Brake;      /* '<S58>/Multiply4' */
 } ConstB_ADM_Integrated_Logic_T;
 
 /* External inputs (root inport signals with default storage) */
@@ -210,37 +204,35 @@ extern RT_MODEL_ADM_Integrated_Logic_T *const ADM_Integrated_Logic_M;
  * Block '<S27>/Data Type Propagation' : Unused code path elimination
  * Block '<S2>/Switch' : Unused code path elimination
  * Block '<S31>/Data Type Duplicate' : Unused code path elimination
- * Block '<S36>/Constant1' : Unused code path elimination
+ * Block '<S35>/BW_PI' : Unused code path elimination
- * Block '<S36>/Constant16' : Unused code path elimination
+ * Block '<S35>/Constant1' : Unused code path elimination
- * Block '<S36>/Constant17' : Unused code path elimination
+ * Block '<S35>/Constant16' : Unused code path elimination
- * Block '<S36>/Constant2' : Unused code path elimination
+ * Block '<S35>/Constant17' : Unused code path elimination
- * Block '<S48>/Display6' : Unused code path elimination
+ * Block '<S35>/Constant2' : Unused code path elimination
- * Block '<S48>/Display7' : Unused code path elimination
+ * Block '<S58>/Brake_Saturation' : Unused code path elimination
- * Block '<S48>/Display8' : Unused code path elimination
+ * Block '<S58>/Multiply5' : Unused code path elimination
- * Block '<S62>/Brake_Saturation' : Unused code path elimination
+ * Block '<S58>/Radius1' : Unused code path elimination
- * Block '<S62>/Multiply5' : Unused code path elimination
+ * Block '<S64>/FixPt Data Type Duplicate' : Unused code path elimination
- * Block '<S62>/Radius1' : Unused code path elimination
+ * Block '<S69>/Data Type Duplicate' : Unused code path elimination
- * Block '<S68>/FixPt Data Type Duplicate' : Unused code path elimination
+ * Block '<S69>/Data Type Propagation' : Unused code path elimination
- * Block '<S73>/Data Type Duplicate' : Unused code path elimination
+ * Block '<S65>/FixPt Data Type Duplicate' : Unused code path elimination
- * Block '<S73>/Data Type Propagation' : Unused code path elimination
+ * Block '<S70>/Data Type Duplicate' : Unused code path elimination
- * Block '<S69>/FixPt Data Type Duplicate' : Unused code path elimination
+ * Block '<S70>/Data Type Propagation' : Unused code path elimination
- * Block '<S74>/Data Type Duplicate' : Unused code path elimination
- * Block '<S74>/Data Type Propagation' : Unused code path elimination
  * Block '<S11>/Scope2' : Unused code path elimination
  * Block '<S23>/FixPt Data Type Duplicate' : Unused code path elimination
- * Block '<S75>/Data Type Duplicate' : Unused code path elimination
+ * Block '<S71>/Data Type Duplicate' : Unused code path elimination
- * Block '<S75>/Data Type Propagation' : Unused code path elimination
+ * Block '<S71>/Data Type Propagation' : Unused code path elimination
  * Block '<S24>/FixPt Data Type Duplicate' : Unused code path elimination
- * Block '<S76>/Data Type Duplicate' : Unused code path elimination
+ * Block '<S72>/Data Type Duplicate' : Unused code path elimination
- * Block '<S76>/Data Type Propagation' : Unused code path elimination
+ * Block '<S72>/Data Type Propagation' : Unused code path elimination
  * Block '<S6>/ControlFlag' : Eliminated nontunable gain of 1
- * Block '<S36>/FBGain' : Eliminated nontunable gain of 1
+ * Block '<S35>/FBGain' : Eliminated nontunable gain of 1
- * Block '<S47>/FFGain' : Eliminated nontunable gain of 1
+ * Block '<S46>/FFGain' : Eliminated nontunable gain of 1
  * Block '<S1>/Data Type Conversion1' : Eliminate redundant data type conversion
  * Block '<S1>/Data Type Conversion3' : Eliminate redundant data type conversion
- * Block '<S62>/HAC_Gain' : Eliminated nontunable gain of 1
+ * Block '<S58>/HAC_Gain' : Eliminated nontunable gain of 1
- * Block '<S68>/Zero-Order Hold' : Eliminated since input and output rates are identical
+ * Block '<S64>/Zero-Order Hold' : Eliminated since input and output rates are identical
- * Block '<S69>/Zero-Order Hold' : Eliminated since input and output rates are identical
+ * Block '<S65>/Zero-Order Hold' : Eliminated since input and output rates are identical
  * Block '<S23>/Zero-Order Hold' : Eliminated since input and output rates are identical
  * Block '<S24>/Zero-Order Hold' : Eliminated since input and output rates are identical
  * Block '<S1>/Constant5' : Unused code path elimination
@@ -293,52 +285,48 @@ extern RT_MODEL_ADM_Integrated_Logic_T *const ADM_Integrated_Logic_M;
  * '<S30>'  : 'ADM_Integrated_Logic/Delivery_Mobility/Acceleration_Control/MATLAB Function1'
  * '<S31>'  : 'ADM_Integrated_Logic/Delivery_Mobility/Acceleration_Control/Controller/Discrete Derivative'
  * '<S32>'  : 'ADM_Integrated_Logic/Delivery_Mobility/Acceleration_Control/Controller/MATLAB Function'
- * '<S33>'  : 'ADM_Integrated_Logic/Delivery_Mobility/Cruise_Control1/Compare To Constant'
+ * '<S33>'  : 'ADM_Integrated_Logic/Delivery_Mobility/Cruise_Control1/DOB'
- * '<S34>'  : 'ADM_Integrated_Logic/Delivery_Mobility/Cruise_Control1/DOB'
+ * '<S34>'  : 'ADM_Integrated_Logic/Delivery_Mobility/Cruise_Control1/DOB_Gain'
- * '<S35>'  : 'ADM_Integrated_Logic/Delivery_Mobility/Cruise_Control1/DOB_Gain'
+ * '<S35>'  : 'ADM_Integrated_Logic/Delivery_Mobility/Cruise_Control1/FF_PID_Controller'
- * '<S36>'  : 'ADM_Integrated_Logic/Delivery_Mobility/Cruise_Control1/FF_PID_Controller'
+ * '<S36>'  : 'ADM_Integrated_Logic/Delivery_Mobility/Cruise_Control1/GearCondition_Brake'
- * '<S37>'  : 'ADM_Integrated_Logic/Delivery_Mobility/Cruise_Control1/GearCondition_Brake'
+ * '<S37>'  : 'ADM_Integrated_Logic/Delivery_Mobility/Cruise_Control1/Gear_pos_out'
- * '<S38>'  : 'ADM_Integrated_Logic/Delivery_Mobility/Cruise_Control1/Gear_pos_out'
+ * '<S38>'  : 'ADM_Integrated_Logic/Delivery_Mobility/Cruise_Control1/LPFM'
- * '<S39>'  : 'ADM_Integrated_Logic/Delivery_Mobility/Cruise_Control1/LPFM'
+ * '<S39>'  : 'ADM_Integrated_Logic/Delivery_Mobility/Cruise_Control1/Target_RPM'
- * '<S40>'  : 'ADM_Integrated_Logic/Delivery_Mobility/Cruise_Control1/Target_RPM'
+ * '<S40>'  : 'ADM_Integrated_Logic/Delivery_Mobility/Cruise_Control1/DOB/Dot3'
- * '<S41>'  : 'ADM_Integrated_Logic/Delivery_Mobility/Cruise_Control1/DOB/Dot3'
+ * '<S41>'  : 'ADM_Integrated_Logic/Delivery_Mobility/Cruise_Control1/DOB/Dot4'
- * '<S42>'  : 'ADM_Integrated_Logic/Delivery_Mobility/Cruise_Control1/DOB/Dot4'
+ * '<S42>'  : 'ADM_Integrated_Logic/Delivery_Mobility/Cruise_Control1/DOB/Dot5'
- * '<S43>'  : 'ADM_Integrated_Logic/Delivery_Mobility/Cruise_Control1/DOB/Dot5'
+ * '<S43>'  : 'ADM_Integrated_Logic/Delivery_Mobility/Cruise_Control1/DOB/LPFM'
- * '<S44>'  : 'ADM_Integrated_Logic/Delivery_Mobility/Cruise_Control1/DOB/LPFM'
+ * '<S44>'  : 'ADM_Integrated_Logic/Delivery_Mobility/Cruise_Control1/DOB/Second order LPF'
- * '<S45>'  : 'ADM_Integrated_Logic/Delivery_Mobility/Cruise_Control1/DOB/Second order LPF'
+ * '<S45>'  : 'ADM_Integrated_Logic/Delivery_Mobility/Cruise_Control1/FF_PID_Controller/FB'
- * '<S46>'  : 'ADM_Integrated_Logic/Delivery_Mobility/Cruise_Control1/FF_PID_Controller/FB1'
+ * '<S46>'  : 'ADM_Integrated_Logic/Delivery_Mobility/Cruise_Control1/FF_PID_Controller/FF'
- * '<S47>'  : 'ADM_Integrated_Logic/Delivery_Mobility/Cruise_Control1/FF_PID_Controller/FF'
+ * '<S47>'  : 'ADM_Integrated_Logic/Delivery_Mobility/Cruise_Control1/FF_PID_Controller/FB/P'
- * '<S48>'  : 'ADM_Integrated_Logic/Delivery_Mobility/Cruise_Control1/FF_PID_Controller/FB1/I'
+ * '<S48>'  : 'ADM_Integrated_Logic/Delivery_Mobility/Cruise_Control1/FF_PID_Controller/FF/Dot'
- * '<S49>'  : 'ADM_Integrated_Logic/Delivery_Mobility/Cruise_Control1/FF_PID_Controller/FB1/I_Gain'
+ * '<S49>'  : 'ADM_Integrated_Logic/Delivery_Mobility/Cruise_Control1/FF_PID_Controller/FF/Dot2'
- * '<S50>'  : 'ADM_Integrated_Logic/Delivery_Mobility/Cruise_Control1/FF_PID_Controller/FB1/P'
+ * '<S50>'  : 'ADM_Integrated_Logic/Delivery_Mobility/Cruise_Control1/FF_PID_Controller/FF/Dot3'
- * '<S51>'  : 'ADM_Integrated_Logic/Delivery_Mobility/Cruise_Control1/FF_PID_Controller/FB1/I/Compare To Constant'
+ * '<S51>'  : 'ADM_Integrated_Logic/Delivery_Mobility/Cruise_Control1/FF_PID_Controller/FF/LPFM'
- * '<S52>'  : 'ADM_Integrated_Logic/Delivery_Mobility/Cruise_Control1/FF_PID_Controller/FF/Dot'
+ * '<S52>'  : 'ADM_Integrated_Logic/Delivery_Mobility/Cruise_Control1/FF_PID_Controller/FF/Second order LPF'
- * '<S53>'  : 'ADM_Integrated_Logic/Delivery_Mobility/Cruise_Control1/FF_PID_Controller/FF/Dot2'
+ * '<S53>'  : 'ADM_Integrated_Logic/Delivery_Mobility/Enabled Subsystem/MATLAB Function'
- * '<S54>'  : 'ADM_Integrated_Logic/Delivery_Mobility/Cruise_Control1/FF_PID_Controller/FF/Dot3'
+ * '<S54>'  : 'ADM_Integrated_Logic/Delivery_Mobility/Gear_Position/Compare To Constant'
- * '<S55>'  : 'ADM_Integrated_Logic/Delivery_Mobility/Cruise_Control1/FF_PID_Controller/FF/LPFM'
+ * '<S55>'  : 'ADM_Integrated_Logic/Delivery_Mobility/Gear_Position/Gear_FUNCTION1'
- * '<S56>'  : 'ADM_Integrated_Logic/Delivery_Mobility/Cruise_Control1/FF_PID_Controller/FF/Second order LPF'
+ * '<S56>'  : 'ADM_Integrated_Logic/Delivery_Mobility/HAC_Logic1/Chart'
- * '<S57>'  : 'ADM_Integrated_Logic/Delivery_Mobility/Enabled Subsystem/MATLAB Function'
+ * '<S57>'  : 'ADM_Integrated_Logic/Delivery_Mobility/HAC_Logic1/HAC_OFF_OK_Func'
- * '<S58>'  : 'ADM_Integrated_Logic/Delivery_Mobility/Gear_Position/Compare To Constant'
+ * '<S58>'  : 'ADM_Integrated_Logic/Delivery_Mobility/HAC_Logic1/Hill_Required_Torque2'
- * '<S59>'  : 'ADM_Integrated_Logic/Delivery_Mobility/Gear_Position/Gear_FUNCTION1'
+ * '<S59>'  : 'ADM_Integrated_Logic/Delivery_Mobility/HAC_Logic1/LPFM'
- * '<S60>'  : 'ADM_Integrated_Logic/Delivery_Mobility/HAC_Logic1/Chart'
+ * '<S60>'  : 'ADM_Integrated_Logic/Delivery_Mobility/HAC_Logic1/LPFM1'
- * '<S61>'  : 'ADM_Integrated_Logic/Delivery_Mobility/HAC_Logic1/HAC_OFF_OK_Func'
+ * '<S61>'  : 'ADM_Integrated_Logic/Delivery_Mobility/HAC_Logic1/LPFM2'
- * '<S62>'  : 'ADM_Integrated_Logic/Delivery_Mobility/HAC_Logic1/Hill_Required_Torque2'
+ * '<S62>'  : 'ADM_Integrated_Logic/Delivery_Mobility/HAC_Logic1/LPFM3'
- * '<S63>'  : 'ADM_Integrated_Logic/Delivery_Mobility/HAC_Logic1/LPFM'
+ * '<S63>'  : 'ADM_Integrated_Logic/Delivery_Mobility/HAC_Logic1/Pitch_calculate'
- * '<S64>'  : 'ADM_Integrated_Logic/Delivery_Mobility/HAC_Logic1/LPFM1'
+ * '<S64>'  : 'ADM_Integrated_Logic/Delivery_Mobility/HAC_Logic1/Rate Limiter Dynamic'
- * '<S65>'  : 'ADM_Integrated_Logic/Delivery_Mobility/HAC_Logic1/LPFM2'
+ * '<S65>'  : 'ADM_Integrated_Logic/Delivery_Mobility/HAC_Logic1/Rate Limiter Dynamic1'
- * '<S66>'  : 'ADM_Integrated_Logic/Delivery_Mobility/HAC_Logic1/LPFM3'
+ * '<S66>'  : 'ADM_Integrated_Logic/Delivery_Mobility/HAC_Logic1/Hill_Required_Torque2/Calculate_F_R'
- * '<S67>'  : 'ADM_Integrated_Logic/Delivery_Mobility/HAC_Logic1/Pitch_calculate'
+ * '<S67>'  : 'ADM_Integrated_Logic/Delivery_Mobility/HAC_Logic1/Hill_Required_Torque2/Calculate_F_c'
- * '<S68>'  : 'ADM_Integrated_Logic/Delivery_Mobility/HAC_Logic1/Rate Limiter Dynamic'
+ * '<S68>'  : 'ADM_Integrated_Logic/Delivery_Mobility/HAC_Logic1/Hill_Required_Torque2/Calculate_F_c1'
- * '<S69>'  : 'ADM_Integrated_Logic/Delivery_Mobility/HAC_Logic1/Rate Limiter Dynamic1'
+ * '<S69>'  : 'ADM_Integrated_Logic/Delivery_Mobility/HAC_Logic1/Rate Limiter Dynamic/Saturation Dynamic'
- * '<S70>'  : 'ADM_Integrated_Logic/Delivery_Mobility/HAC_Logic1/Hill_Required_Torque2/Calculate_F_R'
+ * '<S70>'  : 'ADM_Integrated_Logic/Delivery_Mobility/HAC_Logic1/Rate Limiter Dynamic1/Saturation Dynamic'
- * '<S71>'  : 'ADM_Integrated_Logic/Delivery_Mobility/HAC_Logic1/Hill_Required_Torque2/Calculate_F_c'
+ * '<S71>'  : 'ADM_Integrated_Logic/Delivery_Mobility/Rate Limiter Dynamic/Saturation Dynamic'
- * '<S72>'  : 'ADM_Integrated_Logic/Delivery_Mobility/HAC_Logic1/Hill_Required_Torque2/Calculate_F_c1'
+ * '<S72>'  : 'ADM_Integrated_Logic/Delivery_Mobility/Rate Limiter Dynamic1/Saturation Dynamic'
- * '<S73>'  : 'ADM_Integrated_Logic/Delivery_Mobility/HAC_Logic1/Rate Limiter Dynamic/Saturation Dynamic'
+ * '<S73>'  : 'ADM_Integrated_Logic/Delivery_Mobility/Vx_Logic/Compare To Constant'
- * '<S74>'  : 'ADM_Integrated_Logic/Delivery_Mobility/HAC_Logic1/Rate Limiter Dynamic1/Saturation Dynamic'
+ * '<S74>'  : 'ADM_Integrated_Logic/Delivery_Mobility/Vx_Logic/Vx_OutPut_Function'
- * '<S75>'  : 'ADM_Integrated_Logic/Delivery_Mobility/Rate Limiter Dynamic/Saturation Dynamic'
- * '<S76>'  : 'ADM_Integrated_Logic/Delivery_Mobility/Rate Limiter Dynamic1/Saturation Dynamic'
- * '<S77>'  : 'ADM_Integrated_Logic/Delivery_Mobility/Vx_Logic/Compare To Constant'
- * '<S78>'  : 'ADM_Integrated_Logic/Delivery_Mobility/Vx_Logic/Vx_OutPut_Function'
  */
 
 /*-

GW/src/Logic/ADM_Integrated_Logic_data.c

@@ -7,9 +7,9 @@
  *
  * Code generated for Simulink model 'ADM_Integrated_Logic'.
  *
- * Model version                  : 14.27
+ * Model version                  : 14.2
  * Simulink Coder version         : 24.2 (R2024b) 21-Jun-2024
- * C/C++ source code generated on : Mon May  4 18:14:49 2026
+ * C/C++ source code generated on : Tue Mar 10 17:51:08 2026
  *
  * Target selection: ert.tlc
  * Embedded hardware selection: NXP->Cortex-M4
@@ -24,8 +24,8 @@
 
 /* Invariant block signals (default storage) */
 const ConstB_ADM_Integrated_Logic_T ADM_Integrated_Logic_ConstB = {
-  14715.0,                             /* '<S62>/Multiply' */
+  12753.0,                             /* '<S58>/Multiply' */
-  14715.0                              /* '<S62>/Multiply4' */
+  12753.0                              /* '<S58>/Multiply4' */
 };
 
 /*

GW/src/System_Layer/SW_Version/SW_VER.c

@@ -6,8 +6,8 @@
 void SET_SW_VER(void)
 {
 	GV_YEAR 	  = 26;
-	GV_Month      = 5;
+	GV_Month      = 3;
-	GV_Day        = 4;
+	GV_Day        = 19;
 	GV_Ver  	  = 1;
 	GV_CAR_NUM    = 240623;
 }

[ADM] Integrated Logic/slprj/_sfprj/ADM_AccelerationLogic/_self/rtw/speedgoat/src/ADM_AccelerationLogic_rtw.tlc

@@ -0,0 +1,39 @@
+%implements "machineSource" "C"
+%function DumpMachineInitializer(block) Output
+
+%openfile tmpFcnBuf
+
+%closefile tmpFcnBuf
+%if !WHITE_SPACE(tmpFcnBuf)
+  %<tmpFcnBuf>\
+%endif
+%endfunction
+%function GlobalMachineInitializer(block) void
+  %openfile tmpFcnBuf
+  %<DumpMachineInitializer(block)>\
+  %closefile tmpFcnBuf
+  %return tmpFcnBuf              
+%endfunction %% GlobalMachineInitializer
+
+%function DumpMachineTerminator(block) Output
+%openfile tmpFcnBuf
+
+%closefile tmpFcnBuf
+%if !WHITE_SPACE(tmpFcnBuf)
+  %<tmpFcnBuf>\
+%endif
+%endfunction
+%function GlobalMachineTerminator(block) void
+  %openfile tmpFcnBuf
+  %<DumpMachineTerminator(block)>\
+  %closefile tmpFcnBuf
+  %return tmpFcnBuf              
+%endfunction %% GlobalMachineTerminator
+
+%function CacheMachineFunctions(block,system) void
+  %openfile tmpFcnBuf
+            
+            
+  %closefile tmpFcnBuf
+  %<SLibCacheCodeToFile("sf_machine_fcn_defn",tmpFcnBuf)>
+%endfunction

[ADM] Integrated Logic/slprj/_sfprj/ADM_AccelerationLogic/_self/rtw/speedgoat/src/ADM_AccelerationLogic_rtw.tlh

@@ -0,0 +1,24 @@
+%implements "machineHeader" "C"
+%function CacheOutputs(block,system) void
+ %assign srcFileName = SLibGetFullFileNameForSystemCode("sys_src_incl", system.SystemIdx)
+ %assign isWithinReusableSubsys =  (LibSystemIsReusedLibraryFcn(System[system.SystemIdx]) || LibSystemIsReusedLibraryFcn(System[System[system.SystemIdx].NonInlinedParentSystemIdx]))
+   %<LibAddToCommonIncludes("verify/verifyIntrf.h")>
+%openfile typedefsBuf   
+            
+%closefile typedefsBuf
+%<SLibCacheCodeToFile("sf_machine_typedef",typedefsBuf)>
+%if !isWithinReusableSubsys && !WHITE_SPACE(typedefsBuf)
+  %<SLibUpdateHeadersNeededByFile(srcFileName, SLibGetFullFileNameForCode("sf_machine_typedef"))>
+%endif
+%openfile externDataBuf
+
+            
+            
+%closefile externDataBuf
+%<SLibCacheCodeToFile("sf_machine_extern_fcn_decl",externDataBuf)>
+%if !isWithinReusableSubsys && !WHITE_SPACE(externDataBuf)
+  %<SLibUpdateHeadersNeededByFile(srcFileName, SLibGetFullFileNameForCode("sf_machine_extern_fcn_decl"))>
+%endif
+%endfunction %% CacheOutputs
+ 
+

[ADM] Integrated Logic/slprj/_sfprj/ADM_AccelerationLogic/_self/rtw/speedgoat/src/c11_ADM_AccelerationLogic.tlc

@@ -0,0 +1,32 @@
+%implements "chartSource" "C"
+%function ChartConfig(block, system) void
+  %createrecord chartConfiguration { ...
+          executeAtInitialization  0 ...
+  }
+  %return chartConfiguration
+%endfunction
+%function ChartDataMap(block, system) void
+  %createrecord ChartDataElements {\
+    NumChartData   2 \
+    ChartDataDefaults {\
+      RecordType   "ChartData"\
+      Dimensions   []\
+      IsTestPoint  0\
+    }\
+    ChartData {\
+      Name         "sfEvent"\
+      Description  "ActiveChartEvent"\
+      SFName       ""\
+      Path         ""\
+      SrcLocation  ""\
+    }\
+    ChartData {\
+      Name         "doneDoubleBufferReInit"\
+      Description  "DoubleBufferInitCheck"\
+      SFName       ""\
+      Path         ""\
+      SrcLocation  ""\
+    }\
+  }
+  %return ChartDataElements
+%endfunction

[ADM] Integrated Logic/slprj/_sfprj/ADM_AccelerationLogic/_self/rtw/speedgoat/src/c11_ADM_AccelerationLogic.tlh

@@ -0,0 +1 @@
+

[ADM] Integrated Logic/slprj/_sfprj/ADM_AccelerationLogic/_self/rtw/speedgoat/src/c14_ADM_AccelerationLogic.tlc

@@ -0,0 +1,32 @@
+%implements "chartSource" "C"
+%function ChartConfig(block, system) void
+  %createrecord chartConfiguration { ...
+          executeAtInitialization  0 ...
+  }
+  %return chartConfiguration
+%endfunction
+%function ChartDataMap(block, system) void
+  %createrecord ChartDataElements {\
+    NumChartData   2 \
+    ChartDataDefaults {\
+      RecordType   "ChartData"\
+      Dimensions   []\
+      IsTestPoint  0\
+    }\
+    ChartData {\
+      Name         "sfEvent"\
+      Description  "ActiveChartEvent"\
+      SFName       ""\
+      Path         ""\
+      SrcLocation  ""\
+    }\
+    ChartData {\
+      Name         "doneDoubleBufferReInit"\
+      Description  "DoubleBufferInitCheck"\
+      SFName       ""\
+      Path         ""\
+      SrcLocation  ""\
+    }\
+  }
+  %return ChartDataElements
+%endfunction

[ADM] Integrated Logic/slprj/_sfprj/ADM_AccelerationLogic/_self/rtw/speedgoat/src/c14_ADM_AccelerationLogic.tlh

@@ -0,0 +1 @@
+