mirror of
https://github.com/Dev-KATECH/ADM.git
synced 2026-05-17 01:43:59 +09:00
Cruise_Control 파일 추가_추후 can 매칭 필요
This commit is contained in:
S2-CHICKEN
parent
20d57b9d5c
commit
10698e10f1
1
GW/Debug_FLASH/.gitignore
vendored
Normal file
1
GW/Debug_FLASH/.gitignore
vendored
Normal file
@ -0,0 +1 @@
|
||||
/src/
|
||||
@ -113,6 +113,7 @@
|
||||
"./src/main.o"
|
||||
"./src/HAL/watchdog_hal/src/watchdog_hal.o"
|
||||
"./src/IDB_RCU/BREAK_Speed.o"
|
||||
"./src/MCU/Cruise_Control.o"
|
||||
"./src/MCU/Low_SOC_mode.o"
|
||||
"./src/MCU/Motor_logic.o"
|
||||
"./src/MCU/NO_MCU_SIG.o"
|
||||
|
||||
Binary file not shown.
@ -77,11 +77,11 @@ C:/NXP/S32DS.3.4/S32DS/build_tools/gcc_v9.2/gcc-9.2-arm32-eabi/arm-none-eabi/new
|
||||
C:/NXP/S32DS.3.4/S32DS/build_tools/gcc_v9.2/gcc-9.2-arm32-eabi/arm-none-eabi/newlib/lib/thumb/v7e-m/nofp\libm.a(lib_a-s_round.o)
|
||||
./src/can.o (round)
|
||||
c:/nxp/s32ds.3.4/s32ds/build_tools/gcc_v9.2/gcc-9.2-arm32-eabi/bin/../lib/gcc/arm-none-eabi/9.2.0/thumb/v7e-m/nofp\libgcc.a(_arm_muldf3.o)
|
||||
./src/MCU/Low_SOC_mode.o (__aeabi_dmul)
|
||||
./src/MCU/Cruise_Control.o (__aeabi_dmul)
|
||||
c:/nxp/s32ds.3.4/s32ds/build_tools/gcc_v9.2/gcc-9.2-arm32-eabi/bin/../lib/gcc/arm-none-eabi/9.2.0/thumb/v7e-m/nofp\libgcc.a(_arm_mulsf3.o)
|
||||
./RTD/src/Clock_Ip_Specific.o (__aeabi_fmul)
|
||||
c:/nxp/s32ds.3.4/s32ds/build_tools/gcc_v9.2/gcc-9.2-arm32-eabi/bin/../lib/gcc/arm-none-eabi/9.2.0/thumb/v7e-m/nofp\libgcc.a(_arm_addsubdf3.o)
|
||||
C:/NXP/S32DS.3.4/S32DS/build_tools/gcc_v9.2/gcc-9.2-arm32-eabi/arm-none-eabi/newlib/lib/thumb/v7e-m/nofp\libc_nano.a(lib_a-strtod.o) (__aeabi_dsub)
|
||||
./src/MCU/Cruise_Control.o (__aeabi_dsub)
|
||||
c:/nxp/s32ds.3.4/s32ds/build_tools/gcc_v9.2/gcc-9.2-arm32-eabi/bin/../lib/gcc/arm-none-eabi/9.2.0/thumb/v7e-m/nofp\libgcc.a(_arm_muldivdf3.o)
|
||||
./src/board.o (__aeabi_ddiv)
|
||||
c:/nxp/s32ds.3.4/s32ds/build_tools/gcc_v9.2/gcc-9.2-arm32-eabi/bin/../lib/gcc/arm-none-eabi/9.2.0/thumb/v7e-m/nofp\libgcc.a(_arm_cmpdf2.o)
|
||||
@ -8262,6 +8262,27 @@ Discarded input sections
|
||||
.debug_macro 0x00000000 0xde ./src/IDB_RCU/BREAK_Speed.o
|
||||
.debug_macro 0x00000000 0x4b9 ./src/IDB_RCU/BREAK_Speed.o
|
||||
.debug_macro 0x00000000 0x7a ./src/IDB_RCU/BREAK_Speed.o
|
||||
.group 0x00000000 0xc ./src/MCU/Cruise_Control.o
|
||||
.group 0x00000000 0xc ./src/MCU/Cruise_Control.o
|
||||
.group 0x00000000 0xc ./src/MCU/Cruise_Control.o
|
||||
.text 0x00000000 0x4f8 ./src/MCU/Cruise_Control.o
|
||||
.data 0x00000000 0x0 ./src/MCU/Cruise_Control.o
|
||||
.bss 0x00000000 0x110 ./src/MCU/Cruise_Control.o
|
||||
.debug_info 0x00000000 0x3ee ./src/MCU/Cruise_Control.o
|
||||
.debug_abbrev 0x00000000 0xd8 ./src/MCU/Cruise_Control.o
|
||||
.debug_loc 0x00000000 0x22d ./src/MCU/Cruise_Control.o
|
||||
.debug_aranges
|
||||
0x00000000 0x20 ./src/MCU/Cruise_Control.o
|
||||
.debug_macro 0x00000000 0x23 ./src/MCU/Cruise_Control.o
|
||||
.debug_macro 0x00000000 0xaa8 ./src/MCU/Cruise_Control.o
|
||||
.debug_macro 0x00000000 0x10 ./src/MCU/Cruise_Control.o
|
||||
.debug_macro 0x00000000 0x5e ./src/MCU/Cruise_Control.o
|
||||
.debug_line 0x00000000 0x35e ./src/MCU/Cruise_Control.o
|
||||
.debug_str 0x00000000 0x3440 ./src/MCU/Cruise_Control.o
|
||||
.comment 0x00000000 0x81 ./src/MCU/Cruise_Control.o
|
||||
.debug_frame 0x00000000 0x54 ./src/MCU/Cruise_Control.o
|
||||
.ARM.attributes
|
||||
0x00000000 0x2e ./src/MCU/Cruise_Control.o
|
||||
.group 0x00000000 0xc ./src/MCU/Low_SOC_mode.o
|
||||
.group 0x00000000 0xc ./src/MCU/Low_SOC_mode.o
|
||||
.group 0x00000000 0xc ./src/MCU/Low_SOC_mode.o
|
||||
@ -9519,6 +9540,7 @@ LOAD ./src/can.o
|
||||
LOAD ./src/main.o
|
||||
LOAD ./src/HAL/watchdog_hal/src/watchdog_hal.o
|
||||
LOAD ./src/IDB_RCU/BREAK_Speed.o
|
||||
LOAD ./src/MCU/Cruise_Control.o
|
||||
LOAD ./src/MCU/Low_SOC_mode.o
|
||||
LOAD ./src/MCU/Motor_logic.o
|
||||
LOAD ./src/MCU/NO_MCU_SIG.o
|
||||
|
||||
@ -4,18 +4,21 @@
|
||||
|
||||
# Add inputs and outputs from these tool invocations to the build variables
|
||||
C_SRCS += \
|
||||
../src/MCU/Cruise_Control.c \
|
||||
../src/MCU/Low_SOC_mode.c \
|
||||
../src/MCU/Motor_logic.c \
|
||||
../src/MCU/NO_MCU_SIG.c \
|
||||
../src/MCU/SPEED.c
|
||||
|
||||
OBJS += \
|
||||
./src/MCU/Cruise_Control.o \
|
||||
./src/MCU/Low_SOC_mode.o \
|
||||
./src/MCU/Motor_logic.o \
|
||||
./src/MCU/NO_MCU_SIG.o \
|
||||
./src/MCU/SPEED.o
|
||||
|
||||
C_DEPS += \
|
||||
./src/MCU/Cruise_Control.d \
|
||||
./src/MCU/Low_SOC_mode.d \
|
||||
./src/MCU/Motor_logic.d \
|
||||
./src/MCU/NO_MCU_SIG.d \
|
||||
@ -26,7 +29,7 @@ C_DEPS += \
|
||||
src/MCU/%.o: ../src/MCU/%.c
|
||||
@echo 'Building file: $<'
|
||||
@echo 'Invoking: Standard S32DS C Compiler'
|
||||
arm-none-eabi-gcc "@src/MCU/Low_SOC_mode.args" -MMD -MP -MF"$(@:%.o=%.d)" -MT"$(@)" -o "$@" "$<"
|
||||
arm-none-eabi-gcc "@src/MCU/Cruise_Control.args" -MMD -MP -MF"$(@:%.o=%.d)" -MT"$(@)" -o "$@" "$<"
|
||||
@echo 'Finished building: $<'
|
||||
@echo ' '
|
||||
|
||||
|
||||
348
GW/src/MCU/Cruise_Control.c
Normal file
348
GW/src/MCU/Cruise_Control.c
Normal file
@ -0,0 +1,348 @@
|
||||
/*
|
||||
* Academic License - for use in teaching, academic research, and meeting
|
||||
* course requirements at degree granting institutions only. Not for
|
||||
* government, commercial, or other organizational use.
|
||||
*
|
||||
* File: TEST.c
|
||||
*
|
||||
* Code generated for Simulink model 'TEST'.
|
||||
*
|
||||
* Model version : 1.2
|
||||
* Simulink Coder version : 8.14 (R2018a) 06-Feb-2018
|
||||
* C/C++ source code generated on : Thu Aug 8 15:21:25 2024
|
||||
*
|
||||
* Target selection: ert.tlc
|
||||
* Embedded hardware selection: NXP->Cortex-M4
|
||||
* Code generation objectives: Unspecified
|
||||
* Validation result: Not run
|
||||
*/
|
||||
|
||||
#include "Cruise_Control.h"
|
||||
|
||||
/* Block signals and states (default storage) */
|
||||
CC_DW CC_rtDW;
|
||||
|
||||
/* External inputs (root inport signals with default storage) */
|
||||
CC_ExtU CC_rtU;
|
||||
|
||||
/* External outputs (root outports fed by signals with default storage) */
|
||||
CC_ExtY CC_rtY;
|
||||
|
||||
/* Model step function */
|
||||
void TEST_step(void)
|
||||
{
|
||||
real_T CC_rtb_Product4_j;
|
||||
real_T CC_rtb_Product1;
|
||||
real_T CC_rtb_Sum1_c;
|
||||
real_T CC_rtb_Sum1_ll;
|
||||
real_T CC_rtb_Sum1_pl;
|
||||
real_T CC_rtb_Gain;
|
||||
real_T CC_rtb_Subtract2;
|
||||
real_T CC_rtb_Product1_m;
|
||||
real_T CC_rtb_Product1_p;
|
||||
real_T CC_rtb_Sum1_g;
|
||||
real_T CC_rtb_Sum1_b;
|
||||
real_T CC_rtb_Sum1_j;
|
||||
real_T CC_rtb_Add3;
|
||||
real_T CC_rtb_Product1_j;
|
||||
|
||||
/* Product: '<S4>/Product1' incorporates:
|
||||
* Constant: '<S4>/Constant'
|
||||
* Gain: '<S4>/gain'
|
||||
* Inport: '<Root>/TargetSpd'
|
||||
* Product: '<S4>/Product11'
|
||||
* Sum: '<S4>/Sum1'
|
||||
* Sum: '<S4>/Sum2'
|
||||
* Sum: '<S4>/Sum3'
|
||||
* Sum: '<S4>/Sum4'
|
||||
* UnitDelay: '<S4>/d'
|
||||
* UnitDelay: '<S4>/d1'
|
||||
*/
|
||||
CC_rtb_Product1 = ((CC_rtU.CC_TargetSpd + CC_rtDW.CC_d1_DSTATE) * 0.002 +
|
||||
0.1041032953945969 * CC_rtDW.CC_d_DSTATE) /
|
||||
0.1081032953945969;
|
||||
|
||||
/* Sum: '<S16>/Sum1' incorporates:
|
||||
* Gain: '<S16>/gain'
|
||||
* Sum: '<S16>/Sum2'
|
||||
* UnitDelay: '<S16>/d'
|
||||
* UnitDelay: '<S16>/d1'
|
||||
*/
|
||||
CC_rtb_Sum1_c = (CC_rtb_Product1 - CC_rtDW.CC_d_DSTATE_c) * 1000.0 -
|
||||
CC_rtDW.CC_d1_DSTATE_h;
|
||||
|
||||
/* Sum: '<S17>/Sum1' incorporates:
|
||||
* Gain: '<S17>/gain'
|
||||
* Sum: '<S17>/Sum2'
|
||||
* UnitDelay: '<S17>/d'
|
||||
* UnitDelay: '<S17>/d1'
|
||||
*/
|
||||
CC_rtb_Sum1_ll = (CC_rtb_Sum1_c - CC_rtDW.CC_d_DSTATE_n) * 1000.0 -
|
||||
CC_rtDW.CC_d1_DSTATE_p;
|
||||
|
||||
/* Sum: '<S18>/Sum1' incorporates:
|
||||
* Gain: '<S18>/gain'
|
||||
* Sum: '<S18>/Sum2'
|
||||
* UnitDelay: '<S18>/d'
|
||||
* UnitDelay: '<S18>/d1'
|
||||
*/
|
||||
CC_rtb_Sum1_pl = (CC_rtb_Sum1_ll - CC_rtDW.CC_d_DSTATE_f) * 1000.0 -
|
||||
CC_rtDW.CC_d1_DSTATE_l;
|
||||
|
||||
/* Gain: '<S11>/Gain' incorporates:
|
||||
* Constant: '<S11>/Constant3'
|
||||
* Constant: '<S11>/Constant4'
|
||||
* Constant: '<S11>/Constant5'
|
||||
* Product: '<S11>/Product'
|
||||
* Product: '<S11>/Product1'
|
||||
* Product: '<S11>/Product2'
|
||||
* Sum: '<S11>/Add5'
|
||||
*/
|
||||
CC_rtb_Gain = (((156.8 * CC_rtb_Product1 + 212.8 * CC_rtb_Sum1_c) + 21.8 *
|
||||
CC_rtb_Sum1_ll) + CC_rtb_Sum1_pl) * 9.44822373393802E-6;
|
||||
|
||||
/* Product: '<S20>/Product1' incorporates:
|
||||
* Constant: '<S20>/Constant1'
|
||||
* Constant: '<S20>/Constant2'
|
||||
* Delay: '<S20>/Delay'
|
||||
* Delay: '<S20>/Delay1'
|
||||
* Delay: '<S20>/Delay2'
|
||||
* Delay: '<S20>/Delay3'
|
||||
* Gain: '<S20>/gain1'
|
||||
* Gain: '<S20>/gain3'
|
||||
* Product: '<S20>/x(n), x(n-1), x(n-2)'
|
||||
* Product: '<S20>/y(n-1)'
|
||||
* Product: '<S20>/y(n-2)'
|
||||
* Sum: '<S20>/Sum1'
|
||||
* Sum: '<S20>/Sum2'
|
||||
* Sum: '<S20>/Sum3'
|
||||
* Sum: '<S20>/Sum4'
|
||||
* Sum: '<S20>/Sum5'
|
||||
* Sum: '<S20>/Sum6'
|
||||
*/
|
||||
CC_rtb_Product1_m = ((((2.0 * CC_rtDW.CC_Delay1_DSTATE + CC_rtb_Gain) +
|
||||
CC_rtDW.CC_Delay_DSTATE[0]) * 0.14212230337568674 - -7.7157553932486262 *
|
||||
CC_rtDW.CC_Delay2_DSTATE) - 3.0759914204534549 *
|
||||
CC_rtDW.CC_Delay3_DSTATE[0]) / 5.2082531862979184;
|
||||
|
||||
/* Product: '<S19>/Product1' incorporates:
|
||||
* Constant: '<S19>/Constant'
|
||||
* Gain: '<S19>/gain'
|
||||
* Product: '<S19>/Product11'
|
||||
* Sum: '<S19>/Sum1'
|
||||
* Sum: '<S19>/Sum2'
|
||||
* Sum: '<S19>/Sum3'
|
||||
* Sum: '<S19>/Sum4'
|
||||
* UnitDelay: '<S19>/d'
|
||||
* UnitDelay: '<S19>/d1'
|
||||
*/
|
||||
CC_rtb_Product1_p = ((CC_rtb_Product1_m + CC_rtDW.CC_d1_DSTATE_o) * 0.002 +
|
||||
0.00861032953945969 * CC_rtDW.CC_d_DSTATE_cy) /
|
||||
0.01261032953945969;
|
||||
|
||||
/* Sum: '<S5>/Sum1' incorporates:
|
||||
* Gain: '<S5>/gain'
|
||||
* Sum: '<S5>/Sum2'
|
||||
* UnitDelay: '<S5>/d'
|
||||
* UnitDelay: '<S5>/d1'
|
||||
*/
|
||||
CC_rtb_Sum1_g = (CC_rtb_Product1 - CC_rtDW.CC_d_DSTATE_d) * 1000.0 -
|
||||
CC_rtDW.CC_d1_DSTATE_oq;
|
||||
|
||||
/* Sum: '<S6>/Sum1' incorporates:
|
||||
* Gain: '<S6>/gain'
|
||||
* Sum: '<S6>/Sum2'
|
||||
* UnitDelay: '<S6>/d'
|
||||
* UnitDelay: '<S6>/d1'
|
||||
*/
|
||||
CC_rtb_Sum1_b = (CC_rtb_Sum1_g - CC_rtDW.CC_d_DSTATE_m) * 1000.0 -
|
||||
CC_rtDW.CC_d1_DSTATE_k;
|
||||
|
||||
/* Sum: '<S7>/Sum1' incorporates:
|
||||
* Gain: '<S7>/gain'
|
||||
* Sum: '<S7>/Sum2'
|
||||
* UnitDelay: '<S7>/d'
|
||||
* UnitDelay: '<S7>/d1'
|
||||
*/
|
||||
CC_rtb_Sum1_j = (CC_rtb_Sum1_b - CC_rtDW.CC_d_DSTATE_cl) * 1000.0 -
|
||||
CC_rtDW.CC_d1_DSTATE_a;
|
||||
|
||||
/* Sum: '<S2>/Add3' incorporates:
|
||||
* Constant: '<S2>/Constant3'
|
||||
* Constant: '<S2>/Constant4'
|
||||
* Constant: '<S2>/Constant5'
|
||||
* Gain: '<S2>/Gain'
|
||||
* Memory: '<S1>/Memory'
|
||||
* Product: '<S2>/Product2'
|
||||
* Product: '<S2>/Product3'
|
||||
* Product: '<S2>/Product4'
|
||||
* Sum: '<S2>/Add2'
|
||||
*/
|
||||
CC_rtb_Add3 = (((156.8 * CC_rtb_Product1 + 212.8 * CC_rtb_Sum1_g) + 21.8 *
|
||||
CC_rtb_Sum1_b) + CC_rtb_Sum1_j) * 9.44822373393802E-6 -
|
||||
CC_rtDW.CC_Memory_PreviousInput;
|
||||
|
||||
/* Product: '<S8>/Product1' incorporates:
|
||||
* Constant: '<S8>/Constant'
|
||||
* Gain: '<S8>/gain'
|
||||
* Product: '<S8>/Product11'
|
||||
* Sum: '<S8>/Sum1'
|
||||
* Sum: '<S8>/Sum2'
|
||||
* Sum: '<S8>/Sum3'
|
||||
* Sum: '<S8>/Sum4'
|
||||
* UnitDelay: '<S8>/d'
|
||||
* UnitDelay: '<S8>/d1'
|
||||
*/
|
||||
CC_rtb_Product1_j = ((CC_rtb_Add3 + CC_rtDW.CC_d1_DSTATE_g) * 0.002 +
|
||||
0.061661977236758134 * CC_rtDW.CC_d_DSTATE_dp) /
|
||||
0.065661977236758137;
|
||||
|
||||
/* Product: '<S9>/Product1' incorporates:
|
||||
* Constant: '<S9>/Constant1'
|
||||
* Constant: '<S9>/Constant2'
|
||||
* Delay: '<S9>/Delay'
|
||||
* Delay: '<S9>/Delay1'
|
||||
* Delay: '<S9>/Delay2'
|
||||
* Delay: '<S9>/Delay3'
|
||||
* Gain: '<S9>/gain1'
|
||||
* Gain: '<S9>/gain3'
|
||||
* Product: '<S9>/x(n), x(n-1), x(n-2)'
|
||||
* Product: '<S9>/y(n-1)'
|
||||
* Product: '<S9>/y(n-2)'
|
||||
* Sum: '<S9>/Sum1'
|
||||
* Sum: '<S9>/Sum2'
|
||||
* Sum: '<S9>/Sum3'
|
||||
* Sum: '<S9>/Sum4'
|
||||
* Sum: '<S9>/Sum5'
|
||||
* Sum: '<S9>/Sum6'
|
||||
*/
|
||||
CC_rtb_Product4_j = ((((2.0 * CC_rtDW.CC_Delay1_DSTATE_c + CC_rtb_Product1_j)
|
||||
+ CC_rtDW.CC_Delay_DSTATE_o[0]) * 2.5266187266788758E-5 -
|
||||
-7.9999494676254663 * CC_rtDW.CC_Delay2_DSTATE_b) -
|
||||
3.9858101877483039 * CC_rtDW.CC_Delay3_DSTATE_b[0]) /
|
||||
4.01424034462623;
|
||||
|
||||
/* Sum: '<S1>/Subtract2' incorporates:
|
||||
* Inport: '<Root>/RPM_Fbk'
|
||||
* Product: '<S12>/Product'
|
||||
* Product: '<S1>/Product'
|
||||
* Sum: '<S1>/Subtract'
|
||||
* Sum: '<S3>/Add'
|
||||
*/
|
||||
CC_rtb_Subtract2 = ((CC_rtb_Product1 - CC_rtU.CC_RPM_Fbk) *
|
||||
0.027033512348390604 + CC_rtb_Product1_p) -
|
||||
CC_rtb_Product4_j;
|
||||
|
||||
/* Saturate: '<S1>/Saturation' */
|
||||
if (CC_rtb_Subtract2 > 20.0) {
|
||||
CC_rtb_Subtract2 = 20.0;
|
||||
} else {
|
||||
if (CC_rtb_Subtract2 < -20.0) {
|
||||
CC_rtb_Subtract2 = -20.0;
|
||||
}
|
||||
}
|
||||
|
||||
/* End of Saturate: '<S1>/Saturation' */
|
||||
|
||||
/* Outport: '<Root>/Torque_Cmd' */
|
||||
CC_rtY.CC_Torque_Cmd = CC_rtb_Subtract2;
|
||||
|
||||
/* Update for UnitDelay: '<S4>/d1' incorporates:
|
||||
* Inport: '<Root>/TargetSpd'
|
||||
*/
|
||||
CC_rtDW.CC_d1_DSTATE = CC_rtU.CC_TargetSpd;
|
||||
|
||||
/* Update for UnitDelay: '<S4>/d' */
|
||||
CC_rtDW.CC_d_DSTATE = CC_rtb_Product1;
|
||||
|
||||
/* Update for UnitDelay: '<S16>/d' */
|
||||
CC_rtDW.CC_d_DSTATE_c = CC_rtb_Product1;
|
||||
|
||||
/* Update for UnitDelay: '<S16>/d1' */
|
||||
CC_rtDW.CC_d1_DSTATE_h = CC_rtb_Sum1_c;
|
||||
|
||||
/* Update for UnitDelay: '<S17>/d' */
|
||||
CC_rtDW.CC_d_DSTATE_n = CC_rtb_Sum1_c;
|
||||
|
||||
/* Update for UnitDelay: '<S17>/d1' */
|
||||
CC_rtDW.CC_d1_DSTATE_p = CC_rtb_Sum1_ll;
|
||||
|
||||
/* Update for UnitDelay: '<S18>/d' */
|
||||
CC_rtDW.CC_d_DSTATE_f = CC_rtb_Sum1_ll;
|
||||
|
||||
/* Update for UnitDelay: '<S18>/d1' */
|
||||
CC_rtDW.CC_d1_DSTATE_l = CC_rtb_Sum1_pl;
|
||||
|
||||
/* Update for Delay: '<S20>/Delay1' */
|
||||
CC_rtDW.CC_Delay1_DSTATE = CC_rtb_Gain;
|
||||
|
||||
/* Update for Delay: '<S20>/Delay' */
|
||||
CC_rtDW.CC_Delay_DSTATE[0] = CC_rtDW.CC_Delay_DSTATE[1];
|
||||
CC_rtDW.CC_Delay_DSTATE[1] = CC_rtb_Gain;
|
||||
|
||||
/* Update for Delay: '<S20>/Delay2' */
|
||||
CC_rtDW.CC_Delay2_DSTATE = CC_rtb_Product1_m;
|
||||
|
||||
/* Update for Delay: '<S20>/Delay3' */
|
||||
CC_rtDW.CC_Delay3_DSTATE[0] = CC_rtDW.CC_Delay3_DSTATE[1];
|
||||
CC_rtDW.CC_Delay3_DSTATE[1] = CC_rtb_Product1_m;
|
||||
|
||||
/* Update for UnitDelay: '<S19>/d1' */
|
||||
CC_rtDW.CC_d1_DSTATE_o = CC_rtb_Product1_m;
|
||||
|
||||
/* Update for UnitDelay: '<S19>/d' */
|
||||
CC_rtDW.CC_d_DSTATE_cy = CC_rtb_Product1_p;
|
||||
|
||||
/* Update for Memory: '<S1>/Memory' */
|
||||
CC_rtDW.CC_Memory_PreviousInput = CC_rtb_Subtract2;
|
||||
|
||||
/* Update for UnitDelay: '<S5>/d' */
|
||||
CC_rtDW.CC_d_DSTATE_d = CC_rtb_Product1;
|
||||
|
||||
/* Update for UnitDelay: '<S5>/d1' */
|
||||
CC_rtDW.CC_d1_DSTATE_oq = CC_rtb_Sum1_g;
|
||||
|
||||
/* Update for UnitDelay: '<S6>/d' */
|
||||
CC_rtDW.CC_d_DSTATE_m = CC_rtb_Sum1_g;
|
||||
|
||||
/* Update for UnitDelay: '<S6>/d1' */
|
||||
CC_rtDW.CC_d1_DSTATE_k = CC_rtb_Sum1_b;
|
||||
|
||||
/* Update for UnitDelay: '<S7>/d' */
|
||||
CC_rtDW.CC_d_DSTATE_cl = CC_rtb_Sum1_b;
|
||||
|
||||
/* Update for UnitDelay: '<S7>/d1' */
|
||||
CC_rtDW.CC_d1_DSTATE_a = CC_rtb_Sum1_j;
|
||||
|
||||
/* Update for UnitDelay: '<S8>/d1' */
|
||||
CC_rtDW.CC_d1_DSTATE_g = CC_rtb_Add3;
|
||||
|
||||
/* Update for UnitDelay: '<S8>/d' */
|
||||
CC_rtDW.CC_d_DSTATE_dp = CC_rtb_Product1_j;
|
||||
|
||||
/* Update for Delay: '<S9>/Delay1' */
|
||||
CC_rtDW.CC_Delay1_DSTATE_c = CC_rtb_Product1_j;
|
||||
|
||||
/* Update for Delay: '<S9>/Delay' */
|
||||
CC_rtDW.CC_Delay_DSTATE_o[0] = CC_rtDW.CC_Delay_DSTATE_o[1];
|
||||
CC_rtDW.CC_Delay_DSTATE_o[1] = CC_rtb_Product1_j;
|
||||
|
||||
/* Update for Delay: '<S9>/Delay2' */
|
||||
CC_rtDW.CC_Delay2_DSTATE_b = CC_rtb_Product4_j;
|
||||
|
||||
/* Update for Delay: '<S9>/Delay3' */
|
||||
CC_rtDW.CC_Delay3_DSTATE_b[0] = CC_rtDW.CC_Delay3_DSTATE_b[1];
|
||||
CC_rtDW.CC_Delay3_DSTATE_b[1] = CC_rtb_Product4_j;
|
||||
}
|
||||
|
||||
/* Model initialize function */
|
||||
void TEST_initialize(void)
|
||||
{
|
||||
/* (no initialization code required) */
|
||||
}
|
||||
|
||||
/*
|
||||
* File trailer for generated code.
|
||||
*
|
||||
* [EOF]
|
||||
*/
|
||||
168
GW/src/MCU/Cruise_Control.h
Normal file
168
GW/src/MCU/Cruise_Control.h
Normal file
@ -0,0 +1,168 @@
|
||||
/*
|
||||
* Academic License - for use in teaching, academic research, and meeting
|
||||
* course requirements at degree granting institutions only. Not for
|
||||
* government, commercial, or other organizational use.
|
||||
*
|
||||
* File: TEST.h
|
||||
*
|
||||
* Code generated for Simulink model 'TEST'.
|
||||
*
|
||||
* Model version : 1.2
|
||||
* Simulink Coder version : 8.14 (R2018a) 06-Feb-2018
|
||||
* C/C++ source code generated on : Thu Aug 8 15:21:25 2024
|
||||
*
|
||||
* Target selection: ert.tlc
|
||||
* Embedded hardware selection: NXP->Cortex-M4
|
||||
* Code generation objectives: Unspecified
|
||||
* Validation result: Not run
|
||||
*/
|
||||
|
||||
#ifndef RTW_HEADER_TEST_h_
|
||||
#define RTW_HEADER_TEST_h_
|
||||
#ifndef TEST_COMMON_INCLUDES_
|
||||
# define TEST_COMMON_INCLUDES_
|
||||
#include "rtwtypes.h"
|
||||
#endif /* TEST_COMMON_INCLUDES_ */
|
||||
|
||||
/* Macros for accessing real-time model data structure */
|
||||
|
||||
/* Block signals and states (default storage) for system '<Root>' */
|
||||
typedef struct {
|
||||
real_T CC_Delay_DSTATE[2]; /* '<S20>/Delay' */
|
||||
real_T CC_Delay3_DSTATE[2]; /* '<S20>/Delay3' */
|
||||
real_T CC_Delay_DSTATE_o[2]; /* '<S9>/Delay' */
|
||||
real_T CC_Delay3_DSTATE_b[2]; /* '<S9>/Delay3' */
|
||||
real_T CC_d1_DSTATE; /* '<S4>/d1' */
|
||||
real_T CC_d_DSTATE; /* '<S4>/d' */
|
||||
real_T CC_d_DSTATE_c; /* '<S16>/d' */
|
||||
real_T CC_d1_DSTATE_h; /* '<S16>/d1' */
|
||||
real_T CC_d_DSTATE_n; /* '<S17>/d' */
|
||||
real_T CC_d1_DSTATE_p; /* '<S17>/d1' */
|
||||
real_T CC_d_DSTATE_f; /* '<S18>/d' */
|
||||
real_T CC_d1_DSTATE_l; /* '<S18>/d1' */
|
||||
real_T CC_Delay1_DSTATE; /* '<S20>/Delay1' */
|
||||
real_T CC_Delay2_DSTATE; /* '<S20>/Delay2' */
|
||||
real_T CC_d1_DSTATE_o; /* '<S19>/d1' */
|
||||
real_T CC_d_DSTATE_cy; /* '<S19>/d' */
|
||||
real_T CC_d_DSTATE_d; /* '<S5>/d' */
|
||||
real_T CC_d1_DSTATE_oq; /* '<S5>/d1' */
|
||||
real_T CC_d_DSTATE_m; /* '<S6>/d' */
|
||||
real_T CC_d1_DSTATE_k; /* '<S6>/d1' */
|
||||
real_T CC_d_DSTATE_cl; /* '<S7>/d' */
|
||||
real_T CC_d1_DSTATE_a; /* '<S7>/d1' */
|
||||
real_T CC_d1_DSTATE_g; /* '<S8>/d1' */
|
||||
real_T CC_d_DSTATE_dp; /* '<S8>/d' */
|
||||
real_T CC_Delay1_DSTATE_c; /* '<S9>/Delay1' */
|
||||
real_T CC_Delay2_DSTATE_b; /* '<S9>/Delay2' */
|
||||
real_T CC_Memory_PreviousInput; /* '<S1>/Memory' */
|
||||
} CC_DW;
|
||||
|
||||
/* External inputs (root inport signals with default storage) */
|
||||
typedef struct {
|
||||
real_T CC_TargetSpd; /* '<Root>/TargetSpd' */
|
||||
real_T CC_RPM_Fbk; /* '<Root>/RPM_Fbk' */
|
||||
} CC_ExtU;
|
||||
|
||||
/* External outputs (root outports fed by signals with default storage) */
|
||||
typedef struct {
|
||||
real_T CC_Torque_Cmd; /* '<Root>/Torque_Cmd' */
|
||||
} CC_ExtY;
|
||||
|
||||
/* Block signals and states (default storage) */
|
||||
extern CC_DW CC_rtDW;
|
||||
|
||||
/* External inputs (root inport signals with default storage) */
|
||||
extern CC_ExtU CC_rtU;
|
||||
|
||||
/* External outputs (root outports fed by signals with default storage) */
|
||||
extern CC_ExtY CC_rtY;
|
||||
|
||||
/* Model entry point functions */
|
||||
extern void TEST_initialize(void);
|
||||
extern void TEST_step(void);
|
||||
|
||||
/*-
|
||||
* These blocks were eliminated from the model due to optimizations:
|
||||
*
|
||||
* Block '<S3>/Constant1' : Unused code path elimination
|
||||
* Block '<S3>/Constant16' : Unused code path elimination
|
||||
* Block '<S3>/Constant17' : Unused code path elimination
|
||||
* Block '<S3>/Constant2' : Unused code path elimination
|
||||
* Block '<S1>/ControlFlag' : Eliminated nontunable gain of 1
|
||||
* Block '<S10>/Multiport Switch1' : Eliminated due to constant selection input
|
||||
* Block '<S3>/FBGain' : Eliminated nontunable gain of 1
|
||||
* Block '<S11>/FFGain' : Eliminated nontunable gain of 1
|
||||
* Block '<S3>/BW_PI' : Unused code path elimination
|
||||
* Block '<S13>/Add' : Unused code path elimination
|
||||
* Block '<S13>/Constant' : Unused code path elimination
|
||||
* Block '<S13>/Divide1' : Unused code path elimination
|
||||
* Block '<S13>/Divide2' : Unused code path elimination
|
||||
* Block '<S14>/Constant' : Unused code path elimination
|
||||
* Block '<S14>/Constant1' : Unused code path elimination
|
||||
* Block '<S14>/Constant2' : Unused code path elimination
|
||||
* Block '<S14>/Product1' : Unused code path elimination
|
||||
* Block '<S14>/Product11' : Unused code path elimination
|
||||
* Block '<S14>/Product2' : Unused code path elimination
|
||||
* Block '<S14>/Product3' : Unused code path elimination
|
||||
* Block '<S14>/Sum1' : Unused code path elimination
|
||||
* Block '<S14>/Sum2' : Unused code path elimination
|
||||
* Block '<S14>/Sum3' : Unused code path elimination
|
||||
* Block '<S14>/Sum4' : Unused code path elimination
|
||||
* Block '<S14>/d' : Unused code path elimination
|
||||
* Block '<S14>/d1' : Unused code path elimination
|
||||
* Block '<S14>/gain2' : Unused code path elimination
|
||||
* Block '<S14>/gain3' : Unused code path elimination
|
||||
* Block '<S15>/Sum1' : Unused code path elimination
|
||||
* Block '<S15>/Sum2' : Unused code path elimination
|
||||
* Block '<S15>/d' : Unused code path elimination
|
||||
* Block '<S15>/d1' : Unused code path elimination
|
||||
* Block '<S15>/gain' : Unused code path elimination
|
||||
* Block '<S13>/Ki' : Unused code path elimination
|
||||
* Block '<S13>/Kp' : Unused code path elimination
|
||||
* Block '<S13>/gain ' : Unused code path elimination
|
||||
* Block '<S3>/Selector' : Unused code path elimination
|
||||
*/
|
||||
|
||||
/*-
|
||||
* The generated code includes comments that allow you to trace directly
|
||||
* back to the appropriate location in the model. The basic format
|
||||
* is <system>/block_name, where system is the system number (uniquely
|
||||
* assigned by Simulink) and block_name is the name of the block.
|
||||
*
|
||||
* Use the MATLAB hilite_system command to trace the generated code back
|
||||
* to the model. For example,
|
||||
*
|
||||
* hilite_system('<S3>') - opens system 3
|
||||
* hilite_system('<S3>/Kp') - opens and selects block Kp which resides in S3
|
||||
*
|
||||
* Here is the system hierarchy for this model
|
||||
*
|
||||
* '<Root>' : 'TEST'
|
||||
* '<S1>' : 'TEST/Cruise_Control'
|
||||
* '<S2>' : 'TEST/Cruise_Control/DOB'
|
||||
* '<S3>' : 'TEST/Cruise_Control/FF+PID Controller'
|
||||
* '<S4>' : 'TEST/Cruise_Control/LPFM'
|
||||
* '<S5>' : 'TEST/Cruise_Control/DOB/Dot3'
|
||||
* '<S6>' : 'TEST/Cruise_Control/DOB/Dot4'
|
||||
* '<S7>' : 'TEST/Cruise_Control/DOB/Dot5'
|
||||
* '<S8>' : 'TEST/Cruise_Control/DOB/LPFM'
|
||||
* '<S9>' : 'TEST/Cruise_Control/DOB/Second order LPF'
|
||||
* '<S10>' : 'TEST/Cruise_Control/FF+PID Controller/FB'
|
||||
* '<S11>' : 'TEST/Cruise_Control/FF+PID Controller/FF'
|
||||
* '<S12>' : 'TEST/Cruise_Control/FF+PID Controller/FB/P'
|
||||
* '<S13>' : 'TEST/Cruise_Control/FF+PID Controller/FB/PI'
|
||||
* '<S14>' : 'TEST/Cruise_Control/FF+PID Controller/FB/PI/HPF'
|
||||
* '<S15>' : 'TEST/Cruise_Control/FF+PID Controller/FB/PI/Integrator1'
|
||||
* '<S16>' : 'TEST/Cruise_Control/FF+PID Controller/FF/Dot'
|
||||
* '<S17>' : 'TEST/Cruise_Control/FF+PID Controller/FF/Dot2'
|
||||
* '<S18>' : 'TEST/Cruise_Control/FF+PID Controller/FF/Dot3'
|
||||
* '<S19>' : 'TEST/Cruise_Control/FF+PID Controller/FF/LPFM'
|
||||
* '<S20>' : 'TEST/Cruise_Control/FF+PID Controller/FF/Second order LPF'
|
||||
*/
|
||||
#endif /* RTW_HEADER_TEST_h_ */
|
||||
|
||||
/*
|
||||
* File trailer for generated code.
|
||||
*
|
||||
* [EOF]
|
||||
*/
|
||||
Loading…
Reference in New Issue
Block a user