Flexio_Mcl_Ip_ClearPinStatus (struct FLEXIO_Type * baseAddr, uint8 pin)
{
  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = baseAddr->PINSTAT;
  _2 = (int) pin;
  _3 = 1 << _2;
  _4 = (unsigned char) _3;
  _5 = (long unsigned int) _4;
  _6 = _1 | _5;
  baseAddr->PINSTAT = _6;
  return;

}


Flexio_Mcl_Ip_SetTimerDMARequest (struct FLEXIO_Type * baseAddr, uint8 requestMask, boolean enable)
{
  uint32 tmp;

  <bb 2> :
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_46 ();
  # DEBUG BEGIN_STMT
  tmp = baseAddr->TIMERSDEN;
  # DEBUG BEGIN_STMT
  if (enable != 0)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  # DEBUG BEGIN_STMT
  _1 = (long unsigned int) requestMask;
  tmp = tmp | _1;
  goto <bb 5>; [INV]

  <bb 4> :
  # DEBUG BEGIN_STMT
  _2 = (long unsigned int) requestMask;
  _3 = ~_2;
  tmp = tmp & _3;

  <bb 5> :
  # DEBUG BEGIN_STMT
  baseAddr->TIMERSDEN = tmp;
  # DEBUG BEGIN_STMT
  SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_46 ();
  return;

}


Flexio_Mcl_Ip_Init (struct FLEXIO_Type * baseAddr)
{
  <bb 2> :
  # DEBUG BEGIN_STMT
  Flexio_Mcl_Ip_SetSoftwareReset (baseAddr, 1);
  # DEBUG BEGIN_STMT
  baseAddr->CTRL = 0;
  return;

}


Flexio_Mcl_Ip_SetTimerInterrupt (struct FLEXIO_Type * baseAddr, uint8 interruptMask, boolean enable)
{
  uint32 tmp;

  <bb 2> :
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_45 ();
  # DEBUG BEGIN_STMT
  tmp = baseAddr->TIMIEN;
  # DEBUG BEGIN_STMT
  if (enable != 0)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  # DEBUG BEGIN_STMT
  _1 = (long unsigned int) interruptMask;
  tmp = tmp | _1;
  goto <bb 5>; [INV]

  <bb 4> :
  # DEBUG BEGIN_STMT
  _2 = (long unsigned int) interruptMask;
  _3 = ~_2;
  tmp = tmp & _3;

  <bb 5> :
  # DEBUG BEGIN_STMT
  baseAddr->TIMIEN = tmp;
  # DEBUG BEGIN_STMT
  SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_45 ();
  return;

}


Flexio_Mcl_Ip_GetAllTimerInterrupt (const struct FLEXIO_Type * baseAddr)
{
  uint32 D.4781;

  <bb 2> :
  # DEBUG BEGIN_STMT
  D.4781 = baseAddr->TIMIEN;
  return D.4781;

}


Flexio_Mcl_Ip_SetShifterDMARequest (struct FLEXIO_Type * baseAddr, uint8 requestMask, boolean enable)
{
  uint32 tmp;

  <bb 2> :
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_44 ();
  # DEBUG BEGIN_STMT
  tmp = baseAddr->SHIFTSDEN;
  # DEBUG BEGIN_STMT
  if (enable != 0)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  # DEBUG BEGIN_STMT
  _1 = (long unsigned int) requestMask;
  tmp = tmp | _1;
  goto <bb 5>; [INV]

  <bb 4> :
  # DEBUG BEGIN_STMT
  _2 = (long unsigned int) requestMask;
  _3 = ~_2;
  tmp = tmp & _3;

  <bb 5> :
  # DEBUG BEGIN_STMT
  baseAddr->SHIFTSDEN = tmp;
  # DEBUG BEGIN_STMT
  SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_44 ();
  return;

}


Flexio_Mcl_Ip_GetAllPinsInterrupt (const struct FLEXIO_Type * baseAddr)
{
  uint32 D.4776;

  <bb 2> :
  # DEBUG BEGIN_STMT
  D.4776 = baseAddr->PINIEN;
  return D.4776;

}


Flexio_Mcl_Ip_GetAllPinsStatus (const struct FLEXIO_Type * baseAddr)
{
  uint32 D.4774;

  <bb 2> :
  # DEBUG BEGIN_STMT
  D.4774 = baseAddr->PINSTAT;
  return D.4774;

}


Flexio_Mcl_Ip_SetShifterInterrupt (struct FLEXIO_Type * baseAddr, uint8 interruptMask, boolean enable)
{
  uint32 tmp;

  <bb 2> :
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_43 ();
  # DEBUG BEGIN_STMT
  tmp = baseAddr->SHIFTSIEN;
  # DEBUG BEGIN_STMT
  if (enable != 0)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  # DEBUG BEGIN_STMT
  _1 = (long unsigned int) interruptMask;
  tmp = tmp | _1;
  goto <bb 5>; [INV]

  <bb 4> :
  # DEBUG BEGIN_STMT
  _2 = (long unsigned int) interruptMask;
  _3 = ~_2;
  tmp = tmp & _3;

  <bb 5> :
  # DEBUG BEGIN_STMT
  baseAddr->SHIFTSIEN = tmp;
  # DEBUG BEGIN_STMT
  SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_43 ();
  return;

}


Flexio_Mcl_Ip_SetShifterErrorInterrupt (struct FLEXIO_Type * baseAddr, uint8 interruptMask, boolean enable)
{
  uint32 tmp;

  <bb 2> :
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_42 ();
  # DEBUG BEGIN_STMT
  tmp = baseAddr->SHIFTEIEN;
  # DEBUG BEGIN_STMT
  if (enable != 0)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  # DEBUG BEGIN_STMT
  _1 = (long unsigned int) interruptMask;
  tmp = tmp | _1;
  goto <bb 5>; [INV]

  <bb 4> :
  # DEBUG BEGIN_STMT
  _2 = (long unsigned int) interruptMask;
  _3 = ~_2;
  tmp = tmp & _3;

  <bb 5> :
  # DEBUG BEGIN_STMT
  baseAddr->SHIFTEIEN = tmp;
  # DEBUG BEGIN_STMT
  SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_42 ();
  return;

}


Flexio_Mcl_Ip_GetAllShifterErrorInterrupt (const struct FLEXIO_Type * baseAddr)
{
  uint32 D.4766;

  <bb 2> :
  # DEBUG BEGIN_STMT
  D.4766 = baseAddr->SHIFTEIEN;
  return D.4766;

}


Flexio_Mcl_Ip_GetAllShifterInterrupt (const struct FLEXIO_Type * baseAddr)
{
  uint32 D.4764;

  <bb 2> :
  # DEBUG BEGIN_STMT
  D.4764 = baseAddr->SHIFTSIEN;
  return D.4764;

}


Flexio_Mcl_Ip_ClearTimerStatus (struct FLEXIO_Type * baseAddr, uint8 timer)
{
  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) timer;
  _2 = 1 << _1;
  baseAddr->TIMSTAT = _2;
  return;

}


Flexio_Mcl_Ip_GetAllTimerStatus (const struct FLEXIO_Type * baseAddr)
{
  uint32 D.4762;

  <bb 2> :
  # DEBUG BEGIN_STMT
  D.4762 = baseAddr->TIMSTAT;
  return D.4762;

}


Flexio_Mcl_Ip_GetTimerInterruptEnable (const struct FLEXIO_Type * baseAddr, uint8 timer)
{
  boolean D.4760;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = baseAddr->TIMIEN;
  _2 = (int) timer;
  _3 = _1 >> _2;
  _4 = _3 & 1;
  D.4760 = _4 != 0;
  return D.4760;

}


Flexio_Mcl_Ip_GetTimerStatus (const struct FLEXIO_Type * baseAddr, uint8 timer)
{
  boolean D.4758;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = baseAddr->TIMSTAT;
  _2 = (int) timer;
  _3 = _1 >> _2;
  _4 = _3 & 1;
  D.4758 = _4 != 0;
  return D.4758;

}


Flexio_Mcl_Ip_ClearShifterErrorStatus (struct FLEXIO_Type * baseAddr, uint8 shifter)
{
  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) shifter;
  _2 = 1 << _1;
  baseAddr->SHIFTERR = _2;
  return;

}


Flexio_Mcl_Ip_GetAllShifterErrorStatus (const struct FLEXIO_Type * baseAddr)
{
  uint32 D.4756;

  <bb 2> :
  # DEBUG BEGIN_STMT
  D.4756 = baseAddr->SHIFTERR;
  return D.4756;

}


Flexio_Mcl_Ip_GetShifterErrorStatus (const struct FLEXIO_Type * baseAddr, uint8 shifter)
{
  boolean D.4754;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = baseAddr->SHIFTERR;
  _2 = (int) shifter;
  _3 = _1 >> _2;
  _4 = _3 & 1;
  D.4754 = _4 != 0;
  return D.4754;

}


Flexio_Mcl_Ip_ClearShifterStatus (struct FLEXIO_Type * baseAddr, uint8 shifter)
{
  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) shifter;
  _2 = 1 << _1;
  baseAddr->SHIFTSTAT = _2;
  return;

}


Flexio_Mcl_Ip_GetAllShifterStatus (const struct FLEXIO_Type * baseAddr)
{
  uint32 D.4752;

  <bb 2> :
  # DEBUG BEGIN_STMT
  D.4752 = baseAddr->SHIFTSTAT;
  return D.4752;

}


Flexio_Mcl_Ip_GetShifterStatus (const struct FLEXIO_Type * baseAddr, uint8 shifter)
{
  boolean D.4750;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = baseAddr->SHIFTSTAT;
  _2 = (int) shifter;
  _3 = _1 >> _2;
  _4 = _3 & 1;
  D.4750 = _4 != 0;
  return D.4750;

}


Flexio_Mcl_Ip_SetEnable (struct FLEXIO_Type * baseAddr, boolean enable)
{
  uint32 regValue;
  long unsigned int iftmp.2;

  <bb 2> :
  # DEBUG BEGIN_STMT
  SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_41 ();
  # DEBUG BEGIN_STMT
  regValue = baseAddr->CTRL;
  # DEBUG BEGIN_STMT
  regValue = regValue & 4294967294;
  # DEBUG BEGIN_STMT
  if (enable != 0)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  iftmp.2 = 1;
  goto <bb 5>; [INV]

  <bb 4> :
  iftmp.2 = 0;

  <bb 5> :
  regValue = iftmp.2 | regValue;
  # DEBUG BEGIN_STMT
  baseAddr->CTRL = regValue;
  # DEBUG BEGIN_STMT
  SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_41 ();
  return;

}


Flexio_Mcl_Ip_SetDebugEnable (struct FLEXIO_Type * baseAddr, boolean enable)
{
  uint32 regValue;
  long unsigned int iftmp.1;

  <bb 2> :
  # DEBUG BEGIN_STMT
  SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_40 ();
  # DEBUG BEGIN_STMT
  regValue = baseAddr->CTRL;
  # DEBUG BEGIN_STMT
  regValue = regValue & 3221225471;
  # DEBUG BEGIN_STMT
  if (enable != 0)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  iftmp.1 = 1073741824;
  goto <bb 5>; [INV]

  <bb 4> :
  iftmp.1 = 0;

  <bb 5> :
  regValue = iftmp.1 | regValue;
  # DEBUG BEGIN_STMT
  baseAddr->CTRL = regValue;
  # DEBUG BEGIN_STMT
  SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_40 ();
  return;

}


Flexio_Mcl_Ip_SetSoftwareReset (struct FLEXIO_Type * baseAddr, boolean enable)
{
  uint32 regValue;
  long unsigned int iftmp.0;

  <bb 2> :
  # DEBUG BEGIN_STMT
  SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_39 ();
  # DEBUG BEGIN_STMT
  regValue = baseAddr->CTRL;
  # DEBUG BEGIN_STMT
  regValue = regValue & 4294967293;
  # DEBUG BEGIN_STMT
  if (enable != 0)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  iftmp.0 = 2;
  goto <bb 5>; [INV]

  <bb 4> :
  iftmp.0 = 0;

  <bb 5> :
  regValue = iftmp.0 | regValue;
  # DEBUG BEGIN_STMT
  baseAddr->CTRL = regValue;
  # DEBUG BEGIN_STMT
  SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_39 ();
  return;

}


