
Marking local functions: Emios_Pwm_Ip_SetDutyCycleDaoc Emios_Pwm_Ip_InitDoubleCompareMode Emios_Pwm_Ip_SetDutyCycleOpwmt Emios_Pwm_Ip_InitTriggerMode Emios_Pwm_Ip_SetDutyCycleOpwmb Emios_Pwm_Ip_InitEdgePlacementMode Emios_Pwm_Ip_SetDutyCycleOpwmcb Emios_Pwm_Ip_InitDeadTimeMode Emios_Pwm_Ip_SetDutyCycleOpwfmb Emios_Pwm_Ip_InitPeriodDutyCycleMode Emios_Pwm_Ip_GetCounterBusMode Emios_Pwm_Ip_GetCounterBusPeriod Emios_Pwm_Ip_SetPrescalerSource Emios_Pwm_Ip_SetExtendedPrescaler Emios_Pwm_Ip_GetTrigger Emios_Pwm_Ip_SetTrigger Emios_Pwm_Ip_ClearFlagEvent Emios_Pwm_Ip_GetOutputPinState Emios_Pwm_Ip_GetChannelPwmMode Emios_Pwm_Ip_SetPwmModePol Emios_Pwm_Ip_GetPwmMode Emios_Pwm_Ip_SetPwmMode Emios_Pwm_Ip_SetEdgePolarity Emios_Pwm_Ip_GetCounterBus Emios_Pwm_Ip_SetCounterBus Emios_Pwm_Ip_SetForceMatchB Emios_Pwm_Ip_SetForceMatchA Emios_Pwm_Ip_GetInterruptRequest Emios_Pwm_Ip_SetInterruptRequest Emios_Pwm_Ip_GetDMARequest Emios_Pwm_Ip_SetDMARequest Emios_Pwm_Ip_SetPrescalerEnable Emios_Pwm_Ip_SetOutDisableSource Emios_Pwm_Ip_SetOutDisable Emios_Pwm_Ip_SetFreezeEnable Emios_Pwm_Ip_GetUCRegB Emios_Pwm_Ip_SetUCRegB Emios_Pwm_Ip_GetUCRegA Emios_Pwm_Ip_SetUCRegA Emios_Pwm_Ip_GetOutputUpdateInstance Emios_Pwm_Ip_SetOutputUpdate Emios_Pwm_Ip_GetDebugMode


Marking externally visible functions: Emios_Pwm_Ip_SyncUpdate Emios_Pwm_Ip_ComparatorTransferDisable Emios_Pwm_Ip_ComparatorTransferEnable Emios_Pwm_Ip_SetClockPs Emios_Pwm_Ip_SetBusSelected Emios_Pwm_Ip_SetPreEnableClock Emios_Pwm_Ip_GetMasterBusChannel Emios_Pwm_Ip_GetChannelMode Emios_Pwm_Ip_SetOutputToNormal Emios_Pwm_Ip_SetOutputState Emios_Pwm_Ip_GetOutputState Emios_Pwm_Ip_SetFlagRequest Emios_Pwm_Ip_GetFlagRequest Emios_Pwm_Ip_ChannelStopDebugMode Emios_Pwm_Ip_ChannelEnterDebugMode Emios_Pwm_Ip_SetTriggerPlacement Emios_Pwm_Ip_GetTriggerPlacement Emios_Pwm_Ip_SetDeadTime Emios_Pwm_Ip_GetDeadTime Emios_Pwm_Ip_SetPhaseShift Emios_Pwm_Ip_GetPhaseShift Emios_Pwm_Ip_SetDutyCycle Emios_Pwm_Ip_GetDutyCycle Emios_Pwm_Ip_SetPeriod Emios_Pwm_Ip_GetPeriod Emios_Pwm_Ip_ForceMatchTrailingEdge Emios_Pwm_Ip_ForceMatchLeadingEdge Emios_Pwm_Ip_DeInitChannel Emios_Pwm_Ip_InitChannel


Marking externally visible variables: Emios_Pwm_Ip_aCheckState Emios_Pwm_Ip_aPolarity Emios_Pwm_Ip_aCheckEnableNotif Emios_Pwm_Ip_aNotif Emios_Pwm_Ip_aDaocDuty Emios_Pwm_Ip_aRegA Emios_Pwm_Ip_aPeriod Emios_Pwm_Ip_aNotificationPtr Emios_Pwm_Ip_aBasePtr


Reclaiming functions:
Reclaiming variables:
Clearing address taken flags:
Symbol table:

SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_30/126 (SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_30) @07fb6620
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Emios_Pwm_Ip_ComparatorTransferDisable/89 
  Calls: 
Emios_Mcl_Ip_ComparatorTransferDisable/125 (Emios_Mcl_Ip_ComparatorTransferDisable) @07fb6540
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Emios_Pwm_Ip_ComparatorTransferDisable/89 
  Calls: 
SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_30/124 (SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_30) @07fb6460
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Emios_Pwm_Ip_ComparatorTransferDisable/89 
  Calls: 
SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_29/123 (SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_29) @07fb62a0
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Emios_Pwm_Ip_ComparatorTransferEnable/88 
  Calls: 
Emios_Mcl_Ip_ComparatorTransferEnable/122 (Emios_Mcl_Ip_ComparatorTransferEnable) @07fb61c0
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Emios_Pwm_Ip_SyncUpdate/90 Emios_Pwm_Ip_SyncUpdate/90 Emios_Pwm_Ip_SyncUpdate/90 Emios_Pwm_Ip_ComparatorTransferEnable/88 
  Calls: 
SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_29/121 (SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_29) @07fb60e0
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Emios_Pwm_Ip_ComparatorTransferEnable/88 
  Calls: 
SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_28/120 (SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_28) @07facee0
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Emios_Pwm_Ip_SetClockPs/87 
  Calls: 
SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_28/119 (SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_28) @07face00
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Emios_Pwm_Ip_SetClockPs/87 
  Calls: 
SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_27/118 (SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_27) @07facc40
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Emios_Pwm_Ip_SetBusSelected/86 
  Calls: 
SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_27/117 (SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_27) @07facb60
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Emios_Pwm_Ip_SetBusSelected/86 
  Calls: 
SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_26/116 (SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_26) @07fac9a0
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Emios_Pwm_Ip_SetPreEnableClock/85 
  Calls: 
SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_26/115 (SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_26) @07fac8c0
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Emios_Pwm_Ip_SetPreEnableClock/85 
  Calls: 
SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_25/114 (SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_25) @07fac460
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Emios_Pwm_Ip_SetOutputToNormal/82 
  Calls: 
SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_25/113 (SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_25) @07fac380
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Emios_Pwm_Ip_SetOutputToNormal/82 
  Calls: 
SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_24/112 (SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_24) @07fac1c0
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Emios_Pwm_Ip_SetOutputState/81 
  Calls: 
SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_24/111 (SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_24) @07fac0e0
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Emios_Pwm_Ip_SetOutputState/81 
  Calls: 
SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_23/110 (SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_23) @07fa0d20
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Emios_Pwm_Ip_SetFlagRequest/79 
  Calls: 
SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_23/109 (SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_23) @07fa0c40
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Emios_Pwm_Ip_SetFlagRequest/79 
  Calls: 
SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_22/108 (SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_22) @07fa07e0
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Emios_Pwm_Ip_ChannelStopDebugMode/77 
  Calls: 
SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_22/107 (SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_22) @07fa0700
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Emios_Pwm_Ip_ChannelStopDebugMode/77 
  Calls: 
SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_21/106 (SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_21) @07fa0380
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Emios_Pwm_Ip_ChannelEnterDebugMode/76 
  Calls: 
SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_21/105 (SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_21) @07fa02a0
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Emios_Pwm_Ip_ChannelEnterDebugMode/76 
  Calls: 
SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_20/104 (SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_20) @07fa00e0
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Emios_Pwm_Ip_SetTriggerPlacement/75 
  Calls: 
SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_20/103 (SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_20) @07fa0000
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Emios_Pwm_Ip_SetTriggerPlacement/75 
  Calls: 
SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_19/102 (SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_19) @07f85e00
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Emios_Pwm_Ip_SetDeadTime/73 
  Calls: 
SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_19/101 (SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_19) @07f85d20
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Emios_Pwm_Ip_SetDeadTime/73 
  Calls: 
SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_18/100 (SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_18) @07f85a80
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Emios_Pwm_Ip_SetPhaseShift/71 
  Calls: 
SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_18/99 (SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_18) @07f859a0
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Emios_Pwm_Ip_SetPhaseShift/71 
  Calls: 
SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_17/98 (SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_17) @07f74e00
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Emios_Pwm_Ip_SetDutyCycle/69 
  Calls: 
SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_17/97 (SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_17) @07f74d20
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Emios_Pwm_Ip_SetDutyCycle/69 
  Calls: 
SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_16/96 (SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_16) @07f749a0
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Emios_Pwm_Ip_SetPeriod/67 
  Calls: 
SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_16/95 (SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_16) @07f748c0
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Emios_Pwm_Ip_SetPeriod/67 
  Calls: 
SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_15/94 (SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_15) @07f74460
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Emios_Pwm_Ip_ForceMatchTrailingEdge/65 
  Calls: 
SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_15/93 (SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_15) @07f74380
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Emios_Pwm_Ip_ForceMatchTrailingEdge/65 
  Calls: 
SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_14/92 (SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_14) @07f741c0
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Emios_Pwm_Ip_ForceMatchLeadingEdge/64 
  Calls: 
SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_14/91 (SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_14) @07f740e0
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Emios_Pwm_Ip_ForceMatchLeadingEdge/64 
  Calls: 
Emios_Pwm_Ip_SyncUpdate/90 (Emios_Pwm_Ip_SyncUpdate) @07f60700
  Type: function definition analyzed
  Visibility: externally_visible public
  References: Emios_Pwm_Ip_aBasePtr/41 (read)Emios_Pwm_Ip_aCheckState/49 (read)
  Referring: 
  Availability: available
  Function flags: body optimize_size
  Called by: 
  Calls: Emios_Mcl_Ip_ComparatorTransferEnable/122 Emios_Pwm_Ip_SetForceMatchA/20 Emios_Mcl_Ip_ComparatorTransferEnable/122 Emios_Pwm_Ip_SetForceMatchB/21 Emios_Mcl_Ip_ComparatorTransferEnable/122 Emios_Pwm_Ip_GetUCRegA/8 Emios_Pwm_Ip_GetPwmMode/27 Emios_Pwm_Ip_GetOutputUpdateInstance/4 
Emios_Pwm_Ip_ComparatorTransferDisable/89 (Emios_Pwm_Ip_ComparatorTransferDisable) @07f60460
  Type: function definition analyzed
  Visibility: externally_visible public
  References: 
  Referring: 
  Availability: available
  Function flags: body optimize_size
  Called by: 
  Calls: SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_30/126 Emios_Mcl_Ip_ComparatorTransferDisable/125 SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_30/124 
Emios_Pwm_Ip_ComparatorTransferEnable/88 (Emios_Pwm_Ip_ComparatorTransferEnable) @07f601c0
  Type: function definition analyzed
  Visibility: externally_visible public
  References: 
  Referring: 
  Availability: available
  Function flags: body optimize_size
  Called by: 
  Calls: SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_29/123 Emios_Mcl_Ip_ComparatorTransferEnable/122 SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_29/121 
Emios_Pwm_Ip_SetClockPs/87 (Emios_Pwm_Ip_SetClockPs) @07f56d20
  Type: function definition analyzed
  Visibility: externally_visible public
  References: Emios_Pwm_Ip_aBasePtr/41 (read)
  Referring: 
  Availability: available
  Function flags: body optimize_size
  Called by: 
  Calls: SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_28/120 Emios_Pwm_Ip_SetPrescalerEnable/15 Emios_Pwm_Ip_SetExtendedPrescaler/39 Emios_Pwm_Ip_SetPrescalerEnable/15 SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_28/119 
Emios_Pwm_Ip_SetBusSelected/86 (Emios_Pwm_Ip_SetBusSelected) @07f567e0
  Type: function definition analyzed
  Visibility: externally_visible public
  References: Emios_Pwm_Ip_aBasePtr/41 (read)
  Referring: 
  Availability: available
  Function flags: body optimize_size
  Called by: 
  Calls: SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_27/118 Emios_Pwm_Ip_SetCounterBus/22 SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_27/117 
Emios_Pwm_Ip_SetPreEnableClock/85 (Emios_Pwm_Ip_SetPreEnableClock) @07f562a0
  Type: function definition analyzed
  Visibility: externally_visible public
  References: Emios_Pwm_Ip_aBasePtr/41 (read)
  Referring: 
  Availability: available
  Function flags: body optimize_size
  Called by: 
  Calls: SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_26/116 Emios_Pwm_Ip_SetPrescalerEnable/15 SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_26/115 
Emios_Pwm_Ip_GetMasterBusChannel/84 (Emios_Pwm_Ip_GetMasterBusChannel) @07f56ee0
  Type: function definition analyzed
  Visibility: externally_visible public
  References: Emios_Pwm_Ip_aBasePtr/41 (read)
  Referring: 
  Availability: available
  Function flags: body optimize_size
  Called by: Emios_Pwm_Ip_SetDutyCycleDaoc/61 Emios_Pwm_Ip_InitDoubleCompareMode/60 
  Calls: Emios_Pwm_Ip_GetCounterBus/23 
Emios_Pwm_Ip_GetChannelMode/83 (Emios_Pwm_Ip_GetChannelMode) @07f56c40
  Type: function definition analyzed
  Visibility: externally_visible public
  References: Emios_Pwm_Ip_aBasePtr/41 (read)
  Referring: 
  Availability: available
  Function flags: body optimize_size
  Called by: 
  Calls: Emios_Pwm_Ip_GetPwmMode/27 
Emios_Pwm_Ip_SetOutputToNormal/82 (Emios_Pwm_Ip_SetOutputToNormal) @07f569a0
  Type: function definition analyzed
  Visibility: externally_visible public
  References: Emios_Pwm_Ip_aBasePtr/41 (read)
  Referring: 
  Availability: available
  Function flags: body optimize_size
  Called by: 
  Calls: SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_25/114 Emios_Pwm_Ip_SetPwmModePol/28 Emios_Pwm_Ip_SetEdgePolarity/24 Emios_Pwm_Ip_SetPwmModePol/28 Emios_Pwm_Ip_SetEdgePolarity/24 Emios_Pwm_Ip_SetPwmMode/26 Emios_Pwm_Ip_SetEdgePolarity/24 Emios_Pwm_Ip_SetPwmMode/26 Emios_Pwm_Ip_GetPwmMode/27 SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_25/113 
Emios_Pwm_Ip_SetOutputState/81 (Emios_Pwm_Ip_SetOutputState) @07f56700
  Type: function definition analyzed
  Visibility: externally_visible public
  References: Emios_Pwm_Ip_aBasePtr/41 (read)
  Referring: 
  Availability: available
  Function flags: body optimize_size
  Called by: 
  Calls: SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_24/112 Emios_Pwm_Ip_ClearFlagEvent/35 Emios_Pwm_Ip_SetInterruptRequest/18 Emios_Pwm_Ip_SetPwmMode/26 Emios_Pwm_Ip_SetEdgePolarity/24 Emios_Pwm_Ip_SetEdgePolarity/24 SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_24/111 
Emios_Pwm_Ip_GetOutputState/80 (Emios_Pwm_Ip_GetOutputState) @07f56460
  Type: function definition analyzed
  Visibility: externally_visible public
  References: Emios_Pwm_Ip_aBasePtr/41 (read)
  Referring: 
  Availability: available
  Function flags: body optimize_size
  Called by: 
  Calls: Emios_Pwm_Ip_GetOutputPinState/34 
Emios_Pwm_Ip_SetFlagRequest/79 (Emios_Pwm_Ip_SetFlagRequest) @07f561c0
  Type: function definition analyzed
  Visibility: externally_visible public
  References: Emios_Pwm_Ip_aBasePtr/41 (read)Emios_Pwm_Ip_aNotif/46 (read)Emios_Pwm_Ip_aCheckEnableNotif/47 (write)Emios_Pwm_Ip_aCheckEnableNotif/47 (write)
  Referring: 
  Availability: available
  Function flags: body optimize_size
  Called by: 
  Calls: SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_23/110 Emios_Pwm_Ip_SetDMARequest/16 Emios_Pwm_Ip_SetInterruptRequest/18 Emios_Pwm_Ip_SetDMARequest/16 Emios_Pwm_Ip_SetInterruptRequest/18 Emios_Pwm_Ip_SetDMARequest/16 Emios_Pwm_Ip_SetInterruptRequest/18 Emios_Pwm_Ip_ClearFlagEvent/35 SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_23/109 
Emios_Pwm_Ip_GetFlagRequest/78 (Emios_Pwm_Ip_GetFlagRequest) @07f4cd20
  Type: function definition analyzed
  Visibility: externally_visible public
  References: Emios_Pwm_Ip_aBasePtr/41 (read)
  Referring: 
  Availability: available
  Function flags: body optimize_size
  Called by: 
  Calls: Emios_Pwm_Ip_GetDMARequest/17 Emios_Pwm_Ip_GetInterruptRequest/19 
Emios_Pwm_Ip_ChannelStopDebugMode/77 (Emios_Pwm_Ip_ChannelStopDebugMode) @07f4c7e0
  Type: function definition analyzed
  Visibility: externally_visible public
  References: Emios_Pwm_Ip_aBasePtr/41 (read)
  Referring: 
  Availability: available
  Function flags: body optimize_size
  Called by: 
  Calls: SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_22/108 Emios_Pwm_Ip_SetFreezeEnable/12 SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_22/107 
Emios_Pwm_Ip_ChannelEnterDebugMode/76 (Emios_Pwm_Ip_ChannelEnterDebugMode) @07f4c2a0
  Type: function definition analyzed
  Visibility: externally_visible public
  References: Emios_Pwm_Ip_aBasePtr/41 (read)
  Referring: 
  Availability: available
  Function flags: body optimize_size
  Called by: 
  Calls: SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_21/106 Emios_Pwm_Ip_SetFreezeEnable/12 Emios_Pwm_Ip_GetDebugMode/1 SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_21/105 
Emios_Pwm_Ip_SetTriggerPlacement/75 (Emios_Pwm_Ip_SetTriggerPlacement) @07f4cee0
  Type: function definition analyzed
  Visibility: externally_visible public
  References: Emios_Pwm_Ip_aBasePtr/41 (read)
  Referring: 
  Availability: available
  Function flags: body optimize_size
  Called by: 
  Calls: SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_20/104 Emios_Pwm_Ip_SetTrigger/37 Emios_Pwm_Ip_GetCounterBusMode/51 Emios_Pwm_Ip_GetCounterBus/23 SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_20/103 
Emios_Pwm_Ip_GetTriggerPlacement/74 (Emios_Pwm_Ip_GetTriggerPlacement) @07f4cc40
  Type: function definition analyzed
  Visibility: externally_visible public
  References: Emios_Pwm_Ip_aBasePtr/41 (read)
  Referring: 
  Availability: available
  Function flags: body optimize_size
  Called by: 
  Calls: Emios_Pwm_Ip_GetTrigger/38 
Emios_Pwm_Ip_SetDeadTime/73 (Emios_Pwm_Ip_SetDeadTime) @07f4c9a0
  Type: function definition analyzed
  Visibility: externally_visible public
  References: Emios_Pwm_Ip_aBasePtr/41 (read)
  Referring: 
  Availability: available
  Function flags: body optimize_size
  Called by: 
  Calls: SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_19/102 Emios_Pwm_Ip_SetUCRegB/9 SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_19/101 
Emios_Pwm_Ip_GetDeadTime/72 (Emios_Pwm_Ip_GetDeadTime) @07f4c700
  Type: function definition analyzed
  Visibility: externally_visible public
  References: Emios_Pwm_Ip_aBasePtr/41 (read)
  Referring: 
  Availability: available
  Function flags: body optimize_size
  Called by: 
  Calls: Emios_Pwm_Ip_GetUCRegB/10 
Emios_Pwm_Ip_SetPhaseShift/71 (Emios_Pwm_Ip_SetPhaseShift) @07f4c460
  Type: function definition analyzed
  Visibility: externally_visible public
  References: Emios_Pwm_Ip_aBasePtr/41 (read)Emios_Pwm_Ip_aRegA/44 (write)
  Referring: 
  Availability: available
  Function flags: body optimize_size
  Called by: 
  Calls: SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_18/100 Emios_Pwm_Ip_SetUCRegB/9 Emios_Pwm_Ip_SetUCRegA/7 Emios_Pwm_Ip_SetUCRegB/9 Emios_Pwm_Ip_SetUCRegA/7 Emios_Pwm_Ip_GetCounterBusMode/51 Emios_Pwm_Ip_GetCounterBus/23 Emios_Pwm_Ip_GetDutyCycle/68 Emios_Pwm_Ip_GetCounterBusPeriod/50 Emios_Pwm_Ip_GetCounterBus/23 SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_18/99 Emios_Pwm_Ip_GetPwmMode/27 
Emios_Pwm_Ip_GetPhaseShift/70 (Emios_Pwm_Ip_GetPhaseShift) @07f4c1c0
  Type: function definition analyzed
  Visibility: externally_visible public
  References: Emios_Pwm_Ip_aBasePtr/41 (read)
  Referring: 
  Availability: available
  Function flags: body optimize_size
  Called by: 
  Calls: Emios_Pwm_Ip_GetUCRegA/8 
Emios_Pwm_Ip_SetDutyCycle/69 (Emios_Pwm_Ip_SetDutyCycle) @07f3eee0
  Type: function definition analyzed
  Visibility: externally_visible public
  References: Emios_Pwm_Ip_aBasePtr/41 (read)
  Referring: 
  Availability: available
  Function flags: body optimize_size
  Called by: 
  Calls: SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_17/98 Emios_Pwm_Ip_SetDutyCycleOpwmt/59 Emios_Pwm_Ip_SetDutyCycleDaoc/61 Emios_Pwm_Ip_SetDutyCycleOpwmb/57 Emios_Pwm_Ip_SetDutyCycleOpwmcb/55 Emios_Pwm_Ip_SetDutyCycleOpwfmb/53 SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_17/97 Emios_Pwm_Ip_GetPwmMode/27 
Emios_Pwm_Ip_GetDutyCycle/68 (Emios_Pwm_Ip_GetDutyCycle) @07f3e9a0
  Type: function definition analyzed
  Visibility: externally_visible public
  References: Emios_Pwm_Ip_aBasePtr/41 (read)Emios_Pwm_Ip_aDaocDuty/45 (read)
  Referring: 
  Availability: available
  Function flags: body optimize_size
  Called by: Emios_Pwm_Ip_SetPhaseShift/71 
  Calls: Emios_Pwm_Ip_GetCounterBusPeriod/50 Emios_Pwm_Ip_GetCounterBus/23 Emios_Pwm_Ip_GetUCRegB/10 Emios_Pwm_Ip_GetUCRegA/8 Emios_Pwm_Ip_GetPwmMode/27 
Emios_Pwm_Ip_SetPeriod/67 (Emios_Pwm_Ip_SetPeriod) @07f3e460
  Type: function definition analyzed
  Visibility: externally_visible public
  References: Emios_Pwm_Ip_aBasePtr/41 (read)Emios_Pwm_Ip_aPeriod/43 (write)
  Referring: 
  Availability: available
  Function flags: body optimize_size
  Called by: 
  Calls: SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_16/96 Emios_Pwm_Ip_SetUCRegB/9 SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_16/95 
Emios_Pwm_Ip_GetPeriod/66 (Emios_Pwm_Ip_GetPeriod) @07f3ee00
  Type: function definition analyzed
  Visibility: externally_visible public
  References: Emios_Pwm_Ip_aBasePtr/41 (read)Emios_Pwm_Ip_aPeriod/43 (read)
  Referring: 
  Availability: available
  Function flags: body optimize_size
  Called by: 
  Calls: Emios_Pwm_Ip_GetCounterBusPeriod/50 Emios_Pwm_Ip_GetCounterBus/23 Emios_Pwm_Ip_GetUCRegB/10 Emios_Pwm_Ip_GetPwmMode/27 
Emios_Pwm_Ip_ForceMatchTrailingEdge/65 (Emios_Pwm_Ip_ForceMatchTrailingEdge) @07f3eb60
  Type: function definition analyzed
  Visibility: externally_visible public
  References: Emios_Pwm_Ip_aBasePtr/41 (read)
  Referring: 
  Availability: available
  Function flags: body optimize_size
  Called by: 
  Calls: SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_15/94 Emios_Pwm_Ip_SetForceMatchB/21 SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_15/93 
Emios_Pwm_Ip_ForceMatchLeadingEdge/64 (Emios_Pwm_Ip_ForceMatchLeadingEdge) @07f3e8c0
  Type: function definition analyzed
  Visibility: externally_visible public
  References: Emios_Pwm_Ip_aBasePtr/41 (read)
  Referring: 
  Availability: available
  Function flags: body optimize_size
  Called by: 
  Calls: SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_14/92 Emios_Pwm_Ip_SetForceMatchA/20 SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_14/91 
Emios_Pwm_Ip_DeInitChannel/63 (Emios_Pwm_Ip_DeInitChannel) @07f3e620
  Type: function definition analyzed
  Visibility: externally_visible public
  References: Emios_Pwm_Ip_aBasePtr/41 (read)Emios_Pwm_Ip_aCheckEnableNotif/47 (write)Emios_Pwm_Ip_aCheckState/49 (write)
  Referring: 
  Availability: available
  Function flags: body optimize_size
  Called by: 
  Calls: Emios_Pwm_Ip_SetTrigger/37 Emios_Pwm_Ip_GetPwmMode/27 Emios_Pwm_Ip_SetUCRegB/9 Emios_Pwm_Ip_SetUCRegA/7 
Emios_Pwm_Ip_InitChannel/62 (Emios_Pwm_Ip_InitChannel) @07f3e380
  Type: function definition analyzed
  Visibility: externally_visible public
  References: Emios_Pwm_Ip_aBasePtr/41 (read)Emios_Pwm_Ip_aBasePtr/41 (read)Emios_Pwm_Ip_aNotificationPtr/42 (write)Emios_Pwm_Ip_aCheckState/49 (write)
  Referring: 
  Availability: available
  Function flags: body optimize_size
  Called by: 
  Calls: Emios_Pwm_Ip_SetPrescalerEnable/15 Emios_Pwm_Ip_SetPrescalerSource/40 Emios_Pwm_Ip_SetExtendedPrescaler/39 Emios_Pwm_Ip_InitDoubleCompareMode/60 Emios_Pwm_Ip_InitTriggerMode/58 Emios_Pwm_Ip_InitEdgePlacementMode/56 Emios_Pwm_Ip_InitDeadTimeMode/54 Emios_Pwm_Ip_InitPeriodDutyCycleMode/52 Emios_Pwm_Ip_SetDMARequest/16 Emios_Pwm_Ip_SetOutDisableSource/14 Emios_Pwm_Ip_SetOutDisable/13 Emios_Pwm_Ip_SetOutputUpdate/2 
Emios_Pwm_Ip_SetDutyCycleDaoc/61 (Emios_Pwm_Ip_SetDutyCycleDaoc) @07f3e0e0
  Type: function definition analyzed
  Visibility: prevailing_def_ironly
  References: Emios_Pwm_Ip_aBasePtr/41 (read)Emios_Pwm_Ip_aPeriod/43 (read)Emios_Pwm_Ip_aPeriod/43 (read)Emios_Pwm_Ip_aPeriod/43 (read)Emios_Pwm_Ip_aDaocDuty/45 (write)Emios_Pwm_Ip_aPolarity/48 (read)Emios_Pwm_Ip_aNotif/46 (write)Emios_Pwm_Ip_aPeriod/43 (read)Emios_Pwm_Ip_aDaocDuty/45 (write)Emios_Pwm_Ip_aPeriod/43 (read)Emios_Pwm_Ip_aPolarity/48 (read)Emios_Pwm_Ip_aNotif/46 (write)Emios_Pwm_Ip_aDaocDuty/45 (write)Emios_Pwm_Ip_aPolarity/48 (read)Emios_Pwm_Ip_aNotif/46 (write)
  Referring: 
  Availability: local
  Function flags: body local optimize_size
  Called by: Emios_Pwm_Ip_SetDutyCycle/69 
  Calls: Emios_Pwm_Ip_SetEdgePolarity/24 Emios_Pwm_Ip_SetUCRegB/9 Emios_Pwm_Ip_SetUCRegA/7 Emios_Pwm_Ip_SetEdgePolarity/24 Emios_Pwm_Ip_SetUCRegB/9 Emios_Pwm_Ip_SetUCRegA/7 Emios_Pwm_Ip_SetForceMatchA/20 Emios_Pwm_Ip_GetUCRegA/8 Emios_Pwm_Ip_ClearFlagEvent/35 Emios_Pwm_Ip_SetInterruptRequest/18 Emios_Pwm_Ip_SetEdgePolarity/24 Emios_Pwm_Ip_SetUCRegB/9 Emios_Pwm_Ip_SetUCRegA/7 Emios_Pwm_Ip_SetForceMatchB/21 Emios_Pwm_Ip_ClearFlagEvent/35 Emios_Pwm_Ip_SetInterruptRequest/18 Emios_Pwm_Ip_GetUCRegA/8 Emios_Pwm_Ip_GetMasterBusChannel/84 
Emios_Pwm_Ip_InitDoubleCompareMode/60 (Emios_Pwm_Ip_InitDoubleCompareMode) @07f2ce00
  Type: function definition analyzed
  Visibility: prevailing_def_ironly
  References: Emios_Pwm_Ip_aBasePtr/41 (read)Emios_Pwm_Ip_aPeriod/43 (write)Emios_Pwm_Ip_aPolarity/48 (write)Emios_Pwm_Ip_aDaocDuty/45 (write)Emios_Pwm_Ip_aNotif/46 (write)Emios_Pwm_Ip_aPeriod/43 (read)Emios_Pwm_Ip_aDaocDuty/45 (write)Emios_Pwm_Ip_aNotif/46 (write)Emios_Pwm_Ip_aDaocDuty/45 (write)Emios_Pwm_Ip_aNotif/46 (write)
  Referring: 
  Availability: local
  Function flags: body local optimize_size
  Called by: Emios_Pwm_Ip_InitChannel/62 
  Calls: Emios_Pwm_Ip_SetEdgePolarity/24 Emios_Pwm_Ip_SetUCRegB/9 Emios_Pwm_Ip_SetUCRegA/7 Emios_Pwm_Ip_SetEdgePolarity/24 Emios_Pwm_Ip_SetUCRegB/9 Emios_Pwm_Ip_SetUCRegA/7 Emios_Pwm_Ip_SetForceMatchA/20 Emios_Pwm_Ip_GetUCRegA/8 Emios_Pwm_Ip_SetEdgePolarity/24 Emios_Pwm_Ip_SetUCRegB/9 Emios_Pwm_Ip_SetUCRegA/7 Emios_Pwm_Ip_SetForceMatchB/21 Emios_Pwm_Ip_SetEdgePolarity/24 Emios_Pwm_Ip_SetPwmMode/26 Emios_Pwm_Ip_SetEdgePolarity/24 Emios_Pwm_Ip_SetEdgePolarity/24 Emios_Pwm_Ip_SetCounterBus/22 Emios_Pwm_Ip_SetInterruptRequest/18 Emios_Pwm_Ip_GetUCRegA/8 Emios_Pwm_Ip_GetMasterBusChannel/84 
Emios_Pwm_Ip_SetDutyCycleOpwmt/59 (Emios_Pwm_Ip_SetDutyCycleOpwmt) @07f2cb60
  Type: function definition analyzed
  Visibility: prevailing_def_ironly
  References: Emios_Pwm_Ip_aBasePtr/41 (read)Emios_Pwm_Ip_aNotif/46 (write)Emios_Pwm_Ip_aRegA/44 (read)Emios_Pwm_Ip_aNotif/46 (write)Emios_Pwm_Ip_aRegA/44 (read)Emios_Pwm_Ip_aNotif/46 (write)Emios_Pwm_Ip_aCheckEnableNotif/47 (read)
  Referring: 
  Availability: local
  Function flags: body local optimize_size
  Called by: Emios_Pwm_Ip_SetDutyCycle/69 
  Calls: Emios_Pwm_Ip_SetInterruptRequest/18 Emios_Pwm_Ip_SetUCRegB/9 Emios_Pwm_Ip_SetUCRegB/9 Emios_Pwm_Ip_ClearFlagEvent/35 Emios_Pwm_Ip_SetInterruptRequest/18 Emios_Pwm_Ip_SetUCRegB/9 Emios_Pwm_Ip_ClearFlagEvent/35 Emios_Pwm_Ip_SetInterruptRequest/18 Emios_Pwm_Ip_GetCounterBusPeriod/50 Emios_Pwm_Ip_GetCounterBus/23 
Emios_Pwm_Ip_InitTriggerMode/58 (Emios_Pwm_Ip_InitTriggerMode) @07f2c8c0
  Type: function definition analyzed
  Visibility: prevailing_def_ironly
  References: Emios_Pwm_Ip_aBasePtr/41 (read)Emios_Pwm_Ip_aNotif/46 (write)Emios_Pwm_Ip_aNotif/46 (write)Emios_Pwm_Ip_aNotif/46 (write)Emios_Pwm_Ip_aRegA/44 (write)
  Referring: 
  Availability: local
  Function flags: body local optimize_size
  Called by: Emios_Pwm_Ip_InitChannel/62 
  Calls: Emios_Pwm_Ip_SetEdgePolarity/24 Emios_Pwm_Ip_SetPwmMode/26 Emios_Pwm_Ip_SetEdgePolarity/24 Emios_Pwm_Ip_SetEdgePolarity/24 Emios_Pwm_Ip_SetTrigger/37 Emios_Pwm_Ip_SetUCRegB/9 Emios_Pwm_Ip_SetUCRegA/7 Emios_Pwm_Ip_SetCounterBus/22 Emios_Pwm_Ip_GetCounterBusMode/51 Emios_Pwm_Ip_GetCounterBusPeriod/50 
Emios_Pwm_Ip_SetDutyCycleOpwmb/57 (Emios_Pwm_Ip_SetDutyCycleOpwmb) @07f2c620
  Type: function definition analyzed
  Visibility: prevailing_def_ironly
  References: Emios_Pwm_Ip_aBasePtr/41 (read)Emios_Pwm_Ip_aRegA/44 (read)Emios_Pwm_Ip_aNotif/46 (write)Emios_Pwm_Ip_aNotif/46 (write)Emios_Pwm_Ip_aNotif/46 (write)Emios_Pwm_Ip_aCheckEnableNotif/47 (read)Emios_Pwm_Ip_aRegA/44 (read)
  Referring: 
  Availability: local
  Function flags: body local optimize_size
  Called by: Emios_Pwm_Ip_SetDutyCycle/69 
  Calls: Emios_Pwm_Ip_SetUCRegB/9 Emios_Pwm_Ip_SetInterruptRequest/18 Emios_Pwm_Ip_ClearFlagEvent/35 Emios_Pwm_Ip_SetInterruptRequest/18 Emios_Pwm_Ip_ClearFlagEvent/35 Emios_Pwm_Ip_SetInterruptRequest/18 Emios_Pwm_Ip_GetCounterBusPeriod/50 Emios_Pwm_Ip_GetCounterBus/23 
Emios_Pwm_Ip_InitEdgePlacementMode/56 (Emios_Pwm_Ip_InitEdgePlacementMode) @07f2c380
  Type: function definition analyzed
  Visibility: prevailing_def_ironly
  References: Emios_Pwm_Ip_aBasePtr/41 (read)Emios_Pwm_Ip_aRegA/44 (write)Emios_Pwm_Ip_aNotif/46 (write)Emios_Pwm_Ip_aNotif/46 (write)Emios_Pwm_Ip_aNotif/46 (write)
  Referring: 
  Availability: local
  Function flags: body local optimize_size
  Called by: Emios_Pwm_Ip_InitChannel/62 
  Calls: Emios_Pwm_Ip_SetEdgePolarity/24 Emios_Pwm_Ip_SetPwmMode/26 Emios_Pwm_Ip_SetUCRegB/9 Emios_Pwm_Ip_SetUCRegA/7 Emios_Pwm_Ip_SetCounterBus/22 
Emios_Pwm_Ip_SetDutyCycleOpwmcb/55 (Emios_Pwm_Ip_SetDutyCycleOpwmcb) @07f2c0e0
  Type: function definition analyzed
  Visibility: prevailing_def_ironly
  References: Emios_Pwm_Ip_aBasePtr/41 (read)Emios_Pwm_Ip_aNotif/46 (write)Emios_Pwm_Ip_aNotif/46 (write)Emios_Pwm_Ip_aNotif/46 (write)Emios_Pwm_Ip_aCheckEnableNotif/47 (read)
  Referring: 
  Availability: local
  Function flags: body local optimize_size
  Called by: Emios_Pwm_Ip_SetDutyCycle/69 
  Calls: Emios_Pwm_Ip_SetInterruptRequest/18 Emios_Pwm_Ip_SetUCRegA/7 Emios_Pwm_Ip_SetUCRegA/7 Emios_Pwm_Ip_ClearFlagEvent/35 Emios_Pwm_Ip_SetInterruptRequest/18 Emios_Pwm_Ip_SetForceMatchA/20 Emios_Pwm_Ip_SetForceMatchB/21 Emios_Pwm_Ip_GetUCRegA/8 Emios_Pwm_Ip_SetUCRegA/7 Emios_Pwm_Ip_ClearFlagEvent/35 Emios_Pwm_Ip_SetInterruptRequest/18 Emios_Pwm_Ip_GetCounterBusPeriod/50 Emios_Pwm_Ip_GetCounterBus/23 Emios_Pwm_Ip_GetPwmMode/27 
Emios_Pwm_Ip_InitDeadTimeMode/54 (Emios_Pwm_Ip_InitDeadTimeMode) @07e66e00
  Type: function definition analyzed
  Visibility: prevailing_def_ironly
  References: Emios_Pwm_Ip_aBasePtr/41 (read)Emios_Pwm_Ip_aNotif/46 (write)Emios_Pwm_Ip_aNotif/46 (write)Emios_Pwm_Ip_aNotif/46 (write)
  Referring: 
  Availability: local
  Function flags: body local optimize_size
  Called by: Emios_Pwm_Ip_InitChannel/62 
  Calls: Emios_Pwm_Ip_SetEdgePolarity/24 Emios_Pwm_Ip_SetPwmMode/26 Emios_Pwm_Ip_SetEdgePolarity/24 Emios_Pwm_Ip_SetEdgePolarity/24 Emios_Pwm_Ip_SetUCRegB/9 Emios_Pwm_Ip_SetUCRegA/7 Emios_Pwm_Ip_SetCounterBus/22 Emios_Pwm_Ip_GetCounterBusPeriod/50 Emios_Pwm_Ip_GetCounterBusPeriod/50 
Emios_Pwm_Ip_SetDutyCycleOpwfmb/53 (Emios_Pwm_Ip_SetDutyCycleOpwfmb) @07e66b60
  Type: function definition analyzed
  Visibility: prevailing_def_ironly
  References: Emios_Pwm_Ip_aBasePtr/41 (read)Emios_Pwm_Ip_aPeriod/43 (read)Emios_Pwm_Ip_aPeriod/43 (read)Emios_Pwm_Ip_aPeriod/43 (read)Emios_Pwm_Ip_aNotif/46 (write)Emios_Pwm_Ip_aNotif/46 (write)Emios_Pwm_Ip_aPeriod/43 (read)Emios_Pwm_Ip_aNotif/46 (write)Emios_Pwm_Ip_aNotif/46 (write)Emios_Pwm_Ip_aCheckEnableNotif/47 (read)
  Referring: 
  Availability: local
  Function flags: body local optimize_size
  Called by: Emios_Pwm_Ip_SetDutyCycle/69 
  Calls: Emios_Pwm_Ip_SetUCRegA/7 Emios_Pwm_Ip_SetInterruptRequest/18 Emios_Pwm_Ip_ClearFlagEvent/35 Emios_Pwm_Ip_SetInterruptRequest/18 Emios_Pwm_Ip_ClearFlagEvent/35 Emios_Pwm_Ip_SetInterruptRequest/18 Emios_Pwm_Ip_SetUCRegA/7 Emios_Pwm_Ip_ClearFlagEvent/35 Emios_Pwm_Ip_SetInterruptRequest/18 
Emios_Pwm_Ip_InitPeriodDutyCycleMode/52 (Emios_Pwm_Ip_InitPeriodDutyCycleMode) @07e668c0
  Type: function definition analyzed
  Visibility: prevailing_def_ironly
  References: Emios_Pwm_Ip_aBasePtr/41 (read)Emios_Pwm_Ip_aPeriod/43 (write)Emios_Pwm_Ip_aNotif/46 (write)Emios_Pwm_Ip_aNotif/46 (write)Emios_Pwm_Ip_aNotif/46 (write)
  Referring: 
  Availability: local
  Function flags: body local optimize_size
  Called by: Emios_Pwm_Ip_InitChannel/62 
  Calls: Emios_Pwm_Ip_SetEdgePolarity/24 Emios_Pwm_Ip_SetPwmMode/26 Emios_Pwm_Ip_SetUCRegB/9 Emios_Pwm_Ip_SetUCRegA/7 Emios_Pwm_Ip_SetCounterBus/22 
Emios_Pwm_Ip_GetCounterBusMode/51 (Emios_Pwm_Ip_GetCounterBusMode) @07e66620
  Type: function definition analyzed
  Visibility: prevailing_def_ironly
  References: Emios_Pwm_Ip_aBasePtr/41 (read)
  Referring: 
  Availability: local
  Function flags: body local optimize_size
  Called by: Emios_Pwm_Ip_SetTriggerPlacement/75 Emios_Pwm_Ip_SetPhaseShift/71 Emios_Pwm_Ip_InitTriggerMode/58 
  Calls: Emios_Pwm_Ip_GetChannelPwmMode/29 Emios_Pwm_Ip_GetChannelPwmMode/29 Emios_Pwm_Ip_GetChannelPwmMode/29 
Emios_Pwm_Ip_GetCounterBusPeriod/50 (Emios_Pwm_Ip_GetCounterBusPeriod) @07e66380
  Type: function definition analyzed
  Visibility: prevailing_def_ironly
  References: Emios_Pwm_Ip_aBasePtr/41 (read)
  Referring: 
  Availability: local
  Function flags: body local optimize_size
  Called by: Emios_Pwm_Ip_SetPhaseShift/71 Emios_Pwm_Ip_SetDutyCycleOpwmt/59 Emios_Pwm_Ip_SetDutyCycleOpwmb/57 Emios_Pwm_Ip_SetDutyCycleOpwmcb/55 Emios_Pwm_Ip_GetDutyCycle/68 Emios_Pwm_Ip_GetPeriod/66 Emios_Pwm_Ip_InitTriggerMode/58 Emios_Pwm_Ip_InitDeadTimeMode/54 Emios_Pwm_Ip_InitDeadTimeMode/54 
  Calls: Emios_Pwm_Ip_GetUCRegA/8 Emios_Pwm_Ip_GetUCRegA/8 Emios_Pwm_Ip_GetUCRegA/8 
Emios_Pwm_Ip_aCheckState/49 (Emios_Pwm_Ip_aCheckState) @07ee45e8
  Type: variable definition analyzed
  Visibility: externally_visible public
  References: 
  Referring: Emios_Pwm_Ip_InitChannel/62 (write)Emios_Pwm_Ip_DeInitChannel/63 (write)Emios_Pwm_Ip_SyncUpdate/90 (read)
  Availability: available
  Varpool flags: initialized
Emios_Pwm_Ip_aPolarity/48 (Emios_Pwm_Ip_aPolarity) @07ee4558
  Type: variable definition analyzed
  Visibility: externally_visible public
  References: 
  Referring: Emios_Pwm_Ip_InitDoubleCompareMode/60 (write)Emios_Pwm_Ip_SetDutyCycleDaoc/61 (read)Emios_Pwm_Ip_SetDutyCycleDaoc/61 (read)Emios_Pwm_Ip_SetDutyCycleDaoc/61 (read)
  Availability: available
  Varpool flags: initialized
Emios_Pwm_Ip_aCheckEnableNotif/47 (Emios_Pwm_Ip_aCheckEnableNotif) @07ee44c8
  Type: variable definition analyzed
  Visibility: externally_visible public
  References: 
  Referring: Emios_Pwm_Ip_DeInitChannel/63 (write)Emios_Pwm_Ip_SetDutyCycleOpwfmb/53 (read)Emios_Pwm_Ip_SetDutyCycleOpwmcb/55 (read)Emios_Pwm_Ip_SetDutyCycleOpwmb/57 (read)Emios_Pwm_Ip_SetDutyCycleOpwmt/59 (read)Emios_Pwm_Ip_SetFlagRequest/79 (write)Emios_Pwm_Ip_SetFlagRequest/79 (write)
  Availability: available
  Varpool flags: initialized
Emios_Pwm_Ip_aNotif/46 (Emios_Pwm_Ip_aNotif) @07ee4438
  Type: variable definition analyzed
  Visibility: externally_visible public
  References: 
  Referring: Emios_Pwm_Ip_InitPeriodDutyCycleMode/52 (write)Emios_Pwm_Ip_InitPeriodDutyCycleMode/52 (write)Emios_Pwm_Ip_InitPeriodDutyCycleMode/52 (write)Emios_Pwm_Ip_InitDeadTimeMode/54 (write)Emios_Pwm_Ip_InitDeadTimeMode/54 (write)Emios_Pwm_Ip_InitDeadTimeMode/54 (write)Emios_Pwm_Ip_InitEdgePlacementMode/56 (write)Emios_Pwm_Ip_InitEdgePlacementMode/56 (write)Emios_Pwm_Ip_InitEdgePlacementMode/56 (write)Emios_Pwm_Ip_InitTriggerMode/58 (write)Emios_Pwm_Ip_InitTriggerMode/58 (write)Emios_Pwm_Ip_InitTriggerMode/58 (write)Emios_Pwm_Ip_InitDoubleCompareMode/60 (write)Emios_Pwm_Ip_InitDoubleCompareMode/60 (write)Emios_Pwm_Ip_InitDoubleCompareMode/60 (write)Emios_Pwm_Ip_SetDutyCycleOpwfmb/53 (write)Emios_Pwm_Ip_SetDutyCycleOpwfmb/53 (write)Emios_Pwm_Ip_SetDutyCycleOpwfmb/53 (write)Emios_Pwm_Ip_SetDutyCycleOpwfmb/53 (write)Emios_Pwm_Ip_SetDutyCycleOpwmcb/55 (write)Emios_Pwm_Ip_SetDutyCycleOpwmcb/55 (write)Emios_Pwm_Ip_SetDutyCycleOpwmcb/55 (write)Emios_Pwm_Ip_SetDutyCycleOpwmb/57 (write)Emios_Pwm_Ip_SetDutyCycleOpwmb/57 (write)Emios_Pwm_Ip_SetDutyCycleOpwmb/57 (write)Emios_Pwm_Ip_SetDutyCycleDaoc/61 (write)Emios_Pwm_Ip_SetDutyCycleDaoc/61 (write)Emios_Pwm_Ip_SetDutyCycleDaoc/61 (write)Emios_Pwm_Ip_SetDutyCycleOpwmt/59 (write)Emios_Pwm_Ip_SetDutyCycleOpwmt/59 (write)Emios_Pwm_Ip_SetDutyCycleOpwmt/59 (write)Emios_Pwm_Ip_SetFlagRequest/79 (read)
  Availability: available
  Varpool flags: initialized
Emios_Pwm_Ip_aDaocDuty/45 (Emios_Pwm_Ip_aDaocDuty) @07ee43a8
  Type: variable definition analyzed
  Visibility: externally_visible public
  References: 
  Referring: Emios_Pwm_Ip_InitDoubleCompareMode/60 (write)Emios_Pwm_Ip_InitDoubleCompareMode/60 (write)Emios_Pwm_Ip_InitDoubleCompareMode/60 (write)Emios_Pwm_Ip_GetDutyCycle/68 (read)Emios_Pwm_Ip_SetDutyCycleDaoc/61 (write)Emios_Pwm_Ip_SetDutyCycleDaoc/61 (write)Emios_Pwm_Ip_SetDutyCycleDaoc/61 (write)
  Availability: available
  Varpool flags: initialized
Emios_Pwm_Ip_aRegA/44 (Emios_Pwm_Ip_aRegA) @07ee4318
  Type: variable definition analyzed
  Visibility: externally_visible public
  References: 
  Referring: Emios_Pwm_Ip_InitEdgePlacementMode/56 (write)Emios_Pwm_Ip_InitTriggerMode/58 (write)Emios_Pwm_Ip_SetDutyCycleOpwmb/57 (read)Emios_Pwm_Ip_SetDutyCycleOpwmb/57 (read)Emios_Pwm_Ip_SetDutyCycleOpwmt/59 (read)Emios_Pwm_Ip_SetDutyCycleOpwmt/59 (read)Emios_Pwm_Ip_SetPhaseShift/71 (write)
  Availability: available
  Varpool flags: initialized
Emios_Pwm_Ip_aPeriod/43 (Emios_Pwm_Ip_aPeriod) @07ee4288
  Type: variable definition analyzed
  Visibility: externally_visible public
  References: 
  Referring: Emios_Pwm_Ip_InitPeriodDutyCycleMode/52 (write)Emios_Pwm_Ip_InitDoubleCompareMode/60 (write)Emios_Pwm_Ip_InitDoubleCompareMode/60 (read)Emios_Pwm_Ip_GetPeriod/66 (read)Emios_Pwm_Ip_SetPeriod/67 (write)Emios_Pwm_Ip_SetDutyCycleOpwfmb/53 (read)Emios_Pwm_Ip_SetDutyCycleOpwfmb/53 (read)Emios_Pwm_Ip_SetDutyCycleOpwfmb/53 (read)Emios_Pwm_Ip_SetDutyCycleOpwfmb/53 (read)Emios_Pwm_Ip_SetDutyCycleDaoc/61 (read)Emios_Pwm_Ip_SetDutyCycleDaoc/61 (read)Emios_Pwm_Ip_SetDutyCycleDaoc/61 (read)Emios_Pwm_Ip_SetDutyCycleDaoc/61 (read)Emios_Pwm_Ip_SetDutyCycleDaoc/61 (read)
  Availability: available
  Varpool flags: initialized
Emios_Pwm_Ip_aNotificationPtr/42 (Emios_Pwm_Ip_aNotificationPtr) @07ee41b0
  Type: variable definition analyzed
  Visibility: externally_visible public
  References: 
  Referring: Emios_Pwm_Ip_InitChannel/62 (write)
  Availability: available
  Varpool flags: initialized
Emios_Pwm_Ip_aBasePtr/41 (Emios_Pwm_Ip_aBasePtr) @07ee4000
  Type: variable definition analyzed
  Visibility: externally_visible public
  References: 
  Referring: Emios_Pwm_Ip_InitChannel/62 (read)Emios_Pwm_Ip_InitChannel/62 (read)Emios_Pwm_Ip_InitPeriodDutyCycleMode/52 (read)Emios_Pwm_Ip_InitDeadTimeMode/54 (read)Emios_Pwm_Ip_GetCounterBusPeriod/50 (read)Emios_Pwm_Ip_InitEdgePlacementMode/56 (read)Emios_Pwm_Ip_InitTriggerMode/58 (read)Emios_Pwm_Ip_GetCounterBusMode/51 (read)Emios_Pwm_Ip_InitDoubleCompareMode/60 (read)Emios_Pwm_Ip_DeInitChannel/63 (read)Emios_Pwm_Ip_ForceMatchLeadingEdge/64 (read)Emios_Pwm_Ip_ForceMatchTrailingEdge/65 (read)Emios_Pwm_Ip_GetPeriod/66 (read)Emios_Pwm_Ip_SetPeriod/67 (read)Emios_Pwm_Ip_GetDutyCycle/68 (read)Emios_Pwm_Ip_SetDutyCycle/69 (read)Emios_Pwm_Ip_SetDutyCycleOpwfmb/53 (read)Emios_Pwm_Ip_SetDutyCycleOpwmcb/55 (read)Emios_Pwm_Ip_SetDutyCycleOpwmb/57 (read)Emios_Pwm_Ip_SetDutyCycleDaoc/61 (read)Emios_Pwm_Ip_SetDutyCycleOpwmt/59 (read)Emios_Pwm_Ip_GetPhaseShift/70 (read)Emios_Pwm_Ip_SetPhaseShift/71 (read)Emios_Pwm_Ip_GetDeadTime/72 (read)Emios_Pwm_Ip_SetDeadTime/73 (read)Emios_Pwm_Ip_GetTriggerPlacement/74 (read)Emios_Pwm_Ip_SetTriggerPlacement/75 (read)Emios_Pwm_Ip_ChannelEnterDebugMode/76 (read)Emios_Pwm_Ip_ChannelStopDebugMode/77 (read)Emios_Pwm_Ip_GetFlagRequest/78 (read)Emios_Pwm_Ip_SetFlagRequest/79 (read)Emios_Pwm_Ip_GetOutputState/80 (read)Emios_Pwm_Ip_SetOutputState/81 (read)Emios_Pwm_Ip_SetOutputToNormal/82 (read)Emios_Pwm_Ip_GetChannelMode/83 (read)Emios_Pwm_Ip_GetMasterBusChannel/84 (read)Emios_Pwm_Ip_SetPreEnableClock/85 (read)Emios_Pwm_Ip_SetBusSelected/86 (read)Emios_Pwm_Ip_SetClockPs/87 (read)Emios_Pwm_Ip_SyncUpdate/90 (read)
  Availability: available
  Varpool flags: initialized read-only const-value-known
Emios_Pwm_Ip_SetPrescalerSource/40 (Emios_Pwm_Ip_SetPrescalerSource) @06c52d20
  Type: function definition analyzed
  Visibility: prevailing_def_ironly
  References: 
  Referring: 
  Availability: local
  Function flags: body local optimize_size
  Called by: Emios_Pwm_Ip_InitChannel/62 
  Calls: 
Emios_Pwm_Ip_SetExtendedPrescaler/39 (Emios_Pwm_Ip_SetExtendedPrescaler) @06c529a0
  Type: function definition analyzed
  Visibility: prevailing_def_ironly
  References: 
  Referring: 
  Availability: local
  Function flags: body local optimize_size
  Called by: Emios_Pwm_Ip_SetClockPs/87 Emios_Pwm_Ip_InitChannel/62 
  Calls: 
Emios_Pwm_Ip_GetTrigger/38 (Emios_Pwm_Ip_GetTrigger) @06c52620
  Type: function definition analyzed
  Visibility: prevailing_def_ironly
  References: 
  Referring: 
  Availability: local
  Function flags: body local optimize_size
  Called by: Emios_Pwm_Ip_GetTriggerPlacement/74 
  Calls: 
Emios_Pwm_Ip_SetTrigger/37 (Emios_Pwm_Ip_SetTrigger) @06c52380
  Type: function definition analyzed
  Visibility: prevailing_def_ironly
  References: 
  Referring: 
  Availability: local
  Function flags: body local optimize_size
  Called by: Emios_Pwm_Ip_SetTriggerPlacement/75 Emios_Pwm_Ip_DeInitChannel/63 Emios_Pwm_Ip_InitTriggerMode/58 
  Calls: 
Emios_Pwm_Ip_ClearFlagEvent/35 (Emios_Pwm_Ip_ClearFlagEvent) @06c4ed20
  Type: function definition analyzed
  Visibility: prevailing_def_ironly
  References: 
  Referring: 
  Availability: local
  Function flags: body local optimize_size
  Called by: Emios_Pwm_Ip_SetOutputState/81 Emios_Pwm_Ip_SetFlagRequest/79 Emios_Pwm_Ip_SetDutyCycleOpwmt/59 Emios_Pwm_Ip_SetDutyCycleOpwmt/59 Emios_Pwm_Ip_SetDutyCycleDaoc/61 Emios_Pwm_Ip_SetDutyCycleDaoc/61 Emios_Pwm_Ip_SetDutyCycleOpwmb/57 Emios_Pwm_Ip_SetDutyCycleOpwmb/57 Emios_Pwm_Ip_SetDutyCycleOpwmcb/55 Emios_Pwm_Ip_SetDutyCycleOpwmcb/55 Emios_Pwm_Ip_SetDutyCycleOpwfmb/53 Emios_Pwm_Ip_SetDutyCycleOpwfmb/53 Emios_Pwm_Ip_SetDutyCycleOpwfmb/53 
  Calls: 
Emios_Pwm_Ip_GetOutputPinState/34 (Emios_Pwm_Ip_GetOutputPinState) @06c4e9a0
  Type: function definition analyzed
  Visibility: prevailing_def_ironly
  References: 
  Referring: 
  Availability: local
  Function flags: body local optimize_size
  Called by: Emios_Pwm_Ip_GetOutputState/80 
  Calls: 
Emios_Pwm_Ip_GetChannelPwmMode/29 (Emios_Pwm_Ip_GetChannelPwmMode) @06c47a80
  Type: function definition analyzed
  Visibility: prevailing_def_ironly
  References: 
  Referring: 
  Availability: local
  Function flags: body local optimize_size
  Called by: Emios_Pwm_Ip_GetCounterBusMode/51 Emios_Pwm_Ip_GetCounterBusMode/51 Emios_Pwm_Ip_GetCounterBusMode/51 
  Calls: 
Emios_Pwm_Ip_SetPwmModePol/28 (Emios_Pwm_Ip_SetPwmModePol) @06c477e0
  Type: function definition analyzed
  Visibility: prevailing_def_ironly
  References: 
  Referring: 
  Availability: local
  Function flags: body local optimize_size
  Called by: Emios_Pwm_Ip_SetOutputToNormal/82 Emios_Pwm_Ip_SetOutputToNormal/82 
  Calls: 
Emios_Pwm_Ip_GetPwmMode/27 (Emios_Pwm_Ip_GetPwmMode) @06c47380
  Type: function definition analyzed
  Visibility: prevailing_def_ironly
  References: 
  Referring: 
  Availability: local
  Function flags: body local optimize_size
  Called by: Emios_Pwm_Ip_SyncUpdate/90 Emios_Pwm_Ip_GetChannelMode/83 Emios_Pwm_Ip_SetOutputToNormal/82 Emios_Pwm_Ip_SetPhaseShift/71 Emios_Pwm_Ip_SetDutyCycleOpwmcb/55 Emios_Pwm_Ip_SetDutyCycle/69 Emios_Pwm_Ip_GetDutyCycle/68 Emios_Pwm_Ip_GetPeriod/66 Emios_Pwm_Ip_DeInitChannel/63 
  Calls: 
Emios_Pwm_Ip_SetPwmMode/26 (Emios_Pwm_Ip_SetPwmMode) @06c470e0
  Type: function definition analyzed
  Visibility: prevailing_def_ironly
  References: 
  Referring: 
  Availability: local
  Function flags: body local optimize_size
  Called by: Emios_Pwm_Ip_SetOutputToNormal/82 Emios_Pwm_Ip_SetOutputToNormal/82 Emios_Pwm_Ip_SetOutputState/81 Emios_Pwm_Ip_InitDoubleCompareMode/60 Emios_Pwm_Ip_InitTriggerMode/58 Emios_Pwm_Ip_InitEdgePlacementMode/56 Emios_Pwm_Ip_InitDeadTimeMode/54 Emios_Pwm_Ip_InitPeriodDutyCycleMode/52 
  Calls: 
Emios_Pwm_Ip_SetEdgePolarity/24 (Emios_Pwm_Ip_SetEdgePolarity) @06c42a80
  Type: function definition analyzed
  Visibility: prevailing_def_ironly
  References: 
  Referring: 
  Availability: local
  Function flags: body local optimize_size
  Called by: Emios_Pwm_Ip_SetOutputToNormal/82 Emios_Pwm_Ip_SetOutputToNormal/82 Emios_Pwm_Ip_SetOutputToNormal/82 Emios_Pwm_Ip_SetOutputState/81 Emios_Pwm_Ip_SetOutputState/81 Emios_Pwm_Ip_SetDutyCycleDaoc/61 Emios_Pwm_Ip_SetDutyCycleDaoc/61 Emios_Pwm_Ip_SetDutyCycleDaoc/61 Emios_Pwm_Ip_InitDoubleCompareMode/60 Emios_Pwm_Ip_InitDoubleCompareMode/60 Emios_Pwm_Ip_InitDoubleCompareMode/60 Emios_Pwm_Ip_InitDoubleCompareMode/60 Emios_Pwm_Ip_InitDoubleCompareMode/60 Emios_Pwm_Ip_InitDoubleCompareMode/60 Emios_Pwm_Ip_InitTriggerMode/58 Emios_Pwm_Ip_InitTriggerMode/58 Emios_Pwm_Ip_InitTriggerMode/58 Emios_Pwm_Ip_InitEdgePlacementMode/56 Emios_Pwm_Ip_InitDeadTimeMode/54 Emios_Pwm_Ip_InitDeadTimeMode/54 Emios_Pwm_Ip_InitDeadTimeMode/54 Emios_Pwm_Ip_InitPeriodDutyCycleMode/52 
  Calls: 
Emios_Pwm_Ip_GetCounterBus/23 (Emios_Pwm_Ip_GetCounterBus) @06c42700
  Type: function definition analyzed
  Visibility: prevailing_def_ironly
  References: 
  Referring: 
  Availability: local
  Function flags: body local optimize_size
  Called by: Emios_Pwm_Ip_GetMasterBusChannel/84 Emios_Pwm_Ip_SetTriggerPlacement/75 Emios_Pwm_Ip_SetPhaseShift/71 Emios_Pwm_Ip_SetPhaseShift/71 Emios_Pwm_Ip_SetDutyCycleOpwmt/59 Emios_Pwm_Ip_SetDutyCycleOpwmb/57 Emios_Pwm_Ip_SetDutyCycleOpwmcb/55 Emios_Pwm_Ip_GetDutyCycle/68 Emios_Pwm_Ip_GetPeriod/66 
  Calls: 
Emios_Pwm_Ip_SetCounterBus/22 (Emios_Pwm_Ip_SetCounterBus) @06c42460
  Type: function definition analyzed
  Visibility: prevailing_def_ironly
  References: 
  Referring: 
  Availability: local
  Function flags: body local optimize_size
  Called by: Emios_Pwm_Ip_SetBusSelected/86 Emios_Pwm_Ip_InitDoubleCompareMode/60 Emios_Pwm_Ip_InitTriggerMode/58 Emios_Pwm_Ip_InitEdgePlacementMode/56 Emios_Pwm_Ip_InitDeadTimeMode/54 Emios_Pwm_Ip_InitPeriodDutyCycleMode/52 
  Calls: 
Emios_Pwm_Ip_SetForceMatchB/21 (Emios_Pwm_Ip_SetForceMatchB) @06c420e0
  Type: function definition analyzed
  Visibility: prevailing_def_ironly
  References: 
  Referring: 
  Availability: local
  Function flags: body local optimize_size
  Called by: Emios_Pwm_Ip_SyncUpdate/90 Emios_Pwm_Ip_SetDutyCycleDaoc/61 Emios_Pwm_Ip_SetDutyCycleOpwmcb/55 Emios_Pwm_Ip_ForceMatchTrailingEdge/65 Emios_Pwm_Ip_InitDoubleCompareMode/60 
  Calls: 
Emios_Pwm_Ip_SetForceMatchA/20 (Emios_Pwm_Ip_SetForceMatchA) @06c3dd20
  Type: function definition analyzed
  Visibility: prevailing_def_ironly
  References: 
  Referring: 
  Availability: local
  Function flags: body local optimize_size
  Called by: Emios_Pwm_Ip_SyncUpdate/90 Emios_Pwm_Ip_SetDutyCycleDaoc/61 Emios_Pwm_Ip_SetDutyCycleOpwmcb/55 Emios_Pwm_Ip_ForceMatchLeadingEdge/64 Emios_Pwm_Ip_InitDoubleCompareMode/60 
  Calls: 
Emios_Pwm_Ip_GetInterruptRequest/19 (Emios_Pwm_Ip_GetInterruptRequest) @06c3d9a0
  Type: function definition analyzed
  Visibility: prevailing_def_ironly
  References: 
  Referring: 
  Availability: local
  Function flags: body local optimize_size
  Called by: Emios_Pwm_Ip_GetFlagRequest/78 
  Calls: 
Emios_Pwm_Ip_SetInterruptRequest/18 (Emios_Pwm_Ip_SetInterruptRequest) @06c3d700
  Type: function definition analyzed
  Visibility: prevailing_def_ironly
  References: 
  Referring: 
  Availability: local
  Function flags: body local optimize_size
  Called by: Emios_Pwm_Ip_SetOutputState/81 Emios_Pwm_Ip_SetFlagRequest/79 Emios_Pwm_Ip_SetFlagRequest/79 Emios_Pwm_Ip_SetFlagRequest/79 Emios_Pwm_Ip_SetDutyCycleOpwmt/59 Emios_Pwm_Ip_SetDutyCycleOpwmt/59 Emios_Pwm_Ip_SetDutyCycleOpwmt/59 Emios_Pwm_Ip_SetDutyCycleDaoc/61 Emios_Pwm_Ip_SetDutyCycleDaoc/61 Emios_Pwm_Ip_SetDutyCycleOpwmb/57 Emios_Pwm_Ip_SetDutyCycleOpwmb/57 Emios_Pwm_Ip_SetDutyCycleOpwmb/57 Emios_Pwm_Ip_SetDutyCycleOpwmcb/55 Emios_Pwm_Ip_SetDutyCycleOpwmcb/55 Emios_Pwm_Ip_SetDutyCycleOpwmcb/55 Emios_Pwm_Ip_SetDutyCycleOpwfmb/53 Emios_Pwm_Ip_SetDutyCycleOpwfmb/53 Emios_Pwm_Ip_SetDutyCycleOpwfmb/53 Emios_Pwm_Ip_SetDutyCycleOpwfmb/53 Emios_Pwm_Ip_InitDoubleCompareMode/60 
  Calls: 
Emios_Pwm_Ip_GetDMARequest/17 (Emios_Pwm_Ip_GetDMARequest) @06c3d380
  Type: function definition analyzed
  Visibility: prevailing_def_ironly
  References: 
  Referring: 
  Availability: local
  Function flags: body local optimize_size
  Called by: Emios_Pwm_Ip_GetFlagRequest/78 
  Calls: 
Emios_Pwm_Ip_SetDMARequest/16 (Emios_Pwm_Ip_SetDMARequest) @06c3d0e0
  Type: function definition analyzed
  Visibility: prevailing_def_ironly
  References: 
  Referring: 
  Availability: local
  Function flags: body local optimize_size
  Called by: Emios_Pwm_Ip_SetFlagRequest/79 Emios_Pwm_Ip_SetFlagRequest/79 Emios_Pwm_Ip_SetFlagRequest/79 Emios_Pwm_Ip_InitChannel/62 
  Calls: 
Emios_Pwm_Ip_SetPrescalerEnable/15 (Emios_Pwm_Ip_SetPrescalerEnable) @06c37d20
  Type: function definition analyzed
  Visibility: prevailing_def_ironly
  References: 
  Referring: 
  Availability: local
  Function flags: body local optimize_size
  Called by: Emios_Pwm_Ip_SetClockPs/87 Emios_Pwm_Ip_SetClockPs/87 Emios_Pwm_Ip_SetPreEnableClock/85 Emios_Pwm_Ip_InitChannel/62 
  Calls: 
Emios_Pwm_Ip_SetOutDisableSource/14 (Emios_Pwm_Ip_SetOutDisableSource) @06c379a0
  Type: function definition analyzed
  Visibility: prevailing_def_ironly
  References: 
  Referring: 
  Availability: local
  Function flags: body local optimize_size
  Called by: Emios_Pwm_Ip_InitChannel/62 
  Calls: 
Emios_Pwm_Ip_SetOutDisable/13 (Emios_Pwm_Ip_SetOutDisable) @06c37620
  Type: function definition analyzed
  Visibility: prevailing_def_ironly
  References: 
  Referring: 
  Availability: local
  Function flags: body local optimize_size
  Called by: Emios_Pwm_Ip_InitChannel/62 
  Calls: 
Emios_Pwm_Ip_SetFreezeEnable/12 (Emios_Pwm_Ip_SetFreezeEnable) @06c372a0
  Type: function definition analyzed
  Visibility: prevailing_def_ironly
  References: 
  Referring: 
  Availability: local
  Function flags: body local optimize_size
  Called by: Emios_Pwm_Ip_ChannelStopDebugMode/77 Emios_Pwm_Ip_ChannelEnterDebugMode/76 
  Calls: 
Emios_Pwm_Ip_GetUCRegB/10 (Emios_Pwm_Ip_GetUCRegB) @06c33c40
  Type: function definition analyzed
  Visibility: prevailing_def_ironly
  References: 
  Referring: 
  Availability: local
  Function flags: body local optimize_size
  Called by: Emios_Pwm_Ip_GetDeadTime/72 Emios_Pwm_Ip_GetDutyCycle/68 Emios_Pwm_Ip_GetPeriod/66 
  Calls: 
Emios_Pwm_Ip_SetUCRegB/9 (Emios_Pwm_Ip_SetUCRegB) @06c339a0
  Type: function definition analyzed
  Visibility: prevailing_def_ironly
  References: 
  Referring: 
  Availability: local
  Function flags: body local optimize_size
  Called by: Emios_Pwm_Ip_SetDeadTime/73 Emios_Pwm_Ip_SetPhaseShift/71 Emios_Pwm_Ip_SetPhaseShift/71 Emios_Pwm_Ip_SetDutyCycleOpwmt/59 Emios_Pwm_Ip_SetDutyCycleOpwmt/59 Emios_Pwm_Ip_SetDutyCycleOpwmt/59 Emios_Pwm_Ip_SetDutyCycleDaoc/61 Emios_Pwm_Ip_SetDutyCycleDaoc/61 Emios_Pwm_Ip_SetDutyCycleDaoc/61 Emios_Pwm_Ip_SetDutyCycleOpwmb/57 Emios_Pwm_Ip_SetPeriod/67 Emios_Pwm_Ip_DeInitChannel/63 Emios_Pwm_Ip_InitDoubleCompareMode/60 Emios_Pwm_Ip_InitDoubleCompareMode/60 Emios_Pwm_Ip_InitDoubleCompareMode/60 Emios_Pwm_Ip_InitTriggerMode/58 Emios_Pwm_Ip_InitEdgePlacementMode/56 Emios_Pwm_Ip_InitDeadTimeMode/54 Emios_Pwm_Ip_InitPeriodDutyCycleMode/52 
  Calls: 
Emios_Pwm_Ip_GetUCRegA/8 (Emios_Pwm_Ip_GetUCRegA) @06c33620
  Type: function definition analyzed
  Visibility: prevailing_def_ironly
  References: 
  Referring: 
  Availability: local
  Function flags: body local optimize_size
  Called by: Emios_Pwm_Ip_SyncUpdate/90 Emios_Pwm_Ip_GetPhaseShift/70 Emios_Pwm_Ip_SetDutyCycleDaoc/61 Emios_Pwm_Ip_SetDutyCycleDaoc/61 Emios_Pwm_Ip_SetDutyCycleOpwmcb/55 Emios_Pwm_Ip_GetDutyCycle/68 Emios_Pwm_Ip_InitDoubleCompareMode/60 Emios_Pwm_Ip_InitDoubleCompareMode/60 Emios_Pwm_Ip_GetCounterBusPeriod/50 Emios_Pwm_Ip_GetCounterBusPeriod/50 Emios_Pwm_Ip_GetCounterBusPeriod/50 
  Calls: 
Emios_Pwm_Ip_SetUCRegA/7 (Emios_Pwm_Ip_SetUCRegA) @06c33380
  Type: function definition analyzed
  Visibility: prevailing_def_ironly
  References: 
  Referring: 
  Availability: local
  Function flags: body local optimize_size
  Called by: Emios_Pwm_Ip_SetPhaseShift/71 Emios_Pwm_Ip_SetPhaseShift/71 Emios_Pwm_Ip_SetDutyCycleDaoc/61 Emios_Pwm_Ip_SetDutyCycleDaoc/61 Emios_Pwm_Ip_SetDutyCycleDaoc/61 Emios_Pwm_Ip_SetDutyCycleOpwmcb/55 Emios_Pwm_Ip_SetDutyCycleOpwmcb/55 Emios_Pwm_Ip_SetDutyCycleOpwmcb/55 Emios_Pwm_Ip_SetDutyCycleOpwfmb/53 Emios_Pwm_Ip_SetDutyCycleOpwfmb/53 Emios_Pwm_Ip_DeInitChannel/63 Emios_Pwm_Ip_InitDoubleCompareMode/60 Emios_Pwm_Ip_InitDoubleCompareMode/60 Emios_Pwm_Ip_InitDoubleCompareMode/60 Emios_Pwm_Ip_InitTriggerMode/58 Emios_Pwm_Ip_InitEdgePlacementMode/56 Emios_Pwm_Ip_InitDeadTimeMode/54 Emios_Pwm_Ip_InitPeriodDutyCycleMode/52 
  Calls: 
Emios_Pwm_Ip_GetOutputUpdateInstance/4 (Emios_Pwm_Ip_GetOutputUpdateInstance) @06c2ea80
  Type: function definition analyzed
  Visibility: prevailing_def_ironly
  References: 
  Referring: 
  Availability: local
  Function flags: body local optimize_size
  Called by: Emios_Pwm_Ip_SyncUpdate/90 
  Calls: 
Emios_Pwm_Ip_SetOutputUpdate/2 (Emios_Pwm_Ip_SetOutputUpdate) @06c2e540
  Type: function definition analyzed
  Visibility: prevailing_def_ironly
  References: 
  Referring: 
  Availability: local
  Function flags: body local optimize_size
  Called by: Emios_Pwm_Ip_InitChannel/62 
  Calls: 
Emios_Pwm_Ip_GetDebugMode/1 (Emios_Pwm_Ip_GetDebugMode) @06c2e2a0
  Type: function definition analyzed
  Visibility: prevailing_def_ironly
  References: 
  Referring: 
  Availability: local
  Function flags: body local optimize_size
  Called by: Emios_Pwm_Ip_ChannelEnterDebugMode/76 
  Calls: 
Emios_Pwm_Ip_SyncUpdate (uint8 instance)
{
  uint8 channelId;
  uint8 oudisDisable;
  Emios_Pwm_Ip_PwmModeType chMode;
  uint32 channelMask;
  uint32 oudisRegVal;
  struct Emios_Pwm_Ip_HwAddrType * const base;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) instance;
  base = Emios_Pwm_Ip_aBasePtr[_1];
  # DEBUG BEGIN_STMT
  oudisRegVal = Emios_Pwm_Ip_GetOutputUpdateInstance (base);
  # DEBUG BEGIN_STMT
  channelMask = 0;
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  oudisDisable = 0;
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  channelId = 0;
  goto <bb 14>; [INV]

  <bb 3> :
  # DEBUG BEGIN_STMT
  _2 = (int) channelId;
  _3 = 1 << _2;
  _4 = oudisRegVal & _3;
  _5 = (int) channelId;
  _6 = _4 >> _5;
  oudisDisable = (uint8) _6;
  # DEBUG BEGIN_STMT
  _7 = (int) instance;
  _8 = (int) channelId;
  _9 = Emios_Pwm_Ip_aCheckState[_7][_8];
  if (_9 != 0)
    goto <bb 4>; [INV]
  else
    goto <bb 13>; [INV]

  <bb 4> :
  if (oudisDisable == 1)
    goto <bb 5>; [INV]
  else
    goto <bb 13>; [INV]

  <bb 5> :
  # DEBUG BEGIN_STMT
  chMode = Emios_Pwm_Ip_GetPwmMode (base, channelId);
  # DEBUG BEGIN_STMT
  _10 = Emios_Pwm_Ip_GetUCRegA (base, channelId);
  if (_10 == 1)
    goto <bb 6>; [INV]
  else
    goto <bb 12>; [INV]

  <bb 6> :
  # DEBUG BEGIN_STMT
  if (chMode == 92)
    goto <bb 8>; [INV]
  else
    goto <bb 7>; [INV]

  <bb 7> :
  if (chMode == 94)
    goto <bb 8>; [INV]
  else
    goto <bb 9>; [INV]

  <bb 8> :
  # DEBUG BEGIN_STMT
  _11 = (int) channelId;
  _12 = 1 << _11;
  Emios_Mcl_Ip_ComparatorTransferEnable (instance, _12);
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetForceMatchB (base, channelId, 1);
  goto <bb 12>; [INV]

  <bb 9> :
  # DEBUG BEGIN_STMT
  if (chMode == 93)
    goto <bb 11>; [INV]
  else
    goto <bb 10>; [INV]

  <bb 10> :
  if (chMode == 95)
    goto <bb 11>; [INV]
  else
    goto <bb 12>; [INV]

  <bb 11> :
  # DEBUG BEGIN_STMT
  _13 = (int) channelId;
  _14 = 1 << _13;
  Emios_Mcl_Ip_ComparatorTransferEnable (instance, _14);
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetForceMatchA (base, channelId, 1);

  <bb 12> :
  # DEBUG BEGIN_STMT
  _15 = (int) channelId;
  _16 = 1 << _15;
  channelMask = channelMask | _16;

  <bb 13> :
  # DEBUG BEGIN_STMT
  channelId.13_17 = channelId;
  channelId = channelId.13_17 + 1;

  <bb 14> :
  # DEBUG BEGIN_STMT
  if (channelId <= 23)
    goto <bb 3>; [INV]
  else
    goto <bb 15>; [INV]

  <bb 15> :
  # DEBUG BEGIN_STMT
  Emios_Mcl_Ip_ComparatorTransferEnable (instance, channelMask);
  return;

}


Emios_Pwm_Ip_ComparatorTransferDisable (uint8 instance, uint32 channelMask)
{
  <bb 2> :
  # DEBUG BEGIN_STMT
  SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_30 ();
  # DEBUG BEGIN_STMT
  Emios_Mcl_Ip_ComparatorTransferDisable (instance, channelMask);
  # DEBUG BEGIN_STMT
  SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_30 ();
  return;

}


Emios_Pwm_Ip_ComparatorTransferEnable (uint8 instance, uint32 channelMask)
{
  <bb 2> :
  # DEBUG BEGIN_STMT
  SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_29 ();
  # DEBUG BEGIN_STMT
  Emios_Mcl_Ip_ComparatorTransferEnable (instance, channelMask);
  # DEBUG BEGIN_STMT
  SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_29 ();
  return;

}


Emios_Pwm_Ip_SetClockPs (uint8 instance, uint8 channel, Emios_Pwm_Ip_InternalClkPsType value)
{
  struct Emios_Pwm_Ip_HwAddrType * const base;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) instance;
  base = Emios_Pwm_Ip_aBasePtr[_1];
  # DEBUG BEGIN_STMT
  SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_28 ();
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetPrescalerEnable (base, channel, 0);
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetExtendedPrescaler (base, channel, value);
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetPrescalerEnable (base, channel, 1);
  # DEBUG BEGIN_STMT
  SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_28 ();
  return;

}


Emios_Pwm_Ip_SetBusSelected (uint8 instance, uint8 channel, Emios_Pwm_Ip_CounterBusSourceType value)
{
  struct Emios_Pwm_Ip_HwAddrType * const base;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) instance;
  base = Emios_Pwm_Ip_aBasePtr[_1];
  # DEBUG BEGIN_STMT
  SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_27 ();
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetCounterBus (base, channel, value);
  # DEBUG BEGIN_STMT
  SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_27 ();
  return;

}


Emios_Pwm_Ip_SetPreEnableClock (uint8 instance, uint8 channel, boolean value)
{
  struct Emios_Pwm_Ip_HwAddrType * const base;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) instance;
  base = Emios_Pwm_Ip_aBasePtr[_1];
  # DEBUG BEGIN_STMT
  SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_26 ();
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetPrescalerEnable (base, channel, value);
  # DEBUG BEGIN_STMT
  SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_26 ();
  return;

}


Emios_Pwm_Ip_GetMasterBusChannel (uint8 instance, uint8 channel)
{
  Emios_Pwm_Ip_CounterBusSourceType counterBus;
  uint8 channelMaster;
  const struct Emios_Pwm_Ip_HwAddrType * const base;
  uint8 D.8828;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) instance;
  base = Emios_Pwm_Ip_aBasePtr[_1];
  # DEBUG BEGIN_STMT
  channelMaster = channel;
  # DEBUG BEGIN_STMT
  counterBus = Emios_Pwm_Ip_GetCounterBus (base, channel);
  # DEBUG BEGIN_STMT
  _2 = (int) counterBus;
  switch (_2) <default: <L3> [INV], case 0: <L0> [INV], case 1: <L2> [INV], case 2: <L1> [INV]>

  <bb 3> :
<L0>:
  # DEBUG BEGIN_STMT
  channelMaster = 23;
  # DEBUG BEGIN_STMT
  goto <bb 7>; [INV]

  <bb 4> :
<L1>:
  # DEBUG BEGIN_STMT
  channelMaster = 22;
  # DEBUG BEGIN_STMT
  goto <bb 7>; [INV]

  <bb 5> :
<L2>:
  # DEBUG BEGIN_STMT
  _3 = channel >> 3;
  channelMaster = _3 * 8;
  # DEBUG BEGIN_STMT
  goto <bb 7>; [INV]

  <bb 6> :
<L3>:
  # DEBUG BEGIN_STMT
  channelMaster = channel;
  # DEBUG BEGIN_STMT

  <bb 7> :
  # DEBUG BEGIN_STMT
  D.8828 = channelMaster;
  return D.8828;

}


Emios_Pwm_Ip_GetChannelMode (uint8 instance, uint8 channel)
{
  Emios_Pwm_Ip_PwmModeType channelMode;
  const struct Emios_Pwm_Ip_HwAddrType * const base;
  Emios_Pwm_Ip_PwmModeType D.8826;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) instance;
  base = Emios_Pwm_Ip_aBasePtr[_1];
  # DEBUG BEGIN_STMT
  channelMode = Emios_Pwm_Ip_GetPwmMode (base, channel);
  # DEBUG BEGIN_STMT
  D.8826 = channelMode;
  return D.8826;

}


Emios_Pwm_Ip_SetOutputToNormal (uint8 instance, uint8 channel, uint16 dutyPercent, Emios_Pwm_Ip_PolarityType polarity, Emios_Pwm_Ip_PwmModeType mode)
{
  struct Emios_Pwm_Ip_HwAddrType * const base;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) instance;
  base = Emios_Pwm_Ip_aBasePtr[_1];
  # DEBUG BEGIN_STMT
  SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_25 ();
  # DEBUG BEGIN_STMT
  _2 = Emios_Pwm_Ip_GetPwmMode (base, channel);
  if (_2 == 1)
    goto <bb 3>; [INV]
  else
    goto <bb 12>; [INV]

  <bb 3> :
  # DEBUG BEGIN_STMT
  if (mode == 88)
    goto <bb 5>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 4> :
  if (mode == 90)
    goto <bb 5>; [INV]
  else
    goto <bb 6>; [INV]

  <bb 5> :
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetPwmMode (base, channel, mode);
  # DEBUG BEGIN_STMT
  _3 = polarity != 1;
  _4 = (<unnamed type>) _3;
  Emios_Pwm_Ip_SetEdgePolarity (base, channel, _4);
  goto <bb 12>; [INV]

  <bb 6> :
  # DEBUG BEGIN_STMT
  if (mode == 96)
    goto <bb 8>; [INV]
  else
    goto <bb 7>; [INV]

  <bb 7> :
  if (mode == 98)
    goto <bb 8>; [INV]
  else
    goto <bb 9>; [INV]

  <bb 8> :
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetPwmMode (base, channel, mode);
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetEdgePolarity (base, channel, polarity);
  goto <bb 12>; [INV]

  <bb 9> :
  # DEBUG BEGIN_STMT
  if (dutyPercent == 32768)
    goto <bb 10>; [INV]
  else
    goto <bb 11>; [INV]

  <bb 10> :
  # DEBUG BEGIN_STMT
  _5 = polarity != 1;
  _6 = (<unnamed type>) _5;
  Emios_Pwm_Ip_SetPwmModePol (base, channel, mode, _6);
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetEdgePolarity (base, channel, polarity);
  goto <bb 12>; [INV]

  <bb 11> :
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetPwmModePol (base, channel, mode, polarity);

  <bb 12> :
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_25 ();
  return;

}


Emios_Pwm_Ip_SetOutputState (uint8 instance, uint8 channel, Emios_Pwm_Ip_OutputStateType outputState)
{
  struct Emios_Pwm_Ip_HwAddrType * const base;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) instance;
  base = Emios_Pwm_Ip_aBasePtr[_1];
  # DEBUG BEGIN_STMT
  SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_24 ();
  # DEBUG BEGIN_STMT
  if (outputState == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetEdgePolarity (base, channel, 0);
  goto <bb 5>; [INV]

  <bb 4> :
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetEdgePolarity (base, channel, 1);

  <bb 5> :
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetPwmMode (base, channel, 1);
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetInterruptRequest (base, channel, 0);
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_ClearFlagEvent (base, channel);
  # DEBUG BEGIN_STMT
  SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_24 ();
  return;

}


Emios_Pwm_Ip_GetOutputState (uint8 instance, uint8 channel)
{
  const struct Emios_Pwm_Ip_HwAddrType * const base;
  Emios_Pwm_Ip_OutputStateType iftmp.12;
  Emios_Pwm_Ip_OutputStateType D.8801;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) instance;
  base = Emios_Pwm_Ip_aBasePtr[_1];
  # DEBUG BEGIN_STMT
  _2 = Emios_Pwm_Ip_GetOutputPinState (base, channel);
  _3 = ~_2;
  if (_3 != 0)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  iftmp.12 = 0;
  goto <bb 5>; [INV]

  <bb 4> :
  iftmp.12 = 1;

  <bb 5> :
  D.8801 = iftmp.12;
  return D.8801;

}


Emios_Pwm_Ip_SetFlagRequest (uint8 instance, uint8 channel, Emios_Pwm_Ip_InterruptType event)
{
  struct Emios_Pwm_Ip_HwAddrType * const base;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) instance;
  base = Emios_Pwm_Ip_aBasePtr[_1];
  # DEBUG BEGIN_STMT
  SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_23 ();
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_ClearFlagEvent (base, channel);
  # DEBUG BEGIN_STMT
  _2 = (int) event;
  switch (_2) <default: <L7> [INV], case 0: <L4> [INV], case 1: <L0> [INV], case 2: <L3> [INV]>

  <bb 3> :
<L0>:
  # DEBUG BEGIN_STMT
  _3 = (int) instance;
  _4 = (int) channel;
  _5 = Emios_Pwm_Ip_aNotif[_3][_4];
  if (_5 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 7>; [INV]

  <bb 4> :
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetInterruptRequest (base, channel, 1);
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetDMARequest (base, channel, 0);
  # DEBUG BEGIN_STMT
  _6 = (int) instance;
  _7 = (int) channel;
  Emios_Pwm_Ip_aCheckEnableNotif[_6][_7] = 1;
  goto <bb 7>; [INV]

  <bb 5> :
<L3>:
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetInterruptRequest (base, channel, 1);
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetDMARequest (base, channel, 1);
  # DEBUG BEGIN_STMT
  goto <bb 7>; [INV]

  <bb 6> :
<L4>:
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetInterruptRequest (base, channel, 0);
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetDMARequest (base, channel, 0);
  # DEBUG BEGIN_STMT
  _8 = (int) instance;
  _9 = (int) channel;
  Emios_Pwm_Ip_aCheckEnableNotif[_8][_9] = 0;
  # DEBUG BEGIN_STMT

  <bb 7> :
<L7>:
  # DEBUG BEGIN_STMT
  SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_23 ();
  return;

}


Emios_Pwm_Ip_GetFlagRequest (uint8 instance, uint8 channel)
{
  Emios_Pwm_Ip_InterruptType eventType;
  const struct Emios_Pwm_Ip_HwAddrType * const base;
  Emios_Pwm_Ip_InterruptType D.8792;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) instance;
  base = Emios_Pwm_Ip_aBasePtr[_1];
  # DEBUG BEGIN_STMT
  eventType = 0;
  # DEBUG BEGIN_STMT
  _2 = Emios_Pwm_Ip_GetInterruptRequest (base, channel);
  if (_2 != 0)
    goto <bb 3>; [INV]
  else
    goto <bb 6>; [INV]

  <bb 3> :
  # DEBUG BEGIN_STMT
  _3 = Emios_Pwm_Ip_GetDMARequest (base, channel);
  if (_3 != 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  # DEBUG BEGIN_STMT
  eventType = 2;
  goto <bb 6>; [INV]

  <bb 5> :
  # DEBUG BEGIN_STMT
  eventType = 1;

  <bb 6> :
  # DEBUG BEGIN_STMT
  D.8792 = eventType;
  return D.8792;

}


Emios_Pwm_Ip_ChannelStopDebugMode (uint8 instance, uint8 channel)
{
  struct Emios_Pwm_Ip_HwAddrType * const base;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) instance;
  base = Emios_Pwm_Ip_aBasePtr[_1];
  # DEBUG BEGIN_STMT
  SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_22 ();
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetFreezeEnable (base, channel, 0);
  # DEBUG BEGIN_STMT
  SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_22 ();
  return;

}


Emios_Pwm_Ip_ChannelEnterDebugMode (uint8 instance, uint8 channel)
{
  Emios_Pwm_Ip_StatusType ret;
  struct Emios_Pwm_Ip_HwAddrType * const base;
  Emios_Pwm_Ip_StatusType D.8779;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) instance;
  base = Emios_Pwm_Ip_aBasePtr[_1];
  # DEBUG BEGIN_STMT
  ret = 0;
  # DEBUG BEGIN_STMT
  SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_21 ();
  # DEBUG BEGIN_STMT
  _2 = Emios_Pwm_Ip_GetDebugMode (base);
  if (_2 != 0)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetFreezeEnable (base, channel, 1);
  goto <bb 5>; [INV]

  <bb 4> :
  # DEBUG BEGIN_STMT
  ret = 3075;

  <bb 5> :
  # DEBUG BEGIN_STMT
  SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_21 ();
  # DEBUG BEGIN_STMT
  D.8779 = ret;
  return D.8779;

}


Emios_Pwm_Ip_SetTriggerPlacement (uint8 instance, uint8 channel, uint32 newTriggerPlacement)
{
  uint8 counterStart;
  struct Emios_Pwm_Ip_HwAddrType * const base;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) instance;
  base = Emios_Pwm_Ip_aBasePtr[_1];
  # DEBUG BEGIN_STMT
  counterStart = 0;
  # DEBUG BEGIN_STMT
  SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_20 ();
  # DEBUG BEGIN_STMT
  _2 = Emios_Pwm_Ip_GetCounterBus (base, channel);
  _3 = Emios_Pwm_Ip_GetCounterBusMode (instance, channel, _2);
  if (_3 == 80)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  # DEBUG BEGIN_STMT
  counterStart = 1;
  goto <bb 5>; [INV]

  <bb 4> :
  # DEBUG BEGIN_STMT
  counterStart = 0;

  <bb 5> :
  # DEBUG BEGIN_STMT
  _4 = (short unsigned int) newTriggerPlacement;
  _5 = (short unsigned int) counterStart;
  _6 = _4 + _5;
  Emios_Pwm_Ip_SetTrigger (base, channel, _6);
  # DEBUG BEGIN_STMT
  SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_20 ();
  return;

}


Emios_Pwm_Ip_GetTriggerPlacement (uint8 instance, uint8 channel)
{
  const struct Emios_Pwm_Ip_HwAddrType * const base;
  uint32 D.8769;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) instance;
  base = Emios_Pwm_Ip_aBasePtr[_1];
  # DEBUG BEGIN_STMT
  _2 = Emios_Pwm_Ip_GetTrigger (base, channel);
  D.8769 = (uint32) _2;
  return D.8769;

}


Emios_Pwm_Ip_SetDeadTime (uint8 instance, uint8 channel, uint16 newDeadTime)
{
  struct Emios_Pwm_Ip_HwAddrType * const base;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) instance;
  base = Emios_Pwm_Ip_aBasePtr[_1];
  # DEBUG BEGIN_STMT
  SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_19 ();
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetUCRegB (base, channel, newDeadTime);
  # DEBUG BEGIN_STMT
  SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_19 ();
  return;

}


Emios_Pwm_Ip_GetDeadTime (uint8 instance, uint8 channel)
{
  const struct Emios_Pwm_Ip_HwAddrType * const base;
  uint16 D.8767;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) instance;
  base = Emios_Pwm_Ip_aBasePtr[_1];
  # DEBUG BEGIN_STMT
  D.8767 = Emios_Pwm_Ip_GetUCRegB (base, channel);
  return D.8767;

}


Emios_Pwm_Ip_SetPhaseShift (uint8 instance, uint8 channel, uint16 phaseShift)
{
  uint8 counterStart;
  uint16 dutyCycle;
  uint16 chPeriod;
  Emios_Pwm_Ip_PwmModeType chMode;
  struct Emios_Pwm_Ip_HwAddrType * const base;
  Emios_Pwm_Ip_StatusType status;
  Emios_Pwm_Ip_StatusType D.8765;

  <bb 2> :
  # DEBUG BEGIN_STMT
  status = 0;
  # DEBUG BEGIN_STMT
  _1 = (int) instance;
  base = Emios_Pwm_Ip_aBasePtr[_1];
  # DEBUG BEGIN_STMT
  chMode = Emios_Pwm_Ip_GetPwmMode (base, channel);
  # DEBUG BEGIN_STMT
  chPeriod = 0;
  # DEBUG BEGIN_STMT
  dutyCycle = 0;
  # DEBUG BEGIN_STMT
  counterStart = 0;
  # DEBUG BEGIN_STMT
  SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_18 ();
  # DEBUG BEGIN_STMT
  _2 = Emios_Pwm_Ip_GetCounterBus (base, channel);
  chPeriod = Emios_Pwm_Ip_GetCounterBusPeriod (instance, channel, _2);
  # DEBUG BEGIN_STMT
  dutyCycle = Emios_Pwm_Ip_GetDutyCycle (instance, channel);
  # DEBUG BEGIN_STMT
  _3 = Emios_Pwm_Ip_GetCounterBus (base, channel);
  _4 = Emios_Pwm_Ip_GetCounterBusMode (instance, channel, _3);
  if (_4 == 80)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  # DEBUG BEGIN_STMT
  counterStart = 1;
  goto <bb 5>; [INV]

  <bb 4> :
  # DEBUG BEGIN_STMT
  counterStart = 0;

  <bb 5> :
  # DEBUG BEGIN_STMT
  _5 = (short unsigned int) counterStart;
  _6 = (int) instance;
  _7 = (int) channel;
  _8 = phaseShift + _5;
  Emios_Pwm_Ip_aRegA[_6][_7] = _8;
  # DEBUG BEGIN_STMT
  if (chMode == 96)
    goto <bb 7>; [INV]
  else
    goto <bb 6>; [INV]

  <bb 6> :
  if (chMode == 98)
    goto <bb 7>; [INV]
  else
    goto <bb 10>; [INV]

  <bb 7> :
  # DEBUG BEGIN_STMT
  _9 = (int) phaseShift;
  _10 = (int) dutyCycle;
  _11 = _9 + _10;
  _12 = (int) chPeriod;
  if (_11 > _12)
    goto <bb 8>; [INV]
  else
    goto <bb 9>; [INV]

  <bb 8> :
  # DEBUG BEGIN_STMT
  status = 1;
  goto <bb 16>; [INV]

  <bb 9> :
  # DEBUG BEGIN_STMT
  _13 = (short unsigned int) counterStart;
  _14 = phaseShift + _13;
  Emios_Pwm_Ip_SetUCRegA (base, channel, _14);
  # DEBUG BEGIN_STMT
  _15 = phaseShift + dutyCycle;
  _16 = (short unsigned int) counterStart;
  _17 = _15 + _16;
  Emios_Pwm_Ip_SetUCRegB (base, channel, _17);
  goto <bb 16>; [INV]

  <bb 10> :
  # DEBUG BEGIN_STMT
  if (chMode == 38)
    goto <bb 11>; [INV]
  else
    goto <bb 15>; [INV]

  <bb 11> :
  # DEBUG BEGIN_STMT
  if (phaseShift > chPeriod)
    goto <bb 12>; [INV]
  else
    goto <bb 13>; [INV]

  <bb 12> :
  # DEBUG BEGIN_STMT
  status = 1;
  goto <bb 16>; [INV]

  <bb 13> :
  # DEBUG BEGIN_STMT
  _18 = (short unsigned int) counterStart;
  _19 = phaseShift + _18;
  Emios_Pwm_Ip_SetUCRegA (base, channel, _19);
  # DEBUG BEGIN_STMT
  _20 = (unsigned int) dutyCycle;
  _21 = (unsigned int) chPeriod;
  _22 = _21 + 1;
  if (_20 < _22)
    goto <bb 14>; [INV]
  else
    goto <bb 16>; [INV]

  <bb 14> :
  # DEBUG BEGIN_STMT
  _23 = (int) phaseShift;
  _24 = (int) dutyCycle;
  _25 = _23 + _24;
  _26 = (int) chPeriod;
  _27 = _25 % _26;
  _28 = (short unsigned int) _27;
  _29 = (short unsigned int) counterStart;
  _30 = _28 + _29;
  Emios_Pwm_Ip_SetUCRegB (base, channel, _30);
  goto <bb 16>; [INV]

  <bb 15> :
  # DEBUG BEGIN_STMT
  status = 1;

  <bb 16> :
  # DEBUG BEGIN_STMT
  SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_18 ();
  # DEBUG BEGIN_STMT
  D.8765 = status;
  return D.8765;

}


Emios_Pwm_Ip_GetPhaseShift (uint8 instance, uint8 channel)
{
  const struct Emios_Pwm_Ip_HwAddrType * const base;
  uint16 D.8745;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) instance;
  base = Emios_Pwm_Ip_aBasePtr[_1];
  # DEBUG BEGIN_STMT
  D.8745 = Emios_Pwm_Ip_GetUCRegA (base, channel);
  return D.8745;

}


Emios_Pwm_Ip_SetDutyCycle (uint8 instance, uint8 channel, uint16 newDutyCycle)
{
  Emios_Pwm_Ip_PwmModeType chMode;
  Emios_Pwm_Ip_StatusType ret;
  const struct Emios_Pwm_Ip_HwAddrType * const base;
  Emios_Pwm_Ip_StatusType D.8668;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) instance;
  base = Emios_Pwm_Ip_aBasePtr[_1];
  # DEBUG BEGIN_STMT
  ret = 0;
  # DEBUG BEGIN_STMT
  chMode = Emios_Pwm_Ip_GetPwmMode (base, channel);
  # DEBUG BEGIN_STMT
  SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_17 ();
  # DEBUG BEGIN_STMT
  if (chMode == 88)
    goto <bb 4>; [INV]
  else
    goto <bb 3>; [INV]

  <bb 3> :
  if (chMode == 90)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  # DEBUG BEGIN_STMT
  ret = Emios_Pwm_Ip_SetDutyCycleOpwfmb (instance, channel, newDutyCycle);
  goto <bb 16>; [INV]

  <bb 5> :
  # DEBUG BEGIN_STMT
  if (chMode == 92)
    goto <bb 9>; [INV]
  else
    goto <bb 6>; [INV]

  <bb 6> :
  if (chMode == 94)
    goto <bb 9>; [INV]
  else
    goto <bb 7>; [INV]

  <bb 7> :
  if (chMode == 93)
    goto <bb 9>; [INV]
  else
    goto <bb 8>; [INV]

  <bb 8> :
  if (chMode == 95)
    goto <bb 9>; [INV]
  else
    goto <bb 10>; [INV]

  <bb 9> :
  # DEBUG BEGIN_STMT
  ret = Emios_Pwm_Ip_SetDutyCycleOpwmcb (instance, channel, newDutyCycle);
  goto <bb 16>; [INV]

  <bb 10> :
  # DEBUG BEGIN_STMT
  if (chMode == 96)
    goto <bb 12>; [INV]
  else
    goto <bb 11>; [INV]

  <bb 11> :
  if (chMode == 98)
    goto <bb 12>; [INV]
  else
    goto <bb 13>; [INV]

  <bb 12> :
  # DEBUG BEGIN_STMT
  ret = Emios_Pwm_Ip_SetDutyCycleOpwmb (instance, channel, newDutyCycle);
  goto <bb 16>; [INV]

  <bb 13> :
  # DEBUG BEGIN_STMT
  _2 = chMode + 250;
  if (_2 <= 1)
    goto <bb 14>; [INV]
  else
    goto <bb 15>; [INV]

  <bb 14> :
  # DEBUG BEGIN_STMT
  ret = Emios_Pwm_Ip_SetDutyCycleDaoc (instance, channel, newDutyCycle);
  goto <bb 16>; [INV]

  <bb 15> :
  # DEBUG BEGIN_STMT
  ret = Emios_Pwm_Ip_SetDutyCycleOpwmt (instance, channel, newDutyCycle);

  <bb 16> :
  # DEBUG BEGIN_STMT
  SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_17 ();
  # DEBUG BEGIN_STMT
  D.8668 = ret;
  return D.8668;

}


Emios_Pwm_Ip_GetDutyCycle (uint8 instance, uint8 channel)
{
  uint16 dutyCycle;
  uint16 chPeriod;
  uint16 regBValue;
  uint16 regAValue;
  Emios_Pwm_Ip_PwmModeType chMode;
  const struct Emios_Pwm_Ip_HwAddrType * const base;
  uint16 D.8648;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) instance;
  base = Emios_Pwm_Ip_aBasePtr[_1];
  # DEBUG BEGIN_STMT
  chMode = Emios_Pwm_Ip_GetPwmMode (base, channel);
  # DEBUG BEGIN_STMT
  regAValue = Emios_Pwm_Ip_GetUCRegA (base, channel);
  # DEBUG BEGIN_STMT
  regBValue = Emios_Pwm_Ip_GetUCRegB (base, channel);
  # DEBUG BEGIN_STMT
  chPeriod = 0;
  # DEBUG BEGIN_STMT
  dutyCycle = 0;
  # DEBUG BEGIN_STMT
  _2 = (int) chMode;
  switch (_2) <default: <L20> [INV], case 6 ... 7: <L15> [INV], case 38: <L8> [INV], case 88: <L0> [INV], case 90: <L0> [INV], case 92 ... 95: <L0> [INV], case 96: <L6> [INV], case 98: <L6> [INV]>

  <bb 3> :
<L0>:
  # DEBUG BEGIN_STMT
  dutyCycle = regAValue;
  # DEBUG BEGIN_STMT
  goto <bb 11>; [INV]

  <bb 4> :
<L6>:
  # DEBUG BEGIN_STMT
  dutyCycle = regBValue - regAValue;
  # DEBUG BEGIN_STMT
  goto <bb 11>; [INV]

  <bb 5> :
<L8>:
  # DEBUG BEGIN_STMT
  _3 = Emios_Pwm_Ip_GetCounterBus (base, channel);
  chPeriod = Emios_Pwm_Ip_GetCounterBusPeriod (instance, channel, _3);
  # DEBUG BEGIN_STMT
  if (regBValue > chPeriod)
    goto <bb 6>; [INV]
  else
    goto <bb 7>; [INV]

  <bb 6> :
  # DEBUG BEGIN_STMT
  dutyCycle = regBValue;
  goto <bb 11>; [INV]

  <bb 7> :
  # DEBUG BEGIN_STMT
  if (regBValue < regAValue)
    goto <bb 8>; [INV]
  else
    goto <bb 9>; [INV]

  <bb 8> :
  # DEBUG BEGIN_STMT
  _4 = chPeriod - regAValue;
  dutyCycle = regBValue + _4;
  goto <bb 11>; [INV]

  <bb 9> :
  # DEBUG BEGIN_STMT
  dutyCycle = regBValue - regAValue;
  goto <bb 11>; [INV]

  <bb 10> :
<L15>:
  # DEBUG BEGIN_STMT
  _5 = (int) instance;
  _6 = (int) channel;
  dutyCycle = Emios_Pwm_Ip_aDaocDuty[_5][_6];
  # DEBUG BEGIN_STMT

  <bb 11> :
<L20>:
  # DEBUG BEGIN_STMT
  D.8648 = dutyCycle;
  return D.8648;

}


Emios_Pwm_Ip_SetPeriod (uint8 instance, uint8 channel, uint16 newPeriod)
{
  struct Emios_Pwm_Ip_HwAddrType * const base;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) instance;
  base = Emios_Pwm_Ip_aBasePtr[_1];
  # DEBUG BEGIN_STMT
  SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_16 ();
  # DEBUG BEGIN_STMT
  if (newPeriod == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 3>; [INV]

  <bb 3> :
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetUCRegB (base, channel, newPeriod);

  <bb 4> :
  # DEBUG BEGIN_STMT
  _2 = (int) instance;
  _3 = (int) channel;
  Emios_Pwm_Ip_aPeriod[_2][_3] = newPeriod;
  # DEBUG BEGIN_STMT
  SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_16 ();
  return;

}


Emios_Pwm_Ip_GetPeriod (uint8 instance, uint8 channel)
{
  uint16 chPeriod;
  Emios_Pwm_Ip_PwmModeType chMode;
  const struct Emios_Pwm_Ip_HwAddrType * const base;
  uint16 D.8633;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) instance;
  base = Emios_Pwm_Ip_aBasePtr[_1];
  # DEBUG BEGIN_STMT
  chMode = Emios_Pwm_Ip_GetPwmMode (base, channel);
  # DEBUG BEGIN_STMT
  chPeriod = 0;
  # DEBUG BEGIN_STMT
  if (chMode == 88)
    goto <bb 4>; [INV]
  else
    goto <bb 3>; [INV]

  <bb 3> :
  if (chMode == 90)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  # DEBUG BEGIN_STMT
  chPeriod = Emios_Pwm_Ip_GetUCRegB (base, channel);
  goto <bb 8>; [INV]

  <bb 5> :
  # DEBUG BEGIN_STMT
  _2 = chMode + 250;
  if (_2 <= 1)
    goto <bb 6>; [INV]
  else
    goto <bb 7>; [INV]

  <bb 6> :
  # DEBUG BEGIN_STMT
  _3 = (int) instance;
  _4 = (int) channel;
  chPeriod = Emios_Pwm_Ip_aPeriod[_3][_4];
  goto <bb 8>; [INV]

  <bb 7> :
  # DEBUG BEGIN_STMT
  _5 = Emios_Pwm_Ip_GetCounterBus (base, channel);
  chPeriod = Emios_Pwm_Ip_GetCounterBusPeriod (instance, channel, _5);

  <bb 8> :
  # DEBUG BEGIN_STMT
  D.8633 = chPeriod;
  return D.8633;

}


Emios_Pwm_Ip_ForceMatchTrailingEdge (uint8 instance, uint8 channel, boolean enable)
{
  struct Emios_Pwm_Ip_HwAddrType * const base;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) instance;
  base = Emios_Pwm_Ip_aBasePtr[_1];
  # DEBUG BEGIN_STMT
  SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_15 ();
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetForceMatchB (base, channel, enable);
  # DEBUG BEGIN_STMT
  SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_15 ();
  return;

}


Emios_Pwm_Ip_ForceMatchLeadingEdge (uint8 instance, uint8 channel, boolean enable)
{
  struct Emios_Pwm_Ip_HwAddrType * const base;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) instance;
  base = Emios_Pwm_Ip_aBasePtr[_1];
  # DEBUG BEGIN_STMT
  SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_14 ();
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetForceMatchA (base, channel, enable);
  # DEBUG BEGIN_STMT
  SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_14 ();
  return;

}


Emios_Pwm_Ip_DeInitChannel (uint8 instance, uint8 channel)
{
  struct Emios_Pwm_Ip_HwAddrType * const base;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) instance;
  base = Emios_Pwm_Ip_aBasePtr[_1];
  # DEBUG BEGIN_STMT
  _2 = (int) channel;
  base->CH.UC[_2].C2 = 0;
  # DEBUG BEGIN_STMT
  _3 = (int) channel;
  base->CH.UC[_3].C = 0;
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetUCRegA (base, channel, 0);
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetUCRegB (base, channel, 0);
  # DEBUG BEGIN_STMT
  _4 = Emios_Pwm_Ip_GetPwmMode (base, channel);
  if (_4 == 38)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetTrigger (base, channel, 0);

  <bb 4> :
  # DEBUG BEGIN_STMT
  _5 = (int) instance;
  _6 = (int) channel;
  Emios_Pwm_Ip_aCheckEnableNotif[_5][_6] = 0;
  # DEBUG BEGIN_STMT
  _7 = (int) instance;
  _8 = (int) channel;
  Emios_Pwm_Ip_aCheckState[_7][_8] = 0;
  return;

}


Emios_Pwm_Ip_InitChannel (uint8 instance, const struct Emios_Pwm_Ip_ChannelConfigType * userChCfg)
{
  uint8 channel;
  struct Emios_Pwm_Ip_HwAddrType * const base;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) instance;
  base = Emios_Pwm_Ip_aBasePtr[_1];
  # DEBUG BEGIN_STMT
  channel = userChCfg->channelId;
  # DEBUG BEGIN_STMT
  _2 = (int) instance;
  _3 = Emios_Pwm_Ip_aBasePtr[_2];
  _4 = userChCfg->channelId;
  _5 = (int) _4;
  _3->CH.UC[_5].C = 0;
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetOutputUpdate (base, channel, 1);
  # DEBUG BEGIN_STMT
  _6 = userChCfg->outputDisableSource;
  if (_6 != 255)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  # DEBUG BEGIN_STMT
  _7 = userChCfg->channelId;
  Emios_Pwm_Ip_SetOutDisable (base, _7, 1);
  # DEBUG BEGIN_STMT
  _8 = userChCfg->channelId;
  _9 = userChCfg->outputDisableSource;
  Emios_Pwm_Ip_SetOutDisableSource (base, _8, _9);

  <bb 4> :
  # DEBUG BEGIN_STMT
  _10 = userChCfg->irqMode;
  if (_10 != 0)
    goto <bb 5>; [INV]
  else
    goto <bb 8>; [INV]

  <bb 5> :
  # DEBUG BEGIN_STMT
  _11 = userChCfg->irqMode;
  if (_11 == 1)
    goto <bb 6>; [INV]
  else
    goto <bb 7>; [INV]

  <bb 6> :
  # DEBUG BEGIN_STMT
  _12 = (int) instance;
  _13 = userChCfg->channelId;
  _14 = (int) _13;
  _15 = &userChCfg->userCallback;
  Emios_Pwm_Ip_aNotificationPtr[_12][_14] = _15;
  goto <bb 8>; [INV]

  <bb 7> :
  # DEBUG BEGIN_STMT
  _16 = userChCfg->channelId;
  Emios_Pwm_Ip_SetDMARequest (base, _16, 1);

  <bb 8> :
  # DEBUG BEGIN_STMT
  _17 = userChCfg->mode;
  _18 = (int) _17;
  switch (_18) <default: <L22> [INV], case 6 ... 7: <L16> [INV], case 38: <L15> [INV], case 88: <L7> [INV], case 90: <L7> [INV], case 92 ... 95: <L9> [INV], case 96: <L13> [INV], case 98: <L13> [INV]>

  <bb 9> :
<L7>:
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_InitPeriodDutyCycleMode (instance, userChCfg);
  # DEBUG BEGIN_STMT
  goto <bb 14>; [INV]

  <bb 10> :
<L9>:
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_InitDeadTimeMode (instance, userChCfg);
  # DEBUG BEGIN_STMT
  goto <bb 14>; [INV]

  <bb 11> :
<L13>:
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_InitEdgePlacementMode (instance, userChCfg);
  # DEBUG BEGIN_STMT
  goto <bb 14>; [INV]

  <bb 12> :
<L15>:
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_InitTriggerMode (instance, userChCfg);
  # DEBUG BEGIN_STMT
  goto <bb 14>; [INV]

  <bb 13> :
<L16>:
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_InitDoubleCompareMode (instance, userChCfg);
  # DEBUG BEGIN_STMT

  <bb 14> :
<L22>:
  # DEBUG BEGIN_STMT
  _19 = userChCfg->internalPs;
  if (_19 != 255)
    goto <bb 15>; [INV]
  else
    goto <bb 16>; [INV]

  <bb 15> :
  # DEBUG BEGIN_STMT
  _20 = userChCfg->channelId;
  _21 = userChCfg->internalPs;
  Emios_Pwm_Ip_SetExtendedPrescaler (base, _20, _21);
  # DEBUG BEGIN_STMT
  _22 = userChCfg->channelId;
  _23 = userChCfg->internalPsSrc;
  Emios_Pwm_Ip_SetPrescalerSource (base, _22, _23);
  # DEBUG BEGIN_STMT
  _24 = userChCfg->channelId;
  Emios_Pwm_Ip_SetPrescalerEnable (base, _24, 1);

  <bb 16> :
  # DEBUG BEGIN_STMT
  _25 = (int) instance;
  _26 = userChCfg->channelId;
  _27 = (int) _26;
  Emios_Pwm_Ip_aCheckState[_25][_27] = 1;
  return;

}


Emios_Pwm_Ip_SetDutyCycleDaoc (uint8 instance, uint8 channel, uint16 newDutyCycle)
{
  uint16 counterMax;
  uint16 daocRegA;
  Emios_Pwm_Ip_StatusType ret;
  struct Emios_Pwm_Ip_HwAddrType * const base;
  Emios_Pwm_Ip_StatusType D.8732;
  uint16 iftmp.10;
  uint16 iftmp.9;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) instance;
  base = Emios_Pwm_Ip_aBasePtr[_1];
  # DEBUG BEGIN_STMT
  ret = 0;
  # DEBUG BEGIN_STMT
  daocRegA = 0;
  # DEBUG BEGIN_STMT
  _2 = Emios_Pwm_Ip_GetMasterBusChannel (instance, channel);
  counterMax = Emios_Pwm_Ip_GetUCRegA (base, _2);
  # DEBUG BEGIN_STMT
  _3 = (int) instance;
  _4 = (int) channel;
  _5 = Emios_Pwm_Ip_aPeriod[_3][_4];
  if (newDutyCycle > _5)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _6 = (int) instance;
  _7 = (int) channel;
  _8 = Emios_Pwm_Ip_aPeriod[_6][_7];
  if (_8 != 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  # DEBUG BEGIN_STMT
  ret = 1;
  goto <bb 17>; [INV]

  <bb 5> :
  # DEBUG BEGIN_STMT
  _9 = (int) instance;
  _10 = (int) channel;
  _11 = Emios_Pwm_Ip_aPeriod[_9][_10];
  if (_11 == 0)
    goto <bb 7>; [INV]
  else
    goto <bb 6>; [INV]

  <bb 6> :
  if (newDutyCycle == 0)
    goto <bb 7>; [INV]
  else
    goto <bb 8>; [INV]

  <bb 7> :
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetInterruptRequest (base, channel, 0);
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_ClearFlagEvent (base, channel);
  # DEBUG BEGIN_STMT
  _12 = (int) instance;
  _13 = (int) channel;
  Emios_Pwm_Ip_aDaocDuty[_12][_13] = 0;
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetForceMatchB (base, channel, 1);
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetUCRegA (base, channel, 1);
  # DEBUG BEGIN_STMT
  _14 = newDutyCycle + 1;
  Emios_Pwm_Ip_SetUCRegB (base, channel, _14);
  # DEBUG BEGIN_STMT
  _15 = (int) instance;
  _16 = (int) channel;
  _17 = Emios_Pwm_Ip_aPolarity[_15][_16];
  _18 = _17 == 1;
  _19 = (<unnamed type>) _18;
  Emios_Pwm_Ip_SetEdgePolarity (base, channel, _19);
  # DEBUG BEGIN_STMT
  _20 = (int) instance;
  _21 = (int) channel;
  Emios_Pwm_Ip_aNotif[_20][_21] = 1;
  goto <bb 17>; [INV]

  <bb 8> :
  # DEBUG BEGIN_STMT
  _22 = (int) instance;
  _23 = (int) channel;
  _24 = Emios_Pwm_Ip_aPeriod[_22][_23];
  if (newDutyCycle == _24)
    goto <bb 9>; [INV]
  else
    goto <bb 16>; [INV]

  <bb 9> :
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetInterruptRequest (base, channel, 0);
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_ClearFlagEvent (base, channel);
  # DEBUG BEGIN_STMT
  _25 = (int) instance;
  _26 = (int) channel;
  Emios_Pwm_Ip_aDaocDuty[_25][_26] = 0;
  # DEBUG BEGIN_STMT
  _27 = (int) instance;
  _28 = (int) channel;
  _29 = Emios_Pwm_Ip_aPeriod[_27][_28];
  _30 = (int) _29;
  _31 = Emios_Pwm_Ip_GetUCRegA (base, channel);
  _32 = (int) _31;
  _33 = _30 + _32;
  _34 = (int) counterMax;
  _35 = _33 % _34;
  daocRegA = (uint16) _35;
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetForceMatchA (base, channel, 1);
  # DEBUG BEGIN_STMT
  if (daocRegA == 0)
    goto <bb 10>; [INV]
  else
    goto <bb 11>; [INV]

  <bb 10> :
  iftmp.9 = counterMax;
  goto <bb 12>; [INV]

  <bb 11> :
  iftmp.9 = daocRegA;

  <bb 12> :
  Emios_Pwm_Ip_SetUCRegA (base, channel, iftmp.9);
  # DEBUG BEGIN_STMT
  if (daocRegA == 0)
    goto <bb 13>; [INV]
  else
    goto <bb 14>; [INV]

  <bb 13> :
  iftmp.10 = counterMax;
  goto <bb 15>; [INV]

  <bb 14> :
  iftmp.10 = daocRegA;

  <bb 15> :
  Emios_Pwm_Ip_SetUCRegB (base, channel, iftmp.10);
  # DEBUG BEGIN_STMT
  _36 = (int) instance;
  _37 = (int) channel;
  _38 = Emios_Pwm_Ip_aPolarity[_36][_37];
  _39 = _38 != 1;
  _40 = (<unnamed type>) _39;
  Emios_Pwm_Ip_SetEdgePolarity (base, channel, _40);
  # DEBUG BEGIN_STMT
  _41 = (int) instance;
  _42 = (int) channel;
  Emios_Pwm_Ip_aNotif[_41][_42] = 1;
  goto <bb 17>; [INV]

  <bb 16> :
  # DEBUG BEGIN_STMT
  _43 = (int) instance;
  _44 = (int) channel;
  Emios_Pwm_Ip_aDaocDuty[_43][_44] = newDutyCycle;
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetUCRegA (base, channel, 1);
  # DEBUG BEGIN_STMT
  _45 = newDutyCycle + 1;
  Emios_Pwm_Ip_SetUCRegB (base, channel, _45);
  # DEBUG BEGIN_STMT
  _46 = (int) instance;
  _47 = (int) channel;
  _48 = Emios_Pwm_Ip_aPolarity[_46][_47];
  _49 = _48 == 1;
  _50 = (<unnamed type>) _49;
  Emios_Pwm_Ip_SetEdgePolarity (base, channel, _50);
  # DEBUG BEGIN_STMT
  _51 = (int) instance;
  _52 = (int) channel;
  Emios_Pwm_Ip_aNotif[_51][_52] = 0;

  <bb 17> :
  # DEBUG BEGIN_STMT
  D.8732 = ret;
  return D.8732;

}


Emios_Pwm_Ip_InitDoubleCompareMode (uint8 instance, const struct Emios_Pwm_Ip_ChannelConfigType * userChCfg)
{
  uint16 counterMax;
  uint16 daocRegA;
  struct Emios_Pwm_Ip_HwAddrType * const base;
  uint16 iftmp.4;
  uint16 iftmp.3;
  uint8 iftmp.2;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) instance;
  base = Emios_Pwm_Ip_aBasePtr[_1];
  # DEBUG BEGIN_STMT
  _2 = (int) instance;
  _3 = userChCfg->channelId;
  _4 = (int) _3;
  _5 = userChCfg->periodCount;
  Emios_Pwm_Ip_aPeriod[_2][_4] = _5;
  # DEBUG BEGIN_STMT
  _6 = userChCfg->outputPolarity;
  if (_6 == 1)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  iftmp.2 = 1;
  goto <bb 5>; [INV]

  <bb 4> :
  iftmp.2 = 0;

  <bb 5> :
  _7 = (int) instance;
  _8 = userChCfg->channelId;
  _9 = (int) _8;
  Emios_Pwm_Ip_aPolarity[_7][_9] = iftmp.2;
  # DEBUG BEGIN_STMT
  daocRegA = 0;
  # DEBUG BEGIN_STMT
  _10 = userChCfg->channelId;
  _11 = Emios_Pwm_Ip_GetMasterBusChannel (instance, _10);
  counterMax = Emios_Pwm_Ip_GetUCRegA (base, _11);
  # DEBUG BEGIN_STMT
  _12 = userChCfg->channelId;
  Emios_Pwm_Ip_SetInterruptRequest (base, _12, 1);
  # DEBUG BEGIN_STMT
  _13 = userChCfg->channelId;
  _14 = userChCfg->timebase;
  Emios_Pwm_Ip_SetCounterBus (base, _13, _14);
  # DEBUG BEGIN_STMT
  _15 = userChCfg->periodCount;
  _16 = userChCfg->dutyCycle;
  if (_15 == _16)
    goto <bb 6>; [INV]
  else
    goto <bb 7>; [INV]

  <bb 6> :
  # DEBUG BEGIN_STMT
  _17 = userChCfg->channelId;
  _18 = userChCfg->outputPolarity;
  _19 = _18 != 1;
  _20 = (<unnamed type>) _19;
  Emios_Pwm_Ip_SetEdgePolarity (base, _17, _20);
  goto <bb 8>; [INV]

  <bb 7> :
  # DEBUG BEGIN_STMT
  _21 = userChCfg->channelId;
  _22 = userChCfg->outputPolarity;
  Emios_Pwm_Ip_SetEdgePolarity (base, _21, _22);

  <bb 8> :
  # DEBUG BEGIN_STMT
  _23 = userChCfg->channelId;
  _24 = userChCfg->mode;
  Emios_Pwm_Ip_SetPwmMode (base, _23, _24);
  # DEBUG BEGIN_STMT
  _25 = userChCfg->channelId;
  _26 = userChCfg->outputPolarity;
  Emios_Pwm_Ip_SetEdgePolarity (base, _25, _26);
  # DEBUG BEGIN_STMT
  _27 = userChCfg->dutyCycle;
  if (_27 == 0)
    goto <bb 9>; [INV]
  else
    goto <bb 10>; [INV]

  <bb 9> :
  # DEBUG BEGIN_STMT
  daocRegA = 1;
  # DEBUG BEGIN_STMT
  _28 = (int) instance;
  _29 = userChCfg->channelId;
  _30 = (int) _29;
  Emios_Pwm_Ip_aDaocDuty[_28][_30] = 0;
  # DEBUG BEGIN_STMT
  _31 = userChCfg->channelId;
  Emios_Pwm_Ip_SetForceMatchB (base, _31, 1);
  # DEBUG BEGIN_STMT
  _32 = userChCfg->channelId;
  Emios_Pwm_Ip_SetUCRegA (base, _32, daocRegA);
  # DEBUG BEGIN_STMT
  _33 = userChCfg->channelId;
  _34 = userChCfg->dutyCycle;
  _35 = _34 + 1;
  Emios_Pwm_Ip_SetUCRegB (base, _33, _35);
  # DEBUG BEGIN_STMT
  _36 = userChCfg->channelId;
  _37 = userChCfg->outputPolarity;
  Emios_Pwm_Ip_SetEdgePolarity (base, _36, _37);
  # DEBUG BEGIN_STMT
  _38 = (int) instance;
  _39 = userChCfg->channelId;
  _40 = (int) _39;
  Emios_Pwm_Ip_aNotif[_38][_40] = 1;
  goto <bb 19>; [INV]

  <bb 10> :
  # DEBUG BEGIN_STMT
  _41 = userChCfg->dutyCycle;
  _42 = userChCfg->periodCount;
  if (_41 == _42)
    goto <bb 11>; [INV]
  else
    goto <bb 18>; [INV]

  <bb 11> :
  # DEBUG BEGIN_STMT
  _43 = (int) instance;
  _44 = userChCfg->channelId;
  _45 = (int) _44;
  _46 = Emios_Pwm_Ip_aPeriod[_43][_45];
  _47 = (int) _46;
  _48 = userChCfg->channelId;
  _49 = Emios_Pwm_Ip_GetUCRegA (base, _48);
  _50 = (int) _49;
  _51 = _47 + _50;
  _52 = (int) counterMax;
  _53 = _51 % _52;
  daocRegA = (uint16) _53;
  # DEBUG BEGIN_STMT
  _54 = (int) instance;
  _55 = userChCfg->channelId;
  _56 = (int) _55;
  Emios_Pwm_Ip_aDaocDuty[_54][_56] = 0;
  # DEBUG BEGIN_STMT
  _57 = userChCfg->channelId;
  Emios_Pwm_Ip_SetForceMatchA (base, _57, 1);
  # DEBUG BEGIN_STMT
  _58 = userChCfg->channelId;
  if (daocRegA == 0)
    goto <bb 12>; [INV]
  else
    goto <bb 13>; [INV]

  <bb 12> :
  iftmp.3 = counterMax;
  goto <bb 14>; [INV]

  <bb 13> :
  iftmp.3 = daocRegA;

  <bb 14> :
  Emios_Pwm_Ip_SetUCRegA (base, _58, iftmp.3);
  # DEBUG BEGIN_STMT
  _59 = userChCfg->channelId;
  if (daocRegA == 0)
    goto <bb 15>; [INV]
  else
    goto <bb 16>; [INV]

  <bb 15> :
  iftmp.4 = counterMax;
  goto <bb 17>; [INV]

  <bb 16> :
  iftmp.4 = daocRegA;

  <bb 17> :
  Emios_Pwm_Ip_SetUCRegB (base, _59, iftmp.4);
  # DEBUG BEGIN_STMT
  _60 = userChCfg->channelId;
  _61 = userChCfg->outputPolarity;
  _62 = _61 != 1;
  _63 = (<unnamed type>) _62;
  Emios_Pwm_Ip_SetEdgePolarity (base, _60, _63);
  # DEBUG BEGIN_STMT
  _64 = (int) instance;
  _65 = userChCfg->channelId;
  _66 = (int) _65;
  Emios_Pwm_Ip_aNotif[_64][_66] = 1;
  goto <bb 19>; [INV]

  <bb 18> :
  # DEBUG BEGIN_STMT
  daocRegA = 1;
  # DEBUG BEGIN_STMT
  _67 = (int) instance;
  _68 = userChCfg->channelId;
  _69 = (int) _68;
  _70 = userChCfg->dutyCycle;
  Emios_Pwm_Ip_aDaocDuty[_67][_69] = _70;
  # DEBUG BEGIN_STMT
  _71 = userChCfg->channelId;
  Emios_Pwm_Ip_SetUCRegA (base, _71, daocRegA);
  # DEBUG BEGIN_STMT
  _72 = userChCfg->channelId;
  _73 = userChCfg->dutyCycle;
  _74 = _73 + 1;
  Emios_Pwm_Ip_SetUCRegB (base, _72, _74);
  # DEBUG BEGIN_STMT
  _75 = userChCfg->channelId;
  _76 = userChCfg->outputPolarity;
  Emios_Pwm_Ip_SetEdgePolarity (base, _75, _76);
  # DEBUG BEGIN_STMT
  _77 = (int) instance;
  _78 = userChCfg->channelId;
  _79 = (int) _78;
  Emios_Pwm_Ip_aNotif[_77][_79] = 0;

  <bb 19> :
  return;

}


Emios_Pwm_Ip_SetDutyCycleOpwmt (uint8 instance, uint8 channel, uint16 newDutyCycle)
{
  uint16 chPeriod;
  Emios_Pwm_Ip_StatusType ret;
  struct Emios_Pwm_Ip_HwAddrType * const base;
  Emios_Pwm_Ip_StatusType D.8743;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) instance;
  base = Emios_Pwm_Ip_aBasePtr[_1];
  # DEBUG BEGIN_STMT
  ret = 0;
  # DEBUG BEGIN_STMT
  _2 = Emios_Pwm_Ip_GetCounterBus (base, channel);
  chPeriod = Emios_Pwm_Ip_GetCounterBusPeriod (instance, channel, _2);
  # DEBUG BEGIN_STMT
  if (newDutyCycle > chPeriod)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  # DEBUG BEGIN_STMT
  ret = 1;
  goto <bb 9>; [INV]

  <bb 4> :
  # DEBUG BEGIN_STMT
  if (chPeriod == newDutyCycle)
    goto <bb 5>; [INV]
  else
    goto <bb 6>; [INV]

  <bb 5> :
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetInterruptRequest (base, channel, 0);
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_ClearFlagEvent (base, channel);
  # DEBUG BEGIN_STMT
  _3 = newDutyCycle + 1;
  Emios_Pwm_Ip_SetUCRegB (base, channel, _3);
  # DEBUG BEGIN_STMT
  _4 = (int) instance;
  _5 = (int) channel;
  Emios_Pwm_Ip_aNotif[_4][_5] = 1;
  goto <bb 9>; [INV]

  <bb 6> :
  # DEBUG BEGIN_STMT
  if (newDutyCycle == 0)
    goto <bb 7>; [INV]
  else
    goto <bb 8>; [INV]

  <bb 7> :
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetInterruptRequest (base, channel, 0);
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_ClearFlagEvent (base, channel);
  # DEBUG BEGIN_STMT
  _6 = (int) instance;
  _7 = (int) channel;
  _8 = Emios_Pwm_Ip_aRegA[_6][_7];
  Emios_Pwm_Ip_SetUCRegB (base, channel, _8);
  # DEBUG BEGIN_STMT
  _9 = (int) instance;
  _10 = (int) channel;
  Emios_Pwm_Ip_aNotif[_9][_10] = 1;
  goto <bb 9>; [INV]

  <bb 8> :
  # DEBUG BEGIN_STMT
  _11 = (int) instance;
  _12 = (int) channel;
  _13 = Emios_Pwm_Ip_aRegA[_11][_12];
  _14 = (int) _13;
  _15 = (int) newDutyCycle;
  _16 = _14 + _15;
  _17 = (int) chPeriod;
  _18 = _16 % _17;
  _19 = (short unsigned int) _18;
  Emios_Pwm_Ip_SetUCRegB (base, channel, _19);
  # DEBUG BEGIN_STMT
  _20 = (int) instance;
  _21 = (int) channel;
  Emios_Pwm_Ip_aNotif[_20][_21] = 0;
  # DEBUG BEGIN_STMT
  _22 = (int) instance;
  _23 = (int) channel;
  _24 = Emios_Pwm_Ip_aCheckEnableNotif[_22][_23];
  _25 = _24 != 0;
  Emios_Pwm_Ip_SetInterruptRequest (base, channel, _25);

  <bb 9> :
  # DEBUG BEGIN_STMT
  D.8743 = ret;
  return D.8743;

}


Emios_Pwm_Ip_InitTriggerMode (uint8 instance, const struct Emios_Pwm_Ip_ChannelConfigType * userChCfg)
{
  uint8 counterStart;
  uint16 trailingEdge;
  uint16 counterBusPeriod;
  struct Emios_Pwm_Ip_HwAddrType * const base;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) instance;
  base = Emios_Pwm_Ip_aBasePtr[_1];
  # DEBUG BEGIN_STMT
  _2 = userChCfg->channelId;
  _3 = userChCfg->timebase;
  counterBusPeriod = Emios_Pwm_Ip_GetCounterBusPeriod (instance, _2, _3);
  # DEBUG BEGIN_STMT
  trailingEdge = 0;
  # DEBUG BEGIN_STMT
  counterStart = 0;
  # DEBUG BEGIN_STMT
  _4 = userChCfg->channelId;
  _5 = userChCfg->timebase;
  _6 = Emios_Pwm_Ip_GetCounterBusMode (instance, _4, _5);
  if (_6 == 80)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  # DEBUG BEGIN_STMT
  counterStart = 1;
  goto <bb 5>; [INV]

  <bb 4> :
  # DEBUG BEGIN_STMT
  counterStart = 0;

  <bb 5> :
  # DEBUG BEGIN_STMT
  _7 = userChCfg->dutyCycle;
  if (counterBusPeriod == _7)
    goto <bb 6>; [INV]
  else
    goto <bb 7>; [INV]

  <bb 6> :
  # DEBUG BEGIN_STMT
  _8 = userChCfg->dutyCycle;
  trailingEdge = _8 + 1;
  # DEBUG BEGIN_STMT
  _9 = (int) instance;
  _10 = userChCfg->channelId;
  _11 = (int) _10;
  Emios_Pwm_Ip_aNotif[_9][_11] = 1;
  goto <bb 10>; [INV]

  <bb 7> :
  # DEBUG BEGIN_STMT
  _12 = userChCfg->dutyCycle;
  if (_12 == 0)
    goto <bb 8>; [INV]
  else
    goto <bb 9>; [INV]

  <bb 8> :
  # DEBUG BEGIN_STMT
  trailingEdge = userChCfg->phaseShift;
  # DEBUG BEGIN_STMT
  _13 = (int) instance;
  _14 = userChCfg->channelId;
  _15 = (int) _14;
  Emios_Pwm_Ip_aNotif[_13][_15] = 1;
  goto <bb 10>; [INV]

  <bb 9> :
  # DEBUG BEGIN_STMT
  _16 = userChCfg->phaseShift;
  _17 = (int) _16;
  _18 = userChCfg->dutyCycle;
  _19 = (int) _18;
  _20 = _17 + _19;
  _21 = (int) counterBusPeriod;
  _22 = _20 % _21;
  trailingEdge = (uint16) _22;
  # DEBUG BEGIN_STMT
  _23 = (int) instance;
  _24 = userChCfg->channelId;
  _25 = (int) _24;
  Emios_Pwm_Ip_aNotif[_23][_25] = 0;

  <bb 10> :
  # DEBUG BEGIN_STMT
  _26 = userChCfg->phaseShift;
  _27 = (short unsigned int) counterStart;
  _28 = (int) instance;
  _29 = userChCfg->channelId;
  _30 = (int) _29;
  _31 = _26 + _27;
  Emios_Pwm_Ip_aRegA[_28][_30] = _31;
  # DEBUG BEGIN_STMT
  _32 = userChCfg->channelId;
  _33 = userChCfg->timebase;
  Emios_Pwm_Ip_SetCounterBus (base, _32, _33);
  # DEBUG BEGIN_STMT
  _34 = userChCfg->channelId;
  _35 = userChCfg->phaseShift;
  _36 = (short unsigned int) counterStart;
  _37 = _35 + _36;
  Emios_Pwm_Ip_SetUCRegA (base, _34, _37);
  # DEBUG BEGIN_STMT
  _38 = userChCfg->channelId;
  _39 = (short unsigned int) counterStart;
  _40 = trailingEdge + _39;
  Emios_Pwm_Ip_SetUCRegB (base, _38, _40);
  # DEBUG BEGIN_STMT
  _41 = userChCfg->channelId;
  _42 = userChCfg->triggerPosition;
  _43 = (short unsigned int) counterStart;
  _44 = _42 + _43;
  Emios_Pwm_Ip_SetTrigger (base, _41, _44);
  # DEBUG BEGIN_STMT
  _45 = userChCfg->dutyCycle;
  if (counterBusPeriod == _45)
    goto <bb 11>; [INV]
  else
    goto <bb 12>; [INV]

  <bb 11> :
  # DEBUG BEGIN_STMT
  _46 = userChCfg->channelId;
  _47 = userChCfg->outputPolarity;
  _48 = _47 != 1;
  _49 = (<unnamed type>) _48;
  Emios_Pwm_Ip_SetEdgePolarity (base, _46, _49);
  goto <bb 13>; [INV]

  <bb 12> :
  # DEBUG BEGIN_STMT
  _50 = userChCfg->channelId;
  _51 = userChCfg->outputPolarity;
  Emios_Pwm_Ip_SetEdgePolarity (base, _50, _51);

  <bb 13> :
  # DEBUG BEGIN_STMT
  _52 = userChCfg->channelId;
  _53 = userChCfg->mode;
  Emios_Pwm_Ip_SetPwmMode (base, _52, _53);
  # DEBUG BEGIN_STMT
  _54 = userChCfg->channelId;
  _55 = userChCfg->outputPolarity;
  Emios_Pwm_Ip_SetEdgePolarity (base, _54, _55);
  return;

}


Emios_Pwm_Ip_SetDutyCycleOpwmb (uint8 instance, uint8 channel, uint16 newDutyCycle)
{
  uint16 chPeriod;
  Emios_Pwm_Ip_StatusType ret;
  struct Emios_Pwm_Ip_HwAddrType * const base;
  Emios_Pwm_Ip_StatusType D.8711;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) instance;
  base = Emios_Pwm_Ip_aBasePtr[_1];
  # DEBUG BEGIN_STMT
  ret = 0;
  # DEBUG BEGIN_STMT
  _2 = Emios_Pwm_Ip_GetCounterBus (base, channel);
  chPeriod = Emios_Pwm_Ip_GetCounterBusPeriod (instance, channel, _2);
  # DEBUG BEGIN_STMT
  _3 = (int) newDutyCycle;
  _4 = (int) instance;
  _5 = (int) channel;
  _6 = Emios_Pwm_Ip_aRegA[_4][_5];
  _7 = (int) _6;
  _8 = _3 + _7;
  _9 = (int) chPeriod;
  if (_8 > _9)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  # DEBUG BEGIN_STMT
  ret = 1;
  goto <bb 10>; [INV]

  <bb 4> :
  # DEBUG BEGIN_STMT
  if (newDutyCycle == 0)
    goto <bb 5>; [INV]
  else
    goto <bb 6>; [INV]

  <bb 5> :
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetInterruptRequest (base, channel, 0);
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_ClearFlagEvent (base, channel);
  # DEBUG BEGIN_STMT
  _10 = (int) instance;
  _11 = (int) channel;
  Emios_Pwm_Ip_aNotif[_10][_11] = 1;
  goto <bb 9>; [INV]

  <bb 6> :
  # DEBUG BEGIN_STMT
  if (newDutyCycle == chPeriod)
    goto <bb 7>; [INV]
  else
    goto <bb 8>; [INV]

  <bb 7> :
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetInterruptRequest (base, channel, 0);
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_ClearFlagEvent (base, channel);
  # DEBUG BEGIN_STMT
  _12 = (int) instance;
  _13 = (int) channel;
  Emios_Pwm_Ip_aNotif[_12][_13] = 1;
  goto <bb 9>; [INV]

  <bb 8> :
  # DEBUG BEGIN_STMT
  _14 = (int) instance;
  _15 = (int) channel;
  Emios_Pwm_Ip_aNotif[_14][_15] = 0;
  # DEBUG BEGIN_STMT
  _16 = (int) instance;
  _17 = (int) channel;
  _18 = Emios_Pwm_Ip_aCheckEnableNotif[_16][_17];
  _19 = _18 != 0;
  Emios_Pwm_Ip_SetInterruptRequest (base, channel, _19);

  <bb 9> :
  # DEBUG BEGIN_STMT
  _20 = (int) instance;
  _21 = (int) channel;
  _22 = Emios_Pwm_Ip_aRegA[_20][_21];
  _23 = newDutyCycle + _22;
  Emios_Pwm_Ip_SetUCRegB (base, channel, _23);

  <bb 10> :
  # DEBUG BEGIN_STMT
  D.8711 = ret;
  return D.8711;

}


Emios_Pwm_Ip_InitEdgePlacementMode (uint8 instance, const struct Emios_Pwm_Ip_ChannelConfigType * userChCfg)
{
  struct Emios_Pwm_Ip_HwAddrType * const base;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) instance;
  base = Emios_Pwm_Ip_aBasePtr[_1];
  # DEBUG BEGIN_STMT
  _2 = (int) instance;
  _3 = userChCfg->channelId;
  _4 = (int) _3;
  _5 = userChCfg->phaseShift;
  Emios_Pwm_Ip_aRegA[_2][_4] = _5;
  # DEBUG BEGIN_STMT
  _6 = userChCfg->channelId;
  _7 = userChCfg->timebase;
  Emios_Pwm_Ip_SetCounterBus (base, _6, _7);
  # DEBUG BEGIN_STMT
  _8 = userChCfg->channelId;
  _9 = userChCfg->phaseShift;
  Emios_Pwm_Ip_SetUCRegA (base, _8, _9);
  # DEBUG BEGIN_STMT
  _10 = userChCfg->channelId;
  _11 = userChCfg->phaseShift;
  _12 = userChCfg->dutyCycle;
  _13 = _11 + _12;
  Emios_Pwm_Ip_SetUCRegB (base, _10, _13);
  # DEBUG BEGIN_STMT
  _14 = userChCfg->channelId;
  _15 = userChCfg->mode;
  Emios_Pwm_Ip_SetPwmMode (base, _14, _15);
  # DEBUG BEGIN_STMT
  _16 = userChCfg->channelId;
  _17 = userChCfg->outputPolarity;
  Emios_Pwm_Ip_SetEdgePolarity (base, _16, _17);
  # DEBUG BEGIN_STMT
  _18 = userChCfg->periodCount;
  _19 = userChCfg->dutyCycle;
  if (_18 == _19)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  # DEBUG BEGIN_STMT
  _20 = (int) instance;
  _21 = userChCfg->channelId;
  _22 = (int) _21;
  Emios_Pwm_Ip_aNotif[_20][_22] = 1;
  goto <bb 7>; [INV]

  <bb 4> :
  # DEBUG BEGIN_STMT
  _23 = userChCfg->dutyCycle;
  if (_23 <= 1)
    goto <bb 5>; [INV]
  else
    goto <bb 6>; [INV]

  <bb 5> :
  # DEBUG BEGIN_STMT
  _24 = (int) instance;
  _25 = userChCfg->channelId;
  _26 = (int) _25;
  Emios_Pwm_Ip_aNotif[_24][_26] = 1;
  goto <bb 7>; [INV]

  <bb 6> :
  # DEBUG BEGIN_STMT
  _27 = (int) instance;
  _28 = userChCfg->channelId;
  _29 = (int) _28;
  Emios_Pwm_Ip_aNotif[_27][_29] = 0;

  <bb 7> :
  return;

}


Emios_Pwm_Ip_SetDutyCycleOpwmcb (uint8 instance, uint8 channel, uint16 newDutyCycle)
{
  uint16 chPeriod;
  Emios_Pwm_Ip_PwmModeType chMode;
  Emios_Pwm_Ip_StatusType ret;
  struct Emios_Pwm_Ip_HwAddrType * const base;
  Emios_Pwm_Ip_StatusType D.8700;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) instance;
  base = Emios_Pwm_Ip_aBasePtr[_1];
  # DEBUG BEGIN_STMT
  ret = 0;
  # DEBUG BEGIN_STMT
  chMode = Emios_Pwm_Ip_GetPwmMode (base, channel);
  # DEBUG BEGIN_STMT
  _2 = Emios_Pwm_Ip_GetCounterBus (base, channel);
  chPeriod = Emios_Pwm_Ip_GetCounterBusPeriod (instance, channel, _2);
  # DEBUG BEGIN_STMT
  _3 = (unsigned int) newDutyCycle;
  _4 = (unsigned int) chPeriod;
  _5 = _4 + 2147483647;
  _6 = _5 * 2;
  if (_3 > _6)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  # DEBUG BEGIN_STMT
  ret = 1;
  goto <bb 13>; [INV]

  <bb 4> :
  # DEBUG BEGIN_STMT
  if (newDutyCycle == 0)
    goto <bb 5>; [INV]
  else
    goto <bb 10>; [INV]

  <bb 5> :
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetInterruptRequest (base, channel, 0);
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_ClearFlagEvent (base, channel);
  # DEBUG BEGIN_STMT
  _7 = chPeriod + 1;
  Emios_Pwm_Ip_SetUCRegA (base, channel, _7);
  # DEBUG BEGIN_STMT
  _8 = (int) instance;
  _9 = (int) channel;
  Emios_Pwm_Ip_aNotif[_8][_9] = 1;
  # DEBUG BEGIN_STMT
  _10 = Emios_Pwm_Ip_GetUCRegA (base, channel);
  if (_10 == 1)
    goto <bb 6>; [INV]
  else
    goto <bb 13>; [INV]

  <bb 6> :
  # DEBUG BEGIN_STMT
  if (chMode == 92)
    goto <bb 8>; [INV]
  else
    goto <bb 7>; [INV]

  <bb 7> :
  if (chMode == 94)
    goto <bb 8>; [INV]
  else
    goto <bb 9>; [INV]

  <bb 8> :
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetForceMatchB (base, channel, 1);
  goto <bb 13>; [INV]

  <bb 9> :
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetForceMatchA (base, channel, 1);
  goto <bb 13>; [INV]

  <bb 10> :
  # DEBUG BEGIN_STMT
  _11 = (unsigned int) newDutyCycle;
  _12 = (unsigned int) chPeriod;
  _13 = _12 + 2147483647;
  _14 = _13 * 2;
  if (_11 == _14)
    goto <bb 11>; [INV]
  else
    goto <bb 12>; [INV]

  <bb 11> :
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetInterruptRequest (base, channel, 0);
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_ClearFlagEvent (base, channel);
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetUCRegA (base, channel, 1);
  # DEBUG BEGIN_STMT
  _15 = (int) instance;
  _16 = (int) channel;
  Emios_Pwm_Ip_aNotif[_15][_16] = 1;
  goto <bb 13>; [INV]

  <bb 12> :
  # DEBUG BEGIN_STMT
  _17 = newDutyCycle >> 1;
  _18 = chPeriod - _17;
  Emios_Pwm_Ip_SetUCRegA (base, channel, _18);
  # DEBUG BEGIN_STMT
  _19 = (int) instance;
  _20 = (int) channel;
  Emios_Pwm_Ip_aNotif[_19][_20] = 0;
  # DEBUG BEGIN_STMT
  _21 = (int) instance;
  _22 = (int) channel;
  _23 = Emios_Pwm_Ip_aCheckEnableNotif[_21][_22];
  _24 = _23 != 0;
  Emios_Pwm_Ip_SetInterruptRequest (base, channel, _24);

  <bb 13> :
  # DEBUG BEGIN_STMT
  D.8700 = ret;
  return D.8700;

}


Emios_Pwm_Ip_InitDeadTimeMode (uint8 instance, const struct Emios_Pwm_Ip_ChannelConfigType * userChCfg)
{
  uint16 dutyCycle;
  struct Emios_Pwm_Ip_HwAddrType * const base;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) instance;
  base = Emios_Pwm_Ip_aBasePtr[_1];
  # DEBUG BEGIN_STMT
  dutyCycle = 0;
  # DEBUG BEGIN_STMT
  _2 = userChCfg->periodCount;
  _3 = userChCfg->dutyCycle;
  if (_2 == _3)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  # DEBUG BEGIN_STMT
  dutyCycle = 1;
  # DEBUG BEGIN_STMT
  _4 = (int) instance;
  _5 = userChCfg->channelId;
  _6 = (int) _5;
  Emios_Pwm_Ip_aNotif[_4][_6] = 1;
  goto <bb 7>; [INV]

  <bb 4> :
  # DEBUG BEGIN_STMT
  _7 = userChCfg->dutyCycle;
  if (_7 <= 1)
    goto <bb 5>; [INV]
  else
    goto <bb 6>; [INV]

  <bb 5> :
  # DEBUG BEGIN_STMT
  _8 = userChCfg->channelId;
  _9 = userChCfg->timebase;
  _10 = Emios_Pwm_Ip_GetCounterBusPeriod (instance, _8, _9);
  dutyCycle = _10 + 1;
  # DEBUG BEGIN_STMT
  _11 = (int) instance;
  _12 = userChCfg->channelId;
  _13 = (int) _12;
  Emios_Pwm_Ip_aNotif[_11][_13] = 1;
  goto <bb 7>; [INV]

  <bb 6> :
  # DEBUG BEGIN_STMT
  _14 = userChCfg->dutyCycle;
  dutyCycle = _14 >> 1;
  # DEBUG BEGIN_STMT
  _15 = userChCfg->channelId;
  _16 = userChCfg->timebase;
  _17 = Emios_Pwm_Ip_GetCounterBusPeriod (instance, _15, _16);
  dutyCycle = _17 - dutyCycle;
  # DEBUG BEGIN_STMT
  _18 = (int) instance;
  _19 = userChCfg->channelId;
  _20 = (int) _19;
  Emios_Pwm_Ip_aNotif[_18][_20] = 0;

  <bb 7> :
  # DEBUG BEGIN_STMT
  _21 = userChCfg->channelId;
  _22 = userChCfg->timebase;
  Emios_Pwm_Ip_SetCounterBus (base, _21, _22);
  # DEBUG BEGIN_STMT
  _23 = userChCfg->channelId;
  Emios_Pwm_Ip_SetUCRegA (base, _23, dutyCycle);
  # DEBUG BEGIN_STMT
  _24 = userChCfg->channelId;
  _25 = userChCfg->deadTime;
  Emios_Pwm_Ip_SetUCRegB (base, _24, _25);
  # DEBUG BEGIN_STMT
  _26 = userChCfg->periodCount;
  _27 = userChCfg->dutyCycle;
  if (_26 == _27)
    goto <bb 8>; [INV]
  else
    goto <bb 9>; [INV]

  <bb 8> :
  # DEBUG BEGIN_STMT
  _28 = userChCfg->channelId;
  _29 = userChCfg->outputPolarity;
  _30 = _29 != 1;
  _31 = (<unnamed type>) _30;
  Emios_Pwm_Ip_SetEdgePolarity (base, _28, _31);
  goto <bb 10>; [INV]

  <bb 9> :
  # DEBUG BEGIN_STMT
  _32 = userChCfg->channelId;
  _33 = userChCfg->outputPolarity;
  Emios_Pwm_Ip_SetEdgePolarity (base, _32, _33);

  <bb 10> :
  # DEBUG BEGIN_STMT
  _34 = userChCfg->channelId;
  _35 = userChCfg->mode;
  Emios_Pwm_Ip_SetPwmMode (base, _34, _35);
  # DEBUG BEGIN_STMT
  _36 = userChCfg->channelId;
  _37 = userChCfg->outputPolarity;
  Emios_Pwm_Ip_SetEdgePolarity (base, _36, _37);
  return;

}


Emios_Pwm_Ip_SetDutyCycleOpwfmb (uint8 instance, uint8 channel, uint16 newDutyCycle)
{
  Emios_Pwm_Ip_StatusType ret;
  struct Emios_Pwm_Ip_HwAddrType * const base;
  Emios_Pwm_Ip_StatusType D.8683;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) instance;
  base = Emios_Pwm_Ip_aBasePtr[_1];
  # DEBUG BEGIN_STMT
  ret = 0;
  # DEBUG BEGIN_STMT
  _2 = (int) instance;
  _3 = (int) channel;
  _4 = Emios_Pwm_Ip_aPeriod[_2][_3];
  if (newDutyCycle > _4)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _5 = (int) instance;
  _6 = (int) channel;
  _7 = Emios_Pwm_Ip_aPeriod[_5][_6];
  if (_7 != 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  # DEBUG BEGIN_STMT
  ret = 1;
  goto <bb 13>; [INV]

  <bb 5> :
  # DEBUG BEGIN_STMT
  _8 = (int) instance;
  _9 = (int) channel;
  _10 = Emios_Pwm_Ip_aPeriod[_8][_9];
  if (_10 == 0)
    goto <bb 6>; [INV]
  else
    goto <bb 7>; [INV]

  <bb 6> :
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetInterruptRequest (base, channel, 0);
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_ClearFlagEvent (base, channel);
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetUCRegA (base, channel, 0);
  # DEBUG BEGIN_STMT
  _11 = (int) instance;
  _12 = (int) channel;
  Emios_Pwm_Ip_aNotif[_11][_12] = 1;
  goto <bb 13>; [INV]

  <bb 7> :
  # DEBUG BEGIN_STMT
  if (newDutyCycle == 0)
    goto <bb 8>; [INV]
  else
    goto <bb 9>; [INV]

  <bb 8> :
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetInterruptRequest (base, channel, 0);
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_ClearFlagEvent (base, channel);
  # DEBUG BEGIN_STMT
  _13 = (int) instance;
  _14 = (int) channel;
  Emios_Pwm_Ip_aNotif[_13][_14] = 1;
  goto <bb 12>; [INV]

  <bb 9> :
  # DEBUG BEGIN_STMT
  _15 = (int) instance;
  _16 = (int) channel;
  _17 = Emios_Pwm_Ip_aPeriod[_15][_16];
  if (newDutyCycle == _17)
    goto <bb 10>; [INV]
  else
    goto <bb 11>; [INV]

  <bb 10> :
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetInterruptRequest (base, channel, 0);
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_ClearFlagEvent (base, channel);
  # DEBUG BEGIN_STMT
  _18 = (int) instance;
  _19 = (int) channel;
  Emios_Pwm_Ip_aNotif[_18][_19] = 1;
  goto <bb 12>; [INV]

  <bb 11> :
  # DEBUG BEGIN_STMT
  _20 = (int) instance;
  _21 = (int) channel;
  Emios_Pwm_Ip_aNotif[_20][_21] = 0;
  # DEBUG BEGIN_STMT
  _22 = (int) instance;
  _23 = (int) channel;
  _24 = Emios_Pwm_Ip_aCheckEnableNotif[_22][_23];
  _25 = _24 != 0;
  Emios_Pwm_Ip_SetInterruptRequest (base, channel, _25);

  <bb 12> :
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetUCRegA (base, channel, newDutyCycle);

  <bb 13> :
  # DEBUG BEGIN_STMT
  D.8683 = ret;
  return D.8683;

}


Emios_Pwm_Ip_InitPeriodDutyCycleMode (uint8 instance, const struct Emios_Pwm_Ip_ChannelConfigType * userChCfg)
{
  struct Emios_Pwm_Ip_HwAddrType * const base;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) instance;
  base = Emios_Pwm_Ip_aBasePtr[_1];
  # DEBUG BEGIN_STMT
  _2 = userChCfg->channelId;
  _3 = userChCfg->timebase;
  Emios_Pwm_Ip_SetCounterBus (base, _2, _3);
  # DEBUG BEGIN_STMT
  _4 = userChCfg->channelId;
  _5 = userChCfg->dutyCycle;
  Emios_Pwm_Ip_SetUCRegA (base, _4, _5);
  # DEBUG BEGIN_STMT
  _6 = userChCfg->channelId;
  _7 = userChCfg->periodCount;
  Emios_Pwm_Ip_SetUCRegB (base, _6, _7);
  # DEBUG BEGIN_STMT
  _8 = userChCfg->channelId;
  _9 = userChCfg->mode;
  Emios_Pwm_Ip_SetPwmMode (base, _8, _9);
  # DEBUG BEGIN_STMT
  _10 = userChCfg->channelId;
  _11 = userChCfg->outputPolarity;
  _12 = _11 != 1;
  _13 = (<unnamed type>) _12;
  Emios_Pwm_Ip_SetEdgePolarity (base, _10, _13);
  # DEBUG BEGIN_STMT
  _14 = (int) instance;
  _15 = userChCfg->channelId;
  _16 = (int) _15;
  _17 = userChCfg->periodCount;
  Emios_Pwm_Ip_aPeriod[_14][_16] = _17;
  # DEBUG BEGIN_STMT
  _18 = userChCfg->periodCount;
  _19 = userChCfg->dutyCycle;
  if (_18 == _19)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  # DEBUG BEGIN_STMT
  _20 = (int) instance;
  _21 = userChCfg->channelId;
  _22 = (int) _21;
  Emios_Pwm_Ip_aNotif[_20][_22] = 1;
  goto <bb 7>; [INV]

  <bb 4> :
  # DEBUG BEGIN_STMT
  _23 = userChCfg->dutyCycle;
  if (_23 == 0)
    goto <bb 5>; [INV]
  else
    goto <bb 6>; [INV]

  <bb 5> :
  # DEBUG BEGIN_STMT
  _24 = (int) instance;
  _25 = userChCfg->channelId;
  _26 = (int) _25;
  Emios_Pwm_Ip_aNotif[_24][_26] = 1;
  goto <bb 7>; [INV]

  <bb 6> :
  # DEBUG BEGIN_STMT
  _27 = (int) instance;
  _28 = userChCfg->channelId;
  _29 = (int) _28;
  Emios_Pwm_Ip_aNotif[_27][_29] = 0;

  <bb 7> :
  return;

}


Emios_Pwm_Ip_GetCounterBusMode (uint8 instance, uint8 channel, Emios_Pwm_Ip_CounterBusSourceType counterBus)
{
  Emios_Pwm_Ip_MasterBusModeType counterBusMode;
  const struct Emios_Pwm_Ip_HwAddrType * const base;
  Emios_Pwm_Ip_MasterBusModeType D.8581;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) instance;
  base = Emios_Pwm_Ip_aBasePtr[_1];
  # DEBUG BEGIN_STMT
  counterBusMode = 16;
  # DEBUG BEGIN_STMT
  _2 = (int) counterBus;
  switch (_2) <default: <L3> [INV], case 0: <L0> [INV], case 1: <L1> [INV], case 2: <L2> [INV]>

  <bb 3> :
<L0>:
  # DEBUG BEGIN_STMT
  counterBusMode = Emios_Pwm_Ip_GetChannelPwmMode (base, 23);
  # DEBUG BEGIN_STMT
  goto <bb 7>; [INV]

  <bb 4> :
<L1>:
  # DEBUG BEGIN_STMT
  _3 = channel & 248;
  counterBusMode = Emios_Pwm_Ip_GetChannelPwmMode (base, _3);
  # DEBUG BEGIN_STMT
  goto <bb 7>; [INV]

  <bb 5> :
<L2>:
  # DEBUG BEGIN_STMT
  counterBusMode = Emios_Pwm_Ip_GetChannelPwmMode (base, 22);
  # DEBUG BEGIN_STMT
  goto <bb 7>; [INV]

  <bb 6> :
<L3>:
  # DEBUG BEGIN_STMT
  counterBusMode = 0;
  # DEBUG BEGIN_STMT

  <bb 7> :
  # DEBUG BEGIN_STMT
  D.8581 = counterBusMode;
  return D.8581;

}


Emios_Pwm_Ip_GetCounterBusPeriod (uint8 instance, uint8 channel, Emios_Pwm_Ip_CounterBusSourceType counterBus)
{
  uint16 chPeriod;
  const struct Emios_Pwm_Ip_HwAddrType * const base;
  uint16 D.8559;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) instance;
  base = Emios_Pwm_Ip_aBasePtr[_1];
  # DEBUG BEGIN_STMT
  chPeriod = 0;
  # DEBUG BEGIN_STMT
  if (counterBus == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  # DEBUG BEGIN_STMT
  chPeriod = Emios_Pwm_Ip_GetUCRegA (base, 23);
  goto <bb 8>; [INV]

  <bb 4> :
  # DEBUG BEGIN_STMT
  if (counterBus == 2)
    goto <bb 5>; [INV]
  else
    goto <bb 6>; [INV]

  <bb 5> :
  # DEBUG BEGIN_STMT
  chPeriod = Emios_Pwm_Ip_GetUCRegA (base, 22);
  goto <bb 8>; [INV]

  <bb 6> :
  # DEBUG BEGIN_STMT
  if (counterBus == 1)
    goto <bb 7>; [INV]
  else
    goto <bb 8>; [INV]

  <bb 7> :
  # DEBUG BEGIN_STMT
  _2 = channel & 248;
  chPeriod = Emios_Pwm_Ip_GetUCRegA (base, _2);

  <bb 8> :
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  D.8559 = chPeriod;
  return D.8559;

}


Emios_Pwm_Ip_SetPrescalerSource (struct Emios_Pwm_Ip_HwAddrType * const base, uint8 channel, Emios_Pwm_Ip_InternalPsSrcType value)
{
  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) channel;
  _2 = base->CH.UC[_1].C2;
  _3 = _2 & 4294950911;
  _4 = (long unsigned int) value;
  _5 = _4 << 14;
  _6 = _5 & 16384;
  _7 = (int) channel;
  _8 = _3 | _6;
  base->CH.UC[_7].C2 = _8;
  return;

}


Emios_Pwm_Ip_SetExtendedPrescaler (struct Emios_Pwm_Ip_HwAddrType * const base, uint8 channel, Emios_Pwm_Ip_InternalClkPsType value)
{
  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) channel;
  _2 = base->CH.UC[_1].C2;
  _3 = _2 & 4293984255;
  _4 = (long unsigned int) value;
  _5 = _4 << 16;
  _6 = _5 & 983040;
  _7 = (int) channel;
  _8 = _3 | _6;
  base->CH.UC[_7].C2 = _8;
  return;

}


Emios_Pwm_Ip_GetTrigger (const struct Emios_Pwm_Ip_HwAddrType * const base, uint8 channel)
{
  uint16 D.8771;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) channel;
  _2 = base->CH.UC[_1].ALTA;
  D.8771 = (uint16) _2;
  return D.8771;

}


Emios_Pwm_Ip_SetTrigger (struct Emios_Pwm_Ip_HwAddrType * const base, uint8 channel, uint16 value)
{
  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) channel;
  _2 = base->CH.UC[_1].ALTA;
  _3 = _2 & 4294901760;
  _4 = (long unsigned int) value;
  _5 = (int) channel;
  _6 = _3 | _4;
  base->CH.UC[_5].ALTA = _6;
  return;

}


Emios_Pwm_Ip_ClearFlagEvent (struct Emios_Pwm_Ip_HwAddrType * const base, uint8 channel)
{
  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) channel;
  _2 = base->CH.UC[_1].S;
  _3 = (int) channel;
  _4 = _2 | 1;
  base->CH.UC[_3].S = _4;
  return;

}


Emios_Pwm_Ip_GetOutputPinState (const struct Emios_Pwm_Ip_HwAddrType * const base, uint8 channel)
{
  boolean D.8807;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) channel;
  _2 = base->CH.UC[_1].S;
  _3 = _2 & 2;
  D.8807 = _3 != 0;
  return D.8807;

}


Emios_Pwm_Ip_GetChannelPwmMode (const struct Emios_Pwm_Ip_HwAddrType * const base, uint8 channel)
{
  Emios_Pwm_Ip_MasterBusModeType masterBusMode;
  Emios_Pwm_Ip_MasterBusModeType D.8583;

  <bb 2> :
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  _1 = (int) channel;
  _2 = base->CH.UC[_1].C;
  _3 = _2 & 127;
  switch (_3) <default: <L5> [INV], case 16: <L0> [INV], case 18: <L1> [INV], case 20: <L2> [INV], case 80: <L3> [INV], case 84: <L4> [INV]>

  <bb 3> :
<L0>:
  # DEBUG BEGIN_STMT
  masterBusMode = 16;
  # DEBUG BEGIN_STMT
  goto <bb 9>; [INV]

  <bb 4> :
<L1>:
  # DEBUG BEGIN_STMT
  masterBusMode = 18;
  # DEBUG BEGIN_STMT
  goto <bb 9>; [INV]

  <bb 5> :
<L2>:
  # DEBUG BEGIN_STMT
  masterBusMode = 20;
  # DEBUG BEGIN_STMT
  goto <bb 9>; [INV]

  <bb 6> :
<L3>:
  # DEBUG BEGIN_STMT
  masterBusMode = 80;
  # DEBUG BEGIN_STMT
  goto <bb 9>; [INV]

  <bb 7> :
<L4>:
  # DEBUG BEGIN_STMT
  masterBusMode = 84;
  # DEBUG BEGIN_STMT
  goto <bb 9>; [INV]

  <bb 8> :
<L5>:
  # DEBUG BEGIN_STMT
  masterBusMode = 0;
  # DEBUG BEGIN_STMT

  <bb 9> :
  # DEBUG BEGIN_STMT
  D.8583 = masterBusMode;
  return D.8583;

}


Emios_Pwm_Ip_SetPwmModePol (struct Emios_Pwm_Ip_HwAddrType * const base, uint8 channel, Emios_Pwm_Ip_PwmModeType mode, Emios_Pwm_Ip_PolarityType pol)
{
  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) channel;
  _2 = base->CH.UC[_1].C;
  _3 = _2 & 4294967040;
  _4 = (long unsigned int) mode;
  _5 = _4 & 127;
  _6 = _3 | _5;
  _7 = (long unsigned int) pol;
  _8 = _7 << 7;
  _9 = _8 & 255;
  _10 = (int) channel;
  _11 = _6 | _9;
  base->CH.UC[_10].C = _11;
  return;

}


Emios_Pwm_Ip_GetPwmMode (const struct Emios_Pwm_Ip_HwAddrType * const base, uint8 channel)
{
  Emios_Pwm_Ip_PwmModeType mode;
  Emios_Pwm_Ip_PwmModeType D.8624;

  <bb 2> :
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  _1 = (int) channel;
  _2 = base->CH.UC[_1].C;
  _3 = _2 & 127;
  switch (_3) <default: <L12> [INV], case 1: <L0> [INV], case 6: <L1> [INV], case 7: <L2> [INV], case 38: <L3> [INV], case 88: <L4> [INV], case 90: <L5> [INV], case 92: <L6> [INV], case 93: <L8> [INV], case 94: <L7> [INV], case 95: <L9> [INV], case 96: <L10> [INV], case 98: <L11> [INV]>

  <bb 3> :
<L0>:
  # DEBUG BEGIN_STMT
  mode = 1;
  # DEBUG BEGIN_STMT
  goto <bb 16>; [INV]

  <bb 4> :
<L1>:
  # DEBUG BEGIN_STMT
  mode = 6;
  # DEBUG BEGIN_STMT
  goto <bb 16>; [INV]

  <bb 5> :
<L2>:
  # DEBUG BEGIN_STMT
  mode = 7;
  # DEBUG BEGIN_STMT
  goto <bb 16>; [INV]

  <bb 6> :
<L3>:
  # DEBUG BEGIN_STMT
  mode = 38;
  # DEBUG BEGIN_STMT
  goto <bb 16>; [INV]

  <bb 7> :
<L4>:
  # DEBUG BEGIN_STMT
  mode = 88;
  # DEBUG BEGIN_STMT
  goto <bb 16>; [INV]

  <bb 8> :
<L5>:
  # DEBUG BEGIN_STMT
  mode = 90;
  # DEBUG BEGIN_STMT
  goto <bb 16>; [INV]

  <bb 9> :
<L6>:
  # DEBUG BEGIN_STMT
  mode = 92;
  # DEBUG BEGIN_STMT
  goto <bb 16>; [INV]

  <bb 10> :
<L7>:
  # DEBUG BEGIN_STMT
  mode = 94;
  # DEBUG BEGIN_STMT
  goto <bb 16>; [INV]

  <bb 11> :
<L8>:
  # DEBUG BEGIN_STMT
  mode = 93;
  # DEBUG BEGIN_STMT
  goto <bb 16>; [INV]

  <bb 12> :
<L9>:
  # DEBUG BEGIN_STMT
  mode = 95;
  # DEBUG BEGIN_STMT
  goto <bb 16>; [INV]

  <bb 13> :
<L10>:
  # DEBUG BEGIN_STMT
  mode = 96;
  # DEBUG BEGIN_STMT
  goto <bb 16>; [INV]

  <bb 14> :
<L11>:
  # DEBUG BEGIN_STMT
  mode = 98;
  # DEBUG BEGIN_STMT
  goto <bb 16>; [INV]

  <bb 15> :
<L12>:
  # DEBUG BEGIN_STMT
  mode = 255;
  # DEBUG BEGIN_STMT

  <bb 16> :
  # DEBUG BEGIN_STMT
  D.8624 = mode;
  return D.8624;

}


Emios_Pwm_Ip_SetPwmMode (struct Emios_Pwm_Ip_HwAddrType * const base, uint8 channel, Emios_Pwm_Ip_PwmModeType mode)
{
  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) channel;
  _2 = base->CH.UC[_1].C;
  _3 = _2 & 4294967168;
  _4 = (long unsigned int) mode;
  _5 = _4 & 127;
  _6 = (int) channel;
  _7 = _3 | _5;
  base->CH.UC[_6].C = _7;
  return;

}


Emios_Pwm_Ip_SetEdgePolarity (struct Emios_Pwm_Ip_HwAddrType * const base, uint8 channel, Emios_Pwm_Ip_PolarityType value)
{
  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) channel;
  _2 = base->CH.UC[_1].C;
  _3 = _2 & 4294967167;
  _4 = (long unsigned int) value;
  _5 = _4 << 7;
  _6 = _5 & 255;
  _7 = (int) channel;
  _8 = _3 | _6;
  base->CH.UC[_7].C = _8;
  return;

}


Emios_Pwm_Ip_GetCounterBus (const struct Emios_Pwm_Ip_HwAddrType * const base, uint8 channel)
{
  Emios_Pwm_Ip_CounterBusSourceType counterBus;
  Emios_Pwm_Ip_CounterBusSourceType D.8637;

  <bb 2> :
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  _1 = (int) channel;
  _2 = base->CH.UC[_1].C;
  _3 = _2 >> 9;
  _4 = _3 & 3;
  switch (_4) <default: <L3> [INV], case 0: <L0> [INV], case 1: <L1> [INV], case 2: <L2> [INV]>

  <bb 3> :
<L0>:
  # DEBUG BEGIN_STMT
  counterBus = 0;
  # DEBUG BEGIN_STMT
  goto <bb 7>; [INV]

  <bb 4> :
<L1>:
  # DEBUG BEGIN_STMT
  counterBus = 1;
  # DEBUG BEGIN_STMT
  goto <bb 7>; [INV]

  <bb 5> :
<L2>:
  # DEBUG BEGIN_STMT
  counterBus = 2;
  # DEBUG BEGIN_STMT
  goto <bb 7>; [INV]

  <bb 6> :
<L3>:
  # DEBUG BEGIN_STMT
  counterBus = 3;
  # DEBUG BEGIN_STMT

  <bb 7> :
  # DEBUG BEGIN_STMT
  D.8637 = counterBus;
  return D.8637;

}


Emios_Pwm_Ip_SetCounterBus (struct Emios_Pwm_Ip_HwAddrType * const base, uint8 channel, Emios_Pwm_Ip_CounterBusSourceType value)
{
  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) channel;
  _2 = base->CH.UC[_1].C;
  _3 = _2 & 4294965759;
  _4 = (long unsigned int) value;
  _5 = _4 << 9;
  _6 = _5 & 1536;
  _7 = (int) channel;
  _8 = _3 | _6;
  base->CH.UC[_7].C = _8;
  return;

}


Emios_Pwm_Ip_SetForceMatchB (struct Emios_Pwm_Ip_HwAddrType * const base, uint8 channel, boolean value)
{
  uint8 value_convert;
  uint8 iftmp.6;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = ~value;
  if (_1 != 0)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  iftmp.6 = 0;
  goto <bb 5>; [INV]

  <bb 4> :
  iftmp.6 = 1;

  <bb 5> :
  value_convert = iftmp.6;
  # DEBUG BEGIN_STMT
  _2 = (int) channel;
  _3 = base->CH.UC[_2].C;
  _4 = _3 & 4294963199;
  _5 = (long unsigned int) value_convert;
  _6 = _5 << 12;
  _7 = _6 & 4096;
  _8 = (int) channel;
  _9 = _4 | _7;
  base->CH.UC[_8].C = _9;
  return;

}


Emios_Pwm_Ip_SetForceMatchA (struct Emios_Pwm_Ip_HwAddrType * const base, uint8 channel, boolean value)
{
  uint8 value_convert;
  uint8 iftmp.7;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = ~value;
  if (_1 != 0)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  iftmp.7 = 0;
  goto <bb 5>; [INV]

  <bb 4> :
  iftmp.7 = 1;

  <bb 5> :
  value_convert = iftmp.7;
  # DEBUG BEGIN_STMT
  _2 = (int) channel;
  _3 = base->CH.UC[_2].C;
  _4 = _3 & 4294959103;
  _5 = (long unsigned int) value_convert;
  _6 = _5 << 13;
  _7 = _6 & 8192;
  _8 = (int) channel;
  _9 = _4 | _7;
  base->CH.UC[_8].C = _9;
  return;

}


Emios_Pwm_Ip_GetInterruptRequest (const struct Emios_Pwm_Ip_HwAddrType * const base, uint8 channel)
{
  boolean D.8794;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) channel;
  _2 = base->CH.UC[_1].C;
  _3 = _2 & 131072;
  D.8794 = _3 != 0;
  return D.8794;

}


Emios_Pwm_Ip_SetInterruptRequest (struct Emios_Pwm_Ip_HwAddrType * const base, uint8 channel, boolean value)
{
  uint8 value_convert;
  uint8 iftmp.5;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = ~value;
  if (_1 != 0)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  iftmp.5 = 0;
  goto <bb 5>; [INV]

  <bb 4> :
  iftmp.5 = 1;

  <bb 5> :
  value_convert = iftmp.5;
  # DEBUG BEGIN_STMT
  _2 = (int) channel;
  _3 = base->CH.UC[_2].C;
  _4 = _3 & 4294836223;
  _5 = (long unsigned int) value_convert;
  _6 = _5 << 17;
  _7 = _6 & 131072;
  _8 = (int) channel;
  _9 = _4 | _7;
  base->CH.UC[_8].C = _9;
  return;

}


Emios_Pwm_Ip_GetDMARequest (const struct Emios_Pwm_Ip_HwAddrType * const base, uint8 channel)
{
  boolean D.8796;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) channel;
  _2 = base->CH.UC[_1].C;
  _3 = _2 & 16777216;
  D.8796 = _3 != 0;
  return D.8796;

}


Emios_Pwm_Ip_SetDMARequest (struct Emios_Pwm_Ip_HwAddrType * const base, uint8 channel, boolean value)
{
  uint8 value_convert;
  uint8 iftmp.1;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = ~value;
  if (_1 != 0)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  iftmp.1 = 0;
  goto <bb 5>; [INV]

  <bb 4> :
  iftmp.1 = 1;

  <bb 5> :
  value_convert = iftmp.1;
  # DEBUG BEGIN_STMT
  _2 = (int) channel;
  _3 = base->CH.UC[_2].C;
  _4 = _3 & 4278190079;
  _5 = (long unsigned int) value_convert;
  _6 = _5 << 24;
  _7 = _6 & 16777216;
  _8 = (int) channel;
  _9 = _4 | _7;
  base->CH.UC[_8].C = _9;
  return;

}


Emios_Pwm_Ip_SetPrescalerEnable (struct Emios_Pwm_Ip_HwAddrType * const base, uint8 channel, boolean value)
{
  uint8 value_convert;
  uint8 iftmp.8;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = ~value;
  if (_1 != 0)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  iftmp.8 = 0;
  goto <bb 5>; [INV]

  <bb 4> :
  iftmp.8 = 1;

  <bb 5> :
  value_convert = iftmp.8;
  # DEBUG BEGIN_STMT
  _2 = (int) channel;
  _3 = base->CH.UC[_2].C;
  _4 = _3 & 4261412863;
  _5 = (long unsigned int) value_convert;
  _6 = _5 << 25;
  _7 = _6 & 33554432;
  _8 = (int) channel;
  _9 = _4 | _7;
  base->CH.UC[_8].C = _9;
  return;

}


Emios_Pwm_Ip_SetOutDisableSource (struct Emios_Pwm_Ip_HwAddrType * const base, uint8 channel, Emios_Pwm_Ip_OutDisableSourceType value)
{
  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) channel;
  _2 = base->CH.UC[_1].C;
  _3 = _2 & 3489660927;
  _4 = (long unsigned int) value;
  _5 = _4 << 28;
  _6 = _5 & 805306368;
  _7 = (int) channel;
  _8 = _3 | _6;
  base->CH.UC[_7].C = _8;
  return;

}


Emios_Pwm_Ip_SetOutDisable (struct Emios_Pwm_Ip_HwAddrType * const base, uint8 channel, boolean value)
{
  uint8 value_convert;
  uint8 iftmp.0;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = ~value;
  if (_1 != 0)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  iftmp.0 = 0;
  goto <bb 5>; [INV]

  <bb 4> :
  iftmp.0 = 1;

  <bb 5> :
  value_convert = iftmp.0;
  # DEBUG BEGIN_STMT
  _2 = (int) channel;
  _3 = base->CH.UC[_2].C;
  _4 = _3 & 3221225471;
  _5 = (long unsigned int) value_convert;
  _6 = _5 << 30;
  _7 = _6 & 1073741824;
  _8 = (int) channel;
  _9 = _4 | _7;
  base->CH.UC[_8].C = _9;
  return;

}


Emios_Pwm_Ip_SetFreezeEnable (struct Emios_Pwm_Ip_HwAddrType * const base, uint8 channel, boolean value)
{
  uint8 value_convert;
  uint8 iftmp.11;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = ~value;
  if (_1 != 0)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  iftmp.11 = 0;
  goto <bb 5>; [INV]

  <bb 4> :
  iftmp.11 = 1;

  <bb 5> :
  value_convert = iftmp.11;
  # DEBUG BEGIN_STMT
  _2 = (int) channel;
  _3 = base->CH.UC[_2].C;
  _4 = _3 & 2147483647;
  _5 = (long unsigned int) value_convert;
  _6 = _5 << 31;
  _7 = (int) channel;
  _8 = _4 | _6;
  base->CH.UC[_7].C = _8;
  return;

}


Emios_Pwm_Ip_GetUCRegB (const struct Emios_Pwm_Ip_HwAddrType * const base, uint8 channel)
{
  uint16 D.8635;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) channel;
  _2 = base->CH.UC[_1].B;
  D.8635 = (uint16) _2;
  return D.8635;

}


Emios_Pwm_Ip_SetUCRegB (struct Emios_Pwm_Ip_HwAddrType * const base, uint8 channel, uint16 value)
{
  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) channel;
  _2 = (long unsigned int) value;
  base->CH.UC[_1].B = _2;
  return;

}


Emios_Pwm_Ip_GetUCRegA (const struct Emios_Pwm_Ip_HwAddrType * const base, uint8 channel)
{
  uint16 D.8561;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) channel;
  _2 = base->CH.UC[_1].A;
  D.8561 = (uint16) _2;
  return D.8561;

}


Emios_Pwm_Ip_SetUCRegA (struct Emios_Pwm_Ip_HwAddrType * const base, uint8 channel, uint16 value)
{
  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) channel;
  _2 = (long unsigned int) value;
  base->CH.UC[_1].A = _2;
  return;

}


Emios_Pwm_Ip_GetOutputUpdateInstance (const struct Emios_Pwm_Ip_HwAddrType * const base)
{
  uint32 D.8843;

  <bb 2> :
  # DEBUG BEGIN_STMT
  D.8843 = base->OUDIS;
  return D.8843;

}


Emios_Pwm_Ip_SetOutputUpdate (struct Emios_Pwm_Ip_HwAddrType * const base, uint8 channel, boolean value)
{
  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = base->OUDIS;
  _2 = ~value;
  _3 = (long unsigned int) _2;
  _4 = (int) channel;
  _5 = _3 << _4;
  _6 = _1 | _5;
  base->OUDIS = _6;
  return;

}


Emios_Pwm_Ip_GetDebugMode (const struct Emios_Pwm_Ip_HwAddrType * const base)
{
  boolean D.8781;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = base->MCR;
  _2 = _1 & 536870912;
  D.8781 = _2 != 0;
  return D.8781;

}


