Emios_Pwm_Ip_SyncUpdate (uint8 instance)
{
  uint8 channelId;
  uint8 oudisDisable;
  Emios_Pwm_Ip_PwmModeType chMode;
  uint32 channelMask;
  uint32 oudisRegVal;
  struct Emios_Pwm_Ip_HwAddrType * const base;
  int _1;
  int _2;
  long unsigned int _3;
  long unsigned int _4;
  int _5;
  long unsigned int _6;
  int _7;
  int _8;
  unsigned char _9;
  short unsigned int _10;
  int _11;
  long unsigned int _12;
  int _13;
  long unsigned int _14;
  int _15;
  long unsigned int _16;
  unsigned char channelId.13_17;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) instance_24(D);
  base_26 = Emios_Pwm_Ip_aBasePtr[_1];
  # DEBUG base => base_26
  # DEBUG BEGIN_STMT
  oudisRegVal_28 = Emios_Pwm_Ip_GetOutputUpdateInstance (base_26);
  # DEBUG oudisRegVal => oudisRegVal_28
  # DEBUG BEGIN_STMT
  channelMask_29 = 0;
  # DEBUG channelMask => channelMask_29
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  oudisDisable_30 = 0;
  # DEBUG oudisDisable => oudisDisable_30
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  channelId_31 = 0;
  # DEBUG channelId => channelId_31
  goto <bb 14>; [INV]

  <bb 3> :
  # DEBUG BEGIN_STMT
  _2 = (int) channelId_20;
  _3 = 1 << _2;
  _4 = oudisRegVal_28 & _3;
  _5 = (int) channelId_20;
  _6 = _4 >> _5;
  oudisDisable_33 = (uint8) _6;
  # DEBUG oudisDisable => oudisDisable_33
  # DEBUG BEGIN_STMT
  _7 = (int) instance_24(D);
  _8 = (int) channelId_20;
  _9 = Emios_Pwm_Ip_aCheckState[_7][_8];
  if (_9 != 0)
    goto <bb 4>; [INV]
  else
    goto <bb 13>; [INV]

  <bb 4> :
  if (oudisDisable_33 == 1)
    goto <bb 5>; [INV]
  else
    goto <bb 13>; [INV]

  <bb 5> :
  # DEBUG BEGIN_STMT
  chMode_35 = Emios_Pwm_Ip_GetPwmMode (base_26, channelId_20);
  # DEBUG chMode => chMode_35
  # DEBUG BEGIN_STMT
  _10 = Emios_Pwm_Ip_GetUCRegA (base_26, channelId_20);
  if (_10 == 1)
    goto <bb 6>; [INV]
  else
    goto <bb 12>; [INV]

  <bb 6> :
  # DEBUG BEGIN_STMT
  if (chMode_35 == 92)
    goto <bb 8>; [INV]
  else
    goto <bb 7>; [INV]

  <bb 7> :
  if (chMode_35 == 94)
    goto <bb 8>; [INV]
  else
    goto <bb 9>; [INV]

  <bb 8> :
  # DEBUG BEGIN_STMT
  _11 = (int) channelId_20;
  _12 = 1 << _11;
  Emios_Mcl_Ip_ComparatorTransferEnable (instance_24(D), _12);
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetForceMatchB (base_26, channelId_20, 1);
  goto <bb 12>; [INV]

  <bb 9> :
  # DEBUG BEGIN_STMT
  if (chMode_35 == 93)
    goto <bb 11>; [INV]
  else
    goto <bb 10>; [INV]

  <bb 10> :
  if (chMode_35 == 95)
    goto <bb 11>; [INV]
  else
    goto <bb 12>; [INV]

  <bb 11> :
  # DEBUG BEGIN_STMT
  _13 = (int) channelId_20;
  _14 = 1 << _13;
  Emios_Mcl_Ip_ComparatorTransferEnable (instance_24(D), _14);
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetForceMatchA (base_26, channelId_20, 1);

  <bb 12> :
  # DEBUG BEGIN_STMT
  _15 = (int) channelId_20;
  _16 = 1 << _15;
  channelMask_41 = channelMask_19 | _16;
  # DEBUG channelMask => channelMask_41

  <bb 13> :
  # channelMask_18 = PHI <channelMask_19(3), channelMask_19(4), channelMask_41(12)>
  # DEBUG channelMask => channelMask_18
  # DEBUG BEGIN_STMT
  channelId.13_17 = channelId_20;
  channelId_42 = channelId.13_17 + 1;
  # DEBUG channelId => channelId_42

  <bb 14> :
  # channelMask_19 = PHI <channelMask_29(2), channelMask_18(13)>
  # channelId_20 = PHI <channelId_31(2), channelId_42(13)>
  # DEBUG channelId => channelId_20
  # DEBUG channelMask => channelMask_19
  # DEBUG BEGIN_STMT
  if (channelId_20 <= 23)
    goto <bb 3>; [INV]
  else
    goto <bb 15>; [INV]

  <bb 15> :
  # DEBUG BEGIN_STMT
  Emios_Mcl_Ip_ComparatorTransferEnable (instance_24(D), channelMask_19);
  return;

}


Emios_Pwm_Ip_ComparatorTransferDisable (uint8 instance, uint32 channelMask)
{
  <bb 2> :
  # DEBUG BEGIN_STMT
  SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_30 ();
  # DEBUG BEGIN_STMT
  Emios_Mcl_Ip_ComparatorTransferDisable (instance_3(D), channelMask_4(D));
  # DEBUG BEGIN_STMT
  SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_30 ();
  return;

}


Emios_Pwm_Ip_ComparatorTransferEnable (uint8 instance, uint32 channelMask)
{
  <bb 2> :
  # DEBUG BEGIN_STMT
  SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_29 ();
  # DEBUG BEGIN_STMT
  Emios_Mcl_Ip_ComparatorTransferEnable (instance_3(D), channelMask_4(D));
  # DEBUG BEGIN_STMT
  SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_29 ();
  return;

}


Emios_Pwm_Ip_SetClockPs (uint8 instance, uint8 channel, Emios_Pwm_Ip_InternalClkPsType value)
{
  struct Emios_Pwm_Ip_HwAddrType * const base;
  int _1;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) instance_2(D);
  base_4 = Emios_Pwm_Ip_aBasePtr[_1];
  # DEBUG base => base_4
  # DEBUG BEGIN_STMT
  SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_28 ();
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetPrescalerEnable (base_4, channel_6(D), 0);
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetExtendedPrescaler (base_4, channel_6(D), value_8(D));
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetPrescalerEnable (base_4, channel_6(D), 1);
  # DEBUG BEGIN_STMT
  SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_28 ();
  return;

}


Emios_Pwm_Ip_SetBusSelected (uint8 instance, uint8 channel, Emios_Pwm_Ip_CounterBusSourceType value)
{
  struct Emios_Pwm_Ip_HwAddrType * const base;
  int _1;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) instance_2(D);
  base_4 = Emios_Pwm_Ip_aBasePtr[_1];
  # DEBUG base => base_4
  # DEBUG BEGIN_STMT
  SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_27 ();
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetCounterBus (base_4, channel_6(D), value_7(D));
  # DEBUG BEGIN_STMT
  SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_27 ();
  return;

}


Emios_Pwm_Ip_SetPreEnableClock (uint8 instance, uint8 channel, boolean value)
{
  struct Emios_Pwm_Ip_HwAddrType * const base;
  int _1;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) instance_2(D);
  base_4 = Emios_Pwm_Ip_aBasePtr[_1];
  # DEBUG base => base_4
  # DEBUG BEGIN_STMT
  SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_26 ();
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetPrescalerEnable (base_4, channel_6(D), value_7(D));
  # DEBUG BEGIN_STMT
  SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_26 ();
  return;

}


Emios_Pwm_Ip_GetMasterBusChannel (uint8 instance, uint8 channel)
{
  Emios_Pwm_Ip_CounterBusSourceType counterBus;
  uint8 channelMaster;
  const struct Emios_Pwm_Ip_HwAddrType * const base;
  int _1;
  int _2;
  unsigned char _3;
  uint8 _16;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) instance_5(D);
  base_7 = Emios_Pwm_Ip_aBasePtr[_1];
  # DEBUG base => base_7
  # DEBUG BEGIN_STMT
  channelMaster_9 = channel_8(D);
  # DEBUG channelMaster => channelMaster_9
  # DEBUG BEGIN_STMT
  counterBus_11 = Emios_Pwm_Ip_GetCounterBus (base_7, channel_8(D));
  # DEBUG counterBus => counterBus_11
  # DEBUG BEGIN_STMT
  _2 = (int) counterBus_11;
  switch (_2) <default: <L3> [INV], case 0: <L0> [INV], case 1: <L2> [INV], case 2: <L1> [INV]>

  <bb 3> :
<L0>:
  # DEBUG BEGIN_STMT
  channelMaster_14 = 23;
  # DEBUG channelMaster => channelMaster_14
  # DEBUG BEGIN_STMT
  goto <bb 7>; [INV]

  <bb 4> :
<L1>:
  # DEBUG BEGIN_STMT
  channelMaster_12 = 22;
  # DEBUG channelMaster => channelMaster_12
  # DEBUG BEGIN_STMT
  goto <bb 7>; [INV]

  <bb 5> :
<L2>:
  # DEBUG BEGIN_STMT
  _3 = channel_8(D) >> 3;
  channelMaster_13 = _3 * 8;
  # DEBUG channelMaster => channelMaster_13
  # DEBUG BEGIN_STMT
  goto <bb 7>; [INV]

  <bb 6> :
<L3>:
  # DEBUG BEGIN_STMT
  channelMaster_15 = channel_8(D);
  # DEBUG channelMaster => channelMaster_15
  # DEBUG BEGIN_STMT

  <bb 7> :
  # channelMaster_4 = PHI <channelMaster_14(3), channelMaster_12(4), channelMaster_13(5), channelMaster_15(6)>
  # DEBUG channelMaster => channelMaster_4
  # DEBUG BEGIN_STMT
  _16 = channelMaster_4;
  return _16;

}


Emios_Pwm_Ip_GetChannelMode (uint8 instance, uint8 channel)
{
  Emios_Pwm_Ip_PwmModeType channelMode;
  const struct Emios_Pwm_Ip_HwAddrType * const base;
  int _1;
  Emios_Pwm_Ip_PwmModeType _8;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) instance_2(D);
  base_4 = Emios_Pwm_Ip_aBasePtr[_1];
  # DEBUG base => base_4
  # DEBUG BEGIN_STMT
  channelMode_7 = Emios_Pwm_Ip_GetPwmMode (base_4, channel_5(D));
  # DEBUG channelMode => channelMode_7
  # DEBUG BEGIN_STMT
  _8 = channelMode_7;
  return _8;

}


Emios_Pwm_Ip_SetOutputToNormal (uint8 instance, uint8 channel, uint16 dutyPercent, Emios_Pwm_Ip_PolarityType polarity, Emios_Pwm_Ip_PwmModeType mode)
{
  struct Emios_Pwm_Ip_HwAddrType * const base;
  int _1;
  <unnamed type> _2;
  _Bool _3;
  <unnamed type> _4;
  _Bool _5;
  <unnamed type> _6;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) instance_8(D);
  base_10 = Emios_Pwm_Ip_aBasePtr[_1];
  # DEBUG base => base_10
  # DEBUG BEGIN_STMT
  SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_25 ();
  # DEBUG BEGIN_STMT
  _2 = Emios_Pwm_Ip_GetPwmMode (base_10, channel_12(D));
  if (_2 == 1)
    goto <bb 3>; [INV]
  else
    goto <bb 12>; [INV]

  <bb 3> :
  # DEBUG BEGIN_STMT
  if (mode_14(D) == 88)
    goto <bb 5>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 4> :
  if (mode_14(D) == 90)
    goto <bb 5>; [INV]
  else
    goto <bb 6>; [INV]

  <bb 5> :
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetPwmMode (base_10, channel_12(D), mode_14(D));
  # DEBUG BEGIN_STMT
  _3 = polarity_16(D) != 1;
  _4 = (<unnamed type>) _3;
  Emios_Pwm_Ip_SetEdgePolarity (base_10, channel_12(D), _4);
  goto <bb 12>; [INV]

  <bb 6> :
  # DEBUG BEGIN_STMT
  if (mode_14(D) == 96)
    goto <bb 8>; [INV]
  else
    goto <bb 7>; [INV]

  <bb 7> :
  if (mode_14(D) == 98)
    goto <bb 8>; [INV]
  else
    goto <bb 9>; [INV]

  <bb 8> :
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetPwmMode (base_10, channel_12(D), mode_14(D));
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetEdgePolarity (base_10, channel_12(D), polarity_16(D));
  goto <bb 12>; [INV]

  <bb 9> :
  # DEBUG BEGIN_STMT
  if (dutyPercent_15(D) == 32768)
    goto <bb 10>; [INV]
  else
    goto <bb 11>; [INV]

  <bb 10> :
  # DEBUG BEGIN_STMT
  _5 = polarity_16(D) != 1;
  _6 = (<unnamed type>) _5;
  Emios_Pwm_Ip_SetPwmModePol (base_10, channel_12(D), mode_14(D), _6);
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetEdgePolarity (base_10, channel_12(D), polarity_16(D));
  goto <bb 12>; [INV]

  <bb 11> :
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetPwmModePol (base_10, channel_12(D), mode_14(D), polarity_16(D));

  <bb 12> :
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_25 ();
  return;

}


Emios_Pwm_Ip_SetOutputState (uint8 instance, uint8 channel, Emios_Pwm_Ip_OutputStateType outputState)
{
  struct Emios_Pwm_Ip_HwAddrType * const base;
  int _1;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) instance_3(D);
  base_5 = Emios_Pwm_Ip_aBasePtr[_1];
  # DEBUG base => base_5
  # DEBUG BEGIN_STMT
  SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_24 ();
  # DEBUG BEGIN_STMT
  if (outputState_7(D) == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetEdgePolarity (base_5, channel_8(D), 0);
  goto <bb 5>; [INV]

  <bb 4> :
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetEdgePolarity (base_5, channel_8(D), 1);

  <bb 5> :
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetPwmMode (base_5, channel_8(D), 1);
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetInterruptRequest (base_5, channel_8(D), 0);
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_ClearFlagEvent (base_5, channel_8(D));
  # DEBUG BEGIN_STMT
  SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_24 ();
  return;

}


Emios_Pwm_Ip_GetOutputState (uint8 instance, uint8 channel)
{
  const struct Emios_Pwm_Ip_HwAddrType * const base;
  int _1;
  _Bool _2;
  _Bool _3;
  Emios_Pwm_Ip_OutputStateType iftmp.12_4;
  Emios_Pwm_Ip_OutputStateType iftmp.12_10;
  Emios_Pwm_Ip_OutputStateType iftmp.12_11;
  Emios_Pwm_Ip_OutputStateType _12;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) instance_5(D);
  base_7 = Emios_Pwm_Ip_aBasePtr[_1];
  # DEBUG base => base_7
  # DEBUG BEGIN_STMT
  _2 = Emios_Pwm_Ip_GetOutputPinState (base_7, channel_8(D));
  _3 = ~_2;
  if (_3 != 0)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  iftmp.12_11 = 0;
  goto <bb 5>; [INV]

  <bb 4> :
  iftmp.12_10 = 1;

  <bb 5> :
  # iftmp.12_4 = PHI <iftmp.12_11(3), iftmp.12_10(4)>
  _12 = iftmp.12_4;
  return _12;

}


Emios_Pwm_Ip_SetFlagRequest (uint8 instance, uint8 channel, Emios_Pwm_Ip_InterruptType event)
{
  struct Emios_Pwm_Ip_HwAddrType * const base;
  int _1;
  int _2;
  int _3;
  int _4;
  unsigned char _5;
  int _6;
  int _7;
  int _8;
  int _9;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) instance_11(D);
  base_13 = Emios_Pwm_Ip_aBasePtr[_1];
  # DEBUG base => base_13
  # DEBUG BEGIN_STMT
  SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_23 ();
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_ClearFlagEvent (base_13, channel_15(D));
  # DEBUG BEGIN_STMT
  _2 = (int) event_17(D);
  switch (_2) <default: <L7> [INV], case 0: <L4> [INV], case 1: <L0> [INV], case 2: <L3> [INV]>

  <bb 3> :
<L0>:
  # DEBUG BEGIN_STMT
  _3 = (int) instance_11(D);
  _4 = (int) channel_15(D);
  _5 = Emios_Pwm_Ip_aNotif[_3][_4];
  if (_5 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 7>; [INV]

  <bb 4> :
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetInterruptRequest (base_13, channel_15(D), 1);
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetDMARequest (base_13, channel_15(D), 0);
  # DEBUG BEGIN_STMT
  _6 = (int) instance_11(D);
  _7 = (int) channel_15(D);
  Emios_Pwm_Ip_aCheckEnableNotif[_6][_7] = 1;
  goto <bb 7>; [INV]

  <bb 5> :
<L3>:
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetInterruptRequest (base_13, channel_15(D), 1);
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetDMARequest (base_13, channel_15(D), 1);
  # DEBUG BEGIN_STMT
  goto <bb 7>; [INV]

  <bb 6> :
<L4>:
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetInterruptRequest (base_13, channel_15(D), 0);
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetDMARequest (base_13, channel_15(D), 0);
  # DEBUG BEGIN_STMT
  _8 = (int) instance_11(D);
  _9 = (int) channel_15(D);
  Emios_Pwm_Ip_aCheckEnableNotif[_8][_9] = 0;
  # DEBUG BEGIN_STMT

  <bb 7> :
<L7>:
  # DEBUG BEGIN_STMT
  SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_23 ();
  return;

}


Emios_Pwm_Ip_GetFlagRequest (uint8 instance, uint8 channel)
{
  Emios_Pwm_Ip_InterruptType eventType;
  const struct Emios_Pwm_Ip_HwAddrType * const base;
  int _1;
  _Bool _2;
  _Bool _3;
  Emios_Pwm_Ip_InterruptType _15;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) instance_6(D);
  base_8 = Emios_Pwm_Ip_aBasePtr[_1];
  # DEBUG base => base_8
  # DEBUG BEGIN_STMT
  eventType_9 = 0;
  # DEBUG eventType => eventType_9
  # DEBUG BEGIN_STMT
  _2 = Emios_Pwm_Ip_GetInterruptRequest (base_8, channel_10(D));
  if (_2 != 0)
    goto <bb 3>; [INV]
  else
    goto <bb 6>; [INV]

  <bb 3> :
  # DEBUG BEGIN_STMT
  _3 = Emios_Pwm_Ip_GetDMARequest (base_8, channel_10(D));
  if (_3 != 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  # DEBUG BEGIN_STMT
  eventType_14 = 2;
  # DEBUG eventType => eventType_14
  goto <bb 6>; [INV]

  <bb 5> :
  # DEBUG BEGIN_STMT
  eventType_13 = 1;
  # DEBUG eventType => eventType_13

  <bb 6> :
  # eventType_4 = PHI <eventType_9(2), eventType_14(4), eventType_13(5)>
  # DEBUG eventType => eventType_4
  # DEBUG BEGIN_STMT
  _15 = eventType_4;
  return _15;

}


Emios_Pwm_Ip_ChannelStopDebugMode (uint8 instance, uint8 channel)
{
  struct Emios_Pwm_Ip_HwAddrType * const base;
  int _1;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) instance_2(D);
  base_4 = Emios_Pwm_Ip_aBasePtr[_1];
  # DEBUG base => base_4
  # DEBUG BEGIN_STMT
  SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_22 ();
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetFreezeEnable (base_4, channel_6(D), 0);
  # DEBUG BEGIN_STMT
  SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_22 ();
  return;

}


Emios_Pwm_Ip_ChannelEnterDebugMode (uint8 instance, uint8 channel)
{
  Emios_Pwm_Ip_StatusType ret;
  struct Emios_Pwm_Ip_HwAddrType * const base;
  int _1;
  _Bool _2;
  Emios_Pwm_Ip_StatusType _15;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) instance_5(D);
  base_7 = Emios_Pwm_Ip_aBasePtr[_1];
  # DEBUG base => base_7
  # DEBUG BEGIN_STMT
  ret_8 = 0;
  # DEBUG ret => ret_8
  # DEBUG BEGIN_STMT
  SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_21 ();
  # DEBUG BEGIN_STMT
  _2 = Emios_Pwm_Ip_GetDebugMode (base_7);
  if (_2 != 0)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetFreezeEnable (base_7, channel_12(D), 1);
  goto <bb 5>; [INV]

  <bb 4> :
  # DEBUG BEGIN_STMT
  ret_11 = 3075;
  # DEBUG ret => ret_11

  <bb 5> :
  # ret_3 = PHI <ret_8(3), ret_11(4)>
  # DEBUG ret => ret_3
  # DEBUG BEGIN_STMT
  SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_21 ();
  # DEBUG BEGIN_STMT
  _15 = ret_3;
  return _15;

}


Emios_Pwm_Ip_SetTriggerPlacement (uint8 instance, uint8 channel, uint32 newTriggerPlacement)
{
  uint8 counterStart;
  struct Emios_Pwm_Ip_HwAddrType * const base;
  int _1;
  <unnamed type> _2;
  <unnamed type> _3;
  short unsigned int _4;
  short unsigned int _5;
  short unsigned int _6;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) instance_8(D);
  base_10 = Emios_Pwm_Ip_aBasePtr[_1];
  # DEBUG base => base_10
  # DEBUG BEGIN_STMT
  counterStart_11 = 0;
  # DEBUG counterStart => counterStart_11
  # DEBUG BEGIN_STMT
  SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_20 ();
  # DEBUG BEGIN_STMT
  _2 = Emios_Pwm_Ip_GetCounterBus (base_10, channel_13(D));
  _3 = Emios_Pwm_Ip_GetCounterBusMode (instance_8(D), channel_13(D), _2);
  if (_3 == 80)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  # DEBUG BEGIN_STMT
  counterStart_17 = 1;
  # DEBUG counterStart => counterStart_17
  goto <bb 5>; [INV]

  <bb 4> :
  # DEBUG BEGIN_STMT
  counterStart_16 = 0;
  # DEBUG counterStart => counterStart_16

  <bb 5> :
  # counterStart_7 = PHI <counterStart_17(3), counterStart_16(4)>
  # DEBUG counterStart => counterStart_7
  # DEBUG BEGIN_STMT
  _4 = (short unsigned int) newTriggerPlacement_18(D);
  _5 = (short unsigned int) counterStart_7;
  _6 = _4 + _5;
  Emios_Pwm_Ip_SetTrigger (base_10, channel_13(D), _6);
  # DEBUG BEGIN_STMT
  SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_20 ();
  return;

}


Emios_Pwm_Ip_GetTriggerPlacement (uint8 instance, uint8 channel)
{
  const struct Emios_Pwm_Ip_HwAddrType * const base;
  int _1;
  short unsigned int _2;
  uint32 _8;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) instance_3(D);
  base_5 = Emios_Pwm_Ip_aBasePtr[_1];
  # DEBUG base => base_5
  # DEBUG BEGIN_STMT
  _2 = Emios_Pwm_Ip_GetTrigger (base_5, channel_6(D));
  _8 = (uint32) _2;
  return _8;

}


Emios_Pwm_Ip_SetDeadTime (uint8 instance, uint8 channel, uint16 newDeadTime)
{
  struct Emios_Pwm_Ip_HwAddrType * const base;
  int _1;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) instance_2(D);
  base_4 = Emios_Pwm_Ip_aBasePtr[_1];
  # DEBUG base => base_4
  # DEBUG BEGIN_STMT
  SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_19 ();
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetUCRegB (base_4, channel_6(D), newDeadTime_7(D));
  # DEBUG BEGIN_STMT
  SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_19 ();
  return;

}


Emios_Pwm_Ip_GetDeadTime (uint8 instance, uint8 channel)
{
  const struct Emios_Pwm_Ip_HwAddrType * const base;
  int _1;
  uint16 _7;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) instance_2(D);
  base_4 = Emios_Pwm_Ip_aBasePtr[_1];
  # DEBUG base => base_4
  # DEBUG BEGIN_STMT
  _7 = Emios_Pwm_Ip_GetUCRegB (base_4, channel_5(D));
  return _7;

}


Emios_Pwm_Ip_SetPhaseShift (uint8 instance, uint8 channel, uint16 phaseShift)
{
  uint8 counterStart;
  uint16 dutyCycle;
  uint16 chPeriod;
  Emios_Pwm_Ip_PwmModeType chMode;
  struct Emios_Pwm_Ip_HwAddrType * const base;
  Emios_Pwm_Ip_StatusType status;
  int _1;
  <unnamed type> _2;
  <unnamed type> _3;
  <unnamed type> _4;
  short unsigned int _5;
  int _6;
  int _7;
  short unsigned int _8;
  int _9;
  int _10;
  int _11;
  int _12;
  short unsigned int _13;
  short unsigned int _14;
  short unsigned int _15;
  short unsigned int _16;
  short unsigned int _17;
  short unsigned int _18;
  short unsigned int _19;
  unsigned int _20;
  unsigned int _21;
  unsigned int _22;
  int _23;
  int _24;
  int _25;
  int _26;
  int _27;
  short unsigned int _28;
  short unsigned int _29;
  short unsigned int _30;
  Emios_Pwm_Ip_StatusType _64;

  <bb 2> :
  # DEBUG BEGIN_STMT
  status_34 = 0;
  # DEBUG status => status_34
  # DEBUG BEGIN_STMT
  _1 = (int) instance_35(D);
  base_37 = Emios_Pwm_Ip_aBasePtr[_1];
  # DEBUG base => base_37
  # DEBUG BEGIN_STMT
  chMode_40 = Emios_Pwm_Ip_GetPwmMode (base_37, channel_38(D));
  # DEBUG chMode => chMode_40
  # DEBUG BEGIN_STMT
  chPeriod_41 = 0;
  # DEBUG chPeriod => chPeriod_41
  # DEBUG BEGIN_STMT
  dutyCycle_42 = 0;
  # DEBUG dutyCycle => dutyCycle_42
  # DEBUG BEGIN_STMT
  counterStart_43 = 0;
  # DEBUG counterStart => counterStart_43
  # DEBUG BEGIN_STMT
  SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_18 ();
  # DEBUG BEGIN_STMT
  _2 = Emios_Pwm_Ip_GetCounterBus (base_37, channel_38(D));
  chPeriod_47 = Emios_Pwm_Ip_GetCounterBusPeriod (instance_35(D), channel_38(D), _2);
  # DEBUG chPeriod => chPeriod_47
  # DEBUG BEGIN_STMT
  dutyCycle_49 = Emios_Pwm_Ip_GetDutyCycle (instance_35(D), channel_38(D));
  # DEBUG dutyCycle => dutyCycle_49
  # DEBUG BEGIN_STMT
  _3 = Emios_Pwm_Ip_GetCounterBus (base_37, channel_38(D));
  _4 = Emios_Pwm_Ip_GetCounterBusMode (instance_35(D), channel_38(D), _3);
  if (_4 == 80)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  # DEBUG BEGIN_STMT
  counterStart_53 = 1;
  # DEBUG counterStart => counterStart_53
  goto <bb 5>; [INV]

  <bb 4> :
  # DEBUG BEGIN_STMT
  counterStart_52 = 0;
  # DEBUG counterStart => counterStart_52

  <bb 5> :
  # counterStart_32 = PHI <counterStart_53(3), counterStart_52(4)>
  # DEBUG counterStart => counterStart_32
  # DEBUG BEGIN_STMT
  _5 = (short unsigned int) counterStart_32;
  _6 = (int) instance_35(D);
  _7 = (int) channel_38(D);
  _8 = phaseShift_54(D) + _5;
  Emios_Pwm_Ip_aRegA[_6][_7] = _8;
  # DEBUG BEGIN_STMT
  if (chMode_40 == 96)
    goto <bb 7>; [INV]
  else
    goto <bb 6>; [INV]

  <bb 6> :
  if (chMode_40 == 98)
    goto <bb 7>; [INV]
  else
    goto <bb 10>; [INV]

  <bb 7> :
  # DEBUG BEGIN_STMT
  _9 = (int) phaseShift_54(D);
  _10 = (int) dutyCycle_49;
  _11 = _9 + _10;
  _12 = (int) chPeriod_47;
  if (_11 > _12)
    goto <bb 8>; [INV]
  else
    goto <bb 9>; [INV]

  <bb 8> :
  # DEBUG BEGIN_STMT
  status_62 = 1;
  # DEBUG status => status_62
  goto <bb 16>; [INV]

  <bb 9> :
  # DEBUG BEGIN_STMT
  _13 = (short unsigned int) counterStart_32;
  _14 = phaseShift_54(D) + _13;
  Emios_Pwm_Ip_SetUCRegA (base_37, channel_38(D), _14);
  # DEBUG BEGIN_STMT
  _15 = phaseShift_54(D) + dutyCycle_49;
  _16 = (short unsigned int) counterStart_32;
  _17 = _15 + _16;
  Emios_Pwm_Ip_SetUCRegB (base_37, channel_38(D), _17);
  goto <bb 16>; [INV]

  <bb 10> :
  # DEBUG BEGIN_STMT
  if (chMode_40 == 38)
    goto <bb 11>; [INV]
  else
    goto <bb 15>; [INV]

  <bb 11> :
  # DEBUG BEGIN_STMT
  if (phaseShift_54(D) > chPeriod_47)
    goto <bb 12>; [INV]
  else
    goto <bb 13>; [INV]

  <bb 12> :
  # DEBUG BEGIN_STMT
  status_59 = 1;
  # DEBUG status => status_59
  goto <bb 16>; [INV]

  <bb 13> :
  # DEBUG BEGIN_STMT
  _18 = (short unsigned int) counterStart_32;
  _19 = phaseShift_54(D) + _18;
  Emios_Pwm_Ip_SetUCRegA (base_37, channel_38(D), _19);
  # DEBUG BEGIN_STMT
  _20 = (unsigned int) dutyCycle_49;
  _21 = (unsigned int) chPeriod_47;
  _22 = _21 + 1;
  if (_20 < _22)
    goto <bb 14>; [INV]
  else
    goto <bb 16>; [INV]

  <bb 14> :
  # DEBUG BEGIN_STMT
  _23 = (int) phaseShift_54(D);
  _24 = (int) dutyCycle_49;
  _25 = _23 + _24;
  _26 = (int) chPeriod_47;
  _27 = _25 % _26;
  _28 = (short unsigned int) _27;
  _29 = (short unsigned int) counterStart_32;
  _30 = _28 + _29;
  Emios_Pwm_Ip_SetUCRegB (base_37, channel_38(D), _30);
  goto <bb 16>; [INV]

  <bb 15> :
  # DEBUG BEGIN_STMT
  status_56 = 1;
  # DEBUG status => status_56

  <bb 16> :
  # status_31 = PHI <status_34(9), status_34(13), status_56(15), status_62(8), status_59(12), status_34(14)>
  # DEBUG status => status_31
  # DEBUG BEGIN_STMT
  SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_18 ();
  # DEBUG BEGIN_STMT
  _64 = status_31;
  return _64;

}


Emios_Pwm_Ip_GetPhaseShift (uint8 instance, uint8 channel)
{
  const struct Emios_Pwm_Ip_HwAddrType * const base;
  int _1;
  uint16 _7;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) instance_2(D);
  base_4 = Emios_Pwm_Ip_aBasePtr[_1];
  # DEBUG base => base_4
  # DEBUG BEGIN_STMT
  _7 = Emios_Pwm_Ip_GetUCRegA (base_4, channel_5(D));
  return _7;

}


Emios_Pwm_Ip_SetDutyCycle (uint8 instance, uint8 channel, uint16 newDutyCycle)
{
  Emios_Pwm_Ip_PwmModeType chMode;
  Emios_Pwm_Ip_StatusType ret;
  const struct Emios_Pwm_Ip_HwAddrType * const base;
  int _1;
  unsigned char _2;
  Emios_Pwm_Ip_StatusType _25;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) instance_5(D);
  base_7 = Emios_Pwm_Ip_aBasePtr[_1];
  # DEBUG base => base_7
  # DEBUG BEGIN_STMT
  ret_8 = 0;
  # DEBUG ret => ret_8
  # DEBUG BEGIN_STMT
  chMode_11 = Emios_Pwm_Ip_GetPwmMode (base_7, channel_9(D));
  # DEBUG chMode => chMode_11
  # DEBUG BEGIN_STMT
  SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_17 ();
  # DEBUG BEGIN_STMT
  if (chMode_11 == 88)
    goto <bb 4>; [INV]
  else
    goto <bb 3>; [INV]

  <bb 3> :
  if (chMode_11 == 90)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  # DEBUG BEGIN_STMT
  ret_23 = Emios_Pwm_Ip_SetDutyCycleOpwfmb (instance_5(D), channel_9(D), newDutyCycle_13(D));
  # DEBUG ret => ret_23
  goto <bb 16>; [INV]

  <bb 5> :
  # DEBUG BEGIN_STMT
  if (chMode_11 == 92)
    goto <bb 9>; [INV]
  else
    goto <bb 6>; [INV]

  <bb 6> :
  if (chMode_11 == 94)
    goto <bb 9>; [INV]
  else
    goto <bb 7>; [INV]

  <bb 7> :
  if (chMode_11 == 93)
    goto <bb 9>; [INV]
  else
    goto <bb 8>; [INV]

  <bb 8> :
  if (chMode_11 == 95)
    goto <bb 9>; [INV]
  else
    goto <bb 10>; [INV]

  <bb 9> :
  # DEBUG BEGIN_STMT
  ret_21 = Emios_Pwm_Ip_SetDutyCycleOpwmcb (instance_5(D), channel_9(D), newDutyCycle_13(D));
  # DEBUG ret => ret_21
  goto <bb 16>; [INV]

  <bb 10> :
  # DEBUG BEGIN_STMT
  if (chMode_11 == 96)
    goto <bb 12>; [INV]
  else
    goto <bb 11>; [INV]

  <bb 11> :
  if (chMode_11 == 98)
    goto <bb 12>; [INV]
  else
    goto <bb 13>; [INV]

  <bb 12> :
  # DEBUG BEGIN_STMT
  ret_19 = Emios_Pwm_Ip_SetDutyCycleOpwmb (instance_5(D), channel_9(D), newDutyCycle_13(D));
  # DEBUG ret => ret_19
  goto <bb 16>; [INV]

  <bb 13> :
  # DEBUG BEGIN_STMT
  _2 = chMode_11 + 250;
  if (_2 <= 1)
    goto <bb 14>; [INV]
  else
    goto <bb 15>; [INV]

  <bb 14> :
  # DEBUG BEGIN_STMT
  ret_17 = Emios_Pwm_Ip_SetDutyCycleDaoc (instance_5(D), channel_9(D), newDutyCycle_13(D));
  # DEBUG ret => ret_17
  goto <bb 16>; [INV]

  <bb 15> :
  # DEBUG BEGIN_STMT
  ret_15 = Emios_Pwm_Ip_SetDutyCycleOpwmt (instance_5(D), channel_9(D), newDutyCycle_13(D));
  # DEBUG ret => ret_15

  <bb 16> :
  # ret_3 = PHI <ret_23(4), ret_21(9), ret_19(12), ret_17(14), ret_15(15)>
  # DEBUG ret => ret_3
  # DEBUG BEGIN_STMT
  SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_17 ();
  # DEBUG BEGIN_STMT
  _25 = ret_3;
  return _25;

}


Emios_Pwm_Ip_GetDutyCycle (uint8 instance, uint8 channel)
{
  uint16 dutyCycle;
  uint16 chPeriod;
  uint16 regBValue;
  uint16 regAValue;
  Emios_Pwm_Ip_PwmModeType chMode;
  const struct Emios_Pwm_Ip_HwAddrType * const base;
  int _1;
  int _2;
  <unnamed type> _3;
  short unsigned int _4;
  int _5;
  int _6;
  uint16 _30;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) instance_9(D);
  base_11 = Emios_Pwm_Ip_aBasePtr[_1];
  # DEBUG base => base_11
  # DEBUG BEGIN_STMT
  chMode_14 = Emios_Pwm_Ip_GetPwmMode (base_11, channel_12(D));
  # DEBUG chMode => chMode_14
  # DEBUG BEGIN_STMT
  regAValue_16 = Emios_Pwm_Ip_GetUCRegA (base_11, channel_12(D));
  # DEBUG regAValue => regAValue_16
  # DEBUG BEGIN_STMT
  regBValue_18 = Emios_Pwm_Ip_GetUCRegB (base_11, channel_12(D));
  # DEBUG regBValue => regBValue_18
  # DEBUG BEGIN_STMT
  chPeriod_19 = 0;
  # DEBUG chPeriod => chPeriod_19
  # DEBUG BEGIN_STMT
  dutyCycle_20 = 0;
  # DEBUG dutyCycle => dutyCycle_20
  # DEBUG BEGIN_STMT
  _2 = (int) chMode_14;
  switch (_2) <default: <L20> [INV], case 6 ... 7: <L15> [INV], case 38: <L8> [INV], case 88: <L0> [INV], case 90: <L0> [INV], case 92 ... 95: <L0> [INV], case 96: <L6> [INV], case 98: <L6> [INV]>

  <bb 3> :
<L0>:
  # DEBUG BEGIN_STMT
  dutyCycle_22 = regAValue_16;
  # DEBUG dutyCycle => dutyCycle_22
  # DEBUG BEGIN_STMT
  goto <bb 11>; [INV]

  <bb 4> :
<L6>:
  # DEBUG BEGIN_STMT
  dutyCycle_21 = regBValue_18 - regAValue_16;
  # DEBUG dutyCycle => dutyCycle_21
  # DEBUG BEGIN_STMT
  goto <bb 11>; [INV]

  <bb 5> :
<L8>:
  # DEBUG BEGIN_STMT
  _3 = Emios_Pwm_Ip_GetCounterBus (base_11, channel_12(D));
  chPeriod_25 = Emios_Pwm_Ip_GetCounterBusPeriod (instance_9(D), channel_12(D), _3);
  # DEBUG chPeriod => chPeriod_25
  # DEBUG BEGIN_STMT
  if (regBValue_18 > chPeriod_25)
    goto <bb 6>; [INV]
  else
    goto <bb 7>; [INV]

  <bb 6> :
  # DEBUG BEGIN_STMT
  dutyCycle_28 = regBValue_18;
  # DEBUG dutyCycle => dutyCycle_28
  goto <bb 11>; [INV]

  <bb 7> :
  # DEBUG BEGIN_STMT
  if (regBValue_18 < regAValue_16)
    goto <bb 8>; [INV]
  else
    goto <bb 9>; [INV]

  <bb 8> :
  # DEBUG BEGIN_STMT
  _4 = chPeriod_25 - regAValue_16;
  dutyCycle_27 = regBValue_18 + _4;
  # DEBUG dutyCycle => dutyCycle_27
  goto <bb 11>; [INV]

  <bb 9> :
  # DEBUG BEGIN_STMT
  dutyCycle_26 = regBValue_18 - regAValue_16;
  # DEBUG dutyCycle => dutyCycle_26
  goto <bb 11>; [INV]

  <bb 10> :
<L15>:
  # DEBUG BEGIN_STMT
  _5 = (int) instance_9(D);
  _6 = (int) channel_12(D);
  dutyCycle_29 = Emios_Pwm_Ip_aDaocDuty[_5][_6];
  # DEBUG dutyCycle => dutyCycle_29
  # DEBUG BEGIN_STMT

  <bb 11> :
  # dutyCycle_7 = PHI <dutyCycle_22(3), dutyCycle_21(4), dutyCycle_27(8), dutyCycle_29(10), dutyCycle_20(2), dutyCycle_28(6), dutyCycle_26(9)>
<L20>:
  # DEBUG dutyCycle => dutyCycle_7
  # DEBUG BEGIN_STMT
  _30 = dutyCycle_7;
  return _30;

}


Emios_Pwm_Ip_SetPeriod (uint8 instance, uint8 channel, uint16 newPeriod)
{
  struct Emios_Pwm_Ip_HwAddrType * const base;
  int _1;
  int _2;
  int _3;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) instance_5(D);
  base_7 = Emios_Pwm_Ip_aBasePtr[_1];
  # DEBUG base => base_7
  # DEBUG BEGIN_STMT
  SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_16 ();
  # DEBUG BEGIN_STMT
  if (newPeriod_9(D) == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 3>; [INV]

  <bb 3> :
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetUCRegB (base_7, channel_10(D), newPeriod_9(D));

  <bb 4> :
  # DEBUG BEGIN_STMT
  _2 = (int) instance_5(D);
  _3 = (int) channel_10(D);
  Emios_Pwm_Ip_aPeriod[_2][_3] = newPeriod_9(D);
  # DEBUG BEGIN_STMT
  SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_16 ();
  return;

}


Emios_Pwm_Ip_GetPeriod (uint8 instance, uint8 channel)
{
  uint16 chPeriod;
  Emios_Pwm_Ip_PwmModeType chMode;
  const struct Emios_Pwm_Ip_HwAddrType * const base;
  int _1;
  unsigned char _2;
  int _3;
  int _4;
  <unnamed type> _5;
  uint16 _21;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) instance_8(D);
  base_10 = Emios_Pwm_Ip_aBasePtr[_1];
  # DEBUG base => base_10
  # DEBUG BEGIN_STMT
  chMode_13 = Emios_Pwm_Ip_GetPwmMode (base_10, channel_11(D));
  # DEBUG chMode => chMode_13
  # DEBUG BEGIN_STMT
  chPeriod_14 = 0;
  # DEBUG chPeriod => chPeriod_14
  # DEBUG BEGIN_STMT
  if (chMode_13 == 88)
    goto <bb 4>; [INV]
  else
    goto <bb 3>; [INV]

  <bb 3> :
  if (chMode_13 == 90)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  # DEBUG BEGIN_STMT
  chPeriod_20 = Emios_Pwm_Ip_GetUCRegB (base_10, channel_11(D));
  # DEBUG chPeriod => chPeriod_20
  goto <bb 8>; [INV]

  <bb 5> :
  # DEBUG BEGIN_STMT
  _2 = chMode_13 + 250;
  if (_2 <= 1)
    goto <bb 6>; [INV]
  else
    goto <bb 7>; [INV]

  <bb 6> :
  # DEBUG BEGIN_STMT
  _3 = (int) instance_8(D);
  _4 = (int) channel_11(D);
  chPeriod_18 = Emios_Pwm_Ip_aPeriod[_3][_4];
  # DEBUG chPeriod => chPeriod_18
  goto <bb 8>; [INV]

  <bb 7> :
  # DEBUG BEGIN_STMT
  _5 = Emios_Pwm_Ip_GetCounterBus (base_10, channel_11(D));
  chPeriod_17 = Emios_Pwm_Ip_GetCounterBusPeriod (instance_8(D), channel_11(D), _5);
  # DEBUG chPeriod => chPeriod_17

  <bb 8> :
  # chPeriod_6 = PHI <chPeriod_20(4), chPeriod_18(6), chPeriod_17(7)>
  # DEBUG chPeriod => chPeriod_6
  # DEBUG BEGIN_STMT
  _21 = chPeriod_6;
  return _21;

}


Emios_Pwm_Ip_ForceMatchTrailingEdge (uint8 instance, uint8 channel, boolean enable)
{
  struct Emios_Pwm_Ip_HwAddrType * const base;
  int _1;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) instance_2(D);
  base_4 = Emios_Pwm_Ip_aBasePtr[_1];
  # DEBUG base => base_4
  # DEBUG BEGIN_STMT
  SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_15 ();
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetForceMatchB (base_4, channel_6(D), enable_7(D));
  # DEBUG BEGIN_STMT
  SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_15 ();
  return;

}


Emios_Pwm_Ip_ForceMatchLeadingEdge (uint8 instance, uint8 channel, boolean enable)
{
  struct Emios_Pwm_Ip_HwAddrType * const base;
  int _1;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) instance_2(D);
  base_4 = Emios_Pwm_Ip_aBasePtr[_1];
  # DEBUG base => base_4
  # DEBUG BEGIN_STMT
  SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_14 ();
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetForceMatchA (base_4, channel_6(D), enable_7(D));
  # DEBUG BEGIN_STMT
  SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_14 ();
  return;

}


Emios_Pwm_Ip_DeInitChannel (uint8 instance, uint8 channel)
{
  struct Emios_Pwm_Ip_HwAddrType * const base;
  int _1;
  int _2;
  int _3;
  <unnamed type> _4;
  int _5;
  int _6;
  int _7;
  int _8;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) instance_10(D);
  base_12 = Emios_Pwm_Ip_aBasePtr[_1];
  # DEBUG base => base_12
  # DEBUG BEGIN_STMT
  _2 = (int) channel_13(D);
  base_12->CH.UC[_2].C2 ={v} 0;
  # DEBUG BEGIN_STMT
  _3 = (int) channel_13(D);
  base_12->CH.UC[_3].C ={v} 0;
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetUCRegA (base_12, channel_13(D), 0);
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetUCRegB (base_12, channel_13(D), 0);
  # DEBUG BEGIN_STMT
  _4 = Emios_Pwm_Ip_GetPwmMode (base_12, channel_13(D));
  if (_4 == 38)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetTrigger (base_12, channel_13(D), 0);

  <bb 4> :
  # DEBUG BEGIN_STMT
  _5 = (int) instance_10(D);
  _6 = (int) channel_13(D);
  Emios_Pwm_Ip_aCheckEnableNotif[_5][_6] = 0;
  # DEBUG BEGIN_STMT
  _7 = (int) instance_10(D);
  _8 = (int) channel_13(D);
  Emios_Pwm_Ip_aCheckState[_7][_8] = 0;
  return;

}


Emios_Pwm_Ip_InitChannel (uint8 instance, const struct Emios_Pwm_Ip_ChannelConfigType * userChCfg)
{
  uint8 channel;
  struct Emios_Pwm_Ip_HwAddrType * const base;
  int _1;
  int _2;
  struct Emios_Pwm_Ip_HwAddrType * _3;
  unsigned char _4;
  int _5;
  <unnamed type> _6;
  unsigned char _7;
  unsigned char _8;
  <unnamed type> _9;
  <unnamed type> _10;
  <unnamed type> _11;
  int _12;
  unsigned char _13;
  int _14;
  const struct Emios_Pwm_Ip_NotificationType * _15;
  unsigned char _16;
  <unnamed type> _17;
  int _18;
  <unnamed type> _19;
  unsigned char _20;
  <unnamed type> _21;
  unsigned char _22;
  <unnamed type> _23;
  unsigned char _24;
  int _25;
  unsigned char _26;
  int _27;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) instance_32(D);
  base_34 = Emios_Pwm_Ip_aBasePtr[_1];
  # DEBUG base => base_34
  # DEBUG BEGIN_STMT
  channel_36 = userChCfg_35(D)->channelId;
  # DEBUG channel => channel_36
  # DEBUG BEGIN_STMT
  _2 = (int) instance_32(D);
  _3 = Emios_Pwm_Ip_aBasePtr[_2];
  _4 = userChCfg_35(D)->channelId;
  _5 = (int) _4;
  _3->CH.UC[_5].C ={v} 0;
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetOutputUpdate (base_34, channel_36, 1);
  # DEBUG BEGIN_STMT
  _6 = userChCfg_35(D)->outputDisableSource;
  if (_6 != 255)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  # DEBUG BEGIN_STMT
  _7 = userChCfg_35(D)->channelId;
  Emios_Pwm_Ip_SetOutDisable (base_34, _7, 1);
  # DEBUG BEGIN_STMT
  _8 = userChCfg_35(D)->channelId;
  _9 = userChCfg_35(D)->outputDisableSource;
  Emios_Pwm_Ip_SetOutDisableSource (base_34, _8, _9);

  <bb 4> :
  # DEBUG BEGIN_STMT
  _10 = userChCfg_35(D)->irqMode;
  if (_10 != 0)
    goto <bb 5>; [INV]
  else
    goto <bb 8>; [INV]

  <bb 5> :
  # DEBUG BEGIN_STMT
  _11 = userChCfg_35(D)->irqMode;
  if (_11 == 1)
    goto <bb 6>; [INV]
  else
    goto <bb 7>; [INV]

  <bb 6> :
  # DEBUG BEGIN_STMT
  _12 = (int) instance_32(D);
  _13 = userChCfg_35(D)->channelId;
  _14 = (int) _13;
  _15 = &userChCfg_35(D)->userCallback;
  Emios_Pwm_Ip_aNotificationPtr[_12][_14] = _15;
  goto <bb 8>; [INV]

  <bb 7> :
  # DEBUG BEGIN_STMT
  _16 = userChCfg_35(D)->channelId;
  Emios_Pwm_Ip_SetDMARequest (base_34, _16, 1);

  <bb 8> :
  # DEBUG BEGIN_STMT
  _17 = userChCfg_35(D)->mode;
  _18 = (int) _17;
  switch (_18) <default: <L22> [INV], case 6 ... 7: <L16> [INV], case 38: <L15> [INV], case 88: <L7> [INV], case 90: <L7> [INV], case 92 ... 95: <L9> [INV], case 96: <L13> [INV], case 98: <L13> [INV]>

  <bb 9> :
<L7>:
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_InitPeriodDutyCycleMode (instance_32(D), userChCfg_35(D));
  # DEBUG BEGIN_STMT
  goto <bb 14>; [INV]

  <bb 10> :
<L9>:
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_InitDeadTimeMode (instance_32(D), userChCfg_35(D));
  # DEBUG BEGIN_STMT
  goto <bb 14>; [INV]

  <bb 11> :
<L13>:
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_InitEdgePlacementMode (instance_32(D), userChCfg_35(D));
  # DEBUG BEGIN_STMT
  goto <bb 14>; [INV]

  <bb 12> :
<L15>:
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_InitTriggerMode (instance_32(D), userChCfg_35(D));
  # DEBUG BEGIN_STMT
  goto <bb 14>; [INV]

  <bb 13> :
<L16>:
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_InitDoubleCompareMode (instance_32(D), userChCfg_35(D));
  # DEBUG BEGIN_STMT

  <bb 14> :
<L22>:
  # DEBUG BEGIN_STMT
  _19 = userChCfg_35(D)->internalPs;
  if (_19 != 255)
    goto <bb 15>; [INV]
  else
    goto <bb 16>; [INV]

  <bb 15> :
  # DEBUG BEGIN_STMT
  _20 = userChCfg_35(D)->channelId;
  _21 = userChCfg_35(D)->internalPs;
  Emios_Pwm_Ip_SetExtendedPrescaler (base_34, _20, _21);
  # DEBUG BEGIN_STMT
  _22 = userChCfg_35(D)->channelId;
  _23 = userChCfg_35(D)->internalPsSrc;
  Emios_Pwm_Ip_SetPrescalerSource (base_34, _22, _23);
  # DEBUG BEGIN_STMT
  _24 = userChCfg_35(D)->channelId;
  Emios_Pwm_Ip_SetPrescalerEnable (base_34, _24, 1);

  <bb 16> :
  # DEBUG BEGIN_STMT
  _25 = (int) instance_32(D);
  _26 = userChCfg_35(D)->channelId;
  _27 = (int) _26;
  Emios_Pwm_Ip_aCheckState[_25][_27] = 1;
  return;

}


Emios_Pwm_Ip_SetDutyCycleDaoc (uint8 instance, uint8 channel, uint16 newDutyCycle)
{
  uint16 counterMax;
  uint16 daocRegA;
  Emios_Pwm_Ip_StatusType ret;
  struct Emios_Pwm_Ip_HwAddrType * const base;
  int _1;
  unsigned char _2;
  int _3;
  int _4;
  short unsigned int _5;
  int _6;
  int _7;
  short unsigned int _8;
  int _9;
  int _10;
  short unsigned int _11;
  int _12;
  int _13;
  short unsigned int _14;
  int _15;
  int _16;
  unsigned char _17;
  _Bool _18;
  <unnamed type> _19;
  int _20;
  int _21;
  int _22;
  int _23;
  short unsigned int _24;
  int _25;
  int _26;
  int _27;
  int _28;
  short unsigned int _29;
  int _30;
  short unsigned int _31;
  int _32;
  int _33;
  int _34;
  int _35;
  int _36;
  int _37;
  unsigned char _38;
  _Bool _39;
  <unnamed type> _40;
  int _41;
  int _42;
  int _43;
  int _44;
  short unsigned int _45;
  int _46;
  int _47;
  unsigned char _48;
  _Bool _49;
  <unnamed type> _50;
  int _51;
  int _52;
  uint16 iftmp.9_54;
  uint16 iftmp.10_55;
  uint16 iftmp.9_79;
  uint16 iftmp.9_80;
  uint16 iftmp.10_82;
  uint16 iftmp.10_83;
  Emios_Pwm_Ip_StatusType _95;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) instance_57(D);
  base_59 = Emios_Pwm_Ip_aBasePtr[_1];
  # DEBUG base => base_59
  # DEBUG BEGIN_STMT
  ret_60 = 0;
  # DEBUG ret => ret_60
  # DEBUG BEGIN_STMT
  daocRegA_61 = 0;
  # DEBUG daocRegA => daocRegA_61
  # DEBUG BEGIN_STMT
  _2 = Emios_Pwm_Ip_GetMasterBusChannel (instance_57(D), channel_62(D));
  counterMax_65 = Emios_Pwm_Ip_GetUCRegA (base_59, _2);
  # DEBUG counterMax => counterMax_65
  # DEBUG BEGIN_STMT
  _3 = (int) instance_57(D);
  _4 = (int) channel_62(D);
  _5 = Emios_Pwm_Ip_aPeriod[_3][_4];
  if (newDutyCycle_66(D) > _5)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _6 = (int) instance_57(D);
  _7 = (int) channel_62(D);
  _8 = Emios_Pwm_Ip_aPeriod[_6][_7];
  if (_8 != 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  # DEBUG BEGIN_STMT
  ret_67 = 1;
  # DEBUG ret => ret_67
  goto <bb 17>; [INV]

  <bb 5> :
  # DEBUG BEGIN_STMT
  _9 = (int) instance_57(D);
  _10 = (int) channel_62(D);
  _11 = Emios_Pwm_Ip_aPeriod[_9][_10];
  if (_11 == 0)
    goto <bb 7>; [INV]
  else
    goto <bb 6>; [INV]

  <bb 6> :
  if (newDutyCycle_66(D) == 0)
    goto <bb 7>; [INV]
  else
    goto <bb 8>; [INV]

  <bb 7> :
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetInterruptRequest (base_59, channel_62(D), 0);
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_ClearFlagEvent (base_59, channel_62(D));
  # DEBUG BEGIN_STMT
  _12 = (int) instance_57(D);
  _13 = (int) channel_62(D);
  Emios_Pwm_Ip_aDaocDuty[_12][_13] = 0;
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetForceMatchB (base_59, channel_62(D), 1);
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetUCRegA (base_59, channel_62(D), 1);
  # DEBUG BEGIN_STMT
  _14 = newDutyCycle_66(D) + 1;
  Emios_Pwm_Ip_SetUCRegB (base_59, channel_62(D), _14);
  # DEBUG BEGIN_STMT
  _15 = (int) instance_57(D);
  _16 = (int) channel_62(D);
  _17 = Emios_Pwm_Ip_aPolarity[_15][_16];
  _18 = _17 == 1;
  _19 = (<unnamed type>) _18;
  Emios_Pwm_Ip_SetEdgePolarity (base_59, channel_62(D), _19);
  # DEBUG BEGIN_STMT
  _20 = (int) instance_57(D);
  _21 = (int) channel_62(D);
  Emios_Pwm_Ip_aNotif[_20][_21] = 1;
  goto <bb 17>; [INV]

  <bb 8> :
  # DEBUG BEGIN_STMT
  _22 = (int) instance_57(D);
  _23 = (int) channel_62(D);
  _24 = Emios_Pwm_Ip_aPeriod[_22][_23];
  if (newDutyCycle_66(D) == _24)
    goto <bb 9>; [INV]
  else
    goto <bb 16>; [INV]

  <bb 9> :
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetInterruptRequest (base_59, channel_62(D), 0);
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_ClearFlagEvent (base_59, channel_62(D));
  # DEBUG BEGIN_STMT
  _25 = (int) instance_57(D);
  _26 = (int) channel_62(D);
  Emios_Pwm_Ip_aDaocDuty[_25][_26] = 0;
  # DEBUG BEGIN_STMT
  _27 = (int) instance_57(D);
  _28 = (int) channel_62(D);
  _29 = Emios_Pwm_Ip_aPeriod[_27][_28];
  _30 = (int) _29;
  _31 = Emios_Pwm_Ip_GetUCRegA (base_59, channel_62(D));
  _32 = (int) _31;
  _33 = _30 + _32;
  _34 = (int) counterMax_65;
  _35 = _33 % _34;
  daocRegA_77 = (uint16) _35;
  # DEBUG daocRegA => daocRegA_77
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetForceMatchA (base_59, channel_62(D), 1);
  # DEBUG BEGIN_STMT
  if (daocRegA_77 == 0)
    goto <bb 10>; [INV]
  else
    goto <bb 11>; [INV]

  <bb 10> :
  iftmp.9_80 = counterMax_65;
  goto <bb 12>; [INV]

  <bb 11> :
  iftmp.9_79 = daocRegA_77;

  <bb 12> :
  # iftmp.9_54 = PHI <iftmp.9_80(10), iftmp.9_79(11)>
  Emios_Pwm_Ip_SetUCRegA (base_59, channel_62(D), iftmp.9_54);
  # DEBUG BEGIN_STMT
  if (daocRegA_77 == 0)
    goto <bb 13>; [INV]
  else
    goto <bb 14>; [INV]

  <bb 13> :
  iftmp.10_83 = counterMax_65;
  goto <bb 15>; [INV]

  <bb 14> :
  iftmp.10_82 = daocRegA_77;

  <bb 15> :
  # iftmp.10_55 = PHI <iftmp.10_83(13), iftmp.10_82(14)>
  Emios_Pwm_Ip_SetUCRegB (base_59, channel_62(D), iftmp.10_55);
  # DEBUG BEGIN_STMT
  _36 = (int) instance_57(D);
  _37 = (int) channel_62(D);
  _38 = Emios_Pwm_Ip_aPolarity[_36][_37];
  _39 = _38 != 1;
  _40 = (<unnamed type>) _39;
  Emios_Pwm_Ip_SetEdgePolarity (base_59, channel_62(D), _40);
  # DEBUG BEGIN_STMT
  _41 = (int) instance_57(D);
  _42 = (int) channel_62(D);
  Emios_Pwm_Ip_aNotif[_41][_42] = 1;
  goto <bb 17>; [INV]

  <bb 16> :
  # DEBUG BEGIN_STMT
  _43 = (int) instance_57(D);
  _44 = (int) channel_62(D);
  Emios_Pwm_Ip_aDaocDuty[_43][_44] = newDutyCycle_66(D);
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetUCRegA (base_59, channel_62(D), 1);
  # DEBUG BEGIN_STMT
  _45 = newDutyCycle_66(D) + 1;
  Emios_Pwm_Ip_SetUCRegB (base_59, channel_62(D), _45);
  # DEBUG BEGIN_STMT
  _46 = (int) instance_57(D);
  _47 = (int) channel_62(D);
  _48 = Emios_Pwm_Ip_aPolarity[_46][_47];
  _49 = _48 == 1;
  _50 = (<unnamed type>) _49;
  Emios_Pwm_Ip_SetEdgePolarity (base_59, channel_62(D), _50);
  # DEBUG BEGIN_STMT
  _51 = (int) instance_57(D);
  _52 = (int) channel_62(D);
  Emios_Pwm_Ip_aNotif[_51][_52] = 0;

  <bb 17> :
  # ret_53 = PHI <ret_67(4), ret_60(7), ret_60(15), ret_60(16)>
  # DEBUG ret => ret_53
  # DEBUG BEGIN_STMT
  _95 = ret_53;
  return _95;

}


Emios_Pwm_Ip_InitDoubleCompareMode (uint8 instance, const struct Emios_Pwm_Ip_ChannelConfigType * userChCfg)
{
  uint16 counterMax;
  uint16 daocRegA;
  struct Emios_Pwm_Ip_HwAddrType * const base;
  int _1;
  int _2;
  unsigned char _3;
  int _4;
  short unsigned int _5;
  <unnamed type> _6;
  int _7;
  unsigned char _8;
  int _9;
  unsigned char _10;
  unsigned char _11;
  unsigned char _12;
  unsigned char _13;
  <unnamed type> _14;
  short unsigned int _15;
  short unsigned int _16;
  unsigned char _17;
  <unnamed type> _18;
  _Bool _19;
  <unnamed type> _20;
  unsigned char _21;
  <unnamed type> _22;
  unsigned char _23;
  <unnamed type> _24;
  unsigned char _25;
  <unnamed type> _26;
  short unsigned int _27;
  int _28;
  unsigned char _29;
  int _30;
  unsigned char _31;
  unsigned char _32;
  unsigned char _33;
  short unsigned int _34;
  short unsigned int _35;
  unsigned char _36;
  <unnamed type> _37;
  int _38;
  unsigned char _39;
  int _40;
  short unsigned int _41;
  short unsigned int _42;
  int _43;
  unsigned char _44;
  int _45;
  short unsigned int _46;
  int _47;
  unsigned char _48;
  short unsigned int _49;
  int _50;
  int _51;
  int _52;
  int _53;
  int _54;
  unsigned char _55;
  int _56;
  unsigned char _57;
  unsigned char _58;
  unsigned char _59;
  unsigned char _60;
  <unnamed type> _61;
  _Bool _62;
  <unnamed type> _63;
  int _64;
  unsigned char _65;
  int _66;
  int _67;
  unsigned char _68;
  int _69;
  short unsigned int _70;
  unsigned char _71;
  unsigned char _72;
  short unsigned int _73;
  short unsigned int _74;
  unsigned char _75;
  <unnamed type> _76;
  int _77;
  unsigned char _78;
  int _79;
  uint8 iftmp.2_80;
  uint16 iftmp.3_81;
  uint16 iftmp.4_82;
  uint8 iftmp.2_90;
  uint8 iftmp.2_91;
  uint16 iftmp.3_113;
  uint16 iftmp.3_114;
  uint16 iftmp.4_116;
  uint16 iftmp.4_117;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) instance_85(D);
  base_87 = Emios_Pwm_Ip_aBasePtr[_1];
  # DEBUG base => base_87
  # DEBUG BEGIN_STMT
  _2 = (int) instance_85(D);
  _3 = userChCfg_88(D)->channelId;
  _4 = (int) _3;
  _5 = userChCfg_88(D)->periodCount;
  Emios_Pwm_Ip_aPeriod[_2][_4] = _5;
  # DEBUG BEGIN_STMT
  _6 = userChCfg_88(D)->outputPolarity;
  if (_6 == 1)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  iftmp.2_91 = 1;
  goto <bb 5>; [INV]

  <bb 4> :
  iftmp.2_90 = 0;

  <bb 5> :
  # iftmp.2_80 = PHI <iftmp.2_91(3), iftmp.2_90(4)>
  _7 = (int) instance_85(D);
  _8 = userChCfg_88(D)->channelId;
  _9 = (int) _8;
  Emios_Pwm_Ip_aPolarity[_7][_9] = iftmp.2_80;
  # DEBUG BEGIN_STMT
  daocRegA_93 = 0;
  # DEBUG daocRegA => daocRegA_93
  # DEBUG BEGIN_STMT
  _10 = userChCfg_88(D)->channelId;
  _11 = Emios_Pwm_Ip_GetMasterBusChannel (instance_85(D), _10);
  counterMax_96 = Emios_Pwm_Ip_GetUCRegA (base_87, _11);
  # DEBUG counterMax => counterMax_96
  # DEBUG BEGIN_STMT
  _12 = userChCfg_88(D)->channelId;
  Emios_Pwm_Ip_SetInterruptRequest (base_87, _12, 1);
  # DEBUG BEGIN_STMT
  _13 = userChCfg_88(D)->channelId;
  _14 = userChCfg_88(D)->timebase;
  Emios_Pwm_Ip_SetCounterBus (base_87, _13, _14);
  # DEBUG BEGIN_STMT
  _15 = userChCfg_88(D)->periodCount;
  _16 = userChCfg_88(D)->dutyCycle;
  if (_15 == _16)
    goto <bb 6>; [INV]
  else
    goto <bb 7>; [INV]

  <bb 6> :
  # DEBUG BEGIN_STMT
  _17 = userChCfg_88(D)->channelId;
  _18 = userChCfg_88(D)->outputPolarity;
  _19 = _18 != 1;
  _20 = (<unnamed type>) _19;
  Emios_Pwm_Ip_SetEdgePolarity (base_87, _17, _20);
  goto <bb 8>; [INV]

  <bb 7> :
  # DEBUG BEGIN_STMT
  _21 = userChCfg_88(D)->channelId;
  _22 = userChCfg_88(D)->outputPolarity;
  Emios_Pwm_Ip_SetEdgePolarity (base_87, _21, _22);

  <bb 8> :
  # DEBUG BEGIN_STMT
  _23 = userChCfg_88(D)->channelId;
  _24 = userChCfg_88(D)->mode;
  Emios_Pwm_Ip_SetPwmMode (base_87, _23, _24);
  # DEBUG BEGIN_STMT
  _25 = userChCfg_88(D)->channelId;
  _26 = userChCfg_88(D)->outputPolarity;
  Emios_Pwm_Ip_SetEdgePolarity (base_87, _25, _26);
  # DEBUG BEGIN_STMT
  _27 = userChCfg_88(D)->dutyCycle;
  if (_27 == 0)
    goto <bb 9>; [INV]
  else
    goto <bb 10>; [INV]

  <bb 9> :
  # DEBUG BEGIN_STMT
  daocRegA_121 = 1;
  # DEBUG daocRegA => daocRegA_121
  # DEBUG BEGIN_STMT
  _28 = (int) instance_85(D);
  _29 = userChCfg_88(D)->channelId;
  _30 = (int) _29;
  Emios_Pwm_Ip_aDaocDuty[_28][_30] = 0;
  # DEBUG BEGIN_STMT
  _31 = userChCfg_88(D)->channelId;
  Emios_Pwm_Ip_SetForceMatchB (base_87, _31, 1);
  # DEBUG BEGIN_STMT
  _32 = userChCfg_88(D)->channelId;
  Emios_Pwm_Ip_SetUCRegA (base_87, _32, daocRegA_121);
  # DEBUG BEGIN_STMT
  _33 = userChCfg_88(D)->channelId;
  _34 = userChCfg_88(D)->dutyCycle;
  _35 = _34 + 1;
  Emios_Pwm_Ip_SetUCRegB (base_87, _33, _35);
  # DEBUG BEGIN_STMT
  _36 = userChCfg_88(D)->channelId;
  _37 = userChCfg_88(D)->outputPolarity;
  Emios_Pwm_Ip_SetEdgePolarity (base_87, _36, _37);
  # DEBUG BEGIN_STMT
  _38 = (int) instance_85(D);
  _39 = userChCfg_88(D)->channelId;
  _40 = (int) _39;
  Emios_Pwm_Ip_aNotif[_38][_40] = 1;
  goto <bb 19>; [INV]

  <bb 10> :
  # DEBUG BEGIN_STMT
  _41 = userChCfg_88(D)->dutyCycle;
  _42 = userChCfg_88(D)->periodCount;
  if (_41 == _42)
    goto <bb 11>; [INV]
  else
    goto <bb 18>; [INV]

  <bb 11> :
  # DEBUG BEGIN_STMT
  _43 = (int) instance_85(D);
  _44 = userChCfg_88(D)->channelId;
  _45 = (int) _44;
  _46 = Emios_Pwm_Ip_aPeriod[_43][_45];
  _47 = (int) _46;
  _48 = userChCfg_88(D)->channelId;
  _49 = Emios_Pwm_Ip_GetUCRegA (base_87, _48);
  _50 = (int) _49;
  _51 = _47 + _50;
  _52 = (int) counterMax_96;
  _53 = _51 % _52;
  daocRegA_110 = (uint16) _53;
  # DEBUG daocRegA => daocRegA_110
  # DEBUG BEGIN_STMT
  _54 = (int) instance_85(D);
  _55 = userChCfg_88(D)->channelId;
  _56 = (int) _55;
  Emios_Pwm_Ip_aDaocDuty[_54][_56] = 0;
  # DEBUG BEGIN_STMT
  _57 = userChCfg_88(D)->channelId;
  Emios_Pwm_Ip_SetForceMatchA (base_87, _57, 1);
  # DEBUG BEGIN_STMT
  _58 = userChCfg_88(D)->channelId;
  if (daocRegA_110 == 0)
    goto <bb 12>; [INV]
  else
    goto <bb 13>; [INV]

  <bb 12> :
  iftmp.3_114 = counterMax_96;
  goto <bb 14>; [INV]

  <bb 13> :
  iftmp.3_113 = daocRegA_110;

  <bb 14> :
  # iftmp.3_81 = PHI <iftmp.3_114(12), iftmp.3_113(13)>
  Emios_Pwm_Ip_SetUCRegA (base_87, _58, iftmp.3_81);
  # DEBUG BEGIN_STMT
  _59 = userChCfg_88(D)->channelId;
  if (daocRegA_110 == 0)
    goto <bb 15>; [INV]
  else
    goto <bb 16>; [INV]

  <bb 15> :
  iftmp.4_117 = counterMax_96;
  goto <bb 17>; [INV]

  <bb 16> :
  iftmp.4_116 = daocRegA_110;

  <bb 17> :
  # iftmp.4_82 = PHI <iftmp.4_117(15), iftmp.4_116(16)>
  Emios_Pwm_Ip_SetUCRegB (base_87, _59, iftmp.4_82);
  # DEBUG BEGIN_STMT
  _60 = userChCfg_88(D)->channelId;
  _61 = userChCfg_88(D)->outputPolarity;
  _62 = _61 != 1;
  _63 = (<unnamed type>) _62;
  Emios_Pwm_Ip_SetEdgePolarity (base_87, _60, _63);
  # DEBUG BEGIN_STMT
  _64 = (int) instance_85(D);
  _65 = userChCfg_88(D)->channelId;
  _66 = (int) _65;
  Emios_Pwm_Ip_aNotif[_64][_66] = 1;
  goto <bb 19>; [INV]

  <bb 18> :
  # DEBUG BEGIN_STMT
  daocRegA_103 = 1;
  # DEBUG daocRegA => daocRegA_103
  # DEBUG BEGIN_STMT
  _67 = (int) instance_85(D);
  _68 = userChCfg_88(D)->channelId;
  _69 = (int) _68;
  _70 = userChCfg_88(D)->dutyCycle;
  Emios_Pwm_Ip_aDaocDuty[_67][_69] = _70;
  # DEBUG BEGIN_STMT
  _71 = userChCfg_88(D)->channelId;
  Emios_Pwm_Ip_SetUCRegA (base_87, _71, daocRegA_103);
  # DEBUG BEGIN_STMT
  _72 = userChCfg_88(D)->channelId;
  _73 = userChCfg_88(D)->dutyCycle;
  _74 = _73 + 1;
  Emios_Pwm_Ip_SetUCRegB (base_87, _72, _74);
  # DEBUG BEGIN_STMT
  _75 = userChCfg_88(D)->channelId;
  _76 = userChCfg_88(D)->outputPolarity;
  Emios_Pwm_Ip_SetEdgePolarity (base_87, _75, _76);
  # DEBUG BEGIN_STMT
  _77 = (int) instance_85(D);
  _78 = userChCfg_88(D)->channelId;
  _79 = (int) _78;
  Emios_Pwm_Ip_aNotif[_77][_79] = 0;

  <bb 19> :
  return;

}


Emios_Pwm_Ip_SetDutyCycleOpwmt (uint8 instance, uint8 channel, uint16 newDutyCycle)
{
  uint16 chPeriod;
  Emios_Pwm_Ip_StatusType ret;
  struct Emios_Pwm_Ip_HwAddrType * const base;
  int _1;
  <unnamed type> _2;
  short unsigned int _3;
  int _4;
  int _5;
  int _6;
  int _7;
  short unsigned int _8;
  int _9;
  int _10;
  int _11;
  int _12;
  short unsigned int _13;
  int _14;
  int _15;
  int _16;
  int _17;
  int _18;
  short unsigned int _19;
  int _20;
  int _21;
  int _22;
  int _23;
  unsigned char _24;
  _Bool _25;
  Emios_Pwm_Ip_StatusType _49;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) instance_28(D);
  base_30 = Emios_Pwm_Ip_aBasePtr[_1];
  # DEBUG base => base_30
  # DEBUG BEGIN_STMT
  ret_31 = 0;
  # DEBUG ret => ret_31
  # DEBUG BEGIN_STMT
  _2 = Emios_Pwm_Ip_GetCounterBus (base_30, channel_32(D));
  chPeriod_35 = Emios_Pwm_Ip_GetCounterBusPeriod (instance_28(D), channel_32(D), _2);
  # DEBUG chPeriod => chPeriod_35
  # DEBUG BEGIN_STMT
  if (newDutyCycle_36(D) > chPeriod_35)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  # DEBUG BEGIN_STMT
  ret_48 = 1;
  # DEBUG ret => ret_48
  goto <bb 9>; [INV]

  <bb 4> :
  # DEBUG BEGIN_STMT
  if (chPeriod_35 == newDutyCycle_36(D))
    goto <bb 5>; [INV]
  else
    goto <bb 6>; [INV]

  <bb 5> :
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetInterruptRequest (base_30, channel_32(D), 0);
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_ClearFlagEvent (base_30, channel_32(D));
  # DEBUG BEGIN_STMT
  _3 = newDutyCycle_36(D) + 1;
  Emios_Pwm_Ip_SetUCRegB (base_30, channel_32(D), _3);
  # DEBUG BEGIN_STMT
  _4 = (int) instance_28(D);
  _5 = (int) channel_32(D);
  Emios_Pwm_Ip_aNotif[_4][_5] = 1;
  goto <bb 9>; [INV]

  <bb 6> :
  # DEBUG BEGIN_STMT
  if (newDutyCycle_36(D) == 0)
    goto <bb 7>; [INV]
  else
    goto <bb 8>; [INV]

  <bb 7> :
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetInterruptRequest (base_30, channel_32(D), 0);
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_ClearFlagEvent (base_30, channel_32(D));
  # DEBUG BEGIN_STMT
  _6 = (int) instance_28(D);
  _7 = (int) channel_32(D);
  _8 = Emios_Pwm_Ip_aRegA[_6][_7];
  Emios_Pwm_Ip_SetUCRegB (base_30, channel_32(D), _8);
  # DEBUG BEGIN_STMT
  _9 = (int) instance_28(D);
  _10 = (int) channel_32(D);
  Emios_Pwm_Ip_aNotif[_9][_10] = 1;
  goto <bb 9>; [INV]

  <bb 8> :
  # DEBUG BEGIN_STMT
  _11 = (int) instance_28(D);
  _12 = (int) channel_32(D);
  _13 = Emios_Pwm_Ip_aRegA[_11][_12];
  _14 = (int) _13;
  _15 = (int) newDutyCycle_36(D);
  _16 = _14 + _15;
  _17 = (int) chPeriod_35;
  _18 = _16 % _17;
  _19 = (short unsigned int) _18;
  Emios_Pwm_Ip_SetUCRegB (base_30, channel_32(D), _19);
  # DEBUG BEGIN_STMT
  _20 = (int) instance_28(D);
  _21 = (int) channel_32(D);
  Emios_Pwm_Ip_aNotif[_20][_21] = 0;
  # DEBUG BEGIN_STMT
  _22 = (int) instance_28(D);
  _23 = (int) channel_32(D);
  _24 = Emios_Pwm_Ip_aCheckEnableNotif[_22][_23];
  _25 = _24 != 0;
  Emios_Pwm_Ip_SetInterruptRequest (base_30, channel_32(D), _25);

  <bb 9> :
  # ret_26 = PHI <ret_48(3), ret_31(5), ret_31(7), ret_31(8)>
  # DEBUG ret => ret_26
  # DEBUG BEGIN_STMT
  _49 = ret_26;
  return _49;

}


Emios_Pwm_Ip_InitTriggerMode (uint8 instance, const struct Emios_Pwm_Ip_ChannelConfigType * userChCfg)
{
  uint8 counterStart;
  uint16 trailingEdge;
  uint16 counterBusPeriod;
  struct Emios_Pwm_Ip_HwAddrType * const base;
  int _1;
  unsigned char _2;
  <unnamed type> _3;
  unsigned char _4;
  <unnamed type> _5;
  <unnamed type> _6;
  short unsigned int _7;
  short unsigned int _8;
  int _9;
  unsigned char _10;
  int _11;
  short unsigned int _12;
  int _13;
  unsigned char _14;
  int _15;
  short unsigned int _16;
  int _17;
  short unsigned int _18;
  int _19;
  int _20;
  int _21;
  int _22;
  int _23;
  unsigned char _24;
  int _25;
  short unsigned int _26;
  short unsigned int _27;
  int _28;
  unsigned char _29;
  int _30;
  short unsigned int _31;
  unsigned char _32;
  <unnamed type> _33;
  unsigned char _34;
  short unsigned int _35;
  short unsigned int _36;
  short unsigned int _37;
  unsigned char _38;
  short unsigned int _39;
  short unsigned int _40;
  unsigned char _41;
  short unsigned int _42;
  short unsigned int _43;
  short unsigned int _44;
  short unsigned int _45;
  unsigned char _46;
  <unnamed type> _47;
  _Bool _48;
  <unnamed type> _49;
  unsigned char _50;
  <unnamed type> _51;
  unsigned char _52;
  <unnamed type> _53;
  unsigned char _54;
  <unnamed type> _55;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) instance_60(D);
  base_62 = Emios_Pwm_Ip_aBasePtr[_1];
  # DEBUG base => base_62
  # DEBUG BEGIN_STMT
  _2 = userChCfg_63(D)->channelId;
  _3 = userChCfg_63(D)->timebase;
  counterBusPeriod_65 = Emios_Pwm_Ip_GetCounterBusPeriod (instance_60(D), _2, _3);
  # DEBUG counterBusPeriod => counterBusPeriod_65
  # DEBUG BEGIN_STMT
  trailingEdge_66 = 0;
  # DEBUG trailingEdge => trailingEdge_66
  # DEBUG BEGIN_STMT
  counterStart_67 = 0;
  # DEBUG counterStart => counterStart_67
  # DEBUG BEGIN_STMT
  _4 = userChCfg_63(D)->channelId;
  _5 = userChCfg_63(D)->timebase;
  _6 = Emios_Pwm_Ip_GetCounterBusMode (instance_60(D), _4, _5);
  if (_6 == 80)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  # DEBUG BEGIN_STMT
  counterStart_70 = 1;
  # DEBUG counterStart => counterStart_70
  goto <bb 5>; [INV]

  <bb 4> :
  # DEBUG BEGIN_STMT
  counterStart_69 = 0;
  # DEBUG counterStart => counterStart_69

  <bb 5> :
  # counterStart_57 = PHI <counterStart_70(3), counterStart_69(4)>
  # DEBUG counterStart => counterStart_57
  # DEBUG BEGIN_STMT
  _7 = userChCfg_63(D)->dutyCycle;
  if (counterBusPeriod_65 == _7)
    goto <bb 6>; [INV]
  else
    goto <bb 7>; [INV]

  <bb 6> :
  # DEBUG BEGIN_STMT
  _8 = userChCfg_63(D)->dutyCycle;
  trailingEdge_75 = _8 + 1;
  # DEBUG trailingEdge => trailingEdge_75
  # DEBUG BEGIN_STMT
  _9 = (int) instance_60(D);
  _10 = userChCfg_63(D)->channelId;
  _11 = (int) _10;
  Emios_Pwm_Ip_aNotif[_9][_11] = 1;
  goto <bb 10>; [INV]

  <bb 7> :
  # DEBUG BEGIN_STMT
  _12 = userChCfg_63(D)->dutyCycle;
  if (_12 == 0)
    goto <bb 8>; [INV]
  else
    goto <bb 9>; [INV]

  <bb 8> :
  # DEBUG BEGIN_STMT
  trailingEdge_73 = userChCfg_63(D)->phaseShift;
  # DEBUG trailingEdge => trailingEdge_73
  # DEBUG BEGIN_STMT
  _13 = (int) instance_60(D);
  _14 = userChCfg_63(D)->channelId;
  _15 = (int) _14;
  Emios_Pwm_Ip_aNotif[_13][_15] = 1;
  goto <bb 10>; [INV]

  <bb 9> :
  # DEBUG BEGIN_STMT
  _16 = userChCfg_63(D)->phaseShift;
  _17 = (int) _16;
  _18 = userChCfg_63(D)->dutyCycle;
  _19 = (int) _18;
  _20 = _17 + _19;
  _21 = (int) counterBusPeriod_65;
  _22 = _20 % _21;
  trailingEdge_71 = (uint16) _22;
  # DEBUG trailingEdge => trailingEdge_71
  # DEBUG BEGIN_STMT
  _23 = (int) instance_60(D);
  _24 = userChCfg_63(D)->channelId;
  _25 = (int) _24;
  Emios_Pwm_Ip_aNotif[_23][_25] = 0;

  <bb 10> :
  # trailingEdge_56 = PHI <trailingEdge_75(6), trailingEdge_73(8), trailingEdge_71(9)>
  # DEBUG trailingEdge => trailingEdge_56
  # DEBUG BEGIN_STMT
  _26 = userChCfg_63(D)->phaseShift;
  _27 = (short unsigned int) counterStart_57;
  _28 = (int) instance_60(D);
  _29 = userChCfg_63(D)->channelId;
  _30 = (int) _29;
  _31 = _26 + _27;
  Emios_Pwm_Ip_aRegA[_28][_30] = _31;
  # DEBUG BEGIN_STMT
  _32 = userChCfg_63(D)->channelId;
  _33 = userChCfg_63(D)->timebase;
  Emios_Pwm_Ip_SetCounterBus (base_62, _32, _33);
  # DEBUG BEGIN_STMT
  _34 = userChCfg_63(D)->channelId;
  _35 = userChCfg_63(D)->phaseShift;
  _36 = (short unsigned int) counterStart_57;
  _37 = _35 + _36;
  Emios_Pwm_Ip_SetUCRegA (base_62, _34, _37);
  # DEBUG BEGIN_STMT
  _38 = userChCfg_63(D)->channelId;
  _39 = (short unsigned int) counterStart_57;
  _40 = trailingEdge_56 + _39;
  Emios_Pwm_Ip_SetUCRegB (base_62, _38, _40);
  # DEBUG BEGIN_STMT
  _41 = userChCfg_63(D)->channelId;
  _42 = userChCfg_63(D)->triggerPosition;
  _43 = (short unsigned int) counterStart_57;
  _44 = _42 + _43;
  Emios_Pwm_Ip_SetTrigger (base_62, _41, _44);
  # DEBUG BEGIN_STMT
  _45 = userChCfg_63(D)->dutyCycle;
  if (counterBusPeriod_65 == _45)
    goto <bb 11>; [INV]
  else
    goto <bb 12>; [INV]

  <bb 11> :
  # DEBUG BEGIN_STMT
  _46 = userChCfg_63(D)->channelId;
  _47 = userChCfg_63(D)->outputPolarity;
  _48 = _47 != 1;
  _49 = (<unnamed type>) _48;
  Emios_Pwm_Ip_SetEdgePolarity (base_62, _46, _49);
  goto <bb 13>; [INV]

  <bb 12> :
  # DEBUG BEGIN_STMT
  _50 = userChCfg_63(D)->channelId;
  _51 = userChCfg_63(D)->outputPolarity;
  Emios_Pwm_Ip_SetEdgePolarity (base_62, _50, _51);

  <bb 13> :
  # DEBUG BEGIN_STMT
  _52 = userChCfg_63(D)->channelId;
  _53 = userChCfg_63(D)->mode;
  Emios_Pwm_Ip_SetPwmMode (base_62, _52, _53);
  # DEBUG BEGIN_STMT
  _54 = userChCfg_63(D)->channelId;
  _55 = userChCfg_63(D)->outputPolarity;
  Emios_Pwm_Ip_SetEdgePolarity (base_62, _54, _55);
  return;

}


Emios_Pwm_Ip_SetDutyCycleOpwmb (uint8 instance, uint8 channel, uint16 newDutyCycle)
{
  uint16 chPeriod;
  Emios_Pwm_Ip_StatusType ret;
  struct Emios_Pwm_Ip_HwAddrType * const base;
  int _1;
  <unnamed type> _2;
  int _3;
  int _4;
  int _5;
  short unsigned int _6;
  int _7;
  int _8;
  int _9;
  int _10;
  int _11;
  int _12;
  int _13;
  int _14;
  int _15;
  int _16;
  int _17;
  unsigned char _18;
  _Bool _19;
  int _20;
  int _21;
  short unsigned int _22;
  short unsigned int _23;
  Emios_Pwm_Ip_StatusType _46;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) instance_27(D);
  base_29 = Emios_Pwm_Ip_aBasePtr[_1];
  # DEBUG base => base_29
  # DEBUG BEGIN_STMT
  ret_30 = 0;
  # DEBUG ret => ret_30
  # DEBUG BEGIN_STMT
  _2 = Emios_Pwm_Ip_GetCounterBus (base_29, channel_31(D));
  chPeriod_34 = Emios_Pwm_Ip_GetCounterBusPeriod (instance_27(D), channel_31(D), _2);
  # DEBUG chPeriod => chPeriod_34
  # DEBUG BEGIN_STMT
  _3 = (int) newDutyCycle_35(D);
  _4 = (int) instance_27(D);
  _5 = (int) channel_31(D);
  _6 = Emios_Pwm_Ip_aRegA[_4][_5];
  _7 = (int) _6;
  _8 = _3 + _7;
  _9 = (int) chPeriod_34;
  if (_8 > _9)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  # DEBUG BEGIN_STMT
  ret_45 = 1;
  # DEBUG ret => ret_45
  goto <bb 10>; [INV]

  <bb 4> :
  # DEBUG BEGIN_STMT
  if (newDutyCycle_35(D) == 0)
    goto <bb 5>; [INV]
  else
    goto <bb 6>; [INV]

  <bb 5> :
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetInterruptRequest (base_29, channel_31(D), 0);
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_ClearFlagEvent (base_29, channel_31(D));
  # DEBUG BEGIN_STMT
  _10 = (int) instance_27(D);
  _11 = (int) channel_31(D);
  Emios_Pwm_Ip_aNotif[_10][_11] = 1;
  goto <bb 9>; [INV]

  <bb 6> :
  # DEBUG BEGIN_STMT
  if (newDutyCycle_35(D) == chPeriod_34)
    goto <bb 7>; [INV]
  else
    goto <bb 8>; [INV]

  <bb 7> :
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetInterruptRequest (base_29, channel_31(D), 0);
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_ClearFlagEvent (base_29, channel_31(D));
  # DEBUG BEGIN_STMT
  _12 = (int) instance_27(D);
  _13 = (int) channel_31(D);
  Emios_Pwm_Ip_aNotif[_12][_13] = 1;
  goto <bb 9>; [INV]

  <bb 8> :
  # DEBUG BEGIN_STMT
  _14 = (int) instance_27(D);
  _15 = (int) channel_31(D);
  Emios_Pwm_Ip_aNotif[_14][_15] = 0;
  # DEBUG BEGIN_STMT
  _16 = (int) instance_27(D);
  _17 = (int) channel_31(D);
  _18 = Emios_Pwm_Ip_aCheckEnableNotif[_16][_17];
  _19 = _18 != 0;
  Emios_Pwm_Ip_SetInterruptRequest (base_29, channel_31(D), _19);

  <bb 9> :
  # DEBUG BEGIN_STMT
  _20 = (int) instance_27(D);
  _21 = (int) channel_31(D);
  _22 = Emios_Pwm_Ip_aRegA[_20][_21];
  _23 = newDutyCycle_35(D) + _22;
  Emios_Pwm_Ip_SetUCRegB (base_29, channel_31(D), _23);

  <bb 10> :
  # ret_24 = PHI <ret_45(3), ret_30(9)>
  # DEBUG ret => ret_24
  # DEBUG BEGIN_STMT
  _46 = ret_24;
  return _46;

}


Emios_Pwm_Ip_InitEdgePlacementMode (uint8 instance, const struct Emios_Pwm_Ip_ChannelConfigType * userChCfg)
{
  struct Emios_Pwm_Ip_HwAddrType * const base;
  int _1;
  int _2;
  unsigned char _3;
  int _4;
  short unsigned int _5;
  unsigned char _6;
  <unnamed type> _7;
  unsigned char _8;
  short unsigned int _9;
  unsigned char _10;
  short unsigned int _11;
  short unsigned int _12;
  short unsigned int _13;
  unsigned char _14;
  <unnamed type> _15;
  unsigned char _16;
  <unnamed type> _17;
  short unsigned int _18;
  short unsigned int _19;
  int _20;
  unsigned char _21;
  int _22;
  short unsigned int _23;
  int _24;
  unsigned char _25;
  int _26;
  int _27;
  unsigned char _28;
  int _29;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) instance_31(D);
  base_33 = Emios_Pwm_Ip_aBasePtr[_1];
  # DEBUG base => base_33
  # DEBUG BEGIN_STMT
  _2 = (int) instance_31(D);
  _3 = userChCfg_34(D)->channelId;
  _4 = (int) _3;
  _5 = userChCfg_34(D)->phaseShift;
  Emios_Pwm_Ip_aRegA[_2][_4] = _5;
  # DEBUG BEGIN_STMT
  _6 = userChCfg_34(D)->channelId;
  _7 = userChCfg_34(D)->timebase;
  Emios_Pwm_Ip_SetCounterBus (base_33, _6, _7);
  # DEBUG BEGIN_STMT
  _8 = userChCfg_34(D)->channelId;
  _9 = userChCfg_34(D)->phaseShift;
  Emios_Pwm_Ip_SetUCRegA (base_33, _8, _9);
  # DEBUG BEGIN_STMT
  _10 = userChCfg_34(D)->channelId;
  _11 = userChCfg_34(D)->phaseShift;
  _12 = userChCfg_34(D)->dutyCycle;
  _13 = _11 + _12;
  Emios_Pwm_Ip_SetUCRegB (base_33, _10, _13);
  # DEBUG BEGIN_STMT
  _14 = userChCfg_34(D)->channelId;
  _15 = userChCfg_34(D)->mode;
  Emios_Pwm_Ip_SetPwmMode (base_33, _14, _15);
  # DEBUG BEGIN_STMT
  _16 = userChCfg_34(D)->channelId;
  _17 = userChCfg_34(D)->outputPolarity;
  Emios_Pwm_Ip_SetEdgePolarity (base_33, _16, _17);
  # DEBUG BEGIN_STMT
  _18 = userChCfg_34(D)->periodCount;
  _19 = userChCfg_34(D)->dutyCycle;
  if (_18 == _19)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  # DEBUG BEGIN_STMT
  _20 = (int) instance_31(D);
  _21 = userChCfg_34(D)->channelId;
  _22 = (int) _21;
  Emios_Pwm_Ip_aNotif[_20][_22] = 1;
  goto <bb 7>; [INV]

  <bb 4> :
  # DEBUG BEGIN_STMT
  _23 = userChCfg_34(D)->dutyCycle;
  if (_23 <= 1)
    goto <bb 5>; [INV]
  else
    goto <bb 6>; [INV]

  <bb 5> :
  # DEBUG BEGIN_STMT
  _24 = (int) instance_31(D);
  _25 = userChCfg_34(D)->channelId;
  _26 = (int) _25;
  Emios_Pwm_Ip_aNotif[_24][_26] = 1;
  goto <bb 7>; [INV]

  <bb 6> :
  # DEBUG BEGIN_STMT
  _27 = (int) instance_31(D);
  _28 = userChCfg_34(D)->channelId;
  _29 = (int) _28;
  Emios_Pwm_Ip_aNotif[_27][_29] = 0;

  <bb 7> :
  return;

}


Emios_Pwm_Ip_SetDutyCycleOpwmcb (uint8 instance, uint8 channel, uint16 newDutyCycle)
{
  uint16 chPeriod;
  Emios_Pwm_Ip_PwmModeType chMode;
  Emios_Pwm_Ip_StatusType ret;
  struct Emios_Pwm_Ip_HwAddrType * const base;
  int _1;
  <unnamed type> _2;
  unsigned int _3;
  unsigned int _4;
  unsigned int _5;
  unsigned int _6;
  short unsigned int _7;
  int _8;
  int _9;
  short unsigned int _10;
  unsigned int _11;
  unsigned int _12;
  unsigned int _13;
  unsigned int _14;
  int _15;
  int _16;
  short unsigned int _17;
  short unsigned int _18;
  int _19;
  int _20;
  int _21;
  int _22;
  unsigned char _23;
  _Bool _24;
  Emios_Pwm_Ip_StatusType _53;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) instance_27(D);
  base_29 = Emios_Pwm_Ip_aBasePtr[_1];
  # DEBUG base => base_29
  # DEBUG BEGIN_STMT
  ret_30 = 0;
  # DEBUG ret => ret_30
  # DEBUG BEGIN_STMT
  chMode_33 = Emios_Pwm_Ip_GetPwmMode (base_29, channel_31(D));
  # DEBUG chMode => chMode_33
  # DEBUG BEGIN_STMT
  _2 = Emios_Pwm_Ip_GetCounterBus (base_29, channel_31(D));
  chPeriod_36 = Emios_Pwm_Ip_GetCounterBusPeriod (instance_27(D), channel_31(D), _2);
  # DEBUG chPeriod => chPeriod_36
  # DEBUG BEGIN_STMT
  _3 = (unsigned int) newDutyCycle_37(D);
  _4 = (unsigned int) chPeriod_36;
  _5 = _4 + 2147483647;
  _6 = _5 * 2;
  if (_3 > _6)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  # DEBUG BEGIN_STMT
  ret_52 = 1;
  # DEBUG ret => ret_52
  goto <bb 13>; [INV]

  <bb 4> :
  # DEBUG BEGIN_STMT
  if (newDutyCycle_37(D) == 0)
    goto <bb 5>; [INV]
  else
    goto <bb 10>; [INV]

  <bb 5> :
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetInterruptRequest (base_29, channel_31(D), 0);
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_ClearFlagEvent (base_29, channel_31(D));
  # DEBUG BEGIN_STMT
  _7 = chPeriod_36 + 1;
  Emios_Pwm_Ip_SetUCRegA (base_29, channel_31(D), _7);
  # DEBUG BEGIN_STMT
  _8 = (int) instance_27(D);
  _9 = (int) channel_31(D);
  Emios_Pwm_Ip_aNotif[_8][_9] = 1;
  # DEBUG BEGIN_STMT
  _10 = Emios_Pwm_Ip_GetUCRegA (base_29, channel_31(D));
  if (_10 == 1)
    goto <bb 6>; [INV]
  else
    goto <bb 13>; [INV]

  <bb 6> :
  # DEBUG BEGIN_STMT
  if (chMode_33 == 92)
    goto <bb 8>; [INV]
  else
    goto <bb 7>; [INV]

  <bb 7> :
  if (chMode_33 == 94)
    goto <bb 8>; [INV]
  else
    goto <bb 9>; [INV]

  <bb 8> :
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetForceMatchB (base_29, channel_31(D), 1);
  goto <bb 13>; [INV]

  <bb 9> :
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetForceMatchA (base_29, channel_31(D), 1);
  goto <bb 13>; [INV]

  <bb 10> :
  # DEBUG BEGIN_STMT
  _11 = (unsigned int) newDutyCycle_37(D);
  _12 = (unsigned int) chPeriod_36;
  _13 = _12 + 2147483647;
  _14 = _13 * 2;
  if (_11 == _14)
    goto <bb 11>; [INV]
  else
    goto <bb 12>; [INV]

  <bb 11> :
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetInterruptRequest (base_29, channel_31(D), 0);
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_ClearFlagEvent (base_29, channel_31(D));
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetUCRegA (base_29, channel_31(D), 1);
  # DEBUG BEGIN_STMT
  _15 = (int) instance_27(D);
  _16 = (int) channel_31(D);
  Emios_Pwm_Ip_aNotif[_15][_16] = 1;
  goto <bb 13>; [INV]

  <bb 12> :
  # DEBUG BEGIN_STMT
  _17 = newDutyCycle_37(D) >> 1;
  _18 = chPeriod_36 - _17;
  Emios_Pwm_Ip_SetUCRegA (base_29, channel_31(D), _18);
  # DEBUG BEGIN_STMT
  _19 = (int) instance_27(D);
  _20 = (int) channel_31(D);
  Emios_Pwm_Ip_aNotif[_19][_20] = 0;
  # DEBUG BEGIN_STMT
  _21 = (int) instance_27(D);
  _22 = (int) channel_31(D);
  _23 = Emios_Pwm_Ip_aCheckEnableNotif[_21][_22];
  _24 = _23 != 0;
  Emios_Pwm_Ip_SetInterruptRequest (base_29, channel_31(D), _24);

  <bb 13> :
  # ret_25 = PHI <ret_52(3), ret_30(8), ret_30(11), ret_30(12), ret_30(5), ret_30(9)>
  # DEBUG ret => ret_25
  # DEBUG BEGIN_STMT
  _53 = ret_25;
  return _53;

}


Emios_Pwm_Ip_InitDeadTimeMode (uint8 instance, const struct Emios_Pwm_Ip_ChannelConfigType * userChCfg)
{
  uint16 dutyCycle;
  struct Emios_Pwm_Ip_HwAddrType * const base;
  int _1;
  short unsigned int _2;
  short unsigned int _3;
  int _4;
  unsigned char _5;
  int _6;
  short unsigned int _7;
  unsigned char _8;
  <unnamed type> _9;
  short unsigned int _10;
  int _11;
  unsigned char _12;
  int _13;
  short unsigned int _14;
  unsigned char _15;
  <unnamed type> _16;
  short unsigned int _17;
  int _18;
  unsigned char _19;
  int _20;
  unsigned char _21;
  <unnamed type> _22;
  unsigned char _23;
  unsigned char _24;
  short unsigned int _25;
  short unsigned int _26;
  short unsigned int _27;
  unsigned char _28;
  <unnamed type> _29;
  _Bool _30;
  <unnamed type> _31;
  unsigned char _32;
  <unnamed type> _33;
  unsigned char _34;
  <unnamed type> _35;
  unsigned char _36;
  <unnamed type> _37;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) instance_41(D);
  base_43 = Emios_Pwm_Ip_aBasePtr[_1];
  # DEBUG base => base_43
  # DEBUG BEGIN_STMT
  dutyCycle_44 = 0;
  # DEBUG dutyCycle => dutyCycle_44
  # DEBUG BEGIN_STMT
  _2 = userChCfg_45(D)->periodCount;
  _3 = userChCfg_45(D)->dutyCycle;
  if (_2 == _3)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  # DEBUG BEGIN_STMT
  dutyCycle_53 = 1;
  # DEBUG dutyCycle => dutyCycle_53
  # DEBUG BEGIN_STMT
  _4 = (int) instance_41(D);
  _5 = userChCfg_45(D)->channelId;
  _6 = (int) _5;
  Emios_Pwm_Ip_aNotif[_4][_6] = 1;
  goto <bb 7>; [INV]

  <bb 4> :
  # DEBUG BEGIN_STMT
  _7 = userChCfg_45(D)->dutyCycle;
  if (_7 <= 1)
    goto <bb 5>; [INV]
  else
    goto <bb 6>; [INV]

  <bb 5> :
  # DEBUG BEGIN_STMT
  _8 = userChCfg_45(D)->channelId;
  _9 = userChCfg_45(D)->timebase;
  _10 = Emios_Pwm_Ip_GetCounterBusPeriod (instance_41(D), _8, _9);
  dutyCycle_51 = _10 + 1;
  # DEBUG dutyCycle => dutyCycle_51
  # DEBUG BEGIN_STMT
  _11 = (int) instance_41(D);
  _12 = userChCfg_45(D)->channelId;
  _13 = (int) _12;
  Emios_Pwm_Ip_aNotif[_11][_13] = 1;
  goto <bb 7>; [INV]

  <bb 6> :
  # DEBUG BEGIN_STMT
  _14 = userChCfg_45(D)->dutyCycle;
  dutyCycle_46 = _14 >> 1;
  # DEBUG dutyCycle => dutyCycle_46
  # DEBUG BEGIN_STMT
  _15 = userChCfg_45(D)->channelId;
  _16 = userChCfg_45(D)->timebase;
  _17 = Emios_Pwm_Ip_GetCounterBusPeriod (instance_41(D), _15, _16);
  dutyCycle_48 = _17 - dutyCycle_46;
  # DEBUG dutyCycle => dutyCycle_48
  # DEBUG BEGIN_STMT
  _18 = (int) instance_41(D);
  _19 = userChCfg_45(D)->channelId;
  _20 = (int) _19;
  Emios_Pwm_Ip_aNotif[_18][_20] = 0;

  <bb 7> :
  # dutyCycle_38 = PHI <dutyCycle_53(3), dutyCycle_51(5), dutyCycle_48(6)>
  # DEBUG dutyCycle => dutyCycle_38
  # DEBUG BEGIN_STMT
  _21 = userChCfg_45(D)->channelId;
  _22 = userChCfg_45(D)->timebase;
  Emios_Pwm_Ip_SetCounterBus (base_43, _21, _22);
  # DEBUG BEGIN_STMT
  _23 = userChCfg_45(D)->channelId;
  Emios_Pwm_Ip_SetUCRegA (base_43, _23, dutyCycle_38);
  # DEBUG BEGIN_STMT
  _24 = userChCfg_45(D)->channelId;
  _25 = userChCfg_45(D)->deadTime;
  Emios_Pwm_Ip_SetUCRegB (base_43, _24, _25);
  # DEBUG BEGIN_STMT
  _26 = userChCfg_45(D)->periodCount;
  _27 = userChCfg_45(D)->dutyCycle;
  if (_26 == _27)
    goto <bb 8>; [INV]
  else
    goto <bb 9>; [INV]

  <bb 8> :
  # DEBUG BEGIN_STMT
  _28 = userChCfg_45(D)->channelId;
  _29 = userChCfg_45(D)->outputPolarity;
  _30 = _29 != 1;
  _31 = (<unnamed type>) _30;
  Emios_Pwm_Ip_SetEdgePolarity (base_43, _28, _31);
  goto <bb 10>; [INV]

  <bb 9> :
  # DEBUG BEGIN_STMT
  _32 = userChCfg_45(D)->channelId;
  _33 = userChCfg_45(D)->outputPolarity;
  Emios_Pwm_Ip_SetEdgePolarity (base_43, _32, _33);

  <bb 10> :
  # DEBUG BEGIN_STMT
  _34 = userChCfg_45(D)->channelId;
  _35 = userChCfg_45(D)->mode;
  Emios_Pwm_Ip_SetPwmMode (base_43, _34, _35);
  # DEBUG BEGIN_STMT
  _36 = userChCfg_45(D)->channelId;
  _37 = userChCfg_45(D)->outputPolarity;
  Emios_Pwm_Ip_SetEdgePolarity (base_43, _36, _37);
  return;

}


Emios_Pwm_Ip_SetDutyCycleOpwfmb (uint8 instance, uint8 channel, uint16 newDutyCycle)
{
  Emios_Pwm_Ip_StatusType ret;
  struct Emios_Pwm_Ip_HwAddrType * const base;
  int _1;
  int _2;
  int _3;
  short unsigned int _4;
  int _5;
  int _6;
  short unsigned int _7;
  int _8;
  int _9;
  short unsigned int _10;
  int _11;
  int _12;
  int _13;
  int _14;
  int _15;
  int _16;
  short unsigned int _17;
  int _18;
  int _19;
  int _20;
  int _21;
  int _22;
  int _23;
  unsigned char _24;
  _Bool _25;
  Emios_Pwm_Ip_StatusType _49;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) instance_29(D);
  base_31 = Emios_Pwm_Ip_aBasePtr[_1];
  # DEBUG base => base_31
  # DEBUG BEGIN_STMT
  ret_32 = 0;
  # DEBUG ret => ret_32
  # DEBUG BEGIN_STMT
  _2 = (int) instance_29(D);
  _3 = (int) channel_33(D);
  _4 = Emios_Pwm_Ip_aPeriod[_2][_3];
  if (newDutyCycle_34(D) > _4)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _5 = (int) instance_29(D);
  _6 = (int) channel_33(D);
  _7 = Emios_Pwm_Ip_aPeriod[_5][_6];
  if (_7 != 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  # DEBUG BEGIN_STMT
  ret_35 = 1;
  # DEBUG ret => ret_35
  goto <bb 13>; [INV]

  <bb 5> :
  # DEBUG BEGIN_STMT
  _8 = (int) instance_29(D);
  _9 = (int) channel_33(D);
  _10 = Emios_Pwm_Ip_aPeriod[_8][_9];
  if (_10 == 0)
    goto <bb 6>; [INV]
  else
    goto <bb 7>; [INV]

  <bb 6> :
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetInterruptRequest (base_31, channel_33(D), 0);
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_ClearFlagEvent (base_31, channel_33(D));
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetUCRegA (base_31, channel_33(D), 0);
  # DEBUG BEGIN_STMT
  _11 = (int) instance_29(D);
  _12 = (int) channel_33(D);
  Emios_Pwm_Ip_aNotif[_11][_12] = 1;
  goto <bb 13>; [INV]

  <bb 7> :
  # DEBUG BEGIN_STMT
  if (newDutyCycle_34(D) == 0)
    goto <bb 8>; [INV]
  else
    goto <bb 9>; [INV]

  <bb 8> :
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetInterruptRequest (base_31, channel_33(D), 0);
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_ClearFlagEvent (base_31, channel_33(D));
  # DEBUG BEGIN_STMT
  _13 = (int) instance_29(D);
  _14 = (int) channel_33(D);
  Emios_Pwm_Ip_aNotif[_13][_14] = 1;
  goto <bb 12>; [INV]

  <bb 9> :
  # DEBUG BEGIN_STMT
  _15 = (int) instance_29(D);
  _16 = (int) channel_33(D);
  _17 = Emios_Pwm_Ip_aPeriod[_15][_16];
  if (newDutyCycle_34(D) == _17)
    goto <bb 10>; [INV]
  else
    goto <bb 11>; [INV]

  <bb 10> :
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetInterruptRequest (base_31, channel_33(D), 0);
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_ClearFlagEvent (base_31, channel_33(D));
  # DEBUG BEGIN_STMT
  _18 = (int) instance_29(D);
  _19 = (int) channel_33(D);
  Emios_Pwm_Ip_aNotif[_18][_19] = 1;
  goto <bb 12>; [INV]

  <bb 11> :
  # DEBUG BEGIN_STMT
  _20 = (int) instance_29(D);
  _21 = (int) channel_33(D);
  Emios_Pwm_Ip_aNotif[_20][_21] = 0;
  # DEBUG BEGIN_STMT
  _22 = (int) instance_29(D);
  _23 = (int) channel_33(D);
  _24 = Emios_Pwm_Ip_aCheckEnableNotif[_22][_23];
  _25 = _24 != 0;
  Emios_Pwm_Ip_SetInterruptRequest (base_31, channel_33(D), _25);

  <bb 12> :
  # DEBUG BEGIN_STMT
  Emios_Pwm_Ip_SetUCRegA (base_31, channel_33(D), newDutyCycle_34(D));

  <bb 13> :
  # ret_26 = PHI <ret_35(4), ret_32(6), ret_32(12)>
  # DEBUG ret => ret_26
  # DEBUG BEGIN_STMT
  _49 = ret_26;
  return _49;

}


Emios_Pwm_Ip_InitPeriodDutyCycleMode (uint8 instance, const struct Emios_Pwm_Ip_ChannelConfigType * userChCfg)
{
  struct Emios_Pwm_Ip_HwAddrType * const base;
  int _1;
  unsigned char _2;
  <unnamed type> _3;
  unsigned char _4;
  short unsigned int _5;
  unsigned char _6;
  short unsigned int _7;
  unsigned char _8;
  <unnamed type> _9;
  unsigned char _10;
  <unnamed type> _11;
  _Bool _12;
  <unnamed type> _13;
  int _14;
  unsigned char _15;
  int _16;
  short unsigned int _17;
  short unsigned int _18;
  short unsigned int _19;
  int _20;
  unsigned char _21;
  int _22;
  short unsigned int _23;
  int _24;
  unsigned char _25;
  int _26;
  int _27;
  unsigned char _28;
  int _29;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) instance_31(D);
  base_33 = Emios_Pwm_Ip_aBasePtr[_1];
  # DEBUG base => base_33
  # DEBUG BEGIN_STMT
  _2 = userChCfg_34(D)->channelId;
  _3 = userChCfg_34(D)->timebase;
  Emios_Pwm_Ip_SetCounterBus (base_33, _2, _3);
  # DEBUG BEGIN_STMT
  _4 = userChCfg_34(D)->channelId;
  _5 = userChCfg_34(D)->dutyCycle;
  Emios_Pwm_Ip_SetUCRegA (base_33, _4, _5);
  # DEBUG BEGIN_STMT
  _6 = userChCfg_34(D)->channelId;
  _7 = userChCfg_34(D)->periodCount;
  Emios_Pwm_Ip_SetUCRegB (base_33, _6, _7);
  # DEBUG BEGIN_STMT
  _8 = userChCfg_34(D)->channelId;
  _9 = userChCfg_34(D)->mode;
  Emios_Pwm_Ip_SetPwmMode (base_33, _8, _9);
  # DEBUG BEGIN_STMT
  _10 = userChCfg_34(D)->channelId;
  _11 = userChCfg_34(D)->outputPolarity;
  _12 = _11 != 1;
  _13 = (<unnamed type>) _12;
  Emios_Pwm_Ip_SetEdgePolarity (base_33, _10, _13);
  # DEBUG BEGIN_STMT
  _14 = (int) instance_31(D);
  _15 = userChCfg_34(D)->channelId;
  _16 = (int) _15;
  _17 = userChCfg_34(D)->periodCount;
  Emios_Pwm_Ip_aPeriod[_14][_16] = _17;
  # DEBUG BEGIN_STMT
  _18 = userChCfg_34(D)->periodCount;
  _19 = userChCfg_34(D)->dutyCycle;
  if (_18 == _19)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  # DEBUG BEGIN_STMT
  _20 = (int) instance_31(D);
  _21 = userChCfg_34(D)->channelId;
  _22 = (int) _21;
  Emios_Pwm_Ip_aNotif[_20][_22] = 1;
  goto <bb 7>; [INV]

  <bb 4> :
  # DEBUG BEGIN_STMT
  _23 = userChCfg_34(D)->dutyCycle;
  if (_23 == 0)
    goto <bb 5>; [INV]
  else
    goto <bb 6>; [INV]

  <bb 5> :
  # DEBUG BEGIN_STMT
  _24 = (int) instance_31(D);
  _25 = userChCfg_34(D)->channelId;
  _26 = (int) _25;
  Emios_Pwm_Ip_aNotif[_24][_26] = 1;
  goto <bb 7>; [INV]

  <bb 6> :
  # DEBUG BEGIN_STMT
  _27 = (int) instance_31(D);
  _28 = userChCfg_34(D)->channelId;
  _29 = (int) _28;
  Emios_Pwm_Ip_aNotif[_27][_29] = 0;

  <bb 7> :
  return;

}


Emios_Pwm_Ip_GetCounterBusMode (uint8 instance, uint8 channel, Emios_Pwm_Ip_CounterBusSourceType counterBus)
{
  Emios_Pwm_Ip_MasterBusModeType counterBusMode;
  const struct Emios_Pwm_Ip_HwAddrType * const base;
  int _1;
  int _2;
  unsigned char _3;
  Emios_Pwm_Ip_MasterBusModeType _19;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) instance_6(D);
  base_8 = Emios_Pwm_Ip_aBasePtr[_1];
  # DEBUG base => base_8
  # DEBUG BEGIN_STMT
  counterBusMode_9 = 16;
  # DEBUG counterBusMode => counterBusMode_9
  # DEBUG BEGIN_STMT
  _2 = (int) counterBus_10(D);
  switch (_2) <default: <L3> [INV], case 0: <L0> [INV], case 1: <L1> [INV], case 2: <L2> [INV]>

  <bb 3> :
<L0>:
  # DEBUG BEGIN_STMT
  counterBusMode_17 = Emios_Pwm_Ip_GetChannelPwmMode (base_8, 23);
  # DEBUG counterBusMode => counterBusMode_17
  # DEBUG BEGIN_STMT
  goto <bb 7>; [INV]

  <bb 4> :
<L1>:
  # DEBUG BEGIN_STMT
  _3 = channel_13(D) & 248;
  counterBusMode_15 = Emios_Pwm_Ip_GetChannelPwmMode (base_8, _3);
  # DEBUG counterBusMode => counterBusMode_15
  # DEBUG BEGIN_STMT
  goto <bb 7>; [INV]

  <bb 5> :
<L2>:
  # DEBUG BEGIN_STMT
  counterBusMode_12 = Emios_Pwm_Ip_GetChannelPwmMode (base_8, 22);
  # DEBUG counterBusMode => counterBusMode_12
  # DEBUG BEGIN_STMT
  goto <bb 7>; [INV]

  <bb 6> :
<L3>:
  # DEBUG BEGIN_STMT
  counterBusMode_18 = 0;
  # DEBUG counterBusMode => counterBusMode_18
  # DEBUG BEGIN_STMT

  <bb 7> :
  # counterBusMode_4 = PHI <counterBusMode_17(3), counterBusMode_15(4), counterBusMode_12(5), counterBusMode_18(6)>
  # DEBUG counterBusMode => counterBusMode_4
  # DEBUG BEGIN_STMT
  _19 = counterBusMode_4;
  return _19;

}


Emios_Pwm_Ip_GetCounterBusPeriod (uint8 instance, uint8 channel, Emios_Pwm_Ip_CounterBusSourceType counterBus)
{
  uint16 chPeriod;
  const struct Emios_Pwm_Ip_HwAddrType * const base;
  int _1;
  unsigned char _2;
  uint16 _17;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) instance_5(D);
  base_7 = Emios_Pwm_Ip_aBasePtr[_1];
  # DEBUG base => base_7
  # DEBUG BEGIN_STMT
  chPeriod_8 = 0;
  # DEBUG chPeriod => chPeriod_8
  # DEBUG BEGIN_STMT
  if (counterBus_9(D) == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  # DEBUG BEGIN_STMT
  chPeriod_16 = Emios_Pwm_Ip_GetUCRegA (base_7, 23);
  # DEBUG chPeriod => chPeriod_16
  goto <bb 8>; [INV]

  <bb 4> :
  # DEBUG BEGIN_STMT
  if (counterBus_9(D) == 2)
    goto <bb 5>; [INV]
  else
    goto <bb 6>; [INV]

  <bb 5> :
  # DEBUG BEGIN_STMT
  chPeriod_14 = Emios_Pwm_Ip_GetUCRegA (base_7, 22);
  # DEBUG chPeriod => chPeriod_14
  goto <bb 8>; [INV]

  <bb 6> :
  # DEBUG BEGIN_STMT
  if (counterBus_9(D) == 1)
    goto <bb 7>; [INV]
  else
    goto <bb 8>; [INV]

  <bb 7> :
  # DEBUG BEGIN_STMT
  _2 = channel_10(D) & 248;
  chPeriod_12 = Emios_Pwm_Ip_GetUCRegA (base_7, _2);
  # DEBUG chPeriod => chPeriod_12

  <bb 8> :
  # chPeriod_3 = PHI <chPeriod_16(3), chPeriod_14(5), chPeriod_8(6), chPeriod_12(7)>
  # DEBUG chPeriod => chPeriod_3
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  _17 = chPeriod_3;
  return _17;

}


Emios_Pwm_Ip_SetPrescalerSource (struct Emios_Pwm_Ip_HwAddrType * const base, uint8 channel, Emios_Pwm_Ip_InternalPsSrcType value)
{
  int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;
  int _7;
  long unsigned int _8;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) channel_9(D);
  _2 ={v} base_11(D)->CH.UC[_1].C2;
  _3 = _2 & 4294950911;
  _4 = (long unsigned int) value_12(D);
  _5 = _4 << 14;
  _6 = _5 & 16384;
  _7 = (int) channel_9(D);
  _8 = _3 | _6;
  base_11(D)->CH.UC[_7].C2 ={v} _8;
  return;

}


Emios_Pwm_Ip_SetExtendedPrescaler (struct Emios_Pwm_Ip_HwAddrType * const base, uint8 channel, Emios_Pwm_Ip_InternalClkPsType value)
{
  int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;
  int _7;
  long unsigned int _8;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) channel_9(D);
  _2 ={v} base_11(D)->CH.UC[_1].C2;
  _3 = _2 & 4293984255;
  _4 = (long unsigned int) value_12(D);
  _5 = _4 << 16;
  _6 = _5 & 983040;
  _7 = (int) channel_9(D);
  _8 = _3 | _6;
  base_11(D)->CH.UC[_7].C2 ={v} _8;
  return;

}


Emios_Pwm_Ip_GetTrigger (const struct Emios_Pwm_Ip_HwAddrType * const base, uint8 channel)
{
  int _1;
  long unsigned int _2;
  uint16 _6;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) channel_3(D);
  _2 ={v} base_5(D)->CH.UC[_1].ALTA;
  _6 = (uint16) _2;
  return _6;

}


Emios_Pwm_Ip_SetTrigger (struct Emios_Pwm_Ip_HwAddrType * const base, uint8 channel, uint16 value)
{
  int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  int _5;
  long unsigned int _6;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) channel_7(D);
  _2 ={v} base_9(D)->CH.UC[_1].ALTA;
  _3 = _2 & 4294901760;
  _4 = (long unsigned int) value_10(D);
  _5 = (int) channel_7(D);
  _6 = _3 | _4;
  base_9(D)->CH.UC[_5].ALTA ={v} _6;
  return;

}


Emios_Pwm_Ip_ClearFlagEvent (struct Emios_Pwm_Ip_HwAddrType * const base, uint8 channel)
{
  int _1;
  long unsigned int _2;
  int _3;
  long unsigned int _4;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) channel_5(D);
  _2 ={v} base_7(D)->CH.UC[_1].S;
  _3 = (int) channel_5(D);
  _4 = _2 | 1;
  base_7(D)->CH.UC[_3].S ={v} _4;
  return;

}


Emios_Pwm_Ip_GetOutputPinState (const struct Emios_Pwm_Ip_HwAddrType * const base, uint8 channel)
{
  int _1;
  long unsigned int _2;
  long unsigned int _3;
  boolean _7;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) channel_4(D);
  _2 ={v} base_6(D)->CH.UC[_1].S;
  _3 = _2 & 2;
  _7 = _3 != 0;
  return _7;

}


Emios_Pwm_Ip_GetChannelPwmMode (const struct Emios_Pwm_Ip_HwAddrType * const base, uint8 channel)
{
  Emios_Pwm_Ip_MasterBusModeType masterBusMode;
  int _1;
  long unsigned int _2;
  long unsigned int _3;
  Emios_Pwm_Ip_MasterBusModeType _14;

  <bb 2> :
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  _1 = (int) channel_5(D);
  _2 ={v} base_7(D)->CH.UC[_1].C;
  _3 = _2 & 127;
  switch (_3) <default: <L5> [INV], case 16: <L0> [INV], case 18: <L1> [INV], case 20: <L2> [INV], case 80: <L3> [INV], case 84: <L4> [INV]>

  <bb 3> :
<L0>:
  # DEBUG BEGIN_STMT
  masterBusMode_12 = 16;
  # DEBUG masterBusMode => masterBusMode_12
  # DEBUG BEGIN_STMT
  goto <bb 9>; [INV]

  <bb 4> :
<L1>:
  # DEBUG BEGIN_STMT
  masterBusMode_11 = 18;
  # DEBUG masterBusMode => masterBusMode_11
  # DEBUG BEGIN_STMT
  goto <bb 9>; [INV]

  <bb 5> :
<L2>:
  # DEBUG BEGIN_STMT
  masterBusMode_10 = 20;
  # DEBUG masterBusMode => masterBusMode_10
  # DEBUG BEGIN_STMT
  goto <bb 9>; [INV]

  <bb 6> :
<L3>:
  # DEBUG BEGIN_STMT
  masterBusMode_9 = 80;
  # DEBUG masterBusMode => masterBusMode_9
  # DEBUG BEGIN_STMT
  goto <bb 9>; [INV]

  <bb 7> :
<L4>:
  # DEBUG BEGIN_STMT
  masterBusMode_8 = 84;
  # DEBUG masterBusMode => masterBusMode_8
  # DEBUG BEGIN_STMT
  goto <bb 9>; [INV]

  <bb 8> :
<L5>:
  # DEBUG BEGIN_STMT
  masterBusMode_13 = 0;
  # DEBUG masterBusMode => masterBusMode_13
  # DEBUG BEGIN_STMT

  <bb 9> :
  # masterBusMode_4 = PHI <masterBusMode_12(3), masterBusMode_11(4), masterBusMode_10(5), masterBusMode_9(6), masterBusMode_8(7), masterBusMode_13(8)>
  # DEBUG masterBusMode => masterBusMode_4
  # DEBUG BEGIN_STMT
  _14 = masterBusMode_4;
  return _14;

}


Emios_Pwm_Ip_SetPwmModePol (struct Emios_Pwm_Ip_HwAddrType * const base, uint8 channel, Emios_Pwm_Ip_PwmModeType mode, Emios_Pwm_Ip_PolarityType pol)
{
  int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;
  long unsigned int _7;
  long unsigned int _8;
  long unsigned int _9;
  int _10;
  long unsigned int _11;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) channel_12(D);
  _2 ={v} base_14(D)->CH.UC[_1].C;
  _3 = _2 & 4294967040;
  _4 = (long unsigned int) mode_15(D);
  _5 = _4 & 127;
  _6 = _3 | _5;
  _7 = (long unsigned int) pol_16(D);
  _8 = _7 << 7;
  _9 = _8 & 255;
  _10 = (int) channel_12(D);
  _11 = _6 | _9;
  base_14(D)->CH.UC[_10].C ={v} _11;
  return;

}


Emios_Pwm_Ip_GetPwmMode (const struct Emios_Pwm_Ip_HwAddrType * const base, uint8 channel)
{
  Emios_Pwm_Ip_PwmModeType mode;
  int _1;
  long unsigned int _2;
  long unsigned int _3;
  Emios_Pwm_Ip_PwmModeType _21;

  <bb 2> :
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  _1 = (int) channel_5(D);
  _2 ={v} base_7(D)->CH.UC[_1].C;
  _3 = _2 & 127;
  switch (_3) <default: <L12> [INV], case 1: <L0> [INV], case 6: <L1> [INV], case 7: <L2> [INV], case 38: <L3> [INV], case 88: <L4> [INV], case 90: <L5> [INV], case 92: <L6> [INV], case 93: <L8> [INV], case 94: <L7> [INV], case 95: <L9> [INV], case 96: <L10> [INV], case 98: <L11> [INV]>

  <bb 3> :
<L0>:
  # DEBUG BEGIN_STMT
  mode_19 = 1;
  # DEBUG mode => mode_19
  # DEBUG BEGIN_STMT
  goto <bb 16>; [INV]

  <bb 4> :
<L1>:
  # DEBUG BEGIN_STMT
  mode_18 = 6;
  # DEBUG mode => mode_18
  # DEBUG BEGIN_STMT
  goto <bb 16>; [INV]

  <bb 5> :
<L2>:
  # DEBUG BEGIN_STMT
  mode_17 = 7;
  # DEBUG mode => mode_17
  # DEBUG BEGIN_STMT
  goto <bb 16>; [INV]

  <bb 6> :
<L3>:
  # DEBUG BEGIN_STMT
  mode_16 = 38;
  # DEBUG mode => mode_16
  # DEBUG BEGIN_STMT
  goto <bb 16>; [INV]

  <bb 7> :
<L4>:
  # DEBUG BEGIN_STMT
  mode_15 = 88;
  # DEBUG mode => mode_15
  # DEBUG BEGIN_STMT
  goto <bb 16>; [INV]

  <bb 8> :
<L5>:
  # DEBUG BEGIN_STMT
  mode_14 = 90;
  # DEBUG mode => mode_14
  # DEBUG BEGIN_STMT
  goto <bb 16>; [INV]

  <bb 9> :
<L6>:
  # DEBUG BEGIN_STMT
  mode_13 = 92;
  # DEBUG mode => mode_13
  # DEBUG BEGIN_STMT
  goto <bb 16>; [INV]

  <bb 10> :
<L7>:
  # DEBUG BEGIN_STMT
  mode_11 = 94;
  # DEBUG mode => mode_11
  # DEBUG BEGIN_STMT
  goto <bb 16>; [INV]

  <bb 11> :
<L8>:
  # DEBUG BEGIN_STMT
  mode_12 = 93;
  # DEBUG mode => mode_12
  # DEBUG BEGIN_STMT
  goto <bb 16>; [INV]

  <bb 12> :
<L9>:
  # DEBUG BEGIN_STMT
  mode_10 = 95;
  # DEBUG mode => mode_10
  # DEBUG BEGIN_STMT
  goto <bb 16>; [INV]

  <bb 13> :
<L10>:
  # DEBUG BEGIN_STMT
  mode_9 = 96;
  # DEBUG mode => mode_9
  # DEBUG BEGIN_STMT
  goto <bb 16>; [INV]

  <bb 14> :
<L11>:
  # DEBUG BEGIN_STMT
  mode_8 = 98;
  # DEBUG mode => mode_8
  # DEBUG BEGIN_STMT
  goto <bb 16>; [INV]

  <bb 15> :
<L12>:
  # DEBUG BEGIN_STMT
  mode_20 = 255;
  # DEBUG mode => mode_20
  # DEBUG BEGIN_STMT

  <bb 16> :
  # mode_4 = PHI <mode_19(3), mode_18(4), mode_17(5), mode_16(6), mode_15(7), mode_14(8), mode_13(9), mode_11(10), mode_12(11), mode_10(12), mode_9(13), mode_8(14), mode_20(15)>
  # DEBUG mode => mode_4
  # DEBUG BEGIN_STMT
  _21 = mode_4;
  return _21;

}


Emios_Pwm_Ip_SetPwmMode (struct Emios_Pwm_Ip_HwAddrType * const base, uint8 channel, Emios_Pwm_Ip_PwmModeType mode)
{
  int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  int _6;
  long unsigned int _7;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) channel_8(D);
  _2 ={v} base_10(D)->CH.UC[_1].C;
  _3 = _2 & 4294967168;
  _4 = (long unsigned int) mode_11(D);
  _5 = _4 & 127;
  _6 = (int) channel_8(D);
  _7 = _3 | _5;
  base_10(D)->CH.UC[_6].C ={v} _7;
  return;

}


Emios_Pwm_Ip_SetEdgePolarity (struct Emios_Pwm_Ip_HwAddrType * const base, uint8 channel, Emios_Pwm_Ip_PolarityType value)
{
  int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;
  int _7;
  long unsigned int _8;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) channel_9(D);
  _2 ={v} base_11(D)->CH.UC[_1].C;
  _3 = _2 & 4294967167;
  _4 = (long unsigned int) value_12(D);
  _5 = _4 << 7;
  _6 = _5 & 255;
  _7 = (int) channel_9(D);
  _8 = _3 | _6;
  base_11(D)->CH.UC[_7].C ={v} _8;
  return;

}


Emios_Pwm_Ip_GetCounterBus (const struct Emios_Pwm_Ip_HwAddrType * const base, uint8 channel)
{
  Emios_Pwm_Ip_CounterBusSourceType counterBus;
  int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  Emios_Pwm_Ip_CounterBusSourceType _13;

  <bb 2> :
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  _1 = (int) channel_6(D);
  _2 ={v} base_8(D)->CH.UC[_1].C;
  _3 = _2 >> 9;
  _4 = _3 & 3;
  switch (_4) <default: <L3> [INV], case 0: <L0> [INV], case 1: <L1> [INV], case 2: <L2> [INV]>

  <bb 3> :
<L0>:
  # DEBUG BEGIN_STMT
  counterBus_11 = 0;
  # DEBUG counterBus => counterBus_11
  # DEBUG BEGIN_STMT
  goto <bb 7>; [INV]

  <bb 4> :
<L1>:
  # DEBUG BEGIN_STMT
  counterBus_10 = 1;
  # DEBUG counterBus => counterBus_10
  # DEBUG BEGIN_STMT
  goto <bb 7>; [INV]

  <bb 5> :
<L2>:
  # DEBUG BEGIN_STMT
  counterBus_9 = 2;
  # DEBUG counterBus => counterBus_9
  # DEBUG BEGIN_STMT
  goto <bb 7>; [INV]

  <bb 6> :
<L3>:
  # DEBUG BEGIN_STMT
  counterBus_12 = 3;
  # DEBUG counterBus => counterBus_12
  # DEBUG BEGIN_STMT

  <bb 7> :
  # counterBus_5 = PHI <counterBus_11(3), counterBus_10(4), counterBus_9(5), counterBus_12(6)>
  # DEBUG counterBus => counterBus_5
  # DEBUG BEGIN_STMT
  _13 = counterBus_5;
  return _13;

}


Emios_Pwm_Ip_SetCounterBus (struct Emios_Pwm_Ip_HwAddrType * const base, uint8 channel, Emios_Pwm_Ip_CounterBusSourceType value)
{
  int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;
  int _7;
  long unsigned int _8;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) channel_9(D);
  _2 ={v} base_11(D)->CH.UC[_1].C;
  _3 = _2 & 4294965759;
  _4 = (long unsigned int) value_12(D);
  _5 = _4 << 9;
  _6 = _5 & 1536;
  _7 = (int) channel_9(D);
  _8 = _3 | _6;
  base_11(D)->CH.UC[_7].C ={v} _8;
  return;

}


Emios_Pwm_Ip_SetForceMatchB (struct Emios_Pwm_Ip_HwAddrType * const base, uint8 channel, boolean value)
{
  uint8 value_convert;
  _Bool _1;
  int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;
  long unsigned int _7;
  int _8;
  long unsigned int _9;
  uint8 iftmp.6_10;
  uint8 iftmp.6_12;
  uint8 iftmp.6_13;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = ~value_11(D);
  if (_1 != 0)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  iftmp.6_13 = 0;
  goto <bb 5>; [INV]

  <bb 4> :
  iftmp.6_12 = 1;

  <bb 5> :
  # iftmp.6_10 = PHI <iftmp.6_13(3), iftmp.6_12(4)>
  value_convert_14 = iftmp.6_10;
  # DEBUG value_convert => value_convert_14
  # DEBUG BEGIN_STMT
  _2 = (int) channel_15(D);
  _3 ={v} base_17(D)->CH.UC[_2].C;
  _4 = _3 & 4294963199;
  _5 = (long unsigned int) value_convert_14;
  _6 = _5 << 12;
  _7 = _6 & 4096;
  _8 = (int) channel_15(D);
  _9 = _4 | _7;
  base_17(D)->CH.UC[_8].C ={v} _9;
  return;

}


Emios_Pwm_Ip_SetForceMatchA (struct Emios_Pwm_Ip_HwAddrType * const base, uint8 channel, boolean value)
{
  uint8 value_convert;
  _Bool _1;
  int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;
  long unsigned int _7;
  int _8;
  long unsigned int _9;
  uint8 iftmp.7_10;
  uint8 iftmp.7_12;
  uint8 iftmp.7_13;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = ~value_11(D);
  if (_1 != 0)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  iftmp.7_13 = 0;
  goto <bb 5>; [INV]

  <bb 4> :
  iftmp.7_12 = 1;

  <bb 5> :
  # iftmp.7_10 = PHI <iftmp.7_13(3), iftmp.7_12(4)>
  value_convert_14 = iftmp.7_10;
  # DEBUG value_convert => value_convert_14
  # DEBUG BEGIN_STMT
  _2 = (int) channel_15(D);
  _3 ={v} base_17(D)->CH.UC[_2].C;
  _4 = _3 & 4294959103;
  _5 = (long unsigned int) value_convert_14;
  _6 = _5 << 13;
  _7 = _6 & 8192;
  _8 = (int) channel_15(D);
  _9 = _4 | _7;
  base_17(D)->CH.UC[_8].C ={v} _9;
  return;

}


Emios_Pwm_Ip_GetInterruptRequest (const struct Emios_Pwm_Ip_HwAddrType * const base, uint8 channel)
{
  int _1;
  long unsigned int _2;
  long unsigned int _3;
  boolean _7;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) channel_4(D);
  _2 ={v} base_6(D)->CH.UC[_1].C;
  _3 = _2 & 131072;
  _7 = _3 != 0;
  return _7;

}


Emios_Pwm_Ip_SetInterruptRequest (struct Emios_Pwm_Ip_HwAddrType * const base, uint8 channel, boolean value)
{
  uint8 value_convert;
  _Bool _1;
  int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;
  long unsigned int _7;
  int _8;
  long unsigned int _9;
  uint8 iftmp.5_10;
  uint8 iftmp.5_12;
  uint8 iftmp.5_13;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = ~value_11(D);
  if (_1 != 0)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  iftmp.5_13 = 0;
  goto <bb 5>; [INV]

  <bb 4> :
  iftmp.5_12 = 1;

  <bb 5> :
  # iftmp.5_10 = PHI <iftmp.5_13(3), iftmp.5_12(4)>
  value_convert_14 = iftmp.5_10;
  # DEBUG value_convert => value_convert_14
  # DEBUG BEGIN_STMT
  _2 = (int) channel_15(D);
  _3 ={v} base_17(D)->CH.UC[_2].C;
  _4 = _3 & 4294836223;
  _5 = (long unsigned int) value_convert_14;
  _6 = _5 << 17;
  _7 = _6 & 131072;
  _8 = (int) channel_15(D);
  _9 = _4 | _7;
  base_17(D)->CH.UC[_8].C ={v} _9;
  return;

}


Emios_Pwm_Ip_GetDMARequest (const struct Emios_Pwm_Ip_HwAddrType * const base, uint8 channel)
{
  int _1;
  long unsigned int _2;
  long unsigned int _3;
  boolean _7;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) channel_4(D);
  _2 ={v} base_6(D)->CH.UC[_1].C;
  _3 = _2 & 16777216;
  _7 = _3 != 0;
  return _7;

}


Emios_Pwm_Ip_SetDMARequest (struct Emios_Pwm_Ip_HwAddrType * const base, uint8 channel, boolean value)
{
  uint8 value_convert;
  _Bool _1;
  int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;
  long unsigned int _7;
  int _8;
  long unsigned int _9;
  uint8 iftmp.1_10;
  uint8 iftmp.1_12;
  uint8 iftmp.1_13;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = ~value_11(D);
  if (_1 != 0)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  iftmp.1_13 = 0;
  goto <bb 5>; [INV]

  <bb 4> :
  iftmp.1_12 = 1;

  <bb 5> :
  # iftmp.1_10 = PHI <iftmp.1_13(3), iftmp.1_12(4)>
  value_convert_14 = iftmp.1_10;
  # DEBUG value_convert => value_convert_14
  # DEBUG BEGIN_STMT
  _2 = (int) channel_15(D);
  _3 ={v} base_17(D)->CH.UC[_2].C;
  _4 = _3 & 4278190079;
  _5 = (long unsigned int) value_convert_14;
  _6 = _5 << 24;
  _7 = _6 & 16777216;
  _8 = (int) channel_15(D);
  _9 = _4 | _7;
  base_17(D)->CH.UC[_8].C ={v} _9;
  return;

}


Emios_Pwm_Ip_SetPrescalerEnable (struct Emios_Pwm_Ip_HwAddrType * const base, uint8 channel, boolean value)
{
  uint8 value_convert;
  _Bool _1;
  int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;
  long unsigned int _7;
  int _8;
  long unsigned int _9;
  uint8 iftmp.8_10;
  uint8 iftmp.8_12;
  uint8 iftmp.8_13;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = ~value_11(D);
  if (_1 != 0)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  iftmp.8_13 = 0;
  goto <bb 5>; [INV]

  <bb 4> :
  iftmp.8_12 = 1;

  <bb 5> :
  # iftmp.8_10 = PHI <iftmp.8_13(3), iftmp.8_12(4)>
  value_convert_14 = iftmp.8_10;
  # DEBUG value_convert => value_convert_14
  # DEBUG BEGIN_STMT
  _2 = (int) channel_15(D);
  _3 ={v} base_17(D)->CH.UC[_2].C;
  _4 = _3 & 4261412863;
  _5 = (long unsigned int) value_convert_14;
  _6 = _5 << 25;
  _7 = _6 & 33554432;
  _8 = (int) channel_15(D);
  _9 = _4 | _7;
  base_17(D)->CH.UC[_8].C ={v} _9;
  return;

}


Emios_Pwm_Ip_SetOutDisableSource (struct Emios_Pwm_Ip_HwAddrType * const base, uint8 channel, Emios_Pwm_Ip_OutDisableSourceType value)
{
  int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;
  int _7;
  long unsigned int _8;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) channel_9(D);
  _2 ={v} base_11(D)->CH.UC[_1].C;
  _3 = _2 & 3489660927;
  _4 = (long unsigned int) value_12(D);
  _5 = _4 << 28;
  _6 = _5 & 805306368;
  _7 = (int) channel_9(D);
  _8 = _3 | _6;
  base_11(D)->CH.UC[_7].C ={v} _8;
  return;

}


Emios_Pwm_Ip_SetOutDisable (struct Emios_Pwm_Ip_HwAddrType * const base, uint8 channel, boolean value)
{
  uint8 value_convert;
  _Bool _1;
  int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;
  long unsigned int _7;
  int _8;
  long unsigned int _9;
  uint8 iftmp.0_10;
  uint8 iftmp.0_12;
  uint8 iftmp.0_13;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = ~value_11(D);
  if (_1 != 0)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  iftmp.0_13 = 0;
  goto <bb 5>; [INV]

  <bb 4> :
  iftmp.0_12 = 1;

  <bb 5> :
  # iftmp.0_10 = PHI <iftmp.0_13(3), iftmp.0_12(4)>
  value_convert_14 = iftmp.0_10;
  # DEBUG value_convert => value_convert_14
  # DEBUG BEGIN_STMT
  _2 = (int) channel_15(D);
  _3 ={v} base_17(D)->CH.UC[_2].C;
  _4 = _3 & 3221225471;
  _5 = (long unsigned int) value_convert_14;
  _6 = _5 << 30;
  _7 = _6 & 1073741824;
  _8 = (int) channel_15(D);
  _9 = _4 | _7;
  base_17(D)->CH.UC[_8].C ={v} _9;
  return;

}


Emios_Pwm_Ip_SetFreezeEnable (struct Emios_Pwm_Ip_HwAddrType * const base, uint8 channel, boolean value)
{
  uint8 value_convert;
  _Bool _1;
  int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;
  int _7;
  long unsigned int _8;
  uint8 iftmp.11_9;
  uint8 iftmp.11_11;
  uint8 iftmp.11_12;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = ~value_10(D);
  if (_1 != 0)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  iftmp.11_12 = 0;
  goto <bb 5>; [INV]

  <bb 4> :
  iftmp.11_11 = 1;

  <bb 5> :
  # iftmp.11_9 = PHI <iftmp.11_12(3), iftmp.11_11(4)>
  value_convert_13 = iftmp.11_9;
  # DEBUG value_convert => value_convert_13
  # DEBUG BEGIN_STMT
  _2 = (int) channel_14(D);
  _3 ={v} base_16(D)->CH.UC[_2].C;
  _4 = _3 & 2147483647;
  _5 = (long unsigned int) value_convert_13;
  _6 = _5 << 31;
  _7 = (int) channel_14(D);
  _8 = _4 | _6;
  base_16(D)->CH.UC[_7].C ={v} _8;
  return;

}


Emios_Pwm_Ip_GetUCRegB (const struct Emios_Pwm_Ip_HwAddrType * const base, uint8 channel)
{
  int _1;
  long unsigned int _2;
  uint16 _6;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) channel_3(D);
  _2 ={v} base_5(D)->CH.UC[_1].B;
  _6 = (uint16) _2;
  return _6;

}


Emios_Pwm_Ip_SetUCRegB (struct Emios_Pwm_Ip_HwAddrType * const base, uint8 channel, uint16 value)
{
  int _1;
  long unsigned int _2;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) channel_3(D);
  _2 = (long unsigned int) value_4(D);
  base_6(D)->CH.UC[_1].B ={v} _2;
  return;

}


Emios_Pwm_Ip_GetUCRegA (const struct Emios_Pwm_Ip_HwAddrType * const base, uint8 channel)
{
  int _1;
  long unsigned int _2;
  uint16 _6;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) channel_3(D);
  _2 ={v} base_5(D)->CH.UC[_1].A;
  _6 = (uint16) _2;
  return _6;

}


Emios_Pwm_Ip_SetUCRegA (struct Emios_Pwm_Ip_HwAddrType * const base, uint8 channel, uint16 value)
{
  int _1;
  long unsigned int _2;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = (int) channel_3(D);
  _2 = (long unsigned int) value_4(D);
  base_6(D)->CH.UC[_1].A ={v} _2;
  return;

}


Emios_Pwm_Ip_GetOutputUpdateInstance (const struct Emios_Pwm_Ip_HwAddrType * const base)
{
  uint32 _3;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _3 ={v} base_2(D)->OUDIS;
  return _3;

}


Emios_Pwm_Ip_SetOutputUpdate (struct Emios_Pwm_Ip_HwAddrType * const base, uint8 channel, boolean value)
{
  long unsigned int _1;
  _Bool _2;
  long unsigned int _3;
  int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 ={v} base_8(D)->OUDIS;
  _2 = ~value_9(D);
  _3 = (long unsigned int) _2;
  _4 = (int) channel_10(D);
  _5 = _3 << _4;
  _6 = _1 | _5;
  base_8(D)->OUDIS ={v} _6;
  return;

}


Emios_Pwm_Ip_GetDebugMode (const struct Emios_Pwm_Ip_HwAddrType * const base)
{
  long unsigned int _1;
  long unsigned int _2;
  boolean _5;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 ={v} base_4(D)->MCR;
  _2 = _1 & 536870912;
  _5 = _2 != 0;
  return _5;

}


