IPA function summary for FircStdbyEnable.part.0/6 inlinable
  global time:     18.000000
  self size:       10
  global size:     10
  min size:       6
  self stack:      0
  global stack:    0
    size:3.000000, time:3.000000
    size:3.000000, time:2.000000,  executed if:(not inlined)
    size:0.500000, time:0.500000,  executed if:(not inlined),  nonconst if:(op0[ref offset: 0] changed) && (not inlined)
    size:0.500000, time:0.500000,  nonconst if:(op0[ref offset: 0] changed)
  calls:
    UpdateClockState/4 function body not available
      loop depth: 0 freq:1.00 size: 3 time: 12
       op1 is compile time invariant

IPA function summary for SircStdbyEnable.part.0/5 inlinable
  global time:     18.000000
  self size:       10
  global size:     10
  min size:       6
  self stack:      0
  global stack:    0
    size:3.000000, time:3.000000
    size:3.000000, time:2.000000,  executed if:(not inlined)
    size:0.500000, time:0.500000,  executed if:(not inlined),  nonconst if:(op0[ref offset: 0] changed) && (not inlined)
    size:0.500000, time:0.500000,  nonconst if:(op0[ref offset: 0] changed)
  calls:
    UpdateClockState/4 function body not available
      loop depth: 0 freq:1.00 size: 3 time: 12
       op1 is compile time invariant

IPA function summary for SircStdbyEnable/3 inlinable
  global time:     18.500000
  self size:       15
  global size:     15
  min size:       0
  self stack:      0
  global stack:    0
    size:0.000000, time:0.000000
    size:3.000000, time:2.000000,  executed if:(not inlined)
    size:0.500000, time:0.500000,  executed if:(not inlined),  nonconst if:(op0[ref offset: 16] changed) && (not inlined)
    size:2.500000, time:2.500000,  nonconst if:(op0[ref offset: 16] changed)
    size:3.000000, time:1.500000,  executed if:(op0[ref offset: 16] == 0)
    size:0.500000, time:0.250000,  executed if:(op0[ref offset: 16] == 0) && (not inlined),  nonconst if:(op0[ref offset: 0] changed) && (op0[ref offset: 16] == 0) && (not inlined)
    size:0.500000, time:0.250000,  executed if:(op0[ref offset: 16] == 0),  nonconst if:(op0[ref offset: 0] changed) && (op0[ref offset: 16] == 0)
  calls:
    UpdateClockState/4 function body not available
      loop depth: 0 freq:0.50 size: 3 time: 12 predicate: (op0[ref offset: 16] == 0)
       op1 is compile time invariant
    SircStdbyEnable.part.0/5 function not considered for inlining
      loop depth: 0 freq:0.50 size: 2 time: 11callee size: 5 stack: 0 predicate: (op0[ref offset: 16] != 0)

IPA function summary for FircStdbyEnable/2 inlinable
  global time:     18.500000
  self size:       15
  global size:     15
  min size:       0
  self stack:      0
  global stack:    0
    size:0.000000, time:0.000000
    size:3.000000, time:2.000000,  executed if:(not inlined)
    size:0.500000, time:0.500000,  executed if:(not inlined),  nonconst if:(op0[ref offset: 16] changed) && (not inlined)
    size:2.500000, time:2.500000,  nonconst if:(op0[ref offset: 16] changed)
    size:3.000000, time:1.500000,  executed if:(op0[ref offset: 16] == 0)
    size:0.500000, time:0.250000,  executed if:(op0[ref offset: 16] == 0) && (not inlined),  nonconst if:(op0[ref offset: 0] changed) && (op0[ref offset: 16] == 0) && (not inlined)
    size:0.500000, time:0.250000,  executed if:(op0[ref offset: 16] == 0),  nonconst if:(op0[ref offset: 0] changed) && (op0[ref offset: 16] == 0)
  calls:
    UpdateClockState/4 function body not available
      loop depth: 0 freq:0.50 size: 3 time: 12 predicate: (op0[ref offset: 16] == 0)
       op1 is compile time invariant
    FircStdbyEnable.part.0/6 function not considered for inlining
      loop depth: 0 freq:0.50 size: 2 time: 11callee size: 5 stack: 0 predicate: (op0[ref offset: 16] != 0)

IPA function summary for InternalOscillatorEmpty/1 inlinable
  global time:     2.000000
  self size:       3
  global size:     3
  min size:       0
  self stack:      0
  global stack:    0
    size:0.000000, time:0.000000
    size:3.000000, time:2.000000,  executed if:(not inlined)
  calls:


Flattening functions:
Overall time estimate: 75.000000 weighted by profile: 0.000000

Deciding on inlining of small functions.  Starting with size 0.
Enqueueing calls in FircStdbyEnable.part.0/6.
Enqueueing calls in SircStdbyEnable.part.0/5.
Enqueueing calls in SircStdbyEnable/3.
Enqueueing calls in FircStdbyEnable/2.
Enqueueing calls in InternalOscillatorEmpty/1.

Considering SircStdbyEnable.part.0/5 with 10 size
 to be inlined into SircStdbyEnable/3 in unknown:0
 Estimated badness is -0.270000, frequency 0.50.

Considering FircStdbyEnable.part.0/6 with 10 size
 to be inlined into FircStdbyEnable/2 in unknown:0
 Estimated badness is -0.270000, frequency 0.50.

Reclaiming functions:
Reclaiming variables:
Clearing address taken flags:

Deciding on functions to be inlined into all callers and removing useless speculations:
Overall time estimate: 43.500000 weighted by profile: 0.000000

Why inlining failed?
function body not available                       :        4 calls, 2.000000 freq, 0 count
IPA function summary for SircStdbyEnable/3 inlinable
  global time:     20.750000
  self size:       15
  global size:     20
  min size:       0
  self stack:      0
  global stack:    0
    size:0.000000, time:0.000000
    size:3.000000, time:2.000000,  executed if:(not inlined)
    size:0.500000, time:0.500000,  executed if:(not inlined),  nonconst if:(op0[ref offset: 16] changed) && (not inlined)
    size:2.500000, time:2.500000,  nonconst if:(op0[ref offset: 16] changed)
    size:3.000000, time:1.500000,  executed if:(op0[ref offset: 16] == 0)
    size:0.500000, time:0.250000,  executed if:(op0[ref offset: 16] == 0) && (not inlined),  nonconst if:(op0[ref offset: 0] changed) && (op0[ref offset: 16] == 0) && (not inlined)
    size:0.500000, time:0.250000,  executed if:(op0[ref offset: 16] == 0),  nonconst if:(op0[ref offset: 0] changed) && (op0[ref offset: 16] == 0)
    size:3.000000, time:1.500000,  executed if:(op0[ref offset: 16] != 0)
    size:0.500000, time:0.250000,  executed if:(op0[ref offset: 16] != 0),  nonconst if:(op0[ref offset: 0] changed) && (op0[ref offset: 16] != 0)
  calls:
    UpdateClockState/4 function body not available
      loop depth: 0 freq:0.50 size: 3 time: 12 predicate: (op0[ref offset: 16] == 0)
       op1 is compile time invariant
    SircStdbyEnable.part.0/5 inlined
      loop depth: 0 freq:0.50 size: 2 time: 11callee size: 5 stack: 0
      Stack frame offset 0, callee self size 0, callee size 0
      UpdateClockState/4 function body not available
        loop depth: 0 freq:0.50 size: 3 time: 12 predicate: (op0[ref offset: 16] != 0)
         op1 is compile time invariant

IPA function summary for FircStdbyEnable/2 inlinable
  global time:     20.750000
  self size:       15
  global size:     20
  min size:       0
  self stack:      0
  global stack:    0
    size:0.000000, time:0.000000
    size:3.000000, time:2.000000,  executed if:(not inlined)
    size:0.500000, time:0.500000,  executed if:(not inlined),  nonconst if:(op0[ref offset: 16] changed) && (not inlined)
    size:2.500000, time:2.500000,  nonconst if:(op0[ref offset: 16] changed)
    size:3.000000, time:1.500000,  executed if:(op0[ref offset: 16] == 0)
    size:0.500000, time:0.250000,  executed if:(op0[ref offset: 16] == 0) && (not inlined),  nonconst if:(op0[ref offset: 0] changed) && (op0[ref offset: 16] == 0) && (not inlined)
    size:0.500000, time:0.250000,  executed if:(op0[ref offset: 16] == 0),  nonconst if:(op0[ref offset: 0] changed) && (op0[ref offset: 16] == 0)
    size:3.000000, time:1.500000,  executed if:(op0[ref offset: 16] != 0)
    size:0.500000, time:0.250000,  executed if:(op0[ref offset: 16] != 0),  nonconst if:(op0[ref offset: 0] changed) && (op0[ref offset: 16] != 0)
  calls:
    UpdateClockState/4 function body not available
      loop depth: 0 freq:0.50 size: 3 time: 12 predicate: (op0[ref offset: 16] == 0)
       op1 is compile time invariant
    FircStdbyEnable.part.0/6 inlined
      loop depth: 0 freq:0.50 size: 2 time: 11callee size: 5 stack: 0
      Stack frame offset 0, callee self size 0, callee size 0
      UpdateClockState/4 function body not available
        loop depth: 0 freq:0.50 size: 3 time: 12 predicate: (op0[ref offset: 16] != 0)
         op1 is compile time invariant

IPA function summary for InternalOscillatorEmpty/1 inlinable
  global time:     2.000000
  self size:       3
  global size:     3
  min size:       0
  self stack:      0
  global stack:    0
    size:0.000000, time:0.000000
    size:3.000000, time:2.000000,  executed if:(not inlined)
  calls:

Symbol table:

FircStdbyEnable.part.0/6 (FircStdbyEnable.part.0) @06db41c0
  Type: function definition analyzed
  Visibility: prevailing_def_ironly artificial
  References: 
  Referring: 
  Function FircStdbyEnable.part.0/6 is inline copy in FircStdbyEnable/2
  Availability: local
  Function flags: count:536870912 (estimated locally) first_run:1 body local split_part optimize_size
  Called by: FircStdbyEnable/2 (inlined) (536870912 (estimated locally),0.50 per call) 
  Calls: UpdateClockState/4 (536870912 (estimated locally),0.50 per call) 
SircStdbyEnable.part.0/5 (SircStdbyEnable.part.0) @06daac40
  Type: function definition analyzed
  Visibility: prevailing_def_ironly artificial
  References: 
  Referring: 
  Function SircStdbyEnable.part.0/5 is inline copy in SircStdbyEnable/3
  Availability: local
  Function flags: count:536870912 (estimated locally) first_run:1 body local split_part optimize_size
  Called by: SircStdbyEnable/3 (inlined) (536870912 (estimated locally),0.50 per call) 
  Calls: UpdateClockState/4 (536870912 (estimated locally),0.50 per call) 
UpdateClockState/4 (UpdateClockState) @06daa2a0
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: FircStdbyEnable/2 (536870913 (estimated locally),0.50 per call) FircStdbyEnable.part.0/6 (536870912 (estimated locally),0.50 per call) SircStdbyEnable/3 (536870913 (estimated locally),0.50 per call) SircStdbyEnable.part.0/5 (536870912 (estimated locally),0.50 per call) 
  Calls: 
SircStdbyEnable/3 (SircStdbyEnable) @06de2c40
  Type: function definition analyzed
  Visibility: prevailing_def_ironly
  Address is taken.
  References: 
  Referring: intOscCallbacks/0 (addr)
  Availability: available
  Function flags: count:1073741824 (estimated locally) body optimize_size
  Called by: 
  Calls: UpdateClockState/4 (536870913 (estimated locally),0.50 per call) SircStdbyEnable.part.0/5 (inlined) (536870912 (estimated locally),0.50 per call) 
FircStdbyEnable/2 (FircStdbyEnable) @06de2e00
  Type: function definition analyzed
  Visibility: prevailing_def_ironly
  Address is taken.
  References: 
  Referring: intOscCallbacks/0 (addr)
  Availability: available
  Function flags: count:1073741824 (estimated locally) body optimize_size
  Called by: 
  Calls: UpdateClockState/4 (536870913 (estimated locally),0.50 per call) FircStdbyEnable.part.0/6 (inlined) (536870912 (estimated locally),0.50 per call) 
InternalOscillatorEmpty/1 (InternalOscillatorEmpty) @06de2b60
  Type: function definition analyzed
  Visibility: prevailing_def_ironly
  Address is taken.
  References: 
  Referring: intOscCallbacks/0 (addr)
  Availability: available
  Function flags: count:1073741824 (estimated locally) body optimize_size
  Called by: 
  Calls: 
intOscCallbacks/0 (intOscCallbacks) @06ddcd80
  Type: variable definition analyzed
  Visibility: externally_visible public
  References: InternalOscillatorEmpty/1 (addr)FircStdbyEnable/2 (addr)SircStdbyEnable/3 (addr)
  Referring: 
  Availability: available
  Varpool flags: initialized read-only const-value-known

;; Function InternalOscillatorEmpty (InternalOscillatorEmpty, funcdef_no=0, decl_uid=5054, cgraph_uid=1, symbol_order=1)

InternalOscillatorEmpty (const struct Clock_Ip_IrcoscConfigType * config)
{
  <bb 2> [local count: 1073741824]:
  # DEBUG BEGIN_STMT
  return;

}



;; Function SircStdbyEnable (SircStdbyEnable, funcdef_no=2, decl_uid=5058, cgraph_uid=3, symbol_order=3)


Symbols to be put in SSA form
{ D.5080 }
Incremental SSA update started at block: 0
Number of blocks in CFG: 10
Number of blocks to update: 9 ( 90%)


Removing basic block 3
Removing basic block 6
Removing basic block 7
Merging blocks 8 and 9
;; 1 loops found
;;
;; Loop 0
;;  header 0, latch 1
;;  depth 0, outer -1
;;  nodes: 0 1 2 3 4 5
;; 2 succs { 3 4 }
;; 3 succs { 5 }
;; 4 succs { 5 }
;; 5 succs { 1 }
SircStdbyEnable (const struct Clock_Ip_IrcoscConfigType * config)
{
  short unsigned int _1;
  long unsigned int _3;
  long unsigned int _5;
  <unnamed type> _6;
  long unsigned int _11;
  long unsigned int _12;
  <unnamed type> _13;

  <bb 2> [local count: 1073741824]:
  # DEBUG BEGIN_STMT
  _1 = config_8(D)->enable;
  if (_1 != 0)
    goto <bb 3>; [50.00%]
  else
    goto <bb 4>; [50.00%]

  <bb 3> [local count: 536870913]:
  # DEBUG config => config_8(D)
  # DEBUG INLINE_ENTRY SircStdbyEnable
  # DEBUG BEGIN_STMT
  _11 ={v} MEM[(struct SIRC_Type *)1076658176B].MISCELLANEOUS_IN;
  _12 = _11 | 256;
  MEM[(struct SIRC_Type *)1076658176B].MISCELLANEOUS_IN ={v} _12;
  # DEBUG BEGIN_STMT
  _13 = config_8(D)->name;
  UpdateClockState (_13, 255);
  goto <bb 5>; [100.00%]

  <bb 4> [local count: 536870913]:
  # DEBUG BEGIN_STMT
  _3 ={v} MEM[(struct SIRC_Type *)1076658176B].MISCELLANEOUS_IN;
  _5 = _3 & 4294967039;
  MEM[(struct SIRC_Type *)1076658176B].MISCELLANEOUS_IN ={v} _5;
  # DEBUG BEGIN_STMT
  _6 = config_8(D)->name;
  UpdateClockState (_6, 0);

  <bb 5> [local count: 1073741824]:
  # DEBUG config => NULL
  return;

}



;; Function FircStdbyEnable (FircStdbyEnable, funcdef_no=1, decl_uid=5056, cgraph_uid=2, symbol_order=2)


Symbols to be put in SSA form
{ D.5081 }
Incremental SSA update started at block: 0
Number of blocks in CFG: 10
Number of blocks to update: 9 ( 90%)


Removing basic block 3
Removing basic block 6
Removing basic block 7
Merging blocks 8 and 9
;; 1 loops found
;;
;; Loop 0
;;  header 0, latch 1
;;  depth 0, outer -1
;;  nodes: 0 1 2 3 4 5
;; 2 succs { 3 4 }
;; 3 succs { 5 }
;; 4 succs { 5 }
;; 5 succs { 1 }
FircStdbyEnable (const struct Clock_Ip_IrcoscConfigType * config)
{
  short unsigned int _1;
  long unsigned int _3;
  long unsigned int _5;
  <unnamed type> _6;
  long unsigned int _11;
  long unsigned int _12;
  <unnamed type> _13;

  <bb 2> [local count: 1073741824]:
  # DEBUG BEGIN_STMT
  _1 = config_8(D)->enable;
  if (_1 != 0)
    goto <bb 3>; [50.00%]
  else
    goto <bb 4>; [50.00%]

  <bb 3> [local count: 536870913]:
  # DEBUG config => config_8(D)
  # DEBUG INLINE_ENTRY FircStdbyEnable
  # DEBUG BEGIN_STMT
  _11 ={v} MEM[(struct FIRC_Type *)1076690944B].STDBY_ENABLE;
  _12 = _11 | 1;
  MEM[(struct FIRC_Type *)1076690944B].STDBY_ENABLE ={v} _12;
  # DEBUG BEGIN_STMT
  _13 = config_8(D)->name;
  UpdateClockState (_13, 255);
  goto <bb 5>; [100.00%]

  <bb 4> [local count: 536870913]:
  # DEBUG BEGIN_STMT
  _3 ={v} MEM[(struct FIRC_Type *)1076690944B].STDBY_ENABLE;
  _5 = _3 & 4294967294;
  MEM[(struct FIRC_Type *)1076690944B].STDBY_ENABLE ={v} _5;
  # DEBUG BEGIN_STMT
  _6 = config_8(D)->name;
  UpdateClockState (_6, 0);

  <bb 5> [local count: 1073741824]:
  # DEBUG config => NULL
  return;

}


