
Analyzing function: SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_18/76
;; 1 loops found
;;
;; Loop 0
;;  header 0, latch 1
;;  depth 0, outer -1
;;  nodes: 0 1 2 3 4 5
;; 2 succs { 3 5 }
;; 3 succs { 4 5 }
;; 4 succs { 5 }
;; 5 succs { 1 }

Analyzing function body size: SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_18

IPA function summary for SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_18/76 inlinable
  global time:     21.750000
  self size:       16
  global size:     0
  min size:       0
  self stack:      0
  global stack:    0
    size:11.000000, time:8.750000
    size:3.000000, time:2.000000,  executed if:(not inlined)
  calls:
    Sys_GetCoreID/77 function body not available
      loop depth: 0 freq:1.00 size: 2 time: 11


Analyzing function: SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_18/75
;; 1 loops found
;;
;; Loop 0
;;  header 0, latch 1
;;  depth 0, outer -1
;;  nodes: 0 1 2 3 4 5
;; 2 succs { 3 5 }
;; 3 succs { 4 5 }
;; 4 succs { 5 }
;; 5 succs { 1 }

Analyzing function body size: SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_18

IPA function summary for SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_18/75 inlinable
  global time:     22.250000
  self size:       18
  global size:     0
  min size:       0
  self stack:      0
  global stack:    0
    size:13.000000, time:9.250000
    size:3.000000, time:2.000000,  executed if:(not inlined)
  calls:
    Sys_GetCoreID/77 function body not available
      loop depth: 0 freq:1.00 size: 2 time: 11


Analyzing function: SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_17/74
;; 1 loops found
;;
;; Loop 0
;;  header 0, latch 1
;;  depth 0, outer -1
;;  nodes: 0 1 2 3 4 5
;; 2 succs { 3 5 }
;; 3 succs { 4 5 }
;; 4 succs { 5 }
;; 5 succs { 1 }

Analyzing function body size: SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_17

IPA function summary for SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_17/74 inlinable
  global time:     21.750000
  self size:       16
  global size:     0
  min size:       0
  self stack:      0
  global stack:    0
    size:11.000000, time:8.750000
    size:3.000000, time:2.000000,  executed if:(not inlined)
  calls:
    Sys_GetCoreID/77 function body not available
      loop depth: 0 freq:1.00 size: 2 time: 11


Analyzing function: SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_17/73
;; 1 loops found
;;
;; Loop 0
;;  header 0, latch 1
;;  depth 0, outer -1
;;  nodes: 0 1 2 3 4 5
;; 2 succs { 3 5 }
;; 3 succs { 4 5 }
;; 4 succs { 5 }
;; 5 succs { 1 }

Analyzing function body size: SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_17

IPA function summary for SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_17/73 inlinable
  global time:     22.250000
  self size:       18
  global size:     0
  min size:       0
  self stack:      0
  global stack:    0
    size:13.000000, time:9.250000
    size:3.000000, time:2.000000,  executed if:(not inlined)
  calls:
    Sys_GetCoreID/77 function body not available
      loop depth: 0 freq:1.00 size: 2 time: 11


Analyzing function: SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_16/72
;; 1 loops found
;;
;; Loop 0
;;  header 0, latch 1
;;  depth 0, outer -1
;;  nodes: 0 1 2 3 4 5
;; 2 succs { 3 5 }
;; 3 succs { 4 5 }
;; 4 succs { 5 }
;; 5 succs { 1 }

Analyzing function body size: SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_16

IPA function summary for SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_16/72 inlinable
  global time:     21.750000
  self size:       16
  global size:     0
  min size:       0
  self stack:      0
  global stack:    0
    size:11.000000, time:8.750000
    size:3.000000, time:2.000000,  executed if:(not inlined)
  calls:
    Sys_GetCoreID/77 function body not available
      loop depth: 0 freq:1.00 size: 2 time: 11


Analyzing function: SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_16/71
;; 1 loops found
;;
;; Loop 0
;;  header 0, latch 1
;;  depth 0, outer -1
;;  nodes: 0 1 2 3 4 5
;; 2 succs { 3 5 }
;; 3 succs { 4 5 }
;; 4 succs { 5 }
;; 5 succs { 1 }

Analyzing function body size: SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_16

IPA function summary for SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_16/71 inlinable
  global time:     22.250000
  self size:       18
  global size:     0
  min size:       0
  self stack:      0
  global stack:    0
    size:13.000000, time:9.250000
    size:3.000000, time:2.000000,  executed if:(not inlined)
  calls:
    Sys_GetCoreID/77 function body not available
      loop depth: 0 freq:1.00 size: 2 time: 11


Analyzing function: SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_15/70
;; 1 loops found
;;
;; Loop 0
;;  header 0, latch 1
;;  depth 0, outer -1
;;  nodes: 0 1 2 3 4 5
;; 2 succs { 3 5 }
;; 3 succs { 4 5 }
;; 4 succs { 5 }
;; 5 succs { 1 }

Analyzing function body size: SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_15

IPA function summary for SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_15/70 inlinable
  global time:     21.750000
  self size:       16
  global size:     0
  min size:       0
  self stack:      0
  global stack:    0
    size:11.000000, time:8.750000
    size:3.000000, time:2.000000,  executed if:(not inlined)
  calls:
    Sys_GetCoreID/77 function body not available
      loop depth: 0 freq:1.00 size: 2 time: 11


Analyzing function: SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_15/69
;; 1 loops found
;;
;; Loop 0
;;  header 0, latch 1
;;  depth 0, outer -1
;;  nodes: 0 1 2 3 4 5
;; 2 succs { 3 5 }
;; 3 succs { 4 5 }
;; 4 succs { 5 }
;; 5 succs { 1 }

Analyzing function body size: SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_15

IPA function summary for SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_15/69 inlinable
  global time:     22.250000
  self size:       18
  global size:     0
  min size:       0
  self stack:      0
  global stack:    0
    size:13.000000, time:9.250000
    size:3.000000, time:2.000000,  executed if:(not inlined)
  calls:
    Sys_GetCoreID/77 function body not available
      loop depth: 0 freq:1.00 size: 2 time: 11


Analyzing function: SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_14/68
;; 1 loops found
;;
;; Loop 0
;;  header 0, latch 1
;;  depth 0, outer -1
;;  nodes: 0 1 2 3 4 5
;; 2 succs { 3 5 }
;; 3 succs { 4 5 }
;; 4 succs { 5 }
;; 5 succs { 1 }

Analyzing function body size: SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_14

IPA function summary for SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_14/68 inlinable
  global time:     21.750000
  self size:       16
  global size:     0
  min size:       0
  self stack:      0
  global stack:    0
    size:11.000000, time:8.750000
    size:3.000000, time:2.000000,  executed if:(not inlined)
  calls:
    Sys_GetCoreID/77 function body not available
      loop depth: 0 freq:1.00 size: 2 time: 11


Analyzing function: SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_14/67
;; 1 loops found
;;
;; Loop 0
;;  header 0, latch 1
;;  depth 0, outer -1
;;  nodes: 0 1 2 3 4 5
;; 2 succs { 3 5 }
;; 3 succs { 4 5 }
;; 4 succs { 5 }
;; 5 succs { 1 }

Analyzing function body size: SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_14

IPA function summary for SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_14/67 inlinable
  global time:     22.250000
  self size:       18
  global size:     0
  min size:       0
  self stack:      0
  global stack:    0
    size:13.000000, time:9.250000
    size:3.000000, time:2.000000,  executed if:(not inlined)
  calls:
    Sys_GetCoreID/77 function body not available
      loop depth: 0 freq:1.00 size: 2 time: 11


Analyzing function: SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_13/66
;; 1 loops found
;;
;; Loop 0
;;  header 0, latch 1
;;  depth 0, outer -1
;;  nodes: 0 1 2 3 4 5
;; 2 succs { 3 5 }
;; 3 succs { 4 5 }
;; 4 succs { 5 }
;; 5 succs { 1 }

Analyzing function body size: SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_13

IPA function summary for SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_13/66 inlinable
  global time:     21.750000
  self size:       16
  global size:     0
  min size:       0
  self stack:      0
  global stack:    0
    size:11.000000, time:8.750000
    size:3.000000, time:2.000000,  executed if:(not inlined)
  calls:
    Sys_GetCoreID/77 function body not available
      loop depth: 0 freq:1.00 size: 2 time: 11


Analyzing function: SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_13/65
;; 1 loops found
;;
;; Loop 0
;;  header 0, latch 1
;;  depth 0, outer -1
;;  nodes: 0 1 2 3 4 5
;; 2 succs { 3 5 }
;; 3 succs { 4 5 }
;; 4 succs { 5 }
;; 5 succs { 1 }

Analyzing function body size: SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_13

IPA function summary for SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_13/65 inlinable
  global time:     22.250000
  self size:       18
  global size:     0
  min size:       0
  self stack:      0
  global stack:    0
    size:13.000000, time:9.250000
    size:3.000000, time:2.000000,  executed if:(not inlined)
  calls:
    Sys_GetCoreID/77 function body not available
      loop depth: 0 freq:1.00 size: 2 time: 11


Analyzing function: SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_12/64
;; 1 loops found
;;
;; Loop 0
;;  header 0, latch 1
;;  depth 0, outer -1
;;  nodes: 0 1 2 3 4 5
;; 2 succs { 3 5 }
;; 3 succs { 4 5 }
;; 4 succs { 5 }
;; 5 succs { 1 }

Analyzing function body size: SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_12

IPA function summary for SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_12/64 inlinable
  global time:     21.750000
  self size:       16
  global size:     0
  min size:       0
  self stack:      0
  global stack:    0
    size:11.000000, time:8.750000
    size:3.000000, time:2.000000,  executed if:(not inlined)
  calls:
    Sys_GetCoreID/77 function body not available
      loop depth: 0 freq:1.00 size: 2 time: 11


Analyzing function: SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_12/63
;; 1 loops found
;;
;; Loop 0
;;  header 0, latch 1
;;  depth 0, outer -1
;;  nodes: 0 1 2 3 4 5
;; 2 succs { 3 5 }
;; 3 succs { 4 5 }
;; 4 succs { 5 }
;; 5 succs { 1 }

Analyzing function body size: SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_12

IPA function summary for SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_12/63 inlinable
  global time:     22.250000
  self size:       18
  global size:     0
  min size:       0
  self stack:      0
  global stack:    0
    size:13.000000, time:9.250000
    size:3.000000, time:2.000000,  executed if:(not inlined)
  calls:
    Sys_GetCoreID/77 function body not available
      loop depth: 0 freq:1.00 size: 2 time: 11


Analyzing function: SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_11/62
;; 1 loops found
;;
;; Loop 0
;;  header 0, latch 1
;;  depth 0, outer -1
;;  nodes: 0 1 2 3 4 5
;; 2 succs { 3 5 }
;; 3 succs { 4 5 }
;; 4 succs { 5 }
;; 5 succs { 1 }

Analyzing function body size: SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_11

IPA function summary for SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_11/62 inlinable
  global time:     21.750000
  self size:       16
  global size:     0
  min size:       0
  self stack:      0
  global stack:    0
    size:11.000000, time:8.750000
    size:3.000000, time:2.000000,  executed if:(not inlined)
  calls:
    Sys_GetCoreID/77 function body not available
      loop depth: 0 freq:1.00 size: 2 time: 11


Analyzing function: SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_11/61
;; 1 loops found
;;
;; Loop 0
;;  header 0, latch 1
;;  depth 0, outer -1
;;  nodes: 0 1 2 3 4 5
;; 2 succs { 3 5 }
;; 3 succs { 4 5 }
;; 4 succs { 5 }
;; 5 succs { 1 }

Analyzing function body size: SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_11

IPA function summary for SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_11/61 inlinable
  global time:     22.250000
  self size:       18
  global size:     0
  min size:       0
  self stack:      0
  global stack:    0
    size:13.000000, time:9.250000
    size:3.000000, time:2.000000,  executed if:(not inlined)
  calls:
    Sys_GetCoreID/77 function body not available
      loop depth: 0 freq:1.00 size: 2 time: 11


Analyzing function: SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_10/60
;; 1 loops found
;;
;; Loop 0
;;  header 0, latch 1
;;  depth 0, outer -1
;;  nodes: 0 1 2 3 4 5
;; 2 succs { 3 5 }
;; 3 succs { 4 5 }
;; 4 succs { 5 }
;; 5 succs { 1 }

Analyzing function body size: SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_10

IPA function summary for SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_10/60 inlinable
  global time:     21.750000
  self size:       16
  global size:     0
  min size:       0
  self stack:      0
  global stack:    0
    size:11.000000, time:8.750000
    size:3.000000, time:2.000000,  executed if:(not inlined)
  calls:
    Sys_GetCoreID/77 function body not available
      loop depth: 0 freq:1.00 size: 2 time: 11


Analyzing function: SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_10/59
;; 1 loops found
;;
;; Loop 0
;;  header 0, latch 1
;;  depth 0, outer -1
;;  nodes: 0 1 2 3 4 5
;; 2 succs { 3 5 }
;; 3 succs { 4 5 }
;; 4 succs { 5 }
;; 5 succs { 1 }

Analyzing function body size: SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_10

IPA function summary for SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_10/59 inlinable
  global time:     22.250000
  self size:       18
  global size:     0
  min size:       0
  self stack:      0
  global stack:    0
    size:13.000000, time:9.250000
    size:3.000000, time:2.000000,  executed if:(not inlined)
  calls:
    Sys_GetCoreID/77 function body not available
      loop depth: 0 freq:1.00 size: 2 time: 11


Analyzing function: SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_09/58
;; 1 loops found
;;
;; Loop 0
;;  header 0, latch 1
;;  depth 0, outer -1
;;  nodes: 0 1 2 3 4 5
;; 2 succs { 3 5 }
;; 3 succs { 4 5 }
;; 4 succs { 5 }
;; 5 succs { 1 }

Analyzing function body size: SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_09

IPA function summary for SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_09/58 inlinable
  global time:     21.750000
  self size:       16
  global size:     0
  min size:       0
  self stack:      0
  global stack:    0
    size:11.000000, time:8.750000
    size:3.000000, time:2.000000,  executed if:(not inlined)
  calls:
    Sys_GetCoreID/77 function body not available
      loop depth: 0 freq:1.00 size: 2 time: 11


Analyzing function: SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_09/57
;; 1 loops found
;;
;; Loop 0
;;  header 0, latch 1
;;  depth 0, outer -1
;;  nodes: 0 1 2 3 4 5
;; 2 succs { 3 5 }
;; 3 succs { 4 5 }
;; 4 succs { 5 }
;; 5 succs { 1 }

Analyzing function body size: SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_09

IPA function summary for SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_09/57 inlinable
  global time:     22.250000
  self size:       18
  global size:     0
  min size:       0
  self stack:      0
  global stack:    0
    size:13.000000, time:9.250000
    size:3.000000, time:2.000000,  executed if:(not inlined)
  calls:
    Sys_GetCoreID/77 function body not available
      loop depth: 0 freq:1.00 size: 2 time: 11


Analyzing function: SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_08/56
;; 1 loops found
;;
;; Loop 0
;;  header 0, latch 1
;;  depth 0, outer -1
;;  nodes: 0 1 2 3 4 5
;; 2 succs { 3 5 }
;; 3 succs { 4 5 }
;; 4 succs { 5 }
;; 5 succs { 1 }

Analyzing function body size: SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_08

IPA function summary for SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_08/56 inlinable
  global time:     21.750000
  self size:       16
  global size:     0
  min size:       0
  self stack:      0
  global stack:    0
    size:11.000000, time:8.750000
    size:3.000000, time:2.000000,  executed if:(not inlined)
  calls:
    Sys_GetCoreID/77 function body not available
      loop depth: 0 freq:1.00 size: 2 time: 11


Analyzing function: SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_08/55
;; 1 loops found
;;
;; Loop 0
;;  header 0, latch 1
;;  depth 0, outer -1
;;  nodes: 0 1 2 3 4 5
;; 2 succs { 3 5 }
;; 3 succs { 4 5 }
;; 4 succs { 5 }
;; 5 succs { 1 }

Analyzing function body size: SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_08

IPA function summary for SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_08/55 inlinable
  global time:     22.250000
  self size:       18
  global size:     0
  min size:       0
  self stack:      0
  global stack:    0
    size:13.000000, time:9.250000
    size:3.000000, time:2.000000,  executed if:(not inlined)
  calls:
    Sys_GetCoreID/77 function body not available
      loop depth: 0 freq:1.00 size: 2 time: 11


Analyzing function: SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_07/54
;; 1 loops found
;;
;; Loop 0
;;  header 0, latch 1
;;  depth 0, outer -1
;;  nodes: 0 1 2 3 4 5
;; 2 succs { 3 5 }
;; 3 succs { 4 5 }
;; 4 succs { 5 }
;; 5 succs { 1 }

Analyzing function body size: SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_07

IPA function summary for SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_07/54 inlinable
  global time:     21.750000
  self size:       16
  global size:     0
  min size:       0
  self stack:      0
  global stack:    0
    size:11.000000, time:8.750000
    size:3.000000, time:2.000000,  executed if:(not inlined)
  calls:
    Sys_GetCoreID/77 function body not available
      loop depth: 0 freq:1.00 size: 2 time: 11


Analyzing function: SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_07/53
;; 1 loops found
;;
;; Loop 0
;;  header 0, latch 1
;;  depth 0, outer -1
;;  nodes: 0 1 2 3 4 5
;; 2 succs { 3 5 }
;; 3 succs { 4 5 }
;; 4 succs { 5 }
;; 5 succs { 1 }

Analyzing function body size: SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_07

IPA function summary for SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_07/53 inlinable
  global time:     22.250000
  self size:       18
  global size:     0
  min size:       0
  self stack:      0
  global stack:    0
    size:13.000000, time:9.250000
    size:3.000000, time:2.000000,  executed if:(not inlined)
  calls:
    Sys_GetCoreID/77 function body not available
      loop depth: 0 freq:1.00 size: 2 time: 11


Analyzing function: SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_06/52
;; 1 loops found
;;
;; Loop 0
;;  header 0, latch 1
;;  depth 0, outer -1
;;  nodes: 0 1 2 3 4 5
;; 2 succs { 3 5 }
;; 3 succs { 4 5 }
;; 4 succs { 5 }
;; 5 succs { 1 }

Analyzing function body size: SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_06

IPA function summary for SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_06/52 inlinable
  global time:     21.750000
  self size:       16
  global size:     0
  min size:       0
  self stack:      0
  global stack:    0
    size:11.000000, time:8.750000
    size:3.000000, time:2.000000,  executed if:(not inlined)
  calls:
    Sys_GetCoreID/77 function body not available
      loop depth: 0 freq:1.00 size: 2 time: 11


Analyzing function: SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_06/51
;; 1 loops found
;;
;; Loop 0
;;  header 0, latch 1
;;  depth 0, outer -1
;;  nodes: 0 1 2 3 4 5
;; 2 succs { 3 5 }
;; 3 succs { 4 5 }
;; 4 succs { 5 }
;; 5 succs { 1 }

Analyzing function body size: SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_06

IPA function summary for SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_06/51 inlinable
  global time:     22.250000
  self size:       18
  global size:     0
  min size:       0
  self stack:      0
  global stack:    0
    size:13.000000, time:9.250000
    size:3.000000, time:2.000000,  executed if:(not inlined)
  calls:
    Sys_GetCoreID/77 function body not available
      loop depth: 0 freq:1.00 size: 2 time: 11


Analyzing function: SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_05/50
;; 1 loops found
;;
;; Loop 0
;;  header 0, latch 1
;;  depth 0, outer -1
;;  nodes: 0 1 2 3 4 5
;; 2 succs { 3 5 }
;; 3 succs { 4 5 }
;; 4 succs { 5 }
;; 5 succs { 1 }

Analyzing function body size: SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_05

IPA function summary for SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_05/50 inlinable
  global time:     21.750000
  self size:       16
  global size:     0
  min size:       0
  self stack:      0
  global stack:    0
    size:11.000000, time:8.750000
    size:3.000000, time:2.000000,  executed if:(not inlined)
  calls:
    Sys_GetCoreID/77 function body not available
      loop depth: 0 freq:1.00 size: 2 time: 11


Analyzing function: SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_05/49
;; 1 loops found
;;
;; Loop 0
;;  header 0, latch 1
;;  depth 0, outer -1
;;  nodes: 0 1 2 3 4 5
;; 2 succs { 3 5 }
;; 3 succs { 4 5 }
;; 4 succs { 5 }
;; 5 succs { 1 }

Analyzing function body size: SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_05

IPA function summary for SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_05/49 inlinable
  global time:     22.250000
  self size:       18
  global size:     0
  min size:       0
  self stack:      0
  global stack:    0
    size:13.000000, time:9.250000
    size:3.000000, time:2.000000,  executed if:(not inlined)
  calls:
    Sys_GetCoreID/77 function body not available
      loop depth: 0 freq:1.00 size: 2 time: 11


Analyzing function: SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_04/48
;; 1 loops found
;;
;; Loop 0
;;  header 0, latch 1
;;  depth 0, outer -1
;;  nodes: 0 1 2 3 4 5
;; 2 succs { 3 5 }
;; 3 succs { 4 5 }
;; 4 succs { 5 }
;; 5 succs { 1 }

Analyzing function body size: SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_04

IPA function summary for SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_04/48 inlinable
  global time:     21.750000
  self size:       16
  global size:     0
  min size:       0
  self stack:      0
  global stack:    0
    size:11.000000, time:8.750000
    size:3.000000, time:2.000000,  executed if:(not inlined)
  calls:
    Sys_GetCoreID/77 function body not available
      loop depth: 0 freq:1.00 size: 2 time: 11


Analyzing function: SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_04/47
;; 1 loops found
;;
;; Loop 0
;;  header 0, latch 1
;;  depth 0, outer -1
;;  nodes: 0 1 2 3 4 5
;; 2 succs { 3 5 }
;; 3 succs { 4 5 }
;; 4 succs { 5 }
;; 5 succs { 1 }

Analyzing function body size: SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_04

IPA function summary for SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_04/47 inlinable
  global time:     22.250000
  self size:       18
  global size:     0
  min size:       0
  self stack:      0
  global stack:    0
    size:13.000000, time:9.250000
    size:3.000000, time:2.000000,  executed if:(not inlined)
  calls:
    Sys_GetCoreID/77 function body not available
      loop depth: 0 freq:1.00 size: 2 time: 11


Analyzing function: SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_03/46
;; 1 loops found
;;
;; Loop 0
;;  header 0, latch 1
;;  depth 0, outer -1
;;  nodes: 0 1 2 3 4 5
;; 2 succs { 3 5 }
;; 3 succs { 4 5 }
;; 4 succs { 5 }
;; 5 succs { 1 }

Analyzing function body size: SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_03

IPA function summary for SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_03/46 inlinable
  global time:     21.750000
  self size:       16
  global size:     0
  min size:       0
  self stack:      0
  global stack:    0
    size:11.000000, time:8.750000
    size:3.000000, time:2.000000,  executed if:(not inlined)
  calls:
    Sys_GetCoreID/77 function body not available
      loop depth: 0 freq:1.00 size: 2 time: 11


Analyzing function: SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_03/45
;; 1 loops found
;;
;; Loop 0
;;  header 0, latch 1
;;  depth 0, outer -1
;;  nodes: 0 1 2 3 4 5
;; 2 succs { 3 5 }
;; 3 succs { 4 5 }
;; 4 succs { 5 }
;; 5 succs { 1 }

Analyzing function body size: SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_03

IPA function summary for SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_03/45 inlinable
  global time:     22.250000
  self size:       18
  global size:     0
  min size:       0
  self stack:      0
  global stack:    0
    size:13.000000, time:9.250000
    size:3.000000, time:2.000000,  executed if:(not inlined)
  calls:
    Sys_GetCoreID/77 function body not available
      loop depth: 0 freq:1.00 size: 2 time: 11


Analyzing function: SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_02/44
;; 1 loops found
;;
;; Loop 0
;;  header 0, latch 1
;;  depth 0, outer -1
;;  nodes: 0 1 2 3 4 5
;; 2 succs { 3 5 }
;; 3 succs { 4 5 }
;; 4 succs { 5 }
;; 5 succs { 1 }

Analyzing function body size: SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_02

IPA function summary for SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_02/44 inlinable
  global time:     21.750000
  self size:       16
  global size:     0
  min size:       0
  self stack:      0
  global stack:    0
    size:11.000000, time:8.750000
    size:3.000000, time:2.000000,  executed if:(not inlined)
  calls:
    Sys_GetCoreID/77 function body not available
      loop depth: 0 freq:1.00 size: 2 time: 11


Analyzing function: SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_02/43
;; 1 loops found
;;
;; Loop 0
;;  header 0, latch 1
;;  depth 0, outer -1
;;  nodes: 0 1 2 3 4 5
;; 2 succs { 3 5 }
;; 3 succs { 4 5 }
;; 4 succs { 5 }
;; 5 succs { 1 }

Analyzing function body size: SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_02

IPA function summary for SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_02/43 inlinable
  global time:     22.250000
  self size:       18
  global size:     0
  min size:       0
  self stack:      0
  global stack:    0
    size:13.000000, time:9.250000
    size:3.000000, time:2.000000,  executed if:(not inlined)
  calls:
    Sys_GetCoreID/77 function body not available
      loop depth: 0 freq:1.00 size: 2 time: 11


Analyzing function: SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_01/42
;; 1 loops found
;;
;; Loop 0
;;  header 0, latch 1
;;  depth 0, outer -1
;;  nodes: 0 1 2 3 4 5
;; 2 succs { 3 5 }
;; 3 succs { 4 5 }
;; 4 succs { 5 }
;; 5 succs { 1 }

Analyzing function body size: SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_01

IPA function summary for SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_01/42 inlinable
  global time:     21.750000
  self size:       16
  global size:     0
  min size:       0
  self stack:      0
  global stack:    0
    size:11.000000, time:8.750000
    size:3.000000, time:2.000000,  executed if:(not inlined)
  calls:
    Sys_GetCoreID/77 function body not available
      loop depth: 0 freq:1.00 size: 2 time: 11


Analyzing function: SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_01/41
;; 1 loops found
;;
;; Loop 0
;;  header 0, latch 1
;;  depth 0, outer -1
;;  nodes: 0 1 2 3 4 5
;; 2 succs { 3 5 }
;; 3 succs { 4 5 }
;; 4 succs { 5 }
;; 5 succs { 1 }

Analyzing function body size: SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_01

IPA function summary for SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_01/41 inlinable
  global time:     22.250000
  self size:       18
  global size:     0
  min size:       0
  self stack:      0
  global stack:    0
    size:13.000000, time:9.250000
    size:3.000000, time:2.000000,  executed if:(not inlined)
  calls:
    Sys_GetCoreID/77 function body not available
      loop depth: 0 freq:1.00 size: 2 time: 11


Analyzing function: SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_00/40
;; 1 loops found
;;
;; Loop 0
;;  header 0, latch 1
;;  depth 0, outer -1
;;  nodes: 0 1 2 3 4 5
;; 2 succs { 3 5 }
;; 3 succs { 4 5 }
;; 4 succs { 5 }
;; 5 succs { 1 }

Analyzing function body size: SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_00

IPA function summary for SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_00/40 inlinable
  global time:     21.750000
  self size:       16
  global size:     0
  min size:       0
  self stack:      0
  global stack:    0
    size:11.000000, time:8.750000
    size:3.000000, time:2.000000,  executed if:(not inlined)
  calls:
    Sys_GetCoreID/77 function body not available
      loop depth: 0 freq:1.00 size: 2 time: 11


Analyzing function: SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_00/39
;; 1 loops found
;;
;; Loop 0
;;  header 0, latch 1
;;  depth 0, outer -1
;;  nodes: 0 1 2 3 4 5
;; 2 succs { 3 5 }
;; 3 succs { 4 5 }
;; 4 succs { 5 }
;; 5 succs { 1 }

Analyzing function body size: SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_00

IPA function summary for SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_00/39 inlinable
  global time:     22.250000
  self size:       18
  global size:     0
  min size:       0
  self stack:      0
  global stack:    0
    size:13.000000, time:9.250000
    size:3.000000, time:2.000000,  executed if:(not inlined)
  calls:
    Sys_GetCoreID/77 function body not available
      loop depth: 0 freq:1.00 size: 2 time: 11


Analyzing function: Spi_schm_read_msr/38
;; 1 loops found
;;
;; Loop 0
;;  header 0, latch 1
;;  depth 0, outer -1
;;  nodes: 0 1 2
;; 2 succs { 1 }

Analyzing function body size: Spi_schm_read_msr

IPA function summary for Spi_schm_read_msr/38 inlinable
  global time:     3.000000
  self size:       4
  global size:     0
  min size:       0
  self stack:      0
  global stack:    0
    size:1.000000, time:1.000000
    size:3.000000, time:2.000000,  executed if:(not inlined)
  calls:

Symbol table:

Sys_GetCoreID/77 (Sys_GetCoreID) @06c36ee0
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_18/76 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_18/75 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_17/74 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_17/73 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_16/72 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_16/71 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_15/70 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_15/69 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_14/68 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_14/67 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_13/66 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_13/65 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_12/64 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_12/63 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_11/62 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_11/61 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_10/60 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_10/59 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_09/58 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_09/57 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_08/56 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_08/55 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_07/54 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_07/53 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_06/52 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_06/51 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_05/50 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_05/49 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_04/48 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_04/47 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_03/46 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_03/45 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_02/44 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_02/43 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_01/42 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_01/41 (1073741824 (estimated locally),1.00 per call) SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_00/40 (1073741824 (estimated locally),1.00 per call) SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_00/39 (1073741824 (estimated locally),1.00 per call) 
  Calls: 
SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_18/76 (SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_18) @06c369a0
  Type: function definition analyzed
  Visibility: externally_visible public
  References: reentry_guard_SPI_EXCLUSIVE_AREA_18/37 (read)reentry_guard_SPI_EXCLUSIVE_AREA_18/37 (write)msr_SPI_EXCLUSIVE_AREA_18/36 (read)reentry_guard_SPI_EXCLUSIVE_AREA_18/37 (read)
  Referring: 
  Availability: available
  Function flags: count:1073741824 (estimated locally) body optimize_size
  Called by: 
  Calls: Sys_GetCoreID/77 (1073741824 (estimated locally),1.00 per call) 
SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_18/75 (SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_18) @06c36700
  Type: function definition analyzed
  Visibility: externally_visible public
  References: reentry_guard_SPI_EXCLUSIVE_AREA_18/37 (read)msr_SPI_EXCLUSIVE_AREA_18/36 (write)msr_SPI_EXCLUSIVE_AREA_18/36 (read)reentry_guard_SPI_EXCLUSIVE_AREA_18/37 (read)reentry_guard_SPI_EXCLUSIVE_AREA_18/37 (write)
  Referring: 
  Availability: available
  Function flags: count:1073741824 (estimated locally) body optimize_size
  Called by: 
  Calls: Sys_GetCoreID/77 (1073741824 (estimated locally),1.00 per call) 
SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_17/74 (SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_17) @06c36460
  Type: function definition analyzed
  Visibility: externally_visible public
  References: reentry_guard_SPI_EXCLUSIVE_AREA_17/35 (read)reentry_guard_SPI_EXCLUSIVE_AREA_17/35 (write)msr_SPI_EXCLUSIVE_AREA_17/34 (read)reentry_guard_SPI_EXCLUSIVE_AREA_17/35 (read)
  Referring: 
  Availability: available
  Function flags: count:1073741824 (estimated locally) body optimize_size
  Called by: 
  Calls: Sys_GetCoreID/77 (1073741824 (estimated locally),1.00 per call) 
SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_17/73 (SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_17) @06c361c0
  Type: function definition analyzed
  Visibility: externally_visible public
  References: reentry_guard_SPI_EXCLUSIVE_AREA_17/35 (read)msr_SPI_EXCLUSIVE_AREA_17/34 (write)msr_SPI_EXCLUSIVE_AREA_17/34 (read)reentry_guard_SPI_EXCLUSIVE_AREA_17/35 (read)reentry_guard_SPI_EXCLUSIVE_AREA_17/35 (write)
  Referring: 
  Availability: available
  Function flags: count:1073741824 (estimated locally) body optimize_size
  Called by: 
  Calls: Sys_GetCoreID/77 (1073741824 (estimated locally),1.00 per call) 
SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_16/72 (SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_16) @06c2dd20
  Type: function definition analyzed
  Visibility: externally_visible public
  References: reentry_guard_SPI_EXCLUSIVE_AREA_16/33 (read)reentry_guard_SPI_EXCLUSIVE_AREA_16/33 (write)msr_SPI_EXCLUSIVE_AREA_16/32 (read)reentry_guard_SPI_EXCLUSIVE_AREA_16/33 (read)
  Referring: 
  Availability: available
  Function flags: count:1073741824 (estimated locally) body optimize_size
  Called by: 
  Calls: Sys_GetCoreID/77 (1073741824 (estimated locally),1.00 per call) 
SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_16/71 (SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_16) @06c2d7e0
  Type: function definition analyzed
  Visibility: externally_visible public
  References: reentry_guard_SPI_EXCLUSIVE_AREA_16/33 (read)msr_SPI_EXCLUSIVE_AREA_16/32 (write)msr_SPI_EXCLUSIVE_AREA_16/32 (read)reentry_guard_SPI_EXCLUSIVE_AREA_16/33 (read)reentry_guard_SPI_EXCLUSIVE_AREA_16/33 (write)
  Referring: 
  Availability: available
  Function flags: count:1073741824 (estimated locally) body optimize_size
  Called by: 
  Calls: Sys_GetCoreID/77 (1073741824 (estimated locally),1.00 per call) 
SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_15/70 (SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_15) @06c2d2a0
  Type: function definition analyzed
  Visibility: externally_visible public
  References: reentry_guard_SPI_EXCLUSIVE_AREA_15/31 (read)reentry_guard_SPI_EXCLUSIVE_AREA_15/31 (write)msr_SPI_EXCLUSIVE_AREA_15/30 (read)reentry_guard_SPI_EXCLUSIVE_AREA_15/31 (read)
  Referring: 
  Availability: available
  Function flags: count:1073741824 (estimated locally) body optimize_size
  Called by: 
  Calls: Sys_GetCoreID/77 (1073741824 (estimated locally),1.00 per call) 
SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_15/69 (SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_15) @06c2dee0
  Type: function definition analyzed
  Visibility: externally_visible public
  References: reentry_guard_SPI_EXCLUSIVE_AREA_15/31 (read)msr_SPI_EXCLUSIVE_AREA_15/30 (write)msr_SPI_EXCLUSIVE_AREA_15/30 (read)reentry_guard_SPI_EXCLUSIVE_AREA_15/31 (read)reentry_guard_SPI_EXCLUSIVE_AREA_15/31 (write)
  Referring: 
  Availability: available
  Function flags: count:1073741824 (estimated locally) body optimize_size
  Called by: 
  Calls: Sys_GetCoreID/77 (1073741824 (estimated locally),1.00 per call) 
SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_14/68 (SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_14) @06c2dc40
  Type: function definition analyzed
  Visibility: externally_visible public
  References: reentry_guard_SPI_EXCLUSIVE_AREA_14/29 (read)reentry_guard_SPI_EXCLUSIVE_AREA_14/29 (write)msr_SPI_EXCLUSIVE_AREA_14/28 (read)reentry_guard_SPI_EXCLUSIVE_AREA_14/29 (read)
  Referring: 
  Availability: available
  Function flags: count:1073741824 (estimated locally) body optimize_size
  Called by: 
  Calls: Sys_GetCoreID/77 (1073741824 (estimated locally),1.00 per call) 
SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_14/67 (SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_14) @06c2d9a0
  Type: function definition analyzed
  Visibility: externally_visible public
  References: reentry_guard_SPI_EXCLUSIVE_AREA_14/29 (read)msr_SPI_EXCLUSIVE_AREA_14/28 (write)msr_SPI_EXCLUSIVE_AREA_14/28 (read)reentry_guard_SPI_EXCLUSIVE_AREA_14/29 (read)reentry_guard_SPI_EXCLUSIVE_AREA_14/29 (write)
  Referring: 
  Availability: available
  Function flags: count:1073741824 (estimated locally) body optimize_size
  Called by: 
  Calls: Sys_GetCoreID/77 (1073741824 (estimated locally),1.00 per call) 
SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_13/66 (SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_13) @06c2d700
  Type: function definition analyzed
  Visibility: externally_visible public
  References: reentry_guard_SPI_EXCLUSIVE_AREA_13/27 (read)reentry_guard_SPI_EXCLUSIVE_AREA_13/27 (write)msr_SPI_EXCLUSIVE_AREA_13/26 (read)reentry_guard_SPI_EXCLUSIVE_AREA_13/27 (read)
  Referring: 
  Availability: available
  Function flags: count:1073741824 (estimated locally) body optimize_size
  Called by: 
  Calls: Sys_GetCoreID/77 (1073741824 (estimated locally),1.00 per call) 
SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_13/65 (SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_13) @06c2d460
  Type: function definition analyzed
  Visibility: externally_visible public
  References: reentry_guard_SPI_EXCLUSIVE_AREA_13/27 (read)msr_SPI_EXCLUSIVE_AREA_13/26 (write)msr_SPI_EXCLUSIVE_AREA_13/26 (read)reentry_guard_SPI_EXCLUSIVE_AREA_13/27 (read)reentry_guard_SPI_EXCLUSIVE_AREA_13/27 (write)
  Referring: 
  Availability: available
  Function flags: count:1073741824 (estimated locally) body optimize_size
  Called by: 
  Calls: Sys_GetCoreID/77 (1073741824 (estimated locally),1.00 per call) 
SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_12/64 (SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_12) @06c2d1c0
  Type: function definition analyzed
  Visibility: externally_visible public
  References: reentry_guard_SPI_EXCLUSIVE_AREA_12/25 (read)reentry_guard_SPI_EXCLUSIVE_AREA_12/25 (write)msr_SPI_EXCLUSIVE_AREA_12/24 (read)reentry_guard_SPI_EXCLUSIVE_AREA_12/25 (read)
  Referring: 
  Availability: available
  Function flags: count:1073741824 (estimated locally) body optimize_size
  Called by: 
  Calls: Sys_GetCoreID/77 (1073741824 (estimated locally),1.00 per call) 
SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_12/63 (SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_12) @06c27d20
  Type: function definition analyzed
  Visibility: externally_visible public
  References: reentry_guard_SPI_EXCLUSIVE_AREA_12/25 (read)msr_SPI_EXCLUSIVE_AREA_12/24 (write)msr_SPI_EXCLUSIVE_AREA_12/24 (read)reentry_guard_SPI_EXCLUSIVE_AREA_12/25 (read)reentry_guard_SPI_EXCLUSIVE_AREA_12/25 (write)
  Referring: 
  Availability: available
  Function flags: count:1073741824 (estimated locally) body optimize_size
  Called by: 
  Calls: Sys_GetCoreID/77 (1073741824 (estimated locally),1.00 per call) 
SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_11/62 (SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_11) @06c277e0
  Type: function definition analyzed
  Visibility: externally_visible public
  References: reentry_guard_SPI_EXCLUSIVE_AREA_11/23 (read)reentry_guard_SPI_EXCLUSIVE_AREA_11/23 (write)msr_SPI_EXCLUSIVE_AREA_11/22 (read)reentry_guard_SPI_EXCLUSIVE_AREA_11/23 (read)
  Referring: 
  Availability: available
  Function flags: count:1073741824 (estimated locally) body optimize_size
  Called by: 
  Calls: Sys_GetCoreID/77 (1073741824 (estimated locally),1.00 per call) 
SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_11/61 (SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_11) @06c272a0
  Type: function definition analyzed
  Visibility: externally_visible public
  References: reentry_guard_SPI_EXCLUSIVE_AREA_11/23 (read)msr_SPI_EXCLUSIVE_AREA_11/22 (write)msr_SPI_EXCLUSIVE_AREA_11/22 (read)reentry_guard_SPI_EXCLUSIVE_AREA_11/23 (read)reentry_guard_SPI_EXCLUSIVE_AREA_11/23 (write)
  Referring: 
  Availability: available
  Function flags: count:1073741824 (estimated locally) body optimize_size
  Called by: 
  Calls: Sys_GetCoreID/77 (1073741824 (estimated locally),1.00 per call) 
SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_10/60 (SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_10) @06c27ee0
  Type: function definition analyzed
  Visibility: externally_visible public
  References: reentry_guard_SPI_EXCLUSIVE_AREA_10/21 (read)reentry_guard_SPI_EXCLUSIVE_AREA_10/21 (write)msr_SPI_EXCLUSIVE_AREA_10/20 (read)reentry_guard_SPI_EXCLUSIVE_AREA_10/21 (read)
  Referring: 
  Availability: available
  Function flags: count:1073741824 (estimated locally) body optimize_size
  Called by: 
  Calls: Sys_GetCoreID/77 (1073741824 (estimated locally),1.00 per call) 
SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_10/59 (SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_10) @06c27c40
  Type: function definition analyzed
  Visibility: externally_visible public
  References: reentry_guard_SPI_EXCLUSIVE_AREA_10/21 (read)msr_SPI_EXCLUSIVE_AREA_10/20 (write)msr_SPI_EXCLUSIVE_AREA_10/20 (read)reentry_guard_SPI_EXCLUSIVE_AREA_10/21 (read)reentry_guard_SPI_EXCLUSIVE_AREA_10/21 (write)
  Referring: 
  Availability: available
  Function flags: count:1073741824 (estimated locally) body optimize_size
  Called by: 
  Calls: Sys_GetCoreID/77 (1073741824 (estimated locally),1.00 per call) 
SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_09/58 (SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_09) @06c279a0
  Type: function definition analyzed
  Visibility: externally_visible public
  References: reentry_guard_SPI_EXCLUSIVE_AREA_09/19 (read)reentry_guard_SPI_EXCLUSIVE_AREA_09/19 (write)msr_SPI_EXCLUSIVE_AREA_09/18 (read)reentry_guard_SPI_EXCLUSIVE_AREA_09/19 (read)
  Referring: 
  Availability: available
  Function flags: count:1073741824 (estimated locally) body optimize_size
  Called by: 
  Calls: Sys_GetCoreID/77 (1073741824 (estimated locally),1.00 per call) 
SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_09/57 (SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_09) @06c27700
  Type: function definition analyzed
  Visibility: externally_visible public
  References: reentry_guard_SPI_EXCLUSIVE_AREA_09/19 (read)msr_SPI_EXCLUSIVE_AREA_09/18 (write)msr_SPI_EXCLUSIVE_AREA_09/18 (read)reentry_guard_SPI_EXCLUSIVE_AREA_09/19 (read)reentry_guard_SPI_EXCLUSIVE_AREA_09/19 (write)
  Referring: 
  Availability: available
  Function flags: count:1073741824 (estimated locally) body optimize_size
  Called by: 
  Calls: Sys_GetCoreID/77 (1073741824 (estimated locally),1.00 per call) 
SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_08/56 (SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_08) @06c27460
  Type: function definition analyzed
  Visibility: externally_visible public
  References: reentry_guard_SPI_EXCLUSIVE_AREA_08/17 (read)reentry_guard_SPI_EXCLUSIVE_AREA_08/17 (write)msr_SPI_EXCLUSIVE_AREA_08/16 (read)reentry_guard_SPI_EXCLUSIVE_AREA_08/17 (read)
  Referring: 
  Availability: available
  Function flags: count:1073741824 (estimated locally) body optimize_size
  Called by: 
  Calls: Sys_GetCoreID/77 (1073741824 (estimated locally),1.00 per call) 
SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_08/55 (SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_08) @06c271c0
  Type: function definition analyzed
  Visibility: externally_visible public
  References: reentry_guard_SPI_EXCLUSIVE_AREA_08/17 (read)msr_SPI_EXCLUSIVE_AREA_08/16 (write)msr_SPI_EXCLUSIVE_AREA_08/16 (read)reentry_guard_SPI_EXCLUSIVE_AREA_08/17 (read)reentry_guard_SPI_EXCLUSIVE_AREA_08/17 (write)
  Referring: 
  Availability: available
  Function flags: count:1073741824 (estimated locally) body optimize_size
  Called by: 
  Calls: Sys_GetCoreID/77 (1073741824 (estimated locally),1.00 per call) 
SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_07/54 (SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_07) @06c20d20
  Type: function definition analyzed
  Visibility: externally_visible public
  References: reentry_guard_SPI_EXCLUSIVE_AREA_07/15 (read)reentry_guard_SPI_EXCLUSIVE_AREA_07/15 (write)msr_SPI_EXCLUSIVE_AREA_07/14 (read)reentry_guard_SPI_EXCLUSIVE_AREA_07/15 (read)
  Referring: 
  Availability: available
  Function flags: count:1073741824 (estimated locally) body optimize_size
  Called by: 
  Calls: Sys_GetCoreID/77 (1073741824 (estimated locally),1.00 per call) 
SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_07/53 (SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_07) @06c207e0
  Type: function definition analyzed
  Visibility: externally_visible public
  References: reentry_guard_SPI_EXCLUSIVE_AREA_07/15 (read)msr_SPI_EXCLUSIVE_AREA_07/14 (write)msr_SPI_EXCLUSIVE_AREA_07/14 (read)reentry_guard_SPI_EXCLUSIVE_AREA_07/15 (read)reentry_guard_SPI_EXCLUSIVE_AREA_07/15 (write)
  Referring: 
  Availability: available
  Function flags: count:1073741824 (estimated locally) body optimize_size
  Called by: 
  Calls: Sys_GetCoreID/77 (1073741824 (estimated locally),1.00 per call) 
SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_06/52 (SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_06) @06c202a0
  Type: function definition analyzed
  Visibility: externally_visible public
  References: reentry_guard_SPI_EXCLUSIVE_AREA_06/13 (read)reentry_guard_SPI_EXCLUSIVE_AREA_06/13 (write)msr_SPI_EXCLUSIVE_AREA_06/12 (read)reentry_guard_SPI_EXCLUSIVE_AREA_06/13 (read)
  Referring: 
  Availability: available
  Function flags: count:1073741824 (estimated locally) body optimize_size
  Called by: 
  Calls: Sys_GetCoreID/77 (1073741824 (estimated locally),1.00 per call) 
SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_06/51 (SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_06) @06c20ee0
  Type: function definition analyzed
  Visibility: externally_visible public
  References: reentry_guard_SPI_EXCLUSIVE_AREA_06/13 (read)msr_SPI_EXCLUSIVE_AREA_06/12 (write)msr_SPI_EXCLUSIVE_AREA_06/12 (read)reentry_guard_SPI_EXCLUSIVE_AREA_06/13 (read)reentry_guard_SPI_EXCLUSIVE_AREA_06/13 (write)
  Referring: 
  Availability: available
  Function flags: count:1073741824 (estimated locally) body optimize_size
  Called by: 
  Calls: Sys_GetCoreID/77 (1073741824 (estimated locally),1.00 per call) 
SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_05/50 (SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_05) @06c20c40
  Type: function definition analyzed
  Visibility: externally_visible public
  References: reentry_guard_SPI_EXCLUSIVE_AREA_05/11 (read)reentry_guard_SPI_EXCLUSIVE_AREA_05/11 (write)msr_SPI_EXCLUSIVE_AREA_05/10 (read)reentry_guard_SPI_EXCLUSIVE_AREA_05/11 (read)
  Referring: 
  Availability: available
  Function flags: count:1073741824 (estimated locally) body optimize_size
  Called by: 
  Calls: Sys_GetCoreID/77 (1073741824 (estimated locally),1.00 per call) 
SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_05/49 (SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_05) @06c209a0
  Type: function definition analyzed
  Visibility: externally_visible public
  References: reentry_guard_SPI_EXCLUSIVE_AREA_05/11 (read)msr_SPI_EXCLUSIVE_AREA_05/10 (write)msr_SPI_EXCLUSIVE_AREA_05/10 (read)reentry_guard_SPI_EXCLUSIVE_AREA_05/11 (read)reentry_guard_SPI_EXCLUSIVE_AREA_05/11 (write)
  Referring: 
  Availability: available
  Function flags: count:1073741824 (estimated locally) body optimize_size
  Called by: 
  Calls: Sys_GetCoreID/77 (1073741824 (estimated locally),1.00 per call) 
SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_04/48 (SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_04) @06c20700
  Type: function definition analyzed
  Visibility: externally_visible public
  References: reentry_guard_SPI_EXCLUSIVE_AREA_04/9 (read)reentry_guard_SPI_EXCLUSIVE_AREA_04/9 (write)msr_SPI_EXCLUSIVE_AREA_04/8 (read)reentry_guard_SPI_EXCLUSIVE_AREA_04/9 (read)
  Referring: 
  Availability: available
  Function flags: count:1073741824 (estimated locally) body optimize_size
  Called by: 
  Calls: Sys_GetCoreID/77 (1073741824 (estimated locally),1.00 per call) 
SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_04/47 (SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_04) @06c20460
  Type: function definition analyzed
  Visibility: externally_visible public
  References: reentry_guard_SPI_EXCLUSIVE_AREA_04/9 (read)msr_SPI_EXCLUSIVE_AREA_04/8 (write)msr_SPI_EXCLUSIVE_AREA_04/8 (read)reentry_guard_SPI_EXCLUSIVE_AREA_04/9 (read)reentry_guard_SPI_EXCLUSIVE_AREA_04/9 (write)
  Referring: 
  Availability: available
  Function flags: count:1073741824 (estimated locally) body optimize_size
  Called by: 
  Calls: Sys_GetCoreID/77 (1073741824 (estimated locally),1.00 per call) 
SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_03/46 (SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_03) @06c201c0
  Type: function definition analyzed
  Visibility: externally_visible public
  References: reentry_guard_SPI_EXCLUSIVE_AREA_03/7 (read)reentry_guard_SPI_EXCLUSIVE_AREA_03/7 (write)msr_SPI_EXCLUSIVE_AREA_03/6 (read)reentry_guard_SPI_EXCLUSIVE_AREA_03/7 (read)
  Referring: 
  Availability: available
  Function flags: count:1073741824 (estimated locally) body optimize_size
  Called by: 
  Calls: Sys_GetCoreID/77 (1073741824 (estimated locally),1.00 per call) 
SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_03/45 (SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_03) @06b34ee0
  Type: function definition analyzed
  Visibility: externally_visible public
  References: reentry_guard_SPI_EXCLUSIVE_AREA_03/7 (read)msr_SPI_EXCLUSIVE_AREA_03/6 (write)msr_SPI_EXCLUSIVE_AREA_03/6 (read)reentry_guard_SPI_EXCLUSIVE_AREA_03/7 (read)reentry_guard_SPI_EXCLUSIVE_AREA_03/7 (write)
  Referring: 
  Availability: available
  Function flags: count:1073741824 (estimated locally) body optimize_size
  Called by: 
  Calls: Sys_GetCoreID/77 (1073741824 (estimated locally),1.00 per call) 
SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_02/44 (SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_02) @06b349a0
  Type: function definition analyzed
  Visibility: externally_visible public
  References: reentry_guard_SPI_EXCLUSIVE_AREA_02/5 (read)reentry_guard_SPI_EXCLUSIVE_AREA_02/5 (write)msr_SPI_EXCLUSIVE_AREA_02/4 (read)reentry_guard_SPI_EXCLUSIVE_AREA_02/5 (read)
  Referring: 
  Availability: available
  Function flags: count:1073741824 (estimated locally) body optimize_size
  Called by: 
  Calls: Sys_GetCoreID/77 (1073741824 (estimated locally),1.00 per call) 
SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_02/43 (SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_02) @06b34460
  Type: function definition analyzed
  Visibility: externally_visible public
  References: reentry_guard_SPI_EXCLUSIVE_AREA_02/5 (read)msr_SPI_EXCLUSIVE_AREA_02/4 (write)msr_SPI_EXCLUSIVE_AREA_02/4 (read)reentry_guard_SPI_EXCLUSIVE_AREA_02/5 (read)reentry_guard_SPI_EXCLUSIVE_AREA_02/5 (write)
  Referring: 
  Availability: available
  Function flags: count:1073741824 (estimated locally) body optimize_size
  Called by: 
  Calls: Sys_GetCoreID/77 (1073741824 (estimated locally),1.00 per call) 
SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_01/42 (SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_01) @06b34e00
  Type: function definition analyzed
  Visibility: externally_visible public
  References: reentry_guard_SPI_EXCLUSIVE_AREA_01/3 (read)reentry_guard_SPI_EXCLUSIVE_AREA_01/3 (write)msr_SPI_EXCLUSIVE_AREA_01/2 (read)reentry_guard_SPI_EXCLUSIVE_AREA_01/3 (read)
  Referring: 
  Availability: available
  Function flags: count:1073741824 (estimated locally) body optimize_size
  Called by: 
  Calls: Sys_GetCoreID/77 (1073741824 (estimated locally),1.00 per call) 
SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_01/41 (SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_01) @06b34b60
  Type: function definition analyzed
  Visibility: externally_visible public
  References: reentry_guard_SPI_EXCLUSIVE_AREA_01/3 (read)msr_SPI_EXCLUSIVE_AREA_01/2 (write)msr_SPI_EXCLUSIVE_AREA_01/2 (read)reentry_guard_SPI_EXCLUSIVE_AREA_01/3 (read)reentry_guard_SPI_EXCLUSIVE_AREA_01/3 (write)
  Referring: 
  Availability: available
  Function flags: count:1073741824 (estimated locally) body optimize_size
  Called by: 
  Calls: Sys_GetCoreID/77 (1073741824 (estimated locally),1.00 per call) 
SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_00/40 (SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_00) @06b348c0
  Type: function definition analyzed
  Visibility: externally_visible public
  References: reentry_guard_SPI_EXCLUSIVE_AREA_00/1 (read)reentry_guard_SPI_EXCLUSIVE_AREA_00/1 (write)msr_SPI_EXCLUSIVE_AREA_00/0 (read)reentry_guard_SPI_EXCLUSIVE_AREA_00/1 (read)
  Referring: 
  Availability: available
  Function flags: count:1073741824 (estimated locally) body optimize_size
  Called by: 
  Calls: Sys_GetCoreID/77 (1073741824 (estimated locally),1.00 per call) 
SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_00/39 (SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_00) @06b34620
  Type: function definition analyzed
  Visibility: externally_visible public
  References: reentry_guard_SPI_EXCLUSIVE_AREA_00/1 (read)msr_SPI_EXCLUSIVE_AREA_00/0 (write)msr_SPI_EXCLUSIVE_AREA_00/0 (read)reentry_guard_SPI_EXCLUSIVE_AREA_00/1 (read)reentry_guard_SPI_EXCLUSIVE_AREA_00/1 (write)
  Referring: 
  Availability: available
  Function flags: count:1073741824 (estimated locally) body optimize_size
  Called by: 
  Calls: Sys_GetCoreID/77 (1073741824 (estimated locally),1.00 per call) 
Spi_schm_read_msr/38 (Spi_schm_read_msr) @06b34380
  Type: function definition analyzed
  Visibility: externally_visible public
  References: 
  Referring: 
  Availability: available
  Function flags: count:1073741824 (estimated locally) body optimize_size
  Called by: 
  Calls: 
reentry_guard_SPI_EXCLUSIVE_AREA_18/37 (reentry_guard_SPI_EXCLUSIVE_AREA_18) @06b311f8
  Type: variable definition analyzed
  Visibility: force_output prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_18/75 (read)SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_18/75 (read)SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_18/75 (write)SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_18/76 (read)SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_18/76 (write)SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_18/76 (read)
  Availability: available
  Varpool flags:
msr_SPI_EXCLUSIVE_AREA_18/36 (msr_SPI_EXCLUSIVE_AREA_18) @06b31168
  Type: variable definition analyzed
  Visibility: force_output prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_18/75 (read)SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_18/75 (write)SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_18/76 (read)
  Availability: available
  Varpool flags:
reentry_guard_SPI_EXCLUSIVE_AREA_17/35 (reentry_guard_SPI_EXCLUSIVE_AREA_17) @06b310d8
  Type: variable definition analyzed
  Visibility: force_output prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_17/73 (read)SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_17/73 (read)SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_17/73 (write)SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_17/74 (read)SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_17/74 (write)SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_17/74 (read)
  Availability: available
  Varpool flags:
msr_SPI_EXCLUSIVE_AREA_17/34 (msr_SPI_EXCLUSIVE_AREA_17) @06b31048
  Type: variable definition analyzed
  Visibility: force_output prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_17/73 (read)SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_17/73 (write)SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_17/74 (read)
  Availability: available
  Varpool flags:
reentry_guard_SPI_EXCLUSIVE_AREA_16/33 (reentry_guard_SPI_EXCLUSIVE_AREA_16) @06b2df78
  Type: variable definition analyzed
  Visibility: force_output prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_16/71 (read)SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_16/71 (read)SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_16/71 (write)SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_16/72 (read)SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_16/72 (write)SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_16/72 (read)
  Availability: available
  Varpool flags:
msr_SPI_EXCLUSIVE_AREA_16/32 (msr_SPI_EXCLUSIVE_AREA_16) @06b2dee8
  Type: variable definition analyzed
  Visibility: force_output prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_16/71 (read)SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_16/71 (write)SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_16/72 (read)
  Availability: available
  Varpool flags:
reentry_guard_SPI_EXCLUSIVE_AREA_15/31 (reentry_guard_SPI_EXCLUSIVE_AREA_15) @06b2de58
  Type: variable definition analyzed
  Visibility: force_output prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_15/69 (read)SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_15/69 (read)SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_15/69 (write)SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_15/70 (read)SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_15/70 (write)SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_15/70 (read)
  Availability: available
  Varpool flags:
msr_SPI_EXCLUSIVE_AREA_15/30 (msr_SPI_EXCLUSIVE_AREA_15) @06b2ddc8
  Type: variable definition analyzed
  Visibility: force_output prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_15/69 (read)SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_15/69 (write)SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_15/70 (read)
  Availability: available
  Varpool flags:
reentry_guard_SPI_EXCLUSIVE_AREA_14/29 (reentry_guard_SPI_EXCLUSIVE_AREA_14) @06b2dd38
  Type: variable definition analyzed
  Visibility: force_output prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_14/67 (read)SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_14/67 (read)SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_14/67 (write)SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_14/68 (read)SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_14/68 (write)SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_14/68 (read)
  Availability: available
  Varpool flags:
msr_SPI_EXCLUSIVE_AREA_14/28 (msr_SPI_EXCLUSIVE_AREA_14) @06b2dca8
  Type: variable definition analyzed
  Visibility: force_output prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_14/67 (read)SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_14/67 (write)SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_14/68 (read)
  Availability: available
  Varpool flags:
reentry_guard_SPI_EXCLUSIVE_AREA_13/27 (reentry_guard_SPI_EXCLUSIVE_AREA_13) @06b2dc18
  Type: variable definition analyzed
  Visibility: force_output prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_13/65 (read)SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_13/65 (read)SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_13/65 (write)SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_13/66 (read)SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_13/66 (write)SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_13/66 (read)
  Availability: available
  Varpool flags:
msr_SPI_EXCLUSIVE_AREA_13/26 (msr_SPI_EXCLUSIVE_AREA_13) @06b2db88
  Type: variable definition analyzed
  Visibility: force_output prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_13/65 (read)SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_13/65 (write)SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_13/66 (read)
  Availability: available
  Varpool flags:
reentry_guard_SPI_EXCLUSIVE_AREA_12/25 (reentry_guard_SPI_EXCLUSIVE_AREA_12) @06b2daf8
  Type: variable definition analyzed
  Visibility: force_output prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_12/63 (read)SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_12/63 (read)SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_12/63 (write)SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_12/64 (read)SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_12/64 (write)SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_12/64 (read)
  Availability: available
  Varpool flags:
msr_SPI_EXCLUSIVE_AREA_12/24 (msr_SPI_EXCLUSIVE_AREA_12) @06b2da68
  Type: variable definition analyzed
  Visibility: force_output prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_12/63 (read)SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_12/63 (write)SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_12/64 (read)
  Availability: available
  Varpool flags:
reentry_guard_SPI_EXCLUSIVE_AREA_11/23 (reentry_guard_SPI_EXCLUSIVE_AREA_11) @06b2d9d8
  Type: variable definition analyzed
  Visibility: force_output prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_11/61 (read)SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_11/61 (read)SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_11/61 (write)SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_11/62 (read)SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_11/62 (write)SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_11/62 (read)
  Availability: available
  Varpool flags:
msr_SPI_EXCLUSIVE_AREA_11/22 (msr_SPI_EXCLUSIVE_AREA_11) @06b2d948
  Type: variable definition analyzed
  Visibility: force_output prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_11/61 (read)SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_11/61 (write)SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_11/62 (read)
  Availability: available
  Varpool flags:
reentry_guard_SPI_EXCLUSIVE_AREA_10/21 (reentry_guard_SPI_EXCLUSIVE_AREA_10) @06b2d8b8
  Type: variable definition analyzed
  Visibility: force_output prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_10/59 (read)SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_10/59 (read)SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_10/59 (write)SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_10/60 (read)SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_10/60 (write)SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_10/60 (read)
  Availability: available
  Varpool flags:
msr_SPI_EXCLUSIVE_AREA_10/20 (msr_SPI_EXCLUSIVE_AREA_10) @06b2d828
  Type: variable definition analyzed
  Visibility: force_output prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_10/59 (read)SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_10/59 (write)SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_10/60 (read)
  Availability: available
  Varpool flags:
reentry_guard_SPI_EXCLUSIVE_AREA_09/19 (reentry_guard_SPI_EXCLUSIVE_AREA_09) @06b2d798
  Type: variable definition analyzed
  Visibility: force_output prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_09/57 (read)SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_09/57 (read)SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_09/57 (write)SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_09/58 (read)SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_09/58 (write)SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_09/58 (read)
  Availability: available
  Varpool flags:
msr_SPI_EXCLUSIVE_AREA_09/18 (msr_SPI_EXCLUSIVE_AREA_09) @06b2d708
  Type: variable definition analyzed
  Visibility: force_output prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_09/57 (read)SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_09/57 (write)SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_09/58 (read)
  Availability: available
  Varpool flags:
reentry_guard_SPI_EXCLUSIVE_AREA_08/17 (reentry_guard_SPI_EXCLUSIVE_AREA_08) @06b2d678
  Type: variable definition analyzed
  Visibility: force_output prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_08/55 (read)SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_08/55 (read)SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_08/55 (write)SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_08/56 (read)SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_08/56 (write)SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_08/56 (read)
  Availability: available
  Varpool flags:
msr_SPI_EXCLUSIVE_AREA_08/16 (msr_SPI_EXCLUSIVE_AREA_08) @06b2d5e8
  Type: variable definition analyzed
  Visibility: force_output prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_08/55 (read)SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_08/55 (write)SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_08/56 (read)
  Availability: available
  Varpool flags:
reentry_guard_SPI_EXCLUSIVE_AREA_07/15 (reentry_guard_SPI_EXCLUSIVE_AREA_07) @06b2d558
  Type: variable definition analyzed
  Visibility: force_output prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_07/53 (read)SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_07/53 (read)SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_07/53 (write)SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_07/54 (read)SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_07/54 (write)SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_07/54 (read)
  Availability: available
  Varpool flags:
msr_SPI_EXCLUSIVE_AREA_07/14 (msr_SPI_EXCLUSIVE_AREA_07) @06b2d4c8
  Type: variable definition analyzed
  Visibility: force_output prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_07/53 (read)SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_07/53 (write)SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_07/54 (read)
  Availability: available
  Varpool flags:
reentry_guard_SPI_EXCLUSIVE_AREA_06/13 (reentry_guard_SPI_EXCLUSIVE_AREA_06) @06b2d438
  Type: variable definition analyzed
  Visibility: force_output prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_06/51 (read)SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_06/51 (read)SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_06/51 (write)SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_06/52 (read)SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_06/52 (write)SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_06/52 (read)
  Availability: available
  Varpool flags:
msr_SPI_EXCLUSIVE_AREA_06/12 (msr_SPI_EXCLUSIVE_AREA_06) @06b2d3a8
  Type: variable definition analyzed
  Visibility: force_output prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_06/51 (read)SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_06/51 (write)SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_06/52 (read)
  Availability: available
  Varpool flags:
reentry_guard_SPI_EXCLUSIVE_AREA_05/11 (reentry_guard_SPI_EXCLUSIVE_AREA_05) @06b2d318
  Type: variable definition analyzed
  Visibility: force_output prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_05/49 (read)SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_05/49 (read)SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_05/49 (write)SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_05/50 (read)SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_05/50 (write)SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_05/50 (read)
  Availability: available
  Varpool flags:
msr_SPI_EXCLUSIVE_AREA_05/10 (msr_SPI_EXCLUSIVE_AREA_05) @06b2d288
  Type: variable definition analyzed
  Visibility: force_output prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_05/49 (read)SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_05/49 (write)SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_05/50 (read)
  Availability: available
  Varpool flags:
reentry_guard_SPI_EXCLUSIVE_AREA_04/9 (reentry_guard_SPI_EXCLUSIVE_AREA_04) @06b2d1f8
  Type: variable definition analyzed
  Visibility: force_output prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_04/47 (read)SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_04/47 (read)SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_04/47 (write)SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_04/48 (read)SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_04/48 (write)SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_04/48 (read)
  Availability: available
  Varpool flags:
msr_SPI_EXCLUSIVE_AREA_04/8 (msr_SPI_EXCLUSIVE_AREA_04) @06b2d168
  Type: variable definition analyzed
  Visibility: force_output prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_04/47 (read)SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_04/47 (write)SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_04/48 (read)
  Availability: available
  Varpool flags:
reentry_guard_SPI_EXCLUSIVE_AREA_03/7 (reentry_guard_SPI_EXCLUSIVE_AREA_03) @06b2d0d8
  Type: variable definition analyzed
  Visibility: force_output prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_03/45 (read)SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_03/45 (read)SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_03/45 (write)SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_03/46 (read)SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_03/46 (write)SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_03/46 (read)
  Availability: available
  Varpool flags:
msr_SPI_EXCLUSIVE_AREA_03/6 (msr_SPI_EXCLUSIVE_AREA_03) @06b2d048
  Type: variable definition analyzed
  Visibility: force_output prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_03/45 (read)SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_03/45 (write)SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_03/46 (read)
  Availability: available
  Varpool flags:
reentry_guard_SPI_EXCLUSIVE_AREA_02/5 (reentry_guard_SPI_EXCLUSIVE_AREA_02) @06b25f78
  Type: variable definition analyzed
  Visibility: force_output prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_02/43 (read)SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_02/43 (read)SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_02/43 (write)SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_02/44 (read)SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_02/44 (write)SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_02/44 (read)
  Availability: available
  Varpool flags:
msr_SPI_EXCLUSIVE_AREA_02/4 (msr_SPI_EXCLUSIVE_AREA_02) @06b25ee8
  Type: variable definition analyzed
  Visibility: force_output prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_02/43 (read)SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_02/43 (write)SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_02/44 (read)
  Availability: available
  Varpool flags:
reentry_guard_SPI_EXCLUSIVE_AREA_01/3 (reentry_guard_SPI_EXCLUSIVE_AREA_01) @06b25e58
  Type: variable definition analyzed
  Visibility: force_output prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_01/41 (read)SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_01/41 (read)SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_01/41 (write)SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_01/42 (read)SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_01/42 (write)SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_01/42 (read)
  Availability: available
  Varpool flags:
msr_SPI_EXCLUSIVE_AREA_01/2 (msr_SPI_EXCLUSIVE_AREA_01) @06b25dc8
  Type: variable definition analyzed
  Visibility: force_output prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_01/41 (read)SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_01/41 (write)SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_01/42 (read)
  Availability: available
  Varpool flags:
reentry_guard_SPI_EXCLUSIVE_AREA_00/1 (reentry_guard_SPI_EXCLUSIVE_AREA_00) @06b25d38
  Type: variable definition analyzed
  Visibility: force_output prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_00/39 (read)SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_00/39 (read)SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_00/39 (write)SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_00/40 (read)SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_00/40 (write)SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_00/40 (read)
  Availability: available
  Varpool flags:
msr_SPI_EXCLUSIVE_AREA_00/0 (msr_SPI_EXCLUSIVE_AREA_00) @06b25ca8
  Type: variable definition analyzed
  Visibility: force_output prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_00/39 (read)SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_00/39 (write)SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_00/40 (read)
  Availability: available
  Varpool flags:
SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_18 ()
{
  uint32 u32CoreId;
  unsigned char _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> [local count: 1073741824]:
  # DEBUG BEGIN_STMT
  _1 = Sys_GetCoreID ();
  u32CoreId_10 = (uint32) _1;
  # DEBUG u32CoreId => u32CoreId_10
  # DEBUG BEGIN_STMT
  _2 ={v} reentry_guard_SPI_EXCLUSIVE_AREA_18[u32CoreId_10];
  _3 = _2 + 4294967295;
  reentry_guard_SPI_EXCLUSIVE_AREA_18[u32CoreId_10] ={v} _3;
  # DEBUG BEGIN_STMT
  _4 ={v} msr_SPI_EXCLUSIVE_AREA_18[u32CoreId_10];
  _5 = _4 & 1;
  if (_5 == 0)
    goto <bb 3>; [50.00%]
  else
    goto <bb 5>; [50.00%]

  <bb 3> [local count: 536870913]:
  _6 ={v} reentry_guard_SPI_EXCLUSIVE_AREA_18[u32CoreId_10];
  if (_6 == 0)
    goto <bb 4>; [50.00%]
  else
    goto <bb 5>; [50.00%]

  <bb 4> [local count: 268435456]:
  # DEBUG BEGIN_STMT
  __asm__ __volatile__(" cpsie i");

  <bb 5> [local count: 1073741824]:
  return;

}


SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_18 ()
{
  register uint32 reg_tmp;
  uint32 u32CoreId;
  unsigned char _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> [local count: 1073741824]:
  # DEBUG BEGIN_STMT
  _1 = Sys_GetCoreID ();
  u32CoreId_10 = (uint32) _1;
  # DEBUG u32CoreId => u32CoreId_10
  # DEBUG BEGIN_STMT
  _2 ={v} reentry_guard_SPI_EXCLUSIVE_AREA_18[u32CoreId_10];
  if (_2 == 0)
    goto <bb 3>; [50.00%]
  else
    goto <bb 5>; [50.00%]

  <bb 3> [local count: 536870913]:
  # DEBUG BEGIN_STMT
  # DEBUG INLINE_ENTRY Spi_schm_read_msr
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  __asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
  # DEBUG reg_tmp => reg_tmp_14
  # DEBUG BEGIN_STMT
  # DEBUG reg_tmp => NULL
  msr_SPI_EXCLUSIVE_AREA_18[u32CoreId_10] ={v} reg_tmp_14;
  # DEBUG BEGIN_STMT
  _3 ={v} msr_SPI_EXCLUSIVE_AREA_18[u32CoreId_10];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 4>; [50.00%]
  else
    goto <bb 5>; [50.00%]

  <bb 4> [local count: 268435456]:
  # DEBUG BEGIN_STMT
  __asm__ __volatile__(" cpsid i");

  <bb 5> [local count: 1073741824]:
  # DEBUG BEGIN_STMT
  _5 ={v} reentry_guard_SPI_EXCLUSIVE_AREA_18[u32CoreId_10];
  _6 = _5 + 1;
  reentry_guard_SPI_EXCLUSIVE_AREA_18[u32CoreId_10] ={v} _6;
  return;

}


SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_17 ()
{
  uint32 u32CoreId;
  unsigned char _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> [local count: 1073741824]:
  # DEBUG BEGIN_STMT
  _1 = Sys_GetCoreID ();
  u32CoreId_10 = (uint32) _1;
  # DEBUG u32CoreId => u32CoreId_10
  # DEBUG BEGIN_STMT
  _2 ={v} reentry_guard_SPI_EXCLUSIVE_AREA_17[u32CoreId_10];
  _3 = _2 + 4294967295;
  reentry_guard_SPI_EXCLUSIVE_AREA_17[u32CoreId_10] ={v} _3;
  # DEBUG BEGIN_STMT
  _4 ={v} msr_SPI_EXCLUSIVE_AREA_17[u32CoreId_10];
  _5 = _4 & 1;
  if (_5 == 0)
    goto <bb 3>; [50.00%]
  else
    goto <bb 5>; [50.00%]

  <bb 3> [local count: 536870913]:
  _6 ={v} reentry_guard_SPI_EXCLUSIVE_AREA_17[u32CoreId_10];
  if (_6 == 0)
    goto <bb 4>; [50.00%]
  else
    goto <bb 5>; [50.00%]

  <bb 4> [local count: 268435456]:
  # DEBUG BEGIN_STMT
  __asm__ __volatile__(" cpsie i");

  <bb 5> [local count: 1073741824]:
  return;

}


SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_17 ()
{
  register uint32 reg_tmp;
  uint32 u32CoreId;
  unsigned char _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> [local count: 1073741824]:
  # DEBUG BEGIN_STMT
  _1 = Sys_GetCoreID ();
  u32CoreId_10 = (uint32) _1;
  # DEBUG u32CoreId => u32CoreId_10
  # DEBUG BEGIN_STMT
  _2 ={v} reentry_guard_SPI_EXCLUSIVE_AREA_17[u32CoreId_10];
  if (_2 == 0)
    goto <bb 3>; [50.00%]
  else
    goto <bb 5>; [50.00%]

  <bb 3> [local count: 536870913]:
  # DEBUG BEGIN_STMT
  # DEBUG INLINE_ENTRY Spi_schm_read_msr
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  __asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
  # DEBUG reg_tmp => reg_tmp_14
  # DEBUG BEGIN_STMT
  # DEBUG reg_tmp => NULL
  msr_SPI_EXCLUSIVE_AREA_17[u32CoreId_10] ={v} reg_tmp_14;
  # DEBUG BEGIN_STMT
  _3 ={v} msr_SPI_EXCLUSIVE_AREA_17[u32CoreId_10];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 4>; [50.00%]
  else
    goto <bb 5>; [50.00%]

  <bb 4> [local count: 268435456]:
  # DEBUG BEGIN_STMT
  __asm__ __volatile__(" cpsid i");

  <bb 5> [local count: 1073741824]:
  # DEBUG BEGIN_STMT
  _5 ={v} reentry_guard_SPI_EXCLUSIVE_AREA_17[u32CoreId_10];
  _6 = _5 + 1;
  reentry_guard_SPI_EXCLUSIVE_AREA_17[u32CoreId_10] ={v} _6;
  return;

}


SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_16 ()
{
  uint32 u32CoreId;
  unsigned char _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> [local count: 1073741824]:
  # DEBUG BEGIN_STMT
  _1 = Sys_GetCoreID ();
  u32CoreId_10 = (uint32) _1;
  # DEBUG u32CoreId => u32CoreId_10
  # DEBUG BEGIN_STMT
  _2 ={v} reentry_guard_SPI_EXCLUSIVE_AREA_16[u32CoreId_10];
  _3 = _2 + 4294967295;
  reentry_guard_SPI_EXCLUSIVE_AREA_16[u32CoreId_10] ={v} _3;
  # DEBUG BEGIN_STMT
  _4 ={v} msr_SPI_EXCLUSIVE_AREA_16[u32CoreId_10];
  _5 = _4 & 1;
  if (_5 == 0)
    goto <bb 3>; [50.00%]
  else
    goto <bb 5>; [50.00%]

  <bb 3> [local count: 536870913]:
  _6 ={v} reentry_guard_SPI_EXCLUSIVE_AREA_16[u32CoreId_10];
  if (_6 == 0)
    goto <bb 4>; [50.00%]
  else
    goto <bb 5>; [50.00%]

  <bb 4> [local count: 268435456]:
  # DEBUG BEGIN_STMT
  __asm__ __volatile__(" cpsie i");

  <bb 5> [local count: 1073741824]:
  return;

}


SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_16 ()
{
  register uint32 reg_tmp;
  uint32 u32CoreId;
  unsigned char _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> [local count: 1073741824]:
  # DEBUG BEGIN_STMT
  _1 = Sys_GetCoreID ();
  u32CoreId_10 = (uint32) _1;
  # DEBUG u32CoreId => u32CoreId_10
  # DEBUG BEGIN_STMT
  _2 ={v} reentry_guard_SPI_EXCLUSIVE_AREA_16[u32CoreId_10];
  if (_2 == 0)
    goto <bb 3>; [50.00%]
  else
    goto <bb 5>; [50.00%]

  <bb 3> [local count: 536870913]:
  # DEBUG BEGIN_STMT
  # DEBUG INLINE_ENTRY Spi_schm_read_msr
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  __asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
  # DEBUG reg_tmp => reg_tmp_14
  # DEBUG BEGIN_STMT
  # DEBUG reg_tmp => NULL
  msr_SPI_EXCLUSIVE_AREA_16[u32CoreId_10] ={v} reg_tmp_14;
  # DEBUG BEGIN_STMT
  _3 ={v} msr_SPI_EXCLUSIVE_AREA_16[u32CoreId_10];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 4>; [50.00%]
  else
    goto <bb 5>; [50.00%]

  <bb 4> [local count: 268435456]:
  # DEBUG BEGIN_STMT
  __asm__ __volatile__(" cpsid i");

  <bb 5> [local count: 1073741824]:
  # DEBUG BEGIN_STMT
  _5 ={v} reentry_guard_SPI_EXCLUSIVE_AREA_16[u32CoreId_10];
  _6 = _5 + 1;
  reentry_guard_SPI_EXCLUSIVE_AREA_16[u32CoreId_10] ={v} _6;
  return;

}


SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_15 ()
{
  uint32 u32CoreId;
  unsigned char _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> [local count: 1073741824]:
  # DEBUG BEGIN_STMT
  _1 = Sys_GetCoreID ();
  u32CoreId_10 = (uint32) _1;
  # DEBUG u32CoreId => u32CoreId_10
  # DEBUG BEGIN_STMT
  _2 ={v} reentry_guard_SPI_EXCLUSIVE_AREA_15[u32CoreId_10];
  _3 = _2 + 4294967295;
  reentry_guard_SPI_EXCLUSIVE_AREA_15[u32CoreId_10] ={v} _3;
  # DEBUG BEGIN_STMT
  _4 ={v} msr_SPI_EXCLUSIVE_AREA_15[u32CoreId_10];
  _5 = _4 & 1;
  if (_5 == 0)
    goto <bb 3>; [50.00%]
  else
    goto <bb 5>; [50.00%]

  <bb 3> [local count: 536870913]:
  _6 ={v} reentry_guard_SPI_EXCLUSIVE_AREA_15[u32CoreId_10];
  if (_6 == 0)
    goto <bb 4>; [50.00%]
  else
    goto <bb 5>; [50.00%]

  <bb 4> [local count: 268435456]:
  # DEBUG BEGIN_STMT
  __asm__ __volatile__(" cpsie i");

  <bb 5> [local count: 1073741824]:
  return;

}


SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_15 ()
{
  register uint32 reg_tmp;
  uint32 u32CoreId;
  unsigned char _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> [local count: 1073741824]:
  # DEBUG BEGIN_STMT
  _1 = Sys_GetCoreID ();
  u32CoreId_10 = (uint32) _1;
  # DEBUG u32CoreId => u32CoreId_10
  # DEBUG BEGIN_STMT
  _2 ={v} reentry_guard_SPI_EXCLUSIVE_AREA_15[u32CoreId_10];
  if (_2 == 0)
    goto <bb 3>; [50.00%]
  else
    goto <bb 5>; [50.00%]

  <bb 3> [local count: 536870913]:
  # DEBUG BEGIN_STMT
  # DEBUG INLINE_ENTRY Spi_schm_read_msr
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  __asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
  # DEBUG reg_tmp => reg_tmp_14
  # DEBUG BEGIN_STMT
  # DEBUG reg_tmp => NULL
  msr_SPI_EXCLUSIVE_AREA_15[u32CoreId_10] ={v} reg_tmp_14;
  # DEBUG BEGIN_STMT
  _3 ={v} msr_SPI_EXCLUSIVE_AREA_15[u32CoreId_10];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 4>; [50.00%]
  else
    goto <bb 5>; [50.00%]

  <bb 4> [local count: 268435456]:
  # DEBUG BEGIN_STMT
  __asm__ __volatile__(" cpsid i");

  <bb 5> [local count: 1073741824]:
  # DEBUG BEGIN_STMT
  _5 ={v} reentry_guard_SPI_EXCLUSIVE_AREA_15[u32CoreId_10];
  _6 = _5 + 1;
  reentry_guard_SPI_EXCLUSIVE_AREA_15[u32CoreId_10] ={v} _6;
  return;

}


SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_14 ()
{
  uint32 u32CoreId;
  unsigned char _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> [local count: 1073741824]:
  # DEBUG BEGIN_STMT
  _1 = Sys_GetCoreID ();
  u32CoreId_10 = (uint32) _1;
  # DEBUG u32CoreId => u32CoreId_10
  # DEBUG BEGIN_STMT
  _2 ={v} reentry_guard_SPI_EXCLUSIVE_AREA_14[u32CoreId_10];
  _3 = _2 + 4294967295;
  reentry_guard_SPI_EXCLUSIVE_AREA_14[u32CoreId_10] ={v} _3;
  # DEBUG BEGIN_STMT
  _4 ={v} msr_SPI_EXCLUSIVE_AREA_14[u32CoreId_10];
  _5 = _4 & 1;
  if (_5 == 0)
    goto <bb 3>; [50.00%]
  else
    goto <bb 5>; [50.00%]

  <bb 3> [local count: 536870913]:
  _6 ={v} reentry_guard_SPI_EXCLUSIVE_AREA_14[u32CoreId_10];
  if (_6 == 0)
    goto <bb 4>; [50.00%]
  else
    goto <bb 5>; [50.00%]

  <bb 4> [local count: 268435456]:
  # DEBUG BEGIN_STMT
  __asm__ __volatile__(" cpsie i");

  <bb 5> [local count: 1073741824]:
  return;

}


SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_14 ()
{
  register uint32 reg_tmp;
  uint32 u32CoreId;
  unsigned char _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> [local count: 1073741824]:
  # DEBUG BEGIN_STMT
  _1 = Sys_GetCoreID ();
  u32CoreId_10 = (uint32) _1;
  # DEBUG u32CoreId => u32CoreId_10
  # DEBUG BEGIN_STMT
  _2 ={v} reentry_guard_SPI_EXCLUSIVE_AREA_14[u32CoreId_10];
  if (_2 == 0)
    goto <bb 3>; [50.00%]
  else
    goto <bb 5>; [50.00%]

  <bb 3> [local count: 536870913]:
  # DEBUG BEGIN_STMT
  # DEBUG INLINE_ENTRY Spi_schm_read_msr
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  __asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
  # DEBUG reg_tmp => reg_tmp_14
  # DEBUG BEGIN_STMT
  # DEBUG reg_tmp => NULL
  msr_SPI_EXCLUSIVE_AREA_14[u32CoreId_10] ={v} reg_tmp_14;
  # DEBUG BEGIN_STMT
  _3 ={v} msr_SPI_EXCLUSIVE_AREA_14[u32CoreId_10];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 4>; [50.00%]
  else
    goto <bb 5>; [50.00%]

  <bb 4> [local count: 268435456]:
  # DEBUG BEGIN_STMT
  __asm__ __volatile__(" cpsid i");

  <bb 5> [local count: 1073741824]:
  # DEBUG BEGIN_STMT
  _5 ={v} reentry_guard_SPI_EXCLUSIVE_AREA_14[u32CoreId_10];
  _6 = _5 + 1;
  reentry_guard_SPI_EXCLUSIVE_AREA_14[u32CoreId_10] ={v} _6;
  return;

}


SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_13 ()
{
  uint32 u32CoreId;
  unsigned char _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> [local count: 1073741824]:
  # DEBUG BEGIN_STMT
  _1 = Sys_GetCoreID ();
  u32CoreId_10 = (uint32) _1;
  # DEBUG u32CoreId => u32CoreId_10
  # DEBUG BEGIN_STMT
  _2 ={v} reentry_guard_SPI_EXCLUSIVE_AREA_13[u32CoreId_10];
  _3 = _2 + 4294967295;
  reentry_guard_SPI_EXCLUSIVE_AREA_13[u32CoreId_10] ={v} _3;
  # DEBUG BEGIN_STMT
  _4 ={v} msr_SPI_EXCLUSIVE_AREA_13[u32CoreId_10];
  _5 = _4 & 1;
  if (_5 == 0)
    goto <bb 3>; [50.00%]
  else
    goto <bb 5>; [50.00%]

  <bb 3> [local count: 536870913]:
  _6 ={v} reentry_guard_SPI_EXCLUSIVE_AREA_13[u32CoreId_10];
  if (_6 == 0)
    goto <bb 4>; [50.00%]
  else
    goto <bb 5>; [50.00%]

  <bb 4> [local count: 268435456]:
  # DEBUG BEGIN_STMT
  __asm__ __volatile__(" cpsie i");

  <bb 5> [local count: 1073741824]:
  return;

}


SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_13 ()
{
  register uint32 reg_tmp;
  uint32 u32CoreId;
  unsigned char _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> [local count: 1073741824]:
  # DEBUG BEGIN_STMT
  _1 = Sys_GetCoreID ();
  u32CoreId_10 = (uint32) _1;
  # DEBUG u32CoreId => u32CoreId_10
  # DEBUG BEGIN_STMT
  _2 ={v} reentry_guard_SPI_EXCLUSIVE_AREA_13[u32CoreId_10];
  if (_2 == 0)
    goto <bb 3>; [50.00%]
  else
    goto <bb 5>; [50.00%]

  <bb 3> [local count: 536870913]:
  # DEBUG BEGIN_STMT
  # DEBUG INLINE_ENTRY Spi_schm_read_msr
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  __asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
  # DEBUG reg_tmp => reg_tmp_14
  # DEBUG BEGIN_STMT
  # DEBUG reg_tmp => NULL
  msr_SPI_EXCLUSIVE_AREA_13[u32CoreId_10] ={v} reg_tmp_14;
  # DEBUG BEGIN_STMT
  _3 ={v} msr_SPI_EXCLUSIVE_AREA_13[u32CoreId_10];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 4>; [50.00%]
  else
    goto <bb 5>; [50.00%]

  <bb 4> [local count: 268435456]:
  # DEBUG BEGIN_STMT
  __asm__ __volatile__(" cpsid i");

  <bb 5> [local count: 1073741824]:
  # DEBUG BEGIN_STMT
  _5 ={v} reentry_guard_SPI_EXCLUSIVE_AREA_13[u32CoreId_10];
  _6 = _5 + 1;
  reentry_guard_SPI_EXCLUSIVE_AREA_13[u32CoreId_10] ={v} _6;
  return;

}


SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_12 ()
{
  uint32 u32CoreId;
  unsigned char _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> [local count: 1073741824]:
  # DEBUG BEGIN_STMT
  _1 = Sys_GetCoreID ();
  u32CoreId_10 = (uint32) _1;
  # DEBUG u32CoreId => u32CoreId_10
  # DEBUG BEGIN_STMT
  _2 ={v} reentry_guard_SPI_EXCLUSIVE_AREA_12[u32CoreId_10];
  _3 = _2 + 4294967295;
  reentry_guard_SPI_EXCLUSIVE_AREA_12[u32CoreId_10] ={v} _3;
  # DEBUG BEGIN_STMT
  _4 ={v} msr_SPI_EXCLUSIVE_AREA_12[u32CoreId_10];
  _5 = _4 & 1;
  if (_5 == 0)
    goto <bb 3>; [50.00%]
  else
    goto <bb 5>; [50.00%]

  <bb 3> [local count: 536870913]:
  _6 ={v} reentry_guard_SPI_EXCLUSIVE_AREA_12[u32CoreId_10];
  if (_6 == 0)
    goto <bb 4>; [50.00%]
  else
    goto <bb 5>; [50.00%]

  <bb 4> [local count: 268435456]:
  # DEBUG BEGIN_STMT
  __asm__ __volatile__(" cpsie i");

  <bb 5> [local count: 1073741824]:
  return;

}


SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_12 ()
{
  register uint32 reg_tmp;
  uint32 u32CoreId;
  unsigned char _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> [local count: 1073741824]:
  # DEBUG BEGIN_STMT
  _1 = Sys_GetCoreID ();
  u32CoreId_10 = (uint32) _1;
  # DEBUG u32CoreId => u32CoreId_10
  # DEBUG BEGIN_STMT
  _2 ={v} reentry_guard_SPI_EXCLUSIVE_AREA_12[u32CoreId_10];
  if (_2 == 0)
    goto <bb 3>; [50.00%]
  else
    goto <bb 5>; [50.00%]

  <bb 3> [local count: 536870913]:
  # DEBUG BEGIN_STMT
  # DEBUG INLINE_ENTRY Spi_schm_read_msr
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  __asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
  # DEBUG reg_tmp => reg_tmp_14
  # DEBUG BEGIN_STMT
  # DEBUG reg_tmp => NULL
  msr_SPI_EXCLUSIVE_AREA_12[u32CoreId_10] ={v} reg_tmp_14;
  # DEBUG BEGIN_STMT
  _3 ={v} msr_SPI_EXCLUSIVE_AREA_12[u32CoreId_10];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 4>; [50.00%]
  else
    goto <bb 5>; [50.00%]

  <bb 4> [local count: 268435456]:
  # DEBUG BEGIN_STMT
  __asm__ __volatile__(" cpsid i");

  <bb 5> [local count: 1073741824]:
  # DEBUG BEGIN_STMT
  _5 ={v} reentry_guard_SPI_EXCLUSIVE_AREA_12[u32CoreId_10];
  _6 = _5 + 1;
  reentry_guard_SPI_EXCLUSIVE_AREA_12[u32CoreId_10] ={v} _6;
  return;

}


SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_11 ()
{
  uint32 u32CoreId;
  unsigned char _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> [local count: 1073741824]:
  # DEBUG BEGIN_STMT
  _1 = Sys_GetCoreID ();
  u32CoreId_10 = (uint32) _1;
  # DEBUG u32CoreId => u32CoreId_10
  # DEBUG BEGIN_STMT
  _2 ={v} reentry_guard_SPI_EXCLUSIVE_AREA_11[u32CoreId_10];
  _3 = _2 + 4294967295;
  reentry_guard_SPI_EXCLUSIVE_AREA_11[u32CoreId_10] ={v} _3;
  # DEBUG BEGIN_STMT
  _4 ={v} msr_SPI_EXCLUSIVE_AREA_11[u32CoreId_10];
  _5 = _4 & 1;
  if (_5 == 0)
    goto <bb 3>; [50.00%]
  else
    goto <bb 5>; [50.00%]

  <bb 3> [local count: 536870913]:
  _6 ={v} reentry_guard_SPI_EXCLUSIVE_AREA_11[u32CoreId_10];
  if (_6 == 0)
    goto <bb 4>; [50.00%]
  else
    goto <bb 5>; [50.00%]

  <bb 4> [local count: 268435456]:
  # DEBUG BEGIN_STMT
  __asm__ __volatile__(" cpsie i");

  <bb 5> [local count: 1073741824]:
  return;

}


SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_11 ()
{
  register uint32 reg_tmp;
  uint32 u32CoreId;
  unsigned char _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> [local count: 1073741824]:
  # DEBUG BEGIN_STMT
  _1 = Sys_GetCoreID ();
  u32CoreId_10 = (uint32) _1;
  # DEBUG u32CoreId => u32CoreId_10
  # DEBUG BEGIN_STMT
  _2 ={v} reentry_guard_SPI_EXCLUSIVE_AREA_11[u32CoreId_10];
  if (_2 == 0)
    goto <bb 3>; [50.00%]
  else
    goto <bb 5>; [50.00%]

  <bb 3> [local count: 536870913]:
  # DEBUG BEGIN_STMT
  # DEBUG INLINE_ENTRY Spi_schm_read_msr
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  __asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
  # DEBUG reg_tmp => reg_tmp_14
  # DEBUG BEGIN_STMT
  # DEBUG reg_tmp => NULL
  msr_SPI_EXCLUSIVE_AREA_11[u32CoreId_10] ={v} reg_tmp_14;
  # DEBUG BEGIN_STMT
  _3 ={v} msr_SPI_EXCLUSIVE_AREA_11[u32CoreId_10];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 4>; [50.00%]
  else
    goto <bb 5>; [50.00%]

  <bb 4> [local count: 268435456]:
  # DEBUG BEGIN_STMT
  __asm__ __volatile__(" cpsid i");

  <bb 5> [local count: 1073741824]:
  # DEBUG BEGIN_STMT
  _5 ={v} reentry_guard_SPI_EXCLUSIVE_AREA_11[u32CoreId_10];
  _6 = _5 + 1;
  reentry_guard_SPI_EXCLUSIVE_AREA_11[u32CoreId_10] ={v} _6;
  return;

}


SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_10 ()
{
  uint32 u32CoreId;
  unsigned char _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> [local count: 1073741824]:
  # DEBUG BEGIN_STMT
  _1 = Sys_GetCoreID ();
  u32CoreId_10 = (uint32) _1;
  # DEBUG u32CoreId => u32CoreId_10
  # DEBUG BEGIN_STMT
  _2 ={v} reentry_guard_SPI_EXCLUSIVE_AREA_10[u32CoreId_10];
  _3 = _2 + 4294967295;
  reentry_guard_SPI_EXCLUSIVE_AREA_10[u32CoreId_10] ={v} _3;
  # DEBUG BEGIN_STMT
  _4 ={v} msr_SPI_EXCLUSIVE_AREA_10[u32CoreId_10];
  _5 = _4 & 1;
  if (_5 == 0)
    goto <bb 3>; [50.00%]
  else
    goto <bb 5>; [50.00%]

  <bb 3> [local count: 536870913]:
  _6 ={v} reentry_guard_SPI_EXCLUSIVE_AREA_10[u32CoreId_10];
  if (_6 == 0)
    goto <bb 4>; [50.00%]
  else
    goto <bb 5>; [50.00%]

  <bb 4> [local count: 268435456]:
  # DEBUG BEGIN_STMT
  __asm__ __volatile__(" cpsie i");

  <bb 5> [local count: 1073741824]:
  return;

}


SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_10 ()
{
  register uint32 reg_tmp;
  uint32 u32CoreId;
  unsigned char _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> [local count: 1073741824]:
  # DEBUG BEGIN_STMT
  _1 = Sys_GetCoreID ();
  u32CoreId_10 = (uint32) _1;
  # DEBUG u32CoreId => u32CoreId_10
  # DEBUG BEGIN_STMT
  _2 ={v} reentry_guard_SPI_EXCLUSIVE_AREA_10[u32CoreId_10];
  if (_2 == 0)
    goto <bb 3>; [50.00%]
  else
    goto <bb 5>; [50.00%]

  <bb 3> [local count: 536870913]:
  # DEBUG BEGIN_STMT
  # DEBUG INLINE_ENTRY Spi_schm_read_msr
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  __asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
  # DEBUG reg_tmp => reg_tmp_14
  # DEBUG BEGIN_STMT
  # DEBUG reg_tmp => NULL
  msr_SPI_EXCLUSIVE_AREA_10[u32CoreId_10] ={v} reg_tmp_14;
  # DEBUG BEGIN_STMT
  _3 ={v} msr_SPI_EXCLUSIVE_AREA_10[u32CoreId_10];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 4>; [50.00%]
  else
    goto <bb 5>; [50.00%]

  <bb 4> [local count: 268435456]:
  # DEBUG BEGIN_STMT
  __asm__ __volatile__(" cpsid i");

  <bb 5> [local count: 1073741824]:
  # DEBUG BEGIN_STMT
  _5 ={v} reentry_guard_SPI_EXCLUSIVE_AREA_10[u32CoreId_10];
  _6 = _5 + 1;
  reentry_guard_SPI_EXCLUSIVE_AREA_10[u32CoreId_10] ={v} _6;
  return;

}


SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_09 ()
{
  uint32 u32CoreId;
  unsigned char _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> [local count: 1073741824]:
  # DEBUG BEGIN_STMT
  _1 = Sys_GetCoreID ();
  u32CoreId_10 = (uint32) _1;
  # DEBUG u32CoreId => u32CoreId_10
  # DEBUG BEGIN_STMT
  _2 ={v} reentry_guard_SPI_EXCLUSIVE_AREA_09[u32CoreId_10];
  _3 = _2 + 4294967295;
  reentry_guard_SPI_EXCLUSIVE_AREA_09[u32CoreId_10] ={v} _3;
  # DEBUG BEGIN_STMT
  _4 ={v} msr_SPI_EXCLUSIVE_AREA_09[u32CoreId_10];
  _5 = _4 & 1;
  if (_5 == 0)
    goto <bb 3>; [50.00%]
  else
    goto <bb 5>; [50.00%]

  <bb 3> [local count: 536870913]:
  _6 ={v} reentry_guard_SPI_EXCLUSIVE_AREA_09[u32CoreId_10];
  if (_6 == 0)
    goto <bb 4>; [50.00%]
  else
    goto <bb 5>; [50.00%]

  <bb 4> [local count: 268435456]:
  # DEBUG BEGIN_STMT
  __asm__ __volatile__(" cpsie i");

  <bb 5> [local count: 1073741824]:
  return;

}


SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_09 ()
{
  register uint32 reg_tmp;
  uint32 u32CoreId;
  unsigned char _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> [local count: 1073741824]:
  # DEBUG BEGIN_STMT
  _1 = Sys_GetCoreID ();
  u32CoreId_10 = (uint32) _1;
  # DEBUG u32CoreId => u32CoreId_10
  # DEBUG BEGIN_STMT
  _2 ={v} reentry_guard_SPI_EXCLUSIVE_AREA_09[u32CoreId_10];
  if (_2 == 0)
    goto <bb 3>; [50.00%]
  else
    goto <bb 5>; [50.00%]

  <bb 3> [local count: 536870913]:
  # DEBUG BEGIN_STMT
  # DEBUG INLINE_ENTRY Spi_schm_read_msr
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  __asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
  # DEBUG reg_tmp => reg_tmp_14
  # DEBUG BEGIN_STMT
  # DEBUG reg_tmp => NULL
  msr_SPI_EXCLUSIVE_AREA_09[u32CoreId_10] ={v} reg_tmp_14;
  # DEBUG BEGIN_STMT
  _3 ={v} msr_SPI_EXCLUSIVE_AREA_09[u32CoreId_10];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 4>; [50.00%]
  else
    goto <bb 5>; [50.00%]

  <bb 4> [local count: 268435456]:
  # DEBUG BEGIN_STMT
  __asm__ __volatile__(" cpsid i");

  <bb 5> [local count: 1073741824]:
  # DEBUG BEGIN_STMT
  _5 ={v} reentry_guard_SPI_EXCLUSIVE_AREA_09[u32CoreId_10];
  _6 = _5 + 1;
  reentry_guard_SPI_EXCLUSIVE_AREA_09[u32CoreId_10] ={v} _6;
  return;

}


SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_08 ()
{
  uint32 u32CoreId;
  unsigned char _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> [local count: 1073741824]:
  # DEBUG BEGIN_STMT
  _1 = Sys_GetCoreID ();
  u32CoreId_10 = (uint32) _1;
  # DEBUG u32CoreId => u32CoreId_10
  # DEBUG BEGIN_STMT
  _2 ={v} reentry_guard_SPI_EXCLUSIVE_AREA_08[u32CoreId_10];
  _3 = _2 + 4294967295;
  reentry_guard_SPI_EXCLUSIVE_AREA_08[u32CoreId_10] ={v} _3;
  # DEBUG BEGIN_STMT
  _4 ={v} msr_SPI_EXCLUSIVE_AREA_08[u32CoreId_10];
  _5 = _4 & 1;
  if (_5 == 0)
    goto <bb 3>; [50.00%]
  else
    goto <bb 5>; [50.00%]

  <bb 3> [local count: 536870913]:
  _6 ={v} reentry_guard_SPI_EXCLUSIVE_AREA_08[u32CoreId_10];
  if (_6 == 0)
    goto <bb 4>; [50.00%]
  else
    goto <bb 5>; [50.00%]

  <bb 4> [local count: 268435456]:
  # DEBUG BEGIN_STMT
  __asm__ __volatile__(" cpsie i");

  <bb 5> [local count: 1073741824]:
  return;

}


SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_08 ()
{
  register uint32 reg_tmp;
  uint32 u32CoreId;
  unsigned char _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> [local count: 1073741824]:
  # DEBUG BEGIN_STMT
  _1 = Sys_GetCoreID ();
  u32CoreId_10 = (uint32) _1;
  # DEBUG u32CoreId => u32CoreId_10
  # DEBUG BEGIN_STMT
  _2 ={v} reentry_guard_SPI_EXCLUSIVE_AREA_08[u32CoreId_10];
  if (_2 == 0)
    goto <bb 3>; [50.00%]
  else
    goto <bb 5>; [50.00%]

  <bb 3> [local count: 536870913]:
  # DEBUG BEGIN_STMT
  # DEBUG INLINE_ENTRY Spi_schm_read_msr
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  __asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
  # DEBUG reg_tmp => reg_tmp_14
  # DEBUG BEGIN_STMT
  # DEBUG reg_tmp => NULL
  msr_SPI_EXCLUSIVE_AREA_08[u32CoreId_10] ={v} reg_tmp_14;
  # DEBUG BEGIN_STMT
  _3 ={v} msr_SPI_EXCLUSIVE_AREA_08[u32CoreId_10];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 4>; [50.00%]
  else
    goto <bb 5>; [50.00%]

  <bb 4> [local count: 268435456]:
  # DEBUG BEGIN_STMT
  __asm__ __volatile__(" cpsid i");

  <bb 5> [local count: 1073741824]:
  # DEBUG BEGIN_STMT
  _5 ={v} reentry_guard_SPI_EXCLUSIVE_AREA_08[u32CoreId_10];
  _6 = _5 + 1;
  reentry_guard_SPI_EXCLUSIVE_AREA_08[u32CoreId_10] ={v} _6;
  return;

}


SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_07 ()
{
  uint32 u32CoreId;
  unsigned char _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> [local count: 1073741824]:
  # DEBUG BEGIN_STMT
  _1 = Sys_GetCoreID ();
  u32CoreId_10 = (uint32) _1;
  # DEBUG u32CoreId => u32CoreId_10
  # DEBUG BEGIN_STMT
  _2 ={v} reentry_guard_SPI_EXCLUSIVE_AREA_07[u32CoreId_10];
  _3 = _2 + 4294967295;
  reentry_guard_SPI_EXCLUSIVE_AREA_07[u32CoreId_10] ={v} _3;
  # DEBUG BEGIN_STMT
  _4 ={v} msr_SPI_EXCLUSIVE_AREA_07[u32CoreId_10];
  _5 = _4 & 1;
  if (_5 == 0)
    goto <bb 3>; [50.00%]
  else
    goto <bb 5>; [50.00%]

  <bb 3> [local count: 536870913]:
  _6 ={v} reentry_guard_SPI_EXCLUSIVE_AREA_07[u32CoreId_10];
  if (_6 == 0)
    goto <bb 4>; [50.00%]
  else
    goto <bb 5>; [50.00%]

  <bb 4> [local count: 268435456]:
  # DEBUG BEGIN_STMT
  __asm__ __volatile__(" cpsie i");

  <bb 5> [local count: 1073741824]:
  return;

}


SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_07 ()
{
  register uint32 reg_tmp;
  uint32 u32CoreId;
  unsigned char _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> [local count: 1073741824]:
  # DEBUG BEGIN_STMT
  _1 = Sys_GetCoreID ();
  u32CoreId_10 = (uint32) _1;
  # DEBUG u32CoreId => u32CoreId_10
  # DEBUG BEGIN_STMT
  _2 ={v} reentry_guard_SPI_EXCLUSIVE_AREA_07[u32CoreId_10];
  if (_2 == 0)
    goto <bb 3>; [50.00%]
  else
    goto <bb 5>; [50.00%]

  <bb 3> [local count: 536870913]:
  # DEBUG BEGIN_STMT
  # DEBUG INLINE_ENTRY Spi_schm_read_msr
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  __asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
  # DEBUG reg_tmp => reg_tmp_14
  # DEBUG BEGIN_STMT
  # DEBUG reg_tmp => NULL
  msr_SPI_EXCLUSIVE_AREA_07[u32CoreId_10] ={v} reg_tmp_14;
  # DEBUG BEGIN_STMT
  _3 ={v} msr_SPI_EXCLUSIVE_AREA_07[u32CoreId_10];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 4>; [50.00%]
  else
    goto <bb 5>; [50.00%]

  <bb 4> [local count: 268435456]:
  # DEBUG BEGIN_STMT
  __asm__ __volatile__(" cpsid i");

  <bb 5> [local count: 1073741824]:
  # DEBUG BEGIN_STMT
  _5 ={v} reentry_guard_SPI_EXCLUSIVE_AREA_07[u32CoreId_10];
  _6 = _5 + 1;
  reentry_guard_SPI_EXCLUSIVE_AREA_07[u32CoreId_10] ={v} _6;
  return;

}


SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_06 ()
{
  uint32 u32CoreId;
  unsigned char _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> [local count: 1073741824]:
  # DEBUG BEGIN_STMT
  _1 = Sys_GetCoreID ();
  u32CoreId_10 = (uint32) _1;
  # DEBUG u32CoreId => u32CoreId_10
  # DEBUG BEGIN_STMT
  _2 ={v} reentry_guard_SPI_EXCLUSIVE_AREA_06[u32CoreId_10];
  _3 = _2 + 4294967295;
  reentry_guard_SPI_EXCLUSIVE_AREA_06[u32CoreId_10] ={v} _3;
  # DEBUG BEGIN_STMT
  _4 ={v} msr_SPI_EXCLUSIVE_AREA_06[u32CoreId_10];
  _5 = _4 & 1;
  if (_5 == 0)
    goto <bb 3>; [50.00%]
  else
    goto <bb 5>; [50.00%]

  <bb 3> [local count: 536870913]:
  _6 ={v} reentry_guard_SPI_EXCLUSIVE_AREA_06[u32CoreId_10];
  if (_6 == 0)
    goto <bb 4>; [50.00%]
  else
    goto <bb 5>; [50.00%]

  <bb 4> [local count: 268435456]:
  # DEBUG BEGIN_STMT
  __asm__ __volatile__(" cpsie i");

  <bb 5> [local count: 1073741824]:
  return;

}


SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_06 ()
{
  register uint32 reg_tmp;
  uint32 u32CoreId;
  unsigned char _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> [local count: 1073741824]:
  # DEBUG BEGIN_STMT
  _1 = Sys_GetCoreID ();
  u32CoreId_10 = (uint32) _1;
  # DEBUG u32CoreId => u32CoreId_10
  # DEBUG BEGIN_STMT
  _2 ={v} reentry_guard_SPI_EXCLUSIVE_AREA_06[u32CoreId_10];
  if (_2 == 0)
    goto <bb 3>; [50.00%]
  else
    goto <bb 5>; [50.00%]

  <bb 3> [local count: 536870913]:
  # DEBUG BEGIN_STMT
  # DEBUG INLINE_ENTRY Spi_schm_read_msr
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  __asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
  # DEBUG reg_tmp => reg_tmp_14
  # DEBUG BEGIN_STMT
  # DEBUG reg_tmp => NULL
  msr_SPI_EXCLUSIVE_AREA_06[u32CoreId_10] ={v} reg_tmp_14;
  # DEBUG BEGIN_STMT
  _3 ={v} msr_SPI_EXCLUSIVE_AREA_06[u32CoreId_10];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 4>; [50.00%]
  else
    goto <bb 5>; [50.00%]

  <bb 4> [local count: 268435456]:
  # DEBUG BEGIN_STMT
  __asm__ __volatile__(" cpsid i");

  <bb 5> [local count: 1073741824]:
  # DEBUG BEGIN_STMT
  _5 ={v} reentry_guard_SPI_EXCLUSIVE_AREA_06[u32CoreId_10];
  _6 = _5 + 1;
  reentry_guard_SPI_EXCLUSIVE_AREA_06[u32CoreId_10] ={v} _6;
  return;

}


SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_05 ()
{
  uint32 u32CoreId;
  unsigned char _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> [local count: 1073741824]:
  # DEBUG BEGIN_STMT
  _1 = Sys_GetCoreID ();
  u32CoreId_10 = (uint32) _1;
  # DEBUG u32CoreId => u32CoreId_10
  # DEBUG BEGIN_STMT
  _2 ={v} reentry_guard_SPI_EXCLUSIVE_AREA_05[u32CoreId_10];
  _3 = _2 + 4294967295;
  reentry_guard_SPI_EXCLUSIVE_AREA_05[u32CoreId_10] ={v} _3;
  # DEBUG BEGIN_STMT
  _4 ={v} msr_SPI_EXCLUSIVE_AREA_05[u32CoreId_10];
  _5 = _4 & 1;
  if (_5 == 0)
    goto <bb 3>; [50.00%]
  else
    goto <bb 5>; [50.00%]

  <bb 3> [local count: 536870913]:
  _6 ={v} reentry_guard_SPI_EXCLUSIVE_AREA_05[u32CoreId_10];
  if (_6 == 0)
    goto <bb 4>; [50.00%]
  else
    goto <bb 5>; [50.00%]

  <bb 4> [local count: 268435456]:
  # DEBUG BEGIN_STMT
  __asm__ __volatile__(" cpsie i");

  <bb 5> [local count: 1073741824]:
  return;

}


SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_05 ()
{
  register uint32 reg_tmp;
  uint32 u32CoreId;
  unsigned char _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> [local count: 1073741824]:
  # DEBUG BEGIN_STMT
  _1 = Sys_GetCoreID ();
  u32CoreId_10 = (uint32) _1;
  # DEBUG u32CoreId => u32CoreId_10
  # DEBUG BEGIN_STMT
  _2 ={v} reentry_guard_SPI_EXCLUSIVE_AREA_05[u32CoreId_10];
  if (_2 == 0)
    goto <bb 3>; [50.00%]
  else
    goto <bb 5>; [50.00%]

  <bb 3> [local count: 536870913]:
  # DEBUG BEGIN_STMT
  # DEBUG INLINE_ENTRY Spi_schm_read_msr
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  __asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
  # DEBUG reg_tmp => reg_tmp_14
  # DEBUG BEGIN_STMT
  # DEBUG reg_tmp => NULL
  msr_SPI_EXCLUSIVE_AREA_05[u32CoreId_10] ={v} reg_tmp_14;
  # DEBUG BEGIN_STMT
  _3 ={v} msr_SPI_EXCLUSIVE_AREA_05[u32CoreId_10];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 4>; [50.00%]
  else
    goto <bb 5>; [50.00%]

  <bb 4> [local count: 268435456]:
  # DEBUG BEGIN_STMT
  __asm__ __volatile__(" cpsid i");

  <bb 5> [local count: 1073741824]:
  # DEBUG BEGIN_STMT
  _5 ={v} reentry_guard_SPI_EXCLUSIVE_AREA_05[u32CoreId_10];
  _6 = _5 + 1;
  reentry_guard_SPI_EXCLUSIVE_AREA_05[u32CoreId_10] ={v} _6;
  return;

}


SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_04 ()
{
  uint32 u32CoreId;
  unsigned char _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> [local count: 1073741824]:
  # DEBUG BEGIN_STMT
  _1 = Sys_GetCoreID ();
  u32CoreId_10 = (uint32) _1;
  # DEBUG u32CoreId => u32CoreId_10
  # DEBUG BEGIN_STMT
  _2 ={v} reentry_guard_SPI_EXCLUSIVE_AREA_04[u32CoreId_10];
  _3 = _2 + 4294967295;
  reentry_guard_SPI_EXCLUSIVE_AREA_04[u32CoreId_10] ={v} _3;
  # DEBUG BEGIN_STMT
  _4 ={v} msr_SPI_EXCLUSIVE_AREA_04[u32CoreId_10];
  _5 = _4 & 1;
  if (_5 == 0)
    goto <bb 3>; [50.00%]
  else
    goto <bb 5>; [50.00%]

  <bb 3> [local count: 536870913]:
  _6 ={v} reentry_guard_SPI_EXCLUSIVE_AREA_04[u32CoreId_10];
  if (_6 == 0)
    goto <bb 4>; [50.00%]
  else
    goto <bb 5>; [50.00%]

  <bb 4> [local count: 268435456]:
  # DEBUG BEGIN_STMT
  __asm__ __volatile__(" cpsie i");

  <bb 5> [local count: 1073741824]:
  return;

}


SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_04 ()
{
  register uint32 reg_tmp;
  uint32 u32CoreId;
  unsigned char _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> [local count: 1073741824]:
  # DEBUG BEGIN_STMT
  _1 = Sys_GetCoreID ();
  u32CoreId_10 = (uint32) _1;
  # DEBUG u32CoreId => u32CoreId_10
  # DEBUG BEGIN_STMT
  _2 ={v} reentry_guard_SPI_EXCLUSIVE_AREA_04[u32CoreId_10];
  if (_2 == 0)
    goto <bb 3>; [50.00%]
  else
    goto <bb 5>; [50.00%]

  <bb 3> [local count: 536870913]:
  # DEBUG BEGIN_STMT
  # DEBUG INLINE_ENTRY Spi_schm_read_msr
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  __asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
  # DEBUG reg_tmp => reg_tmp_14
  # DEBUG BEGIN_STMT
  # DEBUG reg_tmp => NULL
  msr_SPI_EXCLUSIVE_AREA_04[u32CoreId_10] ={v} reg_tmp_14;
  # DEBUG BEGIN_STMT
  _3 ={v} msr_SPI_EXCLUSIVE_AREA_04[u32CoreId_10];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 4>; [50.00%]
  else
    goto <bb 5>; [50.00%]

  <bb 4> [local count: 268435456]:
  # DEBUG BEGIN_STMT
  __asm__ __volatile__(" cpsid i");

  <bb 5> [local count: 1073741824]:
  # DEBUG BEGIN_STMT
  _5 ={v} reentry_guard_SPI_EXCLUSIVE_AREA_04[u32CoreId_10];
  _6 = _5 + 1;
  reentry_guard_SPI_EXCLUSIVE_AREA_04[u32CoreId_10] ={v} _6;
  return;

}


SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_03 ()
{
  uint32 u32CoreId;
  unsigned char _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> [local count: 1073741824]:
  # DEBUG BEGIN_STMT
  _1 = Sys_GetCoreID ();
  u32CoreId_10 = (uint32) _1;
  # DEBUG u32CoreId => u32CoreId_10
  # DEBUG BEGIN_STMT
  _2 ={v} reentry_guard_SPI_EXCLUSIVE_AREA_03[u32CoreId_10];
  _3 = _2 + 4294967295;
  reentry_guard_SPI_EXCLUSIVE_AREA_03[u32CoreId_10] ={v} _3;
  # DEBUG BEGIN_STMT
  _4 ={v} msr_SPI_EXCLUSIVE_AREA_03[u32CoreId_10];
  _5 = _4 & 1;
  if (_5 == 0)
    goto <bb 3>; [50.00%]
  else
    goto <bb 5>; [50.00%]

  <bb 3> [local count: 536870913]:
  _6 ={v} reentry_guard_SPI_EXCLUSIVE_AREA_03[u32CoreId_10];
  if (_6 == 0)
    goto <bb 4>; [50.00%]
  else
    goto <bb 5>; [50.00%]

  <bb 4> [local count: 268435456]:
  # DEBUG BEGIN_STMT
  __asm__ __volatile__(" cpsie i");

  <bb 5> [local count: 1073741824]:
  return;

}


SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_03 ()
{
  register uint32 reg_tmp;
  uint32 u32CoreId;
  unsigned char _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> [local count: 1073741824]:
  # DEBUG BEGIN_STMT
  _1 = Sys_GetCoreID ();
  u32CoreId_10 = (uint32) _1;
  # DEBUG u32CoreId => u32CoreId_10
  # DEBUG BEGIN_STMT
  _2 ={v} reentry_guard_SPI_EXCLUSIVE_AREA_03[u32CoreId_10];
  if (_2 == 0)
    goto <bb 3>; [50.00%]
  else
    goto <bb 5>; [50.00%]

  <bb 3> [local count: 536870913]:
  # DEBUG BEGIN_STMT
  # DEBUG INLINE_ENTRY Spi_schm_read_msr
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  __asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
  # DEBUG reg_tmp => reg_tmp_14
  # DEBUG BEGIN_STMT
  # DEBUG reg_tmp => NULL
  msr_SPI_EXCLUSIVE_AREA_03[u32CoreId_10] ={v} reg_tmp_14;
  # DEBUG BEGIN_STMT
  _3 ={v} msr_SPI_EXCLUSIVE_AREA_03[u32CoreId_10];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 4>; [50.00%]
  else
    goto <bb 5>; [50.00%]

  <bb 4> [local count: 268435456]:
  # DEBUG BEGIN_STMT
  __asm__ __volatile__(" cpsid i");

  <bb 5> [local count: 1073741824]:
  # DEBUG BEGIN_STMT
  _5 ={v} reentry_guard_SPI_EXCLUSIVE_AREA_03[u32CoreId_10];
  _6 = _5 + 1;
  reentry_guard_SPI_EXCLUSIVE_AREA_03[u32CoreId_10] ={v} _6;
  return;

}


SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_02 ()
{
  uint32 u32CoreId;
  unsigned char _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> [local count: 1073741824]:
  # DEBUG BEGIN_STMT
  _1 = Sys_GetCoreID ();
  u32CoreId_10 = (uint32) _1;
  # DEBUG u32CoreId => u32CoreId_10
  # DEBUG BEGIN_STMT
  _2 ={v} reentry_guard_SPI_EXCLUSIVE_AREA_02[u32CoreId_10];
  _3 = _2 + 4294967295;
  reentry_guard_SPI_EXCLUSIVE_AREA_02[u32CoreId_10] ={v} _3;
  # DEBUG BEGIN_STMT
  _4 ={v} msr_SPI_EXCLUSIVE_AREA_02[u32CoreId_10];
  _5 = _4 & 1;
  if (_5 == 0)
    goto <bb 3>; [50.00%]
  else
    goto <bb 5>; [50.00%]

  <bb 3> [local count: 536870913]:
  _6 ={v} reentry_guard_SPI_EXCLUSIVE_AREA_02[u32CoreId_10];
  if (_6 == 0)
    goto <bb 4>; [50.00%]
  else
    goto <bb 5>; [50.00%]

  <bb 4> [local count: 268435456]:
  # DEBUG BEGIN_STMT
  __asm__ __volatile__(" cpsie i");

  <bb 5> [local count: 1073741824]:
  return;

}


SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_02 ()
{
  register uint32 reg_tmp;
  uint32 u32CoreId;
  unsigned char _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> [local count: 1073741824]:
  # DEBUG BEGIN_STMT
  _1 = Sys_GetCoreID ();
  u32CoreId_10 = (uint32) _1;
  # DEBUG u32CoreId => u32CoreId_10
  # DEBUG BEGIN_STMT
  _2 ={v} reentry_guard_SPI_EXCLUSIVE_AREA_02[u32CoreId_10];
  if (_2 == 0)
    goto <bb 3>; [50.00%]
  else
    goto <bb 5>; [50.00%]

  <bb 3> [local count: 536870913]:
  # DEBUG BEGIN_STMT
  # DEBUG INLINE_ENTRY Spi_schm_read_msr
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  __asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
  # DEBUG reg_tmp => reg_tmp_14
  # DEBUG BEGIN_STMT
  # DEBUG reg_tmp => NULL
  msr_SPI_EXCLUSIVE_AREA_02[u32CoreId_10] ={v} reg_tmp_14;
  # DEBUG BEGIN_STMT
  _3 ={v} msr_SPI_EXCLUSIVE_AREA_02[u32CoreId_10];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 4>; [50.00%]
  else
    goto <bb 5>; [50.00%]

  <bb 4> [local count: 268435456]:
  # DEBUG BEGIN_STMT
  __asm__ __volatile__(" cpsid i");

  <bb 5> [local count: 1073741824]:
  # DEBUG BEGIN_STMT
  _5 ={v} reentry_guard_SPI_EXCLUSIVE_AREA_02[u32CoreId_10];
  _6 = _5 + 1;
  reentry_guard_SPI_EXCLUSIVE_AREA_02[u32CoreId_10] ={v} _6;
  return;

}


SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_01 ()
{
  uint32 u32CoreId;
  unsigned char _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> [local count: 1073741824]:
  # DEBUG BEGIN_STMT
  _1 = Sys_GetCoreID ();
  u32CoreId_10 = (uint32) _1;
  # DEBUG u32CoreId => u32CoreId_10
  # DEBUG BEGIN_STMT
  _2 ={v} reentry_guard_SPI_EXCLUSIVE_AREA_01[u32CoreId_10];
  _3 = _2 + 4294967295;
  reentry_guard_SPI_EXCLUSIVE_AREA_01[u32CoreId_10] ={v} _3;
  # DEBUG BEGIN_STMT
  _4 ={v} msr_SPI_EXCLUSIVE_AREA_01[u32CoreId_10];
  _5 = _4 & 1;
  if (_5 == 0)
    goto <bb 3>; [50.00%]
  else
    goto <bb 5>; [50.00%]

  <bb 3> [local count: 536870913]:
  _6 ={v} reentry_guard_SPI_EXCLUSIVE_AREA_01[u32CoreId_10];
  if (_6 == 0)
    goto <bb 4>; [50.00%]
  else
    goto <bb 5>; [50.00%]

  <bb 4> [local count: 268435456]:
  # DEBUG BEGIN_STMT
  __asm__ __volatile__(" cpsie i");

  <bb 5> [local count: 1073741824]:
  return;

}


SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_01 ()
{
  register uint32 reg_tmp;
  uint32 u32CoreId;
  unsigned char _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> [local count: 1073741824]:
  # DEBUG BEGIN_STMT
  _1 = Sys_GetCoreID ();
  u32CoreId_10 = (uint32) _1;
  # DEBUG u32CoreId => u32CoreId_10
  # DEBUG BEGIN_STMT
  _2 ={v} reentry_guard_SPI_EXCLUSIVE_AREA_01[u32CoreId_10];
  if (_2 == 0)
    goto <bb 3>; [50.00%]
  else
    goto <bb 5>; [50.00%]

  <bb 3> [local count: 536870913]:
  # DEBUG BEGIN_STMT
  # DEBUG INLINE_ENTRY Spi_schm_read_msr
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  __asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
  # DEBUG reg_tmp => reg_tmp_14
  # DEBUG BEGIN_STMT
  # DEBUG reg_tmp => NULL
  msr_SPI_EXCLUSIVE_AREA_01[u32CoreId_10] ={v} reg_tmp_14;
  # DEBUG BEGIN_STMT
  _3 ={v} msr_SPI_EXCLUSIVE_AREA_01[u32CoreId_10];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 4>; [50.00%]
  else
    goto <bb 5>; [50.00%]

  <bb 4> [local count: 268435456]:
  # DEBUG BEGIN_STMT
  __asm__ __volatile__(" cpsid i");

  <bb 5> [local count: 1073741824]:
  # DEBUG BEGIN_STMT
  _5 ={v} reentry_guard_SPI_EXCLUSIVE_AREA_01[u32CoreId_10];
  _6 = _5 + 1;
  reentry_guard_SPI_EXCLUSIVE_AREA_01[u32CoreId_10] ={v} _6;
  return;

}


SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_00 ()
{
  uint32 u32CoreId;
  unsigned char _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> [local count: 1073741824]:
  # DEBUG BEGIN_STMT
  _1 = Sys_GetCoreID ();
  u32CoreId_10 = (uint32) _1;
  # DEBUG u32CoreId => u32CoreId_10
  # DEBUG BEGIN_STMT
  _2 ={v} reentry_guard_SPI_EXCLUSIVE_AREA_00[u32CoreId_10];
  _3 = _2 + 4294967295;
  reentry_guard_SPI_EXCLUSIVE_AREA_00[u32CoreId_10] ={v} _3;
  # DEBUG BEGIN_STMT
  _4 ={v} msr_SPI_EXCLUSIVE_AREA_00[u32CoreId_10];
  _5 = _4 & 1;
  if (_5 == 0)
    goto <bb 3>; [50.00%]
  else
    goto <bb 5>; [50.00%]

  <bb 3> [local count: 536870913]:
  _6 ={v} reentry_guard_SPI_EXCLUSIVE_AREA_00[u32CoreId_10];
  if (_6 == 0)
    goto <bb 4>; [50.00%]
  else
    goto <bb 5>; [50.00%]

  <bb 4> [local count: 268435456]:
  # DEBUG BEGIN_STMT
  __asm__ __volatile__(" cpsie i");

  <bb 5> [local count: 1073741824]:
  return;

}


SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_00 ()
{
  register uint32 reg_tmp;
  uint32 u32CoreId;
  unsigned char _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> [local count: 1073741824]:
  # DEBUG BEGIN_STMT
  _1 = Sys_GetCoreID ();
  u32CoreId_10 = (uint32) _1;
  # DEBUG u32CoreId => u32CoreId_10
  # DEBUG BEGIN_STMT
  _2 ={v} reentry_guard_SPI_EXCLUSIVE_AREA_00[u32CoreId_10];
  if (_2 == 0)
    goto <bb 3>; [50.00%]
  else
    goto <bb 5>; [50.00%]

  <bb 3> [local count: 536870913]:
  # DEBUG BEGIN_STMT
  # DEBUG INLINE_ENTRY Spi_schm_read_msr
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  __asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_14);
  # DEBUG reg_tmp => reg_tmp_14
  # DEBUG BEGIN_STMT
  # DEBUG reg_tmp => NULL
  msr_SPI_EXCLUSIVE_AREA_00[u32CoreId_10] ={v} reg_tmp_14;
  # DEBUG BEGIN_STMT
  _3 ={v} msr_SPI_EXCLUSIVE_AREA_00[u32CoreId_10];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 4>; [50.00%]
  else
    goto <bb 5>; [50.00%]

  <bb 4> [local count: 268435456]:
  # DEBUG BEGIN_STMT
  __asm__ __volatile__(" cpsid i");

  <bb 5> [local count: 1073741824]:
  # DEBUG BEGIN_STMT
  _5 ={v} reentry_guard_SPI_EXCLUSIVE_AREA_00[u32CoreId_10];
  _6 = _5 + 1;
  reentry_guard_SPI_EXCLUSIVE_AREA_00[u32CoreId_10] ={v} _6;
  return;

}


Spi_schm_read_msr ()
{
  register uint32 reg_tmp;

  <bb 2> [local count: 1073741824]:
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  __asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_1);
  # DEBUG reg_tmp => reg_tmp_1
  # DEBUG BEGIN_STMT
  return reg_tmp_1;

}


